1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; We used to generate a mul+mflo sequence instead of shifting by 2/3 to get the jump table address
3; RUN: llc %s -O2 -mtriple=mips64-unknown-freebsd -target-abi n64 -relocation-model=pic -o - | FileCheck %s
4
5define i64 @test(i64 %arg) {
6; CHECK-LABEL: test:
7; CHECK:       # %bb.0: # %entry
8; CHECK-NEXT:    lui $1, %hi(%neg(%gp_rel(test)))
9; CHECK-NEXT:    daddu $2, $1, $25
10; CHECK-NEXT:    sltiu $1, $4, 11
11; CHECK-NEXT:    beqz $1, .LBB0_3
12; CHECK-NEXT:    nop
13; CHECK-NEXT:  .LBB0_1: # %entry
14; CHECK-NEXT:    daddiu $1, $2, %lo(%neg(%gp_rel(test)))
15; CHECK-NEXT:    dsll $2, $4, 3
16; Previously this dsll was the following sequence:
17;	daddiu	$2, $zero, 8
18;	dmult	$4, $2
19;	mflo	$2
20; CHECK-NEXT:    ld $3, %got_page(.LJTI0_0)($1)
21; CHECK-NEXT:    daddu $2, $2, $3
22; CHECK-NEXT:    ld $2, %got_ofst(.LJTI0_0)($2)
23; CHECK-NEXT:    daddu $1, $2, $1
24; CHECK-NEXT:    jr $1
25; CHECK-NEXT:    nop
26; CHECK-NEXT:  .LBB0_2: # %sw.bb
27; CHECK-NEXT:    jr $ra
28; CHECK-NEXT:    daddiu $2, $zero, 1
29; CHECK-NEXT:  .LBB0_3: # %default
30; CHECK-NEXT:    jr $ra
31; CHECK-NEXT:    daddiu $2, $zero, 1234
32; CHECK-NEXT:  .LBB0_4: # %sw.bb1
33; CHECK-NEXT:    jr $ra
34; CHECK-NEXT:    daddiu $2, $zero, 0
35entry:
36  switch i64 %arg, label %default [
37    i64 0, label %sw.bb
38    i64 3, label %sw.bb
39    i64 5, label %sw.bb
40    i64 10, label %sw.bb1
41  ]
42
43default:
44  ret i64 1234
45
46sw.bb:
47  ret i64 1
48
49sw.bb1:
50  ret i64 0
51}
52
53; CHECK-LABEL: 	.section	.rodata,"a",@progbits
54; CHECK-NEXT: 	.p2align	3
55; CHECK-LABEL: .LJTI0_0:
56; CHECK-NEXT: 	.gpdword	.LBB0_2
57; CHECK-NEXT: 	.gpdword	.LBB0_3
58; CHECK-NEXT: 	.gpdword	.LBB0_3
59; CHECK-NEXT: 	.gpdword	.LBB0_2
60; CHECK-NEXT: 	.gpdword	.LBB0_3
61; CHECK-NEXT: 	.gpdword	.LBB0_2
62; CHECK-NEXT: 	.gpdword	.LBB0_3
63; CHECK-NEXT: 	.gpdword	.LBB0_3
64; CHECK-NEXT: 	.gpdword	.LBB0_3
65; CHECK-NEXT: 	.gpdword	.LBB0_3
66; CHECK-NEXT: 	.gpdword	.LBB0_4
67