1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -verify-machineinstrs -mattr=+mve %s -o - | FileCheck %s
3
4define arm_aapcs_vfpcc <2 x i64> @brv_2i64_t(<2 x i64> %src){
5; CHECK-LABEL: brv_2i64_t:
6; CHECK:       @ %bb.0: @ %entry
7; CHECK-NEXT:    vrev64.8 q1, q0
8; CHECK-NEXT:    movs r0, #8
9; CHECK-NEXT:    vbrsr.8 q0, q1, r0
10; CHECK-NEXT:    bx lr
11entry:
12  %0 = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %src)
13  ret <2 x i64> %0
14}
15
16define arm_aapcs_vfpcc <4 x i32> @brv_4i32_t(<4 x i32> %src){
17; CHECK-LABEL: brv_4i32_t:
18; CHECK:       @ %bb.0: @ %entry
19; CHECK-NEXT:    movs r0, #32
20; CHECK-NEXT:    vbrsr.32 q0, q0, r0
21; CHECK-NEXT:    bx lr
22entry:
23  %0 = call <4 x i32> @llvm.bitreverse.v4i32(<4 x i32> %src)
24  ret <4 x i32> %0
25}
26
27define arm_aapcs_vfpcc <8 x i16> @brv_8i16_t(<8 x i16> %src){
28; CHECK-LABEL: brv_8i16_t:
29; CHECK:       @ %bb.0: @ %entry
30; CHECK-NEXT:    movs r0, #16
31; CHECK-NEXT:    vbrsr.16 q0, q0, r0
32; CHECK-NEXT:    bx lr
33entry:
34  %0 = call <8 x i16> @llvm.bitreverse.v8i16(<8 x i16> %src)
35  ret <8 x i16> %0
36}
37
38define arm_aapcs_vfpcc <16 x i8> @brv_16i8_t(<16 x i8> %src){
39; CHECK-LABEL: brv_16i8_t:
40; CHECK:       @ %bb.0: @ %entry
41; CHECK-NEXT:    movs r0, #8
42; CHECK-NEXT:    vbrsr.8 q0, q0, r0
43; CHECK-NEXT:    bx lr
44entry:
45  %0 = call <16 x i8> @llvm.bitreverse.v16i8(<16 x i8> %src)
46  ret <16 x i8> %0
47}
48
49declare <2 x i64> @llvm.bitreverse.v2i64(<2 x i64>)
50declare <4 x i32> @llvm.bitreverse.v4i32(<4 x i32>)
51declare <8 x i16> @llvm.bitreverse.v8i16(<8 x i16>)
52declare <16 x i8> @llvm.bitreverse.v16i8(<16 x i8>)
53