1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -indvars -dce -S -indvars-predicate-loops=0 | FileCheck %s 3 4; Provide legal integer types. 5target datalayout = "n8:16:32:64" 6 7@A = external global i32 8 9;; Convert a pre-increment check on the latch into a post increment check 10define i32 @pre_to_post_add() { 11; CHECK-LABEL: @pre_to_post_add( 12; CHECK-NEXT: entry: 13; CHECK-NEXT: br label [[LOOP:%.*]] 14; CHECK: loop: 15; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] 16; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i32 [[I]], 1 17; CHECK-NEXT: store i32 [[I]], i32* @A, align 4 18; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[I_NEXT]], 1001 19; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[LOOPEXIT:%.*]] 20; CHECK: loopexit: 21; CHECK-NEXT: ret i32 1000 22; 23entry: 24 br label %loop 25 26loop: 27 %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] 28 %i.next = add i32 %i, 1 29 store i32 %i, i32* @A 30 %c = icmp slt i32 %i, 1000 31 br i1 %c, label %loop, label %loopexit 32 33loopexit: 34 ret i32 %i 35} 36 37; TODO: we should be able to convert the subtract into a post-decrement check 38define i32 @pre_to_post_sub() { 39; CHECK-LABEL: @pre_to_post_sub( 40; CHECK-NEXT: entry: 41; CHECK-NEXT: br label [[LOOP:%.*]] 42; CHECK: loop: 43; CHECK-NEXT: [[I:%.*]] = phi i32 [ 1000, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] 44; CHECK-NEXT: [[I_NEXT]] = sub nsw i32 [[I]], 1 45; CHECK-NEXT: store i32 [[I]], i32* @A, align 4 46; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[I]], 0 47; CHECK-NEXT: br i1 [[C]], label [[LOOP]], label [[LOOPEXIT:%.*]] 48; CHECK: loopexit: 49; CHECK-NEXT: ret i32 0 50; 51entry: 52 br label %loop 53 54loop: 55 %i = phi i32 [ 1000, %entry ], [ %i.next, %loop ] 56 %i.next = sub i32 %i, 1 57 store i32 %i, i32* @A 58 %c = icmp sgt i32 %i, 0 59 br i1 %c, label %loop, label %loopexit 60 61loopexit: 62 ret i32 %i 63} 64 65 66 67; LFTR should eliminate the need for the computation of i*i completely. It 68; is only used to compute the exit value. 69define i32 @quadratic_slt() { 70; CHECK-LABEL: @quadratic_slt( 71; CHECK-NEXT: entry: 72; CHECK-NEXT: br label [[LOOP:%.*]] 73; CHECK: loop: 74; CHECK-NEXT: [[I:%.*]] = phi i32 [ 7, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] 75; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i32 [[I]], 1 76; CHECK-NEXT: store i32 [[I]], i32* @A, align 4 77; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[I_NEXT]], 33 78; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[LOOPEXIT:%.*]] 79; CHECK: loopexit: 80; CHECK-NEXT: ret i32 32 81; 82entry: 83 br label %loop 84 85loop: 86 %i = phi i32 [ 7, %entry ], [ %i.next, %loop ] 87 %i.next = add i32 %i, 1 88 store i32 %i, i32* @A 89 %i2 = mul i32 %i, %i 90 %c = icmp slt i32 %i2, 1000 91 br i1 %c, label %loop, label %loopexit 92 93loopexit: 94 ret i32 %i 95} 96 97 98; Same as previous but with sle test 99define i32 @quadratic_sle() { 100; CHECK-LABEL: @quadratic_sle( 101; CHECK-NEXT: entry: 102; CHECK-NEXT: br label [[LOOP:%.*]] 103; CHECK: loop: 104; CHECK-NEXT: [[I:%.*]] = phi i32 [ 7, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] 105; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i32 [[I]], 1 106; CHECK-NEXT: store i32 [[I]], i32* @A, align 4 107; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[I_NEXT]], 33 108; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[LOOPEXIT:%.*]] 109; CHECK: loopexit: 110; CHECK-NEXT: ret i32 32 111; 112entry: 113 br label %loop 114 115loop: 116 %i = phi i32 [ 7, %entry ], [ %i.next, %loop ] 117 %i.next = add i32 %i, 1 118 store i32 %i, i32* @A 119 %i2 = mul i32 %i, %i 120 %c = icmp sle i32 %i2, 1000 121 br i1 %c, label %loop, label %loopexit 122 123loopexit: 124 ret i32 %i 125} 126 127; Same as previous but with ule test 128define i32 @quadratic_ule() { 129; CHECK-LABEL: @quadratic_ule( 130; CHECK-NEXT: entry: 131; CHECK-NEXT: br label [[LOOP:%.*]] 132; CHECK: loop: 133; CHECK-NEXT: [[I:%.*]] = phi i32 [ 7, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] 134; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i32 [[I]], 1 135; CHECK-NEXT: store i32 [[I]], i32* @A, align 4 136; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[I_NEXT]], 33 137; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[LOOPEXIT:%.*]] 138; CHECK: loopexit: 139; CHECK-NEXT: ret i32 32 140; 141entry: 142 br label %loop 143 144loop: 145 %i = phi i32 [ 7, %entry ], [ %i.next, %loop ] 146 %i.next = add i32 %i, 1 147 store i32 %i, i32* @A 148 %i2 = mul i32 %i, %i 149 %c = icmp ule i32 %i2, 1000 150 br i1 %c, label %loop, label %loopexit 151 152loopexit: 153 ret i32 %i 154} 155 156define i32 @quadratic_sgt_loopdec() { 157; CHECK-LABEL: @quadratic_sgt_loopdec( 158; CHECK-NEXT: entry: 159; CHECK-NEXT: br label [[LOOP:%.*]] 160; CHECK: loop: 161; CHECK-NEXT: [[I:%.*]] = phi i32 [ 10, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP]] ] 162; CHECK-NEXT: [[I_NEXT]] = call i32 @llvm.loop.decrement.reg.i32(i32 [[I]], i32 1) 163; CHECK-NEXT: store i32 [[I]], i32* @A, align 4 164; CHECK-NEXT: [[I2:%.*]] = mul i32 [[I]], [[I]] 165; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[I2]], 0 166; CHECK-NEXT: br i1 [[C]], label [[LOOP]], label [[LOOPEXIT:%.*]] 167; CHECK: loopexit: 168; CHECK-NEXT: ret i32 0 169; 170 171entry: 172 br label %loop 173 174loop: 175 %i = phi i32 [ 10, %entry ], [ %i.next, %loop ] 176 %i.next = call i32 @llvm.loop.decrement.reg.i32(i32 %i, i32 1) 177 store i32 %i, i32* @A 178 %i2 = mul i32 %i, %i 179 %c = icmp sgt i32 %i2, 0 180 br i1 %c, label %loop, label %loopexit 181 182loopexit: 183 ret i32 %i 184} 185 186@data = common global [240 x i8] zeroinitializer, align 16 187 188define void @test_zext(i8* %a) #0 { 189; CHECK-LABEL: @test_zext( 190; CHECK-NEXT: entry: 191; CHECK-NEXT: br label [[LOOP:%.*]] 192; CHECK: loop: 193; CHECK-NEXT: [[P_0:%.*]] = phi i8* [ getelementptr inbounds ([240 x i8], [240 x i8]* @data, i64 0, i64 0), [[ENTRY:%.*]] ], [ [[T3:%.*]], [[LOOP]] ] 194; CHECK-NEXT: [[DOT0:%.*]] = phi i8* [ [[A:%.*]], [[ENTRY]] ], [ [[T:%.*]], [[LOOP]] ] 195; CHECK-NEXT: [[T]] = getelementptr inbounds i8, i8* [[DOT0]], i64 1 196; CHECK-NEXT: [[T2:%.*]] = load i8, i8* [[DOT0]], align 1 197; CHECK-NEXT: [[T3]] = getelementptr inbounds i8, i8* [[P_0]], i64 1 198; CHECK-NEXT: store i8 [[T2]], i8* [[P_0]], align 1 199; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i8* [[P_0]], getelementptr inbounds ([240 x i8], [240 x i8]* @data, i64 0, i64 239) 200; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]] 201; CHECK: exit: 202; CHECK-NEXT: ret void 203; 204entry: 205 br label %loop 206 207loop: 208 %i.0 = phi i8 [ 0, %entry ], [ %t4, %loop ] 209 %p.0 = phi i8* [ getelementptr inbounds ([240 x i8], [240 x i8]* @data, i64 0, i64 0), %entry ], [ %t3, %loop ] 210 %.0 = phi i8* [ %a, %entry ], [ %t, %loop ] 211 %t = getelementptr inbounds i8, i8* %.0, i64 1 212 %t2 = load i8, i8* %.0, align 1 213 %t3 = getelementptr inbounds i8, i8* %p.0, i64 1 214 store i8 %t2, i8* %p.0, align 1 215 %t4 = add i8 %i.0, 1 216 %t5 = icmp ult i8 %t4, -16 217 br i1 %t5, label %loop, label %exit 218 219exit: 220 ret void 221} 222 223; It is okay to do LFTR on this loop even though the trip count is a 224; division because in this case the division can be optimized to a 225; shift. 226define void @test_udiv_as_shift(i8* %a, i8 %n) nounwind uwtable ssp { 227; CHECK-LABEL: @test_udiv_as_shift( 228; CHECK-NEXT: entry: 229; CHECK-NEXT: [[E:%.*]] = icmp sgt i8 [[N:%.*]], 3 230; CHECK-NEXT: br i1 [[E]], label [[LOOP_PREHEADER:%.*]], label [[EXIT:%.*]] 231; CHECK: loop.preheader: 232; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[N]], 3 233; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[TMP0]], 2 234; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i8 [[TMP1]], 1 235; CHECK-NEXT: br label [[LOOP:%.*]] 236; CHECK: loop: 237; CHECK-NEXT: [[I1:%.*]] = phi i8 [ [[I1_INC:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ] 238; CHECK-NEXT: [[I1_INC]] = add nuw nsw i8 [[I1]], 1 239; CHECK-NEXT: store volatile i8 0, i8* [[A:%.*]], align 1 240; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i8 [[I1_INC]], [[TMP2]] 241; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]] 242; CHECK: exit.loopexit: 243; CHECK-NEXT: br label [[EXIT]] 244; CHECK: exit: 245; CHECK-NEXT: ret void 246; 247entry: 248 %e = icmp sgt i8 %n, 3 249 br i1 %e, label %loop, label %exit 250 251loop: 252 %i = phi i8 [ 0, %entry ], [ %i.inc, %loop ] 253 %i1 = phi i8 [ 0, %entry ], [ %i1.inc, %loop ] 254 %i.inc = add nsw i8 %i, 4 255 %i1.inc = add i8 %i1, 1 256 store volatile i8 0, i8* %a 257 %c = icmp slt i8 %i, %n 258 br i1 %c, label %loop, label %exit 259 260exit: 261 ret void 262} 263 264; Don't RAUW the loop's original comparison instruction if it has other uses 265; which aren't dominated by the new comparison instruction (which we insert 266; at the branch user). 267define void @use_before_branch() { 268; CHECK-LABEL: @use_before_branch( 269; CHECK-NEXT: entry: 270; CHECK-NEXT: br label [[LOOPENTRY_0:%.*]] 271; CHECK: loopentry.0: 272; CHECK-NEXT: [[MB_Y_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[T152:%.*]], [[LOOPENTRY_1:%.*]] ] 273; CHECK-NEXT: [[T14:%.*]] = icmp ule i32 [[MB_Y_0]], 3 274; CHECK-NEXT: br i1 [[T14]], label [[LOOPENTRY_1]], label [[LOOPEXIT_0:%.*]] 275; CHECK: loopentry.1: 276; CHECK-NEXT: [[T152]] = add nuw nsw i32 [[MB_Y_0]], 2 277; CHECK-NEXT: br label [[LOOPENTRY_0]] 278; CHECK: loopexit.0: 279; CHECK-NEXT: unreachable 280; 281entry: 282 br label %loopentry.0 283 284loopentry.0: 285 %mb_y.0 = phi i32 [ 0, %entry ], [ %t152, %loopentry.1 ] 286 %t14 = icmp sle i32 %mb_y.0, 3 287 %t15 = zext i1 %t14 to i32 288 br i1 %t14, label %loopentry.1, label %loopexit.0 289 290loopentry.1: 291 %t152 = add i32 %mb_y.0, 2 292 br label %loopentry.0 293 294loopexit.0: ; preds = %loopentry.0 295 unreachable 296} 297 298@.str3 = private constant [6 x i8] c"%lld\0A\00", align 1 299declare i32 @printf(i8* noalias nocapture, ...) nounwind 300 301; PR13371: indvars pass incorrectly substitutes 'undef' values 302; 303; LFTR should not user %undef as the loop counter. 304define i64 @no_undef_counter() nounwind { 305; CHECK-LABEL: @no_undef_counter( 306; CHECK-NEXT: func_start: 307; CHECK-NEXT: br label [[BLOCK9:%.*]] 308; CHECK: block9: 309; CHECK-NEXT: [[UNDEF:%.*]] = phi i64 [ [[NEXT_UNDEF:%.*]], [[BLOCK9]] ], [ undef, [[FUNC_START:%.*]] ] 310; CHECK-NEXT: [[ITER:%.*]] = phi i64 [ [[NEXT_ITER:%.*]], [[BLOCK9]] ], [ 1, [[FUNC_START]] ] 311; CHECK-NEXT: [[NEXT_ITER]] = add nuw nsw i64 [[ITER]], 1 312; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 (i8*, ...) @printf(i8* noalias nocapture getelementptr inbounds ([6 x i8], [6 x i8]* @.str3, i64 0, i64 0), i64 [[NEXT_ITER]], i64 [[UNDEF]]) 313; CHECK-NEXT: [[NEXT_UNDEF]] = add nsw i64 [[UNDEF]], 1 314; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[NEXT_ITER]], 100 315; CHECK-NEXT: br i1 [[EXITCOND]], label [[BLOCK9]], label [[EXIT:%.*]] 316; CHECK: exit: 317; CHECK-NEXT: ret i64 0 318; 319func_start: 320 br label %block9 321block9: ; preds = %block9,%func_start 322 %undef = phi i64 [ %next_undef, %block9 ], [ undef, %func_start ] 323 %iter = phi i64 [ %next_iter, %block9 ], [ 1, %func_start ] 324 %next_iter = add nsw i64 %iter, 1 325 %0 = tail call i32 (i8*, ...) @printf(i8* noalias nocapture getelementptr inbounds ([6 x i8], [6 x i8]* @.str3, i64 0, i64 0), i64 %next_iter, i64 %undef) 326 %next_undef = add nsw i64 %undef, 1 327 %_tmp_3 = icmp slt i64 %next_iter, 100 328 br i1 %_tmp_3, label %block9, label %exit 329exit: ; preds = %block9 330 ret i64 0 331} 332 333define void @extend_const() #0 { 334; CHECK-LABEL: @extend_const( 335; CHECK-NEXT: entry: 336; CHECK-NEXT: br label [[FOR_BODY:%.*]] 337; CHECK: for.body: 338; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ] 339; CHECK-NEXT: call void @bar(i32 [[INDVARS_IV]]) #[[ATTR2:[0-9]+]] 340; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1 341; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INDVARS_IV_NEXT]], 512 342; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]] 343; CHECK: for.end: 344; CHECK-NEXT: ret void 345; 346entry: 347 br label %for.body 348 349for.body: ; preds = %entry, %for.body 350 %i.01 = phi i16 [ 0, %entry ], [ %inc, %for.body ] 351 %conv2 = sext i16 %i.01 to i32 352 call void @bar(i32 %conv2) #1 353 %inc = add i16 %i.01, 1 354 %cmp = icmp slt i16 %inc, 512 355 br i1 %cmp, label %for.body, label %for.end 356 357for.end: ; preds = %for.body 358 ret void 359} 360 361; Check that post-incrementing the backedge taken count does not overflow. 362define i32 @extend_const_postinc() #0 { 363; CHECK-LABEL: @extend_const_postinc( 364; CHECK-NEXT: entry: 365; CHECK-NEXT: br label [[DO_BODY:%.*]] 366; CHECK: do.body: 367; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[DO_BODY]] ], [ 0, [[ENTRY:%.*]] ] 368; CHECK-NEXT: call void @bar(i32 [[INDVARS_IV]]) #[[ATTR2]] 369; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[INDVARS_IV]], 255 370; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1 371; CHECK-NEXT: br i1 [[CMP]], label [[DO_END:%.*]], label [[DO_BODY]] 372; CHECK: do.end: 373; CHECK-NEXT: ret i32 0 374; 375entry: 376 br label %do.body 377 378do.body: ; preds = %do.body, %entry 379 %first.0 = phi i8 [ 0, %entry ], [ %inc, %do.body ] 380 %conv = zext i8 %first.0 to i32 381 call void @bar(i32 %conv) #1 382 %inc = add i8 %first.0, 1 383 %cmp = icmp eq i8 %first.0, -1 384 br i1 %cmp, label %do.end, label %do.body 385 386do.end: ; preds = %do.body 387 ret i32 0 388} 389 390declare void @bar(i32) 391 392attributes #0 = { nounwind uwtable } 393attributes #1 = { nounwind } 394 395; With the given initial value for IV, it is not legal to widen 396; trip count to IV size 397define void @wide_trip_count_test1(float* %autoc, 398; CHECK-LABEL: @wide_trip_count_test1( 399; CHECK-NEXT: entry: 400; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[DATA_LEN:%.*]], [[SAMPLE:%.*]] 401; CHECK-NEXT: [[CMP4:%.*]] = icmp eq i32 [[DATA_LEN]], [[SAMPLE]] 402; CHECK-NEXT: br i1 [[CMP4]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]] 403; CHECK: for.body.preheader: 404; CHECK-NEXT: br label [[FOR_BODY:%.*]] 405; CHECK: for.body: 406; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 68719476736, [[FOR_BODY_PREHEADER]] ] 407; CHECK-NEXT: [[TEMP:%.*]] = trunc i64 [[INDVARS_IV]] to i32 408; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TEMP]], [[SAMPLE]] 409; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[ADD]] to i64 410; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[DATA:%.*]], i64 [[IDXPROM]] 411; CHECK-NEXT: [[TEMP1:%.*]] = load float, float* [[ARRAYIDX]], align 4 412; CHECK-NEXT: [[MUL:%.*]] = fmul float [[TEMP1]], [[D:%.*]] 413; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, float* [[AUTOC:%.*]], i64 [[INDVARS_IV]] 414; CHECK-NEXT: [[TEMP2:%.*]] = load float, float* [[ARRAYIDX2]], align 4 415; CHECK-NEXT: [[ADD3:%.*]] = fadd float [[TEMP2]], [[MUL]] 416; CHECK-NEXT: store float [[ADD3]], float* [[ARRAYIDX2]], align 4 417; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 418; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 419; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[SUB]] 420; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]] 421; CHECK: for.end.loopexit: 422; CHECK-NEXT: br label [[FOR_END]] 423; CHECK: for.end: 424; CHECK-NEXT: ret void 425; 426 float* %data, 427 float %d, i32 %data_len, i32 %sample) nounwind { 428entry: 429 %sub = sub i32 %data_len, %sample 430 %cmp4 = icmp eq i32 %data_len, %sample 431 br i1 %cmp4, label %for.end, label %for.body 432 433for.body: ; preds = %entry, %for.body 434 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 68719476736, %entry ] 435 %temp = trunc i64 %indvars.iv to i32 436 %add = add i32 %temp, %sample 437 %idxprom = zext i32 %add to i64 438 %arrayidx = getelementptr inbounds float, float* %data, i64 %idxprom 439 %temp1 = load float, float* %arrayidx, align 4 440 %mul = fmul float %temp1, %d 441 %arrayidx2 = getelementptr inbounds float, float* %autoc, i64 %indvars.iv 442 %temp2 = load float, float* %arrayidx2, align 4 443 %add3 = fadd float %temp2, %mul 444 store float %add3, float* %arrayidx2, align 4 445 %indvars.iv.next = add i64 %indvars.iv, 1 446 %temp3 = trunc i64 %indvars.iv.next to i32 447 %cmp = icmp ult i32 %temp3, %sub 448 br i1 %cmp, label %for.body, label %for.end 449 450for.end: ; preds = %for.body, %entry 451 ret void 452} 453 454; Trip count should be widened and LFTR should canonicalize the condition 455define float @wide_trip_count_test2(float* %a, 456; CHECK-LABEL: @wide_trip_count_test2( 457; CHECK-NEXT: entry: 458; CHECK-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[M:%.*]], 500 459; CHECK-NEXT: br i1 [[CMP5]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]] 460; CHECK: for.body.preheader: 461; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[M]] to i64 462; CHECK-NEXT: br label [[FOR_BODY:%.*]] 463; CHECK: for.body: 464; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 500, [[FOR_BODY_PREHEADER]] ] 465; CHECK-NEXT: [[SUM_07:%.*]] = phi float [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0.000000e+00, [[FOR_BODY_PREHEADER]] ] 466; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[INDVARS_IV]] 467; CHECK-NEXT: [[TEMP:%.*]] = load float, float* [[ARRAYIDX]], align 4 468; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[INDVARS_IV]] 469; CHECK-NEXT: [[TEMP1:%.*]] = load float, float* [[ARRAYIDX2]], align 4 470; CHECK-NEXT: [[MUL:%.*]] = fmul float [[TEMP]], [[TEMP1]] 471; CHECK-NEXT: [[ADD]] = fadd float [[SUM_07]], [[MUL]] 472; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 473; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 474; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]] 475; CHECK: for.end.loopexit: 476; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi float [ [[ADD]], [[FOR_BODY]] ] 477; CHECK-NEXT: br label [[FOR_END]] 478; CHECK: for.end: 479; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[ADD_LCSSA]], [[FOR_END_LOOPEXIT]] ] 480; CHECK-NEXT: ret float [[SUM_0_LCSSA]] 481; 482 float* %b, 483 i32 zeroext %m) local_unnamed_addr #0 { 484entry: 485 %cmp5 = icmp ugt i32 %m, 500 486 br i1 %cmp5, label %for.body.preheader, label %for.end 487 488for.body.preheader: ; preds = %entry 489 br label %for.body 490 491for.body: ; preds = %for.body.preheader, %for.body 492 %sum.07 = phi float [ %add, %for.body ], [ 0.000000e+00, %for.body.preheader ] 493 %i.06 = phi i32 [ %inc, %for.body ], [ 500, %for.body.preheader ] 494 %idxprom = zext i32 %i.06 to i64 495 %arrayidx = getelementptr inbounds float, float* %b, i64 %idxprom 496 %temp = load float, float* %arrayidx, align 4 497 %arrayidx2 = getelementptr inbounds float, float* %a, i64 %idxprom 498 %temp1 = load float, float* %arrayidx2, align 4 499 %mul = fmul float %temp, %temp1 500 %add = fadd float %sum.07, %mul 501 %inc = add i32 %i.06, 1 502 %cmp = icmp ult i32 %inc, %m 503 br i1 %cmp, label %for.body, label %for.end.loopexit 504 505for.end.loopexit: ; preds = %for.body 506 br label %for.end 507 508for.end: ; preds = %for.end.loopexit, %entry 509 %sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add, %for.end.loopexit ] 510 ret float %sum.0.lcssa 511} 512 513; Trip count should be widened and LFTR should canonicalize the condition 514define float @wide_trip_count_test3(float* %b, 515; CHECK-LABEL: @wide_trip_count_test3( 516; CHECK-NEXT: entry: 517; CHECK-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[M:%.*]], -10 518; CHECK-NEXT: br i1 [[CMP5]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]] 519; CHECK: for.body.preheader: 520; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = sext i32 [[M]] to i64 521; CHECK-NEXT: br label [[FOR_BODY:%.*]] 522; CHECK: for.body: 523; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ -10, [[FOR_BODY_PREHEADER]] ] 524; CHECK-NEXT: [[SUM_07:%.*]] = phi float [ [[ADD1:%.*]], [[FOR_BODY]] ], [ 0.000000e+00, [[FOR_BODY_PREHEADER]] ] 525; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[INDVARS_IV]], 20 526; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[TMP0]] 527; CHECK-NEXT: [[TEMP:%.*]] = load float, float* [[ARRAYIDX]], align 4 528; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32 529; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 530; CHECK-NEXT: [[MUL:%.*]] = fmul float [[CONV]], [[TEMP]] 531; CHECK-NEXT: [[ADD1]] = fadd float [[SUM_07]], [[MUL]] 532; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1 533; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 534; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]] 535; CHECK: for.end.loopexit: 536; CHECK-NEXT: [[ADD1_LCSSA:%.*]] = phi float [ [[ADD1]], [[FOR_BODY]] ] 537; CHECK-NEXT: br label [[FOR_END]] 538; CHECK: for.end: 539; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[ADD1_LCSSA]], [[FOR_END_LOOPEXIT]] ] 540; CHECK-NEXT: ret float [[SUM_0_LCSSA]] 541; 542 i32 signext %m) local_unnamed_addr #0 { 543entry: 544 %cmp5 = icmp sgt i32 %m, -10 545 br i1 %cmp5, label %for.body.preheader, label %for.end 546 547for.body.preheader: ; preds = %entry 548 br label %for.body 549 550for.body: ; preds = %for.body.preheader, %for.body 551 %sum.07 = phi float [ %add1, %for.body ], [ 0.000000e+00, %for.body.preheader ] 552 %i.06 = phi i32 [ %inc, %for.body ], [ -10, %for.body.preheader ] 553 %add = add nsw i32 %i.06, 20 554 %idxprom = sext i32 %add to i64 555 %arrayidx = getelementptr inbounds float, float* %b, i64 %idxprom 556 %temp = load float, float* %arrayidx, align 4 557 %conv = sitofp i32 %i.06 to float 558 %mul = fmul float %conv, %temp 559 %add1 = fadd float %sum.07, %mul 560 %inc = add nsw i32 %i.06, 1 561 %cmp = icmp slt i32 %inc, %m 562 br i1 %cmp, label %for.body, label %for.end.loopexit 563 564for.end.loopexit: ; preds = %for.body 565 br label %for.end 566 567for.end: ; preds = %for.end.loopexit, %entry 568 %sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add1, %for.end.loopexit ] 569 ret float %sum.0.lcssa 570} 571 572; Trip count should be widened and LFTR should canonicalize the condition 573define float @wide_trip_count_test4(float* %b, 574; CHECK-LABEL: @wide_trip_count_test4( 575; CHECK-NEXT: entry: 576; CHECK-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[M:%.*]], 10 577; CHECK-NEXT: br i1 [[CMP5]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]] 578; CHECK: for.body.preheader: 579; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[M]] to i64 580; CHECK-NEXT: br label [[FOR_BODY:%.*]] 581; CHECK: for.body: 582; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 10, [[FOR_BODY_PREHEADER]] ] 583; CHECK-NEXT: [[SUM_07:%.*]] = phi float [ [[ADD1:%.*]], [[FOR_BODY]] ], [ 0.000000e+00, [[FOR_BODY_PREHEADER]] ] 584; CHECK-NEXT: [[TMP0:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 20 585; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[TMP0]] 586; CHECK-NEXT: [[TEMP:%.*]] = load float, float* [[ARRAYIDX]], align 4 587; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32 588; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 589; CHECK-NEXT: [[MUL:%.*]] = fmul float [[CONV]], [[TEMP]] 590; CHECK-NEXT: [[ADD1]] = fadd float [[SUM_07]], [[MUL]] 591; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 592; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]] 593; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]] 594; CHECK: for.end.loopexit: 595; CHECK-NEXT: [[ADD1_LCSSA:%.*]] = phi float [ [[ADD1]], [[FOR_BODY]] ] 596; CHECK-NEXT: br label [[FOR_END]] 597; CHECK: for.end: 598; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[ADD1_LCSSA]], [[FOR_END_LOOPEXIT]] ] 599; CHECK-NEXT: ret float [[SUM_0_LCSSA]] 600; 601 i32 signext %m) local_unnamed_addr #0 { 602entry: 603 %cmp5 = icmp sgt i32 %m, 10 604 br i1 %cmp5, label %for.body.preheader, label %for.end 605 606for.body.preheader: ; preds = %entry 607 br label %for.body 608 609for.body: ; preds = %for.body.preheader, %for.body 610 %sum.07 = phi float [ %add1, %for.body ], [ 0.000000e+00, %for.body.preheader ] 611 %i.06 = phi i32 [ %inc, %for.body ], [ 10, %for.body.preheader ] 612 %add = add nsw i32 %i.06, 20 613 %idxprom = sext i32 %add to i64 614 %arrayidx = getelementptr inbounds float, float* %b, i64 %idxprom 615 %temp = load float, float* %arrayidx, align 4 616 %conv = sitofp i32 %i.06 to float 617 %mul = fmul float %conv, %temp 618 %add1 = fadd float %sum.07, %mul 619 %inc = add nsw i32 %i.06, 1 620 %cmp = icmp slt i32 %inc, %m 621 br i1 %cmp, label %for.body, label %for.end.loopexit 622 623for.end.loopexit: ; preds = %for.body 624 %add1.lcssa = phi float [ %add1, %for.body ] 625 br label %for.end 626 627for.end: ; preds = %for.end.loopexit, %entry 628 %sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add1.lcssa, %for.end.loopexit ] 629 ret float %sum.0.lcssa 630} 631 632define void @ptr_non_cmp_exit_test() { 633; CHECK-LABEL: @ptr_non_cmp_exit_test( 634; CHECK-NEXT: entry: 635; CHECK-NEXT: br label [[FOR_BODY29:%.*]] 636; CHECK: for.body29: 637; CHECK-NEXT: [[IV:%.*]] = phi i8* [ null, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY29]] ] 638; CHECK-NEXT: [[TMP0:%.*]] = load volatile i8, i8* [[IV]], align 1 639; CHECK-NEXT: [[IV_NEXT]] = getelementptr inbounds i8, i8* [[IV]], i64 1 640; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i8* [[IV]], inttoptr (i64 10 to i8*) 641; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY29]], label [[EXIT:%.*]] 642; CHECK: exit: 643; CHECK-NEXT: ret void 644; 645entry: 646 br label %for.body29 647 648for.body29: 649 %iv = phi i8* [ null, %entry ], [ %iv.next, %for.body29 ] 650 load volatile i8, i8* %iv, align 1 651 %iv.next = getelementptr inbounds i8, i8* %iv, i64 1 652 %cmp = icmp ne i8* %iv.next, inttoptr (i64 11 to i8*) 653 %and = and i1 %cmp, %cmp 654 br i1 %and, label %for.body29, label %exit 655 656exit: 657 ret void 658} 659 660define void @PR49993() { 661; CHECK-LABEL: @PR49993( 662; CHECK-NEXT: entry: 663; CHECK-NEXT: br label [[IF_END:%.*]] 664; CHECK: d: 665; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[ADD:%.*]], [[D:%.*]] ], [ [[REM10:%.*]], [[IF_END]] ] 666; CHECK-NEXT: [[ADD]] = add nsw i32 [[PHI]], 1 667; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[PHI]], 3 668; CHECK-NEXT: br i1 [[CMP]], label [[D]], label [[IF_END_LOOPEXIT:%.*]] 669; CHECK: if.end.loopexit: 670; CHECK-NEXT: br label [[IF_END]] 671; CHECK: if.end: 672; CHECK-NEXT: [[REM1:%.*]] = urem i32 undef, undef 673; CHECK-NEXT: [[REM2:%.*]] = urem i32 [[REM1]], undef 674; CHECK-NEXT: [[REM3:%.*]] = urem i32 [[REM2]], undef 675; CHECK-NEXT: [[REM4:%.*]] = urem i32 [[REM3]], undef 676; CHECK-NEXT: [[REM5:%.*]] = urem i32 [[REM4]], undef 677; CHECK-NEXT: [[REM6:%.*]] = urem i32 [[REM5]], undef 678; CHECK-NEXT: [[REM7:%.*]] = urem i32 [[REM6]], undef 679; CHECK-NEXT: [[REM8:%.*]] = urem i32 [[REM7]], undef 680; CHECK-NEXT: [[REM9:%.*]] = urem i32 [[REM8]], undef 681; CHECK-NEXT: [[REM10]] = urem i32 [[REM9]], undef 682; CHECK-NEXT: br label [[D]] 683; 684entry: 685 br label %if.end 686 687d: 688 %phi = phi i32 [ %add, %d ], [ %rem10, %if.end ] 689 %add = add nsw i32 %phi, 1 690 %cmp = icmp slt i32 %phi, 3 691 br i1 %cmp, label %d, label %if.end 692 693if.end: 694 %rem1 = urem i32 undef, undef 695 %rem2 = urem i32 %rem1, undef 696 %rem3 = urem i32 %rem2, undef 697 %rem4 = urem i32 %rem3, undef 698 %rem5 = urem i32 %rem4, undef 699 %rem6 = urem i32 %rem5, undef 700 %rem7 = urem i32 %rem6, undef 701 %rem8 = urem i32 %rem7, undef 702 %rem9 = urem i32 %rem8, undef 703 %rem10 = urem i32 %rem9, undef 704 br label %d 705} 706 707declare i32 @llvm.loop.decrement.reg.i32(i32, i32) 708 709