1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3 3# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM4 4# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m5 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM5 5 6fdiv h0, h1, h2 7fdiv s1, s2, s3 8fdiv d2, d3, d4 9 10fmul h3, h4, h5 11fmul s4, s5, s6 12fmul d5, d6, d7 13 14fmadd h6, h7, h8, h9 15fmadd s7, s8, s9, s10 16fmadd d8, d9, d10, d11 17 18fsqrt h9, h10 19fsqrt s10, s11 20fsqrt d11, d12 21 22# ALL: Iterations: 100 23 24# EM3-NEXT: Instructions: 800 25# EM3-NEXT: Total Cycles: 4503 26# EM3-NEXT: Total uOps: 800 27 28# EM4-NEXT: Instructions: 1200 29# EM4-NEXT: Total Cycles: 575 30# EM4-NEXT: Total uOps: 1200 31 32# EM5-NEXT: Instructions: 1200 33# EM5-NEXT: Total Cycles: 433 34# EM5-NEXT: Total uOps: 1200 35 36# ALL: Dispatch Width: 6 37 38# EM3-NEXT: uOps Per Cycle: 0.18 39# EM3-NEXT: IPC: 0.18 40# EM3-NEXT: Block RThroughput: 45.0 41 42# EM4-NEXT: uOps Per Cycle: 2.09 43# EM4-NEXT: IPC: 2.09 44# EM4-NEXT: Block RThroughput: 4.0 45 46# EM5-NEXT: uOps Per Cycle: 2.77 47# EM5-NEXT: IPC: 2.77 48# EM5-NEXT: Block RThroughput: 4.0 49 50# ALL: Instruction Info: 51# ALL-NEXT: [1]: #uOps 52# ALL-NEXT: [2]: Latency 53# ALL-NEXT: [3]: RThroughput 54# ALL-NEXT: [4]: MayLoad 55# ALL-NEXT: [5]: MayStore 56# ALL-NEXT: [6]: HasSideEffects (U) 57 58# EM3: [1] [2] [3] [4] [5] [6] Instructions: 59# EM3-NEXT: 1 7 2.00 fdiv s1, s2, s3 60# EM3-NEXT: 1 12 3.25 fdiv d2, d3, d4 61# EM3-NEXT: 1 3 0.33 fmul s4, s5, s6 62# EM3-NEXT: 1 3 0.33 fmul d5, d6, d7 63# EM3-NEXT: 1 4 0.33 fmadd s7, s8, s9, s10 64# EM3-NEXT: 1 4 0.33 fmadd d8, d9, d10, d11 65# EM3-NEXT: 1 18 19.00 fsqrt s10, s11 66# EM3-NEXT: 1 25 26.00 fsqrt d11, d12 67 68# EM4: [1] [2] [3] [4] [5] [6] Instructions: 69# EM4-NEXT: 1 7 3.00 fdiv h0, h1, h2 70# EM4-NEXT: 1 7 1.50 fdiv s1, s2, s3 71# EM4-NEXT: 1 12 2.25 fdiv d2, d3, d4 72# EM4-NEXT: 1 3 0.50 fmul h3, h4, h5 73# EM4-NEXT: 1 3 0.33 fmul s4, s5, s6 74# EM4-NEXT: 1 3 0.33 fmul d5, d6, d7 75# EM4-NEXT: 1 4 0.50 fmadd h6, h7, h8, h9 76# EM4-NEXT: 1 4 0.33 fmadd s7, s8, s9, s10 77# EM4-NEXT: 1 4 0.33 fmadd d8, d9, d10, d11 78# EM4-NEXT: 1 7 3.00 fsqrt h9, h10 79# EM4-NEXT: 1 8 1.75 fsqrt s10, s11 80# EM4-NEXT: 1 12 2.25 fsqrt d11, d12 81 82# EM5: [1] [2] [3] [4] [5] [6] Instructions: 83# EM5-NEXT: 1 5 0.50 fdiv h0, h1, h2 84# EM5-NEXT: 1 7 1.00 fdiv s1, s2, s3 85# EM5-NEXT: 1 12 2.25 fdiv d2, d3, d4 86# EM5-NEXT: 1 3 0.33 fmul h3, h4, h5 87# EM5-NEXT: 1 3 0.33 fmul s4, s5, s6 88# EM5-NEXT: 1 3 0.33 fmul d5, d6, d7 89# EM5-NEXT: 1 4 0.33 fmadd h6, h7, h8, h9 90# EM5-NEXT: 1 4 0.33 fmadd s7, s8, s9, s10 91# EM5-NEXT: 1 4 0.33 fmadd d8, d9, d10, d11 92# EM5-NEXT: 1 5 0.50 fsqrt h9, h10 93# EM5-NEXT: 1 8 1.25 fsqrt s10, s11 94# EM5-NEXT: 1 12 2.25 fsqrt d11, d12 95