1//===- PPCInstrQPX.td - The PowerPC QPX Extension --*- tablegen -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file describes the QPX extension to the PowerPC instruction set.
11// Reference:
12// Book Q: QPX Architecture Definition. IBM (as updated in) 2011.
13//
14//===----------------------------------------------------------------------===//
15
16def PPCRegQFRCAsmOperand : AsmOperandClass {
17  let Name = "RegQFRC"; let PredicateMethod = "isRegNumber";
18}
19def qfrc : RegisterOperand<QFRC> {
20  let ParserMatchClass = PPCRegQFRCAsmOperand;
21}
22def PPCRegQSRCAsmOperand : AsmOperandClass {
23  let Name = "RegQSRC"; let PredicateMethod = "isRegNumber";
24}
25def qsrc : RegisterOperand<QSRC> {
26  let ParserMatchClass = PPCRegQSRCAsmOperand;
27}
28def PPCRegQBRCAsmOperand : AsmOperandClass {
29  let Name = "RegQBRC"; let PredicateMethod = "isRegNumber";
30}
31def qbrc : RegisterOperand<QBRC> {
32  let ParserMatchClass = PPCRegQBRCAsmOperand;
33}
34
35//===----------------------------------------------------------------------===//
36// Helpers for defining instructions that directly correspond to intrinsics.
37
38// QPXA1_Int - A AForm_1 intrinsic definition.
39class QPXA1_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
40  : AForm_1<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
41              !strconcat(opc, " $FRT, $FRA, $FRC, $FRB"), IIC_FPFused,
42                       [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
43// QPXA1s_Int - A AForm_1 intrinsic definition (simple instructions).
44class QPXA1s_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
45  : AForm_1<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
46              !strconcat(opc, " $FRT, $FRA, $FRC, $FRB"), IIC_VecPerm,
47                       [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
48// QPXA2_Int - A AForm_2 intrinsic definition.
49class QPXA2_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
50  : AForm_2<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
51              !strconcat(opc, " $FRT, $FRA, $FRB"), IIC_FPGeneral,
52                       [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB))]>;
53// QPXA3_Int - A AForm_3 intrinsic definition.
54class QPXA3_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
55  : AForm_3<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRC),
56              !strconcat(opc, " $FRT, $FRA, $FRC"), IIC_FPGeneral,
57                       [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRC))]>;
58// QPXA4_Int - A AForm_4a intrinsic definition.
59class QPXA4_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
60  : AForm_4a<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRB),
61              !strconcat(opc, " $FRT, $FRB"), IIC_FPGeneral,
62                       [(set v4f64:$FRT, (IntID v4f64:$FRB))]>;
63// QPXX18_Int - A XForm_18 intrinsic definition.
64class QPXX18_Int<bits<6> opcode, bits<10> xo, string opc, Intrinsic IntID>
65  : XForm_18<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
66              !strconcat(opc, " $FRT, $FRA, $FRB"), IIC_FPCompare,
67                       [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB))]>;
68// QPXX19_Int - A XForm_19 intrinsic definition.
69class QPXX19_Int<bits<6> opcode, bits<10> xo, string opc, Intrinsic IntID>
70  : XForm_19<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRB),
71              !strconcat(opc, " $FRT, $FRB"), IIC_FPGeneral,
72                       [(set v4f64:$FRT, (IntID v4f64:$FRB))]>;
73
74//===----------------------------------------------------------------------===//
75// Pattern Frags.
76
77def extloadv4f32 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
78  return cast<LoadSDNode>(N)->getMemoryVT() == MVT::v4f32;
79}]>;
80
81def truncstorev4f32 : PatFrag<(ops node:$val, node:$ptr),
82                            (truncstore node:$val, node:$ptr), [{
83  return cast<StoreSDNode>(N)->getMemoryVT() == MVT::v4f32;
84}]>;
85def pre_truncstv4f32 : PatFrag<(ops node:$val, node:$base, node:$offset),
86                               (pre_truncst node:$val,
87                                            node:$base, node:$offset), [{
88  return cast<StoreSDNode>(N)->getMemoryVT() == MVT::v4f32;
89}]>;
90
91def fround_inexact : PatFrag<(ops node:$val), (fpround node:$val), [{
92  return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() == 0;
93}]>;
94
95def fround_exact : PatFrag<(ops node:$val), (fpround node:$val), [{
96  return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() == 1;
97}]>;
98
99let FastIselShouldIgnore = 1 in // FastIsel should ignore all u12 instrs.
100  def u12 : ImmLeaf<i32, [{ return (Imm & 0xFFF) == Imm; }]>;
101
102//===----------------------------------------------------------------------===//
103// Instruction Definitions.
104
105def HasQPX : Predicate<"PPCSubTarget->hasQPX()">;
106let Predicates = [HasQPX] in {
107let DecoderNamespace = "QPX" in {
108let hasSideEffects = 0 in { // QPX instructions don't have side effects.
109let Uses = [RM] in {
110  // Add Instructions
111  let isCommutable = 1 in {
112    def QVFADD : AForm_2<4, 21,
113                        (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
114                        "qvfadd $FRT, $FRA, $FRB", IIC_FPGeneral,
115                        [(set v4f64:$FRT, (fadd v4f64:$FRA, v4f64:$FRB))]>;
116    let isCodeGenOnly = 1 in
117      def QVFADDS : QPXA2_Int<0, 21, "qvfadds", int_ppc_qpx_qvfadds>;
118    def QVFADDSs : AForm_2<0, 21,
119                          (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
120                          "qvfadds $FRT, $FRA, $FRB", IIC_FPGeneral,
121                          [(set v4f32:$FRT, (fadd v4f32:$FRA, v4f32:$FRB))]>;
122  }
123  def QVFSUB : AForm_2<4, 20,
124                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
125                      "qvfsub $FRT, $FRA, $FRB", IIC_FPGeneral,
126                      [(set v4f64:$FRT, (fsub v4f64:$FRA, v4f64:$FRB))]>;
127  let isCodeGenOnly = 1 in
128    def QVFSUBS : QPXA2_Int<0, 20, "qvfsubs", int_ppc_qpx_qvfsubs>;
129  def QVFSUBSs : AForm_2<0, 20,
130                        (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
131                        "qvfsubs $FRT, $FRA, $FRB", IIC_FPGeneral,
132                        [(set v4f32:$FRT, (fsub v4f32:$FRA, v4f32:$FRB))]>;
133
134  // Estimate Instructions
135  def QVFRE : AForm_4a<4, 24, (outs qfrc:$FRT), (ins qfrc:$FRB),
136                       "qvfre $FRT, $FRB", IIC_FPGeneral,
137                       [(set v4f64:$FRT, (PPCfre v4f64:$FRB))]>;
138  def QVFRES : QPXA4_Int<0, 24, "qvfres", int_ppc_qpx_qvfres>;
139  let isCodeGenOnly = 1 in
140  def QVFRESs : AForm_4a<0, 24, (outs qsrc:$FRT), (ins qsrc:$FRB),
141                         "qvfres $FRT, $FRB", IIC_FPGeneral,
142                         [(set v4f32:$FRT, (PPCfre v4f32:$FRB))]>;
143
144  def QVFRSQRTE : AForm_4a<4, 26, (outs qfrc:$FRT), (ins qfrc:$FRB),
145                           "qvfrsqrte $FRT, $FRB", IIC_FPGeneral,
146                           [(set v4f64:$FRT, (PPCfrsqrte v4f64:$FRB))]>;
147  def QVFRSQRTES : QPXA4_Int<0, 26, "qvfrsqrtes", int_ppc_qpx_qvfrsqrtes>;
148  let isCodeGenOnly = 1 in
149  def QVFRSQRTESs : AForm_4a<0, 26, (outs qsrc:$FRT), (ins qsrc:$FRB),
150                             "qvfrsqrtes $FRT, $FRB", IIC_FPGeneral,
151                             [(set v4f32:$FRT, (PPCfrsqrte v4f32:$FRB))]>;
152
153  // Multiply Instructions
154  let isCommutable = 1 in {
155    def QVFMUL : AForm_3<4, 25,
156                        (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRC),
157                        "qvfmul $FRT, $FRA, $FRC", IIC_FPGeneral,
158                        [(set v4f64:$FRT, (fmul v4f64:$FRA, v4f64:$FRC))]>;
159    let isCodeGenOnly = 1 in
160      def QVFMULS : QPXA3_Int<0, 25, "qvfmuls", int_ppc_qpx_qvfmuls>;
161    def QVFMULSs : AForm_3<0, 25,
162                          (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRC),
163                          "qvfmuls $FRT, $FRA, $FRC", IIC_FPGeneral,
164                          [(set v4f32:$FRT, (fmul v4f32:$FRA, v4f32:$FRC))]>;
165  }
166  def QVFXMUL : QPXA3_Int<4, 17, "qvfxmul", int_ppc_qpx_qvfxmul>;
167  def QVFXMULS : QPXA3_Int<0, 17, "qvfxmuls", int_ppc_qpx_qvfxmuls>;
168
169  // Multiply-add instructions
170  def QVFMADD : AForm_1<4, 29,
171                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
172                      "qvfmadd $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
173                      [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>;
174  let isCodeGenOnly = 1 in
175    def QVFMADDS : QPXA1_Int<0, 29, "qvfmadds", int_ppc_qpx_qvfmadds>;
176  def QVFMADDSs : AForm_1<0, 29,
177                        (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qsrc:$FRC),
178                        "qvfmadds $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
179                        [(set v4f32:$FRT, (fma v4f32:$FRA, v4f32:$FRC, v4f32:$FRB))]>;
180  def QVFNMADD : AForm_1<4, 31,
181                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
182                      "qvfnmadd $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
183                      [(set v4f64:$FRT, (fneg (fma v4f64:$FRA, v4f64:$FRC,
184                                                   v4f64:$FRB)))]>;
185  let isCodeGenOnly = 1 in
186    def QVFNMADDS : QPXA1_Int<0, 31, "qvfnmadds", int_ppc_qpx_qvfnmadds>;
187  def QVFNMADDSs : AForm_1<0, 31,
188                        (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qsrc:$FRC),
189                        "qvfnmadds $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
190                        [(set v4f32:$FRT, (fneg (fma v4f32:$FRA, v4f32:$FRC,
191                                                     v4f32:$FRB)))]>;
192  def QVFMSUB : AForm_1<4, 28,
193                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
194                      "qvfmsub $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
195                      [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC,
196                                             (fneg v4f64:$FRB)))]>;
197  let isCodeGenOnly = 1 in
198    def QVFMSUBS : QPXA1_Int<0, 28, "qvfmsubs", int_ppc_qpx_qvfmsubs>;
199  def QVFMSUBSs : AForm_1<0, 28,
200                      (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qsrc:$FRC),
201                      "qvfmsubs $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
202                      [(set v4f32:$FRT, (fma v4f32:$FRA, v4f32:$FRC,
203                                             (fneg v4f32:$FRB)))]>;
204  def QVFNMSUB : AForm_1<4, 30,
205                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
206                      "qvfnmsub $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
207                      [(set v4f64:$FRT, (fneg (fma v4f64:$FRA, v4f64:$FRC,
208                                              (fneg v4f64:$FRB))))]>;
209  let isCodeGenOnly = 1 in
210    def QVFNMSUBS : QPXA1_Int<0, 30, "qvfnmsubs", int_ppc_qpx_qvfnmsubs>;
211  def QVFNMSUBSs : AForm_1<0, 30,
212                      (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qsrc:$FRC),
213                      "qvfnmsubs $FRT, $FRA, $FRC, $FRB", IIC_FPFused,
214                      [(set v4f32:$FRT, (fneg (fma v4f32:$FRA, v4f32:$FRC,
215                                              (fneg v4f32:$FRB))))]>;
216  def QVFXMADD : QPXA1_Int<4, 9, "qvfxmadd", int_ppc_qpx_qvfxmadd>;
217  def QVFXMADDS : QPXA1_Int<0, 9, "qvfxmadds", int_ppc_qpx_qvfxmadds>;
218  def QVFXXNPMADD : QPXA1_Int<4, 11, "qvfxxnpmadd", int_ppc_qpx_qvfxxnpmadd>;
219  def QVFXXNPMADDS : QPXA1_Int<0, 11, "qvfxxnpmadds", int_ppc_qpx_qvfxxnpmadds>;
220  def QVFXXCPNMADD : QPXA1_Int<4, 3, "qvfxxcpnmadd", int_ppc_qpx_qvfxxcpnmadd>;
221  def QVFXXCPNMADDS : QPXA1_Int<0, 3, "qvfxxcpnmadds", int_ppc_qpx_qvfxxcpnmadds>;
222  def QVFXXMADD : QPXA1_Int<4, 1, "qvfxxmadd", int_ppc_qpx_qvfxxmadd>;
223  def QVFXXMADDS : QPXA1_Int<0, 1, "qvfxxmadds", int_ppc_qpx_qvfxxmadds>;
224
225  // Select Instruction
226  let isCodeGenOnly = 1 in
227    def QVFSEL : QPXA1s_Int<4, 23, "qvfsel", int_ppc_qpx_qvfsel>;
228  def QVFSELb : AForm_1<4, 23, (outs qfrc:$FRT),
229                        (ins qbrc:$FRA, qfrc:$FRB, qfrc:$FRC),
230                        "qvfsel $FRT, $FRA, $FRC, $FRB", IIC_VecPerm,
231                        [(set v4f64:$FRT, (vselect v4i1:$FRA,
232                                                   v4f64:$FRC, v4f64:$FRB))]>;
233  let isCodeGenOnly = 1 in
234  def QVFSELbs : AForm_1<4, 23, (outs qsrc:$FRT),
235                        (ins qbrc:$FRA, qsrc:$FRB, qsrc:$FRC),
236                        "qvfsel $FRT, $FRA, $FRC, $FRB", IIC_VecPerm,
237                        [(set v4f32:$FRT, (vselect v4i1:$FRA,
238                                                   v4f32:$FRC, v4f32:$FRB))]>;
239  let isCodeGenOnly = 1 in
240  def QVFSELbb: AForm_1<4, 23, (outs qbrc:$FRT),
241                        (ins qbrc:$FRA, qbrc:$FRB, qbrc:$FRC),
242                        "qvfsel $FRT, $FRA, $FRC, $FRB", IIC_VecPerm,
243                        [(set v4i1:$FRT, (vselect v4i1:$FRA,
244                                                  v4i1:$FRC, v4i1:$FRB))]>;
245
246  // SELECT_CC_* - Used to implement the SELECT_CC DAG operation.  Expanded after
247  // instruction selection into a branch sequence.
248  def SELECT_CC_QFRC: PPCCustomInserterPseudo<(outs qfrc:$dst), (ins crrc:$cond, qfrc:$T, qfrc:$F,
249                              i32imm:$BROPC), "#SELECT_CC_QFRC",
250                              []>;
251  def SELECT_CC_QSRC: PPCCustomInserterPseudo<(outs qsrc:$dst), (ins crrc:$cond, qsrc:$T, qsrc:$F,
252                              i32imm:$BROPC), "#SELECT_CC_QSRC",
253                              []>;
254  def SELECT_CC_QBRC: PPCCustomInserterPseudo<(outs qbrc:$dst), (ins crrc:$cond, qbrc:$T, qbrc:$F,
255                              i32imm:$BROPC), "#SELECT_CC_QBRC",
256                              []>;
257
258  // SELECT_* pseudo instructions, like SELECT_CC_* but taking condition
259  // register bit directly.
260  def SELECT_QFRC: PPCCustomInserterPseudo<(outs qfrc:$dst), (ins crbitrc:$cond,
261                          qfrc:$T, qfrc:$F), "#SELECT_QFRC",
262                          [(set v4f64:$dst,
263                                (select i1:$cond, v4f64:$T, v4f64:$F))]>;
264  def SELECT_QSRC: PPCCustomInserterPseudo<(outs qsrc:$dst), (ins crbitrc:$cond,
265                          qsrc:$T, qsrc:$F), "#SELECT_QSRC",
266                          [(set v4f32:$dst,
267                                (select i1:$cond, v4f32:$T, v4f32:$F))]>;
268  def SELECT_QBRC: PPCCustomInserterPseudo<(outs qbrc:$dst), (ins crbitrc:$cond,
269                          qbrc:$T, qbrc:$F), "#SELECT_QBRC",
270                          [(set v4i1:$dst,
271                                (select i1:$cond, v4i1:$T, v4i1:$F))]>;
272
273  // Convert and Round Instructions
274  def QVFCTID : QPXX19_Int<4, 814, "qvfctid", int_ppc_qpx_qvfctid>;
275  let isCodeGenOnly = 1 in
276    def QVFCTIDb : XForm_19<4, 814, (outs qbrc:$FRT), (ins qbrc:$FRB),
277                            "qvfctid $FRT, $FRB", IIC_FPGeneral, []>;
278
279  def QVFCTIDU : QPXX19_Int<4, 942, "qvfctidu", int_ppc_qpx_qvfctidu>;
280  def QVFCTIDZ : QPXX19_Int<4, 815, "qvfctidz", int_ppc_qpx_qvfctidz>;
281  def QVFCTIDUZ : QPXX19_Int<4, 943, "qvfctiduz", int_ppc_qpx_qvfctiduz>;
282  def QVFCTIW : QPXX19_Int<4, 14, "qvfctiw", int_ppc_qpx_qvfctiw>;
283  def QVFCTIWU : QPXX19_Int<4, 142, "qvfctiwu", int_ppc_qpx_qvfctiwu>;
284  def QVFCTIWZ : QPXX19_Int<4, 15, "qvfctiwz", int_ppc_qpx_qvfctiwz>;
285  def QVFCTIWUZ : QPXX19_Int<4, 143, "qvfctiwuz", int_ppc_qpx_qvfctiwuz>;
286  def QVFCFID : QPXX19_Int<4, 846, "qvfcfid", int_ppc_qpx_qvfcfid>;
287  let isCodeGenOnly = 1 in
288    def QVFCFIDb : XForm_19<4, 846, (outs qbrc:$FRT), (ins qbrc:$FRB),
289                            "qvfcfid $FRT, $FRB", IIC_FPGeneral, []>;
290
291  def QVFCFIDU : QPXX19_Int<4, 974, "qvfcfidu", int_ppc_qpx_qvfcfidu>;
292  def QVFCFIDS : QPXX19_Int<0, 846, "qvfcfids", int_ppc_qpx_qvfcfids>;
293  def QVFCFIDUS : QPXX19_Int<0, 974, "qvfcfidus", int_ppc_qpx_qvfcfidus>;
294
295  let isCodeGenOnly = 1 in
296    def QVFRSP : QPXX19_Int<4, 12, "qvfrsp", int_ppc_qpx_qvfrsp>;
297  def QVFRSPs : XForm_19<4, 12,
298                      (outs qsrc:$FRT), (ins qfrc:$FRB),
299                      "qvfrsp $FRT, $FRB", IIC_FPGeneral,
300                      [(set v4f32:$FRT, (fround_inexact v4f64:$FRB))]>;
301
302  def QVFRIZ : XForm_19<4, 424, (outs qfrc:$FRT), (ins qfrc:$FRB),
303                        "qvfriz $FRT, $FRB", IIC_FPGeneral,
304                        [(set v4f64:$FRT, (ftrunc v4f64:$FRB))]>;
305  let isCodeGenOnly = 1 in
306    def QVFRIZs : XForm_19<4, 424, (outs qsrc:$FRT), (ins qsrc:$FRB),
307                           "qvfriz $FRT, $FRB", IIC_FPGeneral,
308                           [(set v4f32:$FRT, (ftrunc v4f32:$FRB))]>;
309
310  def QVFRIN : XForm_19<4, 392, (outs qfrc:$FRT), (ins qfrc:$FRB),
311                        "qvfrin $FRT, $FRB", IIC_FPGeneral,
312                        [(set v4f64:$FRT, (fround v4f64:$FRB))]>;
313  let isCodeGenOnly = 1 in
314    def QVFRINs : XForm_19<4, 392, (outs qsrc:$FRT), (ins qsrc:$FRB),
315                           "qvfrin $FRT, $FRB", IIC_FPGeneral,
316                           [(set v4f32:$FRT, (fround v4f32:$FRB))]>;
317
318  def QVFRIP : XForm_19<4, 456, (outs qfrc:$FRT), (ins qfrc:$FRB),
319                        "qvfrip $FRT, $FRB", IIC_FPGeneral,
320                        [(set v4f64:$FRT, (fceil v4f64:$FRB))]>;
321  let isCodeGenOnly = 1 in
322    def QVFRIPs : XForm_19<4, 456, (outs qsrc:$FRT), (ins qsrc:$FRB),
323                           "qvfrip $FRT, $FRB", IIC_FPGeneral,
324                           [(set v4f32:$FRT, (fceil v4f32:$FRB))]>;
325
326  def QVFRIM : XForm_19<4, 488, (outs qfrc:$FRT), (ins qfrc:$FRB),
327                        "qvfrim $FRT, $FRB", IIC_FPGeneral,
328                        [(set v4f64:$FRT, (ffloor v4f64:$FRB))]>;
329  let isCodeGenOnly = 1 in
330    def QVFRIMs : XForm_19<4, 488, (outs qsrc:$FRT), (ins qsrc:$FRB),
331                           "qvfrim $FRT, $FRB", IIC_FPGeneral,
332                           [(set v4f32:$FRT, (ffloor v4f32:$FRB))]>;
333
334  // Move Instructions
335  def QVFMR : XForm_19<4, 72,
336                      (outs qfrc:$FRT), (ins qfrc:$FRB),
337                      "qvfmr $FRT, $FRB", IIC_VecPerm,
338                      [/* (set v4f64:$FRT, v4f64:$FRB) */]>;
339  let isCodeGenOnly = 1 in {
340    def QVFMRs : XForm_19<4, 72,
341                         (outs qsrc:$FRT), (ins qsrc:$FRB),
342                         "qvfmr $FRT, $FRB", IIC_VecPerm,
343                         [/* (set v4f32:$FRT, v4f32:$FRB) */]>;
344    def QVFMRb : XForm_19<4, 72,
345                         (outs qbrc:$FRT), (ins qbrc:$FRB),
346                         "qvfmr $FRT, $FRB", IIC_VecPerm,
347                         [/* (set v4i1:$FRT, v4i1:$FRB) */]>;
348  }
349  def QVFNEG : XForm_19<4, 40,
350                      (outs qfrc:$FRT), (ins qfrc:$FRB),
351                      "qvfneg $FRT, $FRB", IIC_VecPerm,
352                      [(set v4f64:$FRT, (fneg v4f64:$FRB))]>;
353  let isCodeGenOnly = 1 in
354    def QVFNEGs : XForm_19<4, 40,
355                         (outs qsrc:$FRT), (ins qsrc:$FRB),
356                         "qvfneg $FRT, $FRB", IIC_VecPerm,
357                         [(set v4f32:$FRT, (fneg v4f32:$FRB))]>;
358  def QVFABS : XForm_19<4, 264,
359                      (outs qfrc:$FRT), (ins qfrc:$FRB),
360                      "qvfabs $FRT, $FRB", IIC_VecPerm,
361                      [(set v4f64:$FRT, (fabs v4f64:$FRB))]>;
362  let isCodeGenOnly = 1 in
363    def QVFABSs : XForm_19<4, 264,
364                         (outs qsrc:$FRT), (ins qsrc:$FRB),
365                         "qvfabs $FRT, $FRB", IIC_VecPerm,
366                         [(set v4f32:$FRT, (fabs v4f32:$FRB))]>;
367  def QVFNABS : XForm_19<4, 136,
368                      (outs qfrc:$FRT), (ins qfrc:$FRB),
369                      "qvfnabs $FRT, $FRB", IIC_VecPerm,
370                      [(set v4f64:$FRT, (fneg (fabs v4f64:$FRB)))]>;
371  let isCodeGenOnly = 1 in
372    def QVFNABSs : XForm_19<4, 136,
373                         (outs qsrc:$FRT), (ins qsrc:$FRB),
374                         "qvfnabs $FRT, $FRB", IIC_VecPerm,
375                         [(set v4f32:$FRT, (fneg (fabs v4f32:$FRB)))]>;
376  def QVFCPSGN : XForm_18<4, 8,
377                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
378                      "qvfcpsgn $FRT, $FRA, $FRB", IIC_VecPerm,
379                      [(set v4f64:$FRT, (fcopysign v4f64:$FRB, v4f64:$FRA))]>;
380  let isCodeGenOnly = 1 in
381    def QVFCPSGNs : XForm_18<4, 8,
382                         (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
383                         "qvfcpsgn $FRT, $FRA, $FRB", IIC_VecPerm,
384                         [(set v4f32:$FRT, (fcopysign v4f32:$FRB, v4f32:$FRA))]>;
385
386  def QVALIGNI : Z23Form_1<4, 5,
387                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, u2imm:$idx),
388                      "qvaligni $FRT, $FRA, $FRB, $idx", IIC_VecPerm,
389                      [(set v4f64:$FRT,
390                            (PPCqvaligni v4f64:$FRA, v4f64:$FRB,
391                                         (i32 imm:$idx)))]>;
392  let isCodeGenOnly = 1 in
393     def QVALIGNIs : Z23Form_1<4, 5,
394                         (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, u2imm:$idx),
395                         "qvaligni $FRT, $FRA, $FRB, $idx", IIC_VecPerm,
396                         [(set v4f32:$FRT,
397                               (PPCqvaligni v4f32:$FRA, v4f32:$FRB,
398                                            (i32 imm:$idx)))]>;
399  let isCodeGenOnly = 1 in
400     def QVALIGNIb : Z23Form_1<4, 5,
401                         (outs qbrc:$FRT), (ins qbrc:$FRA, qbrc:$FRB, u2imm:$idx),
402                         "qvaligni $FRT, $FRA, $FRB, $idx", IIC_VecPerm,
403                         [(set v4i1:$FRT,
404                               (PPCqvaligni v4i1:$FRA, v4i1:$FRB,
405                                            (i32 imm:$idx)))]>;
406
407  def QVESPLATI : Z23Form_2<4, 37,
408                      (outs qfrc:$FRT), (ins qfrc:$FRA, u2imm:$idx),
409                      "qvesplati $FRT, $FRA, $idx", IIC_VecPerm,
410                      [(set v4f64:$FRT,
411                            (PPCqvesplati v4f64:$FRA, (i32 imm:$idx)))]>;
412  let isCodeGenOnly = 1 in
413     def QVESPLATIs : Z23Form_2<4, 37,
414                         (outs qsrc:$FRT), (ins qsrc:$FRA, u2imm:$idx),
415                         "qvesplati $FRT, $FRA, $idx", IIC_VecPerm,
416                         [(set v4f32:$FRT,
417                               (PPCqvesplati v4f32:$FRA, (i32 imm:$idx)))]>;
418  let isCodeGenOnly = 1 in
419     def QVESPLATIb : Z23Form_2<4, 37,
420                         (outs qbrc:$FRT), (ins qbrc:$FRA, u2imm:$idx),
421                         "qvesplati $FRT, $FRA, $idx", IIC_VecPerm,
422                         [(set v4i1:$FRT,
423                               (PPCqvesplati v4i1:$FRA, (i32 imm:$idx)))]>;
424
425  def QVFPERM : AForm_1<4, 6,
426                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
427                      "qvfperm $FRT, $FRA, $FRB, $FRC", IIC_VecPerm,
428                      [(set v4f64:$FRT,
429                            (PPCqvfperm v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
430  let isCodeGenOnly = 1 in
431     def QVFPERMs : AForm_1<4, 6,
432                         (outs qsrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB, qfrc:$FRC),
433                         "qvfperm $FRT, $FRA, $FRB, $FRC", IIC_VecPerm,
434                         [(set v4f32:$FRT,
435                               (PPCqvfperm v4f32:$FRA, v4f32:$FRB, v4f64:$FRC))]>;
436
437  let isReMaterializable = 1, isAsCheapAsAMove = 1 in
438  def QVGPCI : Z23Form_3<4, 133,
439                      (outs qfrc:$FRT), (ins u12imm:$idx),
440                      "qvgpci $FRT, $idx", IIC_VecPerm,
441                      [(set v4f64:$FRT, (PPCqvgpci (u12:$idx)))]>;
442
443  // Compare Instruction
444  let isCodeGenOnly = 1 in
445    def QVFTSTNAN : QPXX18_Int<4, 64, "qvftstnan", int_ppc_qpx_qvftstnan>;
446  def QVFTSTNANb : XForm_18<4, 64, (outs qbrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
447                           "qvftstnan $FRT, $FRA, $FRB", IIC_FPCompare,
448                           [(set v4i1:$FRT,
449                                 (setcc v4f64:$FRA, v4f64:$FRB, SETUO))]>;
450  let isCodeGenOnly = 1 in
451  def QVFTSTNANbs : XForm_18<4, 64, (outs qbrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
452                            "qvftstnan $FRT, $FRA, $FRB", IIC_FPCompare,
453                            [(set v4i1:$FRT,
454                                  (setcc v4f32:$FRA, v4f32:$FRB, SETUO))]>;
455  let isCodeGenOnly = 1 in
456    def QVFCMPLT : QPXX18_Int<4, 96, "qvfcmplt", int_ppc_qpx_qvfcmplt>;
457  def QVFCMPLTb : XForm_18<4, 96, (outs qbrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
458                           "qvfcmplt $FRT, $FRA, $FRB", IIC_FPCompare,
459                           [(set v4i1:$FRT,
460                                 (setcc v4f64:$FRA, v4f64:$FRB, SETOLT))]>;
461  let isCodeGenOnly = 1 in
462  def QVFCMPLTbs : XForm_18<4, 96, (outs qbrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
463                            "qvfcmplt $FRT, $FRA, $FRB", IIC_FPCompare,
464                            [(set v4i1:$FRT,
465                                  (setcc v4f32:$FRA, v4f32:$FRB, SETOLT))]>;
466  let isCodeGenOnly = 1 in
467    def QVFCMPGT : QPXX18_Int<4, 32, "qvfcmpgt", int_ppc_qpx_qvfcmpgt>;
468  def QVFCMPGTb : XForm_18<4, 32, (outs qbrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
469                           "qvfcmpgt $FRT, $FRA, $FRB", IIC_FPCompare,
470                           [(set v4i1:$FRT,
471                                 (setcc v4f64:$FRA, v4f64:$FRB, SETOGT))]>;
472  let isCodeGenOnly = 1 in
473  def QVFCMPGTbs : XForm_18<4, 32, (outs qbrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
474                            "qvfcmpgt $FRT, $FRA, $FRB", IIC_FPCompare,
475                            [(set v4i1:$FRT,
476                                  (setcc v4f32:$FRA, v4f32:$FRB, SETOGT))]>;
477  let isCodeGenOnly = 1 in
478    def QVFCMPEQ : QPXX18_Int<4, 0, "qvfcmpeq", int_ppc_qpx_qvfcmpeq>;
479  def QVFCMPEQb : XForm_18<4, 0, (outs qbrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
480                           "qvfcmpeq $FRT, $FRA, $FRB", IIC_FPCompare,
481                           [(set v4i1:$FRT,
482                                 (setcc v4f64:$FRA, v4f64:$FRB, SETOEQ))]>;
483  let isCodeGenOnly = 1 in
484  def QVFCMPEQbs : XForm_18<4, 0, (outs qbrc:$FRT), (ins qsrc:$FRA, qsrc:$FRB),
485                            "qvfcmpeq $FRT, $FRA, $FRB", IIC_FPCompare,
486                            [(set v4i1:$FRT,
487                                  (setcc v4f32:$FRA, v4f32:$FRB, SETOEQ))]>;
488
489  let isCodeGenOnly = 1 in
490  def QVFLOGICAL : XForm_20<4, 4,
491                      (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, u12imm:$tttt),
492                      "qvflogical $FRT, $FRA, $FRB, $tttt", IIC_VecPerm, []>;
493  def QVFLOGICALb : XForm_20<4, 4,
494                      (outs qbrc:$FRT), (ins qbrc:$FRA, qbrc:$FRB, u12imm:$tttt),
495                      "qvflogical $FRT, $FRA, $FRB, $tttt", IIC_VecPerm, []>;
496  let isCodeGenOnly = 1 in
497  def QVFLOGICALs : XForm_20<4, 4,
498                      (outs qbrc:$FRT), (ins qbrc:$FRA, qbrc:$FRB, u12imm:$tttt),
499                      "qvflogical $FRT, $FRA, $FRB, $tttt", IIC_VecPerm, []>;
500
501  // Load indexed instructions
502  let mayLoad = 1 in {
503    def QVLFDX : XForm_1_memOp<31, 583,
504                              (outs qfrc:$FRT), (ins memrr:$src),
505                              "qvlfdx $FRT, $src", IIC_LdStLFD,
506                              [(set v4f64:$FRT, (load xoaddr:$src))]>;
507    let isCodeGenOnly = 1 in
508    def QVLFDXb : XForm_1_memOp<31, 583,
509                                (outs qbrc:$FRT), (ins memrr:$src),
510                                "qvlfdx $FRT, $src", IIC_LdStLFD, []>;
511
512    let RC = 1 in
513    def QVLFDXA : XForm_1<31, 583,
514                        (outs qfrc:$FRT), (ins memrr:$src),
515                        "qvlfdxa $FRT, $src", IIC_LdStLFD, []>;
516
517    def QVLFDUX : XForm_1<31, 615,
518                        (outs qfrc:$FRT, ptr_rc_nor0:$ea_result),
519                        (ins memrr:$src),
520                        "qvlfdux $FRT, $src", IIC_LdStLFDU, []>,
521                        RegConstraint<"$src.ptrreg = $ea_result">,
522                        NoEncode<"$ea_result">;
523    let RC = 1 in
524    def QVLFDUXA : XForm_1<31, 615,
525                        (outs qfrc:$FRT), (ins memrr:$src),
526                        "qvlfduxa $FRT, $src", IIC_LdStLFD, []>;
527
528    def QVLFSX : XForm_1_memOp<31, 519,
529                              (outs qfrc:$FRT), (ins memrr:$src),
530                              "qvlfsx $FRT, $src", IIC_LdStLFD,
531                              [(set v4f64:$FRT, (extloadv4f32 xoaddr:$src))]>;
532
533    let isCodeGenOnly = 1 in
534    def QVLFSXb : XForm_1<31, 519,
535                        (outs qbrc:$FRT), (ins memrr:$src),
536                        "qvlfsx $FRT, $src", IIC_LdStLFD,
537                        [(set v4i1:$FRT, (PPCqvlfsb xoaddr:$src))]>;
538    let isCodeGenOnly = 1 in
539    def QVLFSXs : XForm_1_memOp<31, 519,
540                                (outs qsrc:$FRT), (ins memrr:$src),
541                                "qvlfsx $FRT, $src", IIC_LdStLFD,
542                                [(set v4f32:$FRT, (load xoaddr:$src))]>;
543
544    let RC = 1 in
545    def QVLFSXA : XForm_1<31, 519,
546                        (outs qfrc:$FRT), (ins memrr:$src),
547                        "qvlfsxa $FRT, $src", IIC_LdStLFD, []>;
548
549    def QVLFSUX : XForm_1<31, 551,
550                        (outs qsrc:$FRT, ptr_rc_nor0:$ea_result),
551                        (ins memrr:$src),
552                        "qvlfsux $FRT, $src", IIC_LdStLFDU, []>,
553                        RegConstraint<"$src.ptrreg = $ea_result">,
554                        NoEncode<"$ea_result">;
555
556    let RC = 1 in
557    def QVLFSUXA : XForm_1<31, 551,
558                        (outs qfrc:$FRT), (ins memrr:$src),
559                        "qvlfsuxa $FRT, $src", IIC_LdStLFD, []>;
560
561    def QVLFCDX : XForm_1<31, 71,
562                        (outs qfrc:$FRT), (ins memrr:$src),
563                        "qvlfcdx $FRT, $src", IIC_LdStLFD, []>;
564    let RC = 1 in
565    def QVLFCDXA : XForm_1<31, 71,
566                        (outs qfrc:$FRT), (ins memrr:$src),
567                        "qvlfcdxa $FRT, $src", IIC_LdStLFD, []>;
568
569    def QVLFCDUX : XForm_1<31, 103,
570                        (outs qfrc:$FRT), (ins memrr:$src),
571                        "qvlfcdux $FRT, $src", IIC_LdStLFD, []>;
572    let RC = 1 in
573    def QVLFCDUXA : XForm_1<31, 103,
574                        (outs qfrc:$FRT), (ins memrr:$src),
575                        "qvlfcduxa $FRT, $src", IIC_LdStLFD, []>;
576
577    def QVLFCSX : XForm_1<31, 7,
578                        (outs qfrc:$FRT), (ins memrr:$src),
579                        "qvlfcsx $FRT, $src", IIC_LdStLFD, []>;
580    let isCodeGenOnly = 1 in
581    def QVLFCSXs : XForm_1<31, 7,
582                         (outs qsrc:$FRT), (ins memrr:$src),
583                         "qvlfcsx $FRT, $src", IIC_LdStLFD, []>;
584
585    let RC = 1 in
586    def QVLFCSXA : XForm_1<31, 7,
587                        (outs qfrc:$FRT), (ins memrr:$src),
588                        "qvlfcsxa $FRT, $src", IIC_LdStLFD, []>;
589
590    def QVLFCSUX : XForm_1<31, 39,
591                        (outs qfrc:$FRT), (ins memrr:$src),
592                        "qvlfcsux $FRT, $src", IIC_LdStLFD, []>;
593    let RC = 1 in
594    def QVLFCSUXA : XForm_1<31, 39,
595                        (outs qfrc:$FRT), (ins memrr:$src),
596                        "qvlfcsuxa $FRT, $src", IIC_LdStLFD, []>;
597
598    def QVLFIWAX : XForm_1<31, 871,
599                        (outs qfrc:$FRT), (ins memrr:$src),
600                        "qvlfiwax $FRT, $src", IIC_LdStLFD, []>;
601    let RC = 1 in
602    def QVLFIWAXA : XForm_1<31, 871,
603                        (outs qfrc:$FRT), (ins memrr:$src),
604                        "qvlfiwaxa $FRT, $src", IIC_LdStLFD, []>;
605
606    def QVLFIWZX : XForm_1<31, 839,
607                        (outs qfrc:$FRT), (ins memrr:$src),
608                        "qvlfiwzx $FRT, $src", IIC_LdStLFD, []>;
609    let RC = 1 in
610    def QVLFIWZXA : XForm_1<31, 839,
611                        (outs qfrc:$FRT), (ins memrr:$src),
612                        "qvlfiwzxa $FRT, $src", IIC_LdStLFD, []>;
613  }
614
615
616  def QVLPCLDX : XForm_1<31, 582,
617                      (outs qfrc:$FRT), (ins memrr:$src),
618                      "qvlpcldx $FRT, $src", IIC_LdStLFD, []>;
619  def QVLPCLSX : XForm_1<31, 518,
620                      (outs qfrc:$FRT), (ins memrr:$src),
621                      "qvlpclsx $FRT, $src", IIC_LdStLFD, []>;
622  let isCodeGenOnly = 1 in
623    def QVLPCLSXint : XForm_11<31, 518,
624                              (outs qfrc:$FRT), (ins G8RC:$src),
625                              "qvlpclsx $FRT, 0, $src", IIC_LdStLFD, []>;
626  def QVLPCRDX : XForm_1<31, 70,
627                      (outs qfrc:$FRT), (ins memrr:$src),
628                      "qvlpcrdx $FRT, $src", IIC_LdStLFD, []>;
629  def QVLPCRSX : XForm_1<31, 6,
630                      (outs qfrc:$FRT), (ins memrr:$src),
631                      "qvlpcrsx $FRT, $src", IIC_LdStLFD, []>;
632
633  // Store indexed instructions
634  let mayStore = 1 in {
635    def QVSTFDX : XForm_8_memOp<31, 711,
636                        (outs), (ins qfrc:$FRT, memrr:$dst),
637                        "qvstfdx $FRT, $dst", IIC_LdStSTFD,
638                        [(store qfrc:$FRT, xoaddr:$dst)]>;
639    let isCodeGenOnly = 1 in
640    def QVSTFDXb : XForm_8_memOp<31, 711,
641                        (outs), (ins qbrc:$FRT, memrr:$dst),
642                        "qvstfdx $FRT, $dst", IIC_LdStSTFD, []>;
643
644    let RC = 1 in
645    def QVSTFDXA : XForm_8<31, 711,
646                        (outs), (ins qfrc:$FRT, memrr:$dst),
647                        "qvstfdxa $FRT, $dst", IIC_LdStSTFD, []>;
648
649    def QVSTFDUX : XForm_8<31, 743, (outs ptr_rc_nor0:$ea_res),
650                           (ins qfrc:$FRT, memrr:$dst),
651                           "qvstfdux $FRT, $dst", IIC_LdStSTFDU, []>,
652                           RegConstraint<"$dst.ptrreg = $ea_res">,
653                           NoEncode<"$ea_res">;
654
655    let RC = 1 in
656    def QVSTFDUXA : XForm_8<31, 743,
657                        (outs), (ins qfrc:$FRT, memrr:$dst),
658                        "qvstfduxa $FRT, $dst", IIC_LdStSTFD, []>;
659
660    def QVSTFDXI : XForm_8<31, 709,
661                        (outs), (ins qfrc:$FRT, memrr:$dst),
662                        "qvstfdxi $FRT, $dst", IIC_LdStSTFD, []>;
663    let RC = 1 in
664    def QVSTFDXIA : XForm_8<31, 709,
665                        (outs), (ins qfrc:$FRT, memrr:$dst),
666                        "qvstfdxia $FRT, $dst", IIC_LdStSTFD, []>;
667
668    def QVSTFDUXI : XForm_8<31, 741,
669                        (outs), (ins qfrc:$FRT, memrr:$dst),
670                        "qvstfduxi $FRT, $dst", IIC_LdStSTFD, []>;
671    let RC = 1 in
672    def QVSTFDUXIA : XForm_8<31, 741,
673                        (outs), (ins qfrc:$FRT, memrr:$dst),
674                        "qvstfduxia $FRT, $dst", IIC_LdStSTFD, []>;
675
676    def QVSTFSX : XForm_8_memOp<31, 647,
677                        (outs), (ins qfrc:$FRT, memrr:$dst),
678                        "qvstfsx $FRT, $dst", IIC_LdStSTFD,
679                        [(truncstorev4f32 qfrc:$FRT, xoaddr:$dst)]>;
680    let isCodeGenOnly = 1 in
681    def QVSTFSXs : XForm_8_memOp<31, 647,
682                         (outs), (ins qsrc:$FRT, memrr:$dst),
683                         "qvstfsx $FRT, $dst", IIC_LdStSTFD,
684                         [(store qsrc:$FRT, xoaddr:$dst)]>;
685
686    let RC = 1 in
687    def QVSTFSXA : XForm_8<31, 647,
688                        (outs), (ins qfrc:$FRT, memrr:$dst),
689                        "qvstfsxa $FRT, $dst", IIC_LdStSTFD, []>;
690
691    def QVSTFSUX : XForm_8<31, 679, (outs ptr_rc_nor0:$ea_res),
692                           (ins qsrc:$FRT, memrr:$dst),
693                           "qvstfsux $FRT, $dst", IIC_LdStSTFDU, []>,
694                           RegConstraint<"$dst.ptrreg = $ea_res">,
695                           NoEncode<"$ea_res">;
696    let isCodeGenOnly = 1 in
697    def QVSTFSUXs: XForm_8<31, 679, (outs ptr_rc_nor0:$ea_res),
698                           (ins qfrc:$FRT, memrr:$dst),
699                           "qvstfsux $FRT, $dst", IIC_LdStSTFDU, []>,
700                           RegConstraint<"$dst.ptrreg = $ea_res">,
701                           NoEncode<"$ea_res">;
702
703    let RC = 1 in
704    def QVSTFSUXA : XForm_8<31, 679,
705                        (outs), (ins qfrc:$FRT, memrr:$dst),
706                        "qvstfsuxa $FRT, $dst", IIC_LdStSTFD, []>;
707
708    def QVSTFSXI : XForm_8<31, 645,
709                        (outs), (ins qfrc:$FRT, memrr:$dst),
710                        "qvstfsxi $FRT, $dst", IIC_LdStSTFD, []>;
711    let RC = 1 in
712    def QVSTFSXIA : XForm_8<31, 645,
713                        (outs), (ins qfrc:$FRT, memrr:$dst),
714                        "qvstfsxia $FRT, $dst", IIC_LdStSTFD, []>;
715
716    def QVSTFSUXI : XForm_8<31, 677,
717                        (outs), (ins qfrc:$FRT, memrr:$dst),
718                        "qvstfsuxi $FRT, $dst", IIC_LdStSTFD, []>;
719    let RC = 1 in
720    def QVSTFSUXIA : XForm_8<31, 677,
721                        (outs), (ins qfrc:$FRT, memrr:$dst),
722                        "qvstfsuxia $FRT, $dst", IIC_LdStSTFD, []>;
723
724    def QVSTFCDX : XForm_8<31, 199,
725                        (outs), (ins qfrc:$FRT, memrr:$dst),
726                        "qvstfcdx $FRT, $dst", IIC_LdStSTFD, []>;
727    let RC = 1 in
728    def QVSTFCDXA : XForm_8<31, 199,
729                        (outs), (ins qfrc:$FRT, memrr:$dst),
730                        "qvstfcdxa $FRT, $dst", IIC_LdStSTFD, []>;
731
732    def QVSTFCSX : XForm_8<31, 135,
733                        (outs), (ins qfrc:$FRT, memrr:$dst),
734                        "qvstfcsx $FRT, $dst", IIC_LdStSTFD, []>;
735    let isCodeGenOnly = 1 in
736    def QVSTFCSXs : XForm_8<31, 135,
737                         (outs), (ins qsrc:$FRT, memrr:$dst),
738                         "qvstfcsx $FRT, $dst", IIC_LdStSTFD, []>;
739
740    let RC = 1 in
741    def QVSTFCSXA : XForm_8<31, 135,
742                        (outs), (ins qfrc:$FRT, memrr:$dst),
743                        "qvstfcsxa $FRT, $dst", IIC_LdStSTFD, []>;
744
745    def QVSTFCDUX : XForm_8<31, 231,
746                        (outs), (ins qfrc:$FRT, memrr:$dst),
747                        "qvstfcdux $FRT, $dst", IIC_LdStSTFD, []>;
748    let RC = 1 in
749    def QVSTFCDUXA : XForm_8<31, 231,
750                        (outs), (ins qfrc:$FRT, memrr:$dst),
751                        "qvstfcduxa $FRT, $dst", IIC_LdStSTFD, []>;
752
753    def QVSTFCSUX : XForm_8<31, 167,
754                        (outs), (ins qfrc:$FRT, memrr:$dst),
755                        "qvstfcsux $FRT, $dst", IIC_LdStSTFD, []>;
756    let RC = 1 in
757    def QVSTFCSUXA : XForm_8<31, 167,
758                        (outs), (ins qfrc:$FRT, memrr:$dst),
759                        "qvstfcsuxa $FRT, $dst", IIC_LdStSTFD, []>;
760
761    def QVSTFCDXI : XForm_8<31, 197,
762                        (outs), (ins qfrc:$FRT, memrr:$dst),
763                        "qvstfcdxi $FRT, $dst", IIC_LdStSTFD, []>;
764    let RC = 1 in
765    def QVSTFCDXIA : XForm_8<31, 197,
766                        (outs), (ins qfrc:$FRT, memrr:$dst),
767                        "qvstfcdxia $FRT, $dst", IIC_LdStSTFD, []>;
768
769    def QVSTFCSXI : XForm_8<31, 133,
770                        (outs), (ins qfrc:$FRT, memrr:$dst),
771                        "qvstfcsxi $FRT, $dst", IIC_LdStSTFD, []>;
772    let RC = 1 in
773    def QVSTFCSXIA : XForm_8<31, 133,
774                        (outs), (ins qfrc:$FRT, memrr:$dst),
775                        "qvstfcsxia $FRT, $dst", IIC_LdStSTFD, []>;
776
777    def QVSTFCDUXI : XForm_8<31, 229,
778                        (outs), (ins qfrc:$FRT, memrr:$dst),
779                        "qvstfcduxi $FRT, $dst", IIC_LdStSTFD, []>;
780    let RC = 1 in
781    def QVSTFCDUXIA : XForm_8<31, 229,
782                        (outs), (ins qfrc:$FRT, memrr:$dst),
783                        "qvstfcduxia $FRT, $dst", IIC_LdStSTFD, []>;
784
785    def QVSTFCSUXI : XForm_8<31, 165,
786                        (outs), (ins qfrc:$FRT, memrr:$dst),
787                        "qvstfcsuxi $FRT, $dst", IIC_LdStSTFD, []>;
788    let RC = 1 in
789    def QVSTFCSUXIA : XForm_8<31, 165,
790                        (outs), (ins qfrc:$FRT, memrr:$dst),
791                        "qvstfcsuxia $FRT, $dst", IIC_LdStSTFD, []>;
792
793    def QVSTFIWX : XForm_8<31, 967,
794                        (outs), (ins qfrc:$FRT, memrr:$dst),
795                        "qvstfiwx $FRT, $dst", IIC_LdStSTFD, []>;
796    let RC = 1 in
797    def QVSTFIWXA : XForm_8<31, 967,
798                        (outs), (ins qfrc:$FRT, memrr:$dst),
799                        "qvstfiwxa $FRT, $dst", IIC_LdStSTFD, []>;
800  }
801}
802
803} // neverHasSideEffects
804}
805
806def : InstAlias<"qvfclr $FRT",
807                (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
808def : InstAlias<"qvfand $FRT, $FRA, $FRB",
809                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 1)>;
810def : InstAlias<"qvfandc $FRT, $FRA, $FRB",
811                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 4)>;
812def : InstAlias<"qvfctfb $FRT, $FRA",
813                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRA, 5)>;
814def : InstAlias<"qvfxor $FRT, $FRA, $FRB",
815                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 6)>;
816def : InstAlias<"qvfor $FRT, $FRA, $FRB",
817                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 7)>;
818def : InstAlias<"qvfnor $FRT, $FRA, $FRB",
819                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 8)>;
820def : InstAlias<"qvfequ $FRT, $FRA, $FRB",
821                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 9)>;
822def : InstAlias<"qvfnot $FRT, $FRA",
823                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRA, 10)>;
824def : InstAlias<"qvforc $FRT, $FRA, $FRB",
825                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 13)>;
826def : InstAlias<"qvfnand $FRT, $FRA, $FRB",
827                (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 14)>;
828def : InstAlias<"qvfset $FRT",
829                (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 15)>;
830
831//===----------------------------------------------------------------------===//
832// Additional QPX Patterns
833//
834
835def : Pat<(v4f64 (scalar_to_vector f64:$A)),
836          (INSERT_SUBREG (v4f64 (IMPLICIT_DEF)), $A, sub_64)>;
837def : Pat<(v4f32 (scalar_to_vector f32:$A)),
838          (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), $A, sub_64)>;
839
840def : Pat<(f64 (extractelt v4f64:$S, 0)),
841          (EXTRACT_SUBREG $S, sub_64)>;
842def : Pat<(f32 (extractelt v4f32:$S, 0)),
843          (EXTRACT_SUBREG $S, sub_64)>;
844
845def : Pat<(f64 (extractelt v4f64:$S, 1)),
846          (EXTRACT_SUBREG (QVESPLATI $S, 1), sub_64)>;
847def : Pat<(f64 (extractelt v4f64:$S, 2)),
848          (EXTRACT_SUBREG (QVESPLATI $S, 2), sub_64)>;
849def : Pat<(f64 (extractelt v4f64:$S, 3)),
850          (EXTRACT_SUBREG (QVESPLATI $S, 3), sub_64)>;
851
852def : Pat<(f32 (extractelt v4f32:$S, 1)),
853          (EXTRACT_SUBREG (QVESPLATIs $S, 1), sub_64)>;
854def : Pat<(f32 (extractelt v4f32:$S, 2)),
855          (EXTRACT_SUBREG (QVESPLATIs $S, 2), sub_64)>;
856def : Pat<(f32 (extractelt v4f32:$S, 3)),
857          (EXTRACT_SUBREG (QVESPLATIs $S, 3), sub_64)>;
858
859def : Pat<(f64 (extractelt v4f64:$S, i64:$F)),
860          (EXTRACT_SUBREG (QVFPERM $S, $S,
861                                   (QVLPCLSXint (RLDICR $F, 2,
862                                                        /* 63-2 = */ 61))),
863                          sub_64)>;
864def : Pat<(f32 (extractelt v4f32:$S, i64:$F)),
865          (EXTRACT_SUBREG (QVFPERMs $S, $S,
866                                    (QVLPCLSXint (RLDICR $F, 2,
867                                                         /* 63-2 = */ 61))),
868                          sub_64)>;
869
870def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C),
871          (QVFPERM $A, $B, $C)>;
872
873def : Pat<(int_ppc_qpx_qvfcpsgn v4f64:$A, v4f64:$B),
874          (QVFCPSGN $A, $B)>;
875
876// FCOPYSIGN's operand types need not agree.
877def : Pat<(fcopysign v4f64:$frB, v4f32:$frA),
878          (QVFCPSGN (COPY_TO_REGCLASS $frA, QFRC), $frB)>;
879def : Pat<(fcopysign QSRC:$frB, QFRC:$frA),
880          (QVFCPSGNs (COPY_TO_REGCLASS $frA, QSRC), $frB)>;
881
882def : Pat<(int_ppc_qpx_qvfneg v4f64:$A), (QVFNEG $A)>;
883def : Pat<(int_ppc_qpx_qvfabs v4f64:$A), (QVFABS $A)>;
884def : Pat<(int_ppc_qpx_qvfnabs v4f64:$A), (QVFNABS $A)>;
885
886def : Pat<(int_ppc_qpx_qvfriz v4f64:$A), (QVFRIZ $A)>;
887def : Pat<(int_ppc_qpx_qvfrin v4f64:$A), (QVFRIN $A)>;
888def : Pat<(int_ppc_qpx_qvfrip v4f64:$A), (QVFRIP $A)>;
889def : Pat<(int_ppc_qpx_qvfrim v4f64:$A), (QVFRIM $A)>;
890
891def : Pat<(int_ppc_qpx_qvfre v4f64:$A), (QVFRE $A)>;
892def : Pat<(int_ppc_qpx_qvfrsqrte v4f64:$A), (QVFRSQRTE $A)>;
893
894def : Pat<(int_ppc_qpx_qvfadd v4f64:$A, v4f64:$B),
895          (QVFADD $A, $B)>;
896def : Pat<(int_ppc_qpx_qvfsub v4f64:$A, v4f64:$B),
897          (QVFSUB $A, $B)>;
898def : Pat<(int_ppc_qpx_qvfmul v4f64:$A, v4f64:$B),
899          (QVFMUL $A, $B)>;
900
901// Additional QVFNMSUB patterns: -a*c + b == -(a*c - b)
902def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B),
903          (QVFNMSUB $A, $B, $C)>;
904def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B),
905          (QVFNMSUB $A, $B, $C)>;
906def : Pat<(fma (fneg v4f32:$A), v4f32:$C, v4f32:$B),
907          (QVFNMSUBSs $A, $B, $C)>;
908def : Pat<(fma v4f32:$A, (fneg v4f32:$C), v4f32:$B),
909          (QVFNMSUBSs $A, $B, $C)>;
910
911def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C),
912          (QVFMADD $A, $B, $C)>;
913def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C),
914          (QVFNMADD $A, $B, $C)>;
915def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C),
916          (QVFMSUB $A, $B, $C)>;
917def : Pat<(int_ppc_qpx_qvfnmsub v4f64:$A, v4f64:$B, v4f64:$C),
918          (QVFNMSUB $A, $B, $C)>;
919
920def : Pat<(int_ppc_qpx_qvlfd xoaddr:$src),
921          (QVLFDX xoaddr:$src)>;
922def : Pat<(int_ppc_qpx_qvlfda xoaddr:$src),
923          (QVLFDXA xoaddr:$src)>;
924def : Pat<(int_ppc_qpx_qvlfs xoaddr:$src),
925          (QVLFSX xoaddr:$src)>;
926def : Pat<(int_ppc_qpx_qvlfsa xoaddr:$src),
927          (QVLFSXA xoaddr:$src)>;
928def : Pat<(int_ppc_qpx_qvlfcda xoaddr:$src),
929          (QVLFCDXA xoaddr:$src)>;
930def : Pat<(int_ppc_qpx_qvlfcd xoaddr:$src),
931          (QVLFCDX xoaddr:$src)>;
932def : Pat<(int_ppc_qpx_qvlfcsa xoaddr:$src),
933          (QVLFCSXA xoaddr:$src)>;
934def : Pat<(int_ppc_qpx_qvlfcs xoaddr:$src),
935          (QVLFCSX xoaddr:$src)>;
936def : Pat<(int_ppc_qpx_qvlfda xoaddr:$src),
937          (QVLFDXA xoaddr:$src)>;
938def : Pat<(int_ppc_qpx_qvlfiwaa xoaddr:$src),
939          (QVLFIWAXA xoaddr:$src)>;
940def : Pat<(int_ppc_qpx_qvlfiwa xoaddr:$src),
941          (QVLFIWAX xoaddr:$src)>;
942def : Pat<(int_ppc_qpx_qvlfiwza xoaddr:$src),
943          (QVLFIWZXA xoaddr:$src)>;
944def : Pat<(int_ppc_qpx_qvlfiwz xoaddr:$src),
945          (QVLFIWZX xoaddr:$src)>;
946def : Pat<(int_ppc_qpx_qvlfsa xoaddr:$src),
947          (QVLFSXA xoaddr:$src)>;
948def : Pat<(int_ppc_qpx_qvlpcld xoaddr:$src),
949          (QVLPCLDX xoaddr:$src)>;
950def : Pat<(int_ppc_qpx_qvlpcls xoaddr:$src),
951          (QVLPCLSX xoaddr:$src)>;
952def : Pat<(int_ppc_qpx_qvlpcrd xoaddr:$src),
953          (QVLPCRDX xoaddr:$src)>;
954def : Pat<(int_ppc_qpx_qvlpcrs xoaddr:$src),
955          (QVLPCRSX xoaddr:$src)>;
956
957def : Pat<(int_ppc_qpx_qvstfd v4f64:$T, xoaddr:$dst),
958          (QVSTFDX $T, xoaddr:$dst)>;
959def : Pat<(int_ppc_qpx_qvstfs v4f64:$T, xoaddr:$dst),
960          (QVSTFSX $T, xoaddr:$dst)>;
961def : Pat<(int_ppc_qpx_qvstfcda v4f64:$T, xoaddr:$dst),
962          (QVSTFCDXA $T, xoaddr:$dst)>;
963def : Pat<(int_ppc_qpx_qvstfcd v4f64:$T, xoaddr:$dst),
964          (QVSTFCDX $T, xoaddr:$dst)>;
965def : Pat<(int_ppc_qpx_qvstfcsa v4f64:$T, xoaddr:$dst),
966          (QVSTFCSXA $T, xoaddr:$dst)>;
967def : Pat<(int_ppc_qpx_qvstfcs v4f64:$T, xoaddr:$dst),
968          (QVSTFCSX $T, xoaddr:$dst)>;
969def : Pat<(int_ppc_qpx_qvstfda v4f64:$T, xoaddr:$dst),
970          (QVSTFDXA $T, xoaddr:$dst)>;
971def : Pat<(int_ppc_qpx_qvstfiwa v4f64:$T, xoaddr:$dst),
972          (QVSTFIWXA $T, xoaddr:$dst)>;
973def : Pat<(int_ppc_qpx_qvstfiw v4f64:$T, xoaddr:$dst),
974          (QVSTFIWX $T, xoaddr:$dst)>;
975def : Pat<(int_ppc_qpx_qvstfsa v4f64:$T, xoaddr:$dst),
976          (QVSTFSXA $T, xoaddr:$dst)>;
977
978def : Pat<(pre_store v4f64:$rS, iPTR:$ptrreg, iPTR:$ptroff),
979          (QVSTFDUX $rS, $ptrreg, $ptroff)>;
980def : Pat<(pre_store v4f32:$rS, iPTR:$ptrreg, iPTR:$ptroff),
981          (QVSTFSUX $rS, $ptrreg, $ptroff)>;
982def : Pat<(pre_truncstv4f32 v4f64:$rS, iPTR:$ptrreg, iPTR:$ptroff),
983          (QVSTFSUXs $rS, $ptrreg, $ptroff)>;
984
985def : Pat<(int_ppc_qpx_qvflogical  v4f64:$A, v4f64:$B, (i32 imm:$idx)),
986          (QVFLOGICAL $A, $B, imm:$idx)>;
987def : Pat<(int_ppc_qpx_qvgpci (u12:$idx)),
988          (QVGPCI imm:$idx)>;
989
990def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETOGE),
991          (QVFLOGICALb (QVFCMPLTb $FRA, $FRB),
992                       (QVFTSTNANb $FRA, $FRB), (i32 8))>;
993def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETOLE),
994          (QVFLOGICALb (QVFCMPGTb $FRA, $FRB),
995                       (QVFTSTNANb $FRA, $FRB), (i32 8))>;
996def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETONE),
997          (QVFLOGICALb (QVFCMPEQb $FRA, $FRB),
998                       (QVFTSTNANb $FRA, $FRB), (i32 8))>;
999def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETO),
1000          (QVFLOGICALb (QVFTSTNANb $FRA, $FRB),
1001                       (QVFTSTNANb $FRA, $FRB), (i32 10))>;
1002def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUEQ),
1003          (QVFLOGICALb (QVFCMPEQb $FRA, $FRB),
1004                       (QVFTSTNANb $FRA, $FRB), (i32 7))>;
1005def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUGT),
1006          (QVFLOGICALb (QVFCMPGTb $FRA, $FRB),
1007                       (QVFTSTNANb $FRA, $FRB), (i32 7))>;
1008def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUGE),
1009          (QVFLOGICALb (QVFTSTNANb $FRA, $FRB),
1010                       (QVFCMPLTb $FRA, $FRB), (i32 13))>;
1011def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETULT),
1012          (QVFLOGICALb (QVFCMPLTb $FRA, $FRB),
1013                       (QVFTSTNANb $FRA, $FRB), (i32 7))>;
1014def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETULE),
1015          (QVFLOGICALb (QVFTSTNANb $FRA, $FRB),
1016                       (QVFCMPGTb $FRA, $FRB), (i32 13))>;
1017def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETUNE),
1018          (QVFLOGICALb (QVFTSTNANb $FRA, $FRB),
1019                       (QVFCMPEQb $FRA, $FRB), (i32 13))>;
1020
1021def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETEQ),
1022          (QVFCMPEQb $FRA, $FRB)>;
1023def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETGT),
1024          (QVFCMPGTb $FRA, $FRB)>;
1025def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETGE),
1026          (QVFLOGICALb (QVFCMPLTb $FRA, $FRB),
1027                       (QVFCMPLTb $FRA, $FRB), (i32 10))>;
1028def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETLT),
1029          (QVFCMPLTb $FRA, $FRB)>;
1030def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETLE),
1031          (QVFLOGICALb (QVFCMPGTb $FRA, $FRB),
1032                       (QVFCMPGTb $FRA, $FRB), (i32 10))>;
1033def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETNE),
1034          (QVFLOGICALb (QVFCMPEQb $FRA, $FRB),
1035                       (QVFCMPEQb $FRA, $FRB), (i32 10))>;
1036
1037def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETOGE),
1038          (QVFLOGICALb (QVFCMPLTbs $FRA, $FRB),
1039                       (QVFTSTNANbs $FRA, $FRB), (i32 8))>;
1040def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETOLE),
1041          (QVFLOGICALb (QVFCMPGTbs $FRA, $FRB),
1042                       (QVFTSTNANbs $FRA, $FRB), (i32 8))>;
1043def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETONE),
1044          (QVFLOGICALb (QVFCMPEQbs $FRA, $FRB),
1045                       (QVFTSTNANbs $FRA, $FRB), (i32 8))>;
1046def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETO),
1047          (QVFLOGICALb (QVFTSTNANbs $FRA, $FRB),
1048                       (QVFTSTNANbs $FRA, $FRB), (i32 10))>;
1049def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUEQ),
1050          (QVFLOGICALb (QVFCMPEQbs $FRA, $FRB),
1051                       (QVFTSTNANbs $FRA, $FRB), (i32 7))>;
1052def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUGT),
1053          (QVFLOGICALb (QVFCMPGTbs $FRA, $FRB),
1054                       (QVFTSTNANbs $FRA, $FRB), (i32 7))>;
1055def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUGE),
1056          (QVFLOGICALb (QVFTSTNANbs $FRA, $FRB),
1057                       (QVFCMPLTbs $FRA, $FRB), (i32 13))>;
1058def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETULT),
1059          (QVFLOGICALb (QVFCMPLTbs $FRA, $FRB),
1060                       (QVFTSTNANbs $FRA, $FRB), (i32 7))>;
1061def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETULE),
1062          (QVFLOGICALb (QVFTSTNANbs $FRA, $FRB),
1063                       (QVFCMPGTbs $FRA, $FRB), (i32 13))>;
1064def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETUNE),
1065          (QVFLOGICALb (QVFTSTNANbs $FRA, $FRB),
1066                       (QVFCMPEQbs $FRA, $FRB), (i32 13))>;
1067
1068def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETEQ),
1069          (QVFCMPEQbs $FRA, $FRB)>;
1070def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETGT),
1071          (QVFCMPGTbs $FRA, $FRB)>;
1072def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETGE),
1073          (QVFLOGICALb (QVFCMPLTbs $FRA, $FRB),
1074                       (QVFCMPLTbs $FRA, $FRB), (i32 10))>;
1075def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETLT),
1076          (QVFCMPLTbs $FRA, $FRB)>;
1077def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETLE),
1078          (QVFLOGICALb (QVFCMPGTbs $FRA, $FRB),
1079                       (QVFCMPGTbs $FRA, $FRB), (i32 10))>;
1080def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETNE),
1081          (QVFLOGICALb (QVFCMPEQbs $FRA, $FRB),
1082                       (QVFCMPEQbs $FRA, $FRB), (i32 10))>;
1083
1084def : Pat<(and v4i1:$FRA, (not v4i1:$FRB)),
1085          (QVFLOGICALb $FRA, $FRB, (i32 4))>;
1086def : Pat<(not (or v4i1:$FRA, v4i1:$FRB)),
1087          (QVFLOGICALb $FRA, $FRB, (i32 8))>;
1088def : Pat<(not (xor v4i1:$FRA, v4i1:$FRB)),
1089          (QVFLOGICALb $FRA, $FRB, (i32 9))>;
1090def : Pat<(or v4i1:$FRA, (not v4i1:$FRB)),
1091          (QVFLOGICALb $FRA, $FRB, (i32 13))>;
1092def : Pat<(not (and v4i1:$FRA, v4i1:$FRB)),
1093          (QVFLOGICALb $FRA, $FRB, (i32 14))>;
1094
1095def : Pat<(and v4i1:$FRA, v4i1:$FRB),
1096          (QVFLOGICALb $FRA, $FRB, (i32 1))>;
1097def : Pat<(or v4i1:$FRA, v4i1:$FRB),
1098          (QVFLOGICALb $FRA, $FRB, (i32 7))>;
1099def : Pat<(xor v4i1:$FRA, v4i1:$FRB),
1100          (QVFLOGICALb $FRA, $FRB, (i32 6))>;
1101def : Pat<(not v4i1:$FRA),
1102          (QVFLOGICALb $FRA, $FRA, (i32 10))>;
1103
1104def : Pat<(v4f64 (fpextend v4f32:$src)),
1105          (COPY_TO_REGCLASS $src, QFRC)>;
1106
1107def : Pat<(v4f32 (fround_exact v4f64:$src)),
1108          (COPY_TO_REGCLASS $src, QSRC)>;
1109
1110// Extract the underlying floating-point values from the
1111// QPX (-1.0, 1.0) boolean representation.
1112def : Pat<(v4f64 (PPCqbflt v4i1:$src)),
1113          (COPY_TO_REGCLASS $src, QFRC)>;
1114
1115def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETLT)),
1116          (SELECT_QFRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1117def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETULT)),
1118          (SELECT_QFRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1119def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETLE)),
1120          (SELECT_QFRC (CRORC  $lhs, $rhs), $tval, $fval)>;
1121def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETULE)),
1122          (SELECT_QFRC (CRORC  $rhs, $lhs), $tval, $fval)>;
1123def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETEQ)),
1124          (SELECT_QFRC (CREQV $lhs, $rhs), $tval, $fval)>;
1125def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETGE)),
1126          (SELECT_QFRC (CRORC  $rhs, $lhs), $tval, $fval)>;
1127def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETUGE)),
1128          (SELECT_QFRC (CRORC  $lhs, $rhs), $tval, $fval)>;
1129def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETGT)),
1130          (SELECT_QFRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1131def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETUGT)),
1132          (SELECT_QFRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1133def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETNE)),
1134          (SELECT_QFRC (CRXOR $lhs, $rhs), $tval, $fval)>;
1135
1136def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETLT)),
1137          (SELECT_QSRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1138def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETULT)),
1139          (SELECT_QSRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1140def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETLE)),
1141          (SELECT_QSRC (CRORC  $lhs, $rhs), $tval, $fval)>;
1142def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETULE)),
1143          (SELECT_QSRC (CRORC  $rhs, $lhs), $tval, $fval)>;
1144def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETEQ)),
1145          (SELECT_QSRC (CREQV $lhs, $rhs), $tval, $fval)>;
1146def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETGE)),
1147          (SELECT_QSRC (CRORC  $rhs, $lhs), $tval, $fval)>;
1148def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETUGE)),
1149          (SELECT_QSRC (CRORC  $lhs, $rhs), $tval, $fval)>;
1150def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETGT)),
1151          (SELECT_QSRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1152def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETUGT)),
1153          (SELECT_QSRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1154def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETNE)),
1155          (SELECT_QSRC (CRXOR $lhs, $rhs), $tval, $fval)>;
1156
1157def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETLT)),
1158          (SELECT_QBRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1159def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETULT)),
1160          (SELECT_QBRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1161def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETLE)),
1162          (SELECT_QBRC (CRORC  $lhs, $rhs), $tval, $fval)>;
1163def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETULE)),
1164          (SELECT_QBRC (CRORC  $rhs, $lhs), $tval, $fval)>;
1165def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETEQ)),
1166          (SELECT_QBRC (CREQV $lhs, $rhs), $tval, $fval)>;
1167def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETGE)),
1168          (SELECT_QBRC (CRORC  $rhs, $lhs), $tval, $fval)>;
1169def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETUGE)),
1170          (SELECT_QBRC (CRORC  $lhs, $rhs), $tval, $fval)>;
1171def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETGT)),
1172          (SELECT_QBRC (CRANDC $rhs, $lhs), $tval, $fval)>;
1173def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETUGT)),
1174          (SELECT_QBRC (CRANDC $lhs, $rhs), $tval, $fval)>;
1175def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETNE)),
1176          (SELECT_QBRC (CRXOR $lhs, $rhs), $tval, $fval)>;
1177
1178} // end HasQPX
1179
1180let Predicates = [HasQPX, NoNaNsFPMath] in {
1181def : Pat<(fminnum v4f64:$FRA, v4f64:$FRB),
1182          (QVFSELb (QVFCMPLTb $FRA, $FRB), $FRB, $FRA)>;
1183def : Pat<(fmaxnum v4f64:$FRA, v4f64:$FRB),
1184          (QVFSELb (QVFCMPGTb $FRA, $FRB), $FRB, $FRA)>;
1185
1186def : Pat<(fminnum v4f32:$FRA, v4f32:$FRB),
1187          (QVFSELbs (QVFCMPLTbs $FRA, $FRB), $FRB, $FRA)>;
1188def : Pat<(fmaxnum v4f32:$FRA, v4f32:$FRB),
1189          (QVFSELbs (QVFCMPGTbs $FRA, $FRB), $FRB, $FRA)>;
1190}
1191
1192let Predicates = [HasQPX, NaNsFPMath] in {
1193// When either of these operands is NaN, we should return the other operand.
1194// QVFCMPLT/QVFCMPGT return false is either operand is NaN, which means we need
1195// to explicitly or with a NaN test on the second operand.
1196def : Pat<(fminnum v4f64:$FRA, v4f64:$FRB),
1197          (QVFSELb (QVFLOGICALb (QVFCMPLTb $FRA, $FRB),
1198                                (QVFTSTNANb $FRB, $FRB), (i32 7)),
1199                   $FRB, $FRA)>;
1200def : Pat<(fmaxnum v4f64:$FRA, v4f64:$FRB),
1201          (QVFSELb (QVFLOGICALb (QVFCMPGTb $FRA, $FRB),
1202                                (QVFTSTNANb $FRB, $FRB), (i32 7)),
1203                   $FRB, $FRA)>;
1204
1205def : Pat<(fminnum v4f32:$FRA, v4f32:$FRB),
1206          (QVFSELbs (QVFLOGICALb (QVFCMPLTbs $FRA, $FRB),
1207                                 (QVFTSTNANbs $FRB, $FRB), (i32 7)),
1208                   $FRB, $FRA)>;
1209def : Pat<(fmaxnum v4f32:$FRA, v4f32:$FRB),
1210          (QVFSELbs (QVFLOGICALb (QVFCMPGTbs $FRA, $FRB),
1211                                 (QVFTSTNANbs $FRB, $FRB), (i32 7)),
1212                   $FRB, $FRA)>;
1213}
1214
1215