1 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +fullfp16\
2 // RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone -emit-llvm -o - %s \
3 // RUN: | opt -S -mem2reg \
4 // RUN: | FileCheck %s
5
6 // REQUIRES: aarch64-registered-target
7
8 #include <arm_fp16.h>
9
10 // CHECK-LABEL: test_vabsh_f16
11 // CHECK: [[ABS:%.*]] = call half @llvm.fabs.f16(half %a)
12 // CHECK: ret half [[ABS]]
test_vabsh_f16(float16_t a)13 float16_t test_vabsh_f16(float16_t a) {
14 return vabsh_f16(a);
15 }
16
17 // CHECK-LABEL: test_vceqzh_f16
18 // CHECK: [[TMP1:%.*]] = fcmp oeq half %a, 0xH0000
19 // CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
20 // CHECK: ret i16 [[TMP2]]
test_vceqzh_f16(float16_t a)21 uint16_t test_vceqzh_f16(float16_t a) {
22 return vceqzh_f16(a);
23 }
24
25 // CHECK-LABEL: test_vcgezh_f16
26 // CHECK: [[TMP1:%.*]] = fcmp oge half %a, 0xH0000
27 // CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
28 // CHECK: ret i16 [[TMP2]]
test_vcgezh_f16(float16_t a)29 uint16_t test_vcgezh_f16(float16_t a) {
30 return vcgezh_f16(a);
31 }
32
33 // CHECK-LABEL: test_vcgtzh_f16
34 // CHECK: [[TMP1:%.*]] = fcmp ogt half %a, 0xH0000
35 // CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
36 // CHECK: ret i16 [[TMP2]]
test_vcgtzh_f16(float16_t a)37 uint16_t test_vcgtzh_f16(float16_t a) {
38 return vcgtzh_f16(a);
39 }
40
41 // CHECK-LABEL: test_vclezh_f16
42 // CHECK: [[TMP1:%.*]] = fcmp ole half %a, 0xH0000
43 // CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
44 // CHECK: ret i16 [[TMP2]]
test_vclezh_f16(float16_t a)45 uint16_t test_vclezh_f16(float16_t a) {
46 return vclezh_f16(a);
47 }
48
49 // CHECK-LABEL: test_vcltzh_f16
50 // CHECK: [[TMP1:%.*]] = fcmp olt half %a, 0xH0000
51 // CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
52 // CHECK: ret i16 [[TMP2]]
test_vcltzh_f16(float16_t a)53 uint16_t test_vcltzh_f16(float16_t a) {
54 return vcltzh_f16(a);
55 }
56
57 // CHECK-LABEL: test_vcvth_f16_s16
58 // CHECK: [[VCVT:%.*]] = sitofp i16 %a to half
59 // CHECK: ret half [[VCVT]]
test_vcvth_f16_s16(int16_t a)60 float16_t test_vcvth_f16_s16 (int16_t a) {
61 return vcvth_f16_s16(a);
62 }
63
64 // CHECK-LABEL: test_vcvth_f16_s32
65 // CHECK: [[VCVT:%.*]] = sitofp i32 %a to half
66 // CHECK: ret half [[VCVT]]
test_vcvth_f16_s32(int32_t a)67 float16_t test_vcvth_f16_s32 (int32_t a) {
68 return vcvth_f16_s32(a);
69 }
70
71 // CHECK-LABEL: test_vcvth_f16_s64
72 // CHECK: [[VCVT:%.*]] = sitofp i64 %a to half
73 // CHECK: ret half [[VCVT]]
test_vcvth_f16_s64(int64_t a)74 float16_t test_vcvth_f16_s64 (int64_t a) {
75 return vcvth_f16_s64(a);
76 }
77
78 // CHECK-LABEL: test_vcvth_f16_u16
79 // CHECK: [[VCVT:%.*]] = uitofp i16 %a to half
80 // CHECK: ret half [[VCVT]]
test_vcvth_f16_u16(uint16_t a)81 float16_t test_vcvth_f16_u16 (uint16_t a) {
82 return vcvth_f16_u16(a);
83 }
84
85 // CHECK-LABEL: test_vcvth_f16_u32
86 // CHECK: [[VCVT:%.*]] = uitofp i32 %a to half
87 // CHECK: ret half [[VCVT]]
test_vcvth_f16_u32(uint32_t a)88 float16_t test_vcvth_f16_u32 (uint32_t a) {
89 return vcvth_f16_u32(a);
90 }
91
92 // CHECK-LABEL: test_vcvth_f16_u64
93 // CHECK: [[VCVT:%.*]] = uitofp i64 %a to half
94 // CHECK: ret half [[VCVT]]
test_vcvth_f16_u64(uint64_t a)95 float16_t test_vcvth_f16_u64 (uint64_t a) {
96 return vcvth_f16_u64(a);
97 }
98
99 // CHECK-LABEL: test_vcvth_s16_f16
100 // CHECK: [[VCVT:%.*]] = fptosi half %a to i16
101 // CHECK: ret i16 [[VCVT]]
test_vcvth_s16_f16(float16_t a)102 int16_t test_vcvth_s16_f16 (float16_t a) {
103 return vcvth_s16_f16(a);
104 }
105
106 // CHECK-LABEL: test_vcvth_s32_f16
107 // CHECK: [[VCVT:%.*]] = fptosi half %a to i32
108 // CHECK: ret i32 [[VCVT]]
test_vcvth_s32_f16(float16_t a)109 int32_t test_vcvth_s32_f16 (float16_t a) {
110 return vcvth_s32_f16(a);
111 }
112
113 // CHECK-LABEL: test_vcvth_s64_f16
114 // CHECK: [[VCVT:%.*]] = fptosi half %a to i64
115 // CHECK: ret i64 [[VCVT]]
test_vcvth_s64_f16(float16_t a)116 int64_t test_vcvth_s64_f16 (float16_t a) {
117 return vcvth_s64_f16(a);
118 }
119
120 // CHECK-LABEL: test_vcvth_u16_f16
121 // CHECK: [[VCVT:%.*]] = fptoui half %a to i16
122 // CHECK: ret i16 [[VCVT]]
test_vcvth_u16_f16(float16_t a)123 uint16_t test_vcvth_u16_f16 (float16_t a) {
124 return vcvth_u16_f16(a);
125 }
126
127 // CHECK-LABEL: test_vcvth_u32_f16
128 // CHECK: [[VCVT:%.*]] = fptoui half %a to i32
129 // CHECK: ret i32 [[VCVT]]
test_vcvth_u32_f16(float16_t a)130 uint32_t test_vcvth_u32_f16 (float16_t a) {
131 return vcvth_u32_f16(a);
132 }
133
134 // CHECK-LABEL: test_vcvth_u64_f16
135 // CHECK: [[VCVT:%.*]] = fptoui half %a to i64
136 // CHECK: ret i64 [[VCVT]]
test_vcvth_u64_f16(float16_t a)137 uint64_t test_vcvth_u64_f16 (float16_t a) {
138 return vcvth_u64_f16(a);
139 }
140
141 // CHECK-LABEL: test_vcvtah_s16_f16
142 // CHECK: [[FCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtas.i32.f16(half %a)
143 // CHECK: [[RET:%.*]] = trunc i32 [[FCVT]] to i16
144 // CHECK: ret i16 [[RET]]
test_vcvtah_s16_f16(float16_t a)145 int16_t test_vcvtah_s16_f16 (float16_t a) {
146 return vcvtah_s16_f16(a);
147 }
148
149 // CHECK-LABEL: test_vcvtah_s32_f16
150 // CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtas.i32.f16(half %a)
151 // CHECK: ret i32 [[VCVT]]
test_vcvtah_s32_f16(float16_t a)152 int32_t test_vcvtah_s32_f16 (float16_t a) {
153 return vcvtah_s32_f16(a);
154 }
155
156 // CHECK-LABEL: test_vcvtah_s64_f16
157 // CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtas.i64.f16(half %a)
158 // CHECK: ret i64 [[VCVT]]
test_vcvtah_s64_f16(float16_t a)159 int64_t test_vcvtah_s64_f16 (float16_t a) {
160 return vcvtah_s64_f16(a);
161 }
162
163 // CHECK-LABEL: test_vcvtah_u16_f16
164 // CHECK: [[FCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtau.i32.f16(half %a)
165 // CHECK: [[RET:%.*]] = trunc i32 [[FCVT]] to i16
166 // CHECK: ret i16 [[RET]]
test_vcvtah_u16_f16(float16_t a)167 uint16_t test_vcvtah_u16_f16 (float16_t a) {
168 return vcvtah_u16_f16(a);
169 }
170
171 // CHECK-LABEL: test_vcvtah_u32_f16
172 // CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtau.i32.f16(half %a)
173 // CHECK: ret i32 [[VCVT]]
test_vcvtah_u32_f16(float16_t a)174 uint32_t test_vcvtah_u32_f16 (float16_t a) {
175 return vcvtah_u32_f16(a);
176 }
177
178 // CHECK-LABEL: test_vcvtah_u64_f16
179 // CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtau.i64.f16(half %a)
180 // CHECK: ret i64 [[VCVT]]
test_vcvtah_u64_f16(float16_t a)181 uint64_t test_vcvtah_u64_f16 (float16_t a) {
182 return vcvtah_u64_f16(a);
183 }
184
185 // CHECK-LABEL: test_vcvtmh_s16_f16
186 // CHECK: [[FCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtms.i32.f16(half %a)
187 // CHECK: [[RET:%.*]] = trunc i32 [[FCVT]] to i16
188 // CHECK: ret i16 [[RET]]
test_vcvtmh_s16_f16(float16_t a)189 int16_t test_vcvtmh_s16_f16 (float16_t a) {
190 return vcvtmh_s16_f16(a);
191 }
192
193 // CHECK-LABEL: test_vcvtmh_s32_f16
194 // CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtms.i32.f16(half %a)
195 // CHECK: ret i32 [[VCVT]]
test_vcvtmh_s32_f16(float16_t a)196 int32_t test_vcvtmh_s32_f16 (float16_t a) {
197 return vcvtmh_s32_f16(a);
198 }
199
200 // CHECK-LABEL: test_vcvtmh_s64_f16
201 // CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtms.i64.f16(half %a)
202 // CHECK: ret i64 [[VCVT]]
test_vcvtmh_s64_f16(float16_t a)203 int64_t test_vcvtmh_s64_f16 (float16_t a) {
204 return vcvtmh_s64_f16(a);
205 }
206
207 // CHECK-LABEL: test_vcvtmh_u16_f16
208 // CHECK: [[FCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtmu.i32.f16(half %a)
209 // CHECK: [[RET:%.*]] = trunc i32 [[FCVT]] to i16
210 // CHECK: ret i16 [[RET]]
test_vcvtmh_u16_f16(float16_t a)211 uint16_t test_vcvtmh_u16_f16 (float16_t a) {
212 return vcvtmh_u16_f16(a);
213 }
214
215 // CHECK-LABEL: test_vcvtmh_u32_f16
216 // CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtmu.i32.f16(half %a)
217 // CHECK: ret i32 [[VCVT]]
test_vcvtmh_u32_f16(float16_t a)218 uint32_t test_vcvtmh_u32_f16 (float16_t a) {
219 return vcvtmh_u32_f16(a);
220 }
221
222 // CHECK-LABEL: test_vcvtmh_u64_f16
223 // CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtmu.i64.f16(half %a)
224 // CHECK: ret i64 [[VCVT]]
test_vcvtmh_u64_f16(float16_t a)225 uint64_t test_vcvtmh_u64_f16 (float16_t a) {
226 return vcvtmh_u64_f16(a);
227 }
228
229 // CHECK-LABEL: test_vcvtnh_s16_f16
230 // CHECK: [[FCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtns.i32.f16(half %a)
231 // CHECK: [[RET:%.*]] = trunc i32 [[FCVT]] to i16
232 // CHECK: ret i16 [[RET]]
test_vcvtnh_s16_f16(float16_t a)233 int16_t test_vcvtnh_s16_f16 (float16_t a) {
234 return vcvtnh_s16_f16(a);
235 }
236
237 // CHECK-LABEL: test_vcvtnh_s32_f16
238 // CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtns.i32.f16(half %a)
239 // CHECK: ret i32 [[VCVT]]
test_vcvtnh_s32_f16(float16_t a)240 int32_t test_vcvtnh_s32_f16 (float16_t a) {
241 return vcvtnh_s32_f16(a);
242 }
243
244 // CHECK-LABEL: test_vcvtnh_s64_f16
245 // CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtns.i64.f16(half %a)
246 // CHECK: ret i64 [[VCVT]]
test_vcvtnh_s64_f16(float16_t a)247 int64_t test_vcvtnh_s64_f16 (float16_t a) {
248 return vcvtnh_s64_f16(a);
249 }
250
251 // CHECK-LABEL: test_vcvtnh_u16_f16
252 // CHECK: [[FCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtnu.i32.f16(half %a)
253 // CHECK: [[RET:%.*]] = trunc i32 [[FCVT]] to i16
254 // CHECK: ret i16 [[RET]]
test_vcvtnh_u16_f16(float16_t a)255 uint16_t test_vcvtnh_u16_f16 (float16_t a) {
256 return vcvtnh_u16_f16(a);
257 }
258
259 // CHECK-LABEL: test_vcvtnh_u32_f16
260 // CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtnu.i32.f16(half %a)
261 // CHECK: ret i32 [[VCVT]]
test_vcvtnh_u32_f16(float16_t a)262 uint32_t test_vcvtnh_u32_f16 (float16_t a) {
263 return vcvtnh_u32_f16(a);
264 }
265
266 // CHECK-LABEL: test_vcvtnh_u64_f16
267 // CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtnu.i64.f16(half %a)
268 // CHECK: ret i64 [[VCVT]]
test_vcvtnh_u64_f16(float16_t a)269 uint64_t test_vcvtnh_u64_f16 (float16_t a) {
270 return vcvtnh_u64_f16(a);
271 }
272
273 // CHECK-LABEL: test_vcvtph_s16_f16
274 // CHECK: [[FCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtps.i32.f16(half %a)
275 // CHECK: [[RET:%.*]] = trunc i32 [[FCVT]] to i16
276 // CHECK: ret i16 [[RET]]
test_vcvtph_s16_f16(float16_t a)277 int16_t test_vcvtph_s16_f16 (float16_t a) {
278 return vcvtph_s16_f16(a);
279 }
280
281 // CHECK-LABEL: test_vcvtph_s32_f16
282 // CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtps.i32.f16(half %a)
283 // CHECK: ret i32 [[VCVT]]
test_vcvtph_s32_f16(float16_t a)284 int32_t test_vcvtph_s32_f16 (float16_t a) {
285 return vcvtph_s32_f16(a);
286 }
287
288 // CHECK-LABEL: test_vcvtph_s64_f16
289 // CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtps.i64.f16(half %a)
290 // CHECK: ret i64 [[VCVT]]
test_vcvtph_s64_f16(float16_t a)291 int64_t test_vcvtph_s64_f16 (float16_t a) {
292 return vcvtph_s64_f16(a);
293 }
294
295 // CHECK-LABEL: test_vcvtph_u16_f16
296 // CHECK: [[FCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtpu.i32.f16(half %a)
297 // CHECK: [[RET:%.*]] = trunc i32 [[FCVT]] to i16
298 // CHECK: ret i16 [[RET]]
test_vcvtph_u16_f16(float16_t a)299 uint16_t test_vcvtph_u16_f16 (float16_t a) {
300 return vcvtph_u16_f16(a);
301 }
302
303 // CHECK-LABEL: test_vcvtph_u32_f16
304 // CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtpu.i32.f16(half %a)
305 // CHECK: ret i32 [[VCVT]]
test_vcvtph_u32_f16(float16_t a)306 uint32_t test_vcvtph_u32_f16 (float16_t a) {
307 return vcvtph_u32_f16(a);
308 }
309
310 // CHECK-LABEL: test_vcvtph_u64_f16
311 // CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtpu.i64.f16(half %a)
312 // CHECK: ret i64 [[VCVT]]
test_vcvtph_u64_f16(float16_t a)313 uint64_t test_vcvtph_u64_f16 (float16_t a) {
314 return vcvtph_u64_f16(a);
315 }
316
317 // CHECK-LABEL: test_vnegh_f16
318 // CHECK: [[NEG:%.*]] = fsub half 0xH8000, %a
319 // CHECK: ret half [[NEG]]
test_vnegh_f16(float16_t a)320 float16_t test_vnegh_f16(float16_t a) {
321 return vnegh_f16(a);
322 }
323
324 // CHECK-LABEL: test_vrecpeh_f16
325 // CHECK: [[VREC:%.*]] = call half @llvm.aarch64.neon.frecpe.f16(half %a)
326 // CHECK: ret half [[VREC]]
test_vrecpeh_f16(float16_t a)327 float16_t test_vrecpeh_f16(float16_t a) {
328 return vrecpeh_f16(a);
329 }
330
331 // CHECK-LABEL: test_vrecpxh_f16
332 // CHECK: [[VREC:%.*]] = call half @llvm.aarch64.neon.frecpx.f16(half %a)
333 // CHECK: ret half [[VREC]]
test_vrecpxh_f16(float16_t a)334 float16_t test_vrecpxh_f16(float16_t a) {
335 return vrecpxh_f16(a);
336 }
337
338 // CHECK-LABEL: test_vrndh_f16
339 // CHECK: [[RND:%.*]] = call half @llvm.trunc.f16(half %a)
340 // CHECK: ret half [[RND]]
test_vrndh_f16(float16_t a)341 float16_t test_vrndh_f16(float16_t a) {
342 return vrndh_f16(a);
343 }
344
345 // CHECK-LABEL: test_vrndah_f16
346 // CHECK: [[RND:%.*]] = call half @llvm.round.f16(half %a)
347 // CHECK: ret half [[RND]]
test_vrndah_f16(float16_t a)348 float16_t test_vrndah_f16(float16_t a) {
349 return vrndah_f16(a);
350 }
351
352 // CHECK-LABEL: test_vrndih_f16
353 // CHECK: [[RND:%.*]] = call half @llvm.nearbyint.f16(half %a)
354 // CHECK: ret half [[RND]]
test_vrndih_f16(float16_t a)355 float16_t test_vrndih_f16(float16_t a) {
356 return vrndih_f16(a);
357 }
358
359 // CHECK-LABEL: test_vrndmh_f16
360 // CHECK: [[RND:%.*]] = call half @llvm.floor.f16(half %a)
361 // CHECK: ret half [[RND]]
test_vrndmh_f16(float16_t a)362 float16_t test_vrndmh_f16(float16_t a) {
363 return vrndmh_f16(a);
364 }
365
366 // CHECK-LABEL: test_vrndnh_f16
367 // CHECK: [[RND:%.*]] = call half @llvm.aarch64.neon.frintn.f16(half %a)
368 // CHECK: ret half [[RND]]
test_vrndnh_f16(float16_t a)369 float16_t test_vrndnh_f16(float16_t a) {
370 return vrndnh_f16(a);
371 }
372
373 // CHECK-LABEL: test_vrndph_f16
374 // CHECK: [[RND:%.*]] = call half @llvm.ceil.f16(half %a)
375 // CHECK: ret half [[RND]]
test_vrndph_f16(float16_t a)376 float16_t test_vrndph_f16(float16_t a) {
377 return vrndph_f16(a);
378 }
379
380 // CHECK-LABEL: test_vrndxh_f16
381 // CHECK: [[RND:%.*]] = call half @llvm.rint.f16(half %a)
382 // CHECK: ret half [[RND]]
test_vrndxh_f16(float16_t a)383 float16_t test_vrndxh_f16(float16_t a) {
384 return vrndxh_f16(a);
385 }
386
387 // CHECK-LABEL: test_vrsqrteh_f16
388 // CHECK: [[RND:%.*]] = call half @llvm.aarch64.neon.frsqrte.f16(half %a)
389 // CHECK: ret half [[RND]]
test_vrsqrteh_f16(float16_t a)390 float16_t test_vrsqrteh_f16(float16_t a) {
391 return vrsqrteh_f16(a);
392 }
393
394 // CHECK-LABEL: test_vsqrth_f16
395 // CHECK: [[SQR:%.*]] = call half @llvm.sqrt.f16(half %a)
396 // CHECK: ret half [[SQR]]
test_vsqrth_f16(float16_t a)397 float16_t test_vsqrth_f16(float16_t a) {
398 return vsqrth_f16(a);
399 }
400
401 // CHECK-LABEL: test_vaddh_f16
402 // CHECK: [[ADD:%.*]] = fadd half %a, %b
403 // CHECK: ret half [[ADD]]
test_vaddh_f16(float16_t a,float16_t b)404 float16_t test_vaddh_f16(float16_t a, float16_t b) {
405 return vaddh_f16(a, b);
406 }
407
408 // CHECK-LABEL: test_vabdh_f16
409 // CHECK: [[ABD:%.*]] = call half @llvm.aarch64.sisd.fabd.f16(half %a, half %b)
410 // CHECK: ret half [[ABD]]
test_vabdh_f16(float16_t a,float16_t b)411 float16_t test_vabdh_f16(float16_t a, float16_t b) {
412 return vabdh_f16(a, b);
413 }
414
415 // CHECK-LABEL: test_vcageh_f16
416 // CHECK: [[FACG:%.*]] = call i32 @llvm.aarch64.neon.facge.i32.f16(half %a, half %b)
417 // CHECK: [[RET:%.*]] = trunc i32 [[FACG]] to i16
418 // CHECK: ret i16 [[RET]]
test_vcageh_f16(float16_t a,float16_t b)419 uint16_t test_vcageh_f16(float16_t a, float16_t b) {
420 return vcageh_f16(a, b);
421 }
422
423 // CHECK-LABEL: test_vcagth_f16
424 // CHECK: [[FACG:%.*]] = call i32 @llvm.aarch64.neon.facgt.i32.f16(half %a, half %b)
425 // CHECK: [[RET:%.*]] = trunc i32 [[FACG]] to i16
426 // CHECK: ret i16 [[RET]]
test_vcagth_f16(float16_t a,float16_t b)427 uint16_t test_vcagth_f16(float16_t a, float16_t b) {
428 return vcagth_f16(a, b);
429 }
430
431 // CHECK-LABEL: test_vcaleh_f16
432 // CHECK: [[FACG:%.*]] = call i32 @llvm.aarch64.neon.facge.i32.f16(half %b, half %a)
433 // CHECK: [[RET:%.*]] = trunc i32 [[FACG]] to i16
434 // CHECK: ret i16 [[RET]]
test_vcaleh_f16(float16_t a,float16_t b)435 uint16_t test_vcaleh_f16(float16_t a, float16_t b) {
436 return vcaleh_f16(a, b);
437 }
438
439 // CHECK-LABEL: test_vcalth_f16
440 // CHECK: [[FACG:%.*]] = call i32 @llvm.aarch64.neon.facgt.i32.f16(half %b, half %a)
441 // CHECK: [[RET:%.*]] = trunc i32 [[FACG]] to i16
442 // CHECK: ret i16 [[RET]]
test_vcalth_f16(float16_t a,float16_t b)443 uint16_t test_vcalth_f16(float16_t a, float16_t b) {
444 return vcalth_f16(a, b);
445 }
446
447 // CHECK-LABEL: test_vceqh_f16
448 // CHECK: [[TMP1:%.*]] = fcmp oeq half %a, %b
449 // CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
450 // CHECK: ret i16 [[TMP2]]
test_vceqh_f16(float16_t a,float16_t b)451 uint16_t test_vceqh_f16(float16_t a, float16_t b) {
452 return vceqh_f16(a, b);
453 }
454
455 // CHECK-LABEL: test_vcgeh_f16
456 // CHECK: [[TMP1:%.*]] = fcmp oge half %a, %b
457 // CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
458 // CHECK: ret i16 [[TMP2]]
test_vcgeh_f16(float16_t a,float16_t b)459 uint16_t test_vcgeh_f16(float16_t a, float16_t b) {
460 return vcgeh_f16(a, b);
461 }
462
463 // CHECK-LABEL: test_vcgth_f16
464 //CHECK: [[TMP1:%.*]] = fcmp ogt half %a, %b
465 // CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
466 // CHECK: ret i16 [[TMP2]]
test_vcgth_f16(float16_t a,float16_t b)467 uint16_t test_vcgth_f16(float16_t a, float16_t b) {
468 return vcgth_f16(a, b);
469 }
470
471 // CHECK-LABEL: test_vcleh_f16
472 // CHECK: [[TMP1:%.*]] = fcmp ole half %a, %b
473 // CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
474 // CHECK: ret i16 [[TMP2]]
test_vcleh_f16(float16_t a,float16_t b)475 uint16_t test_vcleh_f16(float16_t a, float16_t b) {
476 return vcleh_f16(a, b);
477 }
478
479 // CHECK-LABEL: test_vclth_f16
480 // CHECK: [[TMP1:%.*]] = fcmp olt half %a, %b
481 // CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16
482 // CHECK: ret i16 [[TMP2]]
test_vclth_f16(float16_t a,float16_t b)483 uint16_t test_vclth_f16(float16_t a, float16_t b) {
484 return vclth_f16(a, b);
485 }
486
487 // CHECK-LABEL: test_vcvth_n_f16_s16
488 // CHECK: [[SEXT:%.*]] = sext i16 %a to i32
489 // CHECK: [[CVT:%.*]] = call half @llvm.aarch64.neon.vcvtfxs2fp.f16.i32(i32 [[SEXT]], i32 1)
490 // CHECK: ret half [[CVT]]
test_vcvth_n_f16_s16(int16_t a)491 float16_t test_vcvth_n_f16_s16(int16_t a) {
492 return vcvth_n_f16_s16(a, 1);
493 }
494
495 // CHECK-LABEL: test_vcvth_n_f16_s32
496 // CHECK: [[CVT:%.*]] = call half @llvm.aarch64.neon.vcvtfxs2fp.f16.i32(i32 %a, i32 1)
497 // CHECK: ret half [[CVT]]
test_vcvth_n_f16_s32(int32_t a)498 float16_t test_vcvth_n_f16_s32(int32_t a) {
499 return vcvth_n_f16_s32(a, 1);
500 }
501
502 // CHECK-LABEL: test_vcvth_n_f16_s64
503 // CHECK: [[CVT:%.*]] = call half @llvm.aarch64.neon.vcvtfxs2fp.f16.i64(i64 %a, i32 1)
504 // CHECK: ret half [[CVT]]
test_vcvth_n_f16_s64(int64_t a)505 float16_t test_vcvth_n_f16_s64(int64_t a) {
506 return vcvth_n_f16_s64(a, 1);
507 }
508
509 // CHECK-LABEL: test_vcvth_n_s16_f16
510 // CHECK: [[CVT:%.*]] = call i32 @llvm.aarch64.neon.vcvtfp2fxs.i32.f16(half %a, i32 1)
511 // CHECK: [[RET:%.*]] = trunc i32 [[CVT]] to i16
512 // CHECK: ret i16 [[RET]]
test_vcvth_n_s16_f16(float16_t a)513 int16_t test_vcvth_n_s16_f16(float16_t a) {
514 return vcvth_n_s16_f16(a, 1);
515 }
516
517 // CHECK-LABEL: test_vcvth_n_s32_f16
518 // CHECK: [[CVT:%.*]] = call i32 @llvm.aarch64.neon.vcvtfp2fxs.i32.f16(half %a, i32 1)
519 // CHECK: ret i32 [[CVT]]
test_vcvth_n_s32_f16(float16_t a)520 int32_t test_vcvth_n_s32_f16(float16_t a) {
521 return vcvth_n_s32_f16(a, 1);
522 }
523
524 // CHECK-LABEL: test_vcvth_n_s64_f16
525 // CHECK: [[CVT:%.*]] = call i64 @llvm.aarch64.neon.vcvtfp2fxs.i64.f16(half %a, i32 1)
526 // CHECK: ret i64 [[CVT]]
test_vcvth_n_s64_f16(float16_t a)527 int64_t test_vcvth_n_s64_f16(float16_t a) {
528 return vcvth_n_s64_f16(a, 1);
529 }
530
531 // CHECK-LABEL: test_vcvth_n_f16_u16
532 // CHECK: [[SEXT:%.*]] = zext i16 %a to i32
533 // CHECK: [[CVT:%.*]] = call half @llvm.aarch64.neon.vcvtfxu2fp.f16.i32(i32 [[SEXT]], i32 1)
534 // CHECK: ret half [[CVT]]
test_vcvth_n_f16_u16(int16_t a)535 float16_t test_vcvth_n_f16_u16(int16_t a) {
536 return vcvth_n_f16_u16(a, 1);
537 }
538
539 // CHECK-LABEL: test_vcvth_n_f16_u32
540 // CHECK: [[CVT:%.*]] = call half @llvm.aarch64.neon.vcvtfxu2fp.f16.i32(i32 %a, i32 1)
541 // CHECK: ret half [[CVT]]
test_vcvth_n_f16_u32(int32_t a)542 float16_t test_vcvth_n_f16_u32(int32_t a) {
543 return vcvth_n_f16_u32(a, 1);
544 }
545
546 // CHECK-LABEL: test_vcvth_n_f16_u64
547 // CHECK: [[CVT:%.*]] = call half @llvm.aarch64.neon.vcvtfxu2fp.f16.i64(i64 %a, i32 1)
548 // CHECK: ret half [[CVT]]
test_vcvth_n_f16_u64(int64_t a)549 float16_t test_vcvth_n_f16_u64(int64_t a) {
550 return vcvth_n_f16_u64(a, 1);
551 }
552
553 // CHECK-LABEL: test_vcvth_n_u16_f16
554 // CHECK: [[CVT:%.*]] = call i32 @llvm.aarch64.neon.vcvtfp2fxu.i32.f16(half %a, i32 1)
555 // CHECK: [[RET:%.*]] = trunc i32 [[CVT]] to i16
556 // CHECK: ret i16 [[RET]]
test_vcvth_n_u16_f16(float16_t a)557 int16_t test_vcvth_n_u16_f16(float16_t a) {
558 return vcvth_n_u16_f16(a, 1);
559 }
560
561 // CHECK-LABEL: test_vcvth_n_u32_f16
562 // CHECK: [[CVT:%.*]] = call i32 @llvm.aarch64.neon.vcvtfp2fxu.i32.f16(half %a, i32 1)
563 // CHECK: ret i32 [[CVT]]
test_vcvth_n_u32_f16(float16_t a)564 int32_t test_vcvth_n_u32_f16(float16_t a) {
565 return vcvth_n_u32_f16(a, 1);
566 }
567
568 // CHECK-LABEL: test_vcvth_n_u64_f16
569 // CHECK: [[CVT:%.*]] = call i64 @llvm.aarch64.neon.vcvtfp2fxu.i64.f16(half %a, i32 1)
570 // CHECK: ret i64 [[CVT]]
test_vcvth_n_u64_f16(float16_t a)571 int64_t test_vcvth_n_u64_f16(float16_t a) {
572 return vcvth_n_u64_f16(a, 1);
573 }
574
575 // CHECK-LABEL: test_vdivh_f16
576 // CHECK: [[DIV:%.*]] = fdiv half %a, %b
577 // CHECK: ret half [[DIV]]
test_vdivh_f16(float16_t a,float16_t b)578 float16_t test_vdivh_f16(float16_t a, float16_t b) {
579 return vdivh_f16(a, b);
580 }
581
582 // CHECK-LABEL: test_vmaxh_f16
583 // CHECK: [[MAX:%.*]] = call half @llvm.aarch64.neon.fmax.f16(half %a, half %b)
584 // CHECK: ret half [[MAX]]
test_vmaxh_f16(float16_t a,float16_t b)585 float16_t test_vmaxh_f16(float16_t a, float16_t b) {
586 return vmaxh_f16(a, b);
587 }
588
589 // CHECK-LABEL: test_vmaxnmh_f16
590 // CHECK: [[MAX:%.*]] = call half @llvm.aarch64.neon.fmaxnm.f16(half %a, half %b)
591 // CHECK: ret half [[MAX]]
test_vmaxnmh_f16(float16_t a,float16_t b)592 float16_t test_vmaxnmh_f16(float16_t a, float16_t b) {
593 return vmaxnmh_f16(a, b);
594 }
595
596 // CHECK-LABEL: test_vminh_f16
597 // CHECK: [[MIN:%.*]] = call half @llvm.aarch64.neon.fmin.f16(half %a, half %b)
598 // CHECK: ret half [[MIN]]
test_vminh_f16(float16_t a,float16_t b)599 float16_t test_vminh_f16(float16_t a, float16_t b) {
600 return vminh_f16(a, b);
601 }
602
603 // CHECK-LABEL: test_vminnmh_f16
604 // CHECK: [[MIN:%.*]] = call half @llvm.aarch64.neon.fminnm.f16(half %a, half %b)
605 // CHECK: ret half [[MIN]]
test_vminnmh_f16(float16_t a,float16_t b)606 float16_t test_vminnmh_f16(float16_t a, float16_t b) {
607 return vminnmh_f16(a, b);
608 }
609
610 // CHECK-LABEL: test_vmulh_f16
611 // CHECK: [[MUL:%.*]] = fmul half %a, %b
612 // CHECK: ret half [[MUL]]
test_vmulh_f16(float16_t a,float16_t b)613 float16_t test_vmulh_f16(float16_t a, float16_t b) {
614 return vmulh_f16(a, b);
615 }
616
617 // CHECK-LABEL: test_vmulxh_f16
618 // CHECK: [[MUL:%.*]] = call half @llvm.aarch64.neon.fmulx.f16(half %a, half %b)
619 // CHECK: ret half [[MUL]]
test_vmulxh_f16(float16_t a,float16_t b)620 float16_t test_vmulxh_f16(float16_t a, float16_t b) {
621 return vmulxh_f16(a, b);
622 }
623
624 // CHECK-LABEL: test_vrecpsh_f16
625 // CHECK: [[RECPS:%.*]] = call half @llvm.aarch64.neon.frecps.f16(half %a, half %b)
626 // CHECK: ret half [[RECPS]]
test_vrecpsh_f16(float16_t a,float16_t b)627 float16_t test_vrecpsh_f16(float16_t a, float16_t b) {
628 return vrecpsh_f16(a, b);
629 }
630
631 // CHECK-LABEL: test_vrsqrtsh_f16
632 // CHECK: [[RSQRTS:%.*]] = call half @llvm.aarch64.neon.frsqrts.f16(half %a, half %b)
633 // CHECK: ret half [[RSQRTS]]
test_vrsqrtsh_f16(float16_t a,float16_t b)634 float16_t test_vrsqrtsh_f16(float16_t a, float16_t b) {
635 return vrsqrtsh_f16(a, b);
636 }
637
638 // CHECK-LABEL: test_vsubh_f16
639 // CHECK: [[SUB:%.*]] = fsub half %a, %b
640 // CHECK: ret half [[SUB]]
test_vsubh_f16(float16_t a,float16_t b)641 float16_t test_vsubh_f16(float16_t a, float16_t b) {
642 return vsubh_f16(a, b);
643 }
644
645 // CHECK-LABEL: test_vfmah_f16
646 // CHECK: [[FMA:%.*]] = call half @llvm.fma.f16(half %b, half %c, half %a)
647 // CHECK: ret half [[FMA]]
test_vfmah_f16(float16_t a,float16_t b,float16_t c)648 float16_t test_vfmah_f16(float16_t a, float16_t b, float16_t c) {
649 return vfmah_f16(a, b, c);
650 }
651
652 // CHECK-LABEL: test_vfmsh_f16
653 // CHECK: [[SUB:%.*]] = fsub half 0xH8000, %b
654 // CHECK: [[ADD:%.*]] = call half @llvm.fma.f16(half [[SUB]], half %c, half %a)
655 // CHECK: ret half [[ADD]]
test_vfmsh_f16(float16_t a,float16_t b,float16_t c)656 float16_t test_vfmsh_f16(float16_t a, float16_t b, float16_t c) {
657 return vfmsh_f16(a, b, c);
658 }
659
660