1/* ARM CPU Cores 2 Copyright (C) 2003-2013 Free Software Foundation, Inc. 3 Written by CodeSourcery, LLC 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3, or (at your option) 10 any later version. 11 12 GCC is distributed in the hope that it will be useful, but 13 WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING3. If not see 19 <http://www.gnu.org/licenses/>. */ 20 21/* Before using #include to read this file, define a macro: 22 23 ARM_CORE(CORE_NAME, CORE_IDENT, ARCH, FLAGS, COSTS) 24 25 The CORE_NAME is the name of the core, represented as a string constant. 26 The CORE_IDENT is the name of the core, represented as an identifier. 27 ARCH is the architecture revision implemented by the chip. 28 FLAGS are the bitwise-or of the traits that apply to that core. 29 This need not include flags implied by the architecture. 30 COSTS is the name of the rtx_costs routine to use. 31 32 If you update this table, you must update the "tune" attribute in 33 arm.md. 34 35 Some tools assume no whitespace up to the first "," in each entry. */ 36 37/* V2/V2A Architecture Processors */ 38ARM_CORE("arm2", arm2, 2, FL_CO_PROC | FL_MODE26, slowmul) 39ARM_CORE("arm250", arm250, 2, FL_CO_PROC | FL_MODE26, slowmul) 40ARM_CORE("arm3", arm3, 2, FL_CO_PROC | FL_MODE26, slowmul) 41 42/* V3 Architecture Processors */ 43ARM_CORE("arm6", arm6, 3, FL_CO_PROC | FL_MODE26, slowmul) 44ARM_CORE("arm60", arm60, 3, FL_CO_PROC | FL_MODE26, slowmul) 45ARM_CORE("arm600", arm600, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul) 46ARM_CORE("arm610", arm610, 3, FL_MODE26 | FL_WBUF, slowmul) 47ARM_CORE("arm620", arm620, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul) 48ARM_CORE("arm7", arm7, 3, FL_CO_PROC | FL_MODE26, slowmul) 49ARM_CORE("arm7d", arm7d, 3, FL_CO_PROC | FL_MODE26, slowmul) 50ARM_CORE("arm7di", arm7di, 3, FL_CO_PROC | FL_MODE26, slowmul) 51ARM_CORE("arm70", arm70, 3, FL_CO_PROC | FL_MODE26, slowmul) 52ARM_CORE("arm700", arm700, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul) 53ARM_CORE("arm700i", arm700i, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul) 54ARM_CORE("arm710", arm710, 3, FL_MODE26 | FL_WBUF, slowmul) 55ARM_CORE("arm720", arm720, 3, FL_MODE26 | FL_WBUF, slowmul) 56ARM_CORE("arm710c", arm710c, 3, FL_MODE26 | FL_WBUF, slowmul) 57ARM_CORE("arm7100", arm7100, 3, FL_MODE26 | FL_WBUF, slowmul) 58ARM_CORE("arm7500", arm7500, 3, FL_MODE26 | FL_WBUF, slowmul) 59/* Doesn't have an external co-proc, but does have embedded fpa. */ 60ARM_CORE("arm7500fe", arm7500fe, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul) 61 62/* V3M Architecture Processors */ 63/* arm7m doesn't exist on its own, but only with D, ("and", and I), but 64 those don't alter the code, so arm7m is sometimes used. */ 65ARM_CORE("arm7m", arm7m, 3M, FL_CO_PROC | FL_MODE26, fastmul) 66ARM_CORE("arm7dm", arm7dm, 3M, FL_CO_PROC | FL_MODE26, fastmul) 67ARM_CORE("arm7dmi", arm7dmi, 3M, FL_CO_PROC | FL_MODE26, fastmul) 68 69/* V4 Architecture Processors */ 70ARM_CORE("arm8", arm8, 4, FL_MODE26 | FL_LDSCHED, fastmul) 71ARM_CORE("arm810", arm810, 4, FL_MODE26 | FL_LDSCHED, fastmul) 72ARM_CORE("strongarm", strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) 73ARM_CORE("strongarm110", strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) 74ARM_CORE("strongarm1100", strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) 75ARM_CORE("strongarm1110", strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) 76ARM_CORE("fa526", fa526, 4, FL_LDSCHED, fastmul) 77ARM_CORE("fa626", fa626, 4, FL_LDSCHED, fastmul) 78 79/* V4T Architecture Processors */ 80ARM_CORE("arm7tdmi", arm7tdmi, 4T, FL_CO_PROC , fastmul) 81ARM_CORE("arm7tdmi-s", arm7tdmis, 4T, FL_CO_PROC , fastmul) 82ARM_CORE("arm710t", arm710t, 4T, FL_WBUF, fastmul) 83ARM_CORE("arm720t", arm720t, 4T, FL_WBUF, fastmul) 84ARM_CORE("arm740t", arm740t, 4T, FL_WBUF, fastmul) 85ARM_CORE("arm9", arm9, 4T, FL_LDSCHED, fastmul) 86ARM_CORE("arm9tdmi", arm9tdmi, 4T, FL_LDSCHED, fastmul) 87ARM_CORE("arm920", arm920, 4T, FL_LDSCHED, fastmul) 88ARM_CORE("arm920t", arm920t, 4T, FL_LDSCHED, fastmul) 89ARM_CORE("arm922t", arm922t, 4T, FL_LDSCHED, fastmul) 90ARM_CORE("arm940t", arm940t, 4T, FL_LDSCHED, fastmul) 91ARM_CORE("ep9312", ep9312, 4T, FL_LDSCHED, fastmul) 92 93/* V5T Architecture Processors */ 94ARM_CORE("arm10tdmi", arm10tdmi, 5T, FL_LDSCHED, fastmul) 95ARM_CORE("arm1020t", arm1020t, 5T, FL_LDSCHED, fastmul) 96 97/* V5TE Architecture Processors */ 98ARM_CORE("arm9e", arm9e, 5TE, FL_LDSCHED, 9e) 99ARM_CORE("arm946e-s", arm946es, 5TE, FL_LDSCHED, 9e) 100ARM_CORE("arm966e-s", arm966es, 5TE, FL_LDSCHED, 9e) 101ARM_CORE("arm968e-s", arm968es, 5TE, FL_LDSCHED, 9e) 102ARM_CORE("arm10e", arm10e, 5TE, FL_LDSCHED, fastmul) 103ARM_CORE("arm1020e", arm1020e, 5TE, FL_LDSCHED, fastmul) 104ARM_CORE("arm1022e", arm1022e, 5TE, FL_LDSCHED, fastmul) 105ARM_CORE("xscale", xscale, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE, xscale) 106ARM_CORE("iwmmxt", iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale) 107ARM_CORE("iwmmxt2", iwmmxt2, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2, xscale) 108ARM_CORE("fa606te", fa606te, 5TE, FL_LDSCHED, 9e) 109ARM_CORE("fa626te", fa626te, 5TE, FL_LDSCHED, 9e) 110ARM_CORE("fmp626", fmp626, 5TE, FL_LDSCHED, 9e) 111ARM_CORE("fa726te", fa726te, 5TE, FL_LDSCHED, fa726te) 112 113/* V5TEJ Architecture Processors */ 114ARM_CORE("arm926ej-s", arm926ejs, 5TEJ, FL_LDSCHED, 9e) 115ARM_CORE("arm1026ej-s", arm1026ejs, 5TEJ, FL_LDSCHED, 9e) 116 117/* V6 Architecture Processors */ 118ARM_CORE("arm1136j-s", arm1136js, 6J, FL_LDSCHED, 9e) 119ARM_CORE("arm1136jf-s", arm1136jfs, 6J, FL_LDSCHED | FL_VFPV2, 9e) 120ARM_CORE("arm1176jz-s", arm1176jzs, 6ZK, FL_LDSCHED, 9e) 121ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e) 122ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e) 123ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e) 124ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, v6t2) 125ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, v6t2) 126ARM_CORE("generic-armv7-a", genericv7a, 7A, FL_LDSCHED, cortex) 127ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, cortex_a5) 128ARM_CORE("cortex-a7", cortexa7, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex) 129ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, cortex) 130ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, cortex_a9) 131ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15) 132ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, cortex) 133ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, cortex) 134ARM_CORE("cortex-r5", cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex) 135ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, cortex) 136ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, cortex) 137ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, v6m) 138ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, v6m) 139ARM_CORE("cortex-m0plus", cortexm0plus, 6M, FL_LDSCHED, v6m) 140ARM_CORE("marvell-pj4", marvell_pj4, 7A, FL_LDSCHED, 9e) 141