1 /*
2  * MSP_FET_init.c
3  *
4  * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  *
7  *  Redistribution and use in source and binary forms, with or without
8  *  modification, are permitted provided that the following conditions
9  *  are met:
10  *
11  *    Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  *
14  *    Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the
17  *    distribution.
18  *
19  *    Neither the name of Texas Instruments Incorporated nor the names of
20  *    its contributors may be used to endorse or promote products derived
21  *    from this software without specific prior written permission.
22  *
23  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
26  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
27  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
29  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 
37 #include "init.h"
38 #include "hw_compiler_specific.h"
39 
init_BiosPorts(void)40 void init_BiosPorts(void)
41 {
42 	// Ports all back to reset state
43     P1DIR = 0;  P2DIR = 0;  P3DIR = 0;    // Reset all ports direction to be inputs
44     P4DIR = 0;  P5DIR = 0;  P6DIR = 0;
45     P7DIR = 0;  P8DIR = 0;  P9DIR = 0;
46     P1SEL = 0;  P2SEL = 0;  P3SEL = 0;    // Reset all ports alternate function
47     P4SEL = 0;  P5SEL = 0;  P6SEL = 0;
48     P7SEL = 0;  P8SEL = 0;  P9SEL = 0;
49     P1OUT = 0;  P2OUT = 0;  P3OUT = 0;    // Reset all port output registers
50     P4OUT = 0;  P5OUT = 0;  P6OUT = 0;
51     P7OUT = 0;  P8OUT = 0;  P9OUT = 0;
52 
53     // Port2
54     //  P2.0 <- DCDC_PULSE
55     //  P2.1 <- UART_RTS
56     //  P2.2 -> CMD[0]
57     //  P2.3 -> CMD[1]
58     //  P2.4 -> CMD[2]
59     //  P2.5 -> CMD[3]
60     //  P2.6 -> WR_TRIG
61     //  P2.7 -> SYS_CLK
62     //P2SEL = BIT0;
63 
64     // Port5
65     //  P5.0 -> VREF+ (output of reference voltage to ADC)
66     //  P5.1 -> FPGA_RESET
67     //  P5.2 -> VF2TEST_CTRL
68     //  P5.3 -> LED1
69     //  P5.4 -> VF2TDI_CTRL
70     //  P5.5 -> TDIOFF_CTRL (0 = turns off TDI, after that ok to select VF for fuse blowing)
71     //  P5.6 <- MCU_DMAE0 / RD_TRIG (DMA trigger input)
72     //  P5.7 -> DCDC_IO1
73     P5DIR |= (BIT3 | BIT4 | BIT5 | BIT7);	// set pins initially to output direction
74     //P5SEL = (BIT0);
75     P5OUT = (BIT5);
76     P5OUT &= ~BIT7;
77 
78 
79       // Port6
80       //  P6.0 <- A_VBUS5 (input to ADC channel A0)
81       //  P6.1 <- A_VCC_SUPPLY
82       //  P6.2 <- A_VF
83       //  P6.3 <- A_VCC_SENSE0_TRGT
84       //  P6.4 <- A_VCC_DT
85       //  P6.5 <- A_VCC_DT_BSR
86       //  P6.6 -> VCC_JTAGLDO2TRGT_CTRL
87       //  P6.7 -> LED0
88       P6DIR |= (BIT7);	// set pins initially to output direction
89       //P6SEL = (BIT0+BIT1+BIT2+BIT3+BIT4+BIT5);
90 
91       // Port7
92       //  P7.0 -> n/c
93       //  P7.1 -> n/c
94       //  P7.2 <- XT2IN
95       //  P7.3 -> XT2OUT
96       //  P7.4 -> DCDC_TEST
97       //  P7.5 -> DCDC_RST (0 = reset)
98       //  P7.6 -> VCC_DT_REF
99       //  P7.7 -> VCC_DCDC_REF
100       P7DIR |= (BIT0+BIT1);	        // set pins initially to output direction
101       P7SEL |= (BIT6+BIT7);	        // set pins to alternate port function BIT2+BIT3
102 
103       // Port8
104       //  P8.0 -> VCC_DT2TRGT_CTRL (control signal to switches to provide debug signals to target via JTAG.x)
105       //  P8.1 -> IO_CTRL
106       //  P8.2 -> UART_TXD
107       P8DIR |= BIT3; // set UART_TXD to output direction\r
108       //  P8.3 <- UART_RXD
109     //  P8.4 <- DCDC_IO0
110       //  P8.5 -> HOST_SDA
111       //  P8.6 -> HOST_SCL
112       //  P8.7 -> VCC_SUPPLY2TRGT_CTRL (DCDC VCC to target VCC)
113       P8DIR |= (BIT0+BIT7);	        // set pins initially to output direction
114 }
115