1 /* 2 * $Id: flash.h,v 1.4 2005/09/29 11:13:32 telka Exp $ 3 * 4 * H8/3048 Flash Registers 5 * Copyright (C) 2005 Elcom s.r.o. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of the copyright holders nor the names of its contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * Written by Branislav Petrovsky <brano111@szm.sk>, 2005. 32 * 33 * Documentation: 34 * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer 35 * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", 36 * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E 37 * 38 */ 39 40 #ifndef H83048_FLASH_H 41 #define H83048_FLASH_H 42 43 #include <openwince.h> 44 45 #ifndef __ASSEMBLY__ 46 #include <stdint.h> 47 #endif 48 49 /* FLASH registers */ 50 51 #define FLASH_BASE 0xffff40 52 53 #ifndef __ASSEMBLY__ 54 typedef volatile struct FLASH_registers { 55 uint8_t flmcr; 56 uint8_t __reserved1; 57 uint8_t ebr1; 58 uint8_t ebr2; 59 uint8_t __reserved2[4]; 60 uint8_t ramcr; 61 } FLASH_registers_t; 62 63 #define FLASH_pointer ((FLASH_registers_t*) FLASH_BASE) 64 65 #define FLMCR FLASH_pointer->flmcr 66 #define EBR1 FLASH_pointer->ebr1 67 #define EBR2 FLASH_pointer->ebr2 68 #define RAMCR FLASH_pointer->ramcr 69 #endif /* __ASSEMBLY__ */ 70 71 #define FLMCR_OFFSET 0x00 72 #define EBR1_OFFSET 0x02 73 #define EBR2_OFFSET 0x03 74 #define RAMCR_OFFSET 0x08 75 76 /* FLMCR bits */ 77 #define FLMCR_VPP bit(7) 78 #define FLMCR_VPPE bit(6) 79 #define FLMCR_EV bit(3) 80 #define FLMCR_PV bit(2) 81 #define FLMCR_E bit(1) 82 #define FLMCR_P bit(0) 83 84 /* EBR1 bits */ 85 #define EBR1_LB7 bit(7) 86 #define EBR1_LB6 bit(6) 87 #define EBR1_LB5 bit(5) 88 #define EBR1_LB4 bit(4) 89 #define EBR1_LB3 bit(3) 90 #define EBR1_LB2 bit(2) 91 #define EBR1_LB1 bit(1) 92 #define EBR1_LB0 bit(0) 93 94 /* EBR2 bits */ 95 #define EBR2_SB7 bit(7) 96 #define EBR2_SB6 bit(6) 97 #define EBR2_SB5 bit(5) 98 #define EBR2_SB4 bit(4) 99 #define EBR2_SB3 bit(3) 100 #define EBR2_SB2 bit(2) 101 #define EBR2_SB1 bit(1) 102 #define EBR2_SB0 bit(0) 103 104 /* RAMCR bits */ 105 #define RAMCR_FLER bit(7) 106 #define RAMCR_RAMS bit(3) 107 #define RAMCR_RAM_MASK bits(2,0) 108 #define RAMCR_RAM(x) bits_val(2,0,x) 109 #define get_RAMCR_RAM(x) bits_get(2,0,x) 110 111 #endif /* H83048_FLASH_H */ 112