1 /* Common hooks of Andes NDS32 cpu for GNU compiler
2 Copyright (C) 2012-2018 Free Software Foundation, Inc.
3 Contributed by Andes Technology Corporation.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21 #include "config.h"
22 #include "system.h"
23 #include "coretypes.h"
24 #include "diagnostic-core.h"
25 #include "tm.h"
26 #include "common/common-target.h"
27 #include "common/common-target-def.h"
28 #include "opts.h"
29 #include "flags.h"
30
31 /* ------------------------------------------------------------------------ */
32
33 /* Implement TARGET_HANDLE_OPTION. */
34 static bool
nds32_handle_option(struct gcc_options * opts ATTRIBUTE_UNUSED,struct gcc_options * opts_set ATTRIBUTE_UNUSED,const struct cl_decoded_option * decoded,location_t loc)35 nds32_handle_option (struct gcc_options *opts ATTRIBUTE_UNUSED,
36 struct gcc_options *opts_set ATTRIBUTE_UNUSED,
37 const struct cl_decoded_option *decoded,
38 location_t loc)
39 {
40 size_t code = decoded->opt_index;
41 int value = decoded->value;
42
43 switch (code)
44 {
45 case OPT_misr_vector_size_:
46 /* Check the valid vector size: 4 or 16. */
47 if (value != 4 && value != 16)
48 {
49 error_at (loc, "for the option -misr-vector-size=X, the valid X "
50 "must be: 4 or 16");
51 return false;
52 }
53
54 return true;
55
56 case OPT_mcache_block_size_:
57 /* Check valid value: 4 8 16 32 64 128 256 512. */
58 if (exact_log2 (value) < 2 || exact_log2 (value) > 9)
59 {
60 error_at (loc, "for the option -mcache-block-size=X, the valid X "
61 "must be: 4, 8, 16, 32, 64, 128, 256, or 512");
62 return false;
63 }
64
65 return true;
66
67 default:
68 return true;
69 }
70 }
71
72 /* ------------------------------------------------------------------------ */
73
74 /* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */
75 static const struct default_options nds32_option_optimization_table[] =
76 {
77 /* Enable -fsched-pressure by default at -O1 and above. */
78 { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
79 /* Enable -fomit-frame-pointer by default at all optimization levels. */
80 { OPT_LEVELS_ALL, OPT_fomit_frame_pointer, NULL, 1 },
81 /* Enable -mrelax-hint by default at all optimization levels. */
82 { OPT_LEVELS_ALL, OPT_mrelax_hint, NULL, 1 },
83 /* Enable -mv3push by default at -Os, but it is useless under V2 ISA. */
84 { OPT_LEVELS_SIZE, OPT_mv3push, NULL, 1 },
85
86 { OPT_LEVELS_NONE, 0, NULL, 0 }
87 };
88
89 /* ------------------------------------------------------------------------ */
90
91 /* Run-time Target Specification. */
92
93 /* The default target flags consist of
94 TARGET_CPU_DEFAULT and other MASK_XXX flags.
95
96 The value of TARGET_CPU_DEFAULT is set by
97 the process of 'configure' and 'make' stage.
98 Please check gcc/config.gcc for more implementation detail.
99
100 Other MASK_XXX flags are set individually.
101 By default we enable
102 TARGET_16_BIT : Generate 16/32 bit mixed length instruction.
103 TARGET_EXT_PERF : Generate performance extention instrcution.
104 TARGET_EXT_PERF2 : Generate performance extention version 2 instrcution.
105 TARGET_EXT_STRING : Generate string extention instrcution.
106 TARGET_CMOV : Generate conditional move instruction. */
107 #undef TARGET_DEFAULT_TARGET_FLAGS
108 #define TARGET_DEFAULT_TARGET_FLAGS \
109 (TARGET_CPU_DEFAULT \
110 | TARGET_DEFAULT_FPU_ISA \
111 | TARGET_DEFAULT_FPU_FMA \
112 | MASK_16_BIT \
113 | MASK_EXT_PERF \
114 | MASK_EXT_PERF2 \
115 | MASK_EXT_STRING \
116 | MASK_CMOV)
117
118 #undef TARGET_HANDLE_OPTION
119 #define TARGET_HANDLE_OPTION nds32_handle_option
120
121 #undef TARGET_OPTION_OPTIMIZATION_TABLE
122 #define TARGET_OPTION_OPTIMIZATION_TABLE nds32_option_optimization_table
123
124
125 /* Defining the Output Assembler Language. */
126
127 #undef TARGET_EXCEPT_UNWIND_INFO
128 #define TARGET_EXCEPT_UNWIND_INFO sjlj_except_unwind_info
129
130 /* ------------------------------------------------------------------------ */
131
132 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
133
134 /* ------------------------------------------------------------------------ */
135