1 /* tc-tic80.c -- Assemble for the TI TMS320C80 (MV)
2    Copyright 1996, 1997, 2000, 2001, 2002, 2005
3    Free Software Foundation, Inc.
4 
5    This file is part of GAS, the GNU Assembler.
6 
7    GAS is free software; you can redistribute it and/or modify
8    it under the terms of the GNU General Public License as published by
9    the Free Software Foundation; either version 2, or (at your option)
10    any later version.
11 
12    GAS is distributed in the hope that it will be useful,
13    but WITHOUT ANY WARRANTY; without even the implied warranty of
14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15    GNU General Public License for more details.
16 
17    You should have received a copy of the GNU General Public License
18    along with GAS; see the file COPYING.  If not, write to the Free
19    Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20    02111-1307, USA.  */
21 
22 #include "as.h"
23 #include "safe-ctype.h"
24 #include "opcode/tic80.h"
25 
26 #define internal_error(what) \
27   as_fatal (_("internal error:%s:%d: %s\n"), __FILE__, __LINE__, what)
28 
29 #define internal_error_a(what,arg) \
30   as_fatal (_("internal error:%s:%d: %s %ld\n"), __FILE__, __LINE__, what, arg)
31 
32 /* Generic assembler global variables which must be defined by all
33    targets.  */
34 
35 /* Characters which always start a comment.  */
36 const char comment_chars[] = ";";
37 
38 /* Characters which start a comment at the beginning of a line.  */
39 const char line_comment_chars[] = ";*#";
40 
41 /* Characters which may be used to separate multiple commands on a single
42    line. The semicolon is such a character by default and should not be
43    explicitly listed.  */
44 const char line_separator_chars[] = "";
45 
46 /* Characters which are used to indicate an exponent in a floating
47    point number.  */
48 const char EXP_CHARS[] = "eE";
49 
50 /* Characters which mean that a number is a floating point constant,
51    as in 0f1.0.  */
52 const char FLT_CHARS[] = "fF";
53 
54 /* This table describes all the machine specific pseudo-ops the assembler
55    has to support.  The fields are:
56 
57    pseudo-op name without dot
58    function to call to execute this pseudo-op
59    integer arg to pass to the function  */
60 
61 const pseudo_typeS md_pseudo_table[] = {
62   { "align",	s_align_bytes,		4 },	/* Do byte alignment, default is a 4 byte boundary  */
63   { "word",	cons,			4 },	/* FIXME: Should this be machine independent?  */
64   { "bss",	s_lcomm_bytes,		1 },
65   { "sect",	obj_coff_section,	0},	/* For compatibility with TI tools  */
66   { "section",	obj_coff_section,	0},	/* Standard COFF .section pseudo-op  */
67   { NULL,	NULL,			0 }
68 };
69 
70 /* Opcode hash table.  */
71 static struct hash_control *tic80_hash;
72 
73 static struct tic80_opcode * find_opcode PARAMS ((struct tic80_opcode *, expressionS []));
74 static void build_insn PARAMS ((struct tic80_opcode *, expressionS *));
75 static int get_operands PARAMS ((expressionS exp[]));
76 static int const_overflow PARAMS ((unsigned long num, int bits, int flags));
77 
78 /* Replace short PC relative instructions with long form when
79    necessary.  Currently this is off by default or when given the
80    -no-relax option.  Turning it on by using the -relax option forces
81    all PC relative instructions to use the long form, which is why it
82    is currently not the default.  */
83 static int tic80_relax = 0;
84 
85 int
md_estimate_size_before_relax(fragP,segment_type)86 md_estimate_size_before_relax (fragP, segment_type)
87      fragS *fragP ATTRIBUTE_UNUSED;
88      segT segment_type ATTRIBUTE_UNUSED;
89 {
90   internal_error (_("Relaxation is a luxury we can't afford"));
91   return (-1);
92 }
93 
94 /* We have no need to default values of symbols.  */
95 
96 symbolS *
md_undefined_symbol(name)97 md_undefined_symbol (name)
98      char *name ATTRIBUTE_UNUSED;
99 {
100   return 0;
101 }
102 
103 /* Turn a string in input_line_pointer into a floating point constant
104    of type TYPE, and store the appropriate bytes in *LITP.  The number
105    of LITTLENUMS emitted is stored in *SIZEP.  An error message is
106    returned, or NULL on OK.  */
107 
108 #define MAX_LITTLENUMS 4
109 
110 char *
md_atof(type,litP,sizeP)111 md_atof (type, litP, sizeP)
112      int type;
113      char *litP;
114      int *sizeP;
115 {
116   int prec;
117   LITTLENUM_TYPE words[MAX_LITTLENUMS];
118   LITTLENUM_TYPE *wordP;
119   char *t;
120 
121   switch (type)
122     {
123     case 'f':
124     case 'F':
125     case 's':
126     case 'S':
127       prec = 2;
128       break;
129 
130     case 'd':
131     case 'D':
132     case 'r':
133     case 'R':
134       prec = 4;
135       break;
136 
137     default:
138       *sizeP = 0;
139       return _("bad call to md_atof ()");
140     }
141 
142   t = atof_ieee (input_line_pointer, type, words);
143   if (t)
144     {
145       input_line_pointer = t;
146     }
147 
148   *sizeP = prec * sizeof (LITTLENUM_TYPE);
149 
150   for (wordP = words; prec--;)
151     {
152       md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE));
153       litP += sizeof (LITTLENUM_TYPE);
154     }
155   return (NULL);
156 }
157 
158 /* Check to see if the constant value in NUM will fit in a field of
159    width BITS if it has flags FLAGS.  */
160 
161 static int
const_overflow(num,bits,flags)162 const_overflow (num, bits, flags)
163      unsigned long num;
164      int bits;
165      int flags;
166 {
167   long min, max;
168   int retval = 0;
169 
170   /* Only need to check fields less than 32 bits wide.  */
171   if (bits >= 32)
172     return retval;
173 
174   if (flags & TIC80_OPERAND_SIGNED)
175     {
176       max = (1 << (bits - 1)) - 1;
177       min = - (1 << (bits - 1));
178       retval = (long) num > max || (long) num < min;
179     }
180   else
181     {
182       max = (1 << bits) - 1;
183       retval = num > (unsigned long) max;
184     }
185   return retval;
186 }
187 
188 /* get_operands () parses a string of operands and fills in a passed
189    array of expressions in EXP.
190 
191    Note that we use O_absent expressions to record additional information
192    about the previous non-O_absent expression, such as ":m" or ":s"
193    modifiers or register numbers enclosed in parens like "(r10)".
194 
195    Returns the number of expressions that were placed in EXP.  */
196 
197 static int
get_operands(exp)198 get_operands (exp)
199      expressionS exp[];
200 {
201   char *p = input_line_pointer;
202   int numexp = 0;
203   int parens = 0;
204 
205   while (*p)
206     {
207       /* Skip leading whitespace.  */
208       while (*p == ' ' || *p == '\t' || *p == ',')
209 	p++;
210 
211       /* Check to see if we have any operands left to parse.  */
212       if (*p == 0 || *p == '\n' || *p == '\r')
213 	break;
214 
215       /* Notice scaling or direct memory operand modifiers and save them in
216 	 an O_absent expression after the expression that they modify.  */
217 
218       if (*p == ':')
219 	{
220 	  p++;
221 	  exp[numexp].X_op = O_absent;
222 	  if (*p == 'm')
223 	    {
224 	      p++;
225 	      /* This is a ":m" modifier.  */
226 	      exp[numexp].X_add_number = TIC80_OPERAND_M_SI | TIC80_OPERAND_M_LI;
227 	    }
228 	  else if (*p == 's')
229 	    {
230 	      p++;
231 	      /* This is a ":s" modifier.  */
232 	      exp[numexp].X_add_number = TIC80_OPERAND_SCALED;
233 	    }
234 	  else
235 	    {
236 	      as_bad (_("':' not followed by 'm' or 's'"));
237 	    }
238 	  numexp++;
239 	  continue;
240 	}
241 
242       /* Handle leading '(' on operands that use them, by recording that we
243 	 have entered a paren nesting level and then continuing.  We complain
244 	 about multiple nesting.  */
245 
246       if (*p == '(')
247 	{
248 	  if (++parens != 1)
249 	    as_bad (_("paren nesting"));
250 
251 	  p++;
252 	  continue;
253 	}
254 
255       /* Handle trailing ')' on operands that use them, by reducing the
256 	 nesting level and then continuing.  We complain if there were too
257 	 many closures.  */
258 
259       if (*p == ')')
260 	{
261 	  /* Record that we have left a paren group and continue.  */
262 	  if (--parens < 0)
263 	    as_bad (_("mismatched parenthesis"));
264 
265 	  p++;
266 	  continue;
267 	}
268 
269       /* Begin operand parsing at the current scan point.  */
270 
271       input_line_pointer = p;
272       expression (&exp[numexp]);
273 
274       if (exp[numexp].X_op == O_illegal)
275 	{
276 	  as_bad (_("illegal operand"));
277 	}
278       else if (exp[numexp].X_op == O_absent)
279 	{
280 	  as_bad (_("missing operand"));
281 	}
282 
283       numexp++;
284       p = input_line_pointer;
285     }
286 
287   if (parens)
288     {
289       exp[numexp].X_op = O_absent;
290       exp[numexp++].X_add_number = TIC80_OPERAND_PARENS;
291     }
292 
293   /* Mark the end of the valid operands with an illegal expression.  */
294   exp[numexp].X_op = O_illegal;
295 
296   return (numexp);
297 }
298 
299 /* find_opcode() gets a pointer to the entry in the opcode table that
300    matches the instruction being assembled, or returns NULL if no such match
301    is found.
302 
303    First it parses all the operands and save them as expressions.  Note that
304    we use O_absent expressions to record additional information about the
305    previous non-O_absent expression, such as ":m" or ":s" modifiers or
306    register numbers enclosed in parens like "(r10)".
307 
308    It then looks at all opcodes with the same name and uses the operands to
309    choose the correct opcode.  */
310 
311 static struct tic80_opcode *
find_opcode(opcode,myops)312 find_opcode (opcode, myops)
313      struct tic80_opcode *opcode;
314      expressionS myops[];
315 {
316   int numexp;				/* Number of expressions from parsing operands */
317   int expi;				/* Index of current expression to match */
318   int opi;				/* Index of current operand to match */
319   int match = 0;			/* Set to 1 when an operand match is found */
320   struct tic80_opcode *opc = opcode;	/* Pointer to current opcode table entry */
321   const struct tic80_opcode *end;	/* Pointer to end of opcode table */
322 
323   /* First parse all the operands so we only have to do it once.  There may
324      be more expressions generated than there are operands.  */
325 
326   numexp = get_operands (myops);
327 
328   /* For each opcode with the same name, try to match it against the parsed
329      operands.  */
330 
331   end = tic80_opcodes + tic80_num_opcodes;
332   while (!match && (opc < end) && (strcmp (opc->name, opcode->name) == 0))
333     {
334       /* Start off assuming a match.  If we find a mismatch, then this is
335 	 reset and the operand/expr matching loop terminates with match
336 	 equal to zero, which allows us to try the next opcode.  */
337 
338       match = 1;
339 
340       /* For each expression, try to match it against the current operand
341 	 for the current opcode.  Upon any mismatch, we abandon further
342 	 matching for the current opcode table entry.  */
343 
344       for (expi = 0, opi = -1; (expi < numexp) && match; expi++)
345 	{
346 	  int bits, flags, X_op, num;
347 
348 	  X_op = myops[expi].X_op;
349 	  num = myops[expi].X_add_number;
350 
351 	  /* The O_absent expressions apply to the same operand as the most
352 	     recent non O_absent expression.  So only increment the operand
353 	     index when the current expression is not one of these special
354 	     expressions.  */
355 
356 	  if (X_op != O_absent)
357 	    {
358 	      opi++;
359 	    }
360 
361 	  flags = tic80_operands[opc->operands[opi]].flags;
362 	  bits  = tic80_operands[opc->operands[opi]].bits;
363 
364 	  switch (X_op)
365 	    {
366 	    case O_register:
367 	      /* Also check that registers that are supposed to be
368 		 even actually are even.  */
369 	      if (((flags & TIC80_OPERAND_GPR) != (num & TIC80_OPERAND_GPR)) ||
370 		  ((flags & TIC80_OPERAND_FPA) != (num & TIC80_OPERAND_FPA)) ||
371 		  ((flags & TIC80_OPERAND_CR) != (num & TIC80_OPERAND_CR)) ||
372 		  ((flags & TIC80_OPERAND_EVEN) && (num & 1)) ||
373 		  const_overflow (num & ~TIC80_OPERAND_MASK, bits, flags))
374 		{
375 		  match = 0;
376 		}
377 	      break;
378 	    case O_constant:
379 	      if ((flags & TIC80_OPERAND_ENDMASK) && (num == 32))
380 		{
381 		  /* Endmask values of 0 and 32 give identical
382                      results.  */
383 		  num = 0;
384 		}
385 	      if ((flags & (TIC80_OPERAND_FPA | TIC80_OPERAND_GPR)) ||
386 		  const_overflow (num, bits, flags))
387 		{
388 		  match = 0;
389 		}
390 	      break;
391 	    case O_symbol:
392 	      if ((bits < 32) && (flags & TIC80_OPERAND_PCREL)
393 		  && !tic80_relax)
394 		{
395 		  /* The default is to prefer the short form of PC
396 		     relative relocations.  This is the only form that
397 		     the TI assembler supports.  If the -relax option
398 		     is given, we never use the short forms.
399 		     FIXME: Should be able to choose "best-fit".  */
400 		}
401 	      else if ((bits == 32))
402 		{
403 		  /* The default is to prefer the long form of base
404 		     relative relocations.  This is the only form that
405 		     the TI assembler supports.  If the -no-relax
406 		     option is given, we always use the long form of
407 		     PC relative relocations.
408 		     FIXME: Should be able to choose "best-fit".  */
409 		}
410 	      else
411 		{
412 		  /* Symbols that don't match one of the above cases are
413 		     rejected as an operand.  */
414 		  match = 0;
415 		}
416 	      break;
417 	    case O_absent:
418 	      /* If this is an O_absent expression, then it may be an
419 		 expression that supplies additional information about
420 		 the operand, such as ":m" or ":s" modifiers. Check to
421 		 see that the operand matches this requirement.  */
422 	      if (!((num & flags & TIC80_OPERAND_M_SI)
423 		    || (num & flags & TIC80_OPERAND_M_LI)
424 		    || (num & flags & TIC80_OPERAND_SCALED)))
425 		{
426 		  match = 0;
427 		}
428 	      break;
429 	    case O_big:
430 	      if ((num > 0) || !(flags & TIC80_OPERAND_FLOAT))
431 		{
432 		  match = 0;
433 		}
434 	      break;
435 	    case O_illegal:
436 	    case O_symbol_rva:
437 	    case O_uminus:
438 	    case O_bit_not:
439 	    case O_logical_not:
440 	    case O_multiply:
441 	    case O_divide:
442 	    case O_modulus:
443 	    case O_left_shift:
444 	    case O_right_shift:
445 	    case O_bit_inclusive_or:
446 	    case O_bit_or_not:
447 	    case O_bit_exclusive_or:
448 	    case O_bit_and:
449 	    case O_add:
450 	    case O_subtract:
451 	    case O_eq:
452 	    case O_ne:
453 	    case O_lt:
454 	    case O_le:
455 	    case O_ge:
456 	    case O_gt:
457 	    case O_logical_and:
458 	    case O_logical_or:
459 	    case O_max:
460 	    default:
461 	      internal_error_a (_("unhandled expression type"), (long) X_op);
462 	    }
463 	}
464       if (!match)
465 	opc++;
466     }
467 
468   return (match ? opc : NULL);
469 
470 }
471 
472 /* build_insn takes a pointer to the opcode entry in the opcode table
473    and the array of operand expressions and writes out the instruction.
474 
475    Note that the opcode word and extended word may be written to different
476    frags, with the opcode at the end of one frag and the extension at the
477    beginning of the next.  */
478 
479 static void
build_insn(opcode,opers)480 build_insn (opcode, opers)
481      struct tic80_opcode *opcode;
482      expressionS *opers;
483 {
484   int expi;				/* Index of current expression to match */
485   int opi;				/* Index of current operand to match */
486   unsigned long insn[2];		/* Instruction and long immediate (if any) */
487   char *f;				/* Pointer to frag location for insn[0] */
488   fragS *ffrag;				/* Frag containing location f */
489   char *fx = NULL;			/* Pointer to frag location for insn[1] */
490   fragS *fxfrag;			/* Frag containing location fx */
491 
492   /* Start with the raw opcode bits from the opcode table.  */
493   insn[0] = opcode->opcode;
494   insn[1] = 0;
495 
496   /* We are going to insert at least one 32 bit opcode so get the
497      frag now.  */
498 
499   f = frag_more (4);
500   ffrag = frag_now;
501 
502   /* For each operand expression, insert the appropriate bits into the
503      instruction.  */
504   for (expi = 0, opi = -1; opers[expi].X_op != O_illegal; expi++)
505     {
506       int bits, shift, flags, X_op, num;
507 
508       X_op = opers[expi].X_op;
509       num = opers[expi].X_add_number;
510 
511       /* The O_absent expressions apply to the same operand as the most
512 	 recent non O_absent expression.  So only increment the operand
513 	 index when the current expression is not one of these special
514 	 expressions.  */
515 
516       if (X_op != O_absent)
517 	{
518 	  opi++;
519 	}
520 
521       flags = tic80_operands[opcode->operands[opi]].flags;
522       bits  = tic80_operands[opcode->operands[opi]].bits;
523       shift = tic80_operands[opcode->operands[opi]].shift;
524 
525       switch (X_op)
526 	{
527 	case O_register:
528 	  num &= ~TIC80_OPERAND_MASK;
529 	  insn[0] = insn[0] | (num << shift);
530 	  break;
531 	case O_constant:
532 	  if ((flags & TIC80_OPERAND_ENDMASK) && (num == 32))
533 	    {
534 	      /* Endmask values of 0 and 32 give identical results.  */
535 	      num = 0;
536 	    }
537 	  else if ((flags & TIC80_OPERAND_BITNUM))
538 	    {
539 	      /* BITNUM values are stored in one's complement form.  */
540 	      num = (~num & 0x1F);
541 	    }
542 	  /* Mask off upper bits, just it case it is signed and is
543 	     negative.  */
544 	  if (bits < 32)
545 	    {
546 	      num &= (1 << bits) - 1;
547 	      insn[0] = insn[0] | (num << shift);
548 	    }
549 	  else
550 	    {
551 	      fx = frag_more (4);
552 	      fxfrag = frag_now;
553 	      insn[1] = num;
554 	    }
555 	  break;
556 	case O_symbol:
557 	  if (bits == 32)
558 	    {
559 	      fx = frag_more (4);
560 	      fxfrag = frag_now;
561 	      insn[1] = 0;
562 	      if (flags & TIC80_OPERAND_PCREL)
563 		{
564 		  fix_new_exp (fxfrag,
565 			       fx - (fxfrag->fr_literal),
566 			       4,
567 			       &opers[expi],
568 			       1,
569 			       R_MPPCR);
570 		}
571 	      else
572 		{
573 		  fix_new_exp (fxfrag,
574 			       fx - (fxfrag->fr_literal),
575 			       4,
576 			       &opers[expi],
577 			       0,
578 			       R_RELLONGX);
579 		}
580 	    }
581 	  else if (flags & TIC80_OPERAND_PCREL)
582 	    {
583 	      fix_new_exp (ffrag,
584 			   f - (ffrag->fr_literal),
585 			   4,			/* FIXME! how is this used?  */
586 			   &opers[expi],
587 			   1,
588 			   R_MPPCR15W);
589 	    }
590 	  else
591 	    {
592 	      internal_error (_("symbol reloc that is not PC relative or 32 bits"));
593 	    }
594 	  break;
595 	case O_absent:
596 	  /* Each O_absent expression can indicate exactly one
597              possible modifier.  */
598 	  if ((num & TIC80_OPERAND_M_SI)
599 	      && (flags & TIC80_OPERAND_M_SI))
600 	    {
601 	      insn[0] = insn[0] | (1 << 17);
602 	    }
603 	  else if ((num & TIC80_OPERAND_M_LI)
604 		   && (flags & TIC80_OPERAND_M_LI))
605 	    {
606 	      insn[0] = insn[0] | (1 << 15);
607 	    }
608 	  else if ((num & TIC80_OPERAND_SCALED)
609 		   && (flags & TIC80_OPERAND_SCALED))
610 	    {
611 	      insn[0] = insn[0] | (1 << 11);
612 	    }
613 	  else if ((num & TIC80_OPERAND_PARENS)
614 		   && (flags & TIC80_OPERAND_PARENS))
615 	    {
616 	      /* No code to generate, just accept and discard this
617                  expression.  */
618 	    }
619 	  else
620 	    {
621 	      internal_error_a (_("unhandled operand modifier"),
622 				(long) opers[expi].X_add_number);
623 	    }
624 	  break;
625 	case O_big:
626 	  fx = frag_more (4);
627 	  fxfrag = frag_now;
628 	  {
629 	    int precision = 2;
630 	    long exponent_bits = 8L;
631 	    LITTLENUM_TYPE words[2];
632 	    /* Value is still in generic_floating_point_number.  */
633 	    gen_to_words (words, precision, exponent_bits);
634 	    insn[1] = (words[0] << 16) | words[1];
635 	  }
636 	  break;
637 	case O_illegal:
638 	case O_symbol_rva:
639 	case O_uminus:
640 	case O_bit_not:
641 	case O_logical_not:
642 	case O_multiply:
643 	case O_divide:
644 	case O_modulus:
645 	case O_left_shift:
646 	case O_right_shift:
647 	case O_bit_inclusive_or:
648 	case O_bit_or_not:
649 	case O_bit_exclusive_or:
650 	case O_bit_and:
651 	case O_add:
652 	case O_subtract:
653 	case O_eq:
654 	case O_ne:
655 	case O_lt:
656 	case O_le:
657 	case O_ge:
658 	case O_gt:
659 	case O_logical_and:
660 	case O_logical_or:
661 	case O_max:
662 	default:
663 	  internal_error_a (_("unhandled expression"), (long) X_op);
664 	  break;
665 	}
666     }
667 
668   /* Write out the instruction, either 4 or 8 bytes.  */
669 
670   md_number_to_chars (f, insn[0], 4);
671   if (fx != NULL)
672     {
673       md_number_to_chars (fx, insn[1], 4);
674     }
675 }
676 
677 /* This is the main entry point for the machine-dependent assembler.  Gas
678    calls this function for each input line which does not contain a
679    pseudoop.
680 
681   STR points to a NULL terminated machine dependent instruction.  This
682   function is supposed to emit the frags/bytes it assembles to.  */
683 
684 void
md_assemble(str)685 md_assemble (str)
686      char *str;
687 {
688   char *scan;
689   char *input_line_save;
690   struct tic80_opcode *opcode;
691   expressionS myops[16];
692 
693   /* Ensure there is something there to assemble.  */
694   assert (str);
695 
696   /* Drop any leading whitespace.  */
697   while (ISSPACE (*str))
698     str++;
699 
700   /* Isolate the mnemonic from the rest of the string by finding the first
701      whitespace character and zapping it to a null byte.  */
702   for (scan = str; *scan != '\000' && !ISSPACE (*scan); scan++)
703     ;
704 
705   if (*scan != '\000')
706     *scan++ = '\000';
707 
708   /* Try to find this mnemonic in the hash table.  */
709   if ((opcode = (struct tic80_opcode *) hash_find (tic80_hash, str)) == NULL)
710     {
711       as_bad (_("Invalid mnemonic: '%s'"), str);
712       return;
713     }
714 
715   str = scan;
716   while (ISSPACE (*scan))
717     scan++;
718 
719   input_line_save = input_line_pointer;
720   input_line_pointer = str;
721 
722   opcode = find_opcode (opcode, myops);
723   if (opcode == NULL)
724     as_bad (_("Invalid operands: '%s'"), input_line_save);
725 
726   input_line_pointer = input_line_save;
727   build_insn (opcode, myops);
728 }
729 
730 /* This function is called once at the start of assembly, after the command
731    line arguments have been parsed and all the machine independent
732    initializations have been completed.
733 
734    It should set up all the tables, etc., that the machine dependent part of
735    the assembler will need.  */
736 
737 void
md_begin()738 md_begin ()
739 {
740   char *prev_name = "";
741   register const struct tic80_opcode *op;
742   register const struct tic80_opcode *op_end;
743   const struct predefined_symbol *pdsp;
744   extern int coff_flags;			/* Defined in obj-coff.c  */
745 
746   /* Set F_AR32WR in coff_flags, which will end up in the file header
747      f_flags field.  */
748 
749   coff_flags |= F_AR32WR;	/* TIc80 is 32 bit little endian.  */
750 
751   /* Insert unique names into hash table.  The TIc80 instruction set
752      has many identical opcode names that have different opcodes based
753      on the operands.  This hash table then provides a quick index to
754      the first opcode with a particular name in the opcode table.  */
755 
756   tic80_hash = hash_new ();
757   op_end = tic80_opcodes + tic80_num_opcodes;
758   for (op = tic80_opcodes; op < op_end; op++)
759     {
760       if (strcmp (prev_name, op->name) != 0)
761 	{
762 	  prev_name = (char *) op->name;
763 	  hash_insert (tic80_hash, op->name, (char *) op);
764 	}
765     }
766 
767   /* Insert the predefined symbols into the symbol table.  We use
768      symbol_create rather than symbol_new so that these symbols don't
769      end up in the object files' symbol table.  Note that the values
770      of the predefined symbols include some upper bits that
771      distinguish the type of the symbol (register, bitnum, condition
772      code, etc) and these bits must be masked away before actually
773      inserting the values into the instruction stream.  For registers
774      we put these bits in the symbol table since we use them later and
775      there is no question that they aren't part of the register
776      number.  For constants we can't do that since the constant can be
777      any value, so they are masked off before putting them into the
778      symbol table.  */
779 
780   pdsp = NULL;
781   while ((pdsp = tic80_next_predefined_symbol (pdsp)) != NULL)
782     {
783       segT segment;
784       valueT valu;
785       int symtype;
786 
787       symtype = PDS_VALUE (pdsp) & TIC80_OPERAND_MASK;
788       switch (symtype)
789 	{
790 	case TIC80_OPERAND_GPR:
791 	case TIC80_OPERAND_FPA:
792 	case TIC80_OPERAND_CR:
793 	  segment = reg_section;
794 	  valu = PDS_VALUE (pdsp);
795 	  break;
796 	case TIC80_OPERAND_CC:
797 	case TIC80_OPERAND_BITNUM:
798 	  segment = absolute_section;
799 	  valu = PDS_VALUE (pdsp) & ~TIC80_OPERAND_MASK;
800 	  break;
801 	default:
802 	  internal_error_a (_("unhandled predefined symbol bits"),
803 			    (long) symtype);
804 	  break;
805 	}
806       symbol_table_insert (symbol_create (PDS_NAME (pdsp), segment, valu,
807 					  &zero_address_frag));
808     }
809 }
810 
811 /* The assembler adds md_shortopts to the string passed to getopt.  */
812 
813 const char *md_shortopts = "";
814 
815 /* The assembler adds md_longopts to the machine independent long options
816    that are passed to getopt.  */
817 
818 struct option md_longopts[] = {
819 
820 #define OPTION_RELAX	(OPTION_MD_BASE)
821   {"relax", no_argument, NULL, OPTION_RELAX},
822 
823 #define OPTION_NO_RELAX	(OPTION_RELAX + 1)
824   {"no-relax", no_argument, NULL, OPTION_NO_RELAX},
825 
826   {NULL, no_argument, NULL, 0}
827 };
828 
829 size_t md_longopts_size = sizeof (md_longopts);
830 
831 /* The md_parse_option function will be called whenever getopt returns an
832    unrecognized code, presumably indicating a special code value which
833    appears in md_longopts for machine specific command line options.  */
834 
835 int
md_parse_option(c,arg)836 md_parse_option (c, arg)
837      int c;
838      char *arg ATTRIBUTE_UNUSED;
839 {
840   switch (c)
841     {
842     case OPTION_RELAX:
843       tic80_relax = 1;
844       break;
845     case OPTION_NO_RELAX:
846       tic80_relax = 0;
847       break;
848     default:
849       return (0);
850     }
851   return (1);
852 }
853 
854 /* The md_show_usage function will be called whenever a usage message is
855    printed.  It should print a description of the machine specific options
856    found in md_longopts.  */
857 
858 void
md_show_usage(stream)859 md_show_usage (stream)
860      FILE *stream;
861 {
862   fprintf (stream, "\
863 TIc80 options:\n\
864 -relax			alter PC relative branch instructions to use long form when needed\n\
865 -no-relax		always use short PC relative branch instructions, error on overflow\n");
866 }
867 
868 /* Attempt to simplify or even eliminate a fixup.  The return value is
869    ignored; perhaps it was once meaningful, but now it is historical.
870    To indicate that a fixup has been eliminated, set fixP->fx_done.  */
871 
872 void
md_apply_fix3(fixP,valP,seg)873 md_apply_fix3 (fixP, valP, seg)
874      fixS *fixP;
875      valueT * valP;
876      segT seg ATTRIBUTE_UNUSED;
877 {
878   long val = * (long *) valP;
879   char *dest = fixP->fx_frag->fr_literal + fixP->fx_where;
880   int overflow;
881 
882   switch (fixP->fx_r_type)
883     {
884     case R_RELLONGX:
885       md_number_to_chars (dest, (valueT) val, 4);
886       break;
887     case R_MPPCR:
888       val >>= 2;
889       val += 1;	  /* Target address computed from inst start */
890       md_number_to_chars (dest, (valueT) val, 4);
891       break;
892     case R_MPPCR15W:
893       overflow = (val < -65536L) || (val > 65532L);
894       if (overflow)
895 	{
896 	  as_bad_where (fixP->fx_file, fixP->fx_line,
897 			_("PC offset 0x%lx outside range 0x%lx-0x%lx"),
898 			val, -65536L, 65532L);
899 	}
900       else
901 	{
902 	  val >>= 2;
903 	  *dest++ = val & 0xFF;
904 	  val >>= 8;
905 	  *dest = (*dest & 0x80) | (val & 0x7F);
906 	}
907       break;
908     case R_ABS:
909       md_number_to_chars (dest, (valueT) val, fixP->fx_size);
910       break;
911     default:
912       internal_error_a (_("unhandled relocation type in fixup"),
913 			(long) fixP->fx_r_type);
914       break;
915     }
916 
917   if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
918     fixP->fx_done = 1;
919 }
920 
921 /* Functions concerning relocs.  */
922 
923 /* The location from which a PC relative jump should be calculated,
924    given a PC relative reloc.
925 
926    For the TIc80, this is the address of the 32 bit opcode containing
927    the PC relative field.  */
928 
929 long
md_pcrel_from(fixP)930 md_pcrel_from (fixP)
931      fixS *fixP;
932 {
933   return (fixP->fx_frag->fr_address + fixP->fx_where);
934 }
935 
936 /* Called after relax() is finished.
937  * In:	Address of frag.
938  *	fr_type == rs_machine_dependent.
939  *	fr_subtype is what the address relaxed to.
940  *
941  * Out:	Any fixSs and constants are set up.
942  *	Caller will turn frag into a ".space 0".
943  */
944 
945 void
md_convert_frag(headers,seg,fragP)946 md_convert_frag (headers, seg, fragP)
947      object_headers *headers ATTRIBUTE_UNUSED;
948      segT seg ATTRIBUTE_UNUSED;
949      fragS *fragP ATTRIBUTE_UNUSED;
950 {
951   internal_error (_("md_convert_frag() not implemented yet"));
952   abort ();
953 }
954 
955 void
tc_coff_symbol_emit_hook(ignore)956 tc_coff_symbol_emit_hook (ignore)
957      symbolS *ignore ATTRIBUTE_UNUSED;
958 {
959 }
960 
961 #if defined OBJ_COFF
962 
963 short
tc_coff_fix2rtype(fixP)964 tc_coff_fix2rtype (fixP)
965      fixS *fixP;
966 {
967   return (fixP->fx_r_type);
968 }
969 
970 #endif /* OBJ_COFF */
971