1 /// @file xed-isa-set-enum.c
2
3 // This file was automatically generated.
4 // Do not edit this file.
5
6 #include <string.h>
7 #include <assert.h>
8 #include "xed-isa-set-enum.h"
9
10 typedef struct {
11 const char* name;
12 xed_isa_set_enum_t value;
13 } name_table_xed_isa_set_enum_t;
14 static const name_table_xed_isa_set_enum_t name_array_xed_isa_set_enum_t[] = {
15 {"INVALID", XED_ISA_SET_INVALID},
16 {"3DNOW", XED_ISA_SET_3DNOW},
17 {"ADOX_ADCX", XED_ISA_SET_ADOX_ADCX},
18 {"AES", XED_ISA_SET_AES},
19 {"AMD", XED_ISA_SET_AMD},
20 {"AVX", XED_ISA_SET_AVX},
21 {"AVX2", XED_ISA_SET_AVX2},
22 {"AVX2GATHER", XED_ISA_SET_AVX2GATHER},
23 {"AVX512BW_128", XED_ISA_SET_AVX512BW_128},
24 {"AVX512BW_128N", XED_ISA_SET_AVX512BW_128N},
25 {"AVX512BW_256", XED_ISA_SET_AVX512BW_256},
26 {"AVX512BW_512", XED_ISA_SET_AVX512BW_512},
27 {"AVX512BW_KOP", XED_ISA_SET_AVX512BW_KOP},
28 {"AVX512CD_128", XED_ISA_SET_AVX512CD_128},
29 {"AVX512CD_256", XED_ISA_SET_AVX512CD_256},
30 {"AVX512CD_512", XED_ISA_SET_AVX512CD_512},
31 {"AVX512DQ_128", XED_ISA_SET_AVX512DQ_128},
32 {"AVX512DQ_128N", XED_ISA_SET_AVX512DQ_128N},
33 {"AVX512DQ_256", XED_ISA_SET_AVX512DQ_256},
34 {"AVX512DQ_512", XED_ISA_SET_AVX512DQ_512},
35 {"AVX512DQ_KOP", XED_ISA_SET_AVX512DQ_KOP},
36 {"AVX512DQ_SCALAR", XED_ISA_SET_AVX512DQ_SCALAR},
37 {"AVX512ER_512", XED_ISA_SET_AVX512ER_512},
38 {"AVX512ER_SCALAR", XED_ISA_SET_AVX512ER_SCALAR},
39 {"AVX512F_128", XED_ISA_SET_AVX512F_128},
40 {"AVX512F_128N", XED_ISA_SET_AVX512F_128N},
41 {"AVX512F_256", XED_ISA_SET_AVX512F_256},
42 {"AVX512F_512", XED_ISA_SET_AVX512F_512},
43 {"AVX512F_KOP", XED_ISA_SET_AVX512F_KOP},
44 {"AVX512F_SCALAR", XED_ISA_SET_AVX512F_SCALAR},
45 {"AVX512PF_512", XED_ISA_SET_AVX512PF_512},
46 {"AVX512_4FMAPS_512", XED_ISA_SET_AVX512_4FMAPS_512},
47 {"AVX512_4FMAPS_SCALAR", XED_ISA_SET_AVX512_4FMAPS_SCALAR},
48 {"AVX512_4VNNIW_512", XED_ISA_SET_AVX512_4VNNIW_512},
49 {"AVX512_BITALG_128", XED_ISA_SET_AVX512_BITALG_128},
50 {"AVX512_BITALG_256", XED_ISA_SET_AVX512_BITALG_256},
51 {"AVX512_BITALG_512", XED_ISA_SET_AVX512_BITALG_512},
52 {"AVX512_GFNI_128", XED_ISA_SET_AVX512_GFNI_128},
53 {"AVX512_GFNI_256", XED_ISA_SET_AVX512_GFNI_256},
54 {"AVX512_GFNI_512", XED_ISA_SET_AVX512_GFNI_512},
55 {"AVX512_IFMA_128", XED_ISA_SET_AVX512_IFMA_128},
56 {"AVX512_IFMA_256", XED_ISA_SET_AVX512_IFMA_256},
57 {"AVX512_IFMA_512", XED_ISA_SET_AVX512_IFMA_512},
58 {"AVX512_VAES_128", XED_ISA_SET_AVX512_VAES_128},
59 {"AVX512_VAES_256", XED_ISA_SET_AVX512_VAES_256},
60 {"AVX512_VAES_512", XED_ISA_SET_AVX512_VAES_512},
61 {"AVX512_VBMI2_128", XED_ISA_SET_AVX512_VBMI2_128},
62 {"AVX512_VBMI2_256", XED_ISA_SET_AVX512_VBMI2_256},
63 {"AVX512_VBMI2_512", XED_ISA_SET_AVX512_VBMI2_512},
64 {"AVX512_VBMI_128", XED_ISA_SET_AVX512_VBMI_128},
65 {"AVX512_VBMI_256", XED_ISA_SET_AVX512_VBMI_256},
66 {"AVX512_VBMI_512", XED_ISA_SET_AVX512_VBMI_512},
67 {"AVX512_VNNI_128", XED_ISA_SET_AVX512_VNNI_128},
68 {"AVX512_VNNI_256", XED_ISA_SET_AVX512_VNNI_256},
69 {"AVX512_VNNI_512", XED_ISA_SET_AVX512_VNNI_512},
70 {"AVX512_VPCLMULQDQ_128", XED_ISA_SET_AVX512_VPCLMULQDQ_128},
71 {"AVX512_VPCLMULQDQ_256", XED_ISA_SET_AVX512_VPCLMULQDQ_256},
72 {"AVX512_VPCLMULQDQ_512", XED_ISA_SET_AVX512_VPCLMULQDQ_512},
73 {"AVX512_VPOPCNTDQ_128", XED_ISA_SET_AVX512_VPOPCNTDQ_128},
74 {"AVX512_VPOPCNTDQ_256", XED_ISA_SET_AVX512_VPOPCNTDQ_256},
75 {"AVX512_VPOPCNTDQ_512", XED_ISA_SET_AVX512_VPOPCNTDQ_512},
76 {"AVXAES", XED_ISA_SET_AVXAES},
77 {"AVX_GFNI", XED_ISA_SET_AVX_GFNI},
78 {"BMI1", XED_ISA_SET_BMI1},
79 {"BMI2", XED_ISA_SET_BMI2},
80 {"CET", XED_ISA_SET_CET},
81 {"CLDEMOTE", XED_ISA_SET_CLDEMOTE},
82 {"CLFLUSHOPT", XED_ISA_SET_CLFLUSHOPT},
83 {"CLFSH", XED_ISA_SET_CLFSH},
84 {"CLWB", XED_ISA_SET_CLWB},
85 {"CLZERO", XED_ISA_SET_CLZERO},
86 {"CMOV", XED_ISA_SET_CMOV},
87 {"CMPXCHG16B", XED_ISA_SET_CMPXCHG16B},
88 {"ENCLV", XED_ISA_SET_ENCLV},
89 {"F16C", XED_ISA_SET_F16C},
90 {"FAT_NOP", XED_ISA_SET_FAT_NOP},
91 {"FCMOV", XED_ISA_SET_FCMOV},
92 {"FMA", XED_ISA_SET_FMA},
93 {"FMA4", XED_ISA_SET_FMA4},
94 {"FXSAVE", XED_ISA_SET_FXSAVE},
95 {"FXSAVE64", XED_ISA_SET_FXSAVE64},
96 {"GFNI", XED_ISA_SET_GFNI},
97 {"I186", XED_ISA_SET_I186},
98 {"I286PROTECTED", XED_ISA_SET_I286PROTECTED},
99 {"I286REAL", XED_ISA_SET_I286REAL},
100 {"I386", XED_ISA_SET_I386},
101 {"I486", XED_ISA_SET_I486},
102 {"I486REAL", XED_ISA_SET_I486REAL},
103 {"I86", XED_ISA_SET_I86},
104 {"INVPCID", XED_ISA_SET_INVPCID},
105 {"LAHF", XED_ISA_SET_LAHF},
106 {"LONGMODE", XED_ISA_SET_LONGMODE},
107 {"LZCNT", XED_ISA_SET_LZCNT},
108 {"MONITOR", XED_ISA_SET_MONITOR},
109 {"MONITORX", XED_ISA_SET_MONITORX},
110 {"MOVBE", XED_ISA_SET_MOVBE},
111 {"MOVDIR", XED_ISA_SET_MOVDIR},
112 {"MPX", XED_ISA_SET_MPX},
113 {"PAUSE", XED_ISA_SET_PAUSE},
114 {"PCLMULQDQ", XED_ISA_SET_PCLMULQDQ},
115 {"PCONFIG", XED_ISA_SET_PCONFIG},
116 {"PENTIUMMMX", XED_ISA_SET_PENTIUMMMX},
117 {"PENTIUMREAL", XED_ISA_SET_PENTIUMREAL},
118 {"PKU", XED_ISA_SET_PKU},
119 {"POPCNT", XED_ISA_SET_POPCNT},
120 {"PPRO", XED_ISA_SET_PPRO},
121 {"PREFETCHW", XED_ISA_SET_PREFETCHW},
122 {"PREFETCHWT1", XED_ISA_SET_PREFETCHWT1},
123 {"PREFETCH_NOP", XED_ISA_SET_PREFETCH_NOP},
124 {"PT", XED_ISA_SET_PT},
125 {"RDPID", XED_ISA_SET_RDPID},
126 {"RDPMC", XED_ISA_SET_RDPMC},
127 {"RDRAND", XED_ISA_SET_RDRAND},
128 {"RDSEED", XED_ISA_SET_RDSEED},
129 {"RDTSCP", XED_ISA_SET_RDTSCP},
130 {"RDWRFSGS", XED_ISA_SET_RDWRFSGS},
131 {"RTM", XED_ISA_SET_RTM},
132 {"SGX", XED_ISA_SET_SGX},
133 {"SGX_ENCLV", XED_ISA_SET_SGX_ENCLV},
134 {"SHA", XED_ISA_SET_SHA},
135 {"SMAP", XED_ISA_SET_SMAP},
136 {"SMX", XED_ISA_SET_SMX},
137 {"SSE", XED_ISA_SET_SSE},
138 {"SSE2", XED_ISA_SET_SSE2},
139 {"SSE2MMX", XED_ISA_SET_SSE2MMX},
140 {"SSE3", XED_ISA_SET_SSE3},
141 {"SSE3X87", XED_ISA_SET_SSE3X87},
142 {"SSE4", XED_ISA_SET_SSE4},
143 {"SSE42", XED_ISA_SET_SSE42},
144 {"SSE4A", XED_ISA_SET_SSE4A},
145 {"SSEMXCSR", XED_ISA_SET_SSEMXCSR},
146 {"SSE_PREFETCH", XED_ISA_SET_SSE_PREFETCH},
147 {"SSSE3", XED_ISA_SET_SSSE3},
148 {"SSSE3MMX", XED_ISA_SET_SSSE3MMX},
149 {"SVM", XED_ISA_SET_SVM},
150 {"TBM", XED_ISA_SET_TBM},
151 {"VAES", XED_ISA_SET_VAES},
152 {"VMFUNC", XED_ISA_SET_VMFUNC},
153 {"VPCLMULQDQ", XED_ISA_SET_VPCLMULQDQ},
154 {"VTX", XED_ISA_SET_VTX},
155 {"WAITPKG", XED_ISA_SET_WAITPKG},
156 {"WBNOINVD", XED_ISA_SET_WBNOINVD},
157 {"X87", XED_ISA_SET_X87},
158 {"XOP", XED_ISA_SET_XOP},
159 {"XSAVE", XED_ISA_SET_XSAVE},
160 {"XSAVEC", XED_ISA_SET_XSAVEC},
161 {"XSAVEOPT", XED_ISA_SET_XSAVEOPT},
162 {"XSAVES", XED_ISA_SET_XSAVES},
163 {"LAST", XED_ISA_SET_LAST},
164 {0, XED_ISA_SET_LAST},
165 };
166
167
str2xed_isa_set_enum_t(const char * s)168 xed_isa_set_enum_t str2xed_isa_set_enum_t(const char* s)
169 {
170 const name_table_xed_isa_set_enum_t* p = name_array_xed_isa_set_enum_t;
171 while( p->name ) {
172 if (strcmp(p->name,s) == 0) {
173 return p->value;
174 }
175 p++;
176 }
177
178
179 return XED_ISA_SET_INVALID;
180 }
181
182
xed_isa_set_enum_t2str(const xed_isa_set_enum_t p)183 const char* xed_isa_set_enum_t2str(const xed_isa_set_enum_t p)
184 {
185 xed_isa_set_enum_t type_idx = p;
186 if ( p > XED_ISA_SET_LAST) type_idx = XED_ISA_SET_LAST;
187 return name_array_xed_isa_set_enum_t[type_idx].name;
188 }
189
xed_isa_set_enum_t_last(void)190 xed_isa_set_enum_t xed_isa_set_enum_t_last(void) {
191 return XED_ISA_SET_LAST;
192 }
193
194 /*
195
196 Here is a skeleton switch statement embedded in a comment
197
198
199 switch(p) {
200 case XED_ISA_SET_INVALID:
201 case XED_ISA_SET_3DNOW:
202 case XED_ISA_SET_ADOX_ADCX:
203 case XED_ISA_SET_AES:
204 case XED_ISA_SET_AMD:
205 case XED_ISA_SET_AVX:
206 case XED_ISA_SET_AVX2:
207 case XED_ISA_SET_AVX2GATHER:
208 case XED_ISA_SET_AVX512BW_128:
209 case XED_ISA_SET_AVX512BW_128N:
210 case XED_ISA_SET_AVX512BW_256:
211 case XED_ISA_SET_AVX512BW_512:
212 case XED_ISA_SET_AVX512BW_KOP:
213 case XED_ISA_SET_AVX512CD_128:
214 case XED_ISA_SET_AVX512CD_256:
215 case XED_ISA_SET_AVX512CD_512:
216 case XED_ISA_SET_AVX512DQ_128:
217 case XED_ISA_SET_AVX512DQ_128N:
218 case XED_ISA_SET_AVX512DQ_256:
219 case XED_ISA_SET_AVX512DQ_512:
220 case XED_ISA_SET_AVX512DQ_KOP:
221 case XED_ISA_SET_AVX512DQ_SCALAR:
222 case XED_ISA_SET_AVX512ER_512:
223 case XED_ISA_SET_AVX512ER_SCALAR:
224 case XED_ISA_SET_AVX512F_128:
225 case XED_ISA_SET_AVX512F_128N:
226 case XED_ISA_SET_AVX512F_256:
227 case XED_ISA_SET_AVX512F_512:
228 case XED_ISA_SET_AVX512F_KOP:
229 case XED_ISA_SET_AVX512F_SCALAR:
230 case XED_ISA_SET_AVX512PF_512:
231 case XED_ISA_SET_AVX512_4FMAPS_512:
232 case XED_ISA_SET_AVX512_4FMAPS_SCALAR:
233 case XED_ISA_SET_AVX512_4VNNIW_512:
234 case XED_ISA_SET_AVX512_BITALG_128:
235 case XED_ISA_SET_AVX512_BITALG_256:
236 case XED_ISA_SET_AVX512_BITALG_512:
237 case XED_ISA_SET_AVX512_GFNI_128:
238 case XED_ISA_SET_AVX512_GFNI_256:
239 case XED_ISA_SET_AVX512_GFNI_512:
240 case XED_ISA_SET_AVX512_IFMA_128:
241 case XED_ISA_SET_AVX512_IFMA_256:
242 case XED_ISA_SET_AVX512_IFMA_512:
243 case XED_ISA_SET_AVX512_VAES_128:
244 case XED_ISA_SET_AVX512_VAES_256:
245 case XED_ISA_SET_AVX512_VAES_512:
246 case XED_ISA_SET_AVX512_VBMI2_128:
247 case XED_ISA_SET_AVX512_VBMI2_256:
248 case XED_ISA_SET_AVX512_VBMI2_512:
249 case XED_ISA_SET_AVX512_VBMI_128:
250 case XED_ISA_SET_AVX512_VBMI_256:
251 case XED_ISA_SET_AVX512_VBMI_512:
252 case XED_ISA_SET_AVX512_VNNI_128:
253 case XED_ISA_SET_AVX512_VNNI_256:
254 case XED_ISA_SET_AVX512_VNNI_512:
255 case XED_ISA_SET_AVX512_VPCLMULQDQ_128:
256 case XED_ISA_SET_AVX512_VPCLMULQDQ_256:
257 case XED_ISA_SET_AVX512_VPCLMULQDQ_512:
258 case XED_ISA_SET_AVX512_VPOPCNTDQ_128:
259 case XED_ISA_SET_AVX512_VPOPCNTDQ_256:
260 case XED_ISA_SET_AVX512_VPOPCNTDQ_512:
261 case XED_ISA_SET_AVXAES:
262 case XED_ISA_SET_AVX_GFNI:
263 case XED_ISA_SET_BMI1:
264 case XED_ISA_SET_BMI2:
265 case XED_ISA_SET_CET:
266 case XED_ISA_SET_CLDEMOTE:
267 case XED_ISA_SET_CLFLUSHOPT:
268 case XED_ISA_SET_CLFSH:
269 case XED_ISA_SET_CLWB:
270 case XED_ISA_SET_CLZERO:
271 case XED_ISA_SET_CMOV:
272 case XED_ISA_SET_CMPXCHG16B:
273 case XED_ISA_SET_ENCLV:
274 case XED_ISA_SET_F16C:
275 case XED_ISA_SET_FAT_NOP:
276 case XED_ISA_SET_FCMOV:
277 case XED_ISA_SET_FMA:
278 case XED_ISA_SET_FMA4:
279 case XED_ISA_SET_FXSAVE:
280 case XED_ISA_SET_FXSAVE64:
281 case XED_ISA_SET_GFNI:
282 case XED_ISA_SET_I186:
283 case XED_ISA_SET_I286PROTECTED:
284 case XED_ISA_SET_I286REAL:
285 case XED_ISA_SET_I386:
286 case XED_ISA_SET_I486:
287 case XED_ISA_SET_I486REAL:
288 case XED_ISA_SET_I86:
289 case XED_ISA_SET_INVPCID:
290 case XED_ISA_SET_LAHF:
291 case XED_ISA_SET_LONGMODE:
292 case XED_ISA_SET_LZCNT:
293 case XED_ISA_SET_MONITOR:
294 case XED_ISA_SET_MONITORX:
295 case XED_ISA_SET_MOVBE:
296 case XED_ISA_SET_MOVDIR:
297 case XED_ISA_SET_MPX:
298 case XED_ISA_SET_PAUSE:
299 case XED_ISA_SET_PCLMULQDQ:
300 case XED_ISA_SET_PCONFIG:
301 case XED_ISA_SET_PENTIUMMMX:
302 case XED_ISA_SET_PENTIUMREAL:
303 case XED_ISA_SET_PKU:
304 case XED_ISA_SET_POPCNT:
305 case XED_ISA_SET_PPRO:
306 case XED_ISA_SET_PREFETCHW:
307 case XED_ISA_SET_PREFETCHWT1:
308 case XED_ISA_SET_PREFETCH_NOP:
309 case XED_ISA_SET_PT:
310 case XED_ISA_SET_RDPID:
311 case XED_ISA_SET_RDPMC:
312 case XED_ISA_SET_RDRAND:
313 case XED_ISA_SET_RDSEED:
314 case XED_ISA_SET_RDTSCP:
315 case XED_ISA_SET_RDWRFSGS:
316 case XED_ISA_SET_RTM:
317 case XED_ISA_SET_SGX:
318 case XED_ISA_SET_SGX_ENCLV:
319 case XED_ISA_SET_SHA:
320 case XED_ISA_SET_SMAP:
321 case XED_ISA_SET_SMX:
322 case XED_ISA_SET_SSE:
323 case XED_ISA_SET_SSE2:
324 case XED_ISA_SET_SSE2MMX:
325 case XED_ISA_SET_SSE3:
326 case XED_ISA_SET_SSE3X87:
327 case XED_ISA_SET_SSE4:
328 case XED_ISA_SET_SSE42:
329 case XED_ISA_SET_SSE4A:
330 case XED_ISA_SET_SSEMXCSR:
331 case XED_ISA_SET_SSE_PREFETCH:
332 case XED_ISA_SET_SSSE3:
333 case XED_ISA_SET_SSSE3MMX:
334 case XED_ISA_SET_SVM:
335 case XED_ISA_SET_TBM:
336 case XED_ISA_SET_VAES:
337 case XED_ISA_SET_VMFUNC:
338 case XED_ISA_SET_VPCLMULQDQ:
339 case XED_ISA_SET_VTX:
340 case XED_ISA_SET_WAITPKG:
341 case XED_ISA_SET_WBNOINVD:
342 case XED_ISA_SET_X87:
343 case XED_ISA_SET_XOP:
344 case XED_ISA_SET_XSAVE:
345 case XED_ISA_SET_XSAVEC:
346 case XED_ISA_SET_XSAVEOPT:
347 case XED_ISA_SET_XSAVES:
348 case XED_ISA_SET_LAST:
349 default:
350 xed_assert(0);
351 }
352 */
353