1; RUN: opt < %s -sroa -S | FileCheck %s 2; RUN: opt < %s -passes=sroa -S | FileCheck %s 3 4target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64" 5 6declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) 7declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) 8 9define i32 @test0() { 10; CHECK-LABEL: @test0( 11; CHECK-NOT: alloca 12; CHECK: ret i32 13 14entry: 15 %a1 = alloca i32 16 %a2 = alloca float 17 18 %a1.i8 = bitcast i32* %a1 to i8* 19 call void @llvm.lifetime.start.p0i8(i64 4, i8* %a1.i8) 20 21 store i32 0, i32* %a1 22 %v1 = load i32, i32* %a1 23 24 call void @llvm.lifetime.end.p0i8(i64 4, i8* %a1.i8) 25 26 %a2.i8 = bitcast float* %a2 to i8* 27 call void @llvm.lifetime.start.p0i8(i64 4, i8* %a2.i8) 28 29 store float 0.0, float* %a2 30 %v2 = load float , float * %a2 31 %v2.int = bitcast float %v2 to i32 32 %sum1 = add i32 %v1, %v2.int 33 34 call void @llvm.lifetime.end.p0i8(i64 4, i8* %a2.i8) 35 36 ret i32 %sum1 37} 38 39define i32 @test1() { 40; CHECK-LABEL: @test1( 41; CHECK-NOT: alloca 42; CHECK: ret i32 0 43 44entry: 45 %X = alloca { i32, float } 46 %Y = getelementptr { i32, float }, { i32, float }* %X, i64 0, i32 0 47 store i32 0, i32* %Y 48 %Z = load i32, i32* %Y 49 ret i32 %Z 50} 51 52define i64 @test2(i64 %X) { 53; CHECK-LABEL: @test2( 54; CHECK-NOT: alloca 55; CHECK: ret i64 %X 56 57entry: 58 %A = alloca [8 x i8] 59 %B = bitcast [8 x i8]* %A to i64* 60 store i64 %X, i64* %B 61 br label %L2 62 63L2: 64 %Z = load i64, i64* %B 65 ret i64 %Z 66} 67 68define i64 @test2_addrspacecast(i64 %X) { 69; CHECK-LABEL: @test2_addrspacecast( 70; CHECK-NOT: alloca 71; CHECK: ret i64 %X 72 73entry: 74 %A = alloca [8 x i8] 75 %B = addrspacecast [8 x i8]* %A to i64 addrspace(1)* 76 store i64 %X, i64 addrspace(1)* %B 77 br label %L2 78 79L2: 80 %Z = load i64, i64 addrspace(1)* %B 81 ret i64 %Z 82} 83 84define i64 @test2_addrspacecast_gep(i64 %X, i16 %idx) { 85; CHECK-LABEL: @test2_addrspacecast_gep( 86; CHECK-NOT: alloca 87; CHECK: ret i64 %X 88 89entry: 90 %A = alloca [256 x i8] 91 %B = addrspacecast [256 x i8]* %A to i64 addrspace(1)* 92 %gepA = getelementptr [256 x i8], [256 x i8]* %A, i16 0, i16 32 93 %gepB = getelementptr i64, i64 addrspace(1)* %B, i16 4 94 store i64 %X, i64 addrspace(1)* %gepB, align 1 95 br label %L2 96 97L2: 98 %gepA.bc = bitcast i8* %gepA to i64* 99 %Z = load i64, i64* %gepA.bc, align 1 100 ret i64 %Z 101} 102 103; Avoid crashing when load/storing at at different offsets. 104define i64 @test2_addrspacecast_gep_offset(i64 %X) { 105; CHECK-LABEL: @test2_addrspacecast_gep_offset( 106; CHECK: %A.sroa.0 = alloca [10 x i8] 107; CHECK: [[GEP0:%.*]] = getelementptr inbounds [10 x i8], [10 x i8]* %A.sroa.0, i16 0, i16 2 108; CHECK-NEXT: [[GEP1:%.*]] = addrspacecast i8* [[GEP0]] to i64 addrspace(1)* 109; CHECK-NEXT: store i64 %X, i64 addrspace(1)* [[GEP1]], align 1 110; CHECK: br 111 112; CHECK: [[BITCAST:%.*]] = bitcast [10 x i8]* %A.sroa.0 to i64* 113; CHECK: %A.sroa.0.0.A.sroa.0.30.Z = load i64, i64* [[BITCAST]], align 1 114; CHECK-NEXT: ret 115entry: 116 %A = alloca [256 x i8] 117 %B = addrspacecast [256 x i8]* %A to i64 addrspace(1)* 118 %gepA = getelementptr [256 x i8], [256 x i8]* %A, i16 0, i16 30 119 %gepB = getelementptr i64, i64 addrspace(1)* %B, i16 4 120 store i64 %X, i64 addrspace(1)* %gepB, align 1 121 br label %L2 122 123L2: 124 %gepA.bc = bitcast i8* %gepA to i64* 125 %Z = load i64, i64* %gepA.bc, align 1 126 ret i64 %Z 127} 128 129define void @test3(i8* %dst, i8* align 8 %src) { 130; CHECK-LABEL: @test3( 131 132entry: 133 %a = alloca [300 x i8] 134; CHECK-NOT: alloca 135; CHECK: %[[test3_a1:.*]] = alloca [42 x i8] 136; CHECK-NEXT: %[[test3_a2:.*]] = alloca [99 x i8] 137; CHECK-NEXT: %[[test3_a3:.*]] = alloca [16 x i8] 138; CHECK-NEXT: %[[test3_a4:.*]] = alloca [42 x i8] 139; CHECK-NEXT: %[[test3_a5:.*]] = alloca [7 x i8] 140; CHECK-NEXT: %[[test3_a6:.*]] = alloca [7 x i8] 141; CHECK-NEXT: %[[test3_a7:.*]] = alloca [85 x i8] 142 143 %b = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 0 144 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %b, i8* align 8 %src, i32 300, i1 false), !tbaa !0 145; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [42 x i8], [42 x i8]* %[[test3_a1]], i64 0, i64 0 146; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 8 %src, i32 42, {{.*}}), !tbaa [[TAG_0:!.*]] 147; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 42 148; CHECK-NEXT: %[[test3_r1:.*]] = load i8, i8* %[[gep]], {{.*}}, !tbaa [[TAG_0_M42:!.*]] 149; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 43 150; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [99 x i8], [99 x i8]* %[[test3_a2]], i64 0, i64 0 151; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 99, {{.*}}), !tbaa [[TAG_0_M43:!.*]] 152; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 142 153; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 0 154; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 2 %[[gep_src]], i32 16, {{.*}}), !tbaa [[TAG_0_M142:!.*]] 155; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 158 156; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [42 x i8], [42 x i8]* %[[test3_a4]], i64 0, i64 0 157; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 2 %[[gep_src]], i32 42, {{.*}}), !tbaa [[TAG_0_M158:!.*]] 158; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 200 159; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 0 160; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 8 %[[gep_src]], i32 7, {{.*}}) 161; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 207 162; CHECK-NOT: %[[bad_test3_r2:.*]] = load i8, i8* %[[gep]], {{.*}}, !tbaa 163; CHECK-NEXT: %[[test3_r2:.*]] = load i8, i8* %[[gep]], {{.*}} 164; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 208 165; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 0 166; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 8 %[[gep_src]], i32 7, {{.*}}) 167; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 215 168; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [85 x i8], [85 x i8]* %[[test3_a7]], i64 0, i64 0 169; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 85, {{.*}}) 170 171 ; Clobber a single element of the array, this should be promotable, and be deleted. 172 %c = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 42 173 store i8 0, i8* %c 174 175 ; Make a sequence of overlapping stores to the array. These overlap both in 176 ; forward strides and in shrinking accesses. 177 %overlap.1.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 142 178 %overlap.2.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 143 179 %overlap.3.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 144 180 %overlap.4.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 145 181 %overlap.5.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 146 182 %overlap.6.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 147 183 %overlap.7.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 148 184 %overlap.8.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 149 185 %overlap.9.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 150 186 %overlap.1.i16 = bitcast i8* %overlap.1.i8 to i16* 187 %overlap.1.i32 = bitcast i8* %overlap.1.i8 to i32* 188 %overlap.1.i64 = bitcast i8* %overlap.1.i8 to i64* 189 %overlap.2.i64 = bitcast i8* %overlap.2.i8 to i64* 190 %overlap.3.i64 = bitcast i8* %overlap.3.i8 to i64* 191 %overlap.4.i64 = bitcast i8* %overlap.4.i8 to i64* 192 %overlap.5.i64 = bitcast i8* %overlap.5.i8 to i64* 193 %overlap.6.i64 = bitcast i8* %overlap.6.i8 to i64* 194 %overlap.7.i64 = bitcast i8* %overlap.7.i8 to i64* 195 %overlap.8.i64 = bitcast i8* %overlap.8.i8 to i64* 196 %overlap.9.i64 = bitcast i8* %overlap.9.i8 to i64* 197 store i8 1, i8* %overlap.1.i8, !tbaa !3 198; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 0 199; CHECK-NEXT: store i8 1, i8* %[[gep]], align 1, !tbaa [[TAG_3:!.*]] 200 store i16 1, i16* %overlap.1.i16, !tbaa !5 201; CHECK-NEXT: %[[bitcast:.*]] = bitcast [16 x i8]* %[[test3_a3]] to i16* 202; CHECK-NEXT: store i16 1, i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_5:!.*]] 203 store i32 1, i32* %overlap.1.i32, !tbaa !7 204; CHECK-NEXT: %[[bitcast:.*]] = bitcast [16 x i8]* %[[test3_a3]] to i32* 205; CHECK-NEXT: store i32 1, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_7:!.*]] 206 store i64 1, i64* %overlap.1.i64, !tbaa !9 207; CHECK-NEXT: %[[bitcast:.*]] = bitcast [16 x i8]* %[[test3_a3]] to i64* 208; CHECK-NEXT: store i64 1, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_9:!.*]] 209 store i64 2, i64* %overlap.2.i64, !tbaa !11 210; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 1 211; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 212; CHECK-NEXT: store i64 2, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_11:!.*]] 213 store i64 3, i64* %overlap.3.i64, !tbaa !13 214; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 2 215; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 216; CHECK-NEXT: store i64 3, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_13:!.*]] 217 store i64 4, i64* %overlap.4.i64, !tbaa !15 218; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 3 219; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 220; CHECK-NEXT: store i64 4, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_15:!.*]] 221 store i64 5, i64* %overlap.5.i64, !tbaa !17 222; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 4 223; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 224; CHECK-NEXT: store i64 5, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_17:!.*]] 225 store i64 6, i64* %overlap.6.i64, !tbaa !19 226; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 5 227; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 228; CHECK-NEXT: store i64 6, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_19:!.*]] 229 store i64 7, i64* %overlap.7.i64, !tbaa !21 230; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 6 231; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 232; CHECK-NEXT: store i64 7, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_21:!.*]] 233 store i64 8, i64* %overlap.8.i64, !tbaa !23 234; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 7 235; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 236; CHECK-NEXT: store i64 8, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_23:!.*]] 237 store i64 9, i64* %overlap.9.i64, !tbaa !25 238; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 8 239; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i64* 240; CHECK-NEXT: store i64 9, i64* %[[bitcast]], {{.*}}, !tbaa [[TAG_25:!.*]] 241 242 ; Make two sequences of overlapping stores with more gaps and irregularities. 243 %overlap2.1.0.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 200 244 %overlap2.1.1.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 201 245 %overlap2.1.2.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 202 246 %overlap2.1.3.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 203 247 248 %overlap2.2.0.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 208 249 %overlap2.2.1.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 209 250 %overlap2.2.2.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 210 251 %overlap2.2.3.i8 = getelementptr [300 x i8], [300 x i8]* %a, i64 0, i64 211 252 253 %overlap2.1.0.i16 = bitcast i8* %overlap2.1.0.i8 to i16* 254 %overlap2.1.0.i32 = bitcast i8* %overlap2.1.0.i8 to i32* 255 %overlap2.1.1.i32 = bitcast i8* %overlap2.1.1.i8 to i32* 256 %overlap2.1.2.i32 = bitcast i8* %overlap2.1.2.i8 to i32* 257 %overlap2.1.3.i32 = bitcast i8* %overlap2.1.3.i8 to i32* 258 store i8 1, i8* %overlap2.1.0.i8, !tbaa !27 259; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 0 260; CHECK-NEXT: store i8 1, i8* %[[gep]], align 1, !tbaa [[TAG_27:!.*]] 261 store i16 1, i16* %overlap2.1.0.i16, !tbaa !29 262; CHECK-NEXT: %[[bitcast:.*]] = bitcast [7 x i8]* %[[test3_a5]] to i16* 263; CHECK-NEXT: store i16 1, i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_29:!.*]] 264 store i32 1, i32* %overlap2.1.0.i32, !tbaa !31 265; CHECK-NEXT: %[[bitcast:.*]] = bitcast [7 x i8]* %[[test3_a5]] to i32* 266; CHECK-NEXT: store i32 1, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_31:!.*]] 267 store i32 2, i32* %overlap2.1.1.i32, !tbaa !33 268; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 1 269; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i32* 270; CHECK-NEXT: store i32 2, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_33:!.*]] 271 store i32 3, i32* %overlap2.1.2.i32, !tbaa !35 272; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 2 273; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i32* 274; CHECK-NEXT: store i32 3, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_35:!.*]] 275 store i32 4, i32* %overlap2.1.3.i32, !tbaa !37 276; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 3 277; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i32* 278; CHECK-NEXT: store i32 4, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_37:!.*]] 279 280 %overlap2.2.0.i32 = bitcast i8* %overlap2.2.0.i8 to i32* 281 %overlap2.2.1.i16 = bitcast i8* %overlap2.2.1.i8 to i16* 282 %overlap2.2.1.i32 = bitcast i8* %overlap2.2.1.i8 to i32* 283 %overlap2.2.2.i32 = bitcast i8* %overlap2.2.2.i8 to i32* 284 %overlap2.2.3.i32 = bitcast i8* %overlap2.2.3.i8 to i32* 285 store i32 1, i32* %overlap2.2.0.i32, !tbaa !39 286; CHECK-NEXT: %[[bitcast:.*]] = bitcast [7 x i8]* %[[test3_a6]] to i32* 287; CHECK-NEXT: store i32 1, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_39:!.*]] 288 store i8 1, i8* %overlap2.2.1.i8, !tbaa !41 289; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 1 290; CHECK-NEXT: store i8 1, i8* %[[gep]], align 1, !tbaa [[TAG_41:!.*]] 291 store i16 1, i16* %overlap2.2.1.i16, !tbaa !43 292; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 1 293; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 294; CHECK-NEXT: store i16 1, i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_43:!.*]] 295 store i32 1, i32* %overlap2.2.1.i32, !tbaa !45 296; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 1 297; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i32* 298; CHECK-NEXT: store i32 1, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_45:!.*]] 299 store i32 3, i32* %overlap2.2.2.i32, !tbaa !47 300; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 2 301; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i32* 302; CHECK-NEXT: store i32 3, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_47:!.*]] 303 store i32 4, i32* %overlap2.2.3.i32, !tbaa !49 304; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 3 305; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i32* 306; CHECK-NEXT: store i32 4, i32* %[[bitcast]], {{.*}}, !tbaa [[TAG_49:!.*]] 307 308 %overlap2.prefix = getelementptr i8, i8* %overlap2.1.1.i8, i64 -4 309 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %overlap2.prefix, i8* %src, i32 8, i1 false), !tbaa !51 310; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [42 x i8], [42 x i8]* %[[test3_a4]], i64 0, i64 39 311; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %src, i32 3, {{.*}}), !tbaa [[TAG_51:!.*]] 312; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 3 313; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 0 314; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 5, {{.*}}) 315 316 ; Bridge between the overlapping areas 317 call void @llvm.memset.p0i8.i32(i8* %overlap2.1.2.i8, i8 42, i32 8, i1 false), !tbaa !53 318; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 2 319; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 1 %[[gep]], i8 42, i32 5, {{.*}}), !tbaa [[TAG_53:!.*]] 320; ...promoted i8 store... 321; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 0 322; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 1 %[[gep]], i8 42, i32 2, {{.*}}) 323 324 ; Entirely within the second overlap. 325 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %overlap2.2.1.i8, i8* %src, i32 5, i1 false), !tbaa !55 326; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 1 327; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep]], i8* align 1 %src, i32 5, {{.*}}), !tbaa [[TAG_55:!.*]] 328 329 ; Trailing past the second overlap. 330 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %overlap2.2.2.i8, i8* %src, i32 8, i1 false), !tbaa !57 331; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 2 332; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep]], i8* align 1 %src, i32 5, {{.*}}), !tbaa [[TAG_57:!.*]] 333; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 5 334; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [85 x i8], [85 x i8]* %[[test3_a7]], i64 0, i64 0 335; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 3, {{.*}}) 336 337 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %b, i32 300, i1 false), !tbaa !59 338; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [42 x i8], [42 x i8]* %[[test3_a1]], i64 0, i64 0 339; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %dst, i8* align 1 %[[gep]], i32 42, {{.*}}), !tbaa [[TAG_59:!.*]] 340; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 42 341; CHECK-NEXT: store i8 0, i8* %[[gep]], {{.*}} 342; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 43 343; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [99 x i8], [99 x i8]* %[[test3_a2]], i64 0, i64 0 344; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 99, {{.*}}) 345; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 142 346; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [16 x i8], [16 x i8]* %[[test3_a3]], i64 0, i64 0 347; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 16, {{.*}}) 348; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 158 349; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [42 x i8], [42 x i8]* %[[test3_a4]], i64 0, i64 0 350; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 42, {{.*}}) 351; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 200 352; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a5]], i64 0, i64 0 353; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}) 354; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 207 355; CHECK-NEXT: store i8 42, i8* %[[gep]], {{.*}} 356; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 208 357; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test3_a6]], i64 0, i64 0 358; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}) 359; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 215 360; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [85 x i8], [85 x i8]* %[[test3_a7]], i64 0, i64 0 361; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 85, {{.*}}) 362 363 ret void 364} 365 366define void @test4(i8* %dst, i8* %src) { 367; CHECK-LABEL: @test4( 368 369entry: 370 %a = alloca [100 x i8] 371; CHECK-NOT: alloca 372; CHECK: %[[test4_a1:.*]] = alloca [20 x i8] 373; CHECK-NEXT: %[[test4_a2:.*]] = alloca [7 x i8] 374; CHECK-NEXT: %[[test4_a3:.*]] = alloca [10 x i8] 375; CHECK-NEXT: %[[test4_a4:.*]] = alloca [7 x i8] 376; CHECK-NEXT: %[[test4_a5:.*]] = alloca [7 x i8] 377; CHECK-NEXT: %[[test4_a6:.*]] = alloca [40 x i8] 378 379 %b = getelementptr [100 x i8], [100 x i8]* %a, i64 0, i64 0 380 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %b, i8* %src, i32 100, i1 false), !tbaa !0 381; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [20 x i8], [20 x i8]* %[[test4_a1]], i64 0, i64 0 382; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep]], i8* align 1 %src, i32 20, {{.*}}), !tbaa [[TAG_0]] 383; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 20 384; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 385; CHECK-NEXT: %[[test4_r1:.*]] = load i16, i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_0_M20:!.*]] 386; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 22 387; CHECK-NEXT: %[[test4_r2:.*]] = load i8, i8* %[[gep]], {{.*}}, !tbaa [[TAG_0_M22:!.*]] 388; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 23 389; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a2]], i64 0, i64 0 390; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_0_M23:!.*]] 391; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 30 392; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [10 x i8], [10 x i8]* %[[test4_a3]], i64 0, i64 0 393; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 10, {{.*}}), !tbaa [[TAG_0_M30:!.*]] 394; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 40 395; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 396; CHECK-NEXT: %[[test4_r3:.*]] = load i16, i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_0_M40:!.*]] 397; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 42 398; CHECK-NEXT: %[[test4_r4:.*]] = load i8, i8* %[[gep]], {{.*}}, !tbaa [[TAG_0_M42]] 399; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 43 400; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a4]], i64 0, i64 0 401; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_0_M43]] 402; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 50 403; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 404; CHECK-NEXT: %[[test4_r5:.*]] = load i16, i16* %[[bitcast]], {{.*}}, !tbaa [[TAG_0_M50:!.*]] 405; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %src, i64 52 406; CHECK-NEXT: %[[test4_r6:.*]] = load i8, i8* %[[gep]], {{.*}}, !tbaa [[TAG_0_M52:!.*]] 407; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 53 408; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a5]], i64 0, i64 0 409; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}), !tbaa [[TAG_0_M53:!.+]] 410; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds i8, i8* %src, i64 60 411; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [40 x i8], [40 x i8]* %[[test4_a6]], i64 0, i64 0 412; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 40, {{.*}}), !tbaa [[TAG_0_M60:!.+]] 413 414 %a.src.1 = getelementptr [100 x i8], [100 x i8]* %a, i64 0, i64 20 415 %a.dst.1 = getelementptr [100 x i8], [100 x i8]* %a, i64 0, i64 40 416 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a.dst.1, i8* %a.src.1, i32 10, i1 false), !tbaa !3 417; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a4]], i64 0, i64 0 418; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a2]], i64 0, i64 0 419; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}) 420 421 ; Clobber a single element of the array, this should be promotable, and be deleted. 422 %c = getelementptr [100 x i8], [100 x i8]* %a, i64 0, i64 42 423 store i8 0, i8* %c 424 425 %a.src.2 = getelementptr [100 x i8], [100 x i8]* %a, i64 0, i64 50 426 call void @llvm.memmove.p0i8.p0i8.i32(i8* %a.dst.1, i8* %a.src.2, i32 10, i1 false), !tbaa !5 427; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a4]], i64 0, i64 0 428; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a5]], i64 0, i64 0 429; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}) 430 431 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %b, i32 100, i1 false), !tbaa !7 432; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds [20 x i8], [20 x i8]* %[[test4_a1]], i64 0, i64 0 433; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %dst, i8* align 1 %[[gep]], i32 20, {{.*}}), !tbaa [[TAG_7]] 434; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 20 435; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 436; CHECK-NEXT: store i16 %[[test4_r1]], i16* %[[bitcast]], {{.*}} 437; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 22 438; CHECK-NEXT: store i8 %[[test4_r2]], i8* %[[gep]], {{.*}} 439; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 23 440; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a2]], i64 0, i64 0 441; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}) 442; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 30 443; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [10 x i8], [10 x i8]* %[[test4_a3]], i64 0, i64 0 444; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 10, {{.*}}) 445; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 40 446; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 447; CHECK-NEXT: store i16 %[[test4_r5]], i16* %[[bitcast]], {{.*}} 448; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 42 449; CHECK-NEXT: store i8 %[[test4_r6]], i8* %[[gep]], {{.*}} 450; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 43 451; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a4]], i64 0, i64 0 452; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}) 453; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 50 454; CHECK-NEXT: %[[bitcast:.*]] = bitcast i8* %[[gep]] to i16* 455; CHECK-NEXT: store i16 %[[test4_r5]], i16* %[[bitcast]], {{.*}} 456; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds i8, i8* %dst, i64 52 457; CHECK-NEXT: store i8 %[[test4_r6]], i8* %[[gep]], {{.*}} 458; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 53 459; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [7 x i8], [7 x i8]* %[[test4_a5]], i64 0, i64 0 460; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 7, {{.*}}) 461; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8, i8* %dst, i64 60 462; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [40 x i8], [40 x i8]* %[[test4_a6]], i64 0, i64 0 463; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[gep_dst]], i8* align 1 %[[gep_src]], i32 40, {{.*}}) 464 465 ret void 466} 467 468declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind 469declare void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* nocapture, i8* nocapture, i32, i1) nounwind 470declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind 471declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind 472 473define i16 @test5() { 474; CHECK-LABEL: @test5( 475; CHECK-NOT: alloca float 476; CHECK: %[[cast:.*]] = bitcast float 0.0{{.*}} to i32 477; CHECK-NEXT: %[[shr:.*]] = lshr i32 %[[cast]], 16 478; CHECK-NEXT: %[[trunc:.*]] = trunc i32 %[[shr]] to i16 479; CHECK-NEXT: ret i16 %[[trunc]] 480 481entry: 482 %a = alloca [4 x i8] 483 %fptr = bitcast [4 x i8]* %a to float* 484 store float 0.0, float* %fptr 485 %ptr = getelementptr [4 x i8], [4 x i8]* %a, i32 0, i32 2 486 %iptr = bitcast i8* %ptr to i16* 487 %val = load i16, i16* %iptr 488 ret i16 %val 489} 490 491define i16 @test5_multi_addrspace_access() { 492; CHECK-LABEL: @test5_multi_addrspace_access( 493; CHECK-NOT: alloca float 494; CHECK: %[[cast:.*]] = bitcast float 0.0{{.*}} to i32 495; CHECK-NEXT: %[[shr:.*]] = lshr i32 %[[cast]], 16 496; CHECK-NEXT: %[[trunc:.*]] = trunc i32 %[[shr]] to i16 497; CHECK-NEXT: ret i16 %[[trunc]] 498 499entry: 500 %a = alloca [4 x i8] 501 %fptr = bitcast [4 x i8]* %a to float* 502 %fptr.as1 = addrspacecast float* %fptr to float addrspace(1)* 503 store float 0.0, float addrspace(1)* %fptr.as1 504 %ptr = getelementptr [4 x i8], [4 x i8]* %a, i32 0, i32 2 505 %iptr = bitcast i8* %ptr to i16* 506 %val = load i16, i16* %iptr 507 ret i16 %val 508} 509 510define i32 @test6() { 511; CHECK-LABEL: @test6( 512; CHECK: alloca i32 513; CHECK-NEXT: store volatile i32 514; CHECK-NEXT: load i32, i32* 515; CHECK-NEXT: ret i32 516 517entry: 518 %a = alloca [4 x i8] 519 %ptr = getelementptr [4 x i8], [4 x i8]* %a, i32 0, i32 0 520 call void @llvm.memset.p0i8.i32(i8* %ptr, i8 42, i32 4, i1 true) 521 %iptr = bitcast i8* %ptr to i32* 522 %val = load i32, i32* %iptr 523 ret i32 %val 524} 525 526define void @test7(i8* %src, i8* %dst) { 527; CHECK-LABEL: @test7( 528; CHECK: alloca i32 529; CHECK-NEXT: bitcast i8* %src to i32* 530; CHECK-NEXT: load volatile i32, {{.*}}, !tbaa [[TAG_0]] 531; CHECK-NEXT: store volatile i32 {{.*}}, !tbaa [[TAG_0]] 532; CHECK-NEXT: bitcast i8* %dst to i32* 533; CHECK-NEXT: load volatile i32, {{.*}}, !tbaa [[TAG_3]] 534; CHECK-NEXT: store volatile i32 {{.*}}, !tbaa [[TAG_3]] 535; CHECK-NEXT: ret 536 537entry: 538 %a = alloca [4 x i8] 539 %ptr = getelementptr [4 x i8], [4 x i8]* %a, i32 0, i32 0 540 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr, i8* %src, i32 4, i1 true), !tbaa !0 541 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %ptr, i32 4, i1 true), !tbaa !3 542 ret void 543} 544 545 546%S1 = type { i32, i32, [16 x i8] } 547%S2 = type { %S1*, %S2* } 548 549define %S2 @test8(%S2* %s2) { 550; CHECK-LABEL: @test8( 551entry: 552 %new = alloca %S2 553; CHECK-NOT: alloca 554 555 %s2.next.ptr = getelementptr %S2, %S2* %s2, i64 0, i32 1 556 %s2.next = load %S2*, %S2** %s2.next.ptr, !tbaa !0 557; CHECK: %[[gep:.*]] = getelementptr %S2, %S2* %s2, i64 0, i32 1 558; CHECK-NEXT: %[[next:.*]] = load %S2*, %S2** %[[gep]], align 8, !tbaa [[TAG_0]] 559 560 %s2.next.s1.ptr = getelementptr %S2, %S2* %s2.next, i64 0, i32 0 561 %s2.next.s1 = load %S1*, %S1** %s2.next.s1.ptr, !tbaa !3 562 %new.s1.ptr = getelementptr %S2, %S2* %new, i64 0, i32 0 563 store %S1* %s2.next.s1, %S1** %new.s1.ptr, !tbaa !5 564 %s2.next.next.ptr = getelementptr %S2, %S2* %s2.next, i64 0, i32 1 565 %s2.next.next = load %S2*, %S2** %s2.next.next.ptr, !tbaa !7 566 %new.next.ptr = getelementptr %S2, %S2* %new, i64 0, i32 1 567 store %S2* %s2.next.next, %S2** %new.next.ptr, !tbaa !9 568; CHECK-NEXT: %[[gep:.*]] = getelementptr %S2, %S2* %[[next]], i64 0, i32 0 569; CHECK-NEXT: %[[next_s1:.*]] = load %S1*, %S1** %[[gep]], align 8, !tbaa [[TAG_3]] 570; CHECK-NEXT: %[[gep:.*]] = getelementptr %S2, %S2* %[[next]], i64 0, i32 1 571; CHECK-NEXT: %[[next_next:.*]] = load %S2*, %S2** %[[gep]], align 8, !tbaa [[TAG_7]] 572 573 %new.s1 = load %S1*, %S1** %new.s1.ptr 574 %result1 = insertvalue %S2 undef, %S1* %new.s1, 0 575; CHECK-NEXT: %[[result1:.*]] = insertvalue %S2 undef, %S1* %[[next_s1]], 0 576 %new.next = load %S2*, %S2** %new.next.ptr 577 %result2 = insertvalue %S2 %result1, %S2* %new.next, 1 578; CHECK-NEXT: %[[result2:.*]] = insertvalue %S2 %[[result1]], %S2* %[[next_next]], 1 579 ret %S2 %result2 580; CHECK-NEXT: ret %S2 %[[result2]] 581} 582 583define i64 @test9() { 584; Ensure we can handle loads off the end of an alloca even when wrapped in 585; weird bit casts and types. This is valid IR due to the alignment and masking 586; off the bits past the end of the alloca. 587; 588; CHECK-LABEL: @test9( 589; CHECK-NOT: alloca 590; CHECK: %[[b2:.*]] = zext i8 26 to i64 591; CHECK-NEXT: %[[s2:.*]] = shl i64 %[[b2]], 16 592; CHECK-NEXT: %[[m2:.*]] = and i64 undef, -16711681 593; CHECK-NEXT: %[[i2:.*]] = or i64 %[[m2]], %[[s2]] 594; CHECK-NEXT: %[[b1:.*]] = zext i8 0 to i64 595; CHECK-NEXT: %[[s1:.*]] = shl i64 %[[b1]], 8 596; CHECK-NEXT: %[[m1:.*]] = and i64 %[[i2]], -65281 597; CHECK-NEXT: %[[i1:.*]] = or i64 %[[m1]], %[[s1]] 598; CHECK-NEXT: %[[b0:.*]] = zext i8 0 to i64 599; CHECK-NEXT: %[[m0:.*]] = and i64 %[[i1]], -256 600; CHECK-NEXT: %[[i0:.*]] = or i64 %[[m0]], %[[b0]] 601; CHECK-NEXT: %[[result:.*]] = and i64 %[[i0]], 16777215 602; CHECK-NEXT: ret i64 %[[result]] 603 604entry: 605 %a = alloca { [3 x i8] }, align 8 606 %gep1 = getelementptr inbounds { [3 x i8] }, { [3 x i8] }* %a, i32 0, i32 0, i32 0 607 store i8 0, i8* %gep1, align 1 608 %gep2 = getelementptr inbounds { [3 x i8] }, { [3 x i8] }* %a, i32 0, i32 0, i32 1 609 store i8 0, i8* %gep2, align 1 610 %gep3 = getelementptr inbounds { [3 x i8] }, { [3 x i8] }* %a, i32 0, i32 0, i32 2 611 store i8 26, i8* %gep3, align 1 612 %cast = bitcast { [3 x i8] }* %a to { i64 }* 613 %elt = getelementptr inbounds { i64 }, { i64 }* %cast, i32 0, i32 0 614 %load = load i64, i64* %elt 615 %result = and i64 %load, 16777215 616 ret i64 %result 617} 618 619define %S2* @test10() { 620; CHECK-LABEL: @test10( 621; CHECK-NOT: alloca %S2* 622; CHECK: ret %S2* null 623 624entry: 625 %a = alloca [8 x i8] 626 %ptr = getelementptr [8 x i8], [8 x i8]* %a, i32 0, i32 0 627 call void @llvm.memset.p0i8.i32(i8* %ptr, i8 0, i32 8, i1 false) 628 %s2ptrptr = bitcast i8* %ptr to %S2** 629 %s2ptr = load %S2*, %S2** %s2ptrptr 630 ret %S2* %s2ptr 631} 632 633define i32 @test11() { 634; CHECK-LABEL: @test11( 635; CHECK-NOT: alloca 636; CHECK: ret i32 0 637 638entry: 639 %X = alloca i32 640 br i1 undef, label %good, label %bad 641 642good: 643 %Y = getelementptr i32, i32* %X, i64 0 644 store i32 0, i32* %Y 645 %Z = load i32, i32* %Y 646 ret i32 %Z 647 648bad: 649 %Y2 = getelementptr i32, i32* %X, i64 1 650 store i32 0, i32* %Y2 651 %Z2 = load i32, i32* %Y2 652 ret i32 %Z2 653} 654 655define i8 @test12() { 656; We fully promote these to the i24 load or store size, resulting in just masks 657; and other operations that instcombine will fold, but no alloca. 658; 659; CHECK-LABEL: @test12( 660 661entry: 662 %a = alloca [3 x i8] 663 %b = alloca [3 x i8] 664; CHECK-NOT: alloca 665 666 %a0ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 0 667 store i8 0, i8* %a0ptr 668 %a1ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 1 669 store i8 0, i8* %a1ptr 670 %a2ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 2 671 store i8 0, i8* %a2ptr 672 %aiptr = bitcast [3 x i8]* %a to i24* 673 %ai = load i24, i24* %aiptr 674; CHECK-NOT: store 675; CHECK-NOT: load 676; CHECK: %[[ext2:.*]] = zext i8 0 to i24 677; CHECK-NEXT: %[[shift2:.*]] = shl i24 %[[ext2]], 16 678; CHECK-NEXT: %[[mask2:.*]] = and i24 undef, 65535 679; CHECK-NEXT: %[[insert2:.*]] = or i24 %[[mask2]], %[[shift2]] 680; CHECK-NEXT: %[[ext1:.*]] = zext i8 0 to i24 681; CHECK-NEXT: %[[shift1:.*]] = shl i24 %[[ext1]], 8 682; CHECK-NEXT: %[[mask1:.*]] = and i24 %[[insert2]], -65281 683; CHECK-NEXT: %[[insert1:.*]] = or i24 %[[mask1]], %[[shift1]] 684; CHECK-NEXT: %[[ext0:.*]] = zext i8 0 to i24 685; CHECK-NEXT: %[[mask0:.*]] = and i24 %[[insert1]], -256 686; CHECK-NEXT: %[[insert0:.*]] = or i24 %[[mask0]], %[[ext0]] 687 688 %biptr = bitcast [3 x i8]* %b to i24* 689 store i24 %ai, i24* %biptr 690 %b0ptr = getelementptr [3 x i8], [3 x i8]* %b, i64 0, i32 0 691 %b0 = load i8, i8* %b0ptr 692 %b1ptr = getelementptr [3 x i8], [3 x i8]* %b, i64 0, i32 1 693 %b1 = load i8, i8* %b1ptr 694 %b2ptr = getelementptr [3 x i8], [3 x i8]* %b, i64 0, i32 2 695 %b2 = load i8, i8* %b2ptr 696; CHECK-NOT: store 697; CHECK-NOT: load 698; CHECK: %[[trunc0:.*]] = trunc i24 %[[insert0]] to i8 699; CHECK-NEXT: %[[shift1:.*]] = lshr i24 %[[insert0]], 8 700; CHECK-NEXT: %[[trunc1:.*]] = trunc i24 %[[shift1]] to i8 701; CHECK-NEXT: %[[shift2:.*]] = lshr i24 %[[insert0]], 16 702; CHECK-NEXT: %[[trunc2:.*]] = trunc i24 %[[shift2]] to i8 703 704 %bsum0 = add i8 %b0, %b1 705 %bsum1 = add i8 %bsum0, %b2 706 ret i8 %bsum1 707; CHECK: %[[sum0:.*]] = add i8 %[[trunc0]], %[[trunc1]] 708; CHECK-NEXT: %[[sum1:.*]] = add i8 %[[sum0]], %[[trunc2]] 709; CHECK-NEXT: ret i8 %[[sum1]] 710} 711 712define i32 @test13() { 713; Ensure we don't crash and handle undefined loads that straddle the end of the 714; allocation. 715; CHECK-LABEL: @test13( 716; CHECK: %[[value:.*]] = zext i8 0 to i16 717; CHECK-NEXT: %[[ret:.*]] = zext i16 %[[value]] to i32 718; CHECK-NEXT: ret i32 %[[ret]] 719 720entry: 721 %a = alloca [3 x i8], align 2 722 %b0ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 0 723 store i8 0, i8* %b0ptr 724 %b1ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 1 725 store i8 0, i8* %b1ptr 726 %b2ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 2 727 store i8 0, i8* %b2ptr 728 %iptrcast = bitcast [3 x i8]* %a to i16* 729 %iptrgep = getelementptr i16, i16* %iptrcast, i64 1 730 %i = load i16, i16* %iptrgep 731 %ret = zext i16 %i to i32 732 ret i32 %ret 733} 734 735%test14.struct = type { [3 x i32] } 736 737define void @test14(...) nounwind uwtable { 738; This is a strange case where we split allocas into promotable partitions, but 739; also gain enough data to prove they must be dead allocas due to GEPs that walk 740; across two adjacent allocas. Test that we don't try to promote or otherwise 741; do bad things to these dead allocas, they should just be removed. 742; CHECK-LABEL: @test14( 743; CHECK-NEXT: entry: 744; CHECK-NEXT: ret void 745 746entry: 747 %a = alloca %test14.struct 748 %p = alloca %test14.struct* 749 %0 = bitcast %test14.struct* %a to i8* 750 %1 = getelementptr i8, i8* %0, i64 12 751 %2 = bitcast i8* %1 to %test14.struct* 752 %3 = getelementptr inbounds %test14.struct, %test14.struct* %2, i32 0, i32 0 753 %4 = getelementptr inbounds %test14.struct, %test14.struct* %a, i32 0, i32 0 754 %5 = bitcast [3 x i32]* %3 to i32* 755 %6 = bitcast [3 x i32]* %4 to i32* 756 %7 = load i32, i32* %6, align 4 757 store i32 %7, i32* %5, align 4 758 %8 = getelementptr inbounds i32, i32* %5, i32 1 759 %9 = getelementptr inbounds i32, i32* %6, i32 1 760 %10 = load i32, i32* %9, align 4 761 store i32 %10, i32* %8, align 4 762 %11 = getelementptr inbounds i32, i32* %5, i32 2 763 %12 = getelementptr inbounds i32, i32* %6, i32 2 764 %13 = load i32, i32* %12, align 4 765 store i32 %13, i32* %11, align 4 766 ret void 767} 768 769define i32 @test15(i1 %flag) nounwind uwtable { 770; Ensure that when there are dead instructions using an alloca that are not 771; loads or stores we still delete them during partitioning and rewriting. 772; Otherwise we'll go to promote them while thy still have unpromotable uses. 773; CHECK-LABEL: @test15( 774; CHECK-NEXT: entry: 775; CHECK-NEXT: br label %loop 776; CHECK: loop: 777; CHECK-NEXT: br label %loop 778 779entry: 780 %l0 = alloca i64 781 %l1 = alloca i64 782 %l2 = alloca i64 783 %l3 = alloca i64 784 br label %loop 785 786loop: 787 %dead3 = phi i8* [ %gep3, %loop ], [ null, %entry ] 788 789 store i64 1879048192, i64* %l0, align 8 790 %bc0 = bitcast i64* %l0 to i8* 791 %gep0 = getelementptr i8, i8* %bc0, i64 3 792 %dead0 = bitcast i8* %gep0 to i64* 793 794 store i64 1879048192, i64* %l1, align 8 795 %bc1 = bitcast i64* %l1 to i8* 796 %gep1 = getelementptr i8, i8* %bc1, i64 3 797 %dead1 = getelementptr i8, i8* %gep1, i64 1 798 799 store i64 1879048192, i64* %l2, align 8 800 %bc2 = bitcast i64* %l2 to i8* 801 %gep2.1 = getelementptr i8, i8* %bc2, i64 1 802 %gep2.2 = getelementptr i8, i8* %bc2, i64 3 803 ; Note that this select should get visited multiple times due to using two 804 ; different GEPs off the same alloca. We should only delete it once. 805 %dead2 = select i1 %flag, i8* %gep2.1, i8* %gep2.2 806 807 store i64 1879048192, i64* %l3, align 8 808 %bc3 = bitcast i64* %l3 to i8* 809 %gep3 = getelementptr i8, i8* %bc3, i64 3 810 811 br label %loop 812} 813 814define void @test16(i8* %src, i8* %dst) { 815; Ensure that we can promote an alloca of [3 x i8] to an i24 SSA value. 816; CHECK-LABEL: @test16( 817; CHECK-NOT: alloca 818; CHECK: %[[srccast:.*]] = bitcast i8* %src to i24* 819; CHECK-NEXT: load i24, i24* %[[srccast]], {{.*}}, !tbaa [[TAG_0]] 820; CHECK-NEXT: %[[dstcast:.*]] = bitcast i8* %dst to i24* 821; CHECK-NEXT: store i24 0, i24* %[[dstcast]], {{.*}}, !tbaa [[TAG_5]] 822; CHECK-NEXT: ret void 823 824entry: 825 %a = alloca [3 x i8] 826 %ptr = getelementptr [3 x i8], [3 x i8]* %a, i32 0, i32 0 827 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr, i8* %src, i32 4, i1 false), !tbaa !0 828 %cast = bitcast i8* %ptr to i24* 829 store i24 0, i24* %cast, !tbaa !3 830 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %ptr, i32 4, i1 false), !tbaa !5 831 ret void 832} 833 834define void @test17(i8* %src, i8* %dst) { 835; Ensure that we can rewrite unpromotable memcpys which extend past the end of 836; the alloca. 837; CHECK-LABEL: @test17( 838; CHECK: %[[a:.*]] = alloca [3 x i8] 839; CHECK-NEXT: %[[ptr:.*]] = getelementptr [3 x i8], [3 x i8]* %[[a]], i32 0, i32 0 840; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %[[ptr]], i8* %src, {{.*}}), !tbaa [[TAG_0]] 841; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %[[ptr]], {{.*}}), !tbaa [[TAG_3]] 842; CHECK-NEXT: ret void 843 844entry: 845 %a = alloca [3 x i8] 846 %ptr = getelementptr [3 x i8], [3 x i8]* %a, i32 0, i32 0 847 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr, i8* %src, i32 4, i1 true), !tbaa !0 848 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %ptr, i32 4, i1 true), !tbaa !3 849 ret void 850} 851 852define void @test18(i8* %src, i8* %dst, i32 %size) { 853; Preserve transfer instrinsics with a variable size, even if they overlap with 854; fixed size operations. Further, continue to split and promote allocas preceding 855; the variable sized intrinsic. 856; CHECK-LABEL: @test18( 857; CHECK: %[[a:.*]] = alloca [34 x i8] 858; CHECK: %[[srcgep1:.*]] = getelementptr inbounds i8, i8* %src, i64 4 859; CHECK-NEXT: %[[srccast1:.*]] = bitcast i8* %[[srcgep1]] to i32* 860; CHECK-NEXT: %[[srcload:.*]] = load i32, i32* %[[srccast1]], {{.*}}, !tbaa [[TAG_0_M4:!.*]] 861; CHECK-NEXT: %[[agep1:.*]] = getelementptr inbounds [34 x i8], [34 x i8]* %[[a]], i64 0, i64 0 862; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 %[[agep1]], i8* %src, i32 %size, {{.*}}), !tbaa [[TAG_3]] 863; CHECK-NEXT: %[[agep2:.*]] = getelementptr inbounds [34 x i8], [34 x i8]* %[[a]], i64 0, i64 0 864; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 1 %[[agep2]], i8 42, i32 %size, {{.*}}), !tbaa [[TAG_5]] 865; CHECK-NEXT: %[[dstcast1:.*]] = bitcast i8* %dst to i32* 866; CHECK-NEXT: store i32 42, i32* %[[dstcast1]], {{.*}}, !tbaa [[TAG_9]] 867; CHECK-NEXT: %[[dstgep1:.*]] = getelementptr inbounds i8, i8* %dst, i64 4 868; CHECK-NEXT: %[[dstcast2:.*]] = bitcast i8* %[[dstgep1]] to i32* 869; CHECK-NEXT: store i32 %[[srcload]], i32* %[[dstcast2]], {{.*}} 870; CHECK-NEXT: %[[agep3:.*]] = getelementptr inbounds [34 x i8], [34 x i8]* %[[a]], i64 0, i64 0 871; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* align 1 %[[agep3]], i32 %size, {{.*}}), !tbaa [[TAG_11]] 872; CHECK-NEXT: ret void 873 874entry: 875 %a = alloca [42 x i8] 876 %ptr = getelementptr [42 x i8], [42 x i8]* %a, i32 0, i32 0 877 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr, i8* %src, i32 8, i1 false), !tbaa !0 878 %ptr2 = getelementptr [42 x i8], [42 x i8]* %a, i32 0, i32 8 879 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr2, i8* %src, i32 %size, i1 false), !tbaa !3 880 call void @llvm.memset.p0i8.i32(i8* %ptr2, i8 42, i32 %size, i1 false), !tbaa !5 881 %cast = bitcast i8* %ptr to i32* 882 store i32 42, i32* %cast, !tbaa !7 883 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %ptr, i32 8, i1 false), !tbaa !9 884 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %ptr2, i32 %size, i1 false), !tbaa !11 885 ret void 886} 887 888%opaque = type opaque 889 890define i32 @test19(%opaque* %x) { 891; This input will cause us to try to compute a natural GEP when rewriting 892; pointers in such a way that we try to GEP through the opaque type. Previously, 893; a check for an unsized type was missing and this crashed. Ensure it behaves 894; reasonably now. 895; CHECK-LABEL: @test19( 896; CHECK-NOT: alloca 897; CHECK: ret i32 undef 898 899entry: 900 %a = alloca { i64, i8* } 901 %cast1 = bitcast %opaque* %x to i8* 902 %cast2 = bitcast { i64, i8* }* %a to i8* 903 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast2, i8* %cast1, i32 16, i1 false) 904 %gep = getelementptr inbounds { i64, i8* }, { i64, i8* }* %a, i32 0, i32 0 905 %val = load i64, i64* %gep 906 ret i32 undef 907} 908 909declare void @llvm.memcpy.p0i8.p1i8.i32(i8* nocapture, i8 addrspace(1)* nocapture, i32, i32, i1) nounwind 910 911define i32 @test19_addrspacecast(%opaque* %x) { 912; This input will cause us to try to compute a natural GEP when rewriting 913; pointers in such a way that we try to GEP through the opaque type. Previously, 914; a check for an unsized type was missing and this crashed. Ensure it behaves 915; reasonably now. 916; CHECK-LABEL: @test19_addrspacecast( 917; CHECK-NOT: alloca 918; CHECK: ret i32 undef 919 920entry: 921 %a = alloca { i64, i8* } 922 %cast1 = addrspacecast %opaque* %x to i8 addrspace(1)* 923 %cast2 = bitcast { i64, i8* }* %a to i8* 924 call void @llvm.memcpy.p0i8.p1i8.i32(i8* %cast2, i8 addrspace(1)* %cast1, i32 16, i32 1, i1 false) 925 %gep = getelementptr inbounds { i64, i8* }, { i64, i8* }* %a, i32 0, i32 0 926 %val = load i64, i64* %gep 927 ret i32 undef 928} 929 930define i32 @test20() { 931; Ensure we can track negative offsets (before the beginning of the alloca) and 932; negative relative offsets from offsets starting past the end of the alloca. 933; CHECK-LABEL: @test20( 934; CHECK-NOT: alloca 935; CHECK: %[[sum1:.*]] = add i32 1, 2 936; CHECK: %[[sum2:.*]] = add i32 %[[sum1]], 3 937; CHECK: ret i32 %[[sum2]] 938 939entry: 940 %a = alloca [3 x i32] 941 %gep1 = getelementptr [3 x i32], [3 x i32]* %a, i32 0, i32 0 942 store i32 1, i32* %gep1 943 %gep2.1 = getelementptr [3 x i32], [3 x i32]* %a, i32 0, i32 -2 944 %gep2.2 = getelementptr i32, i32* %gep2.1, i32 3 945 store i32 2, i32* %gep2.2 946 %gep3.1 = getelementptr [3 x i32], [3 x i32]* %a, i32 0, i32 14 947 %gep3.2 = getelementptr i32, i32* %gep3.1, i32 -12 948 store i32 3, i32* %gep3.2 949 950 %load1 = load i32, i32* %gep1 951 %load2 = load i32, i32* %gep2.2 952 %load3 = load i32, i32* %gep3.2 953 %sum1 = add i32 %load1, %load2 954 %sum2 = add i32 %sum1, %load3 955 ret i32 %sum2 956} 957 958declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind 959 960define i8 @test21() { 961; Test allocations and offsets which border on overflow of the int64_t used 962; internally. This is really awkward to really test as LLVM doesn't really 963; support such extreme constructs cleanly. 964; CHECK-LABEL: @test21( 965; CHECK-NOT: alloca 966; CHECK: or i8 -1, -1 967 968entry: 969 %a = alloca [2305843009213693951 x i8] 970 %gep0 = getelementptr [2305843009213693951 x i8], [2305843009213693951 x i8]* %a, i64 0, i64 2305843009213693949 971 store i8 255, i8* %gep0 972 %gep1 = getelementptr [2305843009213693951 x i8], [2305843009213693951 x i8]* %a, i64 0, i64 -9223372036854775807 973 %gep2 = getelementptr i8, i8* %gep1, i64 -1 974 call void @llvm.memset.p0i8.i64(i8* %gep2, i8 0, i64 18446744073709551615, i1 false) 975 %gep3 = getelementptr i8, i8* %gep1, i64 9223372036854775807 976 %gep4 = getelementptr i8, i8* %gep3, i64 9223372036854775807 977 %gep5 = getelementptr i8, i8* %gep4, i64 -6917529027641081857 978 store i8 255, i8* %gep5 979 %cast1 = bitcast i8* %gep4 to i32* 980 store i32 0, i32* %cast1 981 %load = load i8, i8* %gep0 982 %gep6 = getelementptr i8, i8* %gep0, i32 1 983 %load2 = load i8, i8* %gep6 984 %result = or i8 %load, %load2 985 ret i8 %result 986} 987 988%PR13916.struct = type { i8 } 989 990define void @PR13916.1() { 991; Ensure that we handle overlapping memcpy intrinsics correctly, especially in 992; the case where there is a directly identical value for both source and dest. 993; CHECK: @PR13916.1 994; CHECK-NOT: alloca 995; CHECK: ret void 996 997entry: 998 %a = alloca i8 999 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a, i8* %a, i32 1, i1 false) 1000 %tmp2 = load i8, i8* %a 1001 ret void 1002} 1003 1004define void @PR13916.2() { 1005; Check whether we continue to handle them correctly when they start off with 1006; different pointer value chains, but during rewriting we coalesce them into the 1007; same value. 1008; CHECK: @PR13916.2 1009; CHECK-NOT: alloca 1010; CHECK: ret void 1011 1012entry: 1013 %a = alloca %PR13916.struct, align 1 1014 br i1 undef, label %if.then, label %if.end 1015 1016if.then: 1017 %tmp0 = bitcast %PR13916.struct* %a to i8* 1018 %tmp1 = bitcast %PR13916.struct* %a to i8* 1019 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp0, i8* %tmp1, i32 1, i1 false) 1020 br label %if.end 1021 1022if.end: 1023 %gep = getelementptr %PR13916.struct, %PR13916.struct* %a, i32 0, i32 0 1024 %tmp2 = load i8, i8* %gep 1025 ret void 1026} 1027 1028define void @PR13990() { 1029; Ensure we can handle cases where processing one alloca causes the other 1030; alloca to become dead and get deleted. This might crash or fail under 1031; Valgrind if we regress. 1032; CHECK-LABEL: @PR13990( 1033; CHECK-NOT: alloca 1034; CHECK: unreachable 1035; CHECK: unreachable 1036 1037entry: 1038 %tmp1 = alloca i8* 1039 %tmp2 = alloca i8* 1040 br i1 undef, label %bb1, label %bb2 1041 1042bb1: 1043 store i8* undef, i8** %tmp2 1044 br i1 undef, label %bb2, label %bb3 1045 1046bb2: 1047 %tmp50 = select i1 undef, i8** %tmp2, i8** %tmp1 1048 br i1 undef, label %bb3, label %bb4 1049 1050bb3: 1051 unreachable 1052 1053bb4: 1054 unreachable 1055} 1056 1057define double @PR13969(double %x) { 1058; Check that we detect when promotion will un-escape an alloca and iterate to 1059; re-try running SROA over that alloca. Without that, the two allocas that are 1060; stored into a dead alloca don't get rewritten and promoted. 1061; CHECK-LABEL: @PR13969( 1062 1063entry: 1064 %a = alloca double 1065 %b = alloca double* 1066 %c = alloca double 1067; CHECK-NOT: alloca 1068 1069 store double %x, double* %a 1070 store double* %c, double** %b 1071 store double* %a, double** %b 1072 store double %x, double* %c 1073 %ret = load double, double* %a 1074; CHECK-NOT: store 1075; CHECK-NOT: load 1076 1077 ret double %ret 1078; CHECK: ret double %x 1079} 1080 1081%PR14034.struct = type { { {} }, i32, %PR14034.list } 1082%PR14034.list = type { %PR14034.list*, %PR14034.list* } 1083 1084define void @PR14034() { 1085; This test case tries to form GEPs into the empty leading struct members, and 1086; subsequently crashed (under valgrind) before we fixed the PR. The important 1087; thing is to handle empty structs gracefully. 1088; CHECK-LABEL: @PR14034( 1089 1090entry: 1091 %a = alloca %PR14034.struct 1092 %list = getelementptr %PR14034.struct, %PR14034.struct* %a, i32 0, i32 2 1093 %prev = getelementptr %PR14034.list, %PR14034.list* %list, i32 0, i32 1 1094 store %PR14034.list* undef, %PR14034.list** %prev 1095 %cast0 = bitcast %PR14034.struct* undef to i8* 1096 %cast1 = bitcast %PR14034.struct* %a to i8* 1097 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast0, i8* %cast1, i32 12, i1 false) 1098 ret void 1099} 1100 1101define i32 @test22(i32 %x) { 1102; Test that SROA and promotion is not confused by a grab bax mixture of pointer 1103; types involving wrapper aggregates and zero-length aggregate members. 1104; CHECK-LABEL: @test22( 1105 1106entry: 1107 %a1 = alloca { { [1 x { i32 }] } } 1108 %a2 = alloca { {}, { float }, [0 x i8] } 1109 %a3 = alloca { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } } 1110; CHECK-NOT: alloca 1111 1112 %wrap1 = insertvalue [1 x { i32 }] undef, i32 %x, 0, 0 1113 %gep1 = getelementptr { { [1 x { i32 }] } }, { { [1 x { i32 }] } }* %a1, i32 0, i32 0, i32 0 1114 store [1 x { i32 }] %wrap1, [1 x { i32 }]* %gep1 1115 1116 %gep2 = getelementptr { { [1 x { i32 }] } }, { { [1 x { i32 }] } }* %a1, i32 0, i32 0 1117 %ptrcast1 = bitcast { [1 x { i32 }] }* %gep2 to { [1 x { float }] }* 1118 %load1 = load { [1 x { float }] }, { [1 x { float }] }* %ptrcast1 1119 %unwrap1 = extractvalue { [1 x { float }] } %load1, 0, 0 1120 1121 %wrap2 = insertvalue { {}, { float }, [0 x i8] } undef, { float } %unwrap1, 1 1122 store { {}, { float }, [0 x i8] } %wrap2, { {}, { float }, [0 x i8] }* %a2 1123 1124 %gep3 = getelementptr { {}, { float }, [0 x i8] }, { {}, { float }, [0 x i8] }* %a2, i32 0, i32 1, i32 0 1125 %ptrcast2 = bitcast float* %gep3 to <4 x i8>* 1126 %load3 = load <4 x i8>, <4 x i8>* %ptrcast2 1127 %valcast1 = bitcast <4 x i8> %load3 to i32 1128 1129 %wrap3 = insertvalue [1 x [1 x i32]] undef, i32 %valcast1, 0, 0 1130 %wrap4 = insertvalue { [1 x [1 x i32]], {} } undef, [1 x [1 x i32]] %wrap3, 0 1131 %gep4 = getelementptr { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }, { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }* %a3, i32 0, i32 1 1132 %ptrcast3 = bitcast { [0 x double], [1 x [1 x <4 x i8>]], {} }* %gep4 to { [1 x [1 x i32]], {} }* 1133 store { [1 x [1 x i32]], {} } %wrap4, { [1 x [1 x i32]], {} }* %ptrcast3 1134 1135 %gep5 = getelementptr { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }, { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }* %a3, i32 0, i32 1, i32 1, i32 0 1136 %ptrcast4 = bitcast [1 x <4 x i8>]* %gep5 to { {}, float, {} }* 1137 %load4 = load { {}, float, {} }, { {}, float, {} }* %ptrcast4 1138 %unwrap2 = extractvalue { {}, float, {} } %load4, 1 1139 %valcast2 = bitcast float %unwrap2 to i32 1140 1141 ret i32 %valcast2 1142; CHECK: ret i32 1143} 1144 1145define void @PR14059.1(double* %d) { 1146; In PR14059 a peculiar construct was identified as something that is used 1147; pervasively in ARM's ABI-calling-convention lowering: the passing of a struct 1148; of doubles via an array of i32 in order to place the data into integer 1149; registers. This in turn was missed as an optimization by SROA due to the 1150; partial loads and stores of integers to the double alloca we were trying to 1151; form and promote. The solution is to widen the integer operations to be 1152; whole-alloca operations, and perform the appropriate bitcasting on the 1153; *values* rather than the pointers. When this works, partial reads and writes 1154; via integers can be promoted away. 1155; CHECK: @PR14059.1 1156; CHECK-NOT: alloca 1157; CHECK: ret void 1158 1159entry: 1160 %X.sroa.0.i = alloca double, align 8 1161 %0 = bitcast double* %X.sroa.0.i to i8* 1162 call void @llvm.lifetime.start.p0i8(i64 -1, i8* %0) 1163 1164 ; Store to the low 32-bits... 1165 %X.sroa.0.0.cast2.i = bitcast double* %X.sroa.0.i to i32* 1166 store i32 0, i32* %X.sroa.0.0.cast2.i, align 8 1167 1168 ; Also use a memset to the middle 32-bits for fun. 1169 %X.sroa.0.2.raw_idx2.i = getelementptr inbounds i8, i8* %0, i32 2 1170 call void @llvm.memset.p0i8.i64(i8* %X.sroa.0.2.raw_idx2.i, i8 0, i64 4, i1 false) 1171 1172 ; Or a memset of the whole thing. 1173 call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 8, i1 false) 1174 1175 ; Write to the high 32-bits with a memcpy. 1176 %X.sroa.0.4.raw_idx4.i = getelementptr inbounds i8, i8* %0, i32 4 1177 %d.raw = bitcast double* %d to i8* 1178 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %X.sroa.0.4.raw_idx4.i, i8* %d.raw, i32 4, i1 false) 1179 1180 ; Store to the high 32-bits... 1181 %X.sroa.0.4.cast5.i = bitcast i8* %X.sroa.0.4.raw_idx4.i to i32* 1182 store i32 1072693248, i32* %X.sroa.0.4.cast5.i, align 4 1183 1184 ; Do the actual math... 1185 %X.sroa.0.0.load1.i = load double, double* %X.sroa.0.i, align 8 1186 %accum.real.i = load double, double* %d, align 8 1187 %add.r.i = fadd double %accum.real.i, %X.sroa.0.0.load1.i 1188 store double %add.r.i, double* %d, align 8 1189 call void @llvm.lifetime.end.p0i8(i64 -1, i8* %0) 1190 ret void 1191} 1192 1193define i64 @PR14059.2({ float, float }* %phi) { 1194; Check that SROA can split up alloca-wide integer loads and stores where the 1195; underlying alloca has smaller components that are accessed independently. This 1196; shows up particularly with ABI lowering patterns coming out of Clang that rely 1197; on the particular register placement of a single large integer return value. 1198; CHECK: @PR14059.2 1199 1200entry: 1201 %retval = alloca { float, float }, align 4 1202 ; CHECK-NOT: alloca 1203 1204 %0 = bitcast { float, float }* %retval to i64* 1205 store i64 0, i64* %0 1206 ; CHECK-NOT: store 1207 1208 %phi.realp = getelementptr inbounds { float, float }, { float, float }* %phi, i32 0, i32 0 1209 %phi.real = load float, float* %phi.realp 1210 %phi.imagp = getelementptr inbounds { float, float }, { float, float }* %phi, i32 0, i32 1 1211 %phi.imag = load float, float* %phi.imagp 1212 ; CHECK: %[[realp:.*]] = getelementptr inbounds { float, float }, { float, float }* %phi, i32 0, i32 0 1213 ; CHECK-NEXT: %[[real:.*]] = load float, float* %[[realp]] 1214 ; CHECK-NEXT: %[[imagp:.*]] = getelementptr inbounds { float, float }, { float, float }* %phi, i32 0, i32 1 1215 ; CHECK-NEXT: %[[imag:.*]] = load float, float* %[[imagp]] 1216 1217 %real = getelementptr inbounds { float, float }, { float, float }* %retval, i32 0, i32 0 1218 %imag = getelementptr inbounds { float, float }, { float, float }* %retval, i32 0, i32 1 1219 store float %phi.real, float* %real 1220 store float %phi.imag, float* %imag 1221 ; CHECK-NEXT: %[[real_convert:.*]] = bitcast float %[[real]] to i32 1222 ; CHECK-NEXT: %[[imag_convert:.*]] = bitcast float %[[imag]] to i32 1223 ; CHECK-NEXT: %[[imag_ext:.*]] = zext i32 %[[imag_convert]] to i64 1224 ; CHECK-NEXT: %[[imag_shift:.*]] = shl i64 %[[imag_ext]], 32 1225 ; CHECK-NEXT: %[[imag_mask:.*]] = and i64 undef, 4294967295 1226 ; CHECK-NEXT: %[[imag_insert:.*]] = or i64 %[[imag_mask]], %[[imag_shift]] 1227 ; CHECK-NEXT: %[[real_ext:.*]] = zext i32 %[[real_convert]] to i64 1228 ; CHECK-NEXT: %[[real_mask:.*]] = and i64 %[[imag_insert]], -4294967296 1229 ; CHECK-NEXT: %[[real_insert:.*]] = or i64 %[[real_mask]], %[[real_ext]] 1230 1231 %1 = load i64, i64* %0, align 1 1232 ret i64 %1 1233 ; CHECK-NEXT: ret i64 %[[real_insert]] 1234} 1235 1236define void @PR14105({ [16 x i8] }* %ptr) { 1237; Ensure that when rewriting the GEP index '-1' for this alloca we preserve is 1238; sign as negative. We use a volatile memcpy to ensure promotion never actually 1239; occurs. 1240; CHECK-LABEL: @PR14105( 1241 1242entry: 1243 %a = alloca { [16 x i8] }, align 8 1244; CHECK: alloca [16 x i8], align 8 1245 1246 %gep = getelementptr inbounds { [16 x i8] }, { [16 x i8] }* %ptr, i64 -1 1247; CHECK-NEXT: getelementptr inbounds { [16 x i8] }, { [16 x i8] }* %ptr, i64 -1, i32 0, i64 0 1248 1249 %cast1 = bitcast { [16 x i8 ] }* %gep to i8* 1250 %cast2 = bitcast { [16 x i8 ] }* %a to i8* 1251 call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %cast1, i8* align 8 %cast2, i32 16, i1 true) 1252 ret void 1253; CHECK: ret 1254} 1255 1256define void @PR14105_as1({ [16 x i8] } addrspace(1)* %ptr) { 1257; Make sure this the right address space pointer is used for type check. 1258; CHECK-LABEL: @PR14105_as1( 1259; CHECK: alloca { [16 x i8] }, align 8 1260; CHECK-NEXT: %gep = getelementptr inbounds { [16 x i8] }, { [16 x i8] } addrspace(1)* %ptr, i64 -1 1261; CHECK-NEXT: %cast1 = bitcast { [16 x i8] } addrspace(1)* %gep to i8 addrspace(1)* 1262; CHECK-NEXT: %cast2 = bitcast { [16 x i8] }* %a to i8* 1263; CHECK-NEXT: call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* align 8 %cast1, i8* align 8 %cast2, i32 16, i1 true) 1264 1265entry: 1266 %a = alloca { [16 x i8] }, align 8 1267 %gep = getelementptr inbounds { [16 x i8] }, { [16 x i8] } addrspace(1)* %ptr, i64 -1 1268 %cast1 = bitcast { [16 x i8 ] } addrspace(1)* %gep to i8 addrspace(1)* 1269 %cast2 = bitcast { [16 x i8 ] }* %a to i8* 1270 call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* align 8 %cast1, i8* align 8 %cast2, i32 16, i1 true) 1271 ret void 1272; CHECK: ret 1273} 1274 1275define void @PR14465() { 1276; Ensure that we don't crash when analyzing a alloca larger than the maximum 1277; integer type width (MAX_INT_BITS) supported by llvm (1048576*32 > (1<<23)-1). 1278; CHECK-LABEL: @PR14465( 1279 1280 %stack = alloca [1048576 x i32], align 16 1281; CHECK: alloca [1048576 x i32] 1282 %cast = bitcast [1048576 x i32]* %stack to i8* 1283 call void @llvm.memset.p0i8.i64(i8* align 16 %cast, i8 -2, i64 4194304, i1 false) 1284 ret void 1285; CHECK: ret 1286} 1287 1288define void @PR14548(i1 %x) { 1289; Handle a mixture of i1 and i8 loads and stores to allocas. This particular 1290; pattern caused crashes and invalid output in the PR, and its nature will 1291; trigger a mixture in several permutations as we resolve each alloca 1292; iteratively. 1293; Note that we don't do a particularly good *job* of handling these mixtures, 1294; but the hope is that this is very rare. 1295; CHECK-LABEL: @PR14548( 1296 1297entry: 1298 %a = alloca <{ i1 }>, align 8 1299 %b = alloca <{ i1 }>, align 8 1300; CHECK: %[[a:.*]] = alloca i8, align 8 1301; CHECK-NEXT: %[[b:.*]] = alloca i8, align 8 1302 1303 %b.i1 = bitcast <{ i1 }>* %b to i1* 1304 store i1 %x, i1* %b.i1, align 8 1305 %b.i8 = bitcast <{ i1 }>* %b to i8* 1306 %foo = load i8, i8* %b.i8, align 1 1307; CHECK-NEXT: %[[b_cast:.*]] = bitcast i8* %[[b]] to i1* 1308; CHECK-NEXT: store i1 %x, i1* %[[b_cast]], align 8 1309; CHECK-NEXT: {{.*}} = load i8, i8* %[[b]], align 8 1310 1311 %a.i8 = bitcast <{ i1 }>* %a to i8* 1312 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a.i8, i8* %b.i8, i32 1, i1 false) nounwind 1313 %bar = load i8, i8* %a.i8, align 1 1314 %a.i1 = getelementptr inbounds <{ i1 }>, <{ i1 }>* %a, i32 0, i32 0 1315 %baz = load i1, i1* %a.i1, align 1 1316; CHECK-NEXT: %[[copy:.*]] = load i8, i8* %[[b]], align 8 1317; CHECK-NEXT: store i8 %[[copy]], i8* %[[a]], align 8 1318; CHECK-NEXT: {{.*}} = load i8, i8* %[[a]], align 8 1319; CHECK-NEXT: %[[a_cast:.*]] = bitcast i8* %[[a]] to i1* 1320; CHECK-NEXT: {{.*}} = load i1, i1* %[[a_cast]], align 8 1321 1322 ret void 1323} 1324 1325define <3 x i8> @PR14572.1(i32 %x) { 1326; Ensure that a split integer store which is wider than the type size of the 1327; alloca (relying on the alloc size padding) doesn't trigger an assert. 1328; CHECK: @PR14572.1 1329 1330entry: 1331 %a = alloca <3 x i8>, align 4 1332; CHECK-NOT: alloca 1333 1334 %cast = bitcast <3 x i8>* %a to i32* 1335 store i32 %x, i32* %cast, align 1 1336 %y = load <3 x i8>, <3 x i8>* %a, align 4 1337 ret <3 x i8> %y 1338; CHECK: ret <3 x i8> 1339} 1340 1341define i32 @PR14572.2(<3 x i8> %x) { 1342; Ensure that a split integer load which is wider than the type size of the 1343; alloca (relying on the alloc size padding) doesn't trigger an assert. 1344; CHECK: @PR14572.2 1345 1346entry: 1347 %a = alloca <3 x i8>, align 4 1348; CHECK-NOT: alloca 1349 1350 store <3 x i8> %x, <3 x i8>* %a, align 1 1351 %cast = bitcast <3 x i8>* %a to i32* 1352 %y = load i32, i32* %cast, align 4 1353 ret i32 %y 1354; CHECK: ret i32 1355} 1356 1357define i32 @PR14601(i32 %x) { 1358; Don't try to form a promotable integer alloca when there is a variable length 1359; memory intrinsic. 1360; CHECK-LABEL: @PR14601( 1361 1362entry: 1363 %a = alloca i32 1364; CHECK: alloca 1365 1366 %a.i8 = bitcast i32* %a to i8* 1367 call void @llvm.memset.p0i8.i32(i8* %a.i8, i8 0, i32 %x, i1 false) 1368 %v = load i32, i32* %a 1369 ret i32 %v 1370} 1371 1372define void @PR15674(i8* %data, i8* %src, i32 %size) { 1373; Arrange (via control flow) to have unmerged stores of a particular width to 1374; an alloca where we incrementally store from the end of the array toward the 1375; beginning of the array. Ensure that the final integer store, despite being 1376; convertable to the integer type that we end up promoting this alloca toward, 1377; doesn't get widened to a full alloca store. 1378; CHECK-LABEL: @PR15674( 1379 1380entry: 1381 %tmp = alloca [4 x i8], align 1 1382; CHECK: alloca i32 1383 1384 switch i32 %size, label %end [ 1385 i32 4, label %bb4 1386 i32 3, label %bb3 1387 i32 2, label %bb2 1388 i32 1, label %bb1 1389 ] 1390 1391bb4: 1392 %src.gep3 = getelementptr inbounds i8, i8* %src, i32 3 1393 %src.3 = load i8, i8* %src.gep3 1394 %tmp.gep3 = getelementptr inbounds [4 x i8], [4 x i8]* %tmp, i32 0, i32 3 1395 store i8 %src.3, i8* %tmp.gep3 1396; CHECK: store i8 1397 1398 br label %bb3 1399 1400bb3: 1401 %src.gep2 = getelementptr inbounds i8, i8* %src, i32 2 1402 %src.2 = load i8, i8* %src.gep2 1403 %tmp.gep2 = getelementptr inbounds [4 x i8], [4 x i8]* %tmp, i32 0, i32 2 1404 store i8 %src.2, i8* %tmp.gep2 1405; CHECK: store i8 1406 1407 br label %bb2 1408 1409bb2: 1410 %src.gep1 = getelementptr inbounds i8, i8* %src, i32 1 1411 %src.1 = load i8, i8* %src.gep1 1412 %tmp.gep1 = getelementptr inbounds [4 x i8], [4 x i8]* %tmp, i32 0, i32 1 1413 store i8 %src.1, i8* %tmp.gep1 1414; CHECK: store i8 1415 1416 br label %bb1 1417 1418bb1: 1419 %src.gep0 = getelementptr inbounds i8, i8* %src, i32 0 1420 %src.0 = load i8, i8* %src.gep0 1421 %tmp.gep0 = getelementptr inbounds [4 x i8], [4 x i8]* %tmp, i32 0, i32 0 1422 store i8 %src.0, i8* %tmp.gep0 1423; CHECK: store i8 1424 1425 br label %end 1426 1427end: 1428 %tmp.raw = bitcast [4 x i8]* %tmp to i8* 1429 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %data, i8* %tmp.raw, i32 %size, i1 false) 1430 ret void 1431; CHECK: ret void 1432} 1433 1434define void @PR15805(i1 %a, i1 %b) { 1435; CHECK-LABEL: @PR15805( 1436; CHECK-NOT: alloca 1437; CHECK: ret void 1438 1439 %c = alloca i64, align 8 1440 %p.0.c = select i1 undef, i64* %c, i64* %c 1441 %cond.in = select i1 undef, i64* %p.0.c, i64* %c 1442 %cond = load i64, i64* %cond.in, align 8 1443 ret void 1444} 1445 1446define void @PR15805.1(i1 %a, i1 %b) { 1447; Same as the normal PR15805, but rigged to place the use before the def inside 1448; of looping unreachable code. This helps ensure that we aren't sensitive to the 1449; order in which the uses of the alloca are visited. 1450; 1451; CHECK-LABEL: @PR15805.1( 1452; CHECK-NOT: alloca 1453; CHECK: ret void 1454 1455 %c = alloca i64, align 8 1456 br label %exit 1457 1458loop: 1459 %cond.in = select i1 undef, i64* %c, i64* %p.0.c 1460 %p.0.c = select i1 undef, i64* %c, i64* %c 1461 %cond = load i64, i64* %cond.in, align 8 1462 br i1 undef, label %loop, label %exit 1463 1464exit: 1465 ret void 1466} 1467 1468define void @PR16651.1(i8* %a) { 1469; This test case caused a crash due to the volatile memcpy in combination with 1470; lowering to integer loads and stores of a width other than that of the original 1471; memcpy. 1472; 1473; CHECK-LABEL: @PR16651.1( 1474; CHECK: alloca i16 1475; CHECK: alloca i8 1476; CHECK: alloca i8 1477; CHECK: unreachable 1478 1479entry: 1480 %b = alloca i32, align 4 1481 %b.cast = bitcast i32* %b to i8* 1482 call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %b.cast, i8* align 4 %a, i32 4, i1 true) 1483 %b.gep = getelementptr inbounds i8, i8* %b.cast, i32 2 1484 load i8, i8* %b.gep, align 2 1485 unreachable 1486} 1487 1488define void @PR16651.2() { 1489; This test case caused a crash due to failing to promote given a select that 1490; can't be speculated. It shouldn't be promoted, but we missed that fact when 1491; analyzing whether we could form a vector promotion because that code didn't 1492; bail on select instructions. 1493; 1494; CHECK-LABEL: @PR16651.2( 1495; CHECK: alloca <2 x float> 1496; CHECK: ret void 1497 1498entry: 1499 %tv1 = alloca { <2 x float>, <2 x float> }, align 8 1500 %0 = getelementptr { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* %tv1, i64 0, i32 1 1501 store <2 x float> undef, <2 x float>* %0, align 8 1502 %1 = getelementptr inbounds { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* %tv1, i64 0, i32 1, i64 0 1503 %cond105.in.i.i = select i1 undef, float* null, float* %1 1504 %cond105.i.i = load float, float* %cond105.in.i.i, align 8 1505 ret void 1506} 1507 1508define void @test23(i32 %x) { 1509; CHECK-LABEL: @test23( 1510; CHECK-NOT: alloca 1511; CHECK: ret void 1512entry: 1513 %a = alloca i32, align 4 1514 store i32 %x, i32* %a, align 4 1515 %gep1 = getelementptr inbounds i32, i32* %a, i32 1 1516 %gep0 = getelementptr inbounds i32, i32* %a, i32 0 1517 %cast1 = bitcast i32* %gep1 to i8* 1518 %cast0 = bitcast i32* %gep0 to i8* 1519 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast1, i8* %cast0, i32 4, i1 false) 1520 ret void 1521} 1522 1523define void @PR18615() { 1524; CHECK-LABEL: @PR18615( 1525; CHECK-NOT: alloca 1526; CHECK: ret void 1527entry: 1528 %f = alloca i8 1529 %gep = getelementptr i8, i8* %f, i64 -1 1530 call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* %gep, i32 1, i1 false) 1531 ret void 1532} 1533 1534define void @test24(i8* %src, i8* %dst) { 1535; CHECK-LABEL: @test24( 1536; CHECK: alloca i64, align 16 1537; CHECK: load volatile i64, i64* %{{[^,]*}}, align 1, !tbaa [[TAG_0]] 1538; CHECK: store volatile i64 %{{[^,]*}}, i64* %{{[^,]*}}, align 16, !tbaa [[TAG_0]] 1539; CHECK: load volatile i64, i64* %{{[^,]*}}, align 16, !tbaa [[TAG_3]] 1540; CHECK: store volatile i64 %{{[^,]*}}, i64* %{{[^,]*}}, align 1, !tbaa [[TAG_3]] 1541 1542entry: 1543 %a = alloca i64, align 16 1544 %ptr = bitcast i64* %a to i8* 1545 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr, i8* %src, i32 8, i1 true), !tbaa !0 1546 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %ptr, i32 8, i1 true), !tbaa !3 1547 ret void 1548} 1549 1550define float @test25() { 1551; Check that we split up stores in order to promote the smaller SSA values.. These types 1552; of patterns can arise because LLVM maps small memcpy's to integer load and 1553; stores. If we get a memcpy of an aggregate (such as C and C++ frontends would 1554; produce, but so might any language frontend), this will in many cases turn into 1555; an integer load and store. SROA needs to be extremely powerful to correctly 1556; handle these cases and form splitable and promotable SSA values. 1557; 1558; CHECK-LABEL: @test25( 1559; CHECK-NOT: alloca 1560; CHECK: %[[F1:.*]] = bitcast i32 0 to float 1561; CHECK: %[[F2:.*]] = bitcast i32 1065353216 to float 1562; CHECK: %[[SUM:.*]] = fadd float %[[F1]], %[[F2]] 1563; CHECK: ret float %[[SUM]] 1564 1565entry: 1566 %a = alloca i64 1567 %b = alloca i64 1568 %a.cast = bitcast i64* %a to [2 x float]* 1569 %a.gep1 = getelementptr [2 x float], [2 x float]* %a.cast, i32 0, i32 0 1570 %a.gep2 = getelementptr [2 x float], [2 x float]* %a.cast, i32 0, i32 1 1571 %b.cast = bitcast i64* %b to [2 x float]* 1572 %b.gep1 = getelementptr [2 x float], [2 x float]* %b.cast, i32 0, i32 0 1573 %b.gep2 = getelementptr [2 x float], [2 x float]* %b.cast, i32 0, i32 1 1574 store float 0.0, float* %a.gep1 1575 store float 1.0, float* %a.gep2 1576 %v = load i64, i64* %a 1577 store i64 %v, i64* %b 1578 %f1 = load float, float* %b.gep1 1579 %f2 = load float, float* %b.gep2 1580 %ret = fadd float %f1, %f2 1581 ret float %ret 1582} 1583 1584@complex1 = external global [2 x float] 1585@complex2 = external global [2 x float] 1586 1587define void @test26() { 1588; Test a case of splitting up loads and stores against a globals. 1589; 1590; CHECK-LABEL: @test26( 1591; CHECK-NOT: alloca 1592; CHECK: %[[L1:.*]] = load i32, i32* bitcast 1593; CHECK: %[[L2:.*]] = load i32, i32* bitcast 1594; CHECK: %[[F1:.*]] = bitcast i32 %[[L1]] to float 1595; CHECK: %[[F2:.*]] = bitcast i32 %[[L2]] to float 1596; CHECK: %[[SUM:.*]] = fadd float %[[F1]], %[[F2]] 1597; CHECK: %[[C1:.*]] = bitcast float %[[SUM]] to i32 1598; CHECK: %[[C2:.*]] = bitcast float %[[SUM]] to i32 1599; CHECK: store i32 %[[C1]], i32* bitcast 1600; CHECK: store i32 %[[C2]], i32* bitcast 1601; CHECK: ret void 1602 1603entry: 1604 %a = alloca i64 1605 %a.cast = bitcast i64* %a to [2 x float]* 1606 %a.gep1 = getelementptr [2 x float], [2 x float]* %a.cast, i32 0, i32 0 1607 %a.gep2 = getelementptr [2 x float], [2 x float]* %a.cast, i32 0, i32 1 1608 %v1 = load i64, i64* bitcast ([2 x float]* @complex1 to i64*) 1609 store i64 %v1, i64* %a 1610 %f1 = load float, float* %a.gep1 1611 %f2 = load float, float* %a.gep2 1612 %sum = fadd float %f1, %f2 1613 store float %sum, float* %a.gep1 1614 store float %sum, float* %a.gep2 1615 %v2 = load i64, i64* %a 1616 store i64 %v2, i64* bitcast ([2 x float]* @complex2 to i64*) 1617 ret void 1618} 1619 1620define float @test27() { 1621; Another, more complex case of splittable i64 loads and stores. This example 1622; is a particularly challenging one because the load and store both point into 1623; the alloca SROA is processing, and they overlap but at an offset. 1624; 1625; CHECK-LABEL: @test27( 1626; CHECK-NOT: alloca 1627; CHECK: %[[F1:.*]] = bitcast i32 0 to float 1628; CHECK: %[[F2:.*]] = bitcast i32 1065353216 to float 1629; CHECK: %[[SUM:.*]] = fadd float %[[F1]], %[[F2]] 1630; CHECK: ret float %[[SUM]] 1631 1632entry: 1633 %a = alloca [12 x i8] 1634 %gep1 = getelementptr [12 x i8], [12 x i8]* %a, i32 0, i32 0 1635 %gep2 = getelementptr [12 x i8], [12 x i8]* %a, i32 0, i32 4 1636 %gep3 = getelementptr [12 x i8], [12 x i8]* %a, i32 0, i32 8 1637 %iptr1 = bitcast i8* %gep1 to i64* 1638 %iptr2 = bitcast i8* %gep2 to i64* 1639 %fptr1 = bitcast i8* %gep1 to float* 1640 %fptr2 = bitcast i8* %gep2 to float* 1641 %fptr3 = bitcast i8* %gep3 to float* 1642 store float 0.0, float* %fptr1 1643 store float 1.0, float* %fptr2 1644 %v = load i64, i64* %iptr1 1645 store i64 %v, i64* %iptr2 1646 %f1 = load float, float* %fptr2 1647 %f2 = load float, float* %fptr3 1648 %ret = fadd float %f1, %f2 1649 ret float %ret 1650} 1651 1652define i32 @PR22093() { 1653; Test that we don't try to pre-split a splittable store of a splittable but 1654; not pre-splittable load over the same alloca. We "handle" this case when the 1655; load is unsplittable but unrelated to this alloca by just generating extra 1656; loads without touching the original, but when the original load was out of 1657; this alloca we need to handle it specially to ensure the splits line up 1658; properly for rewriting. 1659; 1660; CHECK-LABEL: @PR22093( 1661; CHECK-NOT: alloca 1662; CHECK: alloca i16 1663; CHECK-NOT: alloca 1664; CHECK: store volatile i16 1665 1666entry: 1667 %a = alloca i32 1668 %a.cast = bitcast i32* %a to i16* 1669 store volatile i16 42, i16* %a.cast 1670 %load = load i32, i32* %a 1671 store i32 %load, i32* %a 1672 ret i32 %load 1673} 1674 1675define void @PR22093.2() { 1676; Another way that we end up being unable to split a particular set of loads 1677; and stores can even have ordering importance. Here we have a load which is 1678; pre-splittable by itself, and the first store is also compatible. But the 1679; second store of the load makes the load unsplittable because of a mismatch of 1680; splits. Because this makes the load unsplittable, we also have to go back and 1681; remove the first store from the presplit candidates as its load won't be 1682; presplit. 1683; 1684; CHECK-LABEL: @PR22093.2( 1685; CHECK-NOT: alloca 1686; CHECK: alloca i16 1687; CHECK-NEXT: alloca i8 1688; CHECK-NOT: alloca 1689; CHECK: store volatile i16 1690; CHECK: store volatile i8 1691 1692entry: 1693 %a = alloca i64 1694 %a.cast1 = bitcast i64* %a to i32* 1695 %a.cast2 = bitcast i64* %a to i16* 1696 store volatile i16 42, i16* %a.cast2 1697 %load = load i32, i32* %a.cast1 1698 store i32 %load, i32* %a.cast1 1699 %a.gep1 = getelementptr i32, i32* %a.cast1, i32 1 1700 %a.cast3 = bitcast i32* %a.gep1 to i8* 1701 store volatile i8 13, i8* %a.cast3 1702 store i32 %load, i32* %a.gep1 1703 ret void 1704} 1705 1706define void @PR23737() { 1707; CHECK-LABEL: @PR23737( 1708; CHECK: store atomic volatile {{.*}} seq_cst 1709; CHECK: load atomic volatile {{.*}} seq_cst 1710entry: 1711 %ptr = alloca i64, align 8 1712 store atomic volatile i64 0, i64* %ptr seq_cst, align 8 1713 %load = load atomic volatile i64, i64* %ptr seq_cst, align 8 1714 ret void 1715} 1716 1717define i16 @PR24463() { 1718; Ensure we can handle a very interesting case where there is an integer-based 1719; rewrite of the uses of the alloca, but where one of the integers in that is 1720; a sub-integer that requires extraction *and* extends past the end of the 1721; alloca. SROA can split the alloca to avoid shift or trunc. 1722; 1723; CHECK-LABEL: @PR24463( 1724; CHECK-NOT: alloca 1725; CHECK-NOT: trunc 1726; CHECK-NOT: lshr 1727; CHECK: %[[ZEXT:.*]] = zext i8 {{.*}} to i16 1728; CHECK: ret i16 %[[ZEXT]] 1729entry: 1730 %alloca = alloca [3 x i8] 1731 %gep1 = getelementptr inbounds [3 x i8], [3 x i8]* %alloca, i64 0, i64 1 1732 %bc1 = bitcast i8* %gep1 to i16* 1733 store i16 0, i16* %bc1 1734 %gep2 = getelementptr inbounds [3 x i8], [3 x i8]* %alloca, i64 0, i64 2 1735 %bc2 = bitcast i8* %gep2 to i16* 1736 %load = load i16, i16* %bc2 1737 ret i16 %load 1738} 1739 1740%struct.STest = type { %struct.SPos, %struct.SPos } 1741%struct.SPos = type { float, float } 1742 1743define void @PR25873(%struct.STest* %outData) { 1744; CHECK-LABEL: @PR25873( 1745; CHECK: store i32 1123418112 1746; CHECK: store i32 1139015680 1747; CHECK: %[[HIZEXT:.*]] = zext i32 1139015680 to i64 1748; CHECK: %[[HISHL:.*]] = shl i64 %[[HIZEXT]], 32 1749; CHECK: %[[HIMASK:.*]] = and i64 undef, 4294967295 1750; CHECK: %[[HIINSERT:.*]] = or i64 %[[HIMASK]], %[[HISHL]] 1751; CHECK: %[[LOZEXT:.*]] = zext i32 1123418112 to i64 1752; CHECK: %[[LOMASK:.*]] = and i64 %[[HIINSERT]], -4294967296 1753; CHECK: %[[LOINSERT:.*]] = or i64 %[[LOMASK]], %[[LOZEXT]] 1754; CHECK: store i64 %[[LOINSERT]] 1755entry: 1756 %tmpData = alloca %struct.STest, align 8 1757 %0 = bitcast %struct.STest* %tmpData to i8* 1758 call void @llvm.lifetime.start.p0i8(i64 16, i8* %0) 1759 %x = getelementptr inbounds %struct.STest, %struct.STest* %tmpData, i64 0, i32 0, i32 0 1760 store float 1.230000e+02, float* %x, align 8 1761 %y = getelementptr inbounds %struct.STest, %struct.STest* %tmpData, i64 0, i32 0, i32 1 1762 store float 4.560000e+02, float* %y, align 4 1763 %m_posB = getelementptr inbounds %struct.STest, %struct.STest* %tmpData, i64 0, i32 1 1764 %1 = bitcast %struct.STest* %tmpData to i64* 1765 %2 = bitcast %struct.SPos* %m_posB to i64* 1766 %3 = load i64, i64* %1, align 8 1767 store i64 %3, i64* %2, align 8 1768 %4 = bitcast %struct.STest* %outData to i8* 1769 call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %4, i8* align 4 %0, i64 16, i1 false) 1770 call void @llvm.lifetime.end.p0i8(i64 16, i8* %0) 1771 ret void 1772} 1773 1774declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind 1775 1776define void @PR27999() unnamed_addr { 1777; CHECK-LABEL: @PR27999( 1778; CHECK: entry-block: 1779; CHECK-NEXT: ret void 1780entry-block: 1781 %0 = alloca [2 x i64], align 8 1782 %1 = bitcast [2 x i64]* %0 to i8* 1783 call void @llvm.lifetime.start.p0i8(i64 16, i8* %1) 1784 %2 = getelementptr inbounds [2 x i64], [2 x i64]* %0, i32 0, i32 1 1785 %3 = bitcast i64* %2 to i8* 1786 call void @llvm.lifetime.end.p0i8(i64 8, i8* %3) 1787 ret void 1788} 1789 1790define void @PR29139() { 1791; CHECK-LABEL: @PR29139( 1792; CHECK: bb1: 1793; CHECK-NEXT: ret void 1794bb1: 1795 %e.7.sroa.6.i = alloca i32, align 1 1796 %e.7.sroa.6.0.load81.i = load i32, i32* %e.7.sroa.6.i, align 1 1797 %0 = bitcast i32* %e.7.sroa.6.i to i8* 1798 call void @llvm.lifetime.end.p0i8(i64 2, i8* %0) 1799 ret void 1800} 1801 1802; PR35657 reports assertion failure with this code 1803define void @PR35657(i64 %v) { 1804; CHECK-LABEL: @PR35657 1805; CHECK: call void @callee16(i16 %{{.*}}) 1806; CHECK: call void @callee48(i48 %{{.*}}) 1807; CHECK: ret void 1808entry: 1809 %a48 = alloca i48 1810 %a48.cast64 = bitcast i48* %a48 to i64* 1811 store i64 %v, i64* %a48.cast64 1812 %a48.cast16 = bitcast i48* %a48 to i16* 1813 %b0_15 = load i16, i16* %a48.cast16 1814 %a48.cast8 = bitcast i48* %a48 to i8* 1815 %a48_offset2 = getelementptr inbounds i8, i8* %a48.cast8, i64 2 1816 %a48_offset2.cast48 = bitcast i8* %a48_offset2 to i48* 1817 %b16_63 = load i48, i48* %a48_offset2.cast48, align 2 1818 call void @callee16(i16 %b0_15) 1819 call void @callee48(i48 %b16_63) 1820 ret void 1821} 1822 1823declare void @callee16(i16 %a) 1824declare void @callee48(i48 %a) 1825 1826define void @test28(i64 %v) #0 { 1827; SROA should split the first i64 store to avoid additional and/or instructions 1828; when storing into i32 fields 1829 1830; CHECK-LABEL: @test28( 1831; CHECK-NOT: alloca 1832; CHECK-NOT: and 1833; CHECK-NOT: or 1834; CHECK: %[[shift:.*]] = lshr i64 %v, 32 1835; CHECK-NEXT: %{{.*}} = trunc i64 %[[shift]] to i32 1836; CHECK-NEXT: ret void 1837 1838entry: 1839 %t = alloca { i64, i32, i32 } 1840 1841 %b = getelementptr { i64, i32, i32 }, { i64, i32, i32 }* %t, i32 0, i32 1 1842 %0 = bitcast i32* %b to i64* 1843 store i64 %v, i64* %0 1844 1845 %1 = load i32, i32* %b 1846 %c = getelementptr { i64, i32, i32 }, { i64, i32, i32 }* %t, i32 0, i32 2 1847 store i32 %1, i32* %c 1848 ret void 1849} 1850 1851declare void @llvm.lifetime.start.isVoid.i64.p0i8(i64, [10 x float]* nocapture) 1852declare void @llvm.lifetime.end.isVoid.i64.p0i8(i64, [10 x float]* nocapture) 1853@array = dso_local global [10 x float] undef, align 4 1854 1855define void @test29(i32 %num, i32 %tid) { 1856; CHECK-LABEL: @test29( 1857; CHECK-NOT: alloca [10 x float] 1858; CHECK: ret void 1859 1860entry: 1861 %ra = alloca [10 x float], align 4 1862 call void @llvm.lifetime.start.isVoid.i64.p0i8(i64 40, [10 x float]* nonnull %ra) 1863 1864 %cmp1 = icmp sgt i32 %num, 0 1865 br i1 %cmp1, label %bb1, label %bb7 1866 1867bb1: 1868 %tobool = icmp eq i32 %tid, 0 1869 %conv.i = zext i32 %tid to i64 1870 %0 = bitcast [10 x float]* %ra to i32* 1871 %1 = load i32, i32* %0, align 4 1872 %arrayidx5 = getelementptr inbounds [10 x float], [10 x float]* @array, i64 0, i64 %conv.i 1873 %2 = bitcast float* %arrayidx5 to i32* 1874 br label %bb2 1875 1876bb2: 1877 %i.02 = phi i32 [ %num, %bb1 ], [ %sub, %bb5 ] 1878 br i1 %tobool, label %bb3, label %bb4 1879 1880bb3: 1881 br label %bb5 1882 1883bb4: 1884 store i32 %1, i32* %2, align 4 1885 br label %bb5 1886 1887bb5: 1888 %sub = add i32 %i.02, -1 1889 %cmp = icmp sgt i32 %sub, 0 1890 br i1 %cmp, label %bb2, label %bb6 1891 1892bb6: 1893 br label %bb7 1894 1895bb7: 1896 call void @llvm.lifetime.end.isVoid.i64.p0i8(i64 40, [10 x float]* nonnull %ra) 1897 ret void 1898} 1899 1900!0 = !{!1, !1, i64 0, i64 200} 1901!1 = !{!2, i64 1, !"type_0"} 1902!2 = !{!"root"} 1903!3 = !{!4, !4, i64 0, i64 1} 1904!4 = !{!2, i64 1, !"type_3"} 1905!5 = !{!6, !6, i64 0, i64 1} 1906!6 = !{!2, i64 1, !"type_5"} 1907!7 = !{!8, !8, i64 0, i64 1} 1908!8 = !{!2, i64 1, !"type_7"} 1909!9 = !{!10, !10, i64 0, i64 1} 1910!10 = !{!2, i64 1, !"type_9"} 1911!11 = !{!12, !12, i64 0, i64 1} 1912!12 = !{!2, i64 1, !"type_11"} 1913!13 = !{!14, !14, i64 0, i64 1} 1914!14 = !{!2, i64 1, !"type_13"} 1915!15 = !{!16, !16, i64 0, i64 1} 1916!16 = !{!2, i64 1, !"type_15"} 1917!17 = !{!18, !18, i64 0, i64 1} 1918!18 = !{!2, i64 1, !"type_17"} 1919!19 = !{!20, !20, i64 0, i64 1} 1920!20 = !{!2, i64 1, !"type_19"} 1921!21 = !{!22, !22, i64 0, i64 1} 1922!22 = !{!2, i64 1, !"type_21"} 1923!23 = !{!24, !24, i64 0, i64 1} 1924!24 = !{!2, i64 1, !"type_23"} 1925!25 = !{!26, !26, i64 0, i64 1} 1926!26 = !{!2, i64 1, !"type_25"} 1927!27 = !{!28, !28, i64 0, i64 1} 1928!28 = !{!2, i64 1, !"type_27"} 1929!29 = !{!30, !30, i64 0, i64 1} 1930!30 = !{!2, i64 1, !"type_29"} 1931!31 = !{!32, !32, i64 0, i64 1} 1932!32 = !{!2, i64 1, !"type_31"} 1933!33 = !{!34, !34, i64 0, i64 1} 1934!34 = !{!2, i64 1, !"type_33"} 1935!35 = !{!36, !36, i64 0, i64 1} 1936!36 = !{!2, i64 1, !"type_35"} 1937!37 = !{!38, !38, i64 0, i64 1} 1938!38 = !{!2, i64 1, !"type_37"} 1939!39 = !{!40, !40, i64 0, i64 1} 1940!40 = !{!2, i64 1, !"type_39"} 1941!41 = !{!42, !42, i64 0, i64 1} 1942!42 = !{!2, i64 1, !"type_41"} 1943!43 = !{!44, !44, i64 0, i64 1} 1944!44 = !{!2, i64 1, !"type_43"} 1945!45 = !{!46, !46, i64 0, i64 1} 1946!46 = !{!2, i64 1, !"type_45"} 1947!47 = !{!48, !48, i64 0, i64 1} 1948!48 = !{!2, i64 1, !"type_47"} 1949!49 = !{!50, !50, i64 0, i64 1} 1950!50 = !{!2, i64 1, !"type_49"} 1951!51 = !{!52, !52, i64 0, i64 1} 1952!52 = !{!2, i64 1, !"type_51"} 1953!53 = !{!54, !54, i64 0, i64 1} 1954!54 = !{!2, i64 1, !"type_53"} 1955!55 = !{!56, !56, i64 0, i64 1} 1956!56 = !{!2, i64 1, !"type_55"} 1957!57 = !{!58, !58, i64 0, i64 1} 1958!58 = !{!2, i64 1, !"type_57"} 1959!59 = !{!60, !60, i64 0, i64 1} 1960!60 = !{!2, i64 1, !"type_59"} 1961 1962; CHECK-DAG: [[TAG_0]] = !{[[TYPE_0:!.*]], [[TYPE_0]], i64 0, i64 200} 1963; CHECK-DAG: [[TYPE_0]] = !{{{.*}}, !"type_0"} 1964 1965; CHECK-DAG: [[TAG_0_M42]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 158} 1966; CHECK-DAG: [[TAG_0_M43]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 157} 1967; CHECK-DAG: [[TAG_0_M142]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 58} 1968; CHECK-DAG: [[TAG_0_M158]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 42} 1969 1970; CHECK-DAG: [[TAG_59]] = !{[[TYPE_59:!.*]], [[TYPE_59]], i64 0, i64 1} 1971; CHECK-DAG: [[TYPE_59]] = !{{{.*}}, !"type_59"} 1972 1973; CHECK-DAG: [[TAG_0_M20]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 180} 1974; CHECK-DAG: [[TAG_0_M22]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 178} 1975; CHECK-DAG: [[TAG_0_M23]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 177} 1976; CHECK-DAG: [[TAG_0_M30]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 170} 1977; CHECK-DAG: [[TAG_0_M40]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 160} 1978; CHECK-DAG: [[TAG_0_M50]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 150} 1979; CHECK-DAG: [[TAG_0_M52]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 148} 1980; CHECK-DAG: [[TAG_0_M53]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 147} 1981; CHECK-DAG: [[TAG_0_M60]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 140} 1982 1983; CHECK-DAG: [[TYPE_7:!.*]] = !{{{.*}}, !"type_7"} 1984; CHECK-DAG: [[TAG_7]] = !{[[TYPE_7]], [[TYPE_7]], i64 0, i64 1} 1985 1986; CHECK-DAG: [[TYPE_3:!.*]] = !{{{.*}}, !"type_3"} 1987; CHECK-DAG: [[TAG_3]] = !{[[TYPE_3]], [[TYPE_3]], i64 0, i64 1} 1988 1989; CHECK-DAG: [[TYPE_5:!.*]] = !{{{.*}}, !"type_5"} 1990; CHECK-DAG: [[TAG_5]] = !{[[TYPE_5]], [[TYPE_5]], i64 0, i64 1} 1991 1992; CHECK-DAG: [[TAG_0_M4]] = !{[[TYPE_0]], [[TYPE_0]], i64 0, i64 196} 1993 1994 1995; CHECK-DAG: [[TYPE_9:!.*]] = !{{{.*}}, !"type_9"} 1996; CHECK-DAG: [[TAG_9]] = !{[[TYPE_9]], [[TYPE_9]], i64 0, i64 1} 1997; CHECK-DAG: [[TYPE_11:!.*]] = !{{{.*}}, !"type_11"} 1998; CHECK-DAG: [[TAG_11]] = !{[[TYPE_11]], [[TYPE_11]], i64 0, i64 1} 1999; CHECK-DAG: [[TYPE_13:!.*]] = !{{{.*}}, !"type_13"} 2000; CHECK-DAG: [[TAG_13]] = !{[[TYPE_13]], [[TYPE_13]], i64 0, i64 1} 2001; CHECK-DAG: [[TYPE_15:!.*]] = !{{{.*}}, !"type_15"} 2002; CHECK-DAG: [[TAG_15]] = !{[[TYPE_15]], [[TYPE_15]], i64 0, i64 1} 2003; CHECK-DAG: [[TYPE_17:!.*]] = !{{{.*}}, !"type_17"} 2004; CHECK-DAG: [[TAG_17]] = !{[[TYPE_17]], [[TYPE_17]], i64 0, i64 1} 2005; CHECK-DAG: [[TYPE_19:!.*]] = !{{{.*}}, !"type_19"} 2006; CHECK-DAG: [[TAG_19]] = !{[[TYPE_19]], [[TYPE_19]], i64 0, i64 1} 2007; CHECK-DAG: [[TYPE_21:!.*]] = !{{{.*}}, !"type_21"} 2008; CHECK-DAG: [[TAG_21]] = !{[[TYPE_21]], [[TYPE_21]], i64 0, i64 1} 2009; CHECK-DAG: [[TYPE_23:!.*]] = !{{{.*}}, !"type_23"} 2010; CHECK-DAG: [[TAG_23]] = !{[[TYPE_23]], [[TYPE_23]], i64 0, i64 1} 2011; CHECK-DAG: [[TYPE_25:!.*]] = !{{{.*}}, !"type_25"} 2012; CHECK-DAG: [[TAG_25]] = !{[[TYPE_25]], [[TYPE_25]], i64 0, i64 1} 2013; CHECK-DAG: [[TYPE_27:!.*]] = !{{{.*}}, !"type_27"} 2014; CHECK-DAG: [[TAG_27]] = !{[[TYPE_27]], [[TYPE_27]], i64 0, i64 1} 2015; CHECK-DAG: [[TYPE_29:!.*]] = !{{{.*}}, !"type_29"} 2016; CHECK-DAG: [[TAG_29]] = !{[[TYPE_29]], [[TYPE_29]], i64 0, i64 1} 2017; CHECK-DAG: [[TYPE_31:!.*]] = !{{{.*}}, !"type_31"} 2018; CHECK-DAG: [[TAG_31]] = !{[[TYPE_31]], [[TYPE_31]], i64 0, i64 1} 2019; CHECK-DAG: [[TYPE_33:!.*]] = !{{{.*}}, !"type_33"} 2020; CHECK-DAG: [[TAG_33]] = !{[[TYPE_33]], [[TYPE_33]], i64 0, i64 1} 2021; CHECK-DAG: [[TYPE_35:!.*]] = !{{{.*}}, !"type_35"} 2022; CHECK-DAG: [[TAG_35]] = !{[[TYPE_35]], [[TYPE_35]], i64 0, i64 1} 2023; CHECK-DAG: [[TYPE_37:!.*]] = !{{{.*}}, !"type_37"} 2024; CHECK-DAG: [[TAG_37]] = !{[[TYPE_37]], [[TYPE_37]], i64 0, i64 1} 2025; CHECK-DAG: [[TYPE_39:!.*]] = !{{{.*}}, !"type_39"} 2026; CHECK-DAG: [[TAG_39]] = !{[[TYPE_39]], [[TYPE_39]], i64 0, i64 1} 2027; CHECK-DAG: [[TYPE_41:!.*]] = !{{{.*}}, !"type_41"} 2028; CHECK-DAG: [[TAG_41]] = !{[[TYPE_41]], [[TYPE_41]], i64 0, i64 1} 2029; CHECK-DAG: [[TYPE_43:!.*]] = !{{{.*}}, !"type_43"} 2030; CHECK-DAG: [[TAG_43]] = !{[[TYPE_43]], [[TYPE_43]], i64 0, i64 1} 2031; CHECK-DAG: [[TYPE_45:!.*]] = !{{{.*}}, !"type_45"} 2032; CHECK-DAG: [[TAG_45]] = !{[[TYPE_45]], [[TYPE_45]], i64 0, i64 1} 2033; CHECK-DAG: [[TYPE_47:!.*]] = !{{{.*}}, !"type_47"} 2034; CHECK-DAG: [[TAG_47]] = !{[[TYPE_47]], [[TYPE_47]], i64 0, i64 1} 2035; CHECK-DAG: [[TYPE_49:!.*]] = !{{{.*}}, !"type_49"} 2036; CHECK-DAG: [[TAG_49]] = !{[[TYPE_49]], [[TYPE_49]], i64 0, i64 1} 2037; CHECK-DAG: [[TYPE_51:!.*]] = !{{{.*}}, !"type_51"} 2038; CHECK-DAG: [[TAG_51]] = !{[[TYPE_51]], [[TYPE_51]], i64 0, i64 1} 2039; CHECK-DAG: [[TYPE_53:!.*]] = !{{{.*}}, !"type_53"} 2040; CHECK-DAG: [[TAG_53]] = !{[[TYPE_53]], [[TYPE_53]], i64 0, i64 1} 2041; CHECK-DAG: [[TYPE_55:!.*]] = !{{{.*}}, !"type_55"} 2042; CHECK-DAG: [[TAG_55]] = !{[[TYPE_55]], [[TYPE_55]], i64 0, i64 1} 2043; CHECK-DAG: [[TYPE_57:!.*]] = !{{{.*}}, !"type_57"} 2044; CHECK-DAG: [[TAG_57]] = !{[[TYPE_57]], [[TYPE_57]], i64 0, i64 1} 2045