1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK4
8
9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15
16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10
19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK12
22
23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
29 // expected-no-diagnostics
30 #ifndef HEADER
31 #define HEADER
32
33 template <class T>
34 struct S {
35 T f;
SS36 S(T a) : f(a) {}
SS37 S() : f() {}
operator TS38 operator T() { return T(); }
~SS39 ~S() {}
40 };
41
42 template <typename T>
tmain()43 T tmain() {
44 S<T> test;
45 T t_var = T();
46 T vec[] = {1, 2};
47 S<T> s_arr[] = {1, 2};
48 S<T> &var = test;
49 #pragma omp target
50 #pragma omp teams
51 #pragma omp distribute lastprivate(t_var, vec, s_arr, s_arr, var, var)
52 for (int i = 0; i < 2; ++i) {
53 vec[i] = t_var;
54 s_arr[i] = var;
55 }
56 return T();
57 }
58
main()59 int main() {
60 static int svar;
61 volatile double g;
62 volatile double &g1 = g;
63
64 #ifdef LAMBDA
65 [&]() {
66 static float sfvar;
67
68 #pragma omp target
69 #pragma omp teams
70 #pragma omp distribute lastprivate(g, g1, svar, sfvar)
71 for (int i = 0; i < 2; ++i) {
72 // loop variables
73
74 // init private variables
75 g = 1;
76 g1 = 1;
77 svar = 3;
78 sfvar = 4.0;
79
80
81 [&]() {
82 g = 2;
83 g1 = 2;
84 svar = 4;
85 sfvar = 8.0;
86
87 }();
88 }
89 }();
90 return 0;
91 #else
92 S<float> test;
93 int t_var = 0;
94 int vec[] = {1, 2};
95 S<float> s_arr[] = {1, 2};
96 S<float> &var = test;
97
98 #pragma omp target
99 #pragma omp teams
100 #pragma omp distribute lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)
101 for (int i = 0; i < 2; ++i) {
102 vec[i] = t_var;
103 s_arr[i] = var;
104 }
105 int i;
106
107 return tmain<int>();
108 #endif
109 }
110
111
112 // skip loop variables
113
114 // copy from parameters to local address variables
115
116 // load content of local address variables
117 // the distribute loop
118 // assignment: vec[i] = t_var;
119
120 // assignment: s_arr[i] = var;
121
122 // lastprivates
123
124
125 // template tmain
126
127
128
129 // skip alloca of global_tid and bound_tid
130 // skip loop variables
131
132 // skip init of bound and global tid
133 // copy from parameters to local address variables
134
135 // load content of local address variables
136 // assignment: vec[i] = t_var;
137
138 // assignment: s_arr[i] = var;
139
140 // lastprivates
141
142 #endif
143 // CHECK1-LABEL: define {{[^@]+}}@main
144 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
145 // CHECK1-NEXT: entry:
146 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
147 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8
148 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8
149 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
150 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
151 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8
152 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
153 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8
154 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
155 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8
156 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8
157 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]])
158 // CHECK1-NEXT: ret i32 0
159 //
160 //
161 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
162 // CHECK1-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
163 // CHECK1-NEXT: entry:
164 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
165 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
166 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
167 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
168 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
169 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
170 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
171 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
172 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
173 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
174 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
175 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
176 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
177 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8
178 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
179 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
180 // CHECK1-NEXT: ret void
181 //
182 //
183 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
184 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
185 // CHECK1-NEXT: entry:
186 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
187 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
188 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8
189 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8
190 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
191 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8
192 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
193 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
194 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
195 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
196 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
197 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
198 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
199 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
200 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8
201 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8
202 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca double*, align 8
203 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
204 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
205 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
206 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
207 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
208 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
209 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8
210 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8
211 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
212 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
213 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
214 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
215 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
216 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
217 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8
218 // CHECK1-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
219 // CHECK1-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8
220 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
221 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
222 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
223 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
224 // CHECK1-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP1]], align 8
225 // CHECK1-NEXT: store double* [[G14]], double** [[_TMP5]], align 8
226 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
227 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
228 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
229 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
230 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
231 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
232 // CHECK1: cond.true:
233 // CHECK1-NEXT: br label [[COND_END:%.*]]
234 // CHECK1: cond.false:
235 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
236 // CHECK1-NEXT: br label [[COND_END]]
237 // CHECK1: cond.end:
238 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
239 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
240 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
241 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
242 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
243 // CHECK1: omp.inner.for.cond:
244 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
245 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
246 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
247 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
248 // CHECK1: omp.inner.for.body:
249 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
250 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
251 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
252 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
253 // CHECK1-NEXT: store double 1.000000e+00, double* [[G3]], align 8
254 // CHECK1-NEXT: [[TMP14:%.*]] = load double*, double** [[_TMP5]], align 8
255 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP14]], align 8
256 // CHECK1-NEXT: store i32 3, i32* [[SVAR6]], align 4
257 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR7]], align 4
258 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
259 // CHECK1-NEXT: store double* [[G3]], double** [[TMP15]], align 8
260 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
261 // CHECK1-NEXT: [[TMP17:%.*]] = load double*, double** [[_TMP5]], align 8
262 // CHECK1-NEXT: store double* [[TMP17]], double** [[TMP16]], align 8
263 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
264 // CHECK1-NEXT: store i32* [[SVAR6]], i32** [[TMP18]], align 8
265 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
266 // CHECK1-NEXT: store float* [[SFVAR7]], float** [[TMP19]], align 8
267 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]])
268 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
269 // CHECK1: omp.body.continue:
270 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
271 // CHECK1: omp.inner.for.inc:
272 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
273 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
274 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
275 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
276 // CHECK1: omp.inner.for.end:
277 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
278 // CHECK1: omp.loop.exit:
279 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]])
280 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
281 // CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
282 // CHECK1-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
283 // CHECK1: .omp.lastprivate.then:
284 // CHECK1-NEXT: [[TMP23:%.*]] = load double, double* [[G3]], align 8
285 // CHECK1-NEXT: store volatile double [[TMP23]], double* [[TMP0]], align 8
286 // CHECK1-NEXT: [[TMP24:%.*]] = load double*, double** [[_TMP5]], align 8
287 // CHECK1-NEXT: [[TMP25:%.*]] = load double, double* [[TMP24]], align 8
288 // CHECK1-NEXT: store volatile double [[TMP25]], double* [[TMP5]], align 8
289 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR6]], align 4
290 // CHECK1-NEXT: store i32 [[TMP26]], i32* [[TMP2]], align 4
291 // CHECK1-NEXT: [[TMP27:%.*]] = load float, float* [[SFVAR7]], align 4
292 // CHECK1-NEXT: store float [[TMP27]], float* [[TMP3]], align 4
293 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
294 // CHECK1: .omp.lastprivate.done:
295 // CHECK1-NEXT: ret void
296 //
297 //
298 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
299 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
300 // CHECK1-NEXT: entry:
301 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
302 // CHECK1-NEXT: ret void
303 //
304 //
305 // CHECK2-LABEL: define {{[^@]+}}@main
306 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
307 // CHECK2-NEXT: entry:
308 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
309 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8
310 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8
311 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
312 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4
313 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8
314 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
315 // CHECK2-NEXT: store double* [[G]], double** [[TMP0]], align 8
316 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
317 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8
318 // CHECK2-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8
319 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]])
320 // CHECK2-NEXT: ret i32 0
321 //
322 //
323 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
324 // CHECK2-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
325 // CHECK2-NEXT: entry:
326 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
327 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
328 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
329 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
330 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8
331 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
332 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
333 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
334 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
335 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
336 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
337 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
338 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
339 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8
340 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
341 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
342 // CHECK2-NEXT: ret void
343 //
344 //
345 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
346 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
347 // CHECK2-NEXT: entry:
348 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
349 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
350 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8
351 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8
352 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
353 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8
354 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8
355 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
356 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
357 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
358 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
359 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
360 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
361 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
362 // CHECK2-NEXT: [[G3:%.*]] = alloca double, align 8
363 // CHECK2-NEXT: [[G14:%.*]] = alloca double, align 8
364 // CHECK2-NEXT: [[_TMP5:%.*]] = alloca double*, align 8
365 // CHECK2-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
366 // CHECK2-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
367 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
368 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
369 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
370 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
371 // CHECK2-NEXT: store double* [[G]], double** [[G_ADDR]], align 8
372 // CHECK2-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8
373 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
374 // CHECK2-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
375 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
376 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
377 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
378 // CHECK2-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
379 // CHECK2-NEXT: store double* [[TMP1]], double** [[TMP]], align 8
380 // CHECK2-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
381 // CHECK2-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8
382 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
383 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
384 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
385 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
386 // CHECK2-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP1]], align 8
387 // CHECK2-NEXT: store double* [[G14]], double** [[_TMP5]], align 8
388 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
389 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
390 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
391 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
392 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
393 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
394 // CHECK2: cond.true:
395 // CHECK2-NEXT: br label [[COND_END:%.*]]
396 // CHECK2: cond.false:
397 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
398 // CHECK2-NEXT: br label [[COND_END]]
399 // CHECK2: cond.end:
400 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
401 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
402 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
403 // CHECK2-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
404 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
405 // CHECK2: omp.inner.for.cond:
406 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
407 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
408 // CHECK2-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
409 // CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
410 // CHECK2: omp.inner.for.body:
411 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
412 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
413 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
414 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
415 // CHECK2-NEXT: store double 1.000000e+00, double* [[G3]], align 8
416 // CHECK2-NEXT: [[TMP14:%.*]] = load double*, double** [[_TMP5]], align 8
417 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP14]], align 8
418 // CHECK2-NEXT: store i32 3, i32* [[SVAR6]], align 4
419 // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR7]], align 4
420 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
421 // CHECK2-NEXT: store double* [[G3]], double** [[TMP15]], align 8
422 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
423 // CHECK2-NEXT: [[TMP17:%.*]] = load double*, double** [[_TMP5]], align 8
424 // CHECK2-NEXT: store double* [[TMP17]], double** [[TMP16]], align 8
425 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
426 // CHECK2-NEXT: store i32* [[SVAR6]], i32** [[TMP18]], align 8
427 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
428 // CHECK2-NEXT: store float* [[SFVAR7]], float** [[TMP19]], align 8
429 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]])
430 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
431 // CHECK2: omp.body.continue:
432 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
433 // CHECK2: omp.inner.for.inc:
434 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
435 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
436 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
437 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
438 // CHECK2: omp.inner.for.end:
439 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
440 // CHECK2: omp.loop.exit:
441 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]])
442 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
443 // CHECK2-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
444 // CHECK2-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
445 // CHECK2: .omp.lastprivate.then:
446 // CHECK2-NEXT: [[TMP23:%.*]] = load double, double* [[G3]], align 8
447 // CHECK2-NEXT: store volatile double [[TMP23]], double* [[TMP0]], align 8
448 // CHECK2-NEXT: [[TMP24:%.*]] = load double*, double** [[_TMP5]], align 8
449 // CHECK2-NEXT: [[TMP25:%.*]] = load double, double* [[TMP24]], align 8
450 // CHECK2-NEXT: store volatile double [[TMP25]], double* [[TMP5]], align 8
451 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR6]], align 4
452 // CHECK2-NEXT: store i32 [[TMP26]], i32* [[TMP2]], align 4
453 // CHECK2-NEXT: [[TMP27:%.*]] = load float, float* [[SFVAR7]], align 4
454 // CHECK2-NEXT: store float [[TMP27]], float* [[TMP3]], align 4
455 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
456 // CHECK2: .omp.lastprivate.done:
457 // CHECK2-NEXT: ret void
458 //
459 //
460 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
461 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] {
462 // CHECK2-NEXT: entry:
463 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
464 // CHECK2-NEXT: ret void
465 //
466 //
467 // CHECK3-LABEL: define {{[^@]+}}@main
468 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
469 // CHECK3-NEXT: entry:
470 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
471 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8
472 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4
473 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
474 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
475 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4
476 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
477 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4
478 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
479 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4
480 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4
481 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]])
482 // CHECK3-NEXT: ret i32 0
483 //
484 //
485 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
486 // CHECK3-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
487 // CHECK3-NEXT: entry:
488 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
489 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
490 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
491 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
492 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
493 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8
494 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8
495 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
496 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
497 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
498 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
499 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
500 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
501 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
502 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
503 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
504 // CHECK3-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
505 // CHECK3-NEXT: store double [[TMP2]], double* [[G2]], align 8
506 // CHECK3-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
507 // CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4
508 // CHECK3-NEXT: store double [[TMP4]], double* [[G13]], align 8
509 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
510 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
511 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
512 // CHECK3-NEXT: ret void
513 //
514 //
515 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
516 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
517 // CHECK3-NEXT: entry:
518 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
519 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
520 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
521 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
522 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
523 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4
524 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
525 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
526 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
527 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
528 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
529 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
530 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
531 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
532 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8
533 // CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8
534 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca double*, align 4
535 // CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
536 // CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
537 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
538 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
539 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
540 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
541 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
542 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
543 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
544 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
545 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
546 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
547 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
548 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
549 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
550 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
551 // CHECK3-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4
552 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
553 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
554 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
555 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
556 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP1]], align 4
557 // CHECK3-NEXT: store double* [[G14]], double** [[_TMP5]], align 4
558 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
559 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
560 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
561 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
562 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
563 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
564 // CHECK3: cond.true:
565 // CHECK3-NEXT: br label [[COND_END:%.*]]
566 // CHECK3: cond.false:
567 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
568 // CHECK3-NEXT: br label [[COND_END]]
569 // CHECK3: cond.end:
570 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
571 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
572 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
573 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
574 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
575 // CHECK3: omp.inner.for.cond:
576 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
577 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
578 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
579 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
580 // CHECK3: omp.inner.for.body:
581 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
582 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
583 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
584 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
585 // CHECK3-NEXT: store double 1.000000e+00, double* [[G3]], align 8
586 // CHECK3-NEXT: [[TMP14:%.*]] = load double*, double** [[_TMP5]], align 4
587 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP14]], align 4
588 // CHECK3-NEXT: store i32 3, i32* [[SVAR6]], align 4
589 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR7]], align 4
590 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
591 // CHECK3-NEXT: store double* [[G3]], double** [[TMP15]], align 4
592 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
593 // CHECK3-NEXT: [[TMP17:%.*]] = load double*, double** [[_TMP5]], align 4
594 // CHECK3-NEXT: store double* [[TMP17]], double** [[TMP16]], align 4
595 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
596 // CHECK3-NEXT: store i32* [[SVAR6]], i32** [[TMP18]], align 4
597 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
598 // CHECK3-NEXT: store float* [[SFVAR7]], float** [[TMP19]], align 4
599 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]])
600 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
601 // CHECK3: omp.body.continue:
602 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
603 // CHECK3: omp.inner.for.inc:
604 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
605 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
606 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
607 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
608 // CHECK3: omp.inner.for.end:
609 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
610 // CHECK3: omp.loop.exit:
611 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]])
612 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
613 // CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
614 // CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
615 // CHECK3: .omp.lastprivate.then:
616 // CHECK3-NEXT: [[TMP23:%.*]] = load double, double* [[G3]], align 8
617 // CHECK3-NEXT: store volatile double [[TMP23]], double* [[TMP0]], align 8
618 // CHECK3-NEXT: [[TMP24:%.*]] = load double*, double** [[_TMP5]], align 4
619 // CHECK3-NEXT: [[TMP25:%.*]] = load double, double* [[TMP24]], align 4
620 // CHECK3-NEXT: store volatile double [[TMP25]], double* [[TMP5]], align 4
621 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR6]], align 4
622 // CHECK3-NEXT: store i32 [[TMP26]], i32* [[TMP2]], align 4
623 // CHECK3-NEXT: [[TMP27:%.*]] = load float, float* [[SFVAR7]], align 4
624 // CHECK3-NEXT: store float [[TMP27]], float* [[TMP3]], align 4
625 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
626 // CHECK3: .omp.lastprivate.done:
627 // CHECK3-NEXT: ret void
628 //
629 //
630 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
631 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
632 // CHECK3-NEXT: entry:
633 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
634 // CHECK3-NEXT: ret void
635 //
636 //
637 // CHECK4-LABEL: define {{[^@]+}}@main
638 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
639 // CHECK4-NEXT: entry:
640 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
641 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8
642 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4
643 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
644 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4
645 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4
646 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
647 // CHECK4-NEXT: store double* [[G]], double** [[TMP0]], align 4
648 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
649 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4
650 // CHECK4-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4
651 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]])
652 // CHECK4-NEXT: ret i32 0
653 //
654 //
655 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
656 // CHECK4-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
657 // CHECK4-NEXT: entry:
658 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
659 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
660 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
661 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
662 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4
663 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8
664 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8
665 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
666 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
667 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
668 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
669 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
670 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
671 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
672 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
673 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
674 // CHECK4-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
675 // CHECK4-NEXT: store double [[TMP2]], double* [[G2]], align 8
676 // CHECK4-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
677 // CHECK4-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4
678 // CHECK4-NEXT: store double [[TMP4]], double* [[G13]], align 8
679 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
680 // CHECK4-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
681 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
682 // CHECK4-NEXT: ret void
683 //
684 //
685 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
686 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
687 // CHECK4-NEXT: entry:
688 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
689 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
690 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
691 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
692 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
693 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4
694 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4
695 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
696 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
697 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
698 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
699 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
700 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
701 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
702 // CHECK4-NEXT: [[G3:%.*]] = alloca double, align 8
703 // CHECK4-NEXT: [[G14:%.*]] = alloca double, align 8
704 // CHECK4-NEXT: [[_TMP5:%.*]] = alloca double*, align 4
705 // CHECK4-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
706 // CHECK4-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
707 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
708 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
709 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
710 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
711 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
712 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
713 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
714 // CHECK4-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
715 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
716 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
717 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
718 // CHECK4-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
719 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
720 // CHECK4-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
721 // CHECK4-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4
722 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
723 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
724 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
725 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
726 // CHECK4-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP1]], align 4
727 // CHECK4-NEXT: store double* [[G14]], double** [[_TMP5]], align 4
728 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
729 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
730 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
731 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
732 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
733 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
734 // CHECK4: cond.true:
735 // CHECK4-NEXT: br label [[COND_END:%.*]]
736 // CHECK4: cond.false:
737 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
738 // CHECK4-NEXT: br label [[COND_END]]
739 // CHECK4: cond.end:
740 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
741 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
742 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
743 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
744 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
745 // CHECK4: omp.inner.for.cond:
746 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
747 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
748 // CHECK4-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
749 // CHECK4-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
750 // CHECK4: omp.inner.for.body:
751 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
752 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
753 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
754 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
755 // CHECK4-NEXT: store double 1.000000e+00, double* [[G3]], align 8
756 // CHECK4-NEXT: [[TMP14:%.*]] = load double*, double** [[_TMP5]], align 4
757 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP14]], align 4
758 // CHECK4-NEXT: store i32 3, i32* [[SVAR6]], align 4
759 // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR7]], align 4
760 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
761 // CHECK4-NEXT: store double* [[G3]], double** [[TMP15]], align 4
762 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
763 // CHECK4-NEXT: [[TMP17:%.*]] = load double*, double** [[_TMP5]], align 4
764 // CHECK4-NEXT: store double* [[TMP17]], double** [[TMP16]], align 4
765 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
766 // CHECK4-NEXT: store i32* [[SVAR6]], i32** [[TMP18]], align 4
767 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
768 // CHECK4-NEXT: store float* [[SFVAR7]], float** [[TMP19]], align 4
769 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]])
770 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
771 // CHECK4: omp.body.continue:
772 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
773 // CHECK4: omp.inner.for.inc:
774 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
775 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
776 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
777 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
778 // CHECK4: omp.inner.for.end:
779 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
780 // CHECK4: omp.loop.exit:
781 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]])
782 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
783 // CHECK4-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
784 // CHECK4-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
785 // CHECK4: .omp.lastprivate.then:
786 // CHECK4-NEXT: [[TMP23:%.*]] = load double, double* [[G3]], align 8
787 // CHECK4-NEXT: store volatile double [[TMP23]], double* [[TMP0]], align 8
788 // CHECK4-NEXT: [[TMP24:%.*]] = load double*, double** [[_TMP5]], align 4
789 // CHECK4-NEXT: [[TMP25:%.*]] = load double, double* [[TMP24]], align 4
790 // CHECK4-NEXT: store volatile double [[TMP25]], double* [[TMP5]], align 4
791 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR6]], align 4
792 // CHECK4-NEXT: store i32 [[TMP26]], i32* [[TMP2]], align 4
793 // CHECK4-NEXT: [[TMP27:%.*]] = load float, float* [[SFVAR7]], align 4
794 // CHECK4-NEXT: store float [[TMP27]], float* [[TMP3]], align 4
795 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
796 // CHECK4: .omp.lastprivate.done:
797 // CHECK4-NEXT: ret void
798 //
799 //
800 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
801 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] {
802 // CHECK4-NEXT: entry:
803 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
804 // CHECK4-NEXT: ret void
805 //
806 //
807 // CHECK9-LABEL: define {{[^@]+}}@main
808 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
809 // CHECK9-NEXT: entry:
810 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
811 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8
812 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8
813 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
814 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
815 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
816 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
817 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
818 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
819 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
820 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
821 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
822 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
823 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
824 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
825 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
826 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
827 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8
828 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
829 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4
830 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
831 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
832 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
833 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
834 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
835 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
836 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
837 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
838 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
839 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
840 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
841 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
842 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
843 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
844 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
845 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
846 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
847 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
848 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
849 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
850 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
851 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
852 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
853 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
854 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
855 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
856 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
857 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8
858 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
859 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
860 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
861 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
862 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
863 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
864 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
865 // CHECK9-NEXT: store i8* null, i8** [[TMP18]], align 8
866 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
867 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
868 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
869 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
870 // CHECK9-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
871 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
872 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
873 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8
874 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
875 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
876 // CHECK9-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
877 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
878 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
879 // CHECK9-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
880 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
881 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8
882 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
883 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
884 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8
885 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
886 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
887 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8
888 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
889 // CHECK9-NEXT: store i8* null, i8** [[TMP33]], align 8
890 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
891 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
892 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
893 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
894 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
895 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
896 // CHECK9: omp_offload.failed:
897 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
898 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
899 // CHECK9: omp_offload.cont:
900 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
901 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
902 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
903 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
904 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
905 // CHECK9: arraydestroy.body:
906 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
907 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
908 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
909 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
910 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
911 // CHECK9: arraydestroy.done3:
912 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
913 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
914 // CHECK9-NEXT: ret i32 [[TMP39]]
915 //
916 //
917 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
918 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
919 // CHECK9-NEXT: entry:
920 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
921 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
922 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
923 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
924 // CHECK9-NEXT: ret void
925 //
926 //
927 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
928 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
929 // CHECK9-NEXT: entry:
930 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
931 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
932 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
933 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
934 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
935 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
936 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
937 // CHECK9-NEXT: ret void
938 //
939 //
940 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
941 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
942 // CHECK9-NEXT: entry:
943 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
944 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
945 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
946 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
947 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
948 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
949 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
950 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
951 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
952 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
953 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
954 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
955 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
956 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
957 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
958 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
959 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
960 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
961 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
962 // CHECK9-NEXT: ret void
963 //
964 //
965 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
966 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
967 // CHECK9-NEXT: entry:
968 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
969 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
970 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
971 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
972 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
973 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
974 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
975 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
976 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
977 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
978 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
979 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
980 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
981 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
982 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
983 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
984 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
985 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
986 // CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
987 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 8
988 // CHECK9-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
989 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
990 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
991 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
992 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
993 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
994 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
995 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
996 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
997 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
998 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
999 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1000 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1001 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
1002 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
1003 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1004 // CHECK9-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8
1005 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1006 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1007 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1008 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1009 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1010 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1011 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1012 // CHECK9: arrayctor.loop:
1013 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1014 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1015 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1016 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1017 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1018 // CHECK9: arrayctor.cont:
1019 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
1020 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]])
1021 // CHECK9-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8
1022 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1023 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1024 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1025 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1026 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
1027 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1028 // CHECK9: cond.true:
1029 // CHECK9-NEXT: br label [[COND_END:%.*]]
1030 // CHECK9: cond.false:
1031 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1032 // CHECK9-NEXT: br label [[COND_END]]
1033 // CHECK9: cond.end:
1034 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1035 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1036 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1037 // CHECK9-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1038 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1039 // CHECK9: omp.inner.for.cond:
1040 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1041 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1042 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1043 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1044 // CHECK9: omp.inner.for.cond.cleanup:
1045 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1046 // CHECK9: omp.inner.for.body:
1047 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1048 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1049 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1050 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1051 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR3]], align 4
1052 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
1053 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1054 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
1055 // CHECK9-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4
1056 // CHECK9-NEXT: [[TMP17:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
1057 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[I]], align 4
1058 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP18]] to i64
1059 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
1060 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8*
1061 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast %struct.S* [[TMP17]] to i8*
1062 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i64 4, i1 false)
1063 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1064 // CHECK9: omp.body.continue:
1065 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1066 // CHECK9: omp.inner.for.inc:
1067 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1068 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP21]], 1
1069 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
1070 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1071 // CHECK9: omp.inner.for.end:
1072 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1073 // CHECK9: omp.loop.exit:
1074 // CHECK9-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1075 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
1076 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
1077 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1078 // CHECK9-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1079 // CHECK9-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1080 // CHECK9: .omp.lastprivate.then:
1081 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4
1082 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[TMP0]], align 4
1083 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1084 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1085 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 8, i1 false)
1086 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
1087 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
1088 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2
1089 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN13]], [[TMP30]]
1090 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1091 // CHECK9: omp.arraycpy.body:
1092 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1093 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1094 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1095 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1096 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false)
1097 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1098 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1099 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
1100 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
1101 // CHECK9: omp.arraycpy.done14:
1102 // CHECK9-NEXT: [[TMP33:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
1103 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
1104 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP33]] to i8*
1105 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false)
1106 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[SVAR8]], align 4
1107 // CHECK9-NEXT: store i32 [[TMP36]], i32* [[TMP4]], align 4
1108 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1109 // CHECK9: .omp.lastprivate.done:
1110 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1111 // CHECK9-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1112 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2
1113 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1114 // CHECK9: arraydestroy.body:
1115 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP37]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1116 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1117 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1118 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
1119 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
1120 // CHECK9: arraydestroy.done16:
1121 // CHECK9-NEXT: ret void
1122 //
1123 //
1124 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1125 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1126 // CHECK9-NEXT: entry:
1127 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1128 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1129 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1130 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1131 // CHECK9-NEXT: ret void
1132 //
1133 //
1134 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1135 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
1136 // CHECK9-NEXT: entry:
1137 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1138 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1139 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1140 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1141 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1142 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
1143 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1144 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1145 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
1146 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
1147 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
1148 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1149 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
1150 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4
1151 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1152 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1153 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1154 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
1155 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1156 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
1157 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1158 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
1159 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
1160 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1161 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1162 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
1163 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1164 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1165 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1166 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1167 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1168 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1169 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8
1170 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1171 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1172 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
1173 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1174 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8
1175 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1176 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
1177 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
1178 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1179 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1180 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1181 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1182 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8
1183 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1184 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
1185 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
1186 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1187 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
1188 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
1189 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1190 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8
1191 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1192 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
1193 // CHECK9-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
1194 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1195 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
1196 // CHECK9-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
1197 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1198 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8
1199 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1200 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1201 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
1202 // CHECK9-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1203 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
1204 // CHECK9-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1205 // CHECK9: omp_offload.failed:
1206 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
1207 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1208 // CHECK9: omp_offload.cont:
1209 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
1210 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1211 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1212 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1213 // CHECK9: arraydestroy.body:
1214 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1215 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1216 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1217 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1218 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1219 // CHECK9: arraydestroy.done2:
1220 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1221 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
1222 // CHECK9-NEXT: ret i32 [[TMP32]]
1223 //
1224 //
1225 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1226 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1227 // CHECK9-NEXT: entry:
1228 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1229 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1230 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1231 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1232 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4
1233 // CHECK9-NEXT: ret void
1234 //
1235 //
1236 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1237 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1238 // CHECK9-NEXT: entry:
1239 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1240 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1241 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1242 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1243 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1244 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1245 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1246 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4
1247 // CHECK9-NEXT: ret void
1248 //
1249 //
1250 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1251 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1252 // CHECK9-NEXT: entry:
1253 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1254 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1255 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1256 // CHECK9-NEXT: ret void
1257 //
1258 //
1259 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1260 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1261 // CHECK9-NEXT: entry:
1262 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1263 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1264 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1265 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
1266 // CHECK9-NEXT: ret void
1267 //
1268 //
1269 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1270 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1271 // CHECK9-NEXT: entry:
1272 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1273 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1274 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1275 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1276 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1277 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1278 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
1279 // CHECK9-NEXT: ret void
1280 //
1281 //
1282 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1283 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1284 // CHECK9-NEXT: entry:
1285 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1286 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1287 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1288 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1289 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1290 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1291 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1292 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1293 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1294 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1295 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1296 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1297 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1298 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1299 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1300 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
1301 // CHECK9-NEXT: ret void
1302 //
1303 //
1304 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1305 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1306 // CHECK9-NEXT: entry:
1307 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1308 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1309 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1310 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1311 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1312 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1313 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1314 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1315 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1316 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1317 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1318 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1319 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1320 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1321 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1322 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1323 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1324 // CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1325 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
1326 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1327 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1328 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1329 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1330 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1331 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1332 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1333 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1334 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1335 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1336 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1337 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
1338 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1339 // CHECK9-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
1340 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1341 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1342 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1343 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1344 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1345 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1346 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1347 // CHECK9: arrayctor.loop:
1348 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1349 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1350 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1351 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1352 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1353 // CHECK9: arrayctor.cont:
1354 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
1355 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
1356 // CHECK9-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
1357 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1358 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1359 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1360 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1361 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
1362 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1363 // CHECK9: cond.true:
1364 // CHECK9-NEXT: br label [[COND_END:%.*]]
1365 // CHECK9: cond.false:
1366 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1367 // CHECK9-NEXT: br label [[COND_END]]
1368 // CHECK9: cond.end:
1369 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
1370 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1371 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1372 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
1373 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1374 // CHECK9: omp.inner.for.cond:
1375 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1376 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1377 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1378 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1379 // CHECK9: omp.inner.for.cond.cleanup:
1380 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1381 // CHECK9: omp.inner.for.body:
1382 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1383 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
1384 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1385 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1386 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 4
1387 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1388 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1389 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
1390 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4
1391 // CHECK9-NEXT: [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
1392 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
1393 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64
1394 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
1395 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8*
1396 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[TMP16]] to i8*
1397 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false)
1398 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1399 // CHECK9: omp.body.continue:
1400 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1401 // CHECK9: omp.inner.for.inc:
1402 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1403 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
1404 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
1405 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1406 // CHECK9: omp.inner.for.end:
1407 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1408 // CHECK9: omp.loop.exit:
1409 // CHECK9-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1410 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
1411 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
1412 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1413 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1414 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1415 // CHECK9: .omp.lastprivate.then:
1416 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4
1417 // CHECK9-NEXT: store i32 [[TMP25]], i32* [[TMP0]], align 4
1418 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1419 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1420 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 8, i1 false)
1421 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
1422 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
1423 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
1424 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP29]]
1425 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1426 // CHECK9: omp.arraycpy.body:
1427 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1428 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1429 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1430 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1431 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false)
1432 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1433 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1434 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]]
1435 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
1436 // CHECK9: omp.arraycpy.done13:
1437 // CHECK9-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
1438 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
1439 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8*
1440 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false)
1441 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1442 // CHECK9: .omp.lastprivate.done:
1443 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1444 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1445 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i64 2
1446 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1447 // CHECK9: arraydestroy.body:
1448 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1449 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1450 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1451 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
1452 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
1453 // CHECK9: arraydestroy.done15:
1454 // CHECK9-NEXT: ret void
1455 //
1456 //
1457 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1458 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1459 // CHECK9-NEXT: entry:
1460 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1461 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1462 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1463 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1464 // CHECK9-NEXT: ret void
1465 //
1466 //
1467 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1468 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1469 // CHECK9-NEXT: entry:
1470 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1471 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1472 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1473 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1474 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4
1475 // CHECK9-NEXT: ret void
1476 //
1477 //
1478 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1479 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1480 // CHECK9-NEXT: entry:
1481 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1482 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1483 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1484 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1485 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1486 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1487 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1488 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
1489 // CHECK9-NEXT: ret void
1490 //
1491 //
1492 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1493 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1494 // CHECK9-NEXT: entry:
1495 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1496 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1497 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1498 // CHECK9-NEXT: ret void
1499 //
1500 //
1501 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1502 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1503 // CHECK9-NEXT: entry:
1504 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1505 // CHECK9-NEXT: ret void
1506 //
1507 //
1508 // CHECK10-LABEL: define {{[^@]+}}@main
1509 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
1510 // CHECK10-NEXT: entry:
1511 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1512 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8
1513 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8
1514 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1515 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1516 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1517 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1518 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
1519 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1520 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1521 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
1522 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
1523 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
1524 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
1525 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1526 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
1527 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
1528 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8
1529 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
1530 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4
1531 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1532 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
1533 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
1534 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
1535 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
1536 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
1537 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
1538 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
1539 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
1540 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1541 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1542 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
1543 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1544 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1545 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
1546 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
1547 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
1548 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
1549 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1550 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1551 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1552 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1553 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
1554 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1555 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
1556 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
1557 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1558 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8
1559 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1560 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1561 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1562 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1563 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
1564 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
1565 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1566 // CHECK10-NEXT: store i8* null, i8** [[TMP18]], align 8
1567 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1568 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
1569 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
1570 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1571 // CHECK10-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
1572 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
1573 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1574 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8
1575 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1576 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
1577 // CHECK10-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
1578 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1579 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
1580 // CHECK10-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
1581 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1582 // CHECK10-NEXT: store i8* null, i8** [[TMP28]], align 8
1583 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1584 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
1585 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8
1586 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1587 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
1588 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8
1589 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
1590 // CHECK10-NEXT: store i8* null, i8** [[TMP33]], align 8
1591 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1592 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1593 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
1594 // CHECK10-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1595 // CHECK10-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
1596 // CHECK10-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1597 // CHECK10: omp_offload.failed:
1598 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
1599 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
1600 // CHECK10: omp_offload.cont:
1601 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
1602 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1603 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1604 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1605 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1606 // CHECK10: arraydestroy.body:
1607 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1608 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1609 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1610 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1611 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
1612 // CHECK10: arraydestroy.done3:
1613 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1614 // CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
1615 // CHECK10-NEXT: ret i32 [[TMP39]]
1616 //
1617 //
1618 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1619 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1620 // CHECK10-NEXT: entry:
1621 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1622 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1623 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1624 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
1625 // CHECK10-NEXT: ret void
1626 //
1627 //
1628 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1629 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1630 // CHECK10-NEXT: entry:
1631 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1632 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1633 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1634 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1635 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1636 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1637 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
1638 // CHECK10-NEXT: ret void
1639 //
1640 //
1641 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
1642 // CHECK10-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1643 // CHECK10-NEXT: entry:
1644 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1645 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1646 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1647 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1648 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
1649 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1650 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1651 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1652 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1653 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1654 // CHECK10-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
1655 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1656 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1657 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1658 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1659 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
1660 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
1661 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1662 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
1663 // CHECK10-NEXT: ret void
1664 //
1665 //
1666 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
1667 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1668 // CHECK10-NEXT: entry:
1669 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1670 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1671 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1672 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1673 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1674 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1675 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
1676 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1677 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
1678 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1679 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1680 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1681 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1682 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1683 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1684 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1685 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1686 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1687 // CHECK10-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1688 // CHECK10-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 8
1689 // CHECK10-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
1690 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
1691 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1692 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1693 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1694 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1695 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1696 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1697 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
1698 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1699 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1700 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1701 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1702 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
1703 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
1704 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1705 // CHECK10-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8
1706 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1707 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1708 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1709 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1710 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1711 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1712 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1713 // CHECK10: arrayctor.loop:
1714 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1715 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1716 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1717 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1718 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1719 // CHECK10: arrayctor.cont:
1720 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
1721 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]])
1722 // CHECK10-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8
1723 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1724 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1725 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1726 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1727 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
1728 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1729 // CHECK10: cond.true:
1730 // CHECK10-NEXT: br label [[COND_END:%.*]]
1731 // CHECK10: cond.false:
1732 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1733 // CHECK10-NEXT: br label [[COND_END]]
1734 // CHECK10: cond.end:
1735 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1736 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1737 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1738 // CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1739 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1740 // CHECK10: omp.inner.for.cond:
1741 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1742 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1743 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1744 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1745 // CHECK10: omp.inner.for.cond.cleanup:
1746 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1747 // CHECK10: omp.inner.for.body:
1748 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1749 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1750 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1751 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1752 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR3]], align 4
1753 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
1754 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1755 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
1756 // CHECK10-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4
1757 // CHECK10-NEXT: [[TMP17:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
1758 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[I]], align 4
1759 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP18]] to i64
1760 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
1761 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8*
1762 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast %struct.S* [[TMP17]] to i8*
1763 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i64 4, i1 false)
1764 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1765 // CHECK10: omp.body.continue:
1766 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1767 // CHECK10: omp.inner.for.inc:
1768 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1769 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP21]], 1
1770 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
1771 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
1772 // CHECK10: omp.inner.for.end:
1773 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1774 // CHECK10: omp.loop.exit:
1775 // CHECK10-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1776 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
1777 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
1778 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1779 // CHECK10-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1780 // CHECK10-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1781 // CHECK10: .omp.lastprivate.then:
1782 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4
1783 // CHECK10-NEXT: store i32 [[TMP26]], i32* [[TMP0]], align 4
1784 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1785 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1786 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 8, i1 false)
1787 // CHECK10-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
1788 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
1789 // CHECK10-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2
1790 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN13]], [[TMP30]]
1791 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1792 // CHECK10: omp.arraycpy.body:
1793 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1794 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1795 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1796 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1797 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false)
1798 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1799 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1800 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
1801 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
1802 // CHECK10: omp.arraycpy.done14:
1803 // CHECK10-NEXT: [[TMP33:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
1804 // CHECK10-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
1805 // CHECK10-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP33]] to i8*
1806 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false)
1807 // CHECK10-NEXT: [[TMP36:%.*]] = load i32, i32* [[SVAR8]], align 4
1808 // CHECK10-NEXT: store i32 [[TMP36]], i32* [[TMP4]], align 4
1809 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1810 // CHECK10: .omp.lastprivate.done:
1811 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1812 // CHECK10-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1813 // CHECK10-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2
1814 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1815 // CHECK10: arraydestroy.body:
1816 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP37]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1817 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1818 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1819 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
1820 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
1821 // CHECK10: arraydestroy.done16:
1822 // CHECK10-NEXT: ret void
1823 //
1824 //
1825 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1826 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1827 // CHECK10-NEXT: entry:
1828 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1829 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1830 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1831 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1832 // CHECK10-NEXT: ret void
1833 //
1834 //
1835 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1836 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat {
1837 // CHECK10-NEXT: entry:
1838 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1839 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1840 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1841 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1842 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1843 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
1844 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1845 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1846 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
1847 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
1848 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
1849 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1850 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
1851 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4
1852 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1853 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1854 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1855 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
1856 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1857 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
1858 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1859 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
1860 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
1861 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1862 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1863 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
1864 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1865 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1866 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1867 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1868 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1869 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1870 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8
1871 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1872 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1873 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
1874 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1875 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8
1876 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1877 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
1878 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
1879 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1880 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1881 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1882 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1883 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8
1884 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1885 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
1886 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
1887 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1888 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
1889 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
1890 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1891 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 8
1892 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1893 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
1894 // CHECK10-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
1895 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1896 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
1897 // CHECK10-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
1898 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1899 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 8
1900 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1901 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1902 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
1903 // CHECK10-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1904 // CHECK10-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
1905 // CHECK10-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1906 // CHECK10: omp_offload.failed:
1907 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
1908 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
1909 // CHECK10: omp_offload.cont:
1910 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
1911 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1912 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1913 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1914 // CHECK10: arraydestroy.body:
1915 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1916 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1917 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1918 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1919 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1920 // CHECK10: arraydestroy.done2:
1921 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1922 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
1923 // CHECK10-NEXT: ret i32 [[TMP32]]
1924 //
1925 //
1926 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1927 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1928 // CHECK10-NEXT: entry:
1929 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1930 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1931 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1932 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1933 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4
1934 // CHECK10-NEXT: ret void
1935 //
1936 //
1937 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1938 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1939 // CHECK10-NEXT: entry:
1940 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1941 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1942 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1943 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1944 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1945 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1946 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1947 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4
1948 // CHECK10-NEXT: ret void
1949 //
1950 //
1951 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1952 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1953 // CHECK10-NEXT: entry:
1954 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1955 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1956 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1957 // CHECK10-NEXT: ret void
1958 //
1959 //
1960 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1961 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1962 // CHECK10-NEXT: entry:
1963 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1964 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1965 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1966 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
1967 // CHECK10-NEXT: ret void
1968 //
1969 //
1970 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1971 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1972 // CHECK10-NEXT: entry:
1973 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1974 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1975 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1976 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1977 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1978 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1979 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
1980 // CHECK10-NEXT: ret void
1981 //
1982 //
1983 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1984 // CHECK10-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1985 // CHECK10-NEXT: entry:
1986 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1987 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1988 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1989 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1990 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1991 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1992 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1993 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1994 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1995 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1996 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1997 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1998 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1999 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
2000 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2001 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
2002 // CHECK10-NEXT: ret void
2003 //
2004 //
2005 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
2006 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2007 // CHECK10-NEXT: entry:
2008 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2009 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2010 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
2011 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2012 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
2013 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
2014 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
2015 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
2016 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2017 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2018 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2019 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2020 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2021 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2022 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
2023 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2024 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
2025 // CHECK10-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2026 // CHECK10-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
2027 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2028 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2029 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2030 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
2031 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2032 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2033 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2034 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
2035 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2036 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2037 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2038 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
2039 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2040 // CHECK10-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
2041 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2042 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2043 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2044 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2045 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2046 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2047 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2048 // CHECK10: arrayctor.loop:
2049 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2050 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2051 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
2052 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2053 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2054 // CHECK10: arrayctor.cont:
2055 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
2056 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
2057 // CHECK10-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
2058 // CHECK10-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2059 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2060 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2061 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2062 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
2063 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2064 // CHECK10: cond.true:
2065 // CHECK10-NEXT: br label [[COND_END:%.*]]
2066 // CHECK10: cond.false:
2067 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2068 // CHECK10-NEXT: br label [[COND_END]]
2069 // CHECK10: cond.end:
2070 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
2071 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2072 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2073 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
2074 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2075 // CHECK10: omp.inner.for.cond:
2076 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2077 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2078 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
2079 // CHECK10-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2080 // CHECK10: omp.inner.for.cond.cleanup:
2081 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2082 // CHECK10: omp.inner.for.body:
2083 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2084 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
2085 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2086 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2087 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 4
2088 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
2089 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
2090 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
2091 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4
2092 // CHECK10-NEXT: [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
2093 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
2094 // CHECK10-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64
2095 // CHECK10-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
2096 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8*
2097 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[TMP16]] to i8*
2098 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false)
2099 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2100 // CHECK10: omp.body.continue:
2101 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2102 // CHECK10: omp.inner.for.inc:
2103 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2104 // CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
2105 // CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
2106 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2107 // CHECK10: omp.inner.for.end:
2108 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2109 // CHECK10: omp.loop.exit:
2110 // CHECK10-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2111 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2112 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2113 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2114 // CHECK10-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2115 // CHECK10-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2116 // CHECK10: .omp.lastprivate.then:
2117 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4
2118 // CHECK10-NEXT: store i32 [[TMP25]], i32* [[TMP0]], align 4
2119 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2120 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2121 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 8, i1 false)
2122 // CHECK10-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
2123 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
2124 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
2125 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP29]]
2126 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2127 // CHECK10: omp.arraycpy.body:
2128 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2129 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2130 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2131 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2132 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false)
2133 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2134 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2135 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]]
2136 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
2137 // CHECK10: omp.arraycpy.done13:
2138 // CHECK10-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
2139 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
2140 // CHECK10-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8*
2141 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false)
2142 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2143 // CHECK10: .omp.lastprivate.done:
2144 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
2145 // CHECK10-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2146 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i64 2
2147 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2148 // CHECK10: arraydestroy.body:
2149 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2150 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2151 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2152 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
2153 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
2154 // CHECK10: arraydestroy.done15:
2155 // CHECK10-NEXT: ret void
2156 //
2157 //
2158 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2159 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2160 // CHECK10-NEXT: entry:
2161 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2162 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2163 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2164 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2165 // CHECK10-NEXT: ret void
2166 //
2167 //
2168 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2169 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2170 // CHECK10-NEXT: entry:
2171 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2172 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2173 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2174 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2175 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4
2176 // CHECK10-NEXT: ret void
2177 //
2178 //
2179 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2180 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2181 // CHECK10-NEXT: entry:
2182 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2183 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2184 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2185 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2186 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2187 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2188 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2189 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
2190 // CHECK10-NEXT: ret void
2191 //
2192 //
2193 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2194 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2195 // CHECK10-NEXT: entry:
2196 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2197 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2198 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2199 // CHECK10-NEXT: ret void
2200 //
2201 //
2202 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2203 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
2204 // CHECK10-NEXT: entry:
2205 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
2206 // CHECK10-NEXT: ret void
2207 //
2208 //
2209 // CHECK11-LABEL: define {{[^@]+}}@main
2210 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
2211 // CHECK11-NEXT: entry:
2212 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2213 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8
2214 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4
2215 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2216 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2217 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2218 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2219 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
2220 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2221 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2222 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
2223 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
2224 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
2225 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
2226 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2227 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2228 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
2229 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4
2230 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
2231 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4
2232 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2233 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
2234 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2235 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
2236 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
2237 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
2238 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
2239 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
2240 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
2241 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2242 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
2243 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2244 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2245 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
2246 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
2247 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
2248 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2249 // CHECK11-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2250 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2251 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2252 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
2253 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2254 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
2255 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
2256 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2257 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4
2258 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2259 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2260 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
2261 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2262 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
2263 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
2264 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2265 // CHECK11-NEXT: store i8* null, i8** [[TMP18]], align 4
2266 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2267 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
2268 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
2269 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2270 // CHECK11-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
2271 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
2272 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2273 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4
2274 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2275 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
2276 // CHECK11-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
2277 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2278 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
2279 // CHECK11-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
2280 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2281 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4
2282 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
2283 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
2284 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4
2285 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
2286 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
2287 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4
2288 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
2289 // CHECK11-NEXT: store i8* null, i8** [[TMP33]], align 4
2290 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2291 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2292 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
2293 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2294 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
2295 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2296 // CHECK11: omp_offload.failed:
2297 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
2298 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2299 // CHECK11: omp_offload.cont:
2300 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
2301 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2302 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2303 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2304 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2305 // CHECK11: arraydestroy.body:
2306 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2307 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2308 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2309 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2310 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2311 // CHECK11: arraydestroy.done2:
2312 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2313 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
2314 // CHECK11-NEXT: ret i32 [[TMP39]]
2315 //
2316 //
2317 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2318 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2319 // CHECK11-NEXT: entry:
2320 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2321 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2322 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2323 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
2324 // CHECK11-NEXT: ret void
2325 //
2326 //
2327 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2328 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2329 // CHECK11-NEXT: entry:
2330 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2331 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2332 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2333 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2334 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2335 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2336 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
2337 // CHECK11-NEXT: ret void
2338 //
2339 //
2340 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
2341 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
2342 // CHECK11-NEXT: entry:
2343 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2344 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2345 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2346 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2347 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
2348 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2349 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2350 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2351 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2352 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2353 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
2354 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2355 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2356 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
2357 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
2358 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2359 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
2360 // CHECK11-NEXT: ret void
2361 //
2362 //
2363 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
2364 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
2365 // CHECK11-NEXT: entry:
2366 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2367 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2368 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
2369 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2370 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2371 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2372 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
2373 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2374 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
2375 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2376 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2377 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2378 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2379 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2380 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2381 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
2382 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2383 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
2384 // CHECK11-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2385 // CHECK11-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 4
2386 // CHECK11-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
2387 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2388 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2389 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2390 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
2391 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2392 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2393 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2394 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
2395 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
2396 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2397 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2398 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
2399 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
2400 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
2401 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2402 // CHECK11-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4
2403 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2404 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2405 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2406 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2407 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
2408 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2409 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2410 // CHECK11: arrayctor.loop:
2411 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2412 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2413 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
2414 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2415 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2416 // CHECK11: arrayctor.cont:
2417 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
2418 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]])
2419 // CHECK11-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 4
2420 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2421 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2422 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2423 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2424 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
2425 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2426 // CHECK11: cond.true:
2427 // CHECK11-NEXT: br label [[COND_END:%.*]]
2428 // CHECK11: cond.false:
2429 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2430 // CHECK11-NEXT: br label [[COND_END]]
2431 // CHECK11: cond.end:
2432 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2433 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2434 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2435 // CHECK11-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
2436 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2437 // CHECK11: omp.inner.for.cond:
2438 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2439 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2440 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2441 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2442 // CHECK11: omp.inner.for.cond.cleanup:
2443 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2444 // CHECK11: omp.inner.for.body:
2445 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2446 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2447 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2448 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2449 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR3]], align 4
2450 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
2451 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP16]]
2452 // CHECK11-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4
2453 // CHECK11-NEXT: [[TMP17:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4
2454 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[I]], align 4
2455 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 [[TMP18]]
2456 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[ARRAYIDX10]] to i8*
2457 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast %struct.S* [[TMP17]] to i8*
2458 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i32 4, i1 false)
2459 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2460 // CHECK11: omp.body.continue:
2461 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2462 // CHECK11: omp.inner.for.inc:
2463 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2464 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1
2465 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
2466 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2467 // CHECK11: omp.inner.for.end:
2468 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2469 // CHECK11: omp.loop.exit:
2470 // CHECK11-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2471 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
2472 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
2473 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2474 // CHECK11-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
2475 // CHECK11-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2476 // CHECK11: .omp.lastprivate.then:
2477 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4
2478 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[TMP0]], align 4
2479 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2480 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2481 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 8, i1 false)
2482 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
2483 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
2484 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i32 2
2485 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN12]], [[TMP30]]
2486 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2487 // CHECK11: omp.arraycpy.body:
2488 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2489 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2490 // CHECK11-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2491 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2492 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false)
2493 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2494 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2495 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
2496 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
2497 // CHECK11: omp.arraycpy.done13:
2498 // CHECK11-NEXT: [[TMP33:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4
2499 // CHECK11-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
2500 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP33]] to i8*
2501 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i32 4, i1 false)
2502 // CHECK11-NEXT: [[TMP36:%.*]] = load i32, i32* [[SVAR8]], align 4
2503 // CHECK11-NEXT: store i32 [[TMP36]], i32* [[TMP4]], align 4
2504 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2505 // CHECK11: .omp.lastprivate.done:
2506 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
2507 // CHECK11-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
2508 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i32 2
2509 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2510 // CHECK11: arraydestroy.body:
2511 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP37]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2512 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2513 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2514 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
2515 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
2516 // CHECK11: arraydestroy.done15:
2517 // CHECK11-NEXT: ret void
2518 //
2519 //
2520 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2521 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2522 // CHECK11-NEXT: entry:
2523 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2524 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2525 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2526 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2527 // CHECK11-NEXT: ret void
2528 //
2529 //
2530 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2531 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
2532 // CHECK11-NEXT: entry:
2533 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2534 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2535 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2536 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2537 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2538 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
2539 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2540 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2541 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
2542 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
2543 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
2544 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2545 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
2546 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4
2547 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2548 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
2549 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2550 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
2551 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
2552 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
2553 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
2554 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
2555 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
2556 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2557 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
2558 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2559 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2560 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2561 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2562 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2563 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
2564 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
2565 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2566 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2567 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
2568 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2569 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4
2570 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2571 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
2572 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
2573 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2574 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2575 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
2576 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2577 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
2578 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2579 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
2580 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
2581 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2582 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
2583 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
2584 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2585 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4
2586 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2587 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
2588 // CHECK11-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
2589 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2590 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
2591 // CHECK11-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
2592 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2593 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4
2594 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2595 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2596 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
2597 // CHECK11-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2598 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
2599 // CHECK11-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2600 // CHECK11: omp_offload.failed:
2601 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
2602 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2603 // CHECK11: omp_offload.cont:
2604 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
2605 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2606 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2607 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2608 // CHECK11: arraydestroy.body:
2609 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2610 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2611 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2612 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2613 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2614 // CHECK11: arraydestroy.done2:
2615 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2616 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
2617 // CHECK11-NEXT: ret i32 [[TMP32]]
2618 //
2619 //
2620 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2621 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2622 // CHECK11-NEXT: entry:
2623 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2624 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2625 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2626 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2627 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4
2628 // CHECK11-NEXT: ret void
2629 //
2630 //
2631 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2632 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2633 // CHECK11-NEXT: entry:
2634 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2635 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2636 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2637 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2638 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2639 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2640 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2641 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4
2642 // CHECK11-NEXT: ret void
2643 //
2644 //
2645 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2646 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2647 // CHECK11-NEXT: entry:
2648 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2649 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2650 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2651 // CHECK11-NEXT: ret void
2652 //
2653 //
2654 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2655 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2656 // CHECK11-NEXT: entry:
2657 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2658 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2659 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2660 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
2661 // CHECK11-NEXT: ret void
2662 //
2663 //
2664 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2665 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2666 // CHECK11-NEXT: entry:
2667 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2668 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2669 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2670 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2671 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2672 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2673 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
2674 // CHECK11-NEXT: ret void
2675 //
2676 //
2677 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
2678 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2679 // CHECK11-NEXT: entry:
2680 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2681 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2682 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2683 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2684 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2685 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2686 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2687 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2688 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2689 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2690 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2691 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2692 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
2693 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2694 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
2695 // CHECK11-NEXT: ret void
2696 //
2697 //
2698 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
2699 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2700 // CHECK11-NEXT: entry:
2701 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2702 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2703 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
2704 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2705 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2706 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2707 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2708 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
2709 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2710 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2711 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2712 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2713 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2714 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2715 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
2716 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2717 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
2718 // CHECK11-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2719 // CHECK11-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 4
2720 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2721 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2722 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2723 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
2724 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2725 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2726 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2727 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
2728 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2729 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2730 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2731 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
2732 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2733 // CHECK11-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4
2734 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2735 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2736 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2737 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2738 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2739 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2740 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2741 // CHECK11: arrayctor.loop:
2742 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2743 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2744 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
2745 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2746 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2747 // CHECK11: arrayctor.cont:
2748 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
2749 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
2750 // CHECK11-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 4
2751 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2752 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2753 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2754 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2755 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
2756 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2757 // CHECK11: cond.true:
2758 // CHECK11-NEXT: br label [[COND_END:%.*]]
2759 // CHECK11: cond.false:
2760 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2761 // CHECK11-NEXT: br label [[COND_END]]
2762 // CHECK11: cond.end:
2763 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
2764 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2765 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2766 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
2767 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2768 // CHECK11: omp.inner.for.cond:
2769 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2770 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2771 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
2772 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2773 // CHECK11: omp.inner.for.cond.cleanup:
2774 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2775 // CHECK11: omp.inner.for.body:
2776 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2777 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
2778 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2779 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2780 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 4
2781 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
2782 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP15]]
2783 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4
2784 // CHECK11-NEXT: [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4
2785 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
2786 // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 [[TMP17]]
2787 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8*
2788 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[TMP16]] to i8*
2789 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 4, i1 false)
2790 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2791 // CHECK11: omp.body.continue:
2792 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2793 // CHECK11: omp.inner.for.inc:
2794 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2795 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], 1
2796 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
2797 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2798 // CHECK11: omp.inner.for.end:
2799 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2800 // CHECK11: omp.loop.exit:
2801 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2802 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2803 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2804 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2805 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2806 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2807 // CHECK11: .omp.lastprivate.then:
2808 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4
2809 // CHECK11-NEXT: store i32 [[TMP25]], i32* [[TMP0]], align 4
2810 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2811 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2812 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 8, i1 false)
2813 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
2814 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
2815 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2
2816 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP29]]
2817 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2818 // CHECK11: omp.arraycpy.body:
2819 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2820 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2821 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2822 // CHECK11-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2823 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false)
2824 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2825 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2826 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]]
2827 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
2828 // CHECK11: omp.arraycpy.done12:
2829 // CHECK11-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4
2830 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
2831 // CHECK11-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8*
2832 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false)
2833 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2834 // CHECK11: .omp.lastprivate.done:
2835 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
2836 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2837 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i32 2
2838 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2839 // CHECK11: arraydestroy.body:
2840 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2841 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2842 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2843 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
2844 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
2845 // CHECK11: arraydestroy.done14:
2846 // CHECK11-NEXT: ret void
2847 //
2848 //
2849 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2850 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2851 // CHECK11-NEXT: entry:
2852 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2853 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2854 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2855 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2856 // CHECK11-NEXT: ret void
2857 //
2858 //
2859 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2860 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2861 // CHECK11-NEXT: entry:
2862 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2863 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2864 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2865 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2866 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4
2867 // CHECK11-NEXT: ret void
2868 //
2869 //
2870 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2871 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2872 // CHECK11-NEXT: entry:
2873 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2874 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2875 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2876 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2877 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2878 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2879 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2880 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
2881 // CHECK11-NEXT: ret void
2882 //
2883 //
2884 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2885 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2886 // CHECK11-NEXT: entry:
2887 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2888 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2889 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2890 // CHECK11-NEXT: ret void
2891 //
2892 //
2893 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2894 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
2895 // CHECK11-NEXT: entry:
2896 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
2897 // CHECK11-NEXT: ret void
2898 //
2899 //
2900 // CHECK12-LABEL: define {{[^@]+}}@main
2901 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
2902 // CHECK12-NEXT: entry:
2903 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2904 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8
2905 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4
2906 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2907 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2908 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2909 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2910 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
2911 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2912 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2913 // CHECK12-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
2914 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
2915 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
2916 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
2917 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2918 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
2919 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
2920 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4
2921 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
2922 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4
2923 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2924 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
2925 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2926 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
2927 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
2928 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
2929 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
2930 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
2931 // CHECK12-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
2932 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2933 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
2934 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2935 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2936 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
2937 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
2938 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
2939 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2940 // CHECK12-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2941 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2942 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2943 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
2944 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2945 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
2946 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
2947 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2948 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4
2949 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2950 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2951 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
2952 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2953 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
2954 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
2955 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2956 // CHECK12-NEXT: store i8* null, i8** [[TMP18]], align 4
2957 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2958 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
2959 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
2960 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2961 // CHECK12-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
2962 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
2963 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2964 // CHECK12-NEXT: store i8* null, i8** [[TMP23]], align 4
2965 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2966 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
2967 // CHECK12-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
2968 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2969 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
2970 // CHECK12-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
2971 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2972 // CHECK12-NEXT: store i8* null, i8** [[TMP28]], align 4
2973 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
2974 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
2975 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4
2976 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
2977 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
2978 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4
2979 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
2980 // CHECK12-NEXT: store i8* null, i8** [[TMP33]], align 4
2981 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2982 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2983 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
2984 // CHECK12-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2985 // CHECK12-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
2986 // CHECK12-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2987 // CHECK12: omp_offload.failed:
2988 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
2989 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
2990 // CHECK12: omp_offload.cont:
2991 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
2992 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2993 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2994 // CHECK12-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2995 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2996 // CHECK12: arraydestroy.body:
2997 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2998 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2999 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3000 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
3001 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
3002 // CHECK12: arraydestroy.done2:
3003 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3004 // CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
3005 // CHECK12-NEXT: ret i32 [[TMP39]]
3006 //
3007 //
3008 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3009 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3010 // CHECK12-NEXT: entry:
3011 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3012 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3013 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3014 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
3015 // CHECK12-NEXT: ret void
3016 //
3017 //
3018 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3019 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3020 // CHECK12-NEXT: entry:
3021 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3022 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
3023 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3024 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4
3025 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3026 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3027 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
3028 // CHECK12-NEXT: ret void
3029 //
3030 //
3031 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
3032 // CHECK12-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
3033 // CHECK12-NEXT: entry:
3034 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
3035 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3036 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
3037 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
3038 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
3039 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
3040 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
3041 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3042 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3043 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
3044 // CHECK12-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
3045 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3046 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3047 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
3048 // CHECK12-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
3049 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3050 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
3051 // CHECK12-NEXT: ret void
3052 //
3053 //
3054 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
3055 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
3056 // CHECK12-NEXT: entry:
3057 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3058 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3059 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
3060 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3061 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
3062 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
3063 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
3064 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
3065 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
3066 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3067 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3068 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3069 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3070 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3071 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3072 // CHECK12-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
3073 // CHECK12-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
3074 // CHECK12-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
3075 // CHECK12-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3076 // CHECK12-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 4
3077 // CHECK12-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
3078 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3079 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3080 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3081 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
3082 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3083 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3084 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
3085 // CHECK12-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
3086 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
3087 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3088 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3089 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
3090 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
3091 // CHECK12-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
3092 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3093 // CHECK12-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4
3094 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3095 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3096 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3097 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3098 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
3099 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3100 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
3101 // CHECK12: arrayctor.loop:
3102 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3103 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3104 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
3105 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3106 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3107 // CHECK12: arrayctor.cont:
3108 // CHECK12-NEXT: [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
3109 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]])
3110 // CHECK12-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 4
3111 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3112 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3113 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3114 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3115 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
3116 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3117 // CHECK12: cond.true:
3118 // CHECK12-NEXT: br label [[COND_END:%.*]]
3119 // CHECK12: cond.false:
3120 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3121 // CHECK12-NEXT: br label [[COND_END]]
3122 // CHECK12: cond.end:
3123 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
3124 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3125 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3126 // CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
3127 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3128 // CHECK12: omp.inner.for.cond:
3129 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3130 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3131 // CHECK12-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3132 // CHECK12-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3133 // CHECK12: omp.inner.for.cond.cleanup:
3134 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3135 // CHECK12: omp.inner.for.body:
3136 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3137 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
3138 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3139 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3140 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR3]], align 4
3141 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
3142 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP16]]
3143 // CHECK12-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4
3144 // CHECK12-NEXT: [[TMP17:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4
3145 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[I]], align 4
3146 // CHECK12-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 [[TMP18]]
3147 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[ARRAYIDX10]] to i8*
3148 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast %struct.S* [[TMP17]] to i8*
3149 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i32 4, i1 false)
3150 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3151 // CHECK12: omp.body.continue:
3152 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3153 // CHECK12: omp.inner.for.inc:
3154 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3155 // CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1
3156 // CHECK12-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
3157 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
3158 // CHECK12: omp.inner.for.end:
3159 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3160 // CHECK12: omp.loop.exit:
3161 // CHECK12-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3162 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
3163 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
3164 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3165 // CHECK12-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
3166 // CHECK12-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3167 // CHECK12: .omp.lastprivate.then:
3168 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4
3169 // CHECK12-NEXT: store i32 [[TMP26]], i32* [[TMP0]], align 4
3170 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
3171 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3172 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 8, i1 false)
3173 // CHECK12-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
3174 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
3175 // CHECK12-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i32 2
3176 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN12]], [[TMP30]]
3177 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3178 // CHECK12: omp.arraycpy.body:
3179 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3180 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3181 // CHECK12-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3182 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3183 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false)
3184 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3185 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3186 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
3187 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
3188 // CHECK12: omp.arraycpy.done13:
3189 // CHECK12-NEXT: [[TMP33:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4
3190 // CHECK12-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
3191 // CHECK12-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP33]] to i8*
3192 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i32 4, i1 false)
3193 // CHECK12-NEXT: [[TMP36:%.*]] = load i32, i32* [[SVAR8]], align 4
3194 // CHECK12-NEXT: store i32 [[TMP36]], i32* [[TMP4]], align 4
3195 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
3196 // CHECK12: .omp.lastprivate.done:
3197 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
3198 // CHECK12-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
3199 // CHECK12-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i32 2
3200 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3201 // CHECK12: arraydestroy.body:
3202 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP37]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3203 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3204 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3205 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
3206 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
3207 // CHECK12: arraydestroy.done15:
3208 // CHECK12-NEXT: ret void
3209 //
3210 //
3211 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3212 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3213 // CHECK12-NEXT: entry:
3214 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3215 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3216 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3217 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3218 // CHECK12-NEXT: ret void
3219 //
3220 //
3221 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3222 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat {
3223 // CHECK12-NEXT: entry:
3224 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3225 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3226 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
3227 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
3228 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3229 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
3230 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3231 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
3232 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
3233 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
3234 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
3235 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3236 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
3237 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4
3238 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3239 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
3240 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3241 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
3242 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
3243 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
3244 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
3245 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
3246 // CHECK12-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
3247 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
3248 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
3249 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
3250 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3251 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3252 // CHECK12-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3253 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3254 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
3255 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
3256 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3257 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
3258 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
3259 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3260 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4
3261 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3262 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
3263 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
3264 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3265 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
3266 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
3267 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3268 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4
3269 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3270 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
3271 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
3272 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3273 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
3274 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
3275 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3276 // CHECK12-NEXT: store i8* null, i8** [[TMP21]], align 4
3277 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3278 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
3279 // CHECK12-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
3280 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3281 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
3282 // CHECK12-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
3283 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
3284 // CHECK12-NEXT: store i8* null, i8** [[TMP26]], align 4
3285 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3286 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3287 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
3288 // CHECK12-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3289 // CHECK12-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
3290 // CHECK12-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3291 // CHECK12: omp_offload.failed:
3292 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
3293 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
3294 // CHECK12: omp_offload.cont:
3295 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
3296 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3297 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3298 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3299 // CHECK12: arraydestroy.body:
3300 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3301 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3302 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3303 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
3304 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
3305 // CHECK12: arraydestroy.done2:
3306 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3307 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
3308 // CHECK12-NEXT: ret i32 [[TMP32]]
3309 //
3310 //
3311 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3312 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3313 // CHECK12-NEXT: entry:
3314 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3315 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3316 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3317 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3318 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4
3319 // CHECK12-NEXT: ret void
3320 //
3321 //
3322 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3323 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3324 // CHECK12-NEXT: entry:
3325 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3326 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
3327 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3328 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4
3329 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3330 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3331 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3332 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4
3333 // CHECK12-NEXT: ret void
3334 //
3335 //
3336 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3337 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3338 // CHECK12-NEXT: entry:
3339 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3340 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3341 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3342 // CHECK12-NEXT: ret void
3343 //
3344 //
3345 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3346 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3347 // CHECK12-NEXT: entry:
3348 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3349 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3350 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3351 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
3352 // CHECK12-NEXT: ret void
3353 //
3354 //
3355 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3356 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3357 // CHECK12-NEXT: entry:
3358 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3359 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3360 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3361 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3362 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3363 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3364 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
3365 // CHECK12-NEXT: ret void
3366 //
3367 //
3368 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
3369 // CHECK12-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3370 // CHECK12-NEXT: entry:
3371 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
3372 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3373 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
3374 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
3375 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3376 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
3377 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3378 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3379 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
3380 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3381 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3382 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
3383 // CHECK12-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
3384 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3385 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
3386 // CHECK12-NEXT: ret void
3387 //
3388 //
3389 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
3390 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3391 // CHECK12-NEXT: entry:
3392 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3393 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3394 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
3395 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3396 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
3397 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
3398 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3399 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
3400 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3401 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3402 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3403 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3404 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3405 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3406 // CHECK12-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
3407 // CHECK12-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
3408 // CHECK12-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
3409 // CHECK12-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3410 // CHECK12-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 4
3411 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3412 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3413 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3414 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
3415 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3416 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3417 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
3418 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
3419 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3420 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3421 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
3422 // CHECK12-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
3423 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3424 // CHECK12-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4
3425 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3426 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3427 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3428 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3429 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3430 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3431 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
3432 // CHECK12: arrayctor.loop:
3433 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3434 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3435 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
3436 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3437 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3438 // CHECK12: arrayctor.cont:
3439 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
3440 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
3441 // CHECK12-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 4
3442 // CHECK12-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3443 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
3444 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3445 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3446 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
3447 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3448 // CHECK12: cond.true:
3449 // CHECK12-NEXT: br label [[COND_END:%.*]]
3450 // CHECK12: cond.false:
3451 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3452 // CHECK12-NEXT: br label [[COND_END]]
3453 // CHECK12: cond.end:
3454 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
3455 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3456 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3457 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
3458 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3459 // CHECK12: omp.inner.for.cond:
3460 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3461 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3462 // CHECK12-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
3463 // CHECK12-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3464 // CHECK12: omp.inner.for.cond.cleanup:
3465 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3466 // CHECK12: omp.inner.for.body:
3467 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3468 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
3469 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3470 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3471 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 4
3472 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
3473 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP15]]
3474 // CHECK12-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4
3475 // CHECK12-NEXT: [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4
3476 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
3477 // CHECK12-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 [[TMP17]]
3478 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[ARRAYIDX9]] to i8*
3479 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[TMP16]] to i8*
3480 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 4, i1 false)
3481 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3482 // CHECK12: omp.body.continue:
3483 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3484 // CHECK12: omp.inner.for.inc:
3485 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3486 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], 1
3487 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
3488 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
3489 // CHECK12: omp.inner.for.end:
3490 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3491 // CHECK12: omp.loop.exit:
3492 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3493 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
3494 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
3495 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3496 // CHECK12-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
3497 // CHECK12-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3498 // CHECK12: .omp.lastprivate.then:
3499 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4
3500 // CHECK12-NEXT: store i32 [[TMP25]], i32* [[TMP0]], align 4
3501 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
3502 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3503 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 8, i1 false)
3504 // CHECK12-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
3505 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
3506 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2
3507 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN11]], [[TMP29]]
3508 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3509 // CHECK12: omp.arraycpy.body:
3510 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3511 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3512 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3513 // CHECK12-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3514 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false)
3515 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3516 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3517 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]]
3518 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
3519 // CHECK12: omp.arraycpy.done12:
3520 // CHECK12-NEXT: [[TMP32:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4
3521 // CHECK12-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
3522 // CHECK12-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP32]] to i8*
3523 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i32 4, i1 false)
3524 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
3525 // CHECK12: .omp.lastprivate.done:
3526 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
3527 // CHECK12-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3528 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i32 2
3529 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3530 // CHECK12: arraydestroy.body:
3531 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP35]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3532 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3533 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3534 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
3535 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
3536 // CHECK12: arraydestroy.done14:
3537 // CHECK12-NEXT: ret void
3538 //
3539 //
3540 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3541 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3542 // CHECK12-NEXT: entry:
3543 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3544 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3545 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3546 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3547 // CHECK12-NEXT: ret void
3548 //
3549 //
3550 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3551 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3552 // CHECK12-NEXT: entry:
3553 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3554 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3555 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3556 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3557 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4
3558 // CHECK12-NEXT: ret void
3559 //
3560 //
3561 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3562 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3563 // CHECK12-NEXT: entry:
3564 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3565 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3566 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3567 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3568 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3569 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3570 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3571 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
3572 // CHECK12-NEXT: ret void
3573 //
3574 //
3575 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3576 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3577 // CHECK12-NEXT: entry:
3578 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3579 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3580 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3581 // CHECK12-NEXT: ret void
3582 //
3583 //
3584 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3585 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] {
3586 // CHECK12-NEXT: entry:
3587 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1)
3588 // CHECK12-NEXT: ret void
3589 //
3590 //