1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // Test target codegen - host bc file has to be created first.
3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
4 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK2
7 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK3
8
9 // expected-no-diagnostics
10 #ifndef HEADER
11 #define HEADER
12
13 #define N 1000
14 #define M 10
15
16 template<typename tx>
ftemplate(int n)17 tx ftemplate(int n) {
18 tx a[N];
19 short aa[N];
20 tx b[10];
21 tx c[M][M];
22 tx f = n;
23 tx l;
24 int k;
25
26 #pragma omp target teams distribute parallel for simd lastprivate(l) dist_schedule(static,128) schedule(static,32)
27 for(int i = 0; i < n; i++) {
28 a[i] = 1;
29 l = i;
30 }
31
32 #pragma omp target teams distribute parallel for simd map(tofrom: aa) num_teams(M) thread_limit(64)
33 for(int i = 0; i < n; i++) {
34 aa[i] += 1;
35 }
36
37 #pragma omp target teams distribute parallel for simd map(tofrom:a, aa, b) if(target: n>40) proc_bind(spread)
38 for(int i = 0; i < 10; i++) {
39 b[i] += 1;
40 }
41
42 #pragma omp target teams distribute parallel for simd collapse(2) firstprivate(f) private(k)
43 for(int i = 0; i < M; i++) {
44 for(int j = 0; j < M; j++) {
45 k = M;
46 c[i][j] = i+j*f+k;
47 }
48 }
49
50 return a[0];
51 }
52
bar(int n)53 int bar(int n){
54 int a = 0;
55
56 a += ftemplate<int>(n);
57
58 return a;
59 }
60
61 #endif
62 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
63 // CHECK4-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
64 // CHECK4-NEXT: entry:
65 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
66 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
67 // CHECK4-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
68 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
69 // CHECK4-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
70 // CHECK4-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
71 // CHECK4-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
72 // CHECK4-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
73 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
74 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
75 // CHECK4-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
76 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
77 // CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
78 // CHECK4-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
79 // CHECK4-NEXT: br label [[DOTEXECUTE:%.*]]
80 // CHECK4: .execute:
81 // CHECK4-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
82 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
83 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
84 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
85 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
86 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
87 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
88 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
89 // CHECK4-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
90 // CHECK4-NEXT: br label [[DOTOMP_DEINIT:%.*]]
91 // CHECK4: .omp.deinit:
92 // CHECK4-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
93 // CHECK4-NEXT: br label [[DOTEXIT:%.*]]
94 // CHECK4: .exit:
95 // CHECK4-NEXT: ret void
96 // CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__
97 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
98 // CHECK4-NEXT: entry:
99 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
100 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
101 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
102 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
103 // CHECK4-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
104 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
105 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
106 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
107 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
108 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
109 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
110 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
111 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
112 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
113 // CHECK4-NEXT: [[I4:%.*]] = alloca i32, align 4
114 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
115 // CHECK4-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
116 // CHECK4-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
117 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
118 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
119 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
120 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
121 // CHECK4-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
122 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
123 // CHECK4-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
124 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4
125 // CHECK4-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
126 // CHECK4-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4
127 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 0
128 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
129 // CHECK4-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
130 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
131 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
132 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
133 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
134 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
135 // CHECK4-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
136 // CHECK4-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
137 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4
138 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
139 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
140 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
141 // CHECK4: omp.precond.then:
142 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
143 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
144 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
145 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
146 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
147 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
148 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
149 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
150 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
151 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
152 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
153 // CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
154 // CHECK4: cond.true:
155 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
156 // CHECK4-NEXT: br label [[COND_END:%.*]]
157 // CHECK4: cond.false:
158 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
159 // CHECK4-NEXT: br label [[COND_END]]
160 // CHECK4: cond.end:
161 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
162 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
163 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
164 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
165 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
166 // CHECK4: omp.inner.for.cond:
167 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
168 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
169 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
170 // CHECK4-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
171 // CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
172 // CHECK4: omp.inner.for.body:
173 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
174 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
175 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
176 // CHECK4-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
177 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
178 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[L_ADDR]], align 4
179 // CHECK4-NEXT: store i32 [[TMP23]], i32* [[L_CASTED]], align 4
180 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[L_CASTED]], align 4
181 // CHECK4-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
182 // CHECK4-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP19]] to i8*
183 // CHECK4-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
184 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
185 // CHECK4-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP20]] to i8*
186 // CHECK4-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
187 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
188 // CHECK4-NEXT: [[TMP30:%.*]] = inttoptr i32 [[TMP22]] to i8*
189 // CHECK4-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
190 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
191 // CHECK4-NEXT: [[TMP32:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
192 // CHECK4-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4
193 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
194 // CHECK4-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP24]] to i8*
195 // CHECK4-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4
196 // CHECK4-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
197 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
198 // CHECK4-NEXT: [[TMP37:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
199 // CHECK4-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP37]], i32 5)
200 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
201 // CHECK4: omp.inner.for.inc:
202 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
203 // CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
204 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
205 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
206 // CHECK4-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
207 // CHECK4-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
208 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
209 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
210 // CHECK4-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
211 // CHECK4-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
212 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
213 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
214 // CHECK4-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
215 // CHECK4-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
216 // CHECK4-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP44]], [[TMP45]]
217 // CHECK4-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
218 // CHECK4: cond.true11:
219 // CHECK4-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
220 // CHECK4-NEXT: br label [[COND_END13:%.*]]
221 // CHECK4: cond.false12:
222 // CHECK4-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
223 // CHECK4-NEXT: br label [[COND_END13]]
224 // CHECK4: cond.end13:
225 // CHECK4-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP46]], [[COND_TRUE11]] ], [ [[TMP47]], [[COND_FALSE12]] ]
226 // CHECK4-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
227 // CHECK4-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
228 // CHECK4-NEXT: store i32 [[TMP48]], i32* [[DOTOMP_IV]], align 4
229 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
230 // CHECK4: omp.inner.for.end:
231 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
232 // CHECK4: omp.loop.exit:
233 // CHECK4-NEXT: [[TMP49:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
234 // CHECK4-NEXT: [[TMP50:%.*]] = load i32, i32* [[TMP49]], align 4
235 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]])
236 // CHECK4-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
237 // CHECK4-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
238 // CHECK4-NEXT: br i1 [[TMP52]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
239 // CHECK4: .omp.final.then:
240 // CHECK4-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
241 // CHECK4-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP53]], 0
242 // CHECK4-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
243 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
244 // CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
245 // CHECK4-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
246 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
247 // CHECK4: .omp.final.done:
248 // CHECK4-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
249 // CHECK4-NEXT: [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
250 // CHECK4-NEXT: br i1 [[TMP55]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
251 // CHECK4: .omp.lastprivate.then:
252 // CHECK4-NEXT: [[TMP56:%.*]] = load i32, i32* [[L_ADDR]], align 4
253 // CHECK4-NEXT: store i32 [[TMP56]], i32* [[L_ADDR]], align 4
254 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
255 // CHECK4: .omp.lastprivate.done:
256 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
257 // CHECK4: omp.precond.end:
258 // CHECK4-NEXT: [[TMP57:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
259 // CHECK4-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP57]])
260 // CHECK4-NEXT: ret void
261 // CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__1
262 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
263 // CHECK4-NEXT: entry:
264 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
265 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
266 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
267 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
268 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
269 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
270 // CHECK4-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
271 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
272 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
273 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
274 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
275 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
276 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
277 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
278 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
279 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
280 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
281 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
282 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
283 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
284 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
285 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
286 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
287 // CHECK4-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
288 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
289 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
290 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
291 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
292 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
293 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
294 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
295 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
296 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4
297 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
298 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
299 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
300 // CHECK4: omp.precond.then:
301 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
302 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
303 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
304 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
305 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
306 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
307 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
308 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
309 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
310 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
311 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
312 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
313 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
314 // CHECK4: omp.dispatch.cond:
315 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
316 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
317 // CHECK4-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
318 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
319 // CHECK4: cond.true:
320 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
321 // CHECK4-NEXT: br label [[COND_END:%.*]]
322 // CHECK4: cond.false:
323 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
324 // CHECK4-NEXT: br label [[COND_END]]
325 // CHECK4: cond.end:
326 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
327 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
328 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
329 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
330 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
331 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
332 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
333 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
334 // CHECK4: omp.dispatch.body:
335 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
336 // CHECK4: omp.inner.for.cond:
337 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
338 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
339 // CHECK4-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
340 // CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
341 // CHECK4: omp.inner.for.body:
342 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
343 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
344 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
345 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
346 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
347 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
348 // CHECK4-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
349 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
350 // CHECK4-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
351 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
352 // CHECK4: omp.body.continue:
353 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
354 // CHECK4: omp.inner.for.inc:
355 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
356 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
357 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
358 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
359 // CHECK4: omp.inner.for.end:
360 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
361 // CHECK4: omp.dispatch.inc:
362 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
363 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
364 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
365 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
366 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
367 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
368 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
369 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
370 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]]
371 // CHECK4: omp.dispatch.end:
372 // CHECK4-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
373 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
374 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
375 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
376 // CHECK4-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
377 // CHECK4-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
378 // CHECK4: .omp.final.then:
379 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
380 // CHECK4-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
381 // CHECK4-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
382 // CHECK4-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
383 // CHECK4-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
384 // CHECK4-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
385 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
386 // CHECK4: .omp.final.done:
387 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
388 // CHECK4-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
389 // CHECK4-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
390 // CHECK4: .omp.lastprivate.then:
391 // CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
392 // CHECK4-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
393 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
394 // CHECK4: .omp.lastprivate.done:
395 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
396 // CHECK4: omp.precond.end:
397 // CHECK4-NEXT: ret void
398 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
399 // CHECK4-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
400 // CHECK4-NEXT: entry:
401 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
402 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
403 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
404 // CHECK4-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
405 // CHECK4-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
406 // CHECK4-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
407 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
408 // CHECK4-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
409 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
410 // CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
411 // CHECK4-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
412 // CHECK4-NEXT: br label [[DOTEXECUTE:%.*]]
413 // CHECK4: .execute:
414 // CHECK4-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
415 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
416 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
417 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
418 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
419 // CHECK4-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
420 // CHECK4-NEXT: br label [[DOTOMP_DEINIT:%.*]]
421 // CHECK4: .omp.deinit:
422 // CHECK4-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
423 // CHECK4-NEXT: br label [[DOTEXIT:%.*]]
424 // CHECK4: .exit:
425 // CHECK4-NEXT: ret void
426 // CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__2
427 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
428 // CHECK4-NEXT: entry:
429 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
430 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
431 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
432 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
433 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
434 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
435 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
436 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
437 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
438 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
439 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
440 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
441 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
442 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
443 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
444 // CHECK4-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
445 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
446 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
447 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
448 // CHECK4-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
449 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
450 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
451 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
452 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
453 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
454 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
455 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
456 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
457 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4
458 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
459 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
460 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
461 // CHECK4: omp.precond.then:
462 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
463 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
464 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
465 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
466 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
467 // CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
468 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
469 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
470 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
471 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
472 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
473 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
474 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
475 // CHECK4: cond.true:
476 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
477 // CHECK4-NEXT: br label [[COND_END:%.*]]
478 // CHECK4: cond.false:
479 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
480 // CHECK4-NEXT: br label [[COND_END]]
481 // CHECK4: cond.end:
482 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
483 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
484 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
485 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
486 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
487 // CHECK4: omp.inner.for.cond:
488 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
489 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
490 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
491 // CHECK4-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
492 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
493 // CHECK4: omp.inner.for.body:
494 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
495 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
496 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
497 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
498 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
499 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
500 // CHECK4-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
501 // CHECK4-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
502 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
503 // CHECK4-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
504 // CHECK4-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
505 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
506 // CHECK4-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
507 // CHECK4-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
508 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
509 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
510 // CHECK4-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
511 // CHECK4-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
512 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
513 // CHECK4-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
514 // CHECK4-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
515 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
516 // CHECK4: omp.inner.for.inc:
517 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
518 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
519 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
520 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
521 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
522 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
523 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
524 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
525 // CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
526 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
527 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
528 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
529 // CHECK4-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
530 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
531 // CHECK4-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
532 // CHECK4-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
533 // CHECK4: cond.true10:
534 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
535 // CHECK4-NEXT: br label [[COND_END12:%.*]]
536 // CHECK4: cond.false11:
537 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
538 // CHECK4-NEXT: br label [[COND_END12]]
539 // CHECK4: cond.end12:
540 // CHECK4-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
541 // CHECK4-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
542 // CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
543 // CHECK4-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
544 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
545 // CHECK4: omp.inner.for.end:
546 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
547 // CHECK4: omp.loop.exit:
548 // CHECK4-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
549 // CHECK4-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
550 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
551 // CHECK4-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
552 // CHECK4-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
553 // CHECK4-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
554 // CHECK4: .omp.final.then:
555 // CHECK4-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
556 // CHECK4-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
557 // CHECK4-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
558 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
559 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
560 // CHECK4-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
561 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
562 // CHECK4: .omp.final.done:
563 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
564 // CHECK4: omp.precond.end:
565 // CHECK4-NEXT: ret void
566 // CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__3
567 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
568 // CHECK4-NEXT: entry:
569 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
570 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
571 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
572 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
573 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
574 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
575 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
576 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
577 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
578 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
579 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
580 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
581 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
582 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
583 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
584 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
585 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
586 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
587 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
588 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
589 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
590 // CHECK4-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
591 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
592 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
593 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
594 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
595 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
596 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
597 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
598 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
599 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4
600 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
601 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
602 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
603 // CHECK4: omp.precond.then:
604 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
605 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
606 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
607 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
608 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
609 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
610 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
611 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
612 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
613 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
614 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
615 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
616 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
617 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
618 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
619 // CHECK4: omp.inner.for.cond:
620 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
621 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
622 // CHECK4-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
623 // CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
624 // CHECK4: omp.inner.for.body:
625 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
626 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
627 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
628 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
629 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
630 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
631 // CHECK4-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
632 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
633 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
634 // CHECK4-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
635 // CHECK4-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
636 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
637 // CHECK4: omp.body.continue:
638 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
639 // CHECK4: omp.inner.for.inc:
640 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
641 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
642 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
643 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
644 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
645 // CHECK4: omp.inner.for.end:
646 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
647 // CHECK4: omp.loop.exit:
648 // CHECK4-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
649 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
650 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
651 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
652 // CHECK4-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
653 // CHECK4-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
654 // CHECK4: .omp.final.then:
655 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
656 // CHECK4-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
657 // CHECK4-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
658 // CHECK4-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
659 // CHECK4-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
660 // CHECK4-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
661 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
662 // CHECK4: .omp.final.done:
663 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
664 // CHECK4: omp.precond.end:
665 // CHECK4-NEXT: ret void
666 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
667 // CHECK4-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
668 // CHECK4-NEXT: entry:
669 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
670 // CHECK4-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
671 // CHECK4-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
672 // CHECK4-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
673 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
674 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
675 // CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
676 // CHECK4-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
677 // CHECK4-NEXT: br label [[DOTEXECUTE:%.*]]
678 // CHECK4: .execute:
679 // CHECK4-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
680 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
681 // CHECK4-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
682 // CHECK4-NEXT: br label [[DOTOMP_DEINIT:%.*]]
683 // CHECK4: .omp.deinit:
684 // CHECK4-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
685 // CHECK4-NEXT: br label [[DOTEXIT:%.*]]
686 // CHECK4: .exit:
687 // CHECK4-NEXT: ret void
688 // CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__4
689 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
690 // CHECK4-NEXT: entry:
691 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
692 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
693 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
694 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
695 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
696 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
697 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
698 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
699 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
700 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
701 // CHECK4-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
702 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
703 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
704 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
705 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
706 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
707 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
708 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
709 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
710 // CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
711 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
712 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
713 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
714 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
715 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
716 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
717 // CHECK4: cond.true:
718 // CHECK4-NEXT: br label [[COND_END:%.*]]
719 // CHECK4: cond.false:
720 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
721 // CHECK4-NEXT: br label [[COND_END]]
722 // CHECK4: cond.end:
723 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
724 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
725 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
726 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
727 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
728 // CHECK4: omp.inner.for.cond:
729 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
730 // CHECK4-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
731 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
732 // CHECK4: omp.inner.for.body:
733 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
734 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
735 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
736 // CHECK4-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
737 // CHECK4-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
738 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
739 // CHECK4-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
740 // CHECK4-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
741 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
742 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
743 // CHECK4-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
744 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
745 // CHECK4-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
746 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
747 // CHECK4: omp.inner.for.inc:
748 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
749 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
750 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
751 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
752 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
753 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
754 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
755 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
756 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
757 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
758 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
759 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
760 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
761 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
762 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
763 // CHECK4: cond.true5:
764 // CHECK4-NEXT: br label [[COND_END7:%.*]]
765 // CHECK4: cond.false6:
766 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
767 // CHECK4-NEXT: br label [[COND_END7]]
768 // CHECK4: cond.end7:
769 // CHECK4-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
770 // CHECK4-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
771 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
772 // CHECK4-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
773 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
774 // CHECK4: omp.inner.for.end:
775 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
776 // CHECK4: omp.loop.exit:
777 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
778 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
779 // CHECK4-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
780 // CHECK4-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
781 // CHECK4: .omp.final.then:
782 // CHECK4-NEXT: store i32 10, i32* [[I]], align 4
783 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
784 // CHECK4: .omp.final.done:
785 // CHECK4-NEXT: ret void
786 // CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__5
787 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
788 // CHECK4-NEXT: entry:
789 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
790 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
791 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
792 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
793 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
794 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
795 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
796 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
797 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
798 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
799 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
800 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
801 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
802 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
803 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
804 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
805 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
806 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
807 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
808 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
809 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
810 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
811 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
812 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
813 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
814 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
815 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
816 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
817 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
818 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
819 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
820 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
821 // CHECK4: omp.inner.for.cond:
822 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
823 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
824 // CHECK4-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
825 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
826 // CHECK4: omp.inner.for.body:
827 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
828 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
829 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
830 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
831 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
832 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
833 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
834 // CHECK4-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
835 // CHECK4-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
836 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
837 // CHECK4: omp.body.continue:
838 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
839 // CHECK4: omp.inner.for.inc:
840 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
841 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
842 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
843 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
844 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
845 // CHECK4: omp.inner.for.end:
846 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
847 // CHECK4: omp.loop.exit:
848 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
849 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
850 // CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
851 // CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
852 // CHECK4: .omp.final.then:
853 // CHECK4-NEXT: store i32 10, i32* [[I]], align 4
854 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
855 // CHECK4: .omp.final.done:
856 // CHECK4-NEXT: ret void
857 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
858 // CHECK4-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
859 // CHECK4-NEXT: entry:
860 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
861 // CHECK4-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
862 // CHECK4-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
863 // CHECK4-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
864 // CHECK4-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
865 // CHECK4-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
866 // CHECK4-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
867 // CHECK4-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
868 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
869 // CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
870 // CHECK4-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
871 // CHECK4-NEXT: br label [[DOTEXECUTE:%.*]]
872 // CHECK4: .execute:
873 // CHECK4-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
874 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
875 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
876 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
877 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
878 // CHECK4-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
879 // CHECK4-NEXT: br label [[DOTOMP_DEINIT:%.*]]
880 // CHECK4: .omp.deinit:
881 // CHECK4-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
882 // CHECK4-NEXT: br label [[DOTEXIT:%.*]]
883 // CHECK4: .exit:
884 // CHECK4-NEXT: ret void
885 // CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__6
886 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
887 // CHECK4-NEXT: entry:
888 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
889 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
890 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
891 // CHECK4-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
892 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
893 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
894 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
895 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
896 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
897 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
898 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
899 // CHECK4-NEXT: [[K:%.*]] = alloca i32, align 4
900 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
901 // CHECK4-NEXT: [[J:%.*]] = alloca i32, align 4
902 // CHECK4-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
903 // CHECK4-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
904 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
905 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
906 // CHECK4-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
907 // CHECK4-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
908 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
909 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
910 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
911 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
912 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
913 // CHECK4-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
914 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
915 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
916 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
917 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
918 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
919 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
920 // CHECK4: cond.true:
921 // CHECK4-NEXT: br label [[COND_END:%.*]]
922 // CHECK4: cond.false:
923 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
924 // CHECK4-NEXT: br label [[COND_END]]
925 // CHECK4: cond.end:
926 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
927 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
928 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
929 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
930 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
931 // CHECK4: omp.inner.for.cond:
932 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
933 // CHECK4-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
934 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
935 // CHECK4: omp.inner.for.body:
936 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
937 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
938 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
939 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
940 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
941 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
942 // CHECK4-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
943 // CHECK4-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
944 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
945 // CHECK4-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
946 // CHECK4-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
947 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
948 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
949 // CHECK4-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
950 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
951 // CHECK4-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
952 // CHECK4-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
953 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
954 // CHECK4-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
955 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
956 // CHECK4: omp.inner.for.inc:
957 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
958 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
959 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
960 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
961 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
962 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
963 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
964 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
965 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
966 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
967 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
968 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
969 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
970 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
971 // CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
972 // CHECK4: cond.true6:
973 // CHECK4-NEXT: br label [[COND_END8:%.*]]
974 // CHECK4: cond.false7:
975 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
976 // CHECK4-NEXT: br label [[COND_END8]]
977 // CHECK4: cond.end8:
978 // CHECK4-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
979 // CHECK4-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
980 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
981 // CHECK4-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
982 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
983 // CHECK4: omp.inner.for.end:
984 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
985 // CHECK4: omp.loop.exit:
986 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
987 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
988 // CHECK4-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
989 // CHECK4-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
990 // CHECK4: .omp.final.then:
991 // CHECK4-NEXT: store i32 10, i32* [[I]], align 4
992 // CHECK4-NEXT: store i32 10, i32* [[J]], align 4
993 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
994 // CHECK4: .omp.final.done:
995 // CHECK4-NEXT: ret void
996 // CHECK4-LABEL: define {{[^@]+}}@__omp_outlined__7
997 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
998 // CHECK4-NEXT: entry:
999 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1000 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1001 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1002 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1003 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
1004 // CHECK4-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
1005 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1006 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1007 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1008 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1009 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1010 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1011 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1012 // CHECK4-NEXT: [[K:%.*]] = alloca i32, align 4
1013 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1014 // CHECK4-NEXT: [[J:%.*]] = alloca i32, align 4
1015 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1016 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1017 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1018 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1019 // CHECK4-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
1020 // CHECK4-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
1021 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
1022 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1023 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1024 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1025 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1026 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1027 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1028 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1029 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1030 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1031 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1032 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1033 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1034 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1035 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1036 // CHECK4: omp.inner.for.cond:
1037 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1038 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1039 // CHECK4-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
1040 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1041 // CHECK4: omp.inner.for.body:
1042 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1043 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
1044 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1045 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1046 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1047 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1048 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1049 // CHECK4-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
1050 // CHECK4-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
1051 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
1052 // CHECK4-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
1053 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
1054 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
1055 // CHECK4-NEXT: store i32 10, i32* [[K]], align 4
1056 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1057 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
1058 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
1059 // CHECK4-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
1060 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
1061 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
1062 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
1063 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1064 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
1065 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
1066 // CHECK4-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
1067 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
1068 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1069 // CHECK4: omp.body.continue:
1070 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1071 // CHECK4: omp.inner.for.inc:
1072 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1073 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1074 // CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1075 // CHECK4-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
1076 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
1077 // CHECK4: omp.inner.for.end:
1078 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1079 // CHECK4: omp.loop.exit:
1080 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1081 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1082 // CHECK4-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
1083 // CHECK4-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1084 // CHECK4: .omp.final.then:
1085 // CHECK4-NEXT: store i32 10, i32* [[I]], align 4
1086 // CHECK4-NEXT: store i32 10, i32* [[J]], align 4
1087 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
1088 // CHECK4: .omp.final.done:
1089 // CHECK4-NEXT: ret void
1090 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
1091 // CHECK5-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
1092 // CHECK5-NEXT: entry:
1093 // CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1094 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1095 // CHECK5-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
1096 // CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1097 // CHECK5-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
1098 // CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1099 // CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1100 // CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
1101 // CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1102 // CHECK5-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1103 // CHECK5-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
1104 // CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1105 // CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
1106 // CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
1107 // CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
1108 // CHECK5: .execute:
1109 // CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
1110 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
1111 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
1112 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
1113 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
1114 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
1115 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
1116 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
1117 // CHECK5-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
1118 // CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
1119 // CHECK5: .omp.deinit:
1120 // CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
1121 // CHECK5-NEXT: br label [[DOTEXIT:%.*]]
1122 // CHECK5: .exit:
1123 // CHECK5-NEXT: ret void
1124 // CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__
1125 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
1126 // CHECK5-NEXT: entry:
1127 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1128 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1129 // CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1130 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1131 // CHECK5-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
1132 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1133 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1134 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1135 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1136 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1137 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1138 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1139 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1140 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1141 // CHECK5-NEXT: [[I4:%.*]] = alloca i32, align 4
1142 // CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1143 // CHECK5-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
1144 // CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
1145 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1146 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1147 // CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1148 // CHECK5-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1149 // CHECK5-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
1150 // CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1151 // CHECK5-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 4, i16 1)
1152 // CHECK5-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
1153 // CHECK5-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
1154 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
1155 // CHECK5-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1156 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1157 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
1158 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1159 // CHECK5-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
1160 // CHECK5-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1161 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4
1162 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1163 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
1164 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1165 // CHECK5: omp.precond.then:
1166 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1167 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1168 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
1169 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1170 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1171 // CHECK5-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1172 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1173 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
1174 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1175 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1176 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1177 // CHECK5-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1178 // CHECK5: cond.true:
1179 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1180 // CHECK5-NEXT: br label [[COND_END:%.*]]
1181 // CHECK5: cond.false:
1182 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1183 // CHECK5-NEXT: br label [[COND_END]]
1184 // CHECK5: cond.end:
1185 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1186 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1187 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1188 // CHECK5-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
1189 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1190 // CHECK5: omp.inner.for.cond:
1191 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1192 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1193 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
1194 // CHECK5-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
1195 // CHECK5-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1196 // CHECK5: omp.inner.for.body:
1197 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1198 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1199 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
1200 // CHECK5-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
1201 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
1202 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[L_ADDR]], align 4
1203 // CHECK5-NEXT: store i32 [[TMP20]], i32* [[L_CASTED]], align 4
1204 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[L_CASTED]], align 4
1205 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
1206 // CHECK5-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP16]] to i8*
1207 // CHECK5-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
1208 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
1209 // CHECK5-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
1210 // CHECK5-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
1211 // CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
1212 // CHECK5-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP19]] to i8*
1213 // CHECK5-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4
1214 // CHECK5-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
1215 // CHECK5-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
1216 // CHECK5-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4
1217 // CHECK5-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
1218 // CHECK5-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP21]] to i8*
1219 // CHECK5-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4
1220 // CHECK5-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1221 // CHECK5-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
1222 // CHECK5-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
1223 // CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i32 5)
1224 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1225 // CHECK5: omp.inner.for.inc:
1226 // CHECK5-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1227 // CHECK5-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1228 // CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
1229 // CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
1230 // CHECK5-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1231 // CHECK5-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1232 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
1233 // CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
1234 // CHECK5-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1235 // CHECK5-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1236 // CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
1237 // CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
1238 // CHECK5-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1239 // CHECK5-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1240 // CHECK5-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
1241 // CHECK5-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
1242 // CHECK5: cond.true11:
1243 // CHECK5-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1244 // CHECK5-NEXT: br label [[COND_END13:%.*]]
1245 // CHECK5: cond.false12:
1246 // CHECK5-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1247 // CHECK5-NEXT: br label [[COND_END13]]
1248 // CHECK5: cond.end13:
1249 // CHECK5-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE11]] ], [ [[TMP44]], [[COND_FALSE12]] ]
1250 // CHECK5-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
1251 // CHECK5-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1252 // CHECK5-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
1253 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1254 // CHECK5: omp.inner.for.end:
1255 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1256 // CHECK5: omp.loop.exit:
1257 // CHECK5-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1258 // CHECK5-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
1259 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]])
1260 // CHECK5-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1261 // CHECK5-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
1262 // CHECK5-NEXT: br i1 [[TMP49]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1263 // CHECK5: .omp.final.then:
1264 // CHECK5-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1265 // CHECK5-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP50]], 0
1266 // CHECK5-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
1267 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
1268 // CHECK5-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
1269 // CHECK5-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
1270 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
1271 // CHECK5: .omp.final.done:
1272 // CHECK5-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1273 // CHECK5-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
1274 // CHECK5-NEXT: br i1 [[TMP52]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1275 // CHECK5: .omp.lastprivate.then:
1276 // CHECK5-NEXT: [[TMP53:%.*]] = load i32, i32* [[L_ADDR]], align 4
1277 // CHECK5-NEXT: store i32 [[TMP53]], i32* [[L_ADDR]], align 4
1278 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1279 // CHECK5: .omp.lastprivate.done:
1280 // CHECK5-NEXT: br label [[OMP_PRECOND_END]]
1281 // CHECK5: omp.precond.end:
1282 // CHECK5-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
1283 // CHECK5-NEXT: ret void
1284 // CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__1
1285 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
1286 // CHECK5-NEXT: entry:
1287 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1288 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1289 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1290 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1291 // CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1292 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1293 // CHECK5-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
1294 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1295 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1296 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1297 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1298 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1299 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1300 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1301 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1302 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1303 // CHECK5-NEXT: [[I3:%.*]] = alloca i32, align 4
1304 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1305 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1306 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1307 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1308 // CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1309 // CHECK5-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1310 // CHECK5-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
1311 // CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1312 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1313 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1314 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1315 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1316 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1317 // CHECK5-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1318 // CHECK5-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1319 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4
1320 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1321 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1322 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1323 // CHECK5: omp.precond.then:
1324 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1325 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1326 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
1327 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1328 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1329 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
1330 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
1331 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1332 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1333 // CHECK5-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1334 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1335 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
1336 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1337 // CHECK5: omp.dispatch.cond:
1338 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1339 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1340 // CHECK5-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
1341 // CHECK5-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1342 // CHECK5: cond.true:
1343 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1344 // CHECK5-NEXT: br label [[COND_END:%.*]]
1345 // CHECK5: cond.false:
1346 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1347 // CHECK5-NEXT: br label [[COND_END]]
1348 // CHECK5: cond.end:
1349 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1350 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1351 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1352 // CHECK5-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
1353 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1354 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1355 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1356 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1357 // CHECK5: omp.dispatch.body:
1358 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1359 // CHECK5: omp.inner.for.cond:
1360 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1361 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1362 // CHECK5-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
1363 // CHECK5-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1364 // CHECK5: omp.inner.for.body:
1365 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1366 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
1367 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1368 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
1369 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
1370 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
1371 // CHECK5-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
1372 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
1373 // CHECK5-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
1374 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1375 // CHECK5: omp.body.continue:
1376 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1377 // CHECK5: omp.inner.for.inc:
1378 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1379 // CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
1380 // CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
1381 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1382 // CHECK5: omp.inner.for.end:
1383 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1384 // CHECK5: omp.dispatch.inc:
1385 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1386 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1387 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
1388 // CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
1389 // CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1390 // CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1391 // CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
1392 // CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
1393 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
1394 // CHECK5: omp.dispatch.end:
1395 // CHECK5-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1396 // CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
1397 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
1398 // CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1399 // CHECK5-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1400 // CHECK5-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1401 // CHECK5: .omp.final.then:
1402 // CHECK5-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1403 // CHECK5-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
1404 // CHECK5-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
1405 // CHECK5-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
1406 // CHECK5-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
1407 // CHECK5-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
1408 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
1409 // CHECK5: .omp.final.done:
1410 // CHECK5-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1411 // CHECK5-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
1412 // CHECK5-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1413 // CHECK5: .omp.lastprivate.then:
1414 // CHECK5-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
1415 // CHECK5-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
1416 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1417 // CHECK5: .omp.lastprivate.done:
1418 // CHECK5-NEXT: br label [[OMP_PRECOND_END]]
1419 // CHECK5: omp.precond.end:
1420 // CHECK5-NEXT: ret void
1421 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
1422 // CHECK5-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
1423 // CHECK5-NEXT: entry:
1424 // CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1425 // CHECK5-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
1426 // CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1427 // CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1428 // CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1429 // CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
1430 // CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1431 // CHECK5-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
1432 // CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
1433 // CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
1434 // CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
1435 // CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
1436 // CHECK5: .execute:
1437 // CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
1438 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
1439 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
1440 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
1441 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
1442 // CHECK5-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
1443 // CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
1444 // CHECK5: .omp.deinit:
1445 // CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
1446 // CHECK5-NEXT: br label [[DOTEXIT:%.*]]
1447 // CHECK5: .exit:
1448 // CHECK5-NEXT: ret void
1449 // CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__2
1450 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
1451 // CHECK5-NEXT: entry:
1452 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1453 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1454 // CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1455 // CHECK5-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
1456 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1457 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1458 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1459 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1460 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1461 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1462 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1463 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1464 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1465 // CHECK5-NEXT: [[I3:%.*]] = alloca i32, align 4
1466 // CHECK5-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1467 // CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
1468 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1469 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1470 // CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1471 // CHECK5-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
1472 // CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
1473 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1474 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1475 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1476 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1477 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1478 // CHECK5-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1479 // CHECK5-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1480 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4
1481 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1482 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1483 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1484 // CHECK5: omp.precond.then:
1485 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1486 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1487 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
1488 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1489 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1490 // CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
1491 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1492 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1493 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
1494 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1495 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1496 // CHECK5-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1497 // CHECK5-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1498 // CHECK5: cond.true:
1499 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1500 // CHECK5-NEXT: br label [[COND_END:%.*]]
1501 // CHECK5: cond.false:
1502 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1503 // CHECK5-NEXT: br label [[COND_END]]
1504 // CHECK5: cond.end:
1505 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1506 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1507 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1508 // CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1509 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1510 // CHECK5: omp.inner.for.cond:
1511 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1512 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1513 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
1514 // CHECK5-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
1515 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1516 // CHECK5: omp.inner.for.body:
1517 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1518 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1519 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
1520 // CHECK5-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
1521 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
1522 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
1523 // CHECK5-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
1524 // CHECK5-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
1525 // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
1526 // CHECK5-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
1527 // CHECK5-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
1528 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
1529 // CHECK5-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
1530 // CHECK5-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
1531 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
1532 // CHECK5-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
1533 // CHECK5-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
1534 // CHECK5-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1535 // CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
1536 // CHECK5-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
1537 // CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
1538 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1539 // CHECK5: omp.inner.for.inc:
1540 // CHECK5-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1541 // CHECK5-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1542 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
1543 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1544 // CHECK5-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1545 // CHECK5-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1546 // CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
1547 // CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
1548 // CHECK5-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1549 // CHECK5-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1550 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
1551 // CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
1552 // CHECK5-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1553 // CHECK5-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1554 // CHECK5-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
1555 // CHECK5-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
1556 // CHECK5: cond.true10:
1557 // CHECK5-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1558 // CHECK5-NEXT: br label [[COND_END12:%.*]]
1559 // CHECK5: cond.false11:
1560 // CHECK5-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1561 // CHECK5-NEXT: br label [[COND_END12]]
1562 // CHECK5: cond.end12:
1563 // CHECK5-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
1564 // CHECK5-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
1565 // CHECK5-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1566 // CHECK5-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
1567 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
1568 // CHECK5: omp.inner.for.end:
1569 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1570 // CHECK5: omp.loop.exit:
1571 // CHECK5-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1572 // CHECK5-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
1573 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
1574 // CHECK5-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1575 // CHECK5-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
1576 // CHECK5-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1577 // CHECK5: .omp.final.then:
1578 // CHECK5-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1579 // CHECK5-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
1580 // CHECK5-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
1581 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
1582 // CHECK5-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
1583 // CHECK5-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
1584 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
1585 // CHECK5: .omp.final.done:
1586 // CHECK5-NEXT: br label [[OMP_PRECOND_END]]
1587 // CHECK5: omp.precond.end:
1588 // CHECK5-NEXT: ret void
1589 // CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__3
1590 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
1591 // CHECK5-NEXT: entry:
1592 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1593 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1594 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1595 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1596 // CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1597 // CHECK5-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
1598 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1599 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1600 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1601 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1602 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1603 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1604 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1605 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1606 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1607 // CHECK5-NEXT: [[I3:%.*]] = alloca i32, align 4
1608 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1609 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1610 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1611 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1612 // CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1613 // CHECK5-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
1614 // CHECK5-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
1615 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1616 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1617 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1618 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1619 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1620 // CHECK5-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1621 // CHECK5-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1622 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4
1623 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1624 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1625 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1626 // CHECK5: omp.precond.then:
1627 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1628 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1629 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
1630 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1631 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1632 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
1633 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
1634 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1635 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1636 // CHECK5-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1637 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1638 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1639 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1640 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
1641 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1642 // CHECK5: omp.inner.for.cond:
1643 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1644 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1645 // CHECK5-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
1646 // CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1647 // CHECK5: omp.inner.for.body:
1648 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1649 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
1650 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1651 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
1652 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
1653 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
1654 // CHECK5-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
1655 // CHECK5-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
1656 // CHECK5-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
1657 // CHECK5-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
1658 // CHECK5-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
1659 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1660 // CHECK5: omp.body.continue:
1661 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1662 // CHECK5: omp.inner.for.inc:
1663 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1664 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1665 // CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
1666 // CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
1667 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1668 // CHECK5: omp.inner.for.end:
1669 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1670 // CHECK5: omp.loop.exit:
1671 // CHECK5-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1672 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
1673 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
1674 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1675 // CHECK5-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
1676 // CHECK5-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1677 // CHECK5: .omp.final.then:
1678 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1679 // CHECK5-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
1680 // CHECK5-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
1681 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
1682 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
1683 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
1684 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
1685 // CHECK5: .omp.final.done:
1686 // CHECK5-NEXT: br label [[OMP_PRECOND_END]]
1687 // CHECK5: omp.precond.end:
1688 // CHECK5-NEXT: ret void
1689 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
1690 // CHECK5-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
1691 // CHECK5-NEXT: entry:
1692 // CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
1693 // CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1694 // CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1695 // CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
1696 // CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
1697 // CHECK5-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
1698 // CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
1699 // CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
1700 // CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
1701 // CHECK5: .execute:
1702 // CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
1703 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
1704 // CHECK5-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
1705 // CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
1706 // CHECK5: .omp.deinit:
1707 // CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
1708 // CHECK5-NEXT: br label [[DOTEXIT:%.*]]
1709 // CHECK5: .exit:
1710 // CHECK5-NEXT: ret void
1711 // CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__4
1712 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
1713 // CHECK5-NEXT: entry:
1714 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1715 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1716 // CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
1717 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1718 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1719 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1720 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1721 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1722 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1723 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1724 // CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
1725 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1726 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1727 // CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
1728 // CHECK5-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
1729 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1730 // CHECK5-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
1731 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1732 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1733 // CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
1734 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1735 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1736 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
1737 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1738 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
1739 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1740 // CHECK5: cond.true:
1741 // CHECK5-NEXT: br label [[COND_END:%.*]]
1742 // CHECK5: cond.false:
1743 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1744 // CHECK5-NEXT: br label [[COND_END]]
1745 // CHECK5: cond.end:
1746 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1747 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1748 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1749 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1750 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1751 // CHECK5: omp.inner.for.cond:
1752 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1753 // CHECK5-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
1754 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1755 // CHECK5: omp.inner.for.body:
1756 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1757 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1758 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
1759 // CHECK5-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
1760 // CHECK5-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
1761 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
1762 // CHECK5-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
1763 // CHECK5-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
1764 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
1765 // CHECK5-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
1766 // CHECK5-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
1767 // CHECK5-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
1768 // CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
1769 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1770 // CHECK5: omp.inner.for.inc:
1771 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1772 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1773 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1774 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1775 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1776 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1777 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1778 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
1779 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1780 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1781 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1782 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
1783 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1784 // CHECK5-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
1785 // CHECK5-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
1786 // CHECK5: cond.true5:
1787 // CHECK5-NEXT: br label [[COND_END7:%.*]]
1788 // CHECK5: cond.false6:
1789 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1790 // CHECK5-NEXT: br label [[COND_END7]]
1791 // CHECK5: cond.end7:
1792 // CHECK5-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
1793 // CHECK5-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
1794 // CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1795 // CHECK5-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
1796 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
1797 // CHECK5: omp.inner.for.end:
1798 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1799 // CHECK5: omp.loop.exit:
1800 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1801 // CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1802 // CHECK5-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1803 // CHECK5-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1804 // CHECK5: .omp.final.then:
1805 // CHECK5-NEXT: store i32 10, i32* [[I]], align 4
1806 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
1807 // CHECK5: .omp.final.done:
1808 // CHECK5-NEXT: ret void
1809 // CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__5
1810 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
1811 // CHECK5-NEXT: entry:
1812 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1813 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1814 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1815 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1816 // CHECK5-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
1817 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1818 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1819 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1820 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1821 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1822 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1823 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1824 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1825 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1826 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1827 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1828 // CHECK5-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
1829 // CHECK5-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
1830 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1831 // CHECK5-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
1832 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1833 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1834 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1835 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1836 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1837 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1838 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1839 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1840 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1841 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1842 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1843 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1844 // CHECK5: omp.inner.for.cond:
1845 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1846 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1847 // CHECK5-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
1848 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1849 // CHECK5: omp.inner.for.body:
1850 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1851 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1852 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1853 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1854 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1855 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
1856 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1857 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
1858 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
1859 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1860 // CHECK5: omp.body.continue:
1861 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1862 // CHECK5: omp.inner.for.inc:
1863 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1864 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1865 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1866 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1867 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
1868 // CHECK5: omp.inner.for.end:
1869 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1870 // CHECK5: omp.loop.exit:
1871 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1872 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1873 // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1874 // CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1875 // CHECK5: .omp.final.then:
1876 // CHECK5-NEXT: store i32 10, i32* [[I]], align 4
1877 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
1878 // CHECK5: .omp.final.done:
1879 // CHECK5-NEXT: ret void
1880 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
1881 // CHECK5-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
1882 // CHECK5-NEXT: entry:
1883 // CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
1884 // CHECK5-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
1885 // CHECK5-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
1886 // CHECK5-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1887 // CHECK5-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1888 // CHECK5-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
1889 // CHECK5-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
1890 // CHECK5-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
1891 // CHECK5-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
1892 // CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
1893 // CHECK5-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
1894 // CHECK5-NEXT: br label [[DOTEXECUTE:%.*]]
1895 // CHECK5: .execute:
1896 // CHECK5-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
1897 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
1898 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
1899 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
1900 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
1901 // CHECK5-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
1902 // CHECK5-NEXT: br label [[DOTOMP_DEINIT:%.*]]
1903 // CHECK5: .omp.deinit:
1904 // CHECK5-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
1905 // CHECK5-NEXT: br label [[DOTEXIT:%.*]]
1906 // CHECK5: .exit:
1907 // CHECK5-NEXT: ret void
1908 // CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__6
1909 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
1910 // CHECK5-NEXT: entry:
1911 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1912 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1913 // CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
1914 // CHECK5-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
1915 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1916 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1917 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1918 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1919 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1920 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1921 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1922 // CHECK5-NEXT: [[K:%.*]] = alloca i32, align 4
1923 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1924 // CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4
1925 // CHECK5-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
1926 // CHECK5-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
1927 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1928 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1929 // CHECK5-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
1930 // CHECK5-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
1931 // CHECK5-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
1932 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1933 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1934 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1935 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1936 // CHECK5-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
1937 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1938 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1939 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
1940 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1941 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
1942 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1943 // CHECK5: cond.true:
1944 // CHECK5-NEXT: br label [[COND_END:%.*]]
1945 // CHECK5: cond.false:
1946 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1947 // CHECK5-NEXT: br label [[COND_END]]
1948 // CHECK5: cond.end:
1949 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1950 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1951 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1952 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1953 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1954 // CHECK5: omp.inner.for.cond:
1955 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1956 // CHECK5-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
1957 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1958 // CHECK5: omp.inner.for.body:
1959 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1960 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1961 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
1962 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
1963 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
1964 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
1965 // CHECK5-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
1966 // CHECK5-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
1967 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
1968 // CHECK5-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
1969 // CHECK5-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
1970 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
1971 // CHECK5-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
1972 // CHECK5-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
1973 // CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
1974 // CHECK5-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
1975 // CHECK5-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
1976 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
1977 // CHECK5-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
1978 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1979 // CHECK5: omp.inner.for.inc:
1980 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1981 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1982 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1983 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1984 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1985 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1986 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
1987 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
1988 // CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1989 // CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1990 // CHECK5-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
1991 // CHECK5-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
1992 // CHECK5-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1993 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
1994 // CHECK5-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
1995 // CHECK5: cond.true6:
1996 // CHECK5-NEXT: br label [[COND_END8:%.*]]
1997 // CHECK5: cond.false7:
1998 // CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1999 // CHECK5-NEXT: br label [[COND_END8]]
2000 // CHECK5: cond.end8:
2001 // CHECK5-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
2002 // CHECK5-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
2003 // CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2004 // CHECK5-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
2005 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
2006 // CHECK5: omp.inner.for.end:
2007 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2008 // CHECK5: omp.loop.exit:
2009 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2010 // CHECK5-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2011 // CHECK5-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
2012 // CHECK5-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2013 // CHECK5: .omp.final.then:
2014 // CHECK5-NEXT: store i32 10, i32* [[I]], align 4
2015 // CHECK5-NEXT: store i32 10, i32* [[J]], align 4
2016 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2017 // CHECK5: .omp.final.done:
2018 // CHECK5-NEXT: ret void
2019 // CHECK5-LABEL: define {{[^@]+}}@__omp_outlined__7
2020 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
2021 // CHECK5-NEXT: entry:
2022 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2023 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2024 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2025 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2026 // CHECK5-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
2027 // CHECK5-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
2028 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2029 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2030 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2031 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2032 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2033 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2034 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2035 // CHECK5-NEXT: [[K:%.*]] = alloca i32, align 4
2036 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2037 // CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4
2038 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2039 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2040 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2041 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2042 // CHECK5-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
2043 // CHECK5-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
2044 // CHECK5-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
2045 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2046 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2047 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2048 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2049 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2050 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2051 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2052 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2053 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2054 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2055 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2056 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2057 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2058 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2059 // CHECK5: omp.inner.for.cond:
2060 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2061 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2062 // CHECK5-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
2063 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2064 // CHECK5: omp.inner.for.body:
2065 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2066 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
2067 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
2068 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2069 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2070 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2071 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2072 // CHECK5-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
2073 // CHECK5-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
2074 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
2075 // CHECK5-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
2076 // CHECK5-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
2077 // CHECK5-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
2078 // CHECK5-NEXT: store i32 10, i32* [[K]], align 4
2079 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2080 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
2081 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
2082 // CHECK5-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
2083 // CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
2084 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
2085 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
2086 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
2087 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
2088 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
2089 // CHECK5-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
2090 // CHECK5-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
2091 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2092 // CHECK5: omp.body.continue:
2093 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2094 // CHECK5: omp.inner.for.inc:
2095 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2096 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2097 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2098 // CHECK5-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
2099 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
2100 // CHECK5: omp.inner.for.end:
2101 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2102 // CHECK5: omp.loop.exit:
2103 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2104 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2105 // CHECK5-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
2106 // CHECK5-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2107 // CHECK5: .omp.final.then:
2108 // CHECK5-NEXT: store i32 10, i32* [[I]], align 4
2109 // CHECK5-NEXT: store i32 10, i32* [[J]], align 4
2110 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2111 // CHECK5: .omp.final.done:
2112 // CHECK5-NEXT: ret void
2113 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
2114 // CHECK6-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
2115 // CHECK6-NEXT: entry:
2116 // CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2117 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2118 // CHECK6-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
2119 // CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2120 // CHECK6-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
2121 // CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2122 // CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2123 // CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
2124 // CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2125 // CHECK6-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2126 // CHECK6-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
2127 // CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2128 // CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
2129 // CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
2130 // CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
2131 // CHECK6: .execute:
2132 // CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
2133 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2134 // CHECK6-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
2135 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
2136 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
2137 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
2138 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
2139 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
2140 // CHECK6-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
2141 // CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
2142 // CHECK6: .omp.deinit:
2143 // CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
2144 // CHECK6-NEXT: br label [[DOTEXIT:%.*]]
2145 // CHECK6: .exit:
2146 // CHECK6-NEXT: ret void
2147 // CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__
2148 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
2149 // CHECK6-NEXT: entry:
2150 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2151 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2152 // CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2153 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2154 // CHECK6-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
2155 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2156 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
2157 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2158 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2159 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
2160 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2161 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2162 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2163 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2164 // CHECK6-NEXT: [[I4:%.*]] = alloca i32, align 4
2165 // CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2166 // CHECK6-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
2167 // CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
2168 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2169 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2170 // CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2171 // CHECK6-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2172 // CHECK6-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
2173 // CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2174 // CHECK6-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 4, i16 1)
2175 // CHECK6-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
2176 // CHECK6-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
2177 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
2178 // CHECK6-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
2179 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2180 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2181 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2182 // CHECK6-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
2183 // CHECK6-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2184 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4
2185 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2186 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2187 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2188 // CHECK6: omp.precond.then:
2189 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2190 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2191 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
2192 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2193 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2194 // CHECK6-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2195 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2196 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
2197 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2198 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2199 // CHECK6-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2200 // CHECK6-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2201 // CHECK6: cond.true:
2202 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2203 // CHECK6-NEXT: br label [[COND_END:%.*]]
2204 // CHECK6: cond.false:
2205 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2206 // CHECK6-NEXT: br label [[COND_END]]
2207 // CHECK6: cond.end:
2208 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2209 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2210 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2211 // CHECK6-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2212 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2213 // CHECK6: omp.inner.for.cond:
2214 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2215 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2216 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
2217 // CHECK6-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
2218 // CHECK6-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2219 // CHECK6: omp.inner.for.body:
2220 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2221 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2222 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
2223 // CHECK6-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
2224 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
2225 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[L_ADDR]], align 4
2226 // CHECK6-NEXT: store i32 [[TMP20]], i32* [[L_CASTED]], align 4
2227 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[L_CASTED]], align 4
2228 // CHECK6-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
2229 // CHECK6-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP16]] to i8*
2230 // CHECK6-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
2231 // CHECK6-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
2232 // CHECK6-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
2233 // CHECK6-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
2234 // CHECK6-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
2235 // CHECK6-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP19]] to i8*
2236 // CHECK6-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4
2237 // CHECK6-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
2238 // CHECK6-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
2239 // CHECK6-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4
2240 // CHECK6-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
2241 // CHECK6-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP21]] to i8*
2242 // CHECK6-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4
2243 // CHECK6-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2244 // CHECK6-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
2245 // CHECK6-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
2246 // CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i32 5)
2247 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2248 // CHECK6: omp.inner.for.inc:
2249 // CHECK6-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2250 // CHECK6-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2251 // CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
2252 // CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
2253 // CHECK6-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2254 // CHECK6-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2255 // CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
2256 // CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
2257 // CHECK6-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2258 // CHECK6-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2259 // CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
2260 // CHECK6-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
2261 // CHECK6-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2262 // CHECK6-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2263 // CHECK6-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
2264 // CHECK6-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
2265 // CHECK6: cond.true11:
2266 // CHECK6-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2267 // CHECK6-NEXT: br label [[COND_END13:%.*]]
2268 // CHECK6: cond.false12:
2269 // CHECK6-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2270 // CHECK6-NEXT: br label [[COND_END13]]
2271 // CHECK6: cond.end13:
2272 // CHECK6-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE11]] ], [ [[TMP44]], [[COND_FALSE12]] ]
2273 // CHECK6-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
2274 // CHECK6-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2275 // CHECK6-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
2276 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
2277 // CHECK6: omp.inner.for.end:
2278 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2279 // CHECK6: omp.loop.exit:
2280 // CHECK6-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2281 // CHECK6-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
2282 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]])
2283 // CHECK6-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2284 // CHECK6-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
2285 // CHECK6-NEXT: br i1 [[TMP49]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2286 // CHECK6: .omp.final.then:
2287 // CHECK6-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2288 // CHECK6-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP50]], 0
2289 // CHECK6-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
2290 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
2291 // CHECK6-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
2292 // CHECK6-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
2293 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
2294 // CHECK6: .omp.final.done:
2295 // CHECK6-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2296 // CHECK6-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
2297 // CHECK6-NEXT: br i1 [[TMP52]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2298 // CHECK6: .omp.lastprivate.then:
2299 // CHECK6-NEXT: [[TMP53:%.*]] = load i32, i32* [[L_ADDR]], align 4
2300 // CHECK6-NEXT: store i32 [[TMP53]], i32* [[L_ADDR]], align 4
2301 // CHECK6-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2302 // CHECK6: .omp.lastprivate.done:
2303 // CHECK6-NEXT: br label [[OMP_PRECOND_END]]
2304 // CHECK6: omp.precond.end:
2305 // CHECK6-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
2306 // CHECK6-NEXT: ret void
2307 // CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__1
2308 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
2309 // CHECK6-NEXT: entry:
2310 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2311 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2312 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2313 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2314 // CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2315 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2316 // CHECK6-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
2317 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2318 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
2319 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2320 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2321 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
2322 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2323 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2324 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2325 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2326 // CHECK6-NEXT: [[I3:%.*]] = alloca i32, align 4
2327 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2328 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2329 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2330 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2331 // CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2332 // CHECK6-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2333 // CHECK6-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
2334 // CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2335 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2336 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2337 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2338 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2339 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2340 // CHECK6-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2341 // CHECK6-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2342 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4
2343 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2344 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2345 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2346 // CHECK6: omp.precond.then:
2347 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2348 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2349 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
2350 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2351 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2352 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
2353 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2354 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2355 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2356 // CHECK6-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2357 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2358 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
2359 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2360 // CHECK6: omp.dispatch.cond:
2361 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2362 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2363 // CHECK6-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
2364 // CHECK6-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2365 // CHECK6: cond.true:
2366 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2367 // CHECK6-NEXT: br label [[COND_END:%.*]]
2368 // CHECK6: cond.false:
2369 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2370 // CHECK6-NEXT: br label [[COND_END]]
2371 // CHECK6: cond.end:
2372 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2373 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2374 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2375 // CHECK6-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2376 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2377 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2378 // CHECK6-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2379 // CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2380 // CHECK6: omp.dispatch.body:
2381 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2382 // CHECK6: omp.inner.for.cond:
2383 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2384 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2385 // CHECK6-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
2386 // CHECK6-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2387 // CHECK6: omp.inner.for.body:
2388 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2389 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
2390 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2391 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
2392 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
2393 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
2394 // CHECK6-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
2395 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
2396 // CHECK6-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
2397 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2398 // CHECK6: omp.body.continue:
2399 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2400 // CHECK6: omp.inner.for.inc:
2401 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2402 // CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
2403 // CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
2404 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
2405 // CHECK6: omp.inner.for.end:
2406 // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2407 // CHECK6: omp.dispatch.inc:
2408 // CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2409 // CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2410 // CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
2411 // CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
2412 // CHECK6-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2413 // CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2414 // CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
2415 // CHECK6-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
2416 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]]
2417 // CHECK6: omp.dispatch.end:
2418 // CHECK6-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2419 // CHECK6-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
2420 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
2421 // CHECK6-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2422 // CHECK6-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
2423 // CHECK6-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2424 // CHECK6: .omp.final.then:
2425 // CHECK6-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2426 // CHECK6-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
2427 // CHECK6-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
2428 // CHECK6-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
2429 // CHECK6-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
2430 // CHECK6-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
2431 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
2432 // CHECK6: .omp.final.done:
2433 // CHECK6-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2434 // CHECK6-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
2435 // CHECK6-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2436 // CHECK6: .omp.lastprivate.then:
2437 // CHECK6-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
2438 // CHECK6-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
2439 // CHECK6-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2440 // CHECK6: .omp.lastprivate.done:
2441 // CHECK6-NEXT: br label [[OMP_PRECOND_END]]
2442 // CHECK6: omp.precond.end:
2443 // CHECK6-NEXT: ret void
2444 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
2445 // CHECK6-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
2446 // CHECK6-NEXT: entry:
2447 // CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2448 // CHECK6-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
2449 // CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2450 // CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2451 // CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2452 // CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
2453 // CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2454 // CHECK6-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
2455 // CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
2456 // CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
2457 // CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
2458 // CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
2459 // CHECK6: .execute:
2460 // CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
2461 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2462 // CHECK6-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
2463 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
2464 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
2465 // CHECK6-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
2466 // CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
2467 // CHECK6: .omp.deinit:
2468 // CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
2469 // CHECK6-NEXT: br label [[DOTEXIT:%.*]]
2470 // CHECK6: .exit:
2471 // CHECK6-NEXT: ret void
2472 // CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__2
2473 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
2474 // CHECK6-NEXT: entry:
2475 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2476 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2477 // CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2478 // CHECK6-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
2479 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2480 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
2481 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2482 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2483 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
2484 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2485 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2486 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2487 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2488 // CHECK6-NEXT: [[I3:%.*]] = alloca i32, align 4
2489 // CHECK6-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2490 // CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
2491 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2492 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2493 // CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2494 // CHECK6-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
2495 // CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
2496 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2497 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2498 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2499 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2500 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2501 // CHECK6-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2502 // CHECK6-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2503 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4
2504 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2505 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2506 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2507 // CHECK6: omp.precond.then:
2508 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2509 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2510 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
2511 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2512 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2513 // CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
2514 // CHECK6-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2515 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2516 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2517 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2518 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2519 // CHECK6-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2520 // CHECK6-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2521 // CHECK6: cond.true:
2522 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2523 // CHECK6-NEXT: br label [[COND_END:%.*]]
2524 // CHECK6: cond.false:
2525 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2526 // CHECK6-NEXT: br label [[COND_END]]
2527 // CHECK6: cond.end:
2528 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2529 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2530 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2531 // CHECK6-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
2532 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2533 // CHECK6: omp.inner.for.cond:
2534 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2535 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2536 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
2537 // CHECK6-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
2538 // CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2539 // CHECK6: omp.inner.for.body:
2540 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2541 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2542 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
2543 // CHECK6-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
2544 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
2545 // CHECK6-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
2546 // CHECK6-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
2547 // CHECK6-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
2548 // CHECK6-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
2549 // CHECK6-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
2550 // CHECK6-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
2551 // CHECK6-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
2552 // CHECK6-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
2553 // CHECK6-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
2554 // CHECK6-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
2555 // CHECK6-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
2556 // CHECK6-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
2557 // CHECK6-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2558 // CHECK6-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
2559 // CHECK6-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
2560 // CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
2561 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2562 // CHECK6: omp.inner.for.inc:
2563 // CHECK6-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2564 // CHECK6-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2565 // CHECK6-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
2566 // CHECK6-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
2567 // CHECK6-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2568 // CHECK6-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2569 // CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
2570 // CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
2571 // CHECK6-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2572 // CHECK6-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2573 // CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
2574 // CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
2575 // CHECK6-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2576 // CHECK6-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2577 // CHECK6-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
2578 // CHECK6-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
2579 // CHECK6: cond.true10:
2580 // CHECK6-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2581 // CHECK6-NEXT: br label [[COND_END12:%.*]]
2582 // CHECK6: cond.false11:
2583 // CHECK6-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2584 // CHECK6-NEXT: br label [[COND_END12]]
2585 // CHECK6: cond.end12:
2586 // CHECK6-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
2587 // CHECK6-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
2588 // CHECK6-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2589 // CHECK6-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
2590 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2591 // CHECK6: omp.inner.for.end:
2592 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2593 // CHECK6: omp.loop.exit:
2594 // CHECK6-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2595 // CHECK6-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
2596 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
2597 // CHECK6-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2598 // CHECK6-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
2599 // CHECK6-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2600 // CHECK6: .omp.final.then:
2601 // CHECK6-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2602 // CHECK6-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
2603 // CHECK6-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
2604 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
2605 // CHECK6-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
2606 // CHECK6-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
2607 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
2608 // CHECK6: .omp.final.done:
2609 // CHECK6-NEXT: br label [[OMP_PRECOND_END]]
2610 // CHECK6: omp.precond.end:
2611 // CHECK6-NEXT: ret void
2612 // CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__3
2613 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
2614 // CHECK6-NEXT: entry:
2615 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2616 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2617 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2618 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2619 // CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2620 // CHECK6-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
2621 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2622 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
2623 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2624 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2625 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
2626 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2627 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2628 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2629 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2630 // CHECK6-NEXT: [[I3:%.*]] = alloca i32, align 4
2631 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2632 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2633 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2634 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2635 // CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2636 // CHECK6-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
2637 // CHECK6-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
2638 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2639 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2640 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2641 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2642 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2643 // CHECK6-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2644 // CHECK6-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2645 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4
2646 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2647 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2648 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2649 // CHECK6: omp.precond.then:
2650 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2651 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2652 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
2653 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2654 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2655 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
2656 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2657 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2658 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2659 // CHECK6-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2660 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2661 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2662 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2663 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
2664 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2665 // CHECK6: omp.inner.for.cond:
2666 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2667 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2668 // CHECK6-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
2669 // CHECK6-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2670 // CHECK6: omp.inner.for.body:
2671 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2672 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
2673 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2674 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
2675 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
2676 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
2677 // CHECK6-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
2678 // CHECK6-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
2679 // CHECK6-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
2680 // CHECK6-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
2681 // CHECK6-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
2682 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2683 // CHECK6: omp.body.continue:
2684 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2685 // CHECK6: omp.inner.for.inc:
2686 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2687 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2688 // CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
2689 // CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
2690 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
2691 // CHECK6: omp.inner.for.end:
2692 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2693 // CHECK6: omp.loop.exit:
2694 // CHECK6-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2695 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
2696 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
2697 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2698 // CHECK6-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
2699 // CHECK6-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2700 // CHECK6: .omp.final.then:
2701 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2702 // CHECK6-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
2703 // CHECK6-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
2704 // CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
2705 // CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
2706 // CHECK6-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
2707 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
2708 // CHECK6: .omp.final.done:
2709 // CHECK6-NEXT: br label [[OMP_PRECOND_END]]
2710 // CHECK6: omp.precond.end:
2711 // CHECK6-NEXT: ret void
2712 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
2713 // CHECK6-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
2714 // CHECK6-NEXT: entry:
2715 // CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
2716 // CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2717 // CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2718 // CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
2719 // CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
2720 // CHECK6-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
2721 // CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
2722 // CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
2723 // CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
2724 // CHECK6: .execute:
2725 // CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
2726 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
2727 // CHECK6-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
2728 // CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
2729 // CHECK6: .omp.deinit:
2730 // CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
2731 // CHECK6-NEXT: br label [[DOTEXIT:%.*]]
2732 // CHECK6: .exit:
2733 // CHECK6-NEXT: ret void
2734 // CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__4
2735 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
2736 // CHECK6-NEXT: entry:
2737 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2738 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2739 // CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
2740 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2741 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
2742 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2743 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2744 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2745 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2746 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
2747 // CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
2748 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2749 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2750 // CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
2751 // CHECK6-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
2752 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2753 // CHECK6-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
2754 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2755 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2756 // CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
2757 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2758 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2759 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2760 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2761 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2762 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2763 // CHECK6: cond.true:
2764 // CHECK6-NEXT: br label [[COND_END:%.*]]
2765 // CHECK6: cond.false:
2766 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2767 // CHECK6-NEXT: br label [[COND_END]]
2768 // CHECK6: cond.end:
2769 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2770 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2771 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2772 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2773 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2774 // CHECK6: omp.inner.for.cond:
2775 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2776 // CHECK6-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
2777 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2778 // CHECK6: omp.inner.for.body:
2779 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2780 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2781 // CHECK6-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
2782 // CHECK6-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
2783 // CHECK6-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
2784 // CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
2785 // CHECK6-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
2786 // CHECK6-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
2787 // CHECK6-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
2788 // CHECK6-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
2789 // CHECK6-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
2790 // CHECK6-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
2791 // CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
2792 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2793 // CHECK6: omp.inner.for.inc:
2794 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2795 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2796 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2797 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2798 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2799 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2800 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2801 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
2802 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2803 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2804 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
2805 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
2806 // CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2807 // CHECK6-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
2808 // CHECK6-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
2809 // CHECK6: cond.true5:
2810 // CHECK6-NEXT: br label [[COND_END7:%.*]]
2811 // CHECK6: cond.false6:
2812 // CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2813 // CHECK6-NEXT: br label [[COND_END7]]
2814 // CHECK6: cond.end7:
2815 // CHECK6-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
2816 // CHECK6-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
2817 // CHECK6-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2818 // CHECK6-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
2819 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
2820 // CHECK6: omp.inner.for.end:
2821 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2822 // CHECK6: omp.loop.exit:
2823 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2824 // CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2825 // CHECK6-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2826 // CHECK6-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2827 // CHECK6: .omp.final.then:
2828 // CHECK6-NEXT: store i32 10, i32* [[I]], align 4
2829 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
2830 // CHECK6: .omp.final.done:
2831 // CHECK6-NEXT: ret void
2832 // CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__5
2833 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
2834 // CHECK6-NEXT: entry:
2835 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2836 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2837 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2838 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2839 // CHECK6-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
2840 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2841 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
2842 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2843 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2844 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2845 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2846 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
2847 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2848 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2849 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2850 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2851 // CHECK6-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
2852 // CHECK6-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
2853 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2854 // CHECK6-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2855 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2856 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2857 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2858 // CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2859 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2860 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2861 // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2862 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2863 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2864 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2865 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2866 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2867 // CHECK6: omp.inner.for.cond:
2868 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2869 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2870 // CHECK6-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
2871 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2872 // CHECK6: omp.inner.for.body:
2873 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2874 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2875 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2876 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2877 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
2878 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
2879 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2880 // CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
2881 // CHECK6-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
2882 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2883 // CHECK6: omp.body.continue:
2884 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2885 // CHECK6: omp.inner.for.inc:
2886 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2887 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2888 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2889 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2890 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
2891 // CHECK6: omp.inner.for.end:
2892 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2893 // CHECK6: omp.loop.exit:
2894 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2895 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2896 // CHECK6-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2897 // CHECK6-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2898 // CHECK6: .omp.final.then:
2899 // CHECK6-NEXT: store i32 10, i32* [[I]], align 4
2900 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
2901 // CHECK6: .omp.final.done:
2902 // CHECK6-NEXT: ret void
2903 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
2904 // CHECK6-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
2905 // CHECK6-NEXT: entry:
2906 // CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
2907 // CHECK6-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
2908 // CHECK6-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
2909 // CHECK6-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2910 // CHECK6-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2911 // CHECK6-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
2912 // CHECK6-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
2913 // CHECK6-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
2914 // CHECK6-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
2915 // CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
2916 // CHECK6-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
2917 // CHECK6-NEXT: br label [[DOTEXECUTE:%.*]]
2918 // CHECK6: .execute:
2919 // CHECK6-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
2920 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
2921 // CHECK6-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
2922 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
2923 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
2924 // CHECK6-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
2925 // CHECK6-NEXT: br label [[DOTOMP_DEINIT:%.*]]
2926 // CHECK6: .omp.deinit:
2927 // CHECK6-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
2928 // CHECK6-NEXT: br label [[DOTEXIT:%.*]]
2929 // CHECK6: .exit:
2930 // CHECK6-NEXT: ret void
2931 // CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__6
2932 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
2933 // CHECK6-NEXT: entry:
2934 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2935 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2936 // CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
2937 // CHECK6-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
2938 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2939 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
2940 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2941 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2942 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2943 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2944 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2945 // CHECK6-NEXT: [[K:%.*]] = alloca i32, align 4
2946 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
2947 // CHECK6-NEXT: [[J:%.*]] = alloca i32, align 4
2948 // CHECK6-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
2949 // CHECK6-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
2950 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2951 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2952 // CHECK6-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
2953 // CHECK6-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
2954 // CHECK6-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
2955 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2956 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2957 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2958 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2959 // CHECK6-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
2960 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2961 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2962 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2963 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2964 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
2965 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2966 // CHECK6: cond.true:
2967 // CHECK6-NEXT: br label [[COND_END:%.*]]
2968 // CHECK6: cond.false:
2969 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2970 // CHECK6-NEXT: br label [[COND_END]]
2971 // CHECK6: cond.end:
2972 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2973 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2974 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2975 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2976 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2977 // CHECK6: omp.inner.for.cond:
2978 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2979 // CHECK6-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
2980 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2981 // CHECK6: omp.inner.for.body:
2982 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2983 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2984 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
2985 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
2986 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
2987 // CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
2988 // CHECK6-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
2989 // CHECK6-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
2990 // CHECK6-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
2991 // CHECK6-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
2992 // CHECK6-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
2993 // CHECK6-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
2994 // CHECK6-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
2995 // CHECK6-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
2996 // CHECK6-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
2997 // CHECK6-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
2998 // CHECK6-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
2999 // CHECK6-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
3000 // CHECK6-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
3001 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3002 // CHECK6: omp.inner.for.inc:
3003 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3004 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3005 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
3006 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3007 // CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3008 // CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3009 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
3010 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
3011 // CHECK6-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3012 // CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3013 // CHECK6-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
3014 // CHECK6-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
3015 // CHECK6-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3016 // CHECK6-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
3017 // CHECK6-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
3018 // CHECK6: cond.true6:
3019 // CHECK6-NEXT: br label [[COND_END8:%.*]]
3020 // CHECK6: cond.false7:
3021 // CHECK6-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3022 // CHECK6-NEXT: br label [[COND_END8]]
3023 // CHECK6: cond.end8:
3024 // CHECK6-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
3025 // CHECK6-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
3026 // CHECK6-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3027 // CHECK6-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
3028 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
3029 // CHECK6: omp.inner.for.end:
3030 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3031 // CHECK6: omp.loop.exit:
3032 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3033 // CHECK6-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3034 // CHECK6-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
3035 // CHECK6-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3036 // CHECK6: .omp.final.then:
3037 // CHECK6-NEXT: store i32 10, i32* [[I]], align 4
3038 // CHECK6-NEXT: store i32 10, i32* [[J]], align 4
3039 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
3040 // CHECK6: .omp.final.done:
3041 // CHECK6-NEXT: ret void
3042 // CHECK6-LABEL: define {{[^@]+}}@__omp_outlined__7
3043 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
3044 // CHECK6-NEXT: entry:
3045 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3046 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3047 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3048 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3049 // CHECK6-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
3050 // CHECK6-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
3051 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3052 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
3053 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3054 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3055 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3056 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3057 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3058 // CHECK6-NEXT: [[K:%.*]] = alloca i32, align 4
3059 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
3060 // CHECK6-NEXT: [[J:%.*]] = alloca i32, align 4
3061 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3062 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3063 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3064 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3065 // CHECK6-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
3066 // CHECK6-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
3067 // CHECK6-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
3068 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3069 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3070 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3071 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3072 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3073 // CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3074 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3075 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3076 // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3077 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3078 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3079 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3080 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3081 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3082 // CHECK6: omp.inner.for.cond:
3083 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3084 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3085 // CHECK6-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
3086 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3087 // CHECK6: omp.inner.for.body:
3088 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3089 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
3090 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
3091 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3092 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3093 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3094 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3095 // CHECK6-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
3096 // CHECK6-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
3097 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
3098 // CHECK6-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
3099 // CHECK6-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
3100 // CHECK6-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
3101 // CHECK6-NEXT: store i32 10, i32* [[K]], align 4
3102 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3103 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
3104 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
3105 // CHECK6-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
3106 // CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
3107 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
3108 // CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
3109 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
3110 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
3111 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
3112 // CHECK6-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
3113 // CHECK6-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
3114 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3115 // CHECK6: omp.body.continue:
3116 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3117 // CHECK6: omp.inner.for.inc:
3118 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3119 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3120 // CHECK6-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3121 // CHECK6-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
3122 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
3123 // CHECK6: omp.inner.for.end:
3124 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3125 // CHECK6: omp.loop.exit:
3126 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3127 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3128 // CHECK6-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
3129 // CHECK6-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3130 // CHECK6: .omp.final.then:
3131 // CHECK6-NEXT: store i32 10, i32* [[I]], align 4
3132 // CHECK6-NEXT: store i32 10, i32* [[J]], align 4
3133 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
3134 // CHECK6: .omp.final.done:
3135 // CHECK6-NEXT: ret void
3136 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
3137 // CHECK7-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
3138 // CHECK7-NEXT: entry:
3139 // CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3140 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
3141 // CHECK7-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
3142 // CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3143 // CHECK7-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
3144 // CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3145 // CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3146 // CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
3147 // CHECK7-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3148 // CHECK7-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
3149 // CHECK7-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
3150 // CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3151 // CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
3152 // CHECK7-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
3153 // CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
3154 // CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
3155 // CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
3156 // CHECK7: .execute:
3157 // CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
3158 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
3159 // CHECK7-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3160 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
3161 // CHECK7-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
3162 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
3163 // CHECK7-NEXT: [[CONV3:%.*]] = bitcast i64* [[L_CASTED]] to i32*
3164 // CHECK7-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
3165 // CHECK7-NEXT: [[TMP5:%.*]] = load i64, i64* [[L_CASTED]], align 8
3166 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
3167 // CHECK7-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i32]* [[TMP0]], i64 [[TMP5]]) #[[ATTR3:[0-9]+]]
3168 // CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
3169 // CHECK7: .omp.deinit:
3170 // CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
3171 // CHECK7-NEXT: br label [[DOTEXIT:%.*]]
3172 // CHECK7: .exit:
3173 // CHECK7-NEXT: ret void
3174 // CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__
3175 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
3176 // CHECK7-NEXT: entry:
3177 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3178 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3179 // CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3180 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
3181 // CHECK7-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
3182 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3183 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3184 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3185 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
3186 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3187 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3188 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3189 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3190 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3191 // CHECK7-NEXT: [[I5:%.*]] = alloca i32, align 4
3192 // CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3193 // CHECK7-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
3194 // CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
3195 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3196 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3197 // CHECK7-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3198 // CHECK7-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
3199 // CHECK7-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
3200 // CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3201 // CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
3202 // CHECK7-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
3203 // CHECK7-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
3204 // CHECK7-NEXT: [[TMP2:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8
3205 // CHECK7-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
3206 // CHECK7-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8
3207 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i64 0
3208 // CHECK7-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
3209 // CHECK7-NEXT: [[L2:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
3210 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8
3211 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
3212 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3213 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
3214 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3215 // CHECK7-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
3216 // CHECK7-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
3217 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4
3218 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3219 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
3220 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3221 // CHECK7: omp.precond.then:
3222 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3223 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3224 // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
3225 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3226 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3227 // CHECK7-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3228 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
3229 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
3230 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3231 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3232 // CHECK7-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
3233 // CHECK7-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3234 // CHECK7: cond.true:
3235 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3236 // CHECK7-NEXT: br label [[COND_END:%.*]]
3237 // CHECK7: cond.false:
3238 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3239 // CHECK7-NEXT: br label [[COND_END]]
3240 // CHECK7: cond.end:
3241 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
3242 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3243 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3244 // CHECK7-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
3245 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3246 // CHECK7: omp.inner.for.cond:
3247 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3248 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3249 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
3250 // CHECK7-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
3251 // CHECK7-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3252 // CHECK7: omp.inner.for.body:
3253 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3254 // CHECK7-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
3255 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3256 // CHECK7-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64
3257 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV]], align 8
3258 // CHECK7-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3259 // CHECK7-NEXT: store i32 [[TMP23]], i32* [[CONV8]], align 4
3260 // CHECK7-NEXT: [[TMP24:%.*]] = load i64, i64* [[N_CASTED]], align 8
3261 // CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[CONV1]], align 8
3262 // CHECK7-NEXT: [[CONV9:%.*]] = bitcast i64* [[L_CASTED]] to i32*
3263 // CHECK7-NEXT: store i32 [[TMP25]], i32* [[CONV9]], align 4
3264 // CHECK7-NEXT: [[TMP26:%.*]] = load i64, i64* [[L_CASTED]], align 8
3265 // CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
3266 // CHECK7-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP20]] to i8*
3267 // CHECK7-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
3268 // CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
3269 // CHECK7-NEXT: [[TMP30:%.*]] = inttoptr i64 [[TMP22]] to i8*
3270 // CHECK7-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8
3271 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
3272 // CHECK7-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP24]] to i8*
3273 // CHECK7-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 8
3274 // CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
3275 // CHECK7-NEXT: [[TMP34:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
3276 // CHECK7-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 8
3277 // CHECK7-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
3278 // CHECK7-NEXT: [[TMP36:%.*]] = inttoptr i64 [[TMP26]] to i8*
3279 // CHECK7-NEXT: store i8* [[TMP36]], i8** [[TMP35]], align 8
3280 // CHECK7-NEXT: [[TMP37:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3281 // CHECK7-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP37]], align 4
3282 // CHECK7-NEXT: [[TMP39:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
3283 // CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP38]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP39]], i64 5)
3284 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3285 // CHECK7: omp.inner.for.inc:
3286 // CHECK7-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3287 // CHECK7-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3288 // CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
3289 // CHECK7-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
3290 // CHECK7-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3291 // CHECK7-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3292 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
3293 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
3294 // CHECK7-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3295 // CHECK7-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3296 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP44]], [[TMP45]]
3297 // CHECK7-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
3298 // CHECK7-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3299 // CHECK7-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3300 // CHECK7-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP46]], [[TMP47]]
3301 // CHECK7-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
3302 // CHECK7: cond.true14:
3303 // CHECK7-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3304 // CHECK7-NEXT: br label [[COND_END16:%.*]]
3305 // CHECK7: cond.false15:
3306 // CHECK7-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3307 // CHECK7-NEXT: br label [[COND_END16]]
3308 // CHECK7: cond.end16:
3309 // CHECK7-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP48]], [[COND_TRUE14]] ], [ [[TMP49]], [[COND_FALSE15]] ]
3310 // CHECK7-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
3311 // CHECK7-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3312 // CHECK7-NEXT: store i32 [[TMP50]], i32* [[DOTOMP_IV]], align 4
3313 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3314 // CHECK7: omp.inner.for.end:
3315 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3316 // CHECK7: omp.loop.exit:
3317 // CHECK7-NEXT: [[TMP51:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3318 // CHECK7-NEXT: [[TMP52:%.*]] = load i32, i32* [[TMP51]], align 4
3319 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP52]])
3320 // CHECK7-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3321 // CHECK7-NEXT: [[TMP54:%.*]] = icmp ne i32 [[TMP53]], 0
3322 // CHECK7-NEXT: br i1 [[TMP54]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3323 // CHECK7: .omp.final.then:
3324 // CHECK7-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3325 // CHECK7-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP55]], 0
3326 // CHECK7-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
3327 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV19]], 1
3328 // CHECK7-NEXT: [[ADD20:%.*]] = add nsw i32 0, [[MUL]]
3329 // CHECK7-NEXT: store i32 [[ADD20]], i32* [[I5]], align 4
3330 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
3331 // CHECK7: .omp.final.done:
3332 // CHECK7-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3333 // CHECK7-NEXT: [[TMP57:%.*]] = icmp ne i32 [[TMP56]], 0
3334 // CHECK7-NEXT: br i1 [[TMP57]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3335 // CHECK7: .omp.lastprivate.then:
3336 // CHECK7-NEXT: [[TMP58:%.*]] = load i32, i32* [[CONV1]], align 8
3337 // CHECK7-NEXT: store i32 [[TMP58]], i32* [[CONV1]], align 8
3338 // CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
3339 // CHECK7: .omp.lastprivate.done:
3340 // CHECK7-NEXT: br label [[OMP_PRECOND_END]]
3341 // CHECK7: omp.precond.end:
3342 // CHECK7-NEXT: [[TMP59:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
3343 // CHECK7-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP59]])
3344 // CHECK7-NEXT: ret void
3345 // CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__1
3346 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
3347 // CHECK7-NEXT: entry:
3348 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3349 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3350 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3351 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3352 // CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3353 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
3354 // CHECK7-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
3355 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3356 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3357 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3358 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3359 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3360 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3361 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3362 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3363 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3364 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
3365 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3366 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3367 // CHECK7-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3368 // CHECK7-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3369 // CHECK7-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3370 // CHECK7-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
3371 // CHECK7-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
3372 // CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3373 // CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
3374 // CHECK7-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
3375 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3376 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3377 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3378 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3379 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3380 // CHECK7-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
3381 // CHECK7-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3382 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4
3383 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3384 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3385 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3386 // CHECK7: omp.precond.then:
3387 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3388 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3389 // CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
3390 // CHECK7-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3391 // CHECK7-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP5]] to i32
3392 // CHECK7-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3393 // CHECK7-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
3394 // CHECK7-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
3395 // CHECK7-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
3396 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3397 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3398 // CHECK7-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3399 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3400 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
3401 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3402 // CHECK7: omp.dispatch.cond:
3403 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3404 // CHECK7-NEXT: [[CONV7:%.*]] = sext i32 [[TMP9]] to i64
3405 // CHECK7-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3406 // CHECK7-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP10]]
3407 // CHECK7-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3408 // CHECK7: cond.true:
3409 // CHECK7-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3410 // CHECK7-NEXT: br label [[COND_END:%.*]]
3411 // CHECK7: cond.false:
3412 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3413 // CHECK7-NEXT: [[CONV9:%.*]] = sext i32 [[TMP12]] to i64
3414 // CHECK7-NEXT: br label [[COND_END]]
3415 // CHECK7: cond.end:
3416 // CHECK7-NEXT: [[COND:%.*]] = phi i64 [ [[TMP11]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ]
3417 // CHECK7-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32
3418 // CHECK7-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4
3419 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3420 // CHECK7-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
3421 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3422 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3423 // CHECK7-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
3424 // CHECK7-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3425 // CHECK7: omp.dispatch.body:
3426 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3427 // CHECK7: omp.inner.for.cond:
3428 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3429 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3430 // CHECK7-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
3431 // CHECK7-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3432 // CHECK7: omp.inner.for.body:
3433 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3434 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
3435 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3436 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I6]], align 4
3437 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
3438 // CHECK7-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
3439 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3440 // CHECK7-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
3441 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4
3442 // CHECK7-NEXT: store i32 [[TMP20]], i32* [[CONV1]], align 8
3443 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3444 // CHECK7: omp.body.continue:
3445 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3446 // CHECK7: omp.inner.for.inc:
3447 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3448 // CHECK7-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP21]], 1
3449 // CHECK7-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
3450 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
3451 // CHECK7: omp.inner.for.end:
3452 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3453 // CHECK7: omp.dispatch.inc:
3454 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3455 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3456 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
3457 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_LB]], align 4
3458 // CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3459 // CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3460 // CHECK7-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
3461 // CHECK7-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_UB]], align 4
3462 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
3463 // CHECK7: omp.dispatch.end:
3464 // CHECK7-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3465 // CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
3466 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
3467 // CHECK7-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3468 // CHECK7-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3469 // CHECK7-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3470 // CHECK7: .omp.final.then:
3471 // CHECK7-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3472 // CHECK7-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP30]], 0
3473 // CHECK7-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1
3474 // CHECK7-NEXT: [[MUL18:%.*]] = mul nsw i32 [[DIV17]], 1
3475 // CHECK7-NEXT: [[ADD19:%.*]] = add nsw i32 0, [[MUL18]]
3476 // CHECK7-NEXT: store i32 [[ADD19]], i32* [[I6]], align 4
3477 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
3478 // CHECK7: .omp.final.done:
3479 // CHECK7-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3480 // CHECK7-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
3481 // CHECK7-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3482 // CHECK7: .omp.lastprivate.then:
3483 // CHECK7-NEXT: [[TMP33:%.*]] = load i32, i32* [[CONV1]], align 8
3484 // CHECK7-NEXT: store i32 [[TMP33]], i32* [[CONV1]], align 8
3485 // CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
3486 // CHECK7: .omp.lastprivate.done:
3487 // CHECK7-NEXT: br label [[OMP_PRECOND_END]]
3488 // CHECK7: omp.precond.end:
3489 // CHECK7-NEXT: ret void
3490 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
3491 // CHECK7-SAME: (i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
3492 // CHECK7-NEXT: entry:
3493 // CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3494 // CHECK7-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
3495 // CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3496 // CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3497 // CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3498 // CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
3499 // CHECK7-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3500 // CHECK7-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
3501 // CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3502 // CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
3503 // CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
3504 // CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
3505 // CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
3506 // CHECK7: .execute:
3507 // CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
3508 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
3509 // CHECK7-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3510 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
3511 // CHECK7-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
3512 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
3513 // CHECK7-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
3514 // CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
3515 // CHECK7: .omp.deinit:
3516 // CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
3517 // CHECK7-NEXT: br label [[DOTEXIT:%.*]]
3518 // CHECK7: .exit:
3519 // CHECK7-NEXT: ret void
3520 // CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__2
3521 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
3522 // CHECK7-NEXT: entry:
3523 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3524 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3525 // CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3526 // CHECK7-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
3527 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3528 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3529 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3530 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3531 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3532 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3533 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3534 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3535 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3536 // CHECK7-NEXT: [[I3:%.*]] = alloca i32, align 4
3537 // CHECK7-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3538 // CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
3539 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3540 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3541 // CHECK7-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3542 // CHECK7-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
3543 // CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3544 // CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
3545 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3546 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3547 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3548 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3549 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3550 // CHECK7-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3551 // CHECK7-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3552 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4
3553 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3554 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3555 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3556 // CHECK7: omp.precond.then:
3557 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3558 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3559 // CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
3560 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3561 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3562 // CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
3563 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3564 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3565 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
3566 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3567 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3568 // CHECK7-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
3569 // CHECK7-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3570 // CHECK7: cond.true:
3571 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3572 // CHECK7-NEXT: br label [[COND_END:%.*]]
3573 // CHECK7: cond.false:
3574 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3575 // CHECK7-NEXT: br label [[COND_END]]
3576 // CHECK7: cond.end:
3577 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
3578 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3579 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3580 // CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
3581 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3582 // CHECK7: omp.inner.for.cond:
3583 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3584 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3585 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
3586 // CHECK7-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
3587 // CHECK7-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3588 // CHECK7: omp.inner.for.body:
3589 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3590 // CHECK7-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
3591 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3592 // CHECK7-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
3593 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
3594 // CHECK7-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3595 // CHECK7-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
3596 // CHECK7-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
3597 // CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
3598 // CHECK7-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to i8*
3599 // CHECK7-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8
3600 // CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
3601 // CHECK7-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to i8*
3602 // CHECK7-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8
3603 // CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
3604 // CHECK7-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to i8*
3605 // CHECK7-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
3606 // CHECK7-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
3607 // CHECK7-NEXT: [[TMP27:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
3608 // CHECK7-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
3609 // CHECK7-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3610 // CHECK7-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4
3611 // CHECK7-NEXT: [[TMP30:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
3612 // CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP30]], i64 4)
3613 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3614 // CHECK7: omp.inner.for.inc:
3615 // CHECK7-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3616 // CHECK7-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3617 // CHECK7-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
3618 // CHECK7-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
3619 // CHECK7-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3620 // CHECK7-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3621 // CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
3622 // CHECK7-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
3623 // CHECK7-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3624 // CHECK7-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3625 // CHECK7-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
3626 // CHECK7-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
3627 // CHECK7-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3628 // CHECK7-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3629 // CHECK7-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]
3630 // CHECK7-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
3631 // CHECK7: cond.true11:
3632 // CHECK7-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3633 // CHECK7-NEXT: br label [[COND_END13:%.*]]
3634 // CHECK7: cond.false12:
3635 // CHECK7-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3636 // CHECK7-NEXT: br label [[COND_END13]]
3637 // CHECK7: cond.end13:
3638 // CHECK7-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE11]] ], [ [[TMP40]], [[COND_FALSE12]] ]
3639 // CHECK7-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
3640 // CHECK7-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3641 // CHECK7-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV]], align 4
3642 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
3643 // CHECK7: omp.inner.for.end:
3644 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3645 // CHECK7: omp.loop.exit:
3646 // CHECK7-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3647 // CHECK7-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4
3648 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP43]])
3649 // CHECK7-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3650 // CHECK7-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
3651 // CHECK7-NEXT: br i1 [[TMP45]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3652 // CHECK7: .omp.final.then:
3653 // CHECK7-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3654 // CHECK7-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP46]], 0
3655 // CHECK7-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
3656 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
3657 // CHECK7-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
3658 // CHECK7-NEXT: store i32 [[ADD17]], i32* [[I3]], align 4
3659 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
3660 // CHECK7: .omp.final.done:
3661 // CHECK7-NEXT: br label [[OMP_PRECOND_END]]
3662 // CHECK7: omp.precond.end:
3663 // CHECK7-NEXT: ret void
3664 // CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__3
3665 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
3666 // CHECK7-NEXT: entry:
3667 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3668 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3669 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3670 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3671 // CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3672 // CHECK7-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
3673 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3674 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3675 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3676 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3677 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3678 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3679 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3680 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3681 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3682 // CHECK7-NEXT: [[I5:%.*]] = alloca i32, align 4
3683 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3684 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3685 // CHECK7-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3686 // CHECK7-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3687 // CHECK7-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3688 // CHECK7-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
3689 // CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3690 // CHECK7-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
3691 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3692 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3693 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3694 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3695 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3696 // CHECK7-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3697 // CHECK7-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3698 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4
3699 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3700 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3701 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3702 // CHECK7: omp.precond.then:
3703 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3704 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3705 // CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
3706 // CHECK7-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3707 // CHECK7-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
3708 // CHECK7-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3709 // CHECK7-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
3710 // CHECK7-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
3711 // CHECK7-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
3712 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3713 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3714 // CHECK7-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3715 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3716 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3717 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3718 // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
3719 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3720 // CHECK7: omp.inner.for.cond:
3721 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3722 // CHECK7-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
3723 // CHECK7-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3724 // CHECK7-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
3725 // CHECK7-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3726 // CHECK7: omp.inner.for.body:
3727 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3728 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
3729 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3730 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
3731 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[I5]], align 4
3732 // CHECK7-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
3733 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3734 // CHECK7-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
3735 // CHECK7-NEXT: [[CONV8:%.*]] = sext i16 [[TMP14]] to i32
3736 // CHECK7-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], 1
3737 // CHECK7-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i16
3738 // CHECK7-NEXT: store i16 [[CONV10]], i16* [[ARRAYIDX]], align 2
3739 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3740 // CHECK7: omp.body.continue:
3741 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3742 // CHECK7: omp.inner.for.inc:
3743 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3744 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3745 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
3746 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
3747 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
3748 // CHECK7: omp.inner.for.end:
3749 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3750 // CHECK7: omp.loop.exit:
3751 // CHECK7-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3752 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
3753 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
3754 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3755 // CHECK7-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
3756 // CHECK7-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3757 // CHECK7: .omp.final.then:
3758 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3759 // CHECK7-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP21]], 0
3760 // CHECK7-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
3761 // CHECK7-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
3762 // CHECK7-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
3763 // CHECK7-NEXT: store i32 [[ADD15]], i32* [[I5]], align 4
3764 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
3765 // CHECK7: .omp.final.done:
3766 // CHECK7-NEXT: br label [[OMP_PRECOND_END]]
3767 // CHECK7: omp.precond.end:
3768 // CHECK7-NEXT: ret void
3769 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
3770 // CHECK7-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
3771 // CHECK7-NEXT: entry:
3772 // CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
3773 // CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3774 // CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3775 // CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
3776 // CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
3777 // CHECK7-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
3778 // CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
3779 // CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
3780 // CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
3781 // CHECK7: .execute:
3782 // CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
3783 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
3784 // CHECK7-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
3785 // CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
3786 // CHECK7: .omp.deinit:
3787 // CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
3788 // CHECK7-NEXT: br label [[DOTEXIT:%.*]]
3789 // CHECK7: .exit:
3790 // CHECK7-NEXT: ret void
3791 // CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__4
3792 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
3793 // CHECK7-NEXT: entry:
3794 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3795 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3796 // CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
3797 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3798 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3799 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3800 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3801 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3802 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3803 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3804 // CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8
3805 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3806 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3807 // CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
3808 // CHECK7-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
3809 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3810 // CHECK7-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
3811 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3812 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3813 // CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
3814 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3815 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3816 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
3817 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3818 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3819 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3820 // CHECK7: cond.true:
3821 // CHECK7-NEXT: br label [[COND_END:%.*]]
3822 // CHECK7: cond.false:
3823 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3824 // CHECK7-NEXT: br label [[COND_END]]
3825 // CHECK7: cond.end:
3826 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3827 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3828 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3829 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3830 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3831 // CHECK7: omp.inner.for.cond:
3832 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3833 // CHECK7-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
3834 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3835 // CHECK7: omp.inner.for.body:
3836 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3837 // CHECK7-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3838 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3839 // CHECK7-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3840 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
3841 // CHECK7-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8*
3842 // CHECK7-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
3843 // CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
3844 // CHECK7-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8*
3845 // CHECK7-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
3846 // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
3847 // CHECK7-NEXT: [[TMP16:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
3848 // CHECK7-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
3849 // CHECK7-NEXT: [[TMP17:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
3850 // CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP17]], i64 3)
3851 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3852 // CHECK7: omp.inner.for.inc:
3853 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3854 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3855 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
3856 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3857 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3858 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3859 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
3860 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
3861 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3862 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3863 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
3864 // CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
3865 // CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3866 // CHECK7-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP24]], 9
3867 // CHECK7-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
3868 // CHECK7: cond.true5:
3869 // CHECK7-NEXT: br label [[COND_END7:%.*]]
3870 // CHECK7: cond.false6:
3871 // CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3872 // CHECK7-NEXT: br label [[COND_END7]]
3873 // CHECK7: cond.end7:
3874 // CHECK7-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP25]], [[COND_FALSE6]] ]
3875 // CHECK7-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
3876 // CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3877 // CHECK7-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV]], align 4
3878 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
3879 // CHECK7: omp.inner.for.end:
3880 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3881 // CHECK7: omp.loop.exit:
3882 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3883 // CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3884 // CHECK7-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
3885 // CHECK7-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3886 // CHECK7: .omp.final.then:
3887 // CHECK7-NEXT: store i32 10, i32* [[I]], align 4
3888 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
3889 // CHECK7: .omp.final.done:
3890 // CHECK7-NEXT: ret void
3891 // CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__5
3892 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
3893 // CHECK7-NEXT: entry:
3894 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3895 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3896 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3897 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3898 // CHECK7-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
3899 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3900 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3901 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3902 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3903 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3904 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3905 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3906 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3907 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3908 // CHECK7-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3909 // CHECK7-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3910 // CHECK7-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
3911 // CHECK7-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
3912 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3913 // CHECK7-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3914 // CHECK7-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3915 // CHECK7-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3916 // CHECK7-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3917 // CHECK7-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3918 // CHECK7-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3919 // CHECK7-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3920 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3921 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3922 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3923 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3924 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3925 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3926 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3927 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3928 // CHECK7: omp.inner.for.cond:
3929 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3930 // CHECK7-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
3931 // CHECK7-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3932 // CHECK7-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
3933 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3934 // CHECK7: omp.inner.for.body:
3935 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3936 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3937 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3938 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3939 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
3940 // CHECK7-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
3941 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3942 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3943 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3944 // CHECK7-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4
3945 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3946 // CHECK7: omp.body.continue:
3947 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3948 // CHECK7: omp.inner.for.inc:
3949 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3950 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3951 // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3952 // CHECK7-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
3953 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
3954 // CHECK7: omp.inner.for.end:
3955 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3956 // CHECK7: omp.loop.exit:
3957 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3958 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3959 // CHECK7-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3960 // CHECK7-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3961 // CHECK7: .omp.final.then:
3962 // CHECK7-NEXT: store i32 10, i32* [[I]], align 4
3963 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
3964 // CHECK7: .omp.final.done:
3965 // CHECK7-NEXT: ret void
3966 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
3967 // CHECK7-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
3968 // CHECK7-NEXT: entry:
3969 // CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
3970 // CHECK7-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
3971 // CHECK7-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
3972 // CHECK7-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3973 // CHECK7-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3974 // CHECK7-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
3975 // CHECK7-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
3976 // CHECK7-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
3977 // CHECK7-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
3978 // CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
3979 // CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
3980 // CHECK7-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
3981 // CHECK7-NEXT: br label [[DOTEXECUTE:%.*]]
3982 // CHECK7: .execute:
3983 // CHECK7-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
3984 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
3985 // CHECK7-NEXT: [[CONV1:%.*]] = bitcast i64* [[F_CASTED]] to i32*
3986 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
3987 // CHECK7-NEXT: [[TMP3:%.*]] = load i64, i64* [[F_CASTED]], align 8
3988 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
3989 // CHECK7-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i64 [[TMP3]]) #[[ATTR3]]
3990 // CHECK7-NEXT: br label [[DOTOMP_DEINIT:%.*]]
3991 // CHECK7: .omp.deinit:
3992 // CHECK7-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
3993 // CHECK7-NEXT: br label [[DOTEXIT:%.*]]
3994 // CHECK7: .exit:
3995 // CHECK7-NEXT: ret void
3996 // CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__6
3997 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
3998 // CHECK7-NEXT: entry:
3999 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4000 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4001 // CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
4002 // CHECK7-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
4003 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4004 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
4005 // CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4006 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4007 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4008 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4009 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4010 // CHECK7-NEXT: [[K:%.*]] = alloca i32, align 4
4011 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
4012 // CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4
4013 // CHECK7-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
4014 // CHECK7-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
4015 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4016 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4017 // CHECK7-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
4018 // CHECK7-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
4019 // CHECK7-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
4020 // CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
4021 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4022 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4023 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4024 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4025 // CHECK7-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
4026 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4027 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4028 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
4029 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4030 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
4031 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4032 // CHECK7: cond.true:
4033 // CHECK7-NEXT: br label [[COND_END:%.*]]
4034 // CHECK7: cond.false:
4035 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4036 // CHECK7-NEXT: br label [[COND_END]]
4037 // CHECK7: cond.end:
4038 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4039 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4040 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4041 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4042 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4043 // CHECK7: omp.inner.for.cond:
4044 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4045 // CHECK7-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
4046 // CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4047 // CHECK7: omp.inner.for.body:
4048 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4049 // CHECK7-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4050 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4051 // CHECK7-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4052 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8
4053 // CHECK7-NEXT: [[CONV3:%.*]] = bitcast i64* [[F_CASTED]] to i32*
4054 // CHECK7-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
4055 // CHECK7-NEXT: [[TMP12:%.*]] = load i64, i64* [[F_CASTED]], align 8
4056 // CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
4057 // CHECK7-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to i8*
4058 // CHECK7-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
4059 // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
4060 // CHECK7-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to i8*
4061 // CHECK7-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
4062 // CHECK7-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
4063 // CHECK7-NEXT: [[TMP18:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
4064 // CHECK7-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8
4065 // CHECK7-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
4066 // CHECK7-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP12]] to i8*
4067 // CHECK7-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8
4068 // CHECK7-NEXT: [[TMP21:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
4069 // CHECK7-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x [10 x i32]]*, i64)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP21]], i64 4)
4070 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4071 // CHECK7: omp.inner.for.inc:
4072 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4073 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4074 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
4075 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4076 // CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4077 // CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4078 // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
4079 // CHECK7-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4
4080 // CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4081 // CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4082 // CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
4083 // CHECK7-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4
4084 // CHECK7-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4085 // CHECK7-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP28]], 99
4086 // CHECK7-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
4087 // CHECK7: cond.true7:
4088 // CHECK7-NEXT: br label [[COND_END9:%.*]]
4089 // CHECK7: cond.false8:
4090 // CHECK7-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4091 // CHECK7-NEXT: br label [[COND_END9]]
4092 // CHECK7: cond.end9:
4093 // CHECK7-NEXT: [[COND10:%.*]] = phi i32 [ 99, [[COND_TRUE7]] ], [ [[TMP29]], [[COND_FALSE8]] ]
4094 // CHECK7-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4
4095 // CHECK7-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4096 // CHECK7-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4
4097 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
4098 // CHECK7: omp.inner.for.end:
4099 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4100 // CHECK7: omp.loop.exit:
4101 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4102 // CHECK7-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4103 // CHECK7-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
4104 // CHECK7-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4105 // CHECK7: .omp.final.then:
4106 // CHECK7-NEXT: store i32 10, i32* [[I]], align 4
4107 // CHECK7-NEXT: store i32 10, i32* [[J]], align 4
4108 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
4109 // CHECK7: .omp.final.done:
4110 // CHECK7-NEXT: ret void
4111 // CHECK7-LABEL: define {{[^@]+}}@__omp_outlined__7
4112 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
4113 // CHECK7-NEXT: entry:
4114 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4115 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4116 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4117 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4118 // CHECK7-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
4119 // CHECK7-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
4120 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4121 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
4122 // CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4123 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4124 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4125 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4126 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4127 // CHECK7-NEXT: [[K:%.*]] = alloca i32, align 4
4128 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
4129 // CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4
4130 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4131 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4132 // CHECK7-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4133 // CHECK7-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4134 // CHECK7-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
4135 // CHECK7-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
4136 // CHECK7-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
4137 // CHECK7-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
4138 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4139 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4140 // CHECK7-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4141 // CHECK7-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
4142 // CHECK7-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4143 // CHECK7-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP2]] to i32
4144 // CHECK7-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
4145 // CHECK7-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
4146 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4147 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4148 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4149 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4150 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4151 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4152 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4153 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4154 // CHECK7: omp.inner.for.cond:
4155 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4156 // CHECK7-NEXT: [[CONV4:%.*]] = sext i32 [[TMP6]] to i64
4157 // CHECK7-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4158 // CHECK7-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV4]], [[TMP7]]
4159 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4160 // CHECK7: omp.inner.for.body:
4161 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4162 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
4163 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
4164 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4165 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4166 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4167 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4168 // CHECK7-NEXT: [[DIV5:%.*]] = sdiv i32 [[TMP10]], 10
4169 // CHECK7-NEXT: [[MUL6:%.*]] = mul nsw i32 [[DIV5]], 10
4170 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL6]]
4171 // CHECK7-NEXT: [[MUL7:%.*]] = mul nsw i32 [[SUB]], 1
4172 // CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
4173 // CHECK7-NEXT: store i32 [[ADD8]], i32* [[J]], align 4
4174 // CHECK7-NEXT: store i32 10, i32* [[K]], align 4
4175 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
4176 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
4177 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[CONV]], align 8
4178 // CHECK7-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
4179 // CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP11]], [[MUL9]]
4180 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
4181 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD10]], [[TMP14]]
4182 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
4183 // CHECK7-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
4184 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
4185 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
4186 // CHECK7-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP16]] to i64
4187 // CHECK7-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM12]]
4188 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[ARRAYIDX13]], align 4
4189 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4190 // CHECK7: omp.body.continue:
4191 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4192 // CHECK7: omp.inner.for.inc:
4193 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4194 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4195 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
4196 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
4197 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
4198 // CHECK7: omp.inner.for.end:
4199 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4200 // CHECK7: omp.loop.exit:
4201 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4202 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4203 // CHECK7-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
4204 // CHECK7-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4205 // CHECK7: .omp.final.then:
4206 // CHECK7-NEXT: store i32 10, i32* [[I]], align 4
4207 // CHECK7-NEXT: store i32 10, i32* [[J]], align 4
4208 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
4209 // CHECK7: .omp.final.done:
4210 // CHECK7-NEXT: ret void
4211 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
4212 // CHECK8-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
4213 // CHECK8-NEXT: entry:
4214 // CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4215 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
4216 // CHECK8-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
4217 // CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4218 // CHECK8-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
4219 // CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
4220 // CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4221 // CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
4222 // CHECK8-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4223 // CHECK8-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
4224 // CHECK8-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
4225 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4226 // CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
4227 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
4228 // CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
4229 // CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
4230 // CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
4231 // CHECK8: .execute:
4232 // CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
4233 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
4234 // CHECK8-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4235 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
4236 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
4237 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
4238 // CHECK8-NEXT: [[CONV3:%.*]] = bitcast i64* [[L_CASTED]] to i32*
4239 // CHECK8-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
4240 // CHECK8-NEXT: [[TMP5:%.*]] = load i64, i64* [[L_CASTED]], align 8
4241 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
4242 // CHECK8-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i32]* [[TMP0]], i64 [[TMP5]]) #[[ATTR3:[0-9]+]]
4243 // CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
4244 // CHECK8: .omp.deinit:
4245 // CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
4246 // CHECK8-NEXT: br label [[DOTEXIT:%.*]]
4247 // CHECK8: .exit:
4248 // CHECK8-NEXT: ret void
4249 // CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__
4250 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
4251 // CHECK8-NEXT: entry:
4252 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4253 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4254 // CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4255 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
4256 // CHECK8-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
4257 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4258 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
4259 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4260 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
4261 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
4262 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4263 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4264 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4265 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4266 // CHECK8-NEXT: [[I5:%.*]] = alloca i32, align 4
4267 // CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4268 // CHECK8-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
4269 // CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
4270 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4271 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4272 // CHECK8-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4273 // CHECK8-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
4274 // CHECK8-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
4275 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4276 // CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
4277 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
4278 // CHECK8-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i64 4, i16 1)
4279 // CHECK8-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
4280 // CHECK8-NEXT: [[L2:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
4281 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
4282 // CHECK8-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
4283 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4284 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4285 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4286 // CHECK8-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
4287 // CHECK8-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
4288 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4
4289 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4290 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4291 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4292 // CHECK8: omp.precond.then:
4293 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4294 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
4295 // CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
4296 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4297 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4298 // CHECK8-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4299 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4300 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
4301 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4302 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
4303 // CHECK8-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
4304 // CHECK8-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4305 // CHECK8: cond.true:
4306 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
4307 // CHECK8-NEXT: br label [[COND_END:%.*]]
4308 // CHECK8: cond.false:
4309 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4310 // CHECK8-NEXT: br label [[COND_END]]
4311 // CHECK8: cond.end:
4312 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
4313 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4314 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4315 // CHECK8-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
4316 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4317 // CHECK8: omp.inner.for.cond:
4318 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4319 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
4320 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
4321 // CHECK8-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
4322 // CHECK8-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4323 // CHECK8: omp.inner.for.body:
4324 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4325 // CHECK8-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
4326 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4327 // CHECK8-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
4328 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
4329 // CHECK8-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4330 // CHECK8-NEXT: store i32 [[TMP20]], i32* [[CONV8]], align 4
4331 // CHECK8-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
4332 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV1]], align 8
4333 // CHECK8-NEXT: [[CONV9:%.*]] = bitcast i64* [[L_CASTED]] to i32*
4334 // CHECK8-NEXT: store i32 [[TMP22]], i32* [[CONV9]], align 4
4335 // CHECK8-NEXT: [[TMP23:%.*]] = load i64, i64* [[L_CASTED]], align 8
4336 // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
4337 // CHECK8-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP17]] to i8*
4338 // CHECK8-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
4339 // CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
4340 // CHECK8-NEXT: [[TMP27:%.*]] = inttoptr i64 [[TMP19]] to i8*
4341 // CHECK8-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
4342 // CHECK8-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
4343 // CHECK8-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP21]] to i8*
4344 // CHECK8-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 8
4345 // CHECK8-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
4346 // CHECK8-NEXT: [[TMP31:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
4347 // CHECK8-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 8
4348 // CHECK8-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
4349 // CHECK8-NEXT: [[TMP33:%.*]] = inttoptr i64 [[TMP23]] to i8*
4350 // CHECK8-NEXT: store i8* [[TMP33]], i8** [[TMP32]], align 8
4351 // CHECK8-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4352 // CHECK8-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
4353 // CHECK8-NEXT: [[TMP36:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
4354 // CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP35]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP36]], i64 5)
4355 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4356 // CHECK8: omp.inner.for.inc:
4357 // CHECK8-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4358 // CHECK8-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4359 // CHECK8-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
4360 // CHECK8-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
4361 // CHECK8-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4362 // CHECK8-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4363 // CHECK8-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
4364 // CHECK8-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
4365 // CHECK8-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4366 // CHECK8-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4367 // CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP41]], [[TMP42]]
4368 // CHECK8-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
4369 // CHECK8-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4370 // CHECK8-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
4371 // CHECK8-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP43]], [[TMP44]]
4372 // CHECK8-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
4373 // CHECK8: cond.true14:
4374 // CHECK8-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
4375 // CHECK8-NEXT: br label [[COND_END16:%.*]]
4376 // CHECK8: cond.false15:
4377 // CHECK8-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4378 // CHECK8-NEXT: br label [[COND_END16]]
4379 // CHECK8: cond.end16:
4380 // CHECK8-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP45]], [[COND_TRUE14]] ], [ [[TMP46]], [[COND_FALSE15]] ]
4381 // CHECK8-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
4382 // CHECK8-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4383 // CHECK8-NEXT: store i32 [[TMP47]], i32* [[DOTOMP_IV]], align 4
4384 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
4385 // CHECK8: omp.inner.for.end:
4386 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4387 // CHECK8: omp.loop.exit:
4388 // CHECK8-NEXT: [[TMP48:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4389 // CHECK8-NEXT: [[TMP49:%.*]] = load i32, i32* [[TMP48]], align 4
4390 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP49]])
4391 // CHECK8-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4392 // CHECK8-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
4393 // CHECK8-NEXT: br i1 [[TMP51]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4394 // CHECK8: .omp.final.then:
4395 // CHECK8-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4396 // CHECK8-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP52]], 0
4397 // CHECK8-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
4398 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV19]], 1
4399 // CHECK8-NEXT: [[ADD20:%.*]] = add nsw i32 0, [[MUL]]
4400 // CHECK8-NEXT: store i32 [[ADD20]], i32* [[I5]], align 4
4401 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
4402 // CHECK8: .omp.final.done:
4403 // CHECK8-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4404 // CHECK8-NEXT: [[TMP54:%.*]] = icmp ne i32 [[TMP53]], 0
4405 // CHECK8-NEXT: br i1 [[TMP54]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
4406 // CHECK8: .omp.lastprivate.then:
4407 // CHECK8-NEXT: [[TMP55:%.*]] = load i32, i32* [[CONV1]], align 8
4408 // CHECK8-NEXT: store i32 [[TMP55]], i32* [[CONV1]], align 8
4409 // CHECK8-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
4410 // CHECK8: .omp.lastprivate.done:
4411 // CHECK8-NEXT: br label [[OMP_PRECOND_END]]
4412 // CHECK8: omp.precond.end:
4413 // CHECK8-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
4414 // CHECK8-NEXT: ret void
4415 // CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__1
4416 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
4417 // CHECK8-NEXT: entry:
4418 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4419 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4420 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4421 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4422 // CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4423 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
4424 // CHECK8-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
4425 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4426 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
4427 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4428 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
4429 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
4430 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4431 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4432 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4433 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4434 // CHECK8-NEXT: [[I6:%.*]] = alloca i32, align 4
4435 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4436 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4437 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4438 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4439 // CHECK8-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4440 // CHECK8-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
4441 // CHECK8-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
4442 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4443 // CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
4444 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
4445 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4446 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4447 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4448 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
4449 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4450 // CHECK8-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
4451 // CHECK8-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
4452 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4
4453 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4454 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
4455 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4456 // CHECK8: omp.precond.then:
4457 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4458 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4459 // CHECK8-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
4460 // CHECK8-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4461 // CHECK8-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP5]] to i32
4462 // CHECK8-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4463 // CHECK8-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
4464 // CHECK8-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
4465 // CHECK8-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
4466 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4467 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4468 // CHECK8-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4469 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4470 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
4471 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4472 // CHECK8: omp.dispatch.cond:
4473 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4474 // CHECK8-NEXT: [[CONV7:%.*]] = sext i32 [[TMP9]] to i64
4475 // CHECK8-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4476 // CHECK8-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP10]]
4477 // CHECK8-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4478 // CHECK8: cond.true:
4479 // CHECK8-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4480 // CHECK8-NEXT: br label [[COND_END:%.*]]
4481 // CHECK8: cond.false:
4482 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4483 // CHECK8-NEXT: [[CONV9:%.*]] = sext i32 [[TMP12]] to i64
4484 // CHECK8-NEXT: br label [[COND_END]]
4485 // CHECK8: cond.end:
4486 // CHECK8-NEXT: [[COND:%.*]] = phi i64 [ [[TMP11]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ]
4487 // CHECK8-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32
4488 // CHECK8-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4
4489 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4490 // CHECK8-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
4491 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4492 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4493 // CHECK8-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
4494 // CHECK8-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4495 // CHECK8: omp.dispatch.body:
4496 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4497 // CHECK8: omp.inner.for.cond:
4498 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4499 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4500 // CHECK8-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
4501 // CHECK8-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4502 // CHECK8: omp.inner.for.body:
4503 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4504 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
4505 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4506 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I6]], align 4
4507 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
4508 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
4509 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
4510 // CHECK8-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
4511 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4
4512 // CHECK8-NEXT: store i32 [[TMP20]], i32* [[CONV1]], align 8
4513 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4514 // CHECK8: omp.body.continue:
4515 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4516 // CHECK8: omp.inner.for.inc:
4517 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4518 // CHECK8-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP21]], 1
4519 // CHECK8-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
4520 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
4521 // CHECK8: omp.inner.for.end:
4522 // CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4523 // CHECK8: omp.dispatch.inc:
4524 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4525 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4526 // CHECK8-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
4527 // CHECK8-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_LB]], align 4
4528 // CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4529 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4530 // CHECK8-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
4531 // CHECK8-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_UB]], align 4
4532 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND]]
4533 // CHECK8: omp.dispatch.end:
4534 // CHECK8-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4535 // CHECK8-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
4536 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
4537 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4538 // CHECK8-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4539 // CHECK8-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4540 // CHECK8: .omp.final.then:
4541 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4542 // CHECK8-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP30]], 0
4543 // CHECK8-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1
4544 // CHECK8-NEXT: [[MUL18:%.*]] = mul nsw i32 [[DIV17]], 1
4545 // CHECK8-NEXT: [[ADD19:%.*]] = add nsw i32 0, [[MUL18]]
4546 // CHECK8-NEXT: store i32 [[ADD19]], i32* [[I6]], align 4
4547 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
4548 // CHECK8: .omp.final.done:
4549 // CHECK8-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4550 // CHECK8-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
4551 // CHECK8-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
4552 // CHECK8: .omp.lastprivate.then:
4553 // CHECK8-NEXT: [[TMP33:%.*]] = load i32, i32* [[CONV1]], align 8
4554 // CHECK8-NEXT: store i32 [[TMP33]], i32* [[CONV1]], align 8
4555 // CHECK8-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
4556 // CHECK8: .omp.lastprivate.done:
4557 // CHECK8-NEXT: br label [[OMP_PRECOND_END]]
4558 // CHECK8: omp.precond.end:
4559 // CHECK8-NEXT: ret void
4560 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
4561 // CHECK8-SAME: (i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
4562 // CHECK8-NEXT: entry:
4563 // CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4564 // CHECK8-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
4565 // CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4566 // CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
4567 // CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4568 // CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
4569 // CHECK8-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4570 // CHECK8-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
4571 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4572 // CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
4573 // CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
4574 // CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
4575 // CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
4576 // CHECK8: .execute:
4577 // CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
4578 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
4579 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4580 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
4581 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
4582 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
4583 // CHECK8-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
4584 // CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
4585 // CHECK8: .omp.deinit:
4586 // CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
4587 // CHECK8-NEXT: br label [[DOTEXIT:%.*]]
4588 // CHECK8: .exit:
4589 // CHECK8-NEXT: ret void
4590 // CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__2
4591 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
4592 // CHECK8-NEXT: entry:
4593 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4594 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4595 // CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4596 // CHECK8-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
4597 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4598 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
4599 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4600 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4601 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
4602 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4603 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4604 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4605 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4606 // CHECK8-NEXT: [[I3:%.*]] = alloca i32, align 4
4607 // CHECK8-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4608 // CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
4609 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4610 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4611 // CHECK8-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4612 // CHECK8-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
4613 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4614 // CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
4615 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4616 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4617 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4618 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
4619 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4620 // CHECK8-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4621 // CHECK8-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4622 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4
4623 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4624 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
4625 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4626 // CHECK8: omp.precond.then:
4627 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4628 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4629 // CHECK8-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
4630 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4631 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4632 // CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
4633 // CHECK8-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4634 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4635 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
4636 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4637 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4638 // CHECK8-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
4639 // CHECK8-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4640 // CHECK8: cond.true:
4641 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4642 // CHECK8-NEXT: br label [[COND_END:%.*]]
4643 // CHECK8: cond.false:
4644 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4645 // CHECK8-NEXT: br label [[COND_END]]
4646 // CHECK8: cond.end:
4647 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
4648 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4649 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4650 // CHECK8-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
4651 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4652 // CHECK8: omp.inner.for.cond:
4653 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4654 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4655 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
4656 // CHECK8-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
4657 // CHECK8-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4658 // CHECK8: omp.inner.for.body:
4659 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4660 // CHECK8-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
4661 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4662 // CHECK8-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
4663 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
4664 // CHECK8-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4665 // CHECK8-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
4666 // CHECK8-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
4667 // CHECK8-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
4668 // CHECK8-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to i8*
4669 // CHECK8-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8
4670 // CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
4671 // CHECK8-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to i8*
4672 // CHECK8-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8
4673 // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
4674 // CHECK8-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to i8*
4675 // CHECK8-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
4676 // CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
4677 // CHECK8-NEXT: [[TMP27:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
4678 // CHECK8-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
4679 // CHECK8-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4680 // CHECK8-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4
4681 // CHECK8-NEXT: [[TMP30:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
4682 // CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP30]], i64 4)
4683 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4684 // CHECK8: omp.inner.for.inc:
4685 // CHECK8-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4686 // CHECK8-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4687 // CHECK8-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
4688 // CHECK8-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
4689 // CHECK8-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4690 // CHECK8-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4691 // CHECK8-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
4692 // CHECK8-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
4693 // CHECK8-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4694 // CHECK8-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4695 // CHECK8-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
4696 // CHECK8-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
4697 // CHECK8-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4698 // CHECK8-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4699 // CHECK8-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]
4700 // CHECK8-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
4701 // CHECK8: cond.true11:
4702 // CHECK8-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4703 // CHECK8-NEXT: br label [[COND_END13:%.*]]
4704 // CHECK8: cond.false12:
4705 // CHECK8-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4706 // CHECK8-NEXT: br label [[COND_END13]]
4707 // CHECK8: cond.end13:
4708 // CHECK8-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE11]] ], [ [[TMP40]], [[COND_FALSE12]] ]
4709 // CHECK8-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
4710 // CHECK8-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4711 // CHECK8-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV]], align 4
4712 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
4713 // CHECK8: omp.inner.for.end:
4714 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4715 // CHECK8: omp.loop.exit:
4716 // CHECK8-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4717 // CHECK8-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4
4718 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP43]])
4719 // CHECK8-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4720 // CHECK8-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
4721 // CHECK8-NEXT: br i1 [[TMP45]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4722 // CHECK8: .omp.final.then:
4723 // CHECK8-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4724 // CHECK8-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP46]], 0
4725 // CHECK8-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
4726 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
4727 // CHECK8-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
4728 // CHECK8-NEXT: store i32 [[ADD17]], i32* [[I3]], align 4
4729 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
4730 // CHECK8: .omp.final.done:
4731 // CHECK8-NEXT: br label [[OMP_PRECOND_END]]
4732 // CHECK8: omp.precond.end:
4733 // CHECK8-NEXT: ret void
4734 // CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__3
4735 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
4736 // CHECK8-NEXT: entry:
4737 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4738 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4739 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4740 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4741 // CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4742 // CHECK8-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
4743 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4744 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
4745 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4746 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4747 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
4748 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4749 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4750 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4751 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4752 // CHECK8-NEXT: [[I5:%.*]] = alloca i32, align 4
4753 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4754 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4755 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4756 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4757 // CHECK8-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4758 // CHECK8-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
4759 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4760 // CHECK8-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
4761 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4762 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4763 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4764 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
4765 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4766 // CHECK8-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4767 // CHECK8-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4768 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4
4769 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4770 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
4771 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4772 // CHECK8: omp.precond.then:
4773 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4774 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4775 // CHECK8-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
4776 // CHECK8-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4777 // CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
4778 // CHECK8-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4779 // CHECK8-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
4780 // CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
4781 // CHECK8-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
4782 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4783 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4784 // CHECK8-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4785 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4786 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4787 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4788 // CHECK8-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
4789 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4790 // CHECK8: omp.inner.for.cond:
4791 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4792 // CHECK8-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
4793 // CHECK8-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4794 // CHECK8-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
4795 // CHECK8-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4796 // CHECK8: omp.inner.for.body:
4797 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4798 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
4799 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4800 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
4801 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[I5]], align 4
4802 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
4803 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i64 0, i64 [[IDXPROM]]
4804 // CHECK8-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
4805 // CHECK8-NEXT: [[CONV8:%.*]] = sext i16 [[TMP14]] to i32
4806 // CHECK8-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], 1
4807 // CHECK8-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i16
4808 // CHECK8-NEXT: store i16 [[CONV10]], i16* [[ARRAYIDX]], align 2
4809 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4810 // CHECK8: omp.body.continue:
4811 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4812 // CHECK8: omp.inner.for.inc:
4813 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4814 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4815 // CHECK8-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
4816 // CHECK8-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
4817 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
4818 // CHECK8: omp.inner.for.end:
4819 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4820 // CHECK8: omp.loop.exit:
4821 // CHECK8-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4822 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
4823 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
4824 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4825 // CHECK8-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
4826 // CHECK8-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4827 // CHECK8: .omp.final.then:
4828 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4829 // CHECK8-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP21]], 0
4830 // CHECK8-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
4831 // CHECK8-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
4832 // CHECK8-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
4833 // CHECK8-NEXT: store i32 [[ADD15]], i32* [[I5]], align 4
4834 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
4835 // CHECK8: .omp.final.done:
4836 // CHECK8-NEXT: br label [[OMP_PRECOND_END]]
4837 // CHECK8: omp.precond.end:
4838 // CHECK8-NEXT: ret void
4839 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
4840 // CHECK8-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
4841 // CHECK8-NEXT: entry:
4842 // CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
4843 // CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
4844 // CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4845 // CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
4846 // CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
4847 // CHECK8-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
4848 // CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
4849 // CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
4850 // CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
4851 // CHECK8: .execute:
4852 // CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
4853 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
4854 // CHECK8-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
4855 // CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
4856 // CHECK8: .omp.deinit:
4857 // CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
4858 // CHECK8-NEXT: br label [[DOTEXIT:%.*]]
4859 // CHECK8: .exit:
4860 // CHECK8-NEXT: ret void
4861 // CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__4
4862 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
4863 // CHECK8-NEXT: entry:
4864 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4865 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4866 // CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
4867 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4868 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
4869 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4870 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4871 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4872 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4873 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
4874 // CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8
4875 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4876 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4877 // CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
4878 // CHECK8-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
4879 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4880 // CHECK8-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
4881 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4882 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4883 // CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
4884 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4885 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4886 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
4887 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4888 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
4889 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4890 // CHECK8: cond.true:
4891 // CHECK8-NEXT: br label [[COND_END:%.*]]
4892 // CHECK8: cond.false:
4893 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4894 // CHECK8-NEXT: br label [[COND_END]]
4895 // CHECK8: cond.end:
4896 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4897 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4898 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4899 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4900 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4901 // CHECK8: omp.inner.for.cond:
4902 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4903 // CHECK8-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
4904 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4905 // CHECK8: omp.inner.for.body:
4906 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4907 // CHECK8-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4908 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4909 // CHECK8-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4910 // CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
4911 // CHECK8-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8*
4912 // CHECK8-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
4913 // CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
4914 // CHECK8-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8*
4915 // CHECK8-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
4916 // CHECK8-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
4917 // CHECK8-NEXT: [[TMP16:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
4918 // CHECK8-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
4919 // CHECK8-NEXT: [[TMP17:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
4920 // CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP17]], i64 3)
4921 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4922 // CHECK8: omp.inner.for.inc:
4923 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4924 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4925 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
4926 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4927 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4928 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4929 // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
4930 // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
4931 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4932 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4933 // CHECK8-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
4934 // CHECK8-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
4935 // CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4936 // CHECK8-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP24]], 9
4937 // CHECK8-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
4938 // CHECK8: cond.true5:
4939 // CHECK8-NEXT: br label [[COND_END7:%.*]]
4940 // CHECK8: cond.false6:
4941 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4942 // CHECK8-NEXT: br label [[COND_END7]]
4943 // CHECK8: cond.end7:
4944 // CHECK8-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP25]], [[COND_FALSE6]] ]
4945 // CHECK8-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
4946 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4947 // CHECK8-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV]], align 4
4948 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
4949 // CHECK8: omp.inner.for.end:
4950 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4951 // CHECK8: omp.loop.exit:
4952 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4953 // CHECK8-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4954 // CHECK8-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
4955 // CHECK8-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4956 // CHECK8: .omp.final.then:
4957 // CHECK8-NEXT: store i32 10, i32* [[I]], align 4
4958 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
4959 // CHECK8: .omp.final.done:
4960 // CHECK8-NEXT: ret void
4961 // CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__5
4962 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
4963 // CHECK8-NEXT: entry:
4964 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4965 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4966 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4967 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4968 // CHECK8-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
4969 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4970 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
4971 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4972 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4973 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4974 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4975 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
4976 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4977 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4978 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4979 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4980 // CHECK8-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
4981 // CHECK8-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
4982 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4983 // CHECK8-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
4984 // CHECK8-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4985 // CHECK8-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4986 // CHECK8-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4987 // CHECK8-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4988 // CHECK8-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4989 // CHECK8-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4990 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4991 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4992 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4993 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4994 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4995 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4996 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4997 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4998 // CHECK8: omp.inner.for.cond:
4999 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5000 // CHECK8-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
5001 // CHECK8-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5002 // CHECK8-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
5003 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5004 // CHECK8: omp.inner.for.body:
5005 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5006 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
5007 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5008 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5009 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
5010 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
5011 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
5012 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
5013 // CHECK8-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5014 // CHECK8-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4
5015 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5016 // CHECK8: omp.body.continue:
5017 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5018 // CHECK8: omp.inner.for.inc:
5019 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5020 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5021 // CHECK8-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5022 // CHECK8-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
5023 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
5024 // CHECK8: omp.inner.for.end:
5025 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5026 // CHECK8: omp.loop.exit:
5027 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5028 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5029 // CHECK8-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5030 // CHECK8-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5031 // CHECK8: .omp.final.then:
5032 // CHECK8-NEXT: store i32 10, i32* [[I]], align 4
5033 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
5034 // CHECK8: .omp.final.done:
5035 // CHECK8-NEXT: ret void
5036 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
5037 // CHECK8-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
5038 // CHECK8-NEXT: entry:
5039 // CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
5040 // CHECK8-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
5041 // CHECK8-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
5042 // CHECK8-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
5043 // CHECK8-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5044 // CHECK8-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
5045 // CHECK8-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
5046 // CHECK8-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
5047 // CHECK8-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
5048 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
5049 // CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
5050 // CHECK8-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
5051 // CHECK8-NEXT: br label [[DOTEXECUTE:%.*]]
5052 // CHECK8: .execute:
5053 // CHECK8-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
5054 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
5055 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[F_CASTED]] to i32*
5056 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
5057 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[F_CASTED]], align 8
5058 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
5059 // CHECK8-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i64 [[TMP3]]) #[[ATTR3]]
5060 // CHECK8-NEXT: br label [[DOTOMP_DEINIT:%.*]]
5061 // CHECK8: .omp.deinit:
5062 // CHECK8-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
5063 // CHECK8-NEXT: br label [[DOTEXIT:%.*]]
5064 // CHECK8: .exit:
5065 // CHECK8-NEXT: ret void
5066 // CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__6
5067 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
5068 // CHECK8-NEXT: entry:
5069 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5070 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5071 // CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
5072 // CHECK8-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
5073 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5074 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
5075 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
5076 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5077 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5078 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5079 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5080 // CHECK8-NEXT: [[K:%.*]] = alloca i32, align 4
5081 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
5082 // CHECK8-NEXT: [[J:%.*]] = alloca i32, align 4
5083 // CHECK8-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
5084 // CHECK8-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
5085 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5086 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5087 // CHECK8-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
5088 // CHECK8-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
5089 // CHECK8-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
5090 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
5091 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5092 // CHECK8-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5093 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5094 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5095 // CHECK8-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
5096 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5097 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5098 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
5099 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5100 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
5101 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5102 // CHECK8: cond.true:
5103 // CHECK8-NEXT: br label [[COND_END:%.*]]
5104 // CHECK8: cond.false:
5105 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5106 // CHECK8-NEXT: br label [[COND_END]]
5107 // CHECK8: cond.end:
5108 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5109 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5110 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5111 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5112 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5113 // CHECK8: omp.inner.for.cond:
5114 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5115 // CHECK8-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
5116 // CHECK8-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5117 // CHECK8: omp.inner.for.body:
5118 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5119 // CHECK8-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5120 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5121 // CHECK8-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5122 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8
5123 // CHECK8-NEXT: [[CONV3:%.*]] = bitcast i64* [[F_CASTED]] to i32*
5124 // CHECK8-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
5125 // CHECK8-NEXT: [[TMP12:%.*]] = load i64, i64* [[F_CASTED]], align 8
5126 // CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
5127 // CHECK8-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to i8*
5128 // CHECK8-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
5129 // CHECK8-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
5130 // CHECK8-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to i8*
5131 // CHECK8-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
5132 // CHECK8-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
5133 // CHECK8-NEXT: [[TMP18:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
5134 // CHECK8-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8
5135 // CHECK8-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
5136 // CHECK8-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP12]] to i8*
5137 // CHECK8-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8
5138 // CHECK8-NEXT: [[TMP21:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
5139 // CHECK8-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x [10 x i32]]*, i64)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP21]], i64 4)
5140 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5141 // CHECK8: omp.inner.for.inc:
5142 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5143 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5144 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
5145 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5146 // CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5147 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5148 // CHECK8-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
5149 // CHECK8-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4
5150 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5151 // CHECK8-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5152 // CHECK8-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
5153 // CHECK8-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4
5154 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5155 // CHECK8-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP28]], 99
5156 // CHECK8-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
5157 // CHECK8: cond.true7:
5158 // CHECK8-NEXT: br label [[COND_END9:%.*]]
5159 // CHECK8: cond.false8:
5160 // CHECK8-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5161 // CHECK8-NEXT: br label [[COND_END9]]
5162 // CHECK8: cond.end9:
5163 // CHECK8-NEXT: [[COND10:%.*]] = phi i32 [ 99, [[COND_TRUE7]] ], [ [[TMP29]], [[COND_FALSE8]] ]
5164 // CHECK8-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4
5165 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5166 // CHECK8-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4
5167 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
5168 // CHECK8: omp.inner.for.end:
5169 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5170 // CHECK8: omp.loop.exit:
5171 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5172 // CHECK8-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5173 // CHECK8-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
5174 // CHECK8-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5175 // CHECK8: .omp.final.then:
5176 // CHECK8-NEXT: store i32 10, i32* [[I]], align 4
5177 // CHECK8-NEXT: store i32 10, i32* [[J]], align 4
5178 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
5179 // CHECK8: .omp.final.done:
5180 // CHECK8-NEXT: ret void
5181 // CHECK8-LABEL: define {{[^@]+}}@__omp_outlined__7
5182 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
5183 // CHECK8-NEXT: entry:
5184 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5185 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5186 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5187 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5188 // CHECK8-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
5189 // CHECK8-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
5190 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5191 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
5192 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
5193 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5194 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5195 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5196 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5197 // CHECK8-NEXT: [[K:%.*]] = alloca i32, align 4
5198 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
5199 // CHECK8-NEXT: [[J:%.*]] = alloca i32, align 4
5200 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5201 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5202 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5203 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5204 // CHECK8-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
5205 // CHECK8-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
5206 // CHECK8-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
5207 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
5208 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5209 // CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5210 // CHECK8-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5211 // CHECK8-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
5212 // CHECK8-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5213 // CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP2]] to i32
5214 // CHECK8-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
5215 // CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
5216 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5217 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5218 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5219 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5220 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5221 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5222 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5223 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5224 // CHECK8: omp.inner.for.cond:
5225 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5226 // CHECK8-NEXT: [[CONV4:%.*]] = sext i32 [[TMP6]] to i64
5227 // CHECK8-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5228 // CHECK8-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV4]], [[TMP7]]
5229 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5230 // CHECK8: omp.inner.for.body:
5231 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5232 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
5233 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
5234 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5235 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5236 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5237 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5238 // CHECK8-NEXT: [[DIV5:%.*]] = sdiv i32 [[TMP10]], 10
5239 // CHECK8-NEXT: [[MUL6:%.*]] = mul nsw i32 [[DIV5]], 10
5240 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL6]]
5241 // CHECK8-NEXT: [[MUL7:%.*]] = mul nsw i32 [[SUB]], 1
5242 // CHECK8-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
5243 // CHECK8-NEXT: store i32 [[ADD8]], i32* [[J]], align 4
5244 // CHECK8-NEXT: store i32 10, i32* [[K]], align 4
5245 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
5246 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
5247 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[CONV]], align 8
5248 // CHECK8-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
5249 // CHECK8-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP11]], [[MUL9]]
5250 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
5251 // CHECK8-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD10]], [[TMP14]]
5252 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
5253 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
5254 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
5255 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
5256 // CHECK8-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP16]] to i64
5257 // CHECK8-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM12]]
5258 // CHECK8-NEXT: store i32 [[ADD11]], i32* [[ARRAYIDX13]], align 4
5259 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5260 // CHECK8: omp.body.continue:
5261 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5262 // CHECK8: omp.inner.for.inc:
5263 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5264 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5265 // CHECK8-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
5266 // CHECK8-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
5267 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
5268 // CHECK8: omp.inner.for.end:
5269 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5270 // CHECK8: omp.loop.exit:
5271 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5272 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5273 // CHECK8-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
5274 // CHECK8-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5275 // CHECK8: .omp.final.then:
5276 // CHECK8-NEXT: store i32 10, i32* [[I]], align 4
5277 // CHECK8-NEXT: store i32 10, i32* [[J]], align 4
5278 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
5279 // CHECK8: .omp.final.done:
5280 // CHECK8-NEXT: ret void
5281 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
5282 // CHECK9-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
5283 // CHECK9-NEXT: entry:
5284 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5285 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
5286 // CHECK9-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
5287 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
5288 // CHECK9-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
5289 // CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
5290 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5291 // CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
5292 // CHECK9-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5293 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
5294 // CHECK9-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
5295 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
5296 // CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
5297 // CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
5298 // CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
5299 // CHECK9: .execute:
5300 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
5301 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
5302 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
5303 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
5304 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
5305 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
5306 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
5307 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
5308 // CHECK9-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
5309 // CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
5310 // CHECK9: .omp.deinit:
5311 // CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
5312 // CHECK9-NEXT: br label [[DOTEXIT:%.*]]
5313 // CHECK9: .exit:
5314 // CHECK9-NEXT: ret void
5315 // CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__
5316 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
5317 // CHECK9-NEXT: entry:
5318 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5319 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5320 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5321 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
5322 // CHECK9-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
5323 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5324 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5325 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5326 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5327 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5328 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5329 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5330 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5331 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5332 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4
5333 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
5334 // CHECK9-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
5335 // CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
5336 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5337 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5338 // CHECK9-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5339 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
5340 // CHECK9-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
5341 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
5342 // CHECK9-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
5343 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4
5344 // CHECK9-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
5345 // CHECK9-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4
5346 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 0
5347 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
5348 // CHECK9-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
5349 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
5350 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
5351 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5352 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
5353 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5354 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5355 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5356 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
5357 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5358 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
5359 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5360 // CHECK9: omp.precond.then:
5361 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5362 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5363 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
5364 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5365 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5366 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5367 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
5368 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
5369 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5370 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5371 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
5372 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5373 // CHECK9: cond.true:
5374 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5375 // CHECK9-NEXT: br label [[COND_END:%.*]]
5376 // CHECK9: cond.false:
5377 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5378 // CHECK9-NEXT: br label [[COND_END]]
5379 // CHECK9: cond.end:
5380 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
5381 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5382 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5383 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
5384 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5385 // CHECK9: omp.inner.for.cond:
5386 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5387 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5388 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
5389 // CHECK9-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
5390 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5391 // CHECK9: omp.inner.for.body:
5392 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5393 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5394 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
5395 // CHECK9-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
5396 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
5397 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[L_ADDR]], align 4
5398 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[L_CASTED]], align 4
5399 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[L_CASTED]], align 4
5400 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
5401 // CHECK9-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP19]] to i8*
5402 // CHECK9-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
5403 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
5404 // CHECK9-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP20]] to i8*
5405 // CHECK9-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
5406 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
5407 // CHECK9-NEXT: [[TMP30:%.*]] = inttoptr i32 [[TMP22]] to i8*
5408 // CHECK9-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
5409 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
5410 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
5411 // CHECK9-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4
5412 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
5413 // CHECK9-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP24]] to i8*
5414 // CHECK9-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4
5415 // CHECK9-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5416 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
5417 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
5418 // CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP37]], i32 5)
5419 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5420 // CHECK9: omp.inner.for.inc:
5421 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5422 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5423 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
5424 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
5425 // CHECK9-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5426 // CHECK9-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5427 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
5428 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
5429 // CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5430 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5431 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
5432 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
5433 // CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5434 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5435 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP44]], [[TMP45]]
5436 // CHECK9-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
5437 // CHECK9: cond.true11:
5438 // CHECK9-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5439 // CHECK9-NEXT: br label [[COND_END13:%.*]]
5440 // CHECK9: cond.false12:
5441 // CHECK9-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5442 // CHECK9-NEXT: br label [[COND_END13]]
5443 // CHECK9: cond.end13:
5444 // CHECK9-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP46]], [[COND_TRUE11]] ], [ [[TMP47]], [[COND_FALSE12]] ]
5445 // CHECK9-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
5446 // CHECK9-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5447 // CHECK9-NEXT: store i32 [[TMP48]], i32* [[DOTOMP_IV]], align 4
5448 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
5449 // CHECK9: omp.inner.for.end:
5450 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5451 // CHECK9: omp.loop.exit:
5452 // CHECK9-NEXT: [[TMP49:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5453 // CHECK9-NEXT: [[TMP50:%.*]] = load i32, i32* [[TMP49]], align 4
5454 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]])
5455 // CHECK9-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5456 // CHECK9-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
5457 // CHECK9-NEXT: br i1 [[TMP52]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5458 // CHECK9: .omp.final.then:
5459 // CHECK9-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5460 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP53]], 0
5461 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
5462 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
5463 // CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
5464 // CHECK9-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
5465 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5466 // CHECK9: .omp.final.done:
5467 // CHECK9-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5468 // CHECK9-NEXT: [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
5469 // CHECK9-NEXT: br i1 [[TMP55]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
5470 // CHECK9: .omp.lastprivate.then:
5471 // CHECK9-NEXT: [[TMP56:%.*]] = load i32, i32* [[L_ADDR]], align 4
5472 // CHECK9-NEXT: store i32 [[TMP56]], i32* [[L_ADDR]], align 4
5473 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
5474 // CHECK9: .omp.lastprivate.done:
5475 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
5476 // CHECK9: omp.precond.end:
5477 // CHECK9-NEXT: [[TMP57:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
5478 // CHECK9-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP57]])
5479 // CHECK9-NEXT: ret void
5480 // CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__1
5481 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
5482 // CHECK9-NEXT: entry:
5483 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5484 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5485 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5486 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5487 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5488 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
5489 // CHECK9-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
5490 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5491 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5492 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5493 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5494 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5495 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5496 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5497 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5498 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5499 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
5500 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5501 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5502 // CHECK9-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5503 // CHECK9-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5504 // CHECK9-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5505 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
5506 // CHECK9-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
5507 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
5508 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
5509 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
5510 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5511 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
5512 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5513 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5514 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5515 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
5516 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5517 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
5518 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5519 // CHECK9: omp.precond.then:
5520 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5521 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5522 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
5523 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5524 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5525 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
5526 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
5527 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5528 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5529 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5530 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
5531 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
5532 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5533 // CHECK9: omp.dispatch.cond:
5534 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5535 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5536 // CHECK9-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
5537 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5538 // CHECK9: cond.true:
5539 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5540 // CHECK9-NEXT: br label [[COND_END:%.*]]
5541 // CHECK9: cond.false:
5542 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5543 // CHECK9-NEXT: br label [[COND_END]]
5544 // CHECK9: cond.end:
5545 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
5546 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5547 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5548 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
5549 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5550 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5551 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
5552 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5553 // CHECK9: omp.dispatch.body:
5554 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5555 // CHECK9: omp.inner.for.cond:
5556 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5557 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5558 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
5559 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5560 // CHECK9: omp.inner.for.body:
5561 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5562 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
5563 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5564 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
5565 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
5566 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
5567 // CHECK9-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
5568 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
5569 // CHECK9-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
5570 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5571 // CHECK9: omp.body.continue:
5572 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5573 // CHECK9: omp.inner.for.inc:
5574 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5575 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
5576 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
5577 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
5578 // CHECK9: omp.inner.for.end:
5579 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5580 // CHECK9: omp.dispatch.inc:
5581 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5582 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5583 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
5584 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
5585 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5586 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5587 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
5588 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
5589 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
5590 // CHECK9: omp.dispatch.end:
5591 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5592 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
5593 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
5594 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5595 // CHECK9-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
5596 // CHECK9-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5597 // CHECK9: .omp.final.then:
5598 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5599 // CHECK9-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
5600 // CHECK9-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
5601 // CHECK9-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
5602 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
5603 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
5604 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5605 // CHECK9: .omp.final.done:
5606 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5607 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
5608 // CHECK9-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
5609 // CHECK9: .omp.lastprivate.then:
5610 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
5611 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
5612 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
5613 // CHECK9: .omp.lastprivate.done:
5614 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
5615 // CHECK9: omp.precond.end:
5616 // CHECK9-NEXT: ret void
5617 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
5618 // CHECK9-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
5619 // CHECK9-NEXT: entry:
5620 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5621 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
5622 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
5623 // CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
5624 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5625 // CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
5626 // CHECK9-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5627 // CHECK9-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
5628 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
5629 // CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
5630 // CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
5631 // CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
5632 // CHECK9: .execute:
5633 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
5634 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
5635 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
5636 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
5637 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
5638 // CHECK9-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
5639 // CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
5640 // CHECK9: .omp.deinit:
5641 // CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
5642 // CHECK9-NEXT: br label [[DOTEXIT:%.*]]
5643 // CHECK9: .exit:
5644 // CHECK9-NEXT: ret void
5645 // CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__2
5646 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
5647 // CHECK9-NEXT: entry:
5648 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5649 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5650 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5651 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
5652 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5653 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5654 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5655 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5656 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5657 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5658 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5659 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5660 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5661 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
5662 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
5663 // CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
5664 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5665 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5666 // CHECK9-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5667 // CHECK9-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
5668 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
5669 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
5670 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
5671 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5672 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
5673 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5674 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5675 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5676 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
5677 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5678 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
5679 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5680 // CHECK9: omp.precond.then:
5681 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5682 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5683 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
5684 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5685 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5686 // CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
5687 // CHECK9-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5688 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5689 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
5690 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5691 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5692 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
5693 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5694 // CHECK9: cond.true:
5695 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5696 // CHECK9-NEXT: br label [[COND_END:%.*]]
5697 // CHECK9: cond.false:
5698 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5699 // CHECK9-NEXT: br label [[COND_END]]
5700 // CHECK9: cond.end:
5701 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
5702 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5703 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5704 // CHECK9-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
5705 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5706 // CHECK9: omp.inner.for.cond:
5707 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5708 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5709 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
5710 // CHECK9-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
5711 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5712 // CHECK9: omp.inner.for.body:
5713 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5714 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5715 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
5716 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
5717 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
5718 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
5719 // CHECK9-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
5720 // CHECK9-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
5721 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
5722 // CHECK9-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
5723 // CHECK9-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
5724 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
5725 // CHECK9-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
5726 // CHECK9-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
5727 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
5728 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
5729 // CHECK9-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
5730 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5731 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
5732 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
5733 // CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
5734 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5735 // CHECK9: omp.inner.for.inc:
5736 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5737 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5738 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
5739 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
5740 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5741 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5742 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
5743 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
5744 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5745 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5746 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
5747 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
5748 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5749 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5750 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
5751 // CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
5752 // CHECK9: cond.true10:
5753 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5754 // CHECK9-NEXT: br label [[COND_END12:%.*]]
5755 // CHECK9: cond.false11:
5756 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5757 // CHECK9-NEXT: br label [[COND_END12]]
5758 // CHECK9: cond.end12:
5759 // CHECK9-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
5760 // CHECK9-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
5761 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5762 // CHECK9-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
5763 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
5764 // CHECK9: omp.inner.for.end:
5765 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5766 // CHECK9: omp.loop.exit:
5767 // CHECK9-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5768 // CHECK9-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
5769 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
5770 // CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5771 // CHECK9-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
5772 // CHECK9-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5773 // CHECK9: .omp.final.then:
5774 // CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5775 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
5776 // CHECK9-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
5777 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
5778 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
5779 // CHECK9-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
5780 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5781 // CHECK9: .omp.final.done:
5782 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
5783 // CHECK9: omp.precond.end:
5784 // CHECK9-NEXT: ret void
5785 // CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__3
5786 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
5787 // CHECK9-NEXT: entry:
5788 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5789 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5790 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5791 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5792 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5793 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
5794 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5795 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5796 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5797 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5798 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5799 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5800 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5801 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5802 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5803 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
5804 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5805 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5806 // CHECK9-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5807 // CHECK9-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5808 // CHECK9-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5809 // CHECK9-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
5810 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
5811 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
5812 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
5813 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5814 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
5815 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5816 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5817 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5818 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
5819 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5820 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
5821 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5822 // CHECK9: omp.precond.then:
5823 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5824 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5825 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
5826 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5827 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5828 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
5829 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
5830 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5831 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5832 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5833 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
5834 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5835 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5836 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
5837 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5838 // CHECK9: omp.inner.for.cond:
5839 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5840 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5841 // CHECK9-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
5842 // CHECK9-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5843 // CHECK9: omp.inner.for.body:
5844 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5845 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
5846 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5847 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
5848 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
5849 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
5850 // CHECK9-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
5851 // CHECK9-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
5852 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
5853 // CHECK9-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
5854 // CHECK9-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
5855 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5856 // CHECK9: omp.body.continue:
5857 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5858 // CHECK9: omp.inner.for.inc:
5859 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5860 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5861 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
5862 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
5863 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
5864 // CHECK9: omp.inner.for.end:
5865 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5866 // CHECK9: omp.loop.exit:
5867 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5868 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
5869 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
5870 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5871 // CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
5872 // CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5873 // CHECK9: .omp.final.then:
5874 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5875 // CHECK9-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
5876 // CHECK9-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
5877 // CHECK9-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
5878 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
5879 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
5880 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5881 // CHECK9: .omp.final.done:
5882 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
5883 // CHECK9: omp.precond.end:
5884 // CHECK9-NEXT: ret void
5885 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
5886 // CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
5887 // CHECK9-NEXT: entry:
5888 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
5889 // CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
5890 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5891 // CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
5892 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
5893 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
5894 // CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
5895 // CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
5896 // CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
5897 // CHECK9: .execute:
5898 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
5899 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
5900 // CHECK9-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
5901 // CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
5902 // CHECK9: .omp.deinit:
5903 // CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
5904 // CHECK9-NEXT: br label [[DOTEXIT:%.*]]
5905 // CHECK9: .exit:
5906 // CHECK9-NEXT: ret void
5907 // CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__4
5908 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
5909 // CHECK9-NEXT: entry:
5910 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5911 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5912 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
5913 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5914 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5915 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5916 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5917 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5918 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5919 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5920 // CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
5921 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5922 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5923 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
5924 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
5925 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5926 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
5927 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5928 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5929 // CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
5930 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5931 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5932 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
5933 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5934 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
5935 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5936 // CHECK9: cond.true:
5937 // CHECK9-NEXT: br label [[COND_END:%.*]]
5938 // CHECK9: cond.false:
5939 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5940 // CHECK9-NEXT: br label [[COND_END]]
5941 // CHECK9: cond.end:
5942 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5943 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5944 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5945 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5946 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5947 // CHECK9: omp.inner.for.cond:
5948 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5949 // CHECK9-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
5950 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5951 // CHECK9: omp.inner.for.body:
5952 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5953 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5954 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
5955 // CHECK9-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
5956 // CHECK9-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
5957 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
5958 // CHECK9-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
5959 // CHECK9-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
5960 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
5961 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
5962 // CHECK9-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
5963 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
5964 // CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
5965 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5966 // CHECK9: omp.inner.for.inc:
5967 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5968 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5969 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
5970 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5971 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5972 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5973 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
5974 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
5975 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5976 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5977 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
5978 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
5979 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5980 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
5981 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
5982 // CHECK9: cond.true5:
5983 // CHECK9-NEXT: br label [[COND_END7:%.*]]
5984 // CHECK9: cond.false6:
5985 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5986 // CHECK9-NEXT: br label [[COND_END7]]
5987 // CHECK9: cond.end7:
5988 // CHECK9-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
5989 // CHECK9-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
5990 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5991 // CHECK9-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
5992 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
5993 // CHECK9: omp.inner.for.end:
5994 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5995 // CHECK9: omp.loop.exit:
5996 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5997 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5998 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
5999 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6000 // CHECK9: .omp.final.then:
6001 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
6002 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
6003 // CHECK9: .omp.final.done:
6004 // CHECK9-NEXT: ret void
6005 // CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__5
6006 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
6007 // CHECK9-NEXT: entry:
6008 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6009 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6010 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6011 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6012 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
6013 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6014 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
6015 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6016 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6017 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6018 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6019 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
6020 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6021 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6022 // CHECK9-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6023 // CHECK9-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6024 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
6025 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
6026 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6027 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6028 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6029 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6030 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6031 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6032 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6033 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6034 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6035 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6036 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6037 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6038 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6039 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6040 // CHECK9: omp.inner.for.cond:
6041 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6042 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6043 // CHECK9-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
6044 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6045 // CHECK9: omp.inner.for.body:
6046 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6047 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
6048 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6049 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6050 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
6051 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
6052 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
6053 // CHECK9-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
6054 // CHECK9-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
6055 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6056 // CHECK9: omp.body.continue:
6057 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6058 // CHECK9: omp.inner.for.inc:
6059 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6060 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6061 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6062 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
6063 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
6064 // CHECK9: omp.inner.for.end:
6065 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6066 // CHECK9: omp.loop.exit:
6067 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6068 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6069 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6070 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6071 // CHECK9: .omp.final.then:
6072 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
6073 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
6074 // CHECK9: .omp.final.done:
6075 // CHECK9-NEXT: ret void
6076 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
6077 // CHECK9-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
6078 // CHECK9-NEXT: entry:
6079 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
6080 // CHECK9-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
6081 // CHECK9-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
6082 // CHECK9-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
6083 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6084 // CHECK9-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
6085 // CHECK9-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
6086 // CHECK9-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
6087 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
6088 // CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
6089 // CHECK9-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
6090 // CHECK9-NEXT: br label [[DOTEXECUTE:%.*]]
6091 // CHECK9: .execute:
6092 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
6093 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
6094 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
6095 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
6096 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
6097 // CHECK9-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
6098 // CHECK9-NEXT: br label [[DOTOMP_DEINIT:%.*]]
6099 // CHECK9: .omp.deinit:
6100 // CHECK9-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
6101 // CHECK9-NEXT: br label [[DOTEXIT:%.*]]
6102 // CHECK9: .exit:
6103 // CHECK9-NEXT: ret void
6104 // CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__6
6105 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
6106 // CHECK9-NEXT: entry:
6107 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6108 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6109 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
6110 // CHECK9-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
6111 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6112 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
6113 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
6114 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6115 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6116 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6117 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6118 // CHECK9-NEXT: [[K:%.*]] = alloca i32, align 4
6119 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
6120 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
6121 // CHECK9-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
6122 // CHECK9-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
6123 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6124 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6125 // CHECK9-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
6126 // CHECK9-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
6127 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
6128 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6129 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6130 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6131 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6132 // CHECK9-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
6133 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6134 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6135 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
6136 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6137 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
6138 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6139 // CHECK9: cond.true:
6140 // CHECK9-NEXT: br label [[COND_END:%.*]]
6141 // CHECK9: cond.false:
6142 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6143 // CHECK9-NEXT: br label [[COND_END]]
6144 // CHECK9: cond.end:
6145 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6146 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6147 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6148 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6149 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6150 // CHECK9: omp.inner.for.cond:
6151 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6152 // CHECK9-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
6153 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6154 // CHECK9: omp.inner.for.body:
6155 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6156 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6157 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
6158 // CHECK9-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
6159 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
6160 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
6161 // CHECK9-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
6162 // CHECK9-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
6163 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
6164 // CHECK9-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
6165 // CHECK9-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
6166 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
6167 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
6168 // CHECK9-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
6169 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
6170 // CHECK9-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
6171 // CHECK9-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
6172 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
6173 // CHECK9-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
6174 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6175 // CHECK9: omp.inner.for.inc:
6176 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6177 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6178 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
6179 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6180 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6181 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6182 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
6183 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
6184 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6185 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6186 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
6187 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
6188 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6189 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
6190 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
6191 // CHECK9: cond.true6:
6192 // CHECK9-NEXT: br label [[COND_END8:%.*]]
6193 // CHECK9: cond.false7:
6194 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6195 // CHECK9-NEXT: br label [[COND_END8]]
6196 // CHECK9: cond.end8:
6197 // CHECK9-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
6198 // CHECK9-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
6199 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6200 // CHECK9-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
6201 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
6202 // CHECK9: omp.inner.for.end:
6203 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6204 // CHECK9: omp.loop.exit:
6205 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6206 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6207 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
6208 // CHECK9-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6209 // CHECK9: .omp.final.then:
6210 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
6211 // CHECK9-NEXT: store i32 10, i32* [[J]], align 4
6212 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
6213 // CHECK9: .omp.final.done:
6214 // CHECK9-NEXT: ret void
6215 // CHECK9-LABEL: define {{[^@]+}}@__omp_outlined__7
6216 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
6217 // CHECK9-NEXT: entry:
6218 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6219 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6220 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6221 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6222 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
6223 // CHECK9-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
6224 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6225 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
6226 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
6227 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6228 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6229 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6230 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6231 // CHECK9-NEXT: [[K:%.*]] = alloca i32, align 4
6232 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
6233 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
6234 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6235 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6236 // CHECK9-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6237 // CHECK9-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6238 // CHECK9-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
6239 // CHECK9-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
6240 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
6241 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6242 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6243 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6244 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6245 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6246 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6247 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6248 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6249 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6250 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6251 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6252 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6253 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6254 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6255 // CHECK9: omp.inner.for.cond:
6256 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6257 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6258 // CHECK9-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
6259 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6260 // CHECK9: omp.inner.for.body:
6261 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6262 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
6263 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
6264 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6265 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6266 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6267 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6268 // CHECK9-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
6269 // CHECK9-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
6270 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
6271 // CHECK9-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
6272 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
6273 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
6274 // CHECK9-NEXT: store i32 10, i32* [[K]], align 4
6275 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6276 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
6277 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
6278 // CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
6279 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
6280 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
6281 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
6282 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
6283 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
6284 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
6285 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
6286 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
6287 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6288 // CHECK9: omp.body.continue:
6289 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6290 // CHECK9: omp.inner.for.inc:
6291 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6292 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6293 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
6294 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
6295 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
6296 // CHECK9: omp.inner.for.end:
6297 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6298 // CHECK9: omp.loop.exit:
6299 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6300 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6301 // CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
6302 // CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6303 // CHECK9: .omp.final.then:
6304 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
6305 // CHECK9-NEXT: store i32 10, i32* [[J]], align 4
6306 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
6307 // CHECK9: .omp.final.done:
6308 // CHECK9-NEXT: ret void
6309 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
6310 // CHECK10-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
6311 // CHECK10-NEXT: entry:
6312 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6313 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
6314 // CHECK10-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
6315 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
6316 // CHECK10-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
6317 // CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
6318 // CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6319 // CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
6320 // CHECK10-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6321 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
6322 // CHECK10-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
6323 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
6324 // CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
6325 // CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
6326 // CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
6327 // CHECK10: .execute:
6328 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
6329 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
6330 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
6331 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
6332 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
6333 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
6334 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
6335 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
6336 // CHECK10-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
6337 // CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
6338 // CHECK10: .omp.deinit:
6339 // CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
6340 // CHECK10-NEXT: br label [[DOTEXIT:%.*]]
6341 // CHECK10: .exit:
6342 // CHECK10-NEXT: ret void
6343 // CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__
6344 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
6345 // CHECK10-NEXT: entry:
6346 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6347 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6348 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6349 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
6350 // CHECK10-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
6351 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6352 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
6353 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6354 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
6355 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
6356 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6357 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6358 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6359 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6360 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4
6361 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
6362 // CHECK10-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
6363 // CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
6364 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6365 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6366 // CHECK10-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6367 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
6368 // CHECK10-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
6369 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
6370 // CHECK10-NEXT: [[TMP1:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
6371 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* @"_openmp_static_kernel$size", align 4
6372 // CHECK10-NEXT: call void @__kmpc_get_team_static_memory(i16 1, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i32 [[TMP2]], i16 [[TMP1]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**))
6373 // CHECK10-NEXT: [[TMP3:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 4
6374 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 0
6375 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to %struct._globalized_locals_ty*
6376 // CHECK10-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP5]], i32 0, i32 0
6377 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
6378 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
6379 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6380 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
6381 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6382 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
6383 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
6384 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
6385 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6386 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]]
6387 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6388 // CHECK10: omp.precond.then:
6389 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6390 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6391 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_COMB_UB]], align 4
6392 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6393 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6394 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6395 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
6396 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
6397 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6398 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6399 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]]
6400 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6401 // CHECK10: cond.true:
6402 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6403 // CHECK10-NEXT: br label [[COND_END:%.*]]
6404 // CHECK10: cond.false:
6405 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6406 // CHECK10-NEXT: br label [[COND_END]]
6407 // CHECK10: cond.end:
6408 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
6409 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6410 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6411 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
6412 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6413 // CHECK10: omp.inner.for.cond:
6414 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6415 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6416 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
6417 // CHECK10-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP17]], [[ADD]]
6418 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6419 // CHECK10: omp.inner.for.body:
6420 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6421 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6422 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
6423 // CHECK10-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
6424 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
6425 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[L_ADDR]], align 4
6426 // CHECK10-NEXT: store i32 [[TMP23]], i32* [[L_CASTED]], align 4
6427 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[L_CASTED]], align 4
6428 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
6429 // CHECK10-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP19]] to i8*
6430 // CHECK10-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
6431 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
6432 // CHECK10-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP20]] to i8*
6433 // CHECK10-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
6434 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
6435 // CHECK10-NEXT: [[TMP30:%.*]] = inttoptr i32 [[TMP22]] to i8*
6436 // CHECK10-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
6437 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
6438 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
6439 // CHECK10-NEXT: store i8* [[TMP32]], i8** [[TMP31]], align 4
6440 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
6441 // CHECK10-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP24]] to i8*
6442 // CHECK10-NEXT: store i8* [[TMP34]], i8** [[TMP33]], align 4
6443 // CHECK10-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6444 // CHECK10-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
6445 // CHECK10-NEXT: [[TMP37:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
6446 // CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP37]], i32 5)
6447 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6448 // CHECK10: omp.inner.for.inc:
6449 // CHECK10-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6450 // CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6451 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
6452 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
6453 // CHECK10-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6454 // CHECK10-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6455 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP40]], [[TMP41]]
6456 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
6457 // CHECK10-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6458 // CHECK10-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6459 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP42]], [[TMP43]]
6460 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
6461 // CHECK10-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6462 // CHECK10-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6463 // CHECK10-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP44]], [[TMP45]]
6464 // CHECK10-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
6465 // CHECK10: cond.true11:
6466 // CHECK10-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6467 // CHECK10-NEXT: br label [[COND_END13:%.*]]
6468 // CHECK10: cond.false12:
6469 // CHECK10-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6470 // CHECK10-NEXT: br label [[COND_END13]]
6471 // CHECK10: cond.end13:
6472 // CHECK10-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP46]], [[COND_TRUE11]] ], [ [[TMP47]], [[COND_FALSE12]] ]
6473 // CHECK10-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
6474 // CHECK10-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6475 // CHECK10-NEXT: store i32 [[TMP48]], i32* [[DOTOMP_IV]], align 4
6476 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
6477 // CHECK10: omp.inner.for.end:
6478 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6479 // CHECK10: omp.loop.exit:
6480 // CHECK10-NEXT: [[TMP49:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6481 // CHECK10-NEXT: [[TMP50:%.*]] = load i32, i32* [[TMP49]], align 4
6482 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]])
6483 // CHECK10-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6484 // CHECK10-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
6485 // CHECK10-NEXT: br i1 [[TMP52]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6486 // CHECK10: .omp.final.then:
6487 // CHECK10-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6488 // CHECK10-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP53]], 0
6489 // CHECK10-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
6490 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
6491 // CHECK10-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
6492 // CHECK10-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
6493 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
6494 // CHECK10: .omp.final.done:
6495 // CHECK10-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6496 // CHECK10-NEXT: [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
6497 // CHECK10-NEXT: br i1 [[TMP55]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
6498 // CHECK10: .omp.lastprivate.then:
6499 // CHECK10-NEXT: [[TMP56:%.*]] = load i32, i32* [[L_ADDR]], align 4
6500 // CHECK10-NEXT: store i32 [[TMP56]], i32* [[L_ADDR]], align 4
6501 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
6502 // CHECK10: .omp.lastprivate.done:
6503 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
6504 // CHECK10: omp.precond.end:
6505 // CHECK10-NEXT: [[TMP57:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2
6506 // CHECK10-NEXT: call void @__kmpc_restore_team_static_memory(i16 1, i16 [[TMP57]])
6507 // CHECK10-NEXT: ret void
6508 // CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__1
6509 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
6510 // CHECK10-NEXT: entry:
6511 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6512 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6513 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6514 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6515 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6516 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
6517 // CHECK10-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
6518 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6519 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
6520 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6521 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6522 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
6523 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6524 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6525 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6526 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6527 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
6528 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6529 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6530 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6531 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6532 // CHECK10-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6533 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
6534 // CHECK10-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
6535 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
6536 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
6537 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
6538 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6539 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
6540 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6541 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6542 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6543 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
6544 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6545 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
6546 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6547 // CHECK10: omp.precond.then:
6548 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6549 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6550 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
6551 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6552 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6553 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
6554 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
6555 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6556 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6557 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6558 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
6559 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
6560 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6561 // CHECK10: omp.dispatch.cond:
6562 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6563 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6564 // CHECK10-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
6565 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6566 // CHECK10: cond.true:
6567 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6568 // CHECK10-NEXT: br label [[COND_END:%.*]]
6569 // CHECK10: cond.false:
6570 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6571 // CHECK10-NEXT: br label [[COND_END]]
6572 // CHECK10: cond.end:
6573 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
6574 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6575 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6576 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
6577 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6578 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6579 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
6580 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6581 // CHECK10: omp.dispatch.body:
6582 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6583 // CHECK10: omp.inner.for.cond:
6584 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6585 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6586 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
6587 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6588 // CHECK10: omp.inner.for.body:
6589 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6590 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
6591 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6592 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
6593 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
6594 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
6595 // CHECK10-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
6596 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
6597 // CHECK10-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
6598 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6599 // CHECK10: omp.body.continue:
6600 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6601 // CHECK10: omp.inner.for.inc:
6602 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6603 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
6604 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
6605 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
6606 // CHECK10: omp.inner.for.end:
6607 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6608 // CHECK10: omp.dispatch.inc:
6609 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6610 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6611 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
6612 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
6613 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6614 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6615 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
6616 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
6617 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]]
6618 // CHECK10: omp.dispatch.end:
6619 // CHECK10-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6620 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
6621 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
6622 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6623 // CHECK10-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
6624 // CHECK10-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6625 // CHECK10: .omp.final.then:
6626 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6627 // CHECK10-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
6628 // CHECK10-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
6629 // CHECK10-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
6630 // CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
6631 // CHECK10-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
6632 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
6633 // CHECK10: .omp.final.done:
6634 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6635 // CHECK10-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
6636 // CHECK10-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
6637 // CHECK10: .omp.lastprivate.then:
6638 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
6639 // CHECK10-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
6640 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
6641 // CHECK10: .omp.lastprivate.done:
6642 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
6643 // CHECK10: omp.precond.end:
6644 // CHECK10-NEXT: ret void
6645 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
6646 // CHECK10-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
6647 // CHECK10-NEXT: entry:
6648 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6649 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
6650 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
6651 // CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
6652 // CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6653 // CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
6654 // CHECK10-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6655 // CHECK10-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
6656 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
6657 // CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
6658 // CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
6659 // CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
6660 // CHECK10: .execute:
6661 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
6662 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
6663 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
6664 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
6665 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
6666 // CHECK10-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
6667 // CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
6668 // CHECK10: .omp.deinit:
6669 // CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
6670 // CHECK10-NEXT: br label [[DOTEXIT:%.*]]
6671 // CHECK10: .exit:
6672 // CHECK10-NEXT: ret void
6673 // CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__2
6674 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
6675 // CHECK10-NEXT: entry:
6676 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6677 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6678 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6679 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
6680 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6681 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
6682 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6683 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6684 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
6685 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6686 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6687 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6688 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6689 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
6690 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
6691 // CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
6692 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6693 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6694 // CHECK10-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6695 // CHECK10-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
6696 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
6697 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
6698 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
6699 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6700 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
6701 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6702 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6703 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6704 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
6705 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6706 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
6707 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6708 // CHECK10: omp.precond.then:
6709 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6710 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6711 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
6712 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6713 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6714 // CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
6715 // CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6716 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
6717 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
6718 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6719 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6720 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
6721 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6722 // CHECK10: cond.true:
6723 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6724 // CHECK10-NEXT: br label [[COND_END:%.*]]
6725 // CHECK10: cond.false:
6726 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6727 // CHECK10-NEXT: br label [[COND_END]]
6728 // CHECK10: cond.end:
6729 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
6730 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6731 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6732 // CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
6733 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6734 // CHECK10: omp.inner.for.cond:
6735 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6736 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6737 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
6738 // CHECK10-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
6739 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6740 // CHECK10: omp.inner.for.body:
6741 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6742 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6743 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
6744 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
6745 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
6746 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
6747 // CHECK10-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
6748 // CHECK10-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
6749 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
6750 // CHECK10-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
6751 // CHECK10-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
6752 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
6753 // CHECK10-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
6754 // CHECK10-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
6755 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
6756 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
6757 // CHECK10-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
6758 // CHECK10-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6759 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
6760 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
6761 // CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
6762 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6763 // CHECK10: omp.inner.for.inc:
6764 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6765 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6766 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
6767 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
6768 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6769 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6770 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
6771 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
6772 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6773 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6774 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
6775 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
6776 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6777 // CHECK10-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6778 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
6779 // CHECK10-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
6780 // CHECK10: cond.true10:
6781 // CHECK10-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6782 // CHECK10-NEXT: br label [[COND_END12:%.*]]
6783 // CHECK10: cond.false11:
6784 // CHECK10-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6785 // CHECK10-NEXT: br label [[COND_END12]]
6786 // CHECK10: cond.end12:
6787 // CHECK10-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
6788 // CHECK10-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
6789 // CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6790 // CHECK10-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
6791 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
6792 // CHECK10: omp.inner.for.end:
6793 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6794 // CHECK10: omp.loop.exit:
6795 // CHECK10-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6796 // CHECK10-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
6797 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
6798 // CHECK10-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6799 // CHECK10-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
6800 // CHECK10-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6801 // CHECK10: .omp.final.then:
6802 // CHECK10-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6803 // CHECK10-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
6804 // CHECK10-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
6805 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
6806 // CHECK10-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
6807 // CHECK10-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
6808 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
6809 // CHECK10: .omp.final.done:
6810 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
6811 // CHECK10: omp.precond.end:
6812 // CHECK10-NEXT: ret void
6813 // CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__3
6814 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
6815 // CHECK10-NEXT: entry:
6816 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6817 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6818 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6819 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6820 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6821 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
6822 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6823 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
6824 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6825 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6826 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
6827 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6828 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6829 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6830 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6831 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
6832 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6833 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6834 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6835 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6836 // CHECK10-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6837 // CHECK10-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
6838 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
6839 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
6840 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
6841 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6842 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
6843 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6844 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6845 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6846 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
6847 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6848 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
6849 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6850 // CHECK10: omp.precond.then:
6851 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6852 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6853 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
6854 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6855 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6856 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
6857 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
6858 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6859 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6860 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6861 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
6862 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6863 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6864 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
6865 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6866 // CHECK10: omp.inner.for.cond:
6867 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6868 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6869 // CHECK10-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
6870 // CHECK10-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6871 // CHECK10: omp.inner.for.body:
6872 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6873 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
6874 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6875 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
6876 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
6877 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
6878 // CHECK10-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
6879 // CHECK10-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
6880 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
6881 // CHECK10-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
6882 // CHECK10-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
6883 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6884 // CHECK10: omp.body.continue:
6885 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6886 // CHECK10: omp.inner.for.inc:
6887 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6888 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6889 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
6890 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
6891 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
6892 // CHECK10: omp.inner.for.end:
6893 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6894 // CHECK10: omp.loop.exit:
6895 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6896 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
6897 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
6898 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6899 // CHECK10-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
6900 // CHECK10-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6901 // CHECK10: .omp.final.then:
6902 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6903 // CHECK10-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
6904 // CHECK10-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
6905 // CHECK10-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
6906 // CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
6907 // CHECK10-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
6908 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
6909 // CHECK10: .omp.final.done:
6910 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
6911 // CHECK10: omp.precond.end:
6912 // CHECK10-NEXT: ret void
6913 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
6914 // CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
6915 // CHECK10-NEXT: entry:
6916 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
6917 // CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
6918 // CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6919 // CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
6920 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
6921 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
6922 // CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
6923 // CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
6924 // CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
6925 // CHECK10: .execute:
6926 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
6927 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
6928 // CHECK10-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
6929 // CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
6930 // CHECK10: .omp.deinit:
6931 // CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
6932 // CHECK10-NEXT: br label [[DOTEXIT:%.*]]
6933 // CHECK10: .exit:
6934 // CHECK10-NEXT: ret void
6935 // CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__4
6936 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
6937 // CHECK10-NEXT: entry:
6938 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6939 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6940 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
6941 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6942 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
6943 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6944 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6945 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6946 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6947 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
6948 // CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
6949 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6950 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6951 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
6952 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
6953 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6954 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
6955 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6956 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6957 // CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
6958 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6959 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6960 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
6961 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6962 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6963 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6964 // CHECK10: cond.true:
6965 // CHECK10-NEXT: br label [[COND_END:%.*]]
6966 // CHECK10: cond.false:
6967 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6968 // CHECK10-NEXT: br label [[COND_END]]
6969 // CHECK10: cond.end:
6970 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6971 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6972 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6973 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6974 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6975 // CHECK10: omp.inner.for.cond:
6976 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6977 // CHECK10-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
6978 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6979 // CHECK10: omp.inner.for.body:
6980 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6981 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6982 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
6983 // CHECK10-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
6984 // CHECK10-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
6985 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
6986 // CHECK10-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
6987 // CHECK10-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
6988 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
6989 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
6990 // CHECK10-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
6991 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
6992 // CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
6993 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6994 // CHECK10: omp.inner.for.inc:
6995 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6996 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6997 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
6998 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6999 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7000 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7001 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
7002 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
7003 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7004 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7005 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
7006 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
7007 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7008 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
7009 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
7010 // CHECK10: cond.true5:
7011 // CHECK10-NEXT: br label [[COND_END7:%.*]]
7012 // CHECK10: cond.false6:
7013 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7014 // CHECK10-NEXT: br label [[COND_END7]]
7015 // CHECK10: cond.end7:
7016 // CHECK10-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
7017 // CHECK10-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
7018 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7019 // CHECK10-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
7020 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
7021 // CHECK10: omp.inner.for.end:
7022 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7023 // CHECK10: omp.loop.exit:
7024 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7025 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7026 // CHECK10-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
7027 // CHECK10-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7028 // CHECK10: .omp.final.then:
7029 // CHECK10-NEXT: store i32 10, i32* [[I]], align 4
7030 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
7031 // CHECK10: .omp.final.done:
7032 // CHECK10-NEXT: ret void
7033 // CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__5
7034 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
7035 // CHECK10-NEXT: entry:
7036 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7037 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7038 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7039 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7040 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
7041 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7042 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7043 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7044 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7045 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7046 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7047 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7048 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7049 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7050 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7051 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7052 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
7053 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
7054 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7055 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7056 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7057 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7058 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7059 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7060 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7061 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7062 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7063 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7064 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7065 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7066 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7067 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7068 // CHECK10: omp.inner.for.cond:
7069 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7070 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7071 // CHECK10-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
7072 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7073 // CHECK10: omp.inner.for.body:
7074 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7075 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
7076 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7077 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7078 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
7079 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
7080 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
7081 // CHECK10-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
7082 // CHECK10-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
7083 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7084 // CHECK10: omp.body.continue:
7085 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7086 // CHECK10: omp.inner.for.inc:
7087 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7088 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7089 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7090 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
7091 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
7092 // CHECK10: omp.inner.for.end:
7093 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7094 // CHECK10: omp.loop.exit:
7095 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7096 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7097 // CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7098 // CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7099 // CHECK10: .omp.final.then:
7100 // CHECK10-NEXT: store i32 10, i32* [[I]], align 4
7101 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
7102 // CHECK10: .omp.final.done:
7103 // CHECK10-NEXT: ret void
7104 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
7105 // CHECK10-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
7106 // CHECK10-NEXT: entry:
7107 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
7108 // CHECK10-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
7109 // CHECK10-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
7110 // CHECK10-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
7111 // CHECK10-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
7112 // CHECK10-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
7113 // CHECK10-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
7114 // CHECK10-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
7115 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
7116 // CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
7117 // CHECK10-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
7118 // CHECK10-NEXT: br label [[DOTEXECUTE:%.*]]
7119 // CHECK10: .execute:
7120 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
7121 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
7122 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
7123 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
7124 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
7125 // CHECK10-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
7126 // CHECK10-NEXT: br label [[DOTOMP_DEINIT:%.*]]
7127 // CHECK10: .omp.deinit:
7128 // CHECK10-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
7129 // CHECK10-NEXT: br label [[DOTEXIT:%.*]]
7130 // CHECK10: .exit:
7131 // CHECK10-NEXT: ret void
7132 // CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__6
7133 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
7134 // CHECK10-NEXT: entry:
7135 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7136 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7137 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
7138 // CHECK10-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
7139 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7140 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7141 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
7142 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7143 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7144 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7145 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7146 // CHECK10-NEXT: [[K:%.*]] = alloca i32, align 4
7147 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7148 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
7149 // CHECK10-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
7150 // CHECK10-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
7151 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7152 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7153 // CHECK10-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
7154 // CHECK10-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
7155 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
7156 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7157 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7158 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7159 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7160 // CHECK10-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
7161 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7162 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7163 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
7164 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7165 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
7166 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7167 // CHECK10: cond.true:
7168 // CHECK10-NEXT: br label [[COND_END:%.*]]
7169 // CHECK10: cond.false:
7170 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7171 // CHECK10-NEXT: br label [[COND_END]]
7172 // CHECK10: cond.end:
7173 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7174 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7175 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7176 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7177 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7178 // CHECK10: omp.inner.for.cond:
7179 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7180 // CHECK10-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
7181 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7182 // CHECK10: omp.inner.for.body:
7183 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7184 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7185 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
7186 // CHECK10-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
7187 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
7188 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
7189 // CHECK10-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
7190 // CHECK10-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
7191 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
7192 // CHECK10-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
7193 // CHECK10-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
7194 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
7195 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
7196 // CHECK10-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
7197 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
7198 // CHECK10-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
7199 // CHECK10-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
7200 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
7201 // CHECK10-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
7202 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7203 // CHECK10: omp.inner.for.inc:
7204 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7205 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7206 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
7207 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7208 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7209 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7210 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
7211 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
7212 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7213 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7214 // CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
7215 // CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
7216 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7217 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
7218 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
7219 // CHECK10: cond.true6:
7220 // CHECK10-NEXT: br label [[COND_END8:%.*]]
7221 // CHECK10: cond.false7:
7222 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7223 // CHECK10-NEXT: br label [[COND_END8]]
7224 // CHECK10: cond.end8:
7225 // CHECK10-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
7226 // CHECK10-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
7227 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7228 // CHECK10-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
7229 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
7230 // CHECK10: omp.inner.for.end:
7231 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7232 // CHECK10: omp.loop.exit:
7233 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7234 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7235 // CHECK10-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
7236 // CHECK10-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7237 // CHECK10: .omp.final.then:
7238 // CHECK10-NEXT: store i32 10, i32* [[I]], align 4
7239 // CHECK10-NEXT: store i32 10, i32* [[J]], align 4
7240 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
7241 // CHECK10: .omp.final.done:
7242 // CHECK10-NEXT: ret void
7243 // CHECK10-LABEL: define {{[^@]+}}@__omp_outlined__7
7244 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
7245 // CHECK10-NEXT: entry:
7246 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7247 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7248 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7249 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7250 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
7251 // CHECK10-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
7252 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7253 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7254 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
7255 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7256 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7257 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7258 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7259 // CHECK10-NEXT: [[K:%.*]] = alloca i32, align 4
7260 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7261 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
7262 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7263 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7264 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7265 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7266 // CHECK10-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
7267 // CHECK10-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
7268 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
7269 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7270 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7271 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7272 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7273 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7274 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7275 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7276 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7277 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7278 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7279 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7280 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7281 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7282 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7283 // CHECK10: omp.inner.for.cond:
7284 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7285 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7286 // CHECK10-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
7287 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7288 // CHECK10: omp.inner.for.body:
7289 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7290 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
7291 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
7292 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7293 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7294 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7295 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7296 // CHECK10-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
7297 // CHECK10-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
7298 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
7299 // CHECK10-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
7300 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
7301 // CHECK10-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
7302 // CHECK10-NEXT: store i32 10, i32* [[K]], align 4
7303 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
7304 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
7305 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
7306 // CHECK10-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
7307 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
7308 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
7309 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
7310 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
7311 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
7312 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
7313 // CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
7314 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
7315 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7316 // CHECK10: omp.body.continue:
7317 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7318 // CHECK10: omp.inner.for.inc:
7319 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7320 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7321 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
7322 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
7323 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
7324 // CHECK10: omp.inner.for.end:
7325 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7326 // CHECK10: omp.loop.exit:
7327 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7328 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7329 // CHECK10-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
7330 // CHECK10-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7331 // CHECK10: .omp.final.then:
7332 // CHECK10-NEXT: store i32 10, i32* [[I]], align 4
7333 // CHECK10-NEXT: store i32 10, i32* [[J]], align 4
7334 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
7335 // CHECK10: .omp.final.done:
7336 // CHECK10-NEXT: ret void
7337 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
7338 // CHECK11-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
7339 // CHECK11-NEXT: entry:
7340 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7341 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
7342 // CHECK11-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
7343 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
7344 // CHECK11-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
7345 // CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
7346 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
7347 // CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
7348 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7349 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
7350 // CHECK11-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
7351 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
7352 // CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
7353 // CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
7354 // CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
7355 // CHECK11: .execute:
7356 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
7357 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
7358 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
7359 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
7360 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
7361 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
7362 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
7363 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
7364 // CHECK11-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
7365 // CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
7366 // CHECK11: .omp.deinit:
7367 // CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
7368 // CHECK11-NEXT: br label [[DOTEXIT:%.*]]
7369 // CHECK11: .exit:
7370 // CHECK11-NEXT: ret void
7371 // CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__
7372 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
7373 // CHECK11-NEXT: entry:
7374 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7375 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7376 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7377 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
7378 // CHECK11-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
7379 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7380 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7381 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7382 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
7383 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7384 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7385 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7386 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7387 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7388 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4
7389 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
7390 // CHECK11-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
7391 // CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
7392 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7393 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7394 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7395 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
7396 // CHECK11-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
7397 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
7398 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 4, i16 1)
7399 // CHECK11-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
7400 // CHECK11-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
7401 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
7402 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
7403 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7404 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7405 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7406 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
7407 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
7408 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
7409 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7410 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7411 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7412 // CHECK11: omp.precond.then:
7413 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7414 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7415 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
7416 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7417 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7418 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7419 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
7420 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
7421 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7422 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7423 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
7424 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7425 // CHECK11: cond.true:
7426 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7427 // CHECK11-NEXT: br label [[COND_END:%.*]]
7428 // CHECK11: cond.false:
7429 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7430 // CHECK11-NEXT: br label [[COND_END]]
7431 // CHECK11: cond.end:
7432 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
7433 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7434 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7435 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
7436 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7437 // CHECK11: omp.inner.for.cond:
7438 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7439 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7440 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
7441 // CHECK11-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
7442 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7443 // CHECK11: omp.inner.for.body:
7444 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7445 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7446 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
7447 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
7448 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
7449 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[L_ADDR]], align 4
7450 // CHECK11-NEXT: store i32 [[TMP20]], i32* [[L_CASTED]], align 4
7451 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[L_CASTED]], align 4
7452 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
7453 // CHECK11-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP16]] to i8*
7454 // CHECK11-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
7455 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
7456 // CHECK11-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
7457 // CHECK11-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
7458 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
7459 // CHECK11-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP19]] to i8*
7460 // CHECK11-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4
7461 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
7462 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
7463 // CHECK11-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4
7464 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
7465 // CHECK11-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP21]] to i8*
7466 // CHECK11-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4
7467 // CHECK11-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7468 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
7469 // CHECK11-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
7470 // CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i32 5)
7471 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7472 // CHECK11: omp.inner.for.inc:
7473 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7474 // CHECK11-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7475 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
7476 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
7477 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7478 // CHECK11-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7479 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
7480 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
7481 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7482 // CHECK11-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7483 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
7484 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
7485 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7486 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7487 // CHECK11-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
7488 // CHECK11-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
7489 // CHECK11: cond.true11:
7490 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7491 // CHECK11-NEXT: br label [[COND_END13:%.*]]
7492 // CHECK11: cond.false12:
7493 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7494 // CHECK11-NEXT: br label [[COND_END13]]
7495 // CHECK11: cond.end13:
7496 // CHECK11-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE11]] ], [ [[TMP44]], [[COND_FALSE12]] ]
7497 // CHECK11-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
7498 // CHECK11-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7499 // CHECK11-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
7500 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
7501 // CHECK11: omp.inner.for.end:
7502 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7503 // CHECK11: omp.loop.exit:
7504 // CHECK11-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7505 // CHECK11-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
7506 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]])
7507 // CHECK11-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7508 // CHECK11-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
7509 // CHECK11-NEXT: br i1 [[TMP49]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7510 // CHECK11: .omp.final.then:
7511 // CHECK11-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7512 // CHECK11-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP50]], 0
7513 // CHECK11-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
7514 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
7515 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
7516 // CHECK11-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
7517 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7518 // CHECK11: .omp.final.done:
7519 // CHECK11-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7520 // CHECK11-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
7521 // CHECK11-NEXT: br i1 [[TMP52]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
7522 // CHECK11: .omp.lastprivate.then:
7523 // CHECK11-NEXT: [[TMP53:%.*]] = load i32, i32* [[L_ADDR]], align 4
7524 // CHECK11-NEXT: store i32 [[TMP53]], i32* [[L_ADDR]], align 4
7525 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
7526 // CHECK11: .omp.lastprivate.done:
7527 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
7528 // CHECK11: omp.precond.end:
7529 // CHECK11-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
7530 // CHECK11-NEXT: ret void
7531 // CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__1
7532 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
7533 // CHECK11-NEXT: entry:
7534 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7535 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7536 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7537 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7538 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7539 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
7540 // CHECK11-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
7541 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7542 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7543 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7544 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7545 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7546 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7547 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7548 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7549 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7550 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
7551 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7552 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7553 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7554 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7555 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7556 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
7557 // CHECK11-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
7558 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
7559 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
7560 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
7561 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7562 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
7563 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7564 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7565 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7566 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
7567 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7568 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
7569 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7570 // CHECK11: omp.precond.then:
7571 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7572 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7573 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
7574 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7575 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7576 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
7577 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
7578 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7579 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7580 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7581 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
7582 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
7583 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7584 // CHECK11: omp.dispatch.cond:
7585 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7586 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7587 // CHECK11-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
7588 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7589 // CHECK11: cond.true:
7590 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7591 // CHECK11-NEXT: br label [[COND_END:%.*]]
7592 // CHECK11: cond.false:
7593 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7594 // CHECK11-NEXT: br label [[COND_END]]
7595 // CHECK11: cond.end:
7596 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
7597 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7598 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7599 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
7600 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7601 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7602 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
7603 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7604 // CHECK11: omp.dispatch.body:
7605 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7606 // CHECK11: omp.inner.for.cond:
7607 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7608 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7609 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
7610 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7611 // CHECK11: omp.inner.for.body:
7612 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7613 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
7614 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7615 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
7616 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
7617 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
7618 // CHECK11-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
7619 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
7620 // CHECK11-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
7621 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7622 // CHECK11: omp.body.continue:
7623 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7624 // CHECK11: omp.inner.for.inc:
7625 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7626 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
7627 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
7628 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
7629 // CHECK11: omp.inner.for.end:
7630 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7631 // CHECK11: omp.dispatch.inc:
7632 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7633 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7634 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
7635 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
7636 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7637 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7638 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
7639 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
7640 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
7641 // CHECK11: omp.dispatch.end:
7642 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7643 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
7644 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
7645 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7646 // CHECK11-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
7647 // CHECK11-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7648 // CHECK11: .omp.final.then:
7649 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7650 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
7651 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
7652 // CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
7653 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
7654 // CHECK11-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
7655 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7656 // CHECK11: .omp.final.done:
7657 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7658 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
7659 // CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
7660 // CHECK11: .omp.lastprivate.then:
7661 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
7662 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
7663 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
7664 // CHECK11: .omp.lastprivate.done:
7665 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
7666 // CHECK11: omp.precond.end:
7667 // CHECK11-NEXT: ret void
7668 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
7669 // CHECK11-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
7670 // CHECK11-NEXT: entry:
7671 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7672 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
7673 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
7674 // CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
7675 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
7676 // CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
7677 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7678 // CHECK11-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
7679 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
7680 // CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
7681 // CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
7682 // CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
7683 // CHECK11: .execute:
7684 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
7685 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
7686 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
7687 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
7688 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
7689 // CHECK11-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
7690 // CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
7691 // CHECK11: .omp.deinit:
7692 // CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
7693 // CHECK11-NEXT: br label [[DOTEXIT:%.*]]
7694 // CHECK11: .exit:
7695 // CHECK11-NEXT: ret void
7696 // CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__2
7697 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
7698 // CHECK11-NEXT: entry:
7699 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7700 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7701 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7702 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
7703 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7704 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7705 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7706 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7707 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7708 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7709 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7710 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7711 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7712 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
7713 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
7714 // CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
7715 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7716 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7717 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7718 // CHECK11-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
7719 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
7720 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
7721 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
7722 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7723 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
7724 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7725 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7726 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7727 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
7728 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7729 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
7730 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7731 // CHECK11: omp.precond.then:
7732 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7733 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7734 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
7735 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7736 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7737 // CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
7738 // CHECK11-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7739 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
7740 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
7741 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7742 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7743 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
7744 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7745 // CHECK11: cond.true:
7746 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7747 // CHECK11-NEXT: br label [[COND_END:%.*]]
7748 // CHECK11: cond.false:
7749 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7750 // CHECK11-NEXT: br label [[COND_END]]
7751 // CHECK11: cond.end:
7752 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
7753 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7754 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7755 // CHECK11-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
7756 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7757 // CHECK11: omp.inner.for.cond:
7758 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7759 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7760 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
7761 // CHECK11-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
7762 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7763 // CHECK11: omp.inner.for.body:
7764 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7765 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7766 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
7767 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
7768 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
7769 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
7770 // CHECK11-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
7771 // CHECK11-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
7772 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
7773 // CHECK11-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
7774 // CHECK11-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
7775 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
7776 // CHECK11-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
7777 // CHECK11-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
7778 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
7779 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
7780 // CHECK11-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
7781 // CHECK11-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7782 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
7783 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
7784 // CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
7785 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7786 // CHECK11: omp.inner.for.inc:
7787 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7788 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7789 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
7790 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
7791 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7792 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7793 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
7794 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
7795 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7796 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7797 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
7798 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
7799 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7800 // CHECK11-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7801 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
7802 // CHECK11-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
7803 // CHECK11: cond.true10:
7804 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7805 // CHECK11-NEXT: br label [[COND_END12:%.*]]
7806 // CHECK11: cond.false11:
7807 // CHECK11-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7808 // CHECK11-NEXT: br label [[COND_END12]]
7809 // CHECK11: cond.end12:
7810 // CHECK11-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
7811 // CHECK11-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
7812 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7813 // CHECK11-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
7814 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
7815 // CHECK11: omp.inner.for.end:
7816 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7817 // CHECK11: omp.loop.exit:
7818 // CHECK11-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7819 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
7820 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
7821 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7822 // CHECK11-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
7823 // CHECK11-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7824 // CHECK11: .omp.final.then:
7825 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7826 // CHECK11-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
7827 // CHECK11-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
7828 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
7829 // CHECK11-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
7830 // CHECK11-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
7831 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7832 // CHECK11: .omp.final.done:
7833 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
7834 // CHECK11: omp.precond.end:
7835 // CHECK11-NEXT: ret void
7836 // CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__3
7837 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
7838 // CHECK11-NEXT: entry:
7839 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7840 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7841 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7842 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7843 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7844 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
7845 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7846 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7847 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7848 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7849 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7850 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7851 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7852 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7853 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7854 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
7855 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7856 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7857 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7858 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7859 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7860 // CHECK11-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
7861 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
7862 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
7863 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
7864 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7865 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
7866 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7867 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7868 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7869 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
7870 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7871 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
7872 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7873 // CHECK11: omp.precond.then:
7874 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7875 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7876 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
7877 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7878 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7879 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
7880 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
7881 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7882 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7883 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7884 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
7885 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7886 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7887 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
7888 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7889 // CHECK11: omp.inner.for.cond:
7890 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7891 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7892 // CHECK11-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
7893 // CHECK11-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7894 // CHECK11: omp.inner.for.body:
7895 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7896 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
7897 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7898 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
7899 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
7900 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
7901 // CHECK11-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
7902 // CHECK11-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
7903 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
7904 // CHECK11-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
7905 // CHECK11-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
7906 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7907 // CHECK11: omp.body.continue:
7908 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7909 // CHECK11: omp.inner.for.inc:
7910 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7911 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7912 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
7913 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
7914 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
7915 // CHECK11: omp.inner.for.end:
7916 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7917 // CHECK11: omp.loop.exit:
7918 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7919 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
7920 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
7921 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7922 // CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
7923 // CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7924 // CHECK11: .omp.final.then:
7925 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7926 // CHECK11-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
7927 // CHECK11-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
7928 // CHECK11-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
7929 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7930 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
7931 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7932 // CHECK11: .omp.final.done:
7933 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
7934 // CHECK11: omp.precond.end:
7935 // CHECK11-NEXT: ret void
7936 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
7937 // CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
7938 // CHECK11-NEXT: entry:
7939 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
7940 // CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
7941 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
7942 // CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
7943 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
7944 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
7945 // CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
7946 // CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
7947 // CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
7948 // CHECK11: .execute:
7949 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
7950 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
7951 // CHECK11-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
7952 // CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
7953 // CHECK11: .omp.deinit:
7954 // CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
7955 // CHECK11-NEXT: br label [[DOTEXIT:%.*]]
7956 // CHECK11: .exit:
7957 // CHECK11-NEXT: ret void
7958 // CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__4
7959 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
7960 // CHECK11-NEXT: entry:
7961 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7962 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7963 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
7964 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7965 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7966 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7967 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7968 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7969 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7970 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7971 // CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
7972 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7973 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7974 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
7975 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
7976 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7977 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
7978 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7979 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7980 // CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
7981 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7982 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7983 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
7984 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7985 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
7986 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7987 // CHECK11: cond.true:
7988 // CHECK11-NEXT: br label [[COND_END:%.*]]
7989 // CHECK11: cond.false:
7990 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7991 // CHECK11-NEXT: br label [[COND_END]]
7992 // CHECK11: cond.end:
7993 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7994 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7995 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7996 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7997 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7998 // CHECK11: omp.inner.for.cond:
7999 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8000 // CHECK11-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
8001 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8002 // CHECK11: omp.inner.for.body:
8003 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8004 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8005 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
8006 // CHECK11-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
8007 // CHECK11-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
8008 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
8009 // CHECK11-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
8010 // CHECK11-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
8011 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
8012 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
8013 // CHECK11-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
8014 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
8015 // CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
8016 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8017 // CHECK11: omp.inner.for.inc:
8018 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8019 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8020 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
8021 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8022 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8023 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8024 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
8025 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
8026 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8027 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8028 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
8029 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
8030 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8031 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
8032 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
8033 // CHECK11: cond.true5:
8034 // CHECK11-NEXT: br label [[COND_END7:%.*]]
8035 // CHECK11: cond.false6:
8036 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8037 // CHECK11-NEXT: br label [[COND_END7]]
8038 // CHECK11: cond.end7:
8039 // CHECK11-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
8040 // CHECK11-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
8041 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8042 // CHECK11-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
8043 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
8044 // CHECK11: omp.inner.for.end:
8045 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8046 // CHECK11: omp.loop.exit:
8047 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
8048 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8049 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
8050 // CHECK11-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8051 // CHECK11: .omp.final.then:
8052 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
8053 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
8054 // CHECK11: .omp.final.done:
8055 // CHECK11-NEXT: ret void
8056 // CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__5
8057 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
8058 // CHECK11-NEXT: entry:
8059 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8060 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8061 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8062 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8063 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
8064 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8065 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
8066 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8067 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8068 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8069 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8070 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
8071 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8072 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8073 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8074 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8075 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
8076 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
8077 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8078 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8079 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8080 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8081 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
8082 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
8083 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8084 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8085 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8086 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
8087 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8088 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8089 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8090 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8091 // CHECK11: omp.inner.for.cond:
8092 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8093 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8094 // CHECK11-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
8095 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8096 // CHECK11: omp.inner.for.body:
8097 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8098 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
8099 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8100 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8101 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
8102 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
8103 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
8104 // CHECK11-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
8105 // CHECK11-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
8106 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8107 // CHECK11: omp.body.continue:
8108 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8109 // CHECK11: omp.inner.for.inc:
8110 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8111 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8112 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
8113 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
8114 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
8115 // CHECK11: omp.inner.for.end:
8116 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8117 // CHECK11: omp.loop.exit:
8118 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
8119 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8120 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
8121 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8122 // CHECK11: .omp.final.then:
8123 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
8124 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
8125 // CHECK11: .omp.final.done:
8126 // CHECK11-NEXT: ret void
8127 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
8128 // CHECK11-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
8129 // CHECK11-NEXT: entry:
8130 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
8131 // CHECK11-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
8132 // CHECK11-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
8133 // CHECK11-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
8134 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
8135 // CHECK11-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
8136 // CHECK11-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
8137 // CHECK11-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
8138 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
8139 // CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
8140 // CHECK11-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
8141 // CHECK11-NEXT: br label [[DOTEXECUTE:%.*]]
8142 // CHECK11: .execute:
8143 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
8144 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
8145 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
8146 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
8147 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
8148 // CHECK11-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
8149 // CHECK11-NEXT: br label [[DOTOMP_DEINIT:%.*]]
8150 // CHECK11: .omp.deinit:
8151 // CHECK11-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
8152 // CHECK11-NEXT: br label [[DOTEXIT:%.*]]
8153 // CHECK11: .exit:
8154 // CHECK11-NEXT: ret void
8155 // CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__6
8156 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
8157 // CHECK11-NEXT: entry:
8158 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8159 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8160 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
8161 // CHECK11-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
8162 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8163 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
8164 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
8165 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8166 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8167 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8168 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8169 // CHECK11-NEXT: [[K:%.*]] = alloca i32, align 4
8170 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
8171 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
8172 // CHECK11-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
8173 // CHECK11-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
8174 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8175 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8176 // CHECK11-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
8177 // CHECK11-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
8178 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
8179 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8180 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8181 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8182 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8183 // CHECK11-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
8184 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8185 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
8186 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
8187 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8188 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
8189 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8190 // CHECK11: cond.true:
8191 // CHECK11-NEXT: br label [[COND_END:%.*]]
8192 // CHECK11: cond.false:
8193 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8194 // CHECK11-NEXT: br label [[COND_END]]
8195 // CHECK11: cond.end:
8196 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8197 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8198 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8199 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8200 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8201 // CHECK11: omp.inner.for.cond:
8202 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8203 // CHECK11-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
8204 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8205 // CHECK11: omp.inner.for.body:
8206 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8207 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8208 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
8209 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
8210 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
8211 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
8212 // CHECK11-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
8213 // CHECK11-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
8214 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
8215 // CHECK11-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
8216 // CHECK11-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
8217 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
8218 // CHECK11-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
8219 // CHECK11-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
8220 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
8221 // CHECK11-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
8222 // CHECK11-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
8223 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
8224 // CHECK11-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
8225 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8226 // CHECK11: omp.inner.for.inc:
8227 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8228 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8229 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
8230 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8231 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8232 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8233 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
8234 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
8235 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8236 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8237 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
8238 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
8239 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8240 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
8241 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
8242 // CHECK11: cond.true6:
8243 // CHECK11-NEXT: br label [[COND_END8:%.*]]
8244 // CHECK11: cond.false7:
8245 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8246 // CHECK11-NEXT: br label [[COND_END8]]
8247 // CHECK11: cond.end8:
8248 // CHECK11-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
8249 // CHECK11-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
8250 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8251 // CHECK11-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
8252 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
8253 // CHECK11: omp.inner.for.end:
8254 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8255 // CHECK11: omp.loop.exit:
8256 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
8257 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8258 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
8259 // CHECK11-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8260 // CHECK11: .omp.final.then:
8261 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
8262 // CHECK11-NEXT: store i32 10, i32* [[J]], align 4
8263 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
8264 // CHECK11: .omp.final.done:
8265 // CHECK11-NEXT: ret void
8266 // CHECK11-LABEL: define {{[^@]+}}@__omp_outlined__7
8267 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
8268 // CHECK11-NEXT: entry:
8269 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8270 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8271 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8272 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8273 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
8274 // CHECK11-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
8275 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8276 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
8277 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
8278 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8279 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8280 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8281 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8282 // CHECK11-NEXT: [[K:%.*]] = alloca i32, align 4
8283 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
8284 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
8285 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8286 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8287 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8288 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8289 // CHECK11-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
8290 // CHECK11-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
8291 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
8292 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8293 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8294 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8295 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8296 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
8297 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
8298 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8299 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8300 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8301 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
8302 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8303 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8304 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8305 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8306 // CHECK11: omp.inner.for.cond:
8307 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8308 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8309 // CHECK11-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
8310 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8311 // CHECK11: omp.inner.for.body:
8312 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8313 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
8314 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
8315 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8316 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8317 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8318 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8319 // CHECK11-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
8320 // CHECK11-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
8321 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
8322 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
8323 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
8324 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
8325 // CHECK11-NEXT: store i32 10, i32* [[K]], align 4
8326 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
8327 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
8328 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
8329 // CHECK11-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
8330 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
8331 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
8332 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
8333 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
8334 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
8335 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
8336 // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
8337 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
8338 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8339 // CHECK11: omp.body.continue:
8340 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8341 // CHECK11: omp.inner.for.inc:
8342 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8343 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8344 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
8345 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
8346 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
8347 // CHECK11: omp.inner.for.end:
8348 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8349 // CHECK11: omp.loop.exit:
8350 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
8351 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8352 // CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
8353 // CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8354 // CHECK11: .omp.final.then:
8355 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
8356 // CHECK11-NEXT: store i32 10, i32* [[J]], align 4
8357 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
8358 // CHECK11: .omp.final.done:
8359 // CHECK11-NEXT: ret void
8360 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
8361 // CHECK12-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
8362 // CHECK12-NEXT: entry:
8363 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8364 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
8365 // CHECK12-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
8366 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8367 // CHECK12-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
8368 // CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
8369 // CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
8370 // CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
8371 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8372 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
8373 // CHECK12-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
8374 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
8375 // CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
8376 // CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
8377 // CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
8378 // CHECK12: .execute:
8379 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
8380 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8381 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
8382 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
8383 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[L_ADDR]], align 4
8384 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[L_CASTED]], align 4
8385 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_CASTED]], align 4
8386 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
8387 // CHECK12-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i32]* [[TMP0]], i32 [[TMP5]]) #[[ATTR3:[0-9]+]]
8388 // CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
8389 // CHECK12: .omp.deinit:
8390 // CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
8391 // CHECK12-NEXT: br label [[DOTEXIT:%.*]]
8392 // CHECK12: .exit:
8393 // CHECK12-NEXT: ret void
8394 // CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__
8395 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
8396 // CHECK12-NEXT: entry:
8397 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8398 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8399 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8400 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
8401 // CHECK12-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
8402 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8403 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
8404 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8405 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8406 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
8407 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8408 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8409 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8410 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8411 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4
8412 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8413 // CHECK12-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
8414 // CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
8415 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8416 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8417 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8418 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
8419 // CHECK12-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
8420 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
8421 // CHECK12-NEXT: [[TMP1:%.*]] = call i8* @__kmpc_data_sharing_push_stack(i32 4, i16 1)
8422 // CHECK12-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to %struct._globalized_locals_ty*
8423 // CHECK12-NEXT: [[L1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP2]], i32 0, i32 0
8424 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
8425 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8426 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8427 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8428 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8429 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8430 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8431 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
8432 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8433 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8434 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8435 // CHECK12: omp.precond.then:
8436 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8437 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8438 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
8439 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8440 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8441 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8442 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
8443 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
8444 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8445 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8446 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
8447 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8448 // CHECK12: cond.true:
8449 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8450 // CHECK12-NEXT: br label [[COND_END:%.*]]
8451 // CHECK12: cond.false:
8452 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8453 // CHECK12-NEXT: br label [[COND_END]]
8454 // CHECK12: cond.end:
8455 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8456 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8457 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8458 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
8459 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8460 // CHECK12: omp.inner.for.cond:
8461 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8462 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8463 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
8464 // CHECK12-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
8465 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8466 // CHECK12: omp.inner.for.body:
8467 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8468 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8469 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
8470 // CHECK12-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
8471 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
8472 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[L_ADDR]], align 4
8473 // CHECK12-NEXT: store i32 [[TMP20]], i32* [[L_CASTED]], align 4
8474 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[L_CASTED]], align 4
8475 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
8476 // CHECK12-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP16]] to i8*
8477 // CHECK12-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
8478 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
8479 // CHECK12-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
8480 // CHECK12-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
8481 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
8482 // CHECK12-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP19]] to i8*
8483 // CHECK12-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4
8484 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
8485 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
8486 // CHECK12-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4
8487 // CHECK12-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
8488 // CHECK12-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP21]] to i8*
8489 // CHECK12-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 4
8490 // CHECK12-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8491 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
8492 // CHECK12-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
8493 // CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i32 5)
8494 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8495 // CHECK12: omp.inner.for.inc:
8496 // CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8497 // CHECK12-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8498 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
8499 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
8500 // CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8501 // CHECK12-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8502 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
8503 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
8504 // CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8505 // CHECK12-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8506 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
8507 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
8508 // CHECK12-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8509 // CHECK12-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8510 // CHECK12-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
8511 // CHECK12-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
8512 // CHECK12: cond.true11:
8513 // CHECK12-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8514 // CHECK12-NEXT: br label [[COND_END13:%.*]]
8515 // CHECK12: cond.false12:
8516 // CHECK12-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8517 // CHECK12-NEXT: br label [[COND_END13]]
8518 // CHECK12: cond.end13:
8519 // CHECK12-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE11]] ], [ [[TMP44]], [[COND_FALSE12]] ]
8520 // CHECK12-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
8521 // CHECK12-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8522 // CHECK12-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
8523 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
8524 // CHECK12: omp.inner.for.end:
8525 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8526 // CHECK12: omp.loop.exit:
8527 // CHECK12-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8528 // CHECK12-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
8529 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]])
8530 // CHECK12-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8531 // CHECK12-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
8532 // CHECK12-NEXT: br i1 [[TMP49]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8533 // CHECK12: .omp.final.then:
8534 // CHECK12-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8535 // CHECK12-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP50]], 0
8536 // CHECK12-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
8537 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
8538 // CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
8539 // CHECK12-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
8540 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
8541 // CHECK12: .omp.final.done:
8542 // CHECK12-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8543 // CHECK12-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
8544 // CHECK12-NEXT: br i1 [[TMP52]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
8545 // CHECK12: .omp.lastprivate.then:
8546 // CHECK12-NEXT: [[TMP53:%.*]] = load i32, i32* [[L_ADDR]], align 4
8547 // CHECK12-NEXT: store i32 [[TMP53]], i32* [[L_ADDR]], align 4
8548 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
8549 // CHECK12: .omp.lastprivate.done:
8550 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
8551 // CHECK12: omp.precond.end:
8552 // CHECK12-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP1]])
8553 // CHECK12-NEXT: ret void
8554 // CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__1
8555 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
8556 // CHECK12-NEXT: entry:
8557 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8558 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8559 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8560 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8561 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8562 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
8563 // CHECK12-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
8564 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8565 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
8566 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8567 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8568 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
8569 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8570 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8571 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8572 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8573 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
8574 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8575 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8576 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8577 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8578 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8579 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
8580 // CHECK12-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
8581 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
8582 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
8583 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
8584 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8585 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
8586 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8587 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8588 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8589 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
8590 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8591 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
8592 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8593 // CHECK12: omp.precond.then:
8594 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8595 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8596 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
8597 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8598 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8599 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
8600 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
8601 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8602 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8603 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8604 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
8605 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
8606 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8607 // CHECK12: omp.dispatch.cond:
8608 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8609 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8610 // CHECK12-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]]
8611 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8612 // CHECK12: cond.true:
8613 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8614 // CHECK12-NEXT: br label [[COND_END:%.*]]
8615 // CHECK12: cond.false:
8616 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8617 // CHECK12-NEXT: br label [[COND_END]]
8618 // CHECK12: cond.end:
8619 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8620 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8621 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8622 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
8623 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8624 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8625 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
8626 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8627 // CHECK12: omp.dispatch.body:
8628 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8629 // CHECK12: omp.inner.for.cond:
8630 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8631 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8632 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
8633 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8634 // CHECK12: omp.inner.for.body:
8635 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8636 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
8637 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8638 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
8639 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
8640 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
8641 // CHECK12-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
8642 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
8643 // CHECK12-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
8644 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8645 // CHECK12: omp.body.continue:
8646 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8647 // CHECK12: omp.inner.for.inc:
8648 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8649 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
8650 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
8651 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
8652 // CHECK12: omp.inner.for.end:
8653 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8654 // CHECK12: omp.dispatch.inc:
8655 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8656 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8657 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
8658 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
8659 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8660 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8661 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
8662 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
8663 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]]
8664 // CHECK12: omp.dispatch.end:
8665 // CHECK12-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8666 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
8667 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])
8668 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8669 // CHECK12-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
8670 // CHECK12-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8671 // CHECK12: .omp.final.then:
8672 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8673 // CHECK12-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
8674 // CHECK12-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
8675 // CHECK12-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
8676 // CHECK12-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
8677 // CHECK12-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
8678 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
8679 // CHECK12: .omp.final.done:
8680 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8681 // CHECK12-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
8682 // CHECK12-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
8683 // CHECK12: .omp.lastprivate.then:
8684 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
8685 // CHECK12-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
8686 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
8687 // CHECK12: .omp.lastprivate.done:
8688 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
8689 // CHECK12: omp.precond.end:
8690 // CHECK12-NEXT: ret void
8691 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
8692 // CHECK12-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
8693 // CHECK12-NEXT: entry:
8694 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8695 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
8696 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8697 // CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
8698 // CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
8699 // CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
8700 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8701 // CHECK12-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
8702 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
8703 // CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
8704 // CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
8705 // CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
8706 // CHECK12: .execute:
8707 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
8708 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8709 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
8710 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
8711 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
8712 // CHECK12-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
8713 // CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
8714 // CHECK12: .omp.deinit:
8715 // CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
8716 // CHECK12-NEXT: br label [[DOTEXIT:%.*]]
8717 // CHECK12: .exit:
8718 // CHECK12-NEXT: ret void
8719 // CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__2
8720 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
8721 // CHECK12-NEXT: entry:
8722 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8723 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8724 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8725 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
8726 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8727 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
8728 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8729 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8730 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
8731 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8732 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8733 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8734 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8735 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
8736 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8737 // CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
8738 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8739 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8740 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8741 // CHECK12-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
8742 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
8743 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
8744 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
8745 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8746 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
8747 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8748 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8749 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8750 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
8751 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8752 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
8753 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8754 // CHECK12: omp.precond.then:
8755 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8756 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8757 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
8758 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8759 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8760 // CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
8761 // CHECK12-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8762 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
8763 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
8764 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8765 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8766 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
8767 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8768 // CHECK12: cond.true:
8769 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8770 // CHECK12-NEXT: br label [[COND_END:%.*]]
8771 // CHECK12: cond.false:
8772 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8773 // CHECK12-NEXT: br label [[COND_END]]
8774 // CHECK12: cond.end:
8775 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
8776 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8777 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8778 // CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
8779 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8780 // CHECK12: omp.inner.for.cond:
8781 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8782 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8783 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
8784 // CHECK12-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
8785 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8786 // CHECK12: omp.inner.for.body:
8787 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8788 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8789 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
8790 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
8791 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
8792 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
8793 // CHECK12-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
8794 // CHECK12-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
8795 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
8796 // CHECK12-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
8797 // CHECK12-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
8798 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
8799 // CHECK12-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
8800 // CHECK12-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
8801 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
8802 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
8803 // CHECK12-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
8804 // CHECK12-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8805 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
8806 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
8807 // CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
8808 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8809 // CHECK12: omp.inner.for.inc:
8810 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8811 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8812 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
8813 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
8814 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8815 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8816 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
8817 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
8818 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8819 // CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8820 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
8821 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
8822 // CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8823 // CHECK12-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8824 // CHECK12-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
8825 // CHECK12-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
8826 // CHECK12: cond.true10:
8827 // CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8828 // CHECK12-NEXT: br label [[COND_END12:%.*]]
8829 // CHECK12: cond.false11:
8830 // CHECK12-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8831 // CHECK12-NEXT: br label [[COND_END12]]
8832 // CHECK12: cond.end12:
8833 // CHECK12-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
8834 // CHECK12-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
8835 // CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8836 // CHECK12-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
8837 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
8838 // CHECK12: omp.inner.for.end:
8839 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8840 // CHECK12: omp.loop.exit:
8841 // CHECK12-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8842 // CHECK12-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
8843 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP41]])
8844 // CHECK12-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8845 // CHECK12-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
8846 // CHECK12-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8847 // CHECK12: .omp.final.then:
8848 // CHECK12-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8849 // CHECK12-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
8850 // CHECK12-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
8851 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
8852 // CHECK12-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
8853 // CHECK12-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
8854 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
8855 // CHECK12: .omp.final.done:
8856 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
8857 // CHECK12: omp.precond.end:
8858 // CHECK12-NEXT: ret void
8859 // CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__3
8860 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
8861 // CHECK12-NEXT: entry:
8862 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8863 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8864 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8865 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8866 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8867 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
8868 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8869 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
8870 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8871 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8872 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
8873 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8874 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8875 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8876 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8877 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
8878 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8879 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8880 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8881 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8882 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8883 // CHECK12-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
8884 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
8885 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
8886 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
8887 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8888 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
8889 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8890 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8891 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8892 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
8893 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8894 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
8895 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8896 // CHECK12: omp.precond.then:
8897 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8898 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8899 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
8900 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8901 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8902 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
8903 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
8904 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8905 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8906 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8907 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
8908 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8909 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8910 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
8911 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8912 // CHECK12: omp.inner.for.cond:
8913 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8914 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8915 // CHECK12-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
8916 // CHECK12-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8917 // CHECK12: omp.inner.for.body:
8918 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8919 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
8920 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8921 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
8922 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
8923 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
8924 // CHECK12-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
8925 // CHECK12-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
8926 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
8927 // CHECK12-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
8928 // CHECK12-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
8929 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8930 // CHECK12: omp.body.continue:
8931 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8932 // CHECK12: omp.inner.for.inc:
8933 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8934 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8935 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
8936 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
8937 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
8938 // CHECK12: omp.inner.for.end:
8939 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8940 // CHECK12: omp.loop.exit:
8941 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8942 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
8943 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
8944 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8945 // CHECK12-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
8946 // CHECK12-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8947 // CHECK12: .omp.final.then:
8948 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8949 // CHECK12-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
8950 // CHECK12-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
8951 // CHECK12-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
8952 // CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
8953 // CHECK12-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
8954 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
8955 // CHECK12: .omp.final.done:
8956 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
8957 // CHECK12: omp.precond.end:
8958 // CHECK12-NEXT: ret void
8959 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l49
8960 // CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
8961 // CHECK12-NEXT: entry:
8962 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
8963 // CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
8964 // CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
8965 // CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
8966 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
8967 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
8968 // CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
8969 // CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
8970 // CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
8971 // CHECK12: .execute:
8972 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
8973 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
8974 // CHECK12-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
8975 // CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
8976 // CHECK12: .omp.deinit:
8977 // CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
8978 // CHECK12-NEXT: br label [[DOTEXIT:%.*]]
8979 // CHECK12: .exit:
8980 // CHECK12-NEXT: ret void
8981 // CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__4
8982 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
8983 // CHECK12-NEXT: entry:
8984 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8985 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8986 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
8987 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8988 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
8989 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8990 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8991 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8992 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8993 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
8994 // CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
8995 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8996 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8997 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
8998 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
8999 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9000 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9001 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9002 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9003 // CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
9004 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9005 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9006 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
9007 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9008 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9009 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9010 // CHECK12: cond.true:
9011 // CHECK12-NEXT: br label [[COND_END:%.*]]
9012 // CHECK12: cond.false:
9013 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9014 // CHECK12-NEXT: br label [[COND_END]]
9015 // CHECK12: cond.end:
9016 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9017 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9018 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9019 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9020 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9021 // CHECK12: omp.inner.for.cond:
9022 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9023 // CHECK12-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
9024 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9025 // CHECK12: omp.inner.for.body:
9026 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9027 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9028 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
9029 // CHECK12-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
9030 // CHECK12-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
9031 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
9032 // CHECK12-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
9033 // CHECK12-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
9034 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
9035 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
9036 // CHECK12-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
9037 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
9038 // CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
9039 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9040 // CHECK12: omp.inner.for.inc:
9041 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9042 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9043 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
9044 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9045 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9046 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9047 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
9048 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
9049 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9050 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9051 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
9052 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
9053 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9054 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
9055 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
9056 // CHECK12: cond.true5:
9057 // CHECK12-NEXT: br label [[COND_END7:%.*]]
9058 // CHECK12: cond.false6:
9059 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9060 // CHECK12-NEXT: br label [[COND_END7]]
9061 // CHECK12: cond.end7:
9062 // CHECK12-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
9063 // CHECK12-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
9064 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9065 // CHECK12-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
9066 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
9067 // CHECK12: omp.inner.for.end:
9068 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9069 // CHECK12: omp.loop.exit:
9070 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9071 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9072 // CHECK12-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
9073 // CHECK12-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9074 // CHECK12: .omp.final.then:
9075 // CHECK12-NEXT: store i32 10, i32* [[I]], align 4
9076 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
9077 // CHECK12: .omp.final.done:
9078 // CHECK12-NEXT: ret void
9079 // CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__5
9080 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
9081 // CHECK12-NEXT: entry:
9082 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9083 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9084 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9085 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9086 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
9087 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9088 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
9089 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9090 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9091 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9092 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9093 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
9094 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9095 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9096 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9097 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9098 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
9099 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
9100 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9101 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9102 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9103 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9104 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
9105 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
9106 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9107 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9108 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9109 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
9110 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9111 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9112 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9113 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9114 // CHECK12: omp.inner.for.cond:
9115 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9116 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9117 // CHECK12-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
9118 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9119 // CHECK12: omp.inner.for.body:
9120 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9121 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
9122 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9123 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9124 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
9125 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
9126 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
9127 // CHECK12-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
9128 // CHECK12-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
9129 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9130 // CHECK12: omp.body.continue:
9131 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9132 // CHECK12: omp.inner.for.inc:
9133 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9134 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9135 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
9136 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
9137 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
9138 // CHECK12: omp.inner.for.end:
9139 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9140 // CHECK12: omp.loop.exit:
9141 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
9142 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9143 // CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
9144 // CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9145 // CHECK12: .omp.final.then:
9146 // CHECK12-NEXT: store i32 10, i32* [[I]], align 4
9147 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
9148 // CHECK12: .omp.final.done:
9149 // CHECK12-NEXT: ret void
9150 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l54
9151 // CHECK12-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
9152 // CHECK12-NEXT: entry:
9153 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
9154 // CHECK12-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
9155 // CHECK12-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
9156 // CHECK12-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
9157 // CHECK12-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
9158 // CHECK12-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
9159 // CHECK12-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
9160 // CHECK12-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
9161 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
9162 // CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
9163 // CHECK12-NEXT: call void @__kmpc_spmd_kernel_init(i32 [[NVPTX_NUM_THREADS]], i16 0)
9164 // CHECK12-NEXT: br label [[DOTEXECUTE:%.*]]
9165 // CHECK12: .execute:
9166 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
9167 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[F_ADDR]], align 4
9168 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[F_CASTED]], align 4
9169 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_CASTED]], align 4
9170 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
9171 // CHECK12-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP3]]) #[[ATTR3]]
9172 // CHECK12-NEXT: br label [[DOTOMP_DEINIT:%.*]]
9173 // CHECK12: .omp.deinit:
9174 // CHECK12-NEXT: call void @__kmpc_spmd_kernel_deinit_v2(i16 0)
9175 // CHECK12-NEXT: br label [[DOTEXIT:%.*]]
9176 // CHECK12: .exit:
9177 // CHECK12-NEXT: ret void
9178 // CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__6
9179 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
9180 // CHECK12-NEXT: entry:
9181 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9182 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9183 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
9184 // CHECK12-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
9185 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9186 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
9187 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
9188 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9189 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9190 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9191 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9192 // CHECK12-NEXT: [[K:%.*]] = alloca i32, align 4
9193 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
9194 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
9195 // CHECK12-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
9196 // CHECK12-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
9197 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9198 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9199 // CHECK12-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
9200 // CHECK12-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
9201 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
9202 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9203 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9204 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9205 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9206 // CHECK12-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
9207 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9208 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9209 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
9210 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9211 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
9212 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9213 // CHECK12: cond.true:
9214 // CHECK12-NEXT: br label [[COND_END:%.*]]
9215 // CHECK12: cond.false:
9216 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9217 // CHECK12-NEXT: br label [[COND_END]]
9218 // CHECK12: cond.end:
9219 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9220 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9221 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9222 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9223 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9224 // CHECK12: omp.inner.for.cond:
9225 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9226 // CHECK12-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
9227 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9228 // CHECK12: omp.inner.for.body:
9229 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9230 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9231 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
9232 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
9233 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
9234 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
9235 // CHECK12-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
9236 // CHECK12-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
9237 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
9238 // CHECK12-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
9239 // CHECK12-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
9240 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
9241 // CHECK12-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
9242 // CHECK12-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
9243 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
9244 // CHECK12-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
9245 // CHECK12-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
9246 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
9247 // CHECK12-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
9248 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9249 // CHECK12: omp.inner.for.inc:
9250 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9251 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9252 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
9253 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9254 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9255 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9256 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
9257 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
9258 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9259 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9260 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
9261 // CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
9262 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9263 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
9264 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
9265 // CHECK12: cond.true6:
9266 // CHECK12-NEXT: br label [[COND_END8:%.*]]
9267 // CHECK12: cond.false7:
9268 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9269 // CHECK12-NEXT: br label [[COND_END8]]
9270 // CHECK12: cond.end8:
9271 // CHECK12-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
9272 // CHECK12-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
9273 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9274 // CHECK12-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
9275 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
9276 // CHECK12: omp.inner.for.end:
9277 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9278 // CHECK12: omp.loop.exit:
9279 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9280 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9281 // CHECK12-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
9282 // CHECK12-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9283 // CHECK12: .omp.final.then:
9284 // CHECK12-NEXT: store i32 10, i32* [[I]], align 4
9285 // CHECK12-NEXT: store i32 10, i32* [[J]], align 4
9286 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
9287 // CHECK12: .omp.final.done:
9288 // CHECK12-NEXT: ret void
9289 // CHECK12-LABEL: define {{[^@]+}}@__omp_outlined__7
9290 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
9291 // CHECK12-NEXT: entry:
9292 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9293 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9294 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9295 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9296 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
9297 // CHECK12-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
9298 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9299 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
9300 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
9301 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9302 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9303 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9304 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9305 // CHECK12-NEXT: [[K:%.*]] = alloca i32, align 4
9306 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
9307 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
9308 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9309 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9310 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9311 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9312 // CHECK12-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
9313 // CHECK12-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
9314 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
9315 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9316 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
9317 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9318 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9319 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
9320 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
9321 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9322 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9323 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9324 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
9325 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9326 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9327 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9328 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9329 // CHECK12: omp.inner.for.cond:
9330 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9331 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9332 // CHECK12-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
9333 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9334 // CHECK12: omp.inner.for.body:
9335 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9336 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
9337 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
9338 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9339 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9340 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9341 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9342 // CHECK12-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
9343 // CHECK12-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
9344 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
9345 // CHECK12-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
9346 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
9347 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
9348 // CHECK12-NEXT: store i32 10, i32* [[K]], align 4
9349 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
9350 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
9351 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
9352 // CHECK12-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
9353 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
9354 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
9355 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
9356 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
9357 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
9358 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
9359 // CHECK12-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
9360 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
9361 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9362 // CHECK12: omp.body.continue:
9363 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9364 // CHECK12: omp.inner.for.inc:
9365 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9366 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9367 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
9368 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
9369 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
9370 // CHECK12: omp.inner.for.end:
9371 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9372 // CHECK12: omp.loop.exit:
9373 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
9374 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9375 // CHECK12-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
9376 // CHECK12-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9377 // CHECK12: .omp.final.then:
9378 // CHECK12-NEXT: store i32 10, i32* [[I]], align 4
9379 // CHECK12-NEXT: store i32 10, i32* [[J]], align 4
9380 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
9381 // CHECK12: .omp.final.done:
9382 // CHECK12-NEXT: ret void
9383 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l26
9384 // CHECK1-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
9385 // CHECK1-NEXT: entry:
9386 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
9387 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
9388 // CHECK1-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
9389 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
9390 // CHECK1-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
9391 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
9392 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
9393 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
9394 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
9395 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
9396 // CHECK1-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
9397 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9398 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
9399 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
9400 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i1 true, i1 false, i1 false)
9401 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
9402 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
9403 // CHECK1: user_code.entry:
9404 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
9405 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
9406 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
9407 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
9408 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
9409 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 8
9410 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[L_CASTED]] to i32*
9411 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV3]], align 4
9412 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[L_CASTED]], align 8
9413 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
9414 // CHECK1-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP4]], [1000 x i32]* [[TMP0]], i64 [[TMP6]]) #[[ATTR1:[0-9]+]]
9415 // CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 false)
9416 // CHECK1-NEXT: ret void
9417 // CHECK1: worker.exit:
9418 // CHECK1-NEXT: ret void
9419 //
9420 //
9421 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__
9422 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
9423 // CHECK1-NEXT: entry:
9424 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9425 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9426 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
9427 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
9428 // CHECK1-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
9429 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9430 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
9431 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9432 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
9433 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
9434 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9435 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9436 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9437 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9438 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4
9439 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
9440 // CHECK1-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
9441 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
9442 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9443 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9444 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
9445 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
9446 // CHECK1-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
9447 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9448 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
9449 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
9450 // CHECK1-NEXT: [[L2:%.*]] = call i8* @__kmpc_alloc_shared(i64 4)
9451 // CHECK1-NEXT: [[L_ON_STACK:%.*]] = bitcast i8* [[L2]] to i32*
9452 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
9453 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
9454 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9455 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
9456 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9457 // CHECK1-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
9458 // CHECK1-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
9459 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
9460 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9461 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
9462 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9463 // CHECK1: omp.precond.then:
9464 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9465 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
9466 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
9467 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9468 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9469 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9470 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
9471 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
9472 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9473 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
9474 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
9475 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9476 // CHECK1: cond.true:
9477 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
9478 // CHECK1-NEXT: br label [[COND_END:%.*]]
9479 // CHECK1: cond.false:
9480 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9481 // CHECK1-NEXT: br label [[COND_END]]
9482 // CHECK1: cond.end:
9483 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
9484 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9485 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9486 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
9487 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9488 // CHECK1: omp.inner.for.cond:
9489 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
9490 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4, !llvm.access.group !12
9491 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
9492 // CHECK1-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
9493 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9494 // CHECK1: omp.inner.for.body:
9495 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
9496 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
9497 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
9498 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
9499 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !12
9500 // CHECK1-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
9501 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV8]], align 4, !llvm.access.group !12
9502 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !12
9503 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8, !llvm.access.group !12
9504 // CHECK1-NEXT: [[CONV9:%.*]] = bitcast i64* [[L_CASTED]] to i32*
9505 // CHECK1-NEXT: store i32 [[TMP20]], i32* [[CONV9]], align 4, !llvm.access.group !12
9506 // CHECK1-NEXT: [[TMP21:%.*]] = load i64, i64* [[L_CASTED]], align 8, !llvm.access.group !12
9507 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
9508 // CHECK1-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP15]] to i8*
9509 // CHECK1-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8, !llvm.access.group !12
9510 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
9511 // CHECK1-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP17]] to i8*
9512 // CHECK1-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8, !llvm.access.group !12
9513 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
9514 // CHECK1-NEXT: [[TMP27:%.*]] = inttoptr i64 [[TMP19]] to i8*
9515 // CHECK1-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8, !llvm.access.group !12
9516 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
9517 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
9518 // CHECK1-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 8, !llvm.access.group !12
9519 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
9520 // CHECK1-NEXT: [[TMP31:%.*]] = inttoptr i64 [[TMP21]] to i8*
9521 // CHECK1-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 8, !llvm.access.group !12
9522 // CHECK1-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !12
9523 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4, !llvm.access.group !12
9524 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
9525 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i64 5), !llvm.access.group !12
9526 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9527 // CHECK1: omp.inner.for.inc:
9528 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
9529 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !12
9530 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
9531 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
9532 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
9533 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !12
9534 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
9535 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
9536 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
9537 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !12
9538 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
9539 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
9540 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
9541 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4, !llvm.access.group !12
9542 // CHECK1-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
9543 // CHECK1-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
9544 // CHECK1: cond.true14:
9545 // CHECK1-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4, !llvm.access.group !12
9546 // CHECK1-NEXT: br label [[COND_END16:%.*]]
9547 // CHECK1: cond.false15:
9548 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
9549 // CHECK1-NEXT: br label [[COND_END16]]
9550 // CHECK1: cond.end16:
9551 // CHECK1-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE14]] ], [ [[TMP44]], [[COND_FALSE15]] ]
9552 // CHECK1-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
9553 // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
9554 // CHECK1-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
9555 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
9556 // CHECK1: omp.inner.for.end:
9557 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9558 // CHECK1: omp.loop.exit:
9559 // CHECK1-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9560 // CHECK1-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
9561 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP47]])
9562 // CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9563 // CHECK1-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
9564 // CHECK1-NEXT: br i1 [[TMP49]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9565 // CHECK1: .omp.final.then:
9566 // CHECK1-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9567 // CHECK1-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP50]], 0
9568 // CHECK1-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
9569 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV19]], 1
9570 // CHECK1-NEXT: [[ADD20:%.*]] = add nsw i32 0, [[MUL]]
9571 // CHECK1-NEXT: store i32 [[ADD20]], i32* [[I5]], align 4
9572 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
9573 // CHECK1: .omp.final.done:
9574 // CHECK1-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9575 // CHECK1-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0
9576 // CHECK1-NEXT: br i1 [[TMP52]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
9577 // CHECK1: .omp.lastprivate.then:
9578 // CHECK1-NEXT: [[TMP53:%.*]] = load i32, i32* [[CONV1]], align 8
9579 // CHECK1-NEXT: store i32 [[TMP53]], i32* [[CONV1]], align 8
9580 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
9581 // CHECK1: .omp.lastprivate.done:
9582 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
9583 // CHECK1: omp.precond.end:
9584 // CHECK1-NEXT: call void @__kmpc_free_shared(i8* [[L2]], i64 4)
9585 // CHECK1-NEXT: ret void
9586 //
9587 //
9588 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1
9589 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[L:%.*]]) #[[ATTR0]] {
9590 // CHECK1-NEXT: entry:
9591 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9592 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9593 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9594 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9595 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
9596 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
9597 // CHECK1-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
9598 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9599 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
9600 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9601 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
9602 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
9603 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9604 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9605 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9606 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9607 // CHECK1-NEXT: [[I6:%.*]] = alloca i32, align 4
9608 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9609 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9610 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9611 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9612 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
9613 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
9614 // CHECK1-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
9615 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9616 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
9617 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
9618 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
9619 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
9620 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9621 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
9622 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9623 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
9624 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
9625 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
9626 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9627 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
9628 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9629 // CHECK1: omp.precond.then:
9630 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9631 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9632 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
9633 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9634 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP5]] to i32
9635 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9636 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
9637 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
9638 // CHECK1-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
9639 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9640 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9641 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9642 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
9643 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
9644 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9645 // CHECK1: omp.dispatch.cond:
9646 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9647 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9648 // CHECK1-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP10]] to i32
9649 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP9]], [[CONV7]]
9650 // CHECK1-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9651 // CHECK1: cond.true:
9652 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9653 // CHECK1-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP11]] to i32
9654 // CHECK1-NEXT: br label [[COND_END:%.*]]
9655 // CHECK1: cond.false:
9656 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9657 // CHECK1-NEXT: br label [[COND_END]]
9658 // CHECK1: cond.end:
9659 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
9660 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9661 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9662 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
9663 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9664 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9665 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
9666 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9667 // CHECK1: omp.dispatch.body:
9668 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9669 // CHECK1: omp.inner.for.cond:
9670 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
9671 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
9672 // CHECK1-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
9673 // CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9674 // CHECK1: omp.inner.for.body:
9675 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
9676 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
9677 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9678 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !16
9679 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !16
9680 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
9681 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9682 // CHECK1-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
9683 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !16
9684 // CHECK1-NEXT: store i32 [[TMP20]], i32* [[CONV1]], align 8, !llvm.access.group !16
9685 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9686 // CHECK1: omp.body.continue:
9687 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9688 // CHECK1: omp.inner.for.inc:
9689 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
9690 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP21]], 1
9691 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
9692 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
9693 // CHECK1: omp.inner.for.end:
9694 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9695 // CHECK1: omp.dispatch.inc:
9696 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9697 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9698 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
9699 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_LB]], align 4
9700 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9701 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9702 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
9703 // CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_UB]], align 4
9704 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
9705 // CHECK1: omp.dispatch.end:
9706 // CHECK1-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9707 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
9708 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP27]])
9709 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9710 // CHECK1-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
9711 // CHECK1-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9712 // CHECK1: .omp.final.then:
9713 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9714 // CHECK1-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP30]], 0
9715 // CHECK1-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
9716 // CHECK1-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1
9717 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]]
9718 // CHECK1-NEXT: store i32 [[ADD18]], i32* [[I6]], align 4
9719 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
9720 // CHECK1: .omp.final.done:
9721 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9722 // CHECK1-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
9723 // CHECK1-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
9724 // CHECK1: .omp.lastprivate.then:
9725 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[CONV1]], align 8
9726 // CHECK1-NEXT: store i32 [[TMP33]], i32* [[CONV1]], align 8
9727 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
9728 // CHECK1: .omp.lastprivate.done:
9729 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
9730 // CHECK1: omp.precond.end:
9731 // CHECK1-NEXT: ret void
9732 //
9733 //
9734 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l32
9735 // CHECK1-SAME: (i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR2:[0-9]+]] {
9736 // CHECK1-NEXT: entry:
9737 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
9738 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
9739 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
9740 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
9741 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
9742 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
9743 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
9744 // CHECK1-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
9745 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9746 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
9747 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i1 true, i1 false, i1 false)
9748 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
9749 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
9750 // CHECK1: user_code.entry:
9751 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
9752 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
9753 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
9754 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
9755 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
9756 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
9757 // CHECK1-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP4]], [1000 x i16]* [[TMP0]]) #[[ATTR1]]
9758 // CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 false)
9759 // CHECK1-NEXT: ret void
9760 // CHECK1: worker.exit:
9761 // CHECK1-NEXT: ret void
9762 //
9763 //
9764 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__2
9765 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
9766 // CHECK1-NEXT: entry:
9767 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9768 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9769 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
9770 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
9771 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9772 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
9773 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9774 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9775 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
9776 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9777 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9778 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9779 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9780 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4
9781 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
9782 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
9783 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9784 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9785 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
9786 // CHECK1-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
9787 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9788 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
9789 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
9790 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
9791 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9792 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
9793 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9794 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9795 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9796 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
9797 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9798 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
9799 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9800 // CHECK1: omp.precond.then:
9801 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9802 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9803 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
9804 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9805 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9806 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
9807 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9808 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
9809 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
9810 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9811 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9812 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
9813 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9814 // CHECK1: cond.true:
9815 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9816 // CHECK1-NEXT: br label [[COND_END:%.*]]
9817 // CHECK1: cond.false:
9818 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9819 // CHECK1-NEXT: br label [[COND_END]]
9820 // CHECK1: cond.end:
9821 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
9822 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9823 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9824 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
9825 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9826 // CHECK1: omp.inner.for.cond:
9827 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
9828 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group !19
9829 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
9830 // CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
9831 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9832 // CHECK1: omp.inner.for.body:
9833 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
9834 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
9835 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
9836 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
9837 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !19
9838 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
9839 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4, !llvm.access.group !19
9840 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !19
9841 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
9842 // CHECK1-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to i8*
9843 // CHECK1-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8, !llvm.access.group !19
9844 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
9845 // CHECK1-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to i8*
9846 // CHECK1-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8, !llvm.access.group !19
9847 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
9848 // CHECK1-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to i8*
9849 // CHECK1-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8, !llvm.access.group !19
9850 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
9851 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
9852 // CHECK1-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8, !llvm.access.group !19
9853 // CHECK1-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !19
9854 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4, !llvm.access.group !19
9855 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
9856 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP30]], i64 4), !llvm.access.group !19
9857 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9858 // CHECK1: omp.inner.for.inc:
9859 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
9860 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !19
9861 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
9862 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
9863 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
9864 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !19
9865 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
9866 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
9867 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
9868 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !19
9869 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
9870 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
9871 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
9872 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group !19
9873 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]
9874 // CHECK1-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
9875 // CHECK1: cond.true11:
9876 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group !19
9877 // CHECK1-NEXT: br label [[COND_END13:%.*]]
9878 // CHECK1: cond.false12:
9879 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
9880 // CHECK1-NEXT: br label [[COND_END13]]
9881 // CHECK1: cond.end13:
9882 // CHECK1-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE11]] ], [ [[TMP40]], [[COND_FALSE12]] ]
9883 // CHECK1-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
9884 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
9885 // CHECK1-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
9886 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
9887 // CHECK1: omp.inner.for.end:
9888 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9889 // CHECK1: omp.loop.exit:
9890 // CHECK1-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9891 // CHECK1-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4
9892 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP43]])
9893 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9894 // CHECK1-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
9895 // CHECK1-NEXT: br i1 [[TMP45]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9896 // CHECK1: .omp.final.then:
9897 // CHECK1-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9898 // CHECK1-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP46]], 0
9899 // CHECK1-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
9900 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
9901 // CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
9902 // CHECK1-NEXT: store i32 [[ADD17]], i32* [[I3]], align 4
9903 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
9904 // CHECK1: .omp.final.done:
9905 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
9906 // CHECK1: omp.precond.end:
9907 // CHECK1-NEXT: ret void
9908 //
9909 //
9910 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__3
9911 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
9912 // CHECK1-NEXT: entry:
9913 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9914 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9915 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9916 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9917 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
9918 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
9919 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9920 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
9921 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9922 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9923 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
9924 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9925 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9926 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9927 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9928 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4
9929 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9930 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9931 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9932 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9933 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
9934 // CHECK1-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
9935 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9936 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
9937 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
9938 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
9939 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9940 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
9941 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9942 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9943 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9944 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
9945 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9946 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
9947 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9948 // CHECK1: omp.precond.then:
9949 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9950 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9951 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
9952 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9953 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
9954 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9955 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
9956 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
9957 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
9958 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9959 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9960 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9961 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
9962 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9963 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9964 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
9965 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9966 // CHECK1: omp.inner.for.cond:
9967 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9968 // CHECK1-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
9969 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group !22
9970 // CHECK1-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
9971 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9972 // CHECK1: omp.inner.for.body:
9973 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9974 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
9975 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9976 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !22
9977 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !22
9978 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
9979 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9980 // CHECK1-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2, !llvm.access.group !22
9981 // CHECK1-NEXT: [[CONV8:%.*]] = sext i16 [[TMP14]] to i32
9982 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], 1
9983 // CHECK1-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i16
9984 // CHECK1-NEXT: store i16 [[CONV10]], i16* [[ARRAYIDX]], align 2, !llvm.access.group !22
9985 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9986 // CHECK1: omp.body.continue:
9987 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9988 // CHECK1: omp.inner.for.inc:
9989 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9990 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
9991 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
9992 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9993 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
9994 // CHECK1: omp.inner.for.end:
9995 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9996 // CHECK1: omp.loop.exit:
9997 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9998 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
9999 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]])
10000 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10001 // CHECK1-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
10002 // CHECK1-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10003 // CHECK1: .omp.final.then:
10004 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10005 // CHECK1-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP21]], 0
10006 // CHECK1-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
10007 // CHECK1-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
10008 // CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
10009 // CHECK1-NEXT: store i32 [[ADD15]], i32* [[I5]], align 4
10010 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
10011 // CHECK1: .omp.final.done:
10012 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
10013 // CHECK1: omp.precond.end:
10014 // CHECK1-NEXT: ret void
10015 //
10016 //
10017 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l37
10018 // CHECK1-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
10019 // CHECK1-NEXT: entry:
10020 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
10021 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
10022 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
10023 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
10024 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
10025 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
10026 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i1 true, i1 false, i1 false)
10027 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
10028 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
10029 // CHECK1: user_code.entry:
10030 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
10031 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
10032 // CHECK1-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR1]]
10033 // CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 false)
10034 // CHECK1-NEXT: ret void
10035 // CHECK1: worker.exit:
10036 // CHECK1-NEXT: ret void
10037 //
10038 //
10039 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__4
10040 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
10041 // CHECK1-NEXT: entry:
10042 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10043 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10044 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
10045 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10046 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
10047 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10048 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10049 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10050 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10051 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
10052 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8
10053 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10054 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10055 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
10056 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
10057 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10058 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
10059 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10060 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10061 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
10062 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10063 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
10064 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
10065 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10066 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
10067 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10068 // CHECK1: cond.true:
10069 // CHECK1-NEXT: br label [[COND_END:%.*]]
10070 // CHECK1: cond.false:
10071 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10072 // CHECK1-NEXT: br label [[COND_END]]
10073 // CHECK1: cond.end:
10074 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
10075 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10076 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10077 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
10078 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10079 // CHECK1: omp.inner.for.cond:
10080 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
10081 // CHECK1-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
10082 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10083 // CHECK1: omp.inner.for.body:
10084 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
10085 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10086 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
10087 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10088 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
10089 // CHECK1-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8*
10090 // CHECK1-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8, !llvm.access.group !25
10091 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
10092 // CHECK1-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8*
10093 // CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8, !llvm.access.group !25
10094 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
10095 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
10096 // CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8, !llvm.access.group !25
10097 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
10098 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP17]], i64 3), !llvm.access.group !25
10099 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10100 // CHECK1: omp.inner.for.inc:
10101 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
10102 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !25
10103 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
10104 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
10105 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
10106 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !25
10107 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
10108 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
10109 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
10110 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !25
10111 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
10112 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
10113 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
10114 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP24]], 9
10115 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
10116 // CHECK1: cond.true5:
10117 // CHECK1-NEXT: br label [[COND_END7:%.*]]
10118 // CHECK1: cond.false6:
10119 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
10120 // CHECK1-NEXT: br label [[COND_END7]]
10121 // CHECK1: cond.end7:
10122 // CHECK1-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP25]], [[COND_FALSE6]] ]
10123 // CHECK1-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
10124 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
10125 // CHECK1-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
10126 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
10127 // CHECK1: omp.inner.for.end:
10128 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10129 // CHECK1: omp.loop.exit:
10130 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
10131 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10132 // CHECK1-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
10133 // CHECK1-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10134 // CHECK1: .omp.final.then:
10135 // CHECK1-NEXT: store i32 10, i32* [[I]], align 4
10136 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
10137 // CHECK1: .omp.final.done:
10138 // CHECK1-NEXT: ret void
10139 //
10140 //
10141 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__5
10142 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
10143 // CHECK1-NEXT: entry:
10144 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10145 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10146 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10147 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10148 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
10149 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10150 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
10151 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10152 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10153 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10154 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10155 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
10156 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10157 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10158 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10159 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10160 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
10161 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
10162 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10163 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
10164 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10165 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
10166 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10167 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
10168 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10169 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10170 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10171 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10172 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10173 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
10174 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10175 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10176 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
10177 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10178 // CHECK1: omp.inner.for.cond:
10179 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
10180 // CHECK1-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
10181 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group !28
10182 // CHECK1-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
10183 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10184 // CHECK1: omp.inner.for.body:
10185 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
10186 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
10187 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10188 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !28
10189 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !28
10190 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
10191 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
10192 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28
10193 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10194 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !28
10195 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10196 // CHECK1: omp.body.continue:
10197 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10198 // CHECK1: omp.inner.for.inc:
10199 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
10200 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
10201 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
10202 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
10203 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
10204 // CHECK1: omp.inner.for.end:
10205 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10206 // CHECK1: omp.loop.exit:
10207 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
10208 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10209 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
10210 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10211 // CHECK1: .omp.final.then:
10212 // CHECK1-NEXT: store i32 10, i32* [[I]], align 4
10213 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
10214 // CHECK1: .omp.final.done:
10215 // CHECK1-NEXT: ret void
10216 //
10217 //
10218 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l42
10219 // CHECK1-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
10220 // CHECK1-NEXT: entry:
10221 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
10222 // CHECK1-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
10223 // CHECK1-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
10224 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
10225 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
10226 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
10227 // CHECK1-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
10228 // CHECK1-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
10229 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
10230 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
10231 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i1 true, i1 false, i1 false)
10232 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
10233 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
10234 // CHECK1: user_code.entry:
10235 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
10236 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
10237 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[F_CASTED]] to i32*
10238 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
10239 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[F_CASTED]], align 8
10240 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
10241 // CHECK1-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i64 [[TMP4]]) #[[ATTR1]]
10242 // CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 false)
10243 // CHECK1-NEXT: ret void
10244 // CHECK1: worker.exit:
10245 // CHECK1-NEXT: ret void
10246 //
10247 //
10248 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__6
10249 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
10250 // CHECK1-NEXT: entry:
10251 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10252 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10253 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
10254 // CHECK1-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
10255 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10256 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
10257 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
10258 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10259 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10260 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10261 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10262 // CHECK1-NEXT: [[K:%.*]] = alloca i32, align 4
10263 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
10264 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
10265 // CHECK1-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
10266 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
10267 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10268 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10269 // CHECK1-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
10270 // CHECK1-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
10271 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
10272 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
10273 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10274 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10275 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10276 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10277 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
10278 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10279 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
10280 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
10281 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10282 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
10283 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10284 // CHECK1: cond.true:
10285 // CHECK1-NEXT: br label [[COND_END:%.*]]
10286 // CHECK1: cond.false:
10287 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10288 // CHECK1-NEXT: br label [[COND_END]]
10289 // CHECK1: cond.end:
10290 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
10291 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10292 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10293 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
10294 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10295 // CHECK1: omp.inner.for.cond:
10296 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
10297 // CHECK1-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
10298 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10299 // CHECK1: omp.inner.for.body:
10300 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !31
10301 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10302 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
10303 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10304 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !31
10305 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[F_CASTED]] to i32*
10306 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4, !llvm.access.group !31
10307 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[F_CASTED]], align 8, !llvm.access.group !31
10308 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
10309 // CHECK1-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to i8*
10310 // CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8, !llvm.access.group !31
10311 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
10312 // CHECK1-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to i8*
10313 // CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8, !llvm.access.group !31
10314 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
10315 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
10316 // CHECK1-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8, !llvm.access.group !31
10317 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
10318 // CHECK1-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP12]] to i8*
10319 // CHECK1-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8, !llvm.access.group !31
10320 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
10321 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x [10 x i32]]*, i64)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP21]], i64 4), !llvm.access.group !31
10322 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10323 // CHECK1: omp.inner.for.inc:
10324 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
10325 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !31
10326 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
10327 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
10328 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !31
10329 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !31
10330 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
10331 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !31
10332 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
10333 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !31
10334 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
10335 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
10336 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
10337 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP28]], 99
10338 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
10339 // CHECK1: cond.true7:
10340 // CHECK1-NEXT: br label [[COND_END9:%.*]]
10341 // CHECK1: cond.false8:
10342 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
10343 // CHECK1-NEXT: br label [[COND_END9]]
10344 // CHECK1: cond.end9:
10345 // CHECK1-NEXT: [[COND10:%.*]] = phi i32 [ 99, [[COND_TRUE7]] ], [ [[TMP29]], [[COND_FALSE8]] ]
10346 // CHECK1-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
10347 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !31
10348 // CHECK1-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
10349 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
10350 // CHECK1: omp.inner.for.end:
10351 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10352 // CHECK1: omp.loop.exit:
10353 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
10354 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10355 // CHECK1-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
10356 // CHECK1-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10357 // CHECK1: .omp.final.then:
10358 // CHECK1-NEXT: store i32 10, i32* [[I]], align 4
10359 // CHECK1-NEXT: store i32 10, i32* [[J]], align 4
10360 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
10361 // CHECK1: .omp.final.done:
10362 // CHECK1-NEXT: ret void
10363 //
10364 //
10365 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__7
10366 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i64 [[F:%.*]]) #[[ATTR0]] {
10367 // CHECK1-NEXT: entry:
10368 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10369 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10370 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10371 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10372 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
10373 // CHECK1-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
10374 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10375 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
10376 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
10377 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10378 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10379 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10380 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10381 // CHECK1-NEXT: [[K:%.*]] = alloca i32, align 4
10382 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
10383 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
10384 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10385 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10386 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10387 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10388 // CHECK1-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
10389 // CHECK1-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
10390 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
10391 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
10392 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10393 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
10394 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10395 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
10396 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10397 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP2]] to i32
10398 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
10399 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
10400 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10401 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10402 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10403 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
10404 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10405 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10406 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
10407 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10408 // CHECK1: omp.inner.for.cond:
10409 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
10410 // CHECK1-NEXT: [[CONV4:%.*]] = sext i32 [[TMP6]] to i64
10411 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group !34
10412 // CHECK1-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV4]], [[TMP7]]
10413 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10414 // CHECK1: omp.inner.for.body:
10415 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
10416 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
10417 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
10418 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10419 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !34
10420 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
10421 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
10422 // CHECK1-NEXT: [[DIV5:%.*]] = sdiv i32 [[TMP10]], 10
10423 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[DIV5]], 10
10424 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL6]]
10425 // CHECK1-NEXT: [[MUL7:%.*]] = mul nsw i32 [[SUB]], 1
10426 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
10427 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[J]], align 4, !llvm.access.group !34
10428 // CHECK1-NEXT: store i32 10, i32* [[K]], align 4, !llvm.access.group !34
10429 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !34
10430 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !34
10431 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !34
10432 // CHECK1-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
10433 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP11]], [[MUL9]]
10434 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4, !llvm.access.group !34
10435 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD10]], [[TMP14]]
10436 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !34
10437 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
10438 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
10439 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !34
10440 // CHECK1-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP16]] to i64
10441 // CHECK1-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM12]]
10442 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[ARRAYIDX13]], align 4, !llvm.access.group !34
10443 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10444 // CHECK1: omp.body.continue:
10445 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10446 // CHECK1: omp.inner.for.inc:
10447 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
10448 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
10449 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
10450 // CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
10451 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
10452 // CHECK1: omp.inner.for.end:
10453 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10454 // CHECK1: omp.loop.exit:
10455 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
10456 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10457 // CHECK1-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
10458 // CHECK1-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10459 // CHECK1: .omp.final.then:
10460 // CHECK1-NEXT: store i32 10, i32* [[I]], align 4
10461 // CHECK1-NEXT: store i32 10, i32* [[J]], align 4
10462 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
10463 // CHECK1: .omp.final.done:
10464 // CHECK1-NEXT: ret void
10465 //
10466 //
10467 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l26
10468 // CHECK2-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
10469 // CHECK2-NEXT: entry:
10470 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
10471 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
10472 // CHECK2-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
10473 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
10474 // CHECK2-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
10475 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
10476 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
10477 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
10478 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
10479 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
10480 // CHECK2-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
10481 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
10482 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i1 true, i1 false, i1 false)
10483 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
10484 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
10485 // CHECK2: user_code.entry:
10486 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
10487 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
10488 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4
10489 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4
10490 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_ADDR]], align 4
10491 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[L_CASTED]], align 4
10492 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[L_CASTED]], align 4
10493 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
10494 // CHECK2-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP4]], [1000 x i32]* [[TMP0]], i32 [[TMP6]]) #[[ATTR1:[0-9]+]]
10495 // CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 false)
10496 // CHECK2-NEXT: ret void
10497 // CHECK2: worker.exit:
10498 // CHECK2-NEXT: ret void
10499 //
10500 //
10501 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__
10502 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
10503 // CHECK2-NEXT: entry:
10504 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
10505 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
10506 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
10507 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
10508 // CHECK2-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
10509 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10510 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
10511 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10512 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10513 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
10514 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10515 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10516 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10517 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10518 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4
10519 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
10520 // CHECK2-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
10521 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
10522 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
10523 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
10524 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
10525 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
10526 // CHECK2-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
10527 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
10528 // CHECK2-NEXT: [[L1:%.*]] = call i8* @__kmpc_alloc_shared(i32 4)
10529 // CHECK2-NEXT: [[L_ON_STACK:%.*]] = bitcast i8* [[L1]] to i32*
10530 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
10531 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
10532 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10533 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
10534 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10535 // CHECK2-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10536 // CHECK2-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10537 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
10538 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10539 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
10540 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10541 // CHECK2: omp.precond.then:
10542 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10543 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10544 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
10545 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10546 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10547 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10548 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
10549 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
10550 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10551 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10552 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
10553 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10554 // CHECK2: cond.true:
10555 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10556 // CHECK2-NEXT: br label [[COND_END:%.*]]
10557 // CHECK2: cond.false:
10558 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10559 // CHECK2-NEXT: br label [[COND_END]]
10560 // CHECK2: cond.end:
10561 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
10562 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10563 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10564 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
10565 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10566 // CHECK2: omp.inner.for.cond:
10567 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
10568 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !12
10569 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
10570 // CHECK2-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
10571 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10572 // CHECK2: omp.inner.for.body:
10573 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
10574 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
10575 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !12
10576 // CHECK2-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4, !llvm.access.group !12
10577 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !12
10578 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[L_ADDR]], align 4, !llvm.access.group !12
10579 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[L_CASTED]], align 4, !llvm.access.group !12
10580 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[L_CASTED]], align 4, !llvm.access.group !12
10581 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
10582 // CHECK2-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP14]] to i8*
10583 // CHECK2-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4, !llvm.access.group !12
10584 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
10585 // CHECK2-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP15]] to i8*
10586 // CHECK2-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4, !llvm.access.group !12
10587 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
10588 // CHECK2-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
10589 // CHECK2-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4, !llvm.access.group !12
10590 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
10591 // CHECK2-NEXT: [[TMP27:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
10592 // CHECK2-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4, !llvm.access.group !12
10593 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
10594 // CHECK2-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP19]] to i8*
10595 // CHECK2-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4, !llvm.access.group !12
10596 // CHECK2-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4, !llvm.access.group !12
10597 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4, !llvm.access.group !12
10598 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
10599 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP31]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP32]], i32 5), !llvm.access.group !12
10600 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10601 // CHECK2: omp.inner.for.inc:
10602 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
10603 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !12
10604 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
10605 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
10606 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
10607 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !12
10608 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
10609 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
10610 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
10611 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !12
10612 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
10613 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
10614 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
10615 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !12
10616 // CHECK2-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP39]], [[TMP40]]
10617 // CHECK2-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
10618 // CHECK2: cond.true11:
10619 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !12
10620 // CHECK2-NEXT: br label [[COND_END13:%.*]]
10621 // CHECK2: cond.false12:
10622 // CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
10623 // CHECK2-NEXT: br label [[COND_END13]]
10624 // CHECK2: cond.end13:
10625 // CHECK2-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP41]], [[COND_TRUE11]] ], [ [[TMP42]], [[COND_FALSE12]] ]
10626 // CHECK2-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
10627 // CHECK2-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
10628 // CHECK2-NEXT: store i32 [[TMP43]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
10629 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
10630 // CHECK2: omp.inner.for.end:
10631 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10632 // CHECK2: omp.loop.exit:
10633 // CHECK2-NEXT: [[TMP44:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10634 // CHECK2-NEXT: [[TMP45:%.*]] = load i32, i32* [[TMP44]], align 4
10635 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP45]])
10636 // CHECK2-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10637 // CHECK2-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0
10638 // CHECK2-NEXT: br i1 [[TMP47]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10639 // CHECK2: .omp.final.then:
10640 // CHECK2-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10641 // CHECK2-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP48]], 0
10642 // CHECK2-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
10643 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
10644 // CHECK2-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
10645 // CHECK2-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
10646 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
10647 // CHECK2: .omp.final.done:
10648 // CHECK2-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10649 // CHECK2-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0
10650 // CHECK2-NEXT: br i1 [[TMP50]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
10651 // CHECK2: .omp.lastprivate.then:
10652 // CHECK2-NEXT: [[TMP51:%.*]] = load i32, i32* [[L_ADDR]], align 4
10653 // CHECK2-NEXT: store i32 [[TMP51]], i32* [[L_ADDR]], align 4
10654 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
10655 // CHECK2: .omp.lastprivate.done:
10656 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
10657 // CHECK2: omp.precond.end:
10658 // CHECK2-NEXT: call void @__kmpc_free_shared(i8* [[L1]], i32 4)
10659 // CHECK2-NEXT: ret void
10660 //
10661 //
10662 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1
10663 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
10664 // CHECK2-NEXT: entry:
10665 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
10666 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
10667 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
10668 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
10669 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
10670 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
10671 // CHECK2-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
10672 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10673 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
10674 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10675 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10676 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
10677 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10678 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10679 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10680 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10681 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4
10682 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
10683 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
10684 // CHECK2-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
10685 // CHECK2-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
10686 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
10687 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
10688 // CHECK2-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
10689 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
10690 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
10691 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
10692 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10693 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
10694 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10695 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10696 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10697 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
10698 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10699 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
10700 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10701 // CHECK2: omp.precond.then:
10702 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10703 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10704 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
10705 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
10706 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
10707 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
10708 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
10709 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10710 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10711 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10712 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
10713 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
10714 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10715 // CHECK2: omp.dispatch.cond:
10716 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10717 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
10718 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10719 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10720 // CHECK2: cond.true:
10721 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
10722 // CHECK2-NEXT: br label [[COND_END:%.*]]
10723 // CHECK2: cond.false:
10724 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10725 // CHECK2-NEXT: br label [[COND_END]]
10726 // CHECK2: cond.end:
10727 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10728 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10729 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10730 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
10731 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10732 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10733 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
10734 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10735 // CHECK2: omp.dispatch.body:
10736 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10737 // CHECK2: omp.inner.for.cond:
10738 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
10739 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
10740 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10741 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10742 // CHECK2: omp.inner.for.body:
10743 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
10744 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10745 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10746 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
10747 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
10748 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
10749 // CHECK2-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
10750 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
10751 // CHECK2-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4, !llvm.access.group !16
10752 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10753 // CHECK2: omp.body.continue:
10754 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10755 // CHECK2: omp.inner.for.inc:
10756 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
10757 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
10758 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
10759 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
10760 // CHECK2: omp.inner.for.end:
10761 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10762 // CHECK2: omp.dispatch.inc:
10763 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10764 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10765 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
10766 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
10767 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10768 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10769 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
10770 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
10771 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]]
10772 // CHECK2: omp.dispatch.end:
10773 // CHECK2-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10774 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
10775 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP27]])
10776 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10777 // CHECK2-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
10778 // CHECK2-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10779 // CHECK2: .omp.final.then:
10780 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10781 // CHECK2-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
10782 // CHECK2-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
10783 // CHECK2-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
10784 // CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
10785 // CHECK2-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
10786 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
10787 // CHECK2: .omp.final.done:
10788 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10789 // CHECK2-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
10790 // CHECK2-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
10791 // CHECK2: .omp.lastprivate.then:
10792 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
10793 // CHECK2-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
10794 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
10795 // CHECK2: .omp.lastprivate.done:
10796 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
10797 // CHECK2: omp.precond.end:
10798 // CHECK2-NEXT: ret void
10799 //
10800 //
10801 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l32
10802 // CHECK2-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR2:[0-9]+]] {
10803 // CHECK2-NEXT: entry:
10804 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
10805 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
10806 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
10807 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
10808 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
10809 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
10810 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
10811 // CHECK2-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
10812 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
10813 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i1 true, i1 false, i1 false)
10814 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
10815 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
10816 // CHECK2: user_code.entry:
10817 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
10818 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
10819 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4
10820 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4
10821 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
10822 // CHECK2-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP4]], [1000 x i16]* [[TMP0]]) #[[ATTR1]]
10823 // CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 false)
10824 // CHECK2-NEXT: ret void
10825 // CHECK2: worker.exit:
10826 // CHECK2-NEXT: ret void
10827 //
10828 //
10829 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__2
10830 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
10831 // CHECK2-NEXT: entry:
10832 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
10833 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
10834 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
10835 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
10836 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10837 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
10838 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10839 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10840 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
10841 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10842 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10843 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10844 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10845 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4
10846 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
10847 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
10848 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
10849 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
10850 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
10851 // CHECK2-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
10852 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
10853 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
10854 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
10855 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10856 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
10857 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10858 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10859 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10860 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
10861 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10862 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
10863 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10864 // CHECK2: omp.precond.then:
10865 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10866 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10867 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
10868 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10869 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10870 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
10871 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10872 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
10873 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
10874 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10875 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10876 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
10877 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10878 // CHECK2: cond.true:
10879 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10880 // CHECK2-NEXT: br label [[COND_END:%.*]]
10881 // CHECK2: cond.false:
10882 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10883 // CHECK2-NEXT: br label [[COND_END]]
10884 // CHECK2: cond.end:
10885 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
10886 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10887 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10888 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
10889 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10890 // CHECK2: omp.inner.for.cond:
10891 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
10892 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group !19
10893 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
10894 // CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
10895 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10896 // CHECK2: omp.inner.for.body:
10897 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
10898 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
10899 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !19
10900 // CHECK2-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4, !llvm.access.group !19
10901 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !19
10902 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
10903 // CHECK2-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
10904 // CHECK2-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4, !llvm.access.group !19
10905 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
10906 // CHECK2-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
10907 // CHECK2-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4, !llvm.access.group !19
10908 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
10909 // CHECK2-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
10910 // CHECK2-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4, !llvm.access.group !19
10911 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
10912 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
10913 // CHECK2-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4, !llvm.access.group !19
10914 // CHECK2-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4, !llvm.access.group !19
10915 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4, !llvm.access.group !19
10916 // CHECK2-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
10917 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4), !llvm.access.group !19
10918 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10919 // CHECK2: omp.inner.for.inc:
10920 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
10921 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !19
10922 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
10923 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
10924 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
10925 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !19
10926 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
10927 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
10928 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
10929 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !19
10930 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
10931 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
10932 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
10933 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group !19
10934 // CHECK2-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
10935 // CHECK2-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
10936 // CHECK2: cond.true10:
10937 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group !19
10938 // CHECK2-NEXT: br label [[COND_END12:%.*]]
10939 // CHECK2: cond.false11:
10940 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
10941 // CHECK2-NEXT: br label [[COND_END12]]
10942 // CHECK2: cond.end12:
10943 // CHECK2-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
10944 // CHECK2-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
10945 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
10946 // CHECK2-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
10947 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
10948 // CHECK2: omp.inner.for.end:
10949 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10950 // CHECK2: omp.loop.exit:
10951 // CHECK2-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10952 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
10953 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP41]])
10954 // CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10955 // CHECK2-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
10956 // CHECK2-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10957 // CHECK2: .omp.final.then:
10958 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10959 // CHECK2-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
10960 // CHECK2-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
10961 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
10962 // CHECK2-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
10963 // CHECK2-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
10964 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
10965 // CHECK2: .omp.final.done:
10966 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
10967 // CHECK2: omp.precond.end:
10968 // CHECK2-NEXT: ret void
10969 //
10970 //
10971 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__3
10972 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
10973 // CHECK2-NEXT: entry:
10974 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
10975 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
10976 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
10977 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
10978 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
10979 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
10980 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10981 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
10982 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10983 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10984 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
10985 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10986 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10987 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10988 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10989 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4
10990 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
10991 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
10992 // CHECK2-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
10993 // CHECK2-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
10994 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
10995 // CHECK2-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
10996 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
10997 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
10998 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
10999 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11000 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
11001 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11002 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11003 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11004 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
11005 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11006 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
11007 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11008 // CHECK2: omp.precond.then:
11009 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11010 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11011 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
11012 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
11013 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
11014 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
11015 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
11016 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11017 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11018 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
11019 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
11020 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11021 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11022 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
11023 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11024 // CHECK2: omp.inner.for.cond:
11025 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
11026 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group !22
11027 // CHECK2-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
11028 // CHECK2-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11029 // CHECK2: omp.inner.for.body:
11030 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
11031 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
11032 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11033 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !22
11034 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !22
11035 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
11036 // CHECK2-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2, !llvm.access.group !22
11037 // CHECK2-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
11038 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
11039 // CHECK2-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
11040 // CHECK2-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2, !llvm.access.group !22
11041 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11042 // CHECK2: omp.body.continue:
11043 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11044 // CHECK2: omp.inner.for.inc:
11045 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
11046 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
11047 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
11048 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
11049 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
11050 // CHECK2: omp.inner.for.end:
11051 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11052 // CHECK2: omp.loop.exit:
11053 // CHECK2-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
11054 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
11055 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]])
11056 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11057 // CHECK2-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
11058 // CHECK2-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11059 // CHECK2: .omp.final.then:
11060 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11061 // CHECK2-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
11062 // CHECK2-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
11063 // CHECK2-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
11064 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
11065 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
11066 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
11067 // CHECK2: .omp.final.done:
11068 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
11069 // CHECK2: omp.precond.end:
11070 // CHECK2-NEXT: ret void
11071 //
11072 //
11073 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l37
11074 // CHECK2-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
11075 // CHECK2-NEXT: entry:
11076 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
11077 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
11078 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
11079 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
11080 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
11081 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
11082 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i1 true, i1 false, i1 false)
11083 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
11084 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
11085 // CHECK2: user_code.entry:
11086 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
11087 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
11088 // CHECK2-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR1]]
11089 // CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 false)
11090 // CHECK2-NEXT: ret void
11091 // CHECK2: worker.exit:
11092 // CHECK2-NEXT: ret void
11093 //
11094 //
11095 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__4
11096 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
11097 // CHECK2-NEXT: entry:
11098 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
11099 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
11100 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
11101 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11102 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
11103 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11104 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11105 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11106 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11107 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
11108 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
11109 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
11110 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
11111 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
11112 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
11113 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11114 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11115 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11116 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11117 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
11118 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
11119 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11120 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
11121 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11122 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11123 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11124 // CHECK2: cond.true:
11125 // CHECK2-NEXT: br label [[COND_END:%.*]]
11126 // CHECK2: cond.false:
11127 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11128 // CHECK2-NEXT: br label [[COND_END]]
11129 // CHECK2: cond.end:
11130 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11131 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11132 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11133 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11134 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11135 // CHECK2: omp.inner.for.cond:
11136 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
11137 // CHECK2-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
11138 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11139 // CHECK2: omp.inner.for.body:
11140 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
11141 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
11142 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
11143 // CHECK2-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
11144 // CHECK2-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4, !llvm.access.group !25
11145 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
11146 // CHECK2-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
11147 // CHECK2-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group !25
11148 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
11149 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
11150 // CHECK2-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4, !llvm.access.group !25
11151 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
11152 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3), !llvm.access.group !25
11153 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11154 // CHECK2: omp.inner.for.inc:
11155 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
11156 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !25
11157 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
11158 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
11159 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
11160 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !25
11161 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
11162 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
11163 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
11164 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !25
11165 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
11166 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
11167 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
11168 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
11169 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
11170 // CHECK2: cond.true5:
11171 // CHECK2-NEXT: br label [[COND_END7:%.*]]
11172 // CHECK2: cond.false6:
11173 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
11174 // CHECK2-NEXT: br label [[COND_END7]]
11175 // CHECK2: cond.end7:
11176 // CHECK2-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
11177 // CHECK2-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
11178 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
11179 // CHECK2-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
11180 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
11181 // CHECK2: omp.inner.for.end:
11182 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11183 // CHECK2: omp.loop.exit:
11184 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
11185 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11186 // CHECK2-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
11187 // CHECK2-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11188 // CHECK2: .omp.final.then:
11189 // CHECK2-NEXT: store i32 10, i32* [[I]], align 4
11190 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
11191 // CHECK2: .omp.final.done:
11192 // CHECK2-NEXT: ret void
11193 //
11194 //
11195 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__5
11196 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
11197 // CHECK2-NEXT: entry:
11198 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
11199 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
11200 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
11201 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
11202 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
11203 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11204 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
11205 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11206 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11207 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11208 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11209 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
11210 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
11211 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
11212 // CHECK2-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
11213 // CHECK2-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
11214 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
11215 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
11216 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11217 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11218 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
11219 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
11220 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
11221 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
11222 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11223 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11224 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
11225 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
11226 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11227 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11228 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11229 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11230 // CHECK2: omp.inner.for.cond:
11231 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
11232 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group !28
11233 // CHECK2-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
11234 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11235 // CHECK2: omp.inner.for.body:
11236 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
11237 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
11238 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11239 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !28
11240 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !28
11241 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
11242 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28
11243 // CHECK2-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
11244 // CHECK2-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !28
11245 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11246 // CHECK2: omp.body.continue:
11247 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11248 // CHECK2: omp.inner.for.inc:
11249 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
11250 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
11251 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
11252 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
11253 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
11254 // CHECK2: omp.inner.for.end:
11255 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11256 // CHECK2: omp.loop.exit:
11257 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
11258 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11259 // CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
11260 // CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11261 // CHECK2: .omp.final.then:
11262 // CHECK2-NEXT: store i32 10, i32* [[I]], align 4
11263 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
11264 // CHECK2: .omp.final.done:
11265 // CHECK2-NEXT: ret void
11266 //
11267 //
11268 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l42
11269 // CHECK2-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
11270 // CHECK2-NEXT: entry:
11271 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
11272 // CHECK2-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
11273 // CHECK2-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
11274 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
11275 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
11276 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
11277 // CHECK2-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
11278 // CHECK2-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
11279 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
11280 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i1 true, i1 false, i1 false)
11281 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
11282 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
11283 // CHECK2: user_code.entry:
11284 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
11285 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_ADDR]], align 4
11286 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[F_CASTED]], align 4
11287 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[F_CASTED]], align 4
11288 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
11289 // CHECK2-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP4]]) #[[ATTR1]]
11290 // CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 false)
11291 // CHECK2-NEXT: ret void
11292 // CHECK2: worker.exit:
11293 // CHECK2-NEXT: ret void
11294 //
11295 //
11296 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__6
11297 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
11298 // CHECK2-NEXT: entry:
11299 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
11300 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
11301 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
11302 // CHECK2-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
11303 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11304 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
11305 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
11306 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11307 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11308 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11309 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11310 // CHECK2-NEXT: [[K:%.*]] = alloca i32, align 4
11311 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
11312 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
11313 // CHECK2-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
11314 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
11315 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
11316 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
11317 // CHECK2-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
11318 // CHECK2-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
11319 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
11320 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11321 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11322 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11323 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11324 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
11325 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
11326 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11327 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
11328 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11329 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
11330 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11331 // CHECK2: cond.true:
11332 // CHECK2-NEXT: br label [[COND_END:%.*]]
11333 // CHECK2: cond.false:
11334 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11335 // CHECK2-NEXT: br label [[COND_END]]
11336 // CHECK2: cond.end:
11337 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11338 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11339 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11340 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11341 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11342 // CHECK2: omp.inner.for.cond:
11343 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
11344 // CHECK2-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
11345 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11346 // CHECK2: omp.inner.for.body:
11347 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !31
11348 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
11349 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4, !llvm.access.group !31
11350 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4, !llvm.access.group !31
11351 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4, !llvm.access.group !31
11352 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
11353 // CHECK2-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
11354 // CHECK2-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group !31
11355 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
11356 // CHECK2-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
11357 // CHECK2-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4, !llvm.access.group !31
11358 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
11359 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
11360 // CHECK2-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4, !llvm.access.group !31
11361 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
11362 // CHECK2-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
11363 // CHECK2-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4, !llvm.access.group !31
11364 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
11365 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4), !llvm.access.group !31
11366 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11367 // CHECK2: omp.inner.for.inc:
11368 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
11369 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !31
11370 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
11371 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
11372 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !31
11373 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !31
11374 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
11375 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !31
11376 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
11377 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !31
11378 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
11379 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
11380 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
11381 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
11382 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
11383 // CHECK2: cond.true6:
11384 // CHECK2-NEXT: br label [[COND_END8:%.*]]
11385 // CHECK2: cond.false7:
11386 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
11387 // CHECK2-NEXT: br label [[COND_END8]]
11388 // CHECK2: cond.end8:
11389 // CHECK2-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
11390 // CHECK2-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
11391 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !31
11392 // CHECK2-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
11393 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
11394 // CHECK2: omp.inner.for.end:
11395 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11396 // CHECK2: omp.loop.exit:
11397 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
11398 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11399 // CHECK2-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
11400 // CHECK2-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11401 // CHECK2: .omp.final.then:
11402 // CHECK2-NEXT: store i32 10, i32* [[I]], align 4
11403 // CHECK2-NEXT: store i32 10, i32* [[J]], align 4
11404 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
11405 // CHECK2: .omp.final.done:
11406 // CHECK2-NEXT: ret void
11407 //
11408 //
11409 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__7
11410 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
11411 // CHECK2-NEXT: entry:
11412 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
11413 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
11414 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
11415 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
11416 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
11417 // CHECK2-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
11418 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11419 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
11420 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
11421 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11422 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11423 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11424 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11425 // CHECK2-NEXT: [[K:%.*]] = alloca i32, align 4
11426 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
11427 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
11428 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
11429 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
11430 // CHECK2-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
11431 // CHECK2-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
11432 // CHECK2-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
11433 // CHECK2-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
11434 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
11435 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11436 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
11437 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
11438 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
11439 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
11440 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
11441 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11442 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11443 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
11444 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
11445 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11446 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11447 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11448 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11449 // CHECK2: omp.inner.for.cond:
11450 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
11451 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group !34
11452 // CHECK2-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
11453 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11454 // CHECK2: omp.inner.for.body:
11455 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
11456 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
11457 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
11458 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11459 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !34
11460 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
11461 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
11462 // CHECK2-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
11463 // CHECK2-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
11464 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
11465 // CHECK2-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
11466 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
11467 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[J]], align 4, !llvm.access.group !34
11468 // CHECK2-NEXT: store i32 10, i32* [[K]], align 4, !llvm.access.group !34
11469 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !34
11470 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !34
11471 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4, !llvm.access.group !34
11472 // CHECK2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
11473 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
11474 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4, !llvm.access.group !34
11475 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
11476 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !34
11477 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
11478 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !34
11479 // CHECK2-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
11480 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4, !llvm.access.group !34
11481 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11482 // CHECK2: omp.body.continue:
11483 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11484 // CHECK2: omp.inner.for.inc:
11485 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
11486 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
11487 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
11488 // CHECK2-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
11489 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
11490 // CHECK2: omp.inner.for.end:
11491 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11492 // CHECK2: omp.loop.exit:
11493 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
11494 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11495 // CHECK2-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
11496 // CHECK2-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11497 // CHECK2: .omp.final.then:
11498 // CHECK2-NEXT: store i32 10, i32* [[I]], align 4
11499 // CHECK2-NEXT: store i32 10, i32* [[J]], align 4
11500 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
11501 // CHECK2: .omp.final.done:
11502 // CHECK2-NEXT: ret void
11503 //
11504 //
11505 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l26
11506 // CHECK3-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0:[0-9]+]] {
11507 // CHECK3-NEXT: entry:
11508 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
11509 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
11510 // CHECK3-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
11511 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
11512 // CHECK3-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
11513 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
11514 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
11515 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
11516 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
11517 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
11518 // CHECK3-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
11519 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
11520 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i1 true, i1 false, i1 false)
11521 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
11522 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
11523 // CHECK3: user_code.entry:
11524 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
11525 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
11526 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4
11527 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4
11528 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_ADDR]], align 4
11529 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[L_CASTED]], align 4
11530 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[L_CASTED]], align 4
11531 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
11532 // CHECK3-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP4]], [1000 x i32]* [[TMP0]], i32 [[TMP6]]) #[[ATTR1:[0-9]+]]
11533 // CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 false)
11534 // CHECK3-NEXT: ret void
11535 // CHECK3: worker.exit:
11536 // CHECK3-NEXT: ret void
11537 //
11538 //
11539 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__
11540 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
11541 // CHECK3-NEXT: entry:
11542 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
11543 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
11544 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
11545 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
11546 // CHECK3-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
11547 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11548 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
11549 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11550 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
11551 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
11552 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11553 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11554 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11555 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11556 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4
11557 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
11558 // CHECK3-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
11559 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
11560 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
11561 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
11562 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
11563 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
11564 // CHECK3-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
11565 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
11566 // CHECK3-NEXT: [[L1:%.*]] = call i8* @__kmpc_alloc_shared(i32 4)
11567 // CHECK3-NEXT: [[L_ON_STACK:%.*]] = bitcast i8* [[L1]] to i32*
11568 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
11569 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
11570 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11571 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
11572 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11573 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
11574 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
11575 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
11576 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11577 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
11578 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11579 // CHECK3: omp.precond.then:
11580 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11581 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11582 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
11583 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11584 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11585 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
11586 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
11587 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
11588 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11589 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11590 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
11591 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11592 // CHECK3: cond.true:
11593 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11594 // CHECK3-NEXT: br label [[COND_END:%.*]]
11595 // CHECK3: cond.false:
11596 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11597 // CHECK3-NEXT: br label [[COND_END]]
11598 // CHECK3: cond.end:
11599 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
11600 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11601 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11602 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
11603 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11604 // CHECK3: omp.inner.for.cond:
11605 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
11606 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !12
11607 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
11608 // CHECK3-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
11609 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11610 // CHECK3: omp.inner.for.body:
11611 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
11612 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
11613 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !12
11614 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4, !llvm.access.group !12
11615 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !12
11616 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[L_ADDR]], align 4, !llvm.access.group !12
11617 // CHECK3-NEXT: store i32 [[TMP18]], i32* [[L_CASTED]], align 4, !llvm.access.group !12
11618 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[L_CASTED]], align 4, !llvm.access.group !12
11619 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
11620 // CHECK3-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP14]] to i8*
11621 // CHECK3-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4, !llvm.access.group !12
11622 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
11623 // CHECK3-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP15]] to i8*
11624 // CHECK3-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4, !llvm.access.group !12
11625 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
11626 // CHECK3-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
11627 // CHECK3-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4, !llvm.access.group !12
11628 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
11629 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
11630 // CHECK3-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4, !llvm.access.group !12
11631 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
11632 // CHECK3-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP19]] to i8*
11633 // CHECK3-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4, !llvm.access.group !12
11634 // CHECK3-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4, !llvm.access.group !12
11635 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4, !llvm.access.group !12
11636 // CHECK3-NEXT: [[TMP32:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
11637 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP31]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP32]], i32 5), !llvm.access.group !12
11638 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11639 // CHECK3: omp.inner.for.inc:
11640 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
11641 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !12
11642 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
11643 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
11644 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
11645 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !12
11646 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
11647 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
11648 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
11649 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !12
11650 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
11651 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
11652 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
11653 // CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !12
11654 // CHECK3-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP39]], [[TMP40]]
11655 // CHECK3-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
11656 // CHECK3: cond.true11:
11657 // CHECK3-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !12
11658 // CHECK3-NEXT: br label [[COND_END13:%.*]]
11659 // CHECK3: cond.false12:
11660 // CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
11661 // CHECK3-NEXT: br label [[COND_END13]]
11662 // CHECK3: cond.end13:
11663 // CHECK3-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP41]], [[COND_TRUE11]] ], [ [[TMP42]], [[COND_FALSE12]] ]
11664 // CHECK3-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
11665 // CHECK3-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
11666 // CHECK3-NEXT: store i32 [[TMP43]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
11667 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
11668 // CHECK3: omp.inner.for.end:
11669 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11670 // CHECK3: omp.loop.exit:
11671 // CHECK3-NEXT: [[TMP44:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
11672 // CHECK3-NEXT: [[TMP45:%.*]] = load i32, i32* [[TMP44]], align 4
11673 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP45]])
11674 // CHECK3-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11675 // CHECK3-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0
11676 // CHECK3-NEXT: br i1 [[TMP47]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11677 // CHECK3: .omp.final.then:
11678 // CHECK3-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11679 // CHECK3-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP48]], 0
11680 // CHECK3-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
11681 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
11682 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
11683 // CHECK3-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
11684 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
11685 // CHECK3: .omp.final.done:
11686 // CHECK3-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11687 // CHECK3-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0
11688 // CHECK3-NEXT: br i1 [[TMP50]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
11689 // CHECK3: .omp.lastprivate.then:
11690 // CHECK3-NEXT: [[TMP51:%.*]] = load i32, i32* [[L_ADDR]], align 4
11691 // CHECK3-NEXT: store i32 [[TMP51]], i32* [[L_ADDR]], align 4
11692 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
11693 // CHECK3: .omp.lastprivate.done:
11694 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
11695 // CHECK3: omp.precond.end:
11696 // CHECK3-NEXT: call void @__kmpc_free_shared(i8* [[L1]], i32 4)
11697 // CHECK3-NEXT: ret void
11698 //
11699 //
11700 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1
11701 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[L:%.*]]) #[[ATTR0]] {
11702 // CHECK3-NEXT: entry:
11703 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
11704 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
11705 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
11706 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
11707 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
11708 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
11709 // CHECK3-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
11710 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11711 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
11712 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11713 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11714 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
11715 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11716 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11717 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11718 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11719 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
11720 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
11721 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
11722 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
11723 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
11724 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
11725 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
11726 // CHECK3-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
11727 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
11728 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
11729 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
11730 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11731 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
11732 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11733 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11734 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11735 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
11736 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11737 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
11738 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11739 // CHECK3: omp.precond.then:
11740 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11741 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11742 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
11743 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
11744 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
11745 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
11746 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
11747 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11748 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11749 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
11750 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
11751 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
11752 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11753 // CHECK3: omp.dispatch.cond:
11754 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11755 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
11756 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
11757 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11758 // CHECK3: cond.true:
11759 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
11760 // CHECK3-NEXT: br label [[COND_END:%.*]]
11761 // CHECK3: cond.false:
11762 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11763 // CHECK3-NEXT: br label [[COND_END]]
11764 // CHECK3: cond.end:
11765 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
11766 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11767 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11768 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
11769 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11770 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11771 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
11772 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11773 // CHECK3: omp.dispatch.body:
11774 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11775 // CHECK3: omp.inner.for.cond:
11776 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
11777 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
11778 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
11779 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11780 // CHECK3: omp.inner.for.body:
11781 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
11782 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
11783 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11784 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
11785 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
11786 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
11787 // CHECK3-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
11788 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
11789 // CHECK3-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4, !llvm.access.group !16
11790 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11791 // CHECK3: omp.body.continue:
11792 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11793 // CHECK3: omp.inner.for.inc:
11794 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
11795 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
11796 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
11797 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
11798 // CHECK3: omp.inner.for.end:
11799 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11800 // CHECK3: omp.dispatch.inc:
11801 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11802 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11803 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
11804 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
11805 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11806 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11807 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
11808 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
11809 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
11810 // CHECK3: omp.dispatch.end:
11811 // CHECK3-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
11812 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
11813 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP27]])
11814 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11815 // CHECK3-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
11816 // CHECK3-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11817 // CHECK3: .omp.final.then:
11818 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11819 // CHECK3-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP30]], 0
11820 // CHECK3-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
11821 // CHECK3-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
11822 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
11823 // CHECK3-NEXT: store i32 [[ADD13]], i32* [[I3]], align 4
11824 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
11825 // CHECK3: .omp.final.done:
11826 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11827 // CHECK3-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
11828 // CHECK3-NEXT: br i1 [[TMP32]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
11829 // CHECK3: .omp.lastprivate.then:
11830 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[L_ADDR]], align 4
11831 // CHECK3-NEXT: store i32 [[TMP33]], i32* [[L_ADDR]], align 4
11832 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
11833 // CHECK3: .omp.lastprivate.done:
11834 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
11835 // CHECK3: omp.precond.end:
11836 // CHECK3-NEXT: ret void
11837 //
11838 //
11839 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l32
11840 // CHECK3-SAME: (i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR2:[0-9]+]] {
11841 // CHECK3-NEXT: entry:
11842 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
11843 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
11844 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
11845 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
11846 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
11847 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
11848 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
11849 // CHECK3-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
11850 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
11851 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i1 true, i1 false, i1 false)
11852 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
11853 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
11854 // CHECK3: user_code.entry:
11855 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
11856 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
11857 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4
11858 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4
11859 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
11860 // CHECK3-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP4]], [1000 x i16]* [[TMP0]]) #[[ATTR1]]
11861 // CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 false)
11862 // CHECK3-NEXT: ret void
11863 // CHECK3: worker.exit:
11864 // CHECK3-NEXT: ret void
11865 //
11866 //
11867 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__2
11868 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
11869 // CHECK3-NEXT: entry:
11870 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
11871 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
11872 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
11873 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
11874 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11875 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
11876 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11877 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11878 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
11879 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11880 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11881 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11882 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11883 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
11884 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
11885 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
11886 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
11887 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
11888 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
11889 // CHECK3-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
11890 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
11891 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
11892 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
11893 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11894 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
11895 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11896 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11897 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11898 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
11899 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11900 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
11901 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11902 // CHECK3: omp.precond.then:
11903 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11904 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11905 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
11906 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11907 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11908 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
11909 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
11910 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
11911 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
11912 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11913 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11914 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
11915 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11916 // CHECK3: cond.true:
11917 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11918 // CHECK3-NEXT: br label [[COND_END:%.*]]
11919 // CHECK3: cond.false:
11920 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11921 // CHECK3-NEXT: br label [[COND_END]]
11922 // CHECK3: cond.end:
11923 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
11924 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11925 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11926 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
11927 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11928 // CHECK3: omp.inner.for.cond:
11929 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
11930 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group !19
11931 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
11932 // CHECK3-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
11933 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11934 // CHECK3: omp.inner.for.body:
11935 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
11936 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
11937 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !19
11938 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4, !llvm.access.group !19
11939 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !19
11940 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
11941 // CHECK3-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
11942 // CHECK3-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4, !llvm.access.group !19
11943 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
11944 // CHECK3-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
11945 // CHECK3-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4, !llvm.access.group !19
11946 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
11947 // CHECK3-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
11948 // CHECK3-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4, !llvm.access.group !19
11949 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
11950 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
11951 // CHECK3-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4, !llvm.access.group !19
11952 // CHECK3-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4, !llvm.access.group !19
11953 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4, !llvm.access.group !19
11954 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
11955 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4), !llvm.access.group !19
11956 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11957 // CHECK3: omp.inner.for.inc:
11958 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
11959 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !19
11960 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
11961 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
11962 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
11963 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !19
11964 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
11965 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
11966 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
11967 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !19
11968 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
11969 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
11970 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
11971 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group !19
11972 // CHECK3-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
11973 // CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
11974 // CHECK3: cond.true10:
11975 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group !19
11976 // CHECK3-NEXT: br label [[COND_END12:%.*]]
11977 // CHECK3: cond.false11:
11978 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
11979 // CHECK3-NEXT: br label [[COND_END12]]
11980 // CHECK3: cond.end12:
11981 // CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
11982 // CHECK3-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
11983 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
11984 // CHECK3-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
11985 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
11986 // CHECK3: omp.inner.for.end:
11987 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11988 // CHECK3: omp.loop.exit:
11989 // CHECK3-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
11990 // CHECK3-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
11991 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP41]])
11992 // CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11993 // CHECK3-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
11994 // CHECK3-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11995 // CHECK3: .omp.final.then:
11996 // CHECK3-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11997 // CHECK3-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0
11998 // CHECK3-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
11999 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1
12000 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]]
12001 // CHECK3-NEXT: store i32 [[ADD16]], i32* [[I3]], align 4
12002 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
12003 // CHECK3: .omp.final.done:
12004 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
12005 // CHECK3: omp.precond.end:
12006 // CHECK3-NEXT: ret void
12007 //
12008 //
12009 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__3
12010 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i16]* nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0]] {
12011 // CHECK3-NEXT: entry:
12012 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12013 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12014 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12015 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12016 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
12017 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
12018 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12019 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
12020 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12021 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12022 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
12023 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12024 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12025 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12026 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12027 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
12028 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12029 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12030 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12031 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12032 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
12033 // CHECK3-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
12034 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
12035 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
12036 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
12037 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12038 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
12039 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12040 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12041 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12042 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
12043 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12044 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
12045 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12046 // CHECK3: omp.precond.then:
12047 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12048 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12049 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
12050 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12051 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12052 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
12053 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
12054 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12055 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12056 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12057 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
12058 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12059 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12060 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
12061 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12062 // CHECK3: omp.inner.for.cond:
12063 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
12064 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group !22
12065 // CHECK3-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
12066 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12067 // CHECK3: omp.inner.for.body:
12068 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
12069 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
12070 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12071 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !22
12072 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !22
12073 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
12074 // CHECK3-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2, !llvm.access.group !22
12075 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
12076 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
12077 // CHECK3-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
12078 // CHECK3-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2, !llvm.access.group !22
12079 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12080 // CHECK3: omp.body.continue:
12081 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12082 // CHECK3: omp.inner.for.inc:
12083 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
12084 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
12085 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
12086 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
12087 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
12088 // CHECK3: omp.inner.for.end:
12089 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12090 // CHECK3: omp.loop.exit:
12091 // CHECK3-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12092 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
12093 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]])
12094 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12095 // CHECK3-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
12096 // CHECK3-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12097 // CHECK3: .omp.final.then:
12098 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12099 // CHECK3-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP21]], 0
12100 // CHECK3-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
12101 // CHECK3-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
12102 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
12103 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
12104 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
12105 // CHECK3: .omp.final.done:
12106 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
12107 // CHECK3: omp.precond.end:
12108 // CHECK3-NEXT: ret void
12109 //
12110 //
12111 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l37
12112 // CHECK3-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
12113 // CHECK3-NEXT: entry:
12114 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
12115 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
12116 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
12117 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
12118 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
12119 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
12120 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i1 true, i1 false, i1 false)
12121 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
12122 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
12123 // CHECK3: user_code.entry:
12124 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
12125 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
12126 // CHECK3-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR1]]
12127 // CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 false)
12128 // CHECK3-NEXT: ret void
12129 // CHECK3: worker.exit:
12130 // CHECK3-NEXT: ret void
12131 //
12132 //
12133 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__4
12134 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
12135 // CHECK3-NEXT: entry:
12136 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12137 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12138 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
12139 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12140 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
12141 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12142 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12143 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12144 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12145 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
12146 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
12147 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12148 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12149 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
12150 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
12151 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12152 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
12153 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12154 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12155 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
12156 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12157 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12158 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
12159 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12160 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12161 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12162 // CHECK3: cond.true:
12163 // CHECK3-NEXT: br label [[COND_END:%.*]]
12164 // CHECK3: cond.false:
12165 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12166 // CHECK3-NEXT: br label [[COND_END]]
12167 // CHECK3: cond.end:
12168 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12169 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12170 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12171 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12172 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12173 // CHECK3: omp.inner.for.cond:
12174 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
12175 // CHECK3-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
12176 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12177 // CHECK3: omp.inner.for.body:
12178 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
12179 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
12180 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
12181 // CHECK3-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
12182 // CHECK3-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4, !llvm.access.group !25
12183 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
12184 // CHECK3-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
12185 // CHECK3-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group !25
12186 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
12187 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
12188 // CHECK3-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4, !llvm.access.group !25
12189 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
12190 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3), !llvm.access.group !25
12191 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12192 // CHECK3: omp.inner.for.inc:
12193 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
12194 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !25
12195 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
12196 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
12197 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
12198 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !25
12199 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
12200 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
12201 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
12202 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !25
12203 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
12204 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
12205 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
12206 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
12207 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
12208 // CHECK3: cond.true5:
12209 // CHECK3-NEXT: br label [[COND_END7:%.*]]
12210 // CHECK3: cond.false6:
12211 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
12212 // CHECK3-NEXT: br label [[COND_END7]]
12213 // CHECK3: cond.end7:
12214 // CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
12215 // CHECK3-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
12216 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
12217 // CHECK3-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
12218 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
12219 // CHECK3: omp.inner.for.end:
12220 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12221 // CHECK3: omp.loop.exit:
12222 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
12223 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12224 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
12225 // CHECK3-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12226 // CHECK3: .omp.final.then:
12227 // CHECK3-NEXT: store i32 10, i32* [[I]], align 4
12228 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
12229 // CHECK3: .omp.final.done:
12230 // CHECK3-NEXT: ret void
12231 //
12232 //
12233 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__5
12234 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
12235 // CHECK3-NEXT: entry:
12236 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12237 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12238 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12239 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12240 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
12241 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12242 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
12243 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12244 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12245 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12246 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12247 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
12248 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12249 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12250 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12251 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12252 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
12253 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
12254 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12255 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
12256 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12257 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12258 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
12259 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
12260 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12261 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12262 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12263 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
12264 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12265 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12266 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12267 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12268 // CHECK3: omp.inner.for.cond:
12269 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
12270 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group !28
12271 // CHECK3-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
12272 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12273 // CHECK3: omp.inner.for.body:
12274 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
12275 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
12276 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12277 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !28
12278 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !28
12279 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
12280 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28
12281 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
12282 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !28
12283 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12284 // CHECK3: omp.body.continue:
12285 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12286 // CHECK3: omp.inner.for.inc:
12287 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
12288 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
12289 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
12290 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
12291 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
12292 // CHECK3: omp.inner.for.end:
12293 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12294 // CHECK3: omp.loop.exit:
12295 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
12296 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12297 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
12298 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12299 // CHECK3: .omp.final.then:
12300 // CHECK3-NEXT: store i32 10, i32* [[I]], align 4
12301 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
12302 // CHECK3: .omp.final.done:
12303 // CHECK3-NEXT: ret void
12304 //
12305 //
12306 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l42
12307 // CHECK3-SAME: ([10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
12308 // CHECK3-NEXT: entry:
12309 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
12310 // CHECK3-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
12311 // CHECK3-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
12312 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
12313 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
12314 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
12315 // CHECK3-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
12316 // CHECK3-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
12317 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
12318 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i1 true, i1 false, i1 false)
12319 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
12320 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
12321 // CHECK3: user_code.entry:
12322 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
12323 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_ADDR]], align 4
12324 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[F_CASTED]], align 4
12325 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[F_CASTED]], align 4
12326 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
12327 // CHECK3-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP4]]) #[[ATTR1]]
12328 // CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 true, i1 false)
12329 // CHECK3-NEXT: ret void
12330 // CHECK3: worker.exit:
12331 // CHECK3-NEXT: ret void
12332 //
12333 //
12334 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__6
12335 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
12336 // CHECK3-NEXT: entry:
12337 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12338 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12339 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
12340 // CHECK3-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
12341 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12342 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
12343 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
12344 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12345 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12346 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12347 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12348 // CHECK3-NEXT: [[K:%.*]] = alloca i32, align 4
12349 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
12350 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
12351 // CHECK3-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
12352 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
12353 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12354 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12355 // CHECK3-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
12356 // CHECK3-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
12357 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
12358 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12359 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
12360 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12361 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12362 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
12363 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12364 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12365 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
12366 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12367 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
12368 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12369 // CHECK3: cond.true:
12370 // CHECK3-NEXT: br label [[COND_END:%.*]]
12371 // CHECK3: cond.false:
12372 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12373 // CHECK3-NEXT: br label [[COND_END]]
12374 // CHECK3: cond.end:
12375 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12376 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12377 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12378 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12379 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12380 // CHECK3: omp.inner.for.cond:
12381 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
12382 // CHECK3-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
12383 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12384 // CHECK3: omp.inner.for.body:
12385 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !31
12386 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
12387 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4, !llvm.access.group !31
12388 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4, !llvm.access.group !31
12389 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4, !llvm.access.group !31
12390 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
12391 // CHECK3-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
12392 // CHECK3-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group !31
12393 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
12394 // CHECK3-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
12395 // CHECK3-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4, !llvm.access.group !31
12396 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
12397 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
12398 // CHECK3-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4, !llvm.access.group !31
12399 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
12400 // CHECK3-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
12401 // CHECK3-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4, !llvm.access.group !31
12402 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
12403 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4), !llvm.access.group !31
12404 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12405 // CHECK3: omp.inner.for.inc:
12406 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
12407 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !31
12408 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
12409 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
12410 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !31
12411 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !31
12412 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
12413 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !31
12414 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
12415 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !31
12416 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
12417 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
12418 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
12419 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
12420 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
12421 // CHECK3: cond.true6:
12422 // CHECK3-NEXT: br label [[COND_END8:%.*]]
12423 // CHECK3: cond.false7:
12424 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
12425 // CHECK3-NEXT: br label [[COND_END8]]
12426 // CHECK3: cond.end8:
12427 // CHECK3-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
12428 // CHECK3-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !31
12429 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !31
12430 // CHECK3-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
12431 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
12432 // CHECK3: omp.inner.for.end:
12433 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12434 // CHECK3: omp.loop.exit:
12435 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
12436 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12437 // CHECK3-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
12438 // CHECK3-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12439 // CHECK3: .omp.final.then:
12440 // CHECK3-NEXT: store i32 10, i32* [[I]], align 4
12441 // CHECK3-NEXT: store i32 10, i32* [[J]], align 4
12442 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
12443 // CHECK3: .omp.final.done:
12444 // CHECK3-NEXT: ret void
12445 //
12446 //
12447 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__7
12448 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[F:%.*]]) #[[ATTR0]] {
12449 // CHECK3-NEXT: entry:
12450 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12451 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12452 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12453 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12454 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
12455 // CHECK3-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
12456 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12457 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
12458 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
12459 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12460 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12461 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12462 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12463 // CHECK3-NEXT: [[K:%.*]] = alloca i32, align 4
12464 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
12465 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
12466 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12467 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12468 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12469 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12470 // CHECK3-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
12471 // CHECK3-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
12472 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
12473 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12474 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
12475 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12476 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12477 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
12478 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
12479 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12480 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12481 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12482 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
12483 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12484 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12485 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12486 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12487 // CHECK3: omp.inner.for.cond:
12488 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
12489 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group !34
12490 // CHECK3-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
12491 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12492 // CHECK3: omp.inner.for.body:
12493 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
12494 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
12495 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
12496 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12497 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !34
12498 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
12499 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
12500 // CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
12501 // CHECK3-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
12502 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
12503 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
12504 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
12505 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[J]], align 4, !llvm.access.group !34
12506 // CHECK3-NEXT: store i32 10, i32* [[K]], align 4, !llvm.access.group !34
12507 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !34
12508 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !34
12509 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4, !llvm.access.group !34
12510 // CHECK3-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
12511 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
12512 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4, !llvm.access.group !34
12513 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
12514 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !34
12515 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
12516 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !34
12517 // CHECK3-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
12518 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4, !llvm.access.group !34
12519 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12520 // CHECK3: omp.body.continue:
12521 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12522 // CHECK3: omp.inner.for.inc:
12523 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
12524 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
12525 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
12526 // CHECK3-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
12527 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
12528 // CHECK3: omp.inner.for.end:
12529 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12530 // CHECK3: omp.loop.exit:
12531 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
12532 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12533 // CHECK3-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
12534 // CHECK3-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12535 // CHECK3: .omp.final.then:
12536 // CHECK3-NEXT: store i32 10, i32* [[I]], align 4
12537 // CHECK3-NEXT: store i32 10, i32* [[J]], align 4
12538 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
12539 // CHECK3: .omp.final.done:
12540 // CHECK3-NEXT: ret void
12541 //
12542