1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // Test host codegen.
3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
5 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
8 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
9 
10 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
16 
17 // Test target codegen - host bc file has to be created first.
18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
19 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK9
20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
21 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
22 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
23 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK11
24 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
25 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
26 
27 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
28 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
29 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
30 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
31 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
32 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
33 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
34 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
35 
36 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
37 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
38 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18
39 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
40 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
41 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20
42 
43 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
44 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
45 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
46 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
47 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
48 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
49 
50 // Test target codegen - host bc file has to be created first.
51 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
52 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK25
53 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
54 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK26
55 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
56 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK27
57 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
58 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK28
59 
60 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
61 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
62 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
63 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
64 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
65 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
66 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
67 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
68 
69 // expected-no-diagnostics
70 #ifndef HEADER
71 #define HEADER
72 
73 
74 
75 
76 // We have 6 target regions
77 
78 
79 
80 // Check target registration is registered as a Ctor.
81 
82 
83 template<typename tx>
ftemplate(int n)84 tx ftemplate(int n) {
85   tx a = 0;
86 
87   #pragma omp target parallel if(parallel: 0)
88   {
89     a += 1;
90   }
91 
92   short b = 1;
93   #pragma omp target parallel if(parallel: 1)
94   {
95     a += b;
96   }
97 
98   return a;
99 }
100 
101 static
fstatic(int n)102 int fstatic(int n) {
103 
104   #pragma omp target parallel if(n>1)
105   {
106   }
107 
108   #pragma omp target parallel if(target: n-2>2)
109   {
110   }
111 
112   return n+1;
113 }
114 
115 struct S1 {
116   double a;
117 
r1S1118   int r1(int n){
119     int b = 1;
120 
121     #pragma omp target parallel if(parallel: n>3)
122     {
123       this->a = (double)b + 1.5;
124     }
125 
126     #pragma omp target parallel if(target: n>4) if(parallel: n>5)
127     {
128       this->a = 2.5;
129     }
130 
131     return (int)a;
132   }
133 };
134 
bar(int n)135 int bar(int n){
136   int a = 0;
137 
138   S1 S;
139   a += S.r1(n);
140 
141   a += fstatic(n);
142 
143   a += ftemplate<int>(n);
144 
145   return a;
146 }
147 
148 
149 
150 
151 
152 
153 
154 
155 
156 
157 
158 
159 
160 
161 // Check that the offloading functions are emitted and that the parallel function
162 // is appropriately guarded.
163 
164 
165 
166 
167 
168 
169 
170 
171 
172 
173 
174 
175 
176 
177 
178 
179 
180 
181 
182 
183 
184 #endif
185 // CHECK1-LABEL: define {{[^@]+}}@_Z3bari
186 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
187 // CHECK1-NEXT:  entry:
188 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
189 // CHECK1-NEXT:    [[A:%.*]] = alloca i32, align 4
190 // CHECK1-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8
191 // CHECK1-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
192 // CHECK1-NEXT:    store i32 0, i32* [[A]], align 4
193 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
194 // CHECK1-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP0]])
195 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
196 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
197 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
198 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
199 // CHECK1-NEXT:    [[CALL1:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP2]])
200 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
201 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
202 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
203 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
204 // CHECK1-NEXT:    [[CALL3:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP4]])
205 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
206 // CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
207 // CHECK1-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
208 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
209 // CHECK1-NEXT:    ret i32 [[TMP6]]
210 //
211 //
212 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
213 // CHECK1-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 {
214 // CHECK1-NEXT:  entry:
215 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
216 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
217 // CHECK1-NEXT:    [[B:%.*]] = alloca i32, align 4
218 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
219 // CHECK1-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
220 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
221 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
222 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
223 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
224 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i8, align 1
225 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED9:%.*]] = alloca i64, align 8
226 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS14:%.*]] = alloca [2 x i8*], align 8
227 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS15:%.*]] = alloca [2 x i8*], align 8
228 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS16:%.*]] = alloca [2 x i8*], align 8
229 // CHECK1-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
230 // CHECK1-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
231 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
232 // CHECK1-NEXT:    store i32 1, i32* [[B]], align 4
233 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
234 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 3
235 // CHECK1-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
236 // CHECK1-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
237 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
238 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32*
239 // CHECK1-NEXT:    store i32 [[TMP1]], i32* [[CONV]], align 4
240 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[B_CASTED]], align 8
241 // CHECK1-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
242 // CHECK1-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1
243 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
244 // CHECK1-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL]] to i8
245 // CHECK1-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
246 // CHECK1-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
247 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
248 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
249 // CHECK1-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to %struct.S1**
250 // CHECK1-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP6]], align 8
251 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
252 // CHECK1-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to double**
253 // CHECK1-NEXT:    store double* [[A]], double** [[TMP8]], align 8
254 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
255 // CHECK1-NEXT:    store i8* null, i8** [[TMP9]], align 8
256 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
257 // CHECK1-NEXT:    [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
258 // CHECK1-NEXT:    store i64 [[TMP2]], i64* [[TMP11]], align 8
259 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
260 // CHECK1-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
261 // CHECK1-NEXT:    store i64 [[TMP2]], i64* [[TMP13]], align 8
262 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
263 // CHECK1-NEXT:    store i8* null, i8** [[TMP14]], align 8
264 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
265 // CHECK1-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
266 // CHECK1-NEXT:    store i64 [[TMP4]], i64* [[TMP16]], align 8
267 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
268 // CHECK1-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
269 // CHECK1-NEXT:    store i64 [[TMP4]], i64* [[TMP18]], align 8
270 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
271 // CHECK1-NEXT:    store i8* null, i8** [[TMP19]], align 8
272 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
273 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
274 // CHECK1-NEXT:    [[TMP22:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
275 // CHECK1-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP22]] to i1
276 // CHECK1-NEXT:    [[TMP23:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
277 // CHECK1-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP23]])
278 // CHECK1-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
279 // CHECK1-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
280 // CHECK1:       omp_offload.failed:
281 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i64 [[TMP2]], i64 [[TMP4]]) #[[ATTR3:[0-9]+]]
282 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
283 // CHECK1:       omp_offload.cont:
284 // CHECK1-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
285 // CHECK1-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP26]], 5
286 // CHECK1-NEXT:    [[FROMBOOL7:%.*]] = zext i1 [[CMP6]] to i8
287 // CHECK1-NEXT:    store i8 [[FROMBOOL7]], i8* [[DOTCAPTURE_EXPR_5]], align 1
288 // CHECK1-NEXT:    [[TMP27:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_5]], align 1
289 // CHECK1-NEXT:    [[TOBOOL8:%.*]] = trunc i8 [[TMP27]] to i1
290 // CHECK1-NEXT:    [[CONV10:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED9]] to i8*
291 // CHECK1-NEXT:    [[FROMBOOL11:%.*]] = zext i1 [[TOBOOL8]] to i8
292 // CHECK1-NEXT:    store i8 [[FROMBOOL11]], i8* [[CONV10]], align 1
293 // CHECK1-NEXT:    [[TMP28:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED9]], align 8
294 // CHECK1-NEXT:    [[TMP29:%.*]] = load i32, i32* [[N_ADDR]], align 4
295 // CHECK1-NEXT:    [[CMP12:%.*]] = icmp sgt i32 [[TMP29]], 4
296 // CHECK1-NEXT:    br i1 [[CMP12]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
297 // CHECK1:       omp_if.then:
298 // CHECK1-NEXT:    [[A13:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
299 // CHECK1-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS14]], i32 0, i32 0
300 // CHECK1-NEXT:    [[TMP31:%.*]] = bitcast i8** [[TMP30]] to %struct.S1**
301 // CHECK1-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP31]], align 8
302 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS15]], i32 0, i32 0
303 // CHECK1-NEXT:    [[TMP33:%.*]] = bitcast i8** [[TMP32]] to double**
304 // CHECK1-NEXT:    store double* [[A13]], double** [[TMP33]], align 8
305 // CHECK1-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS16]], i64 0, i64 0
306 // CHECK1-NEXT:    store i8* null, i8** [[TMP34]], align 8
307 // CHECK1-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS14]], i32 0, i32 1
308 // CHECK1-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i64*
309 // CHECK1-NEXT:    store i64 [[TMP28]], i64* [[TMP36]], align 8
310 // CHECK1-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS15]], i32 0, i32 1
311 // CHECK1-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i64*
312 // CHECK1-NEXT:    store i64 [[TMP28]], i64* [[TMP38]], align 8
313 // CHECK1-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS16]], i64 0, i64 1
314 // CHECK1-NEXT:    store i8* null, i8** [[TMP39]], align 8
315 // CHECK1-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS14]], i32 0, i32 0
316 // CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS15]], i32 0, i32 0
317 // CHECK1-NEXT:    [[TMP42:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_5]], align 1
318 // CHECK1-NEXT:    [[TOBOOL17:%.*]] = trunc i8 [[TMP42]] to i1
319 // CHECK1-NEXT:    [[TMP43:%.*]] = select i1 [[TOBOOL17]], i32 0, i32 1
320 // CHECK1-NEXT:    [[TMP44:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 2, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP43]])
321 // CHECK1-NEXT:    [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
322 // CHECK1-NEXT:    br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED18:%.*]], label [[OMP_OFFLOAD_CONT19:%.*]]
323 // CHECK1:       omp_offload.failed18:
324 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i64 [[TMP28]]) #[[ATTR3]]
325 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT19]]
326 // CHECK1:       omp_offload.cont19:
327 // CHECK1-NEXT:    br label [[OMP_IF_END:%.*]]
328 // CHECK1:       omp_if.else:
329 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i64 [[TMP28]]) #[[ATTR3]]
330 // CHECK1-NEXT:    br label [[OMP_IF_END]]
331 // CHECK1:       omp_if.end:
332 // CHECK1-NEXT:    [[A20:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
333 // CHECK1-NEXT:    [[TMP46:%.*]] = load double, double* [[A20]], align 8
334 // CHECK1-NEXT:    [[CONV21:%.*]] = fptosi double [[TMP46]] to i32
335 // CHECK1-NEXT:    ret i32 [[CONV21]]
336 //
337 //
338 // CHECK1-LABEL: define {{[^@]+}}@_ZL7fstatici
339 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
340 // CHECK1-NEXT:  entry:
341 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
342 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
343 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
344 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
345 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
346 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
347 // CHECK1-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
348 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
349 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 1
350 // CHECK1-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
351 // CHECK1-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
352 // CHECK1-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
353 // CHECK1-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
354 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
355 // CHECK1-NEXT:    [[FROMBOOL1:%.*]] = zext i1 [[TOBOOL]] to i8
356 // CHECK1-NEXT:    store i8 [[FROMBOOL1]], i8* [[CONV]], align 1
357 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
358 // CHECK1-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
359 // CHECK1-NEXT:    [[TOBOOL2:%.*]] = trunc i8 [[TMP3]] to i1
360 // CHECK1-NEXT:    br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
361 // CHECK1:       omp_if.then:
362 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
363 // CHECK1-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
364 // CHECK1-NEXT:    store i64 [[TMP2]], i64* [[TMP5]], align 8
365 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
366 // CHECK1-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
367 // CHECK1-NEXT:    store i64 [[TMP2]], i64* [[TMP7]], align 8
368 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
369 // CHECK1-NEXT:    store i8* null, i8** [[TMP8]], align 8
370 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
371 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
372 // CHECK1-NEXT:    [[TMP11:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
373 // CHECK1-NEXT:    [[TOBOOL3:%.*]] = trunc i8 [[TMP11]] to i1
374 // CHECK1-NEXT:    [[TMP12:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
375 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP9]], i8** [[TMP10]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP12]])
376 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
377 // CHECK1-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
378 // CHECK1:       omp_offload.failed:
379 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR3]]
380 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
381 // CHECK1:       omp_offload.cont:
382 // CHECK1-NEXT:    br label [[OMP_IF_END:%.*]]
383 // CHECK1:       omp_if.else:
384 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR3]]
385 // CHECK1-NEXT:    br label [[OMP_IF_END]]
386 // CHECK1:       omp_if.end:
387 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, i32* [[N_ADDR]], align 4
388 // CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP15]], 2
389 // CHECK1-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[SUB]], 2
390 // CHECK1-NEXT:    br i1 [[CMP4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE8:%.*]]
391 // CHECK1:       omp_if.then5:
392 // CHECK1-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0)
393 // CHECK1-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
394 // CHECK1-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
395 // CHECK1:       omp_offload.failed6:
396 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
397 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
398 // CHECK1:       omp_offload.cont7:
399 // CHECK1-NEXT:    br label [[OMP_IF_END9:%.*]]
400 // CHECK1:       omp_if.else8:
401 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
402 // CHECK1-NEXT:    br label [[OMP_IF_END9]]
403 // CHECK1:       omp_if.end9:
404 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
405 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
406 // CHECK1-NEXT:    ret i32 [[ADD]]
407 //
408 //
409 // CHECK1-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
410 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat {
411 // CHECK1-NEXT:  entry:
412 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
413 // CHECK1-NEXT:    [[A:%.*]] = alloca i32, align 4
414 // CHECK1-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
415 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
416 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
417 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
418 // CHECK1-NEXT:    [[B:%.*]] = alloca i16, align 2
419 // CHECK1-NEXT:    [[A_CASTED1:%.*]] = alloca i64, align 8
420 // CHECK1-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
421 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [2 x i8*], align 8
422 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [2 x i8*], align 8
423 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [2 x i8*], align 8
424 // CHECK1-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
425 // CHECK1-NEXT:    store i32 0, i32* [[A]], align 4
426 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A]], align 4
427 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32*
428 // CHECK1-NEXT:    store i32 [[TMP0]], i32* [[CONV]], align 4
429 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
430 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
431 // CHECK1-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
432 // CHECK1-NEXT:    store i64 [[TMP1]], i64* [[TMP3]], align 8
433 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
434 // CHECK1-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
435 // CHECK1-NEXT:    store i64 [[TMP1]], i64* [[TMP5]], align 8
436 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
437 // CHECK1-NEXT:    store i8* null, i8** [[TMP6]], align 8
438 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
439 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
440 // CHECK1-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.9, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 1)
441 // CHECK1-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
442 // CHECK1-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
443 // CHECK1:       omp_offload.failed:
444 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87(i64 [[TMP1]]) #[[ATTR3]]
445 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
446 // CHECK1:       omp_offload.cont:
447 // CHECK1-NEXT:    store i16 1, i16* [[B]], align 2
448 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[A]], align 4
449 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[A_CASTED1]] to i32*
450 // CHECK1-NEXT:    store i32 [[TMP11]], i32* [[CONV2]], align 4
451 // CHECK1-NEXT:    [[TMP12:%.*]] = load i64, i64* [[A_CASTED1]], align 8
452 // CHECK1-NEXT:    [[TMP13:%.*]] = load i16, i16* [[B]], align 2
453 // CHECK1-NEXT:    [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i16*
454 // CHECK1-NEXT:    store i16 [[TMP13]], i16* [[CONV3]], align 2
455 // CHECK1-NEXT:    [[TMP14:%.*]] = load i64, i64* [[B_CASTED]], align 8
456 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
457 // CHECK1-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
458 // CHECK1-NEXT:    store i64 [[TMP12]], i64* [[TMP16]], align 8
459 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
460 // CHECK1-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
461 // CHECK1-NEXT:    store i64 [[TMP12]], i64* [[TMP18]], align 8
462 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
463 // CHECK1-NEXT:    store i8* null, i8** [[TMP19]], align 8
464 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
465 // CHECK1-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
466 // CHECK1-NEXT:    store i64 [[TMP14]], i64* [[TMP21]], align 8
467 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
468 // CHECK1-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
469 // CHECK1-NEXT:    store i64 [[TMP14]], i64* [[TMP23]], align 8
470 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1
471 // CHECK1-NEXT:    store i8* null, i8** [[TMP24]], align 8
472 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
473 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
474 // CHECK1-NEXT:    [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 2, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0)
475 // CHECK1-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
476 // CHECK1-NEXT:    br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
477 // CHECK1:       omp_offload.failed7:
478 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i64 [[TMP12]], i64 [[TMP14]]) #[[ATTR3]]
479 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
480 // CHECK1:       omp_offload.cont8:
481 // CHECK1-NEXT:    [[TMP29:%.*]] = load i32, i32* [[A]], align 4
482 // CHECK1-NEXT:    ret i32 [[TMP29]]
483 //
484 //
485 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
486 // CHECK1-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
487 // CHECK1-NEXT:  entry:
488 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
489 // CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
490 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
491 // CHECK1-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
492 // CHECK1-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
493 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
494 // CHECK1-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
495 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
496 // CHECK1-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
497 // CHECK1-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
498 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
499 // CHECK1-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
500 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
501 // CHECK1-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
502 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
503 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
504 // CHECK1-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
505 // CHECK1-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
506 // CHECK1-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV1]], align 8
507 // CHECK1-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
508 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
509 // CHECK1:       omp_if.then:
510 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP3]])
511 // CHECK1-NEXT:    br label [[OMP_IF_END:%.*]]
512 // CHECK1:       omp_if.else:
513 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
514 // CHECK1-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
515 // CHECK1-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i64 [[TMP3]]) #[[ATTR3]]
516 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
517 // CHECK1-NEXT:    br label [[OMP_IF_END]]
518 // CHECK1:       omp_if.end:
519 // CHECK1-NEXT:    ret void
520 //
521 //
522 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
523 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR2:[0-9]+]] {
524 // CHECK1-NEXT:  entry:
525 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
526 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
527 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
528 // CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
529 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
530 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
531 // CHECK1-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
532 // CHECK1-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
533 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
534 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
535 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
536 // CHECK1-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
537 // CHECK1-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
538 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
539 // CHECK1-NEXT:    store double [[ADD]], double* [[A]], align 8
540 // CHECK1-NEXT:    ret void
541 //
542 //
543 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
544 // CHECK1-SAME: (%struct.S1* [[THIS:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
545 // CHECK1-NEXT:  entry:
546 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
547 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
548 // CHECK1-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
549 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
550 // CHECK1-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
551 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
552 // CHECK1-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
553 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
554 // CHECK1-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
555 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
556 // CHECK1-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
557 // CHECK1-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
558 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
559 // CHECK1:       omp_if.then:
560 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
561 // CHECK1-NEXT:    br label [[OMP_IF_END:%.*]]
562 // CHECK1:       omp_if.else:
563 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
564 // CHECK1-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
565 // CHECK1-NEXT:    call void @.omp_outlined..1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR3]]
566 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
567 // CHECK1-NEXT:    br label [[OMP_IF_END]]
568 // CHECK1:       omp_if.end:
569 // CHECK1-NEXT:    ret void
570 //
571 //
572 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
573 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR2]] {
574 // CHECK1-NEXT:  entry:
575 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
576 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
577 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
578 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
579 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
580 // CHECK1-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
581 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
582 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
583 // CHECK1-NEXT:    store double 2.500000e+00, double* [[A]], align 8
584 // CHECK1-NEXT:    ret void
585 //
586 //
587 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
588 // CHECK1-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
589 // CHECK1-NEXT:  entry:
590 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
591 // CHECK1-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
592 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
593 // CHECK1-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
594 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
595 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
596 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
597 // CHECK1-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 8
598 // CHECK1-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
599 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
600 // CHECK1:       omp_if.then:
601 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
602 // CHECK1-NEXT:    br label [[OMP_IF_END:%.*]]
603 // CHECK1:       omp_if.else:
604 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
605 // CHECK1-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
606 // CHECK1-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR3]]
607 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
608 // CHECK1-NEXT:    br label [[OMP_IF_END]]
609 // CHECK1:       omp_if.end:
610 // CHECK1-NEXT:    ret void
611 //
612 //
613 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
614 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
615 // CHECK1-NEXT:  entry:
616 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
617 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
618 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
619 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
620 // CHECK1-NEXT:    ret void
621 //
622 //
623 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
624 // CHECK1-SAME: () #[[ATTR1]] {
625 // CHECK1-NEXT:  entry:
626 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
627 // CHECK1-NEXT:    ret void
628 //
629 //
630 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
631 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
632 // CHECK1-NEXT:  entry:
633 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
634 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
635 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
636 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
637 // CHECK1-NEXT:    ret void
638 //
639 //
640 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
641 // CHECK1-SAME: (i64 [[A:%.*]]) #[[ATTR1]] {
642 // CHECK1-NEXT:  entry:
643 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
644 // CHECK1-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
645 // CHECK1-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
646 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
647 // CHECK1-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
648 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
649 // CHECK1-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
650 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
651 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
652 // CHECK1-NEXT:    [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
653 // CHECK1-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
654 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
655 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
656 // CHECK1-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
657 // CHECK1-NEXT:    call void @.omp_outlined..8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]]) #[[ATTR3]]
658 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
659 // CHECK1-NEXT:    ret void
660 //
661 //
662 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
663 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR2]] {
664 // CHECK1-NEXT:  entry:
665 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
666 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
667 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
668 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
669 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
670 // CHECK1-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
671 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
672 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
673 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
674 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
675 // CHECK1-NEXT:    ret void
676 //
677 //
678 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
679 // CHECK1-SAME: (i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
680 // CHECK1-NEXT:  entry:
681 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
682 // CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
683 // CHECK1-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
684 // CHECK1-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
685 // CHECK1-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
686 // CHECK1-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
687 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
688 // CHECK1-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
689 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
690 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
691 // CHECK1-NEXT:    store i32 [[TMP0]], i32* [[CONV2]], align 4
692 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
693 // CHECK1-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
694 // CHECK1-NEXT:    [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i16*
695 // CHECK1-NEXT:    store i16 [[TMP2]], i16* [[CONV3]], align 2
696 // CHECK1-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
697 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
698 // CHECK1-NEXT:    ret void
699 //
700 //
701 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
702 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR2]] {
703 // CHECK1-NEXT:  entry:
704 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
705 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
706 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
707 // CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
708 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
709 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
710 // CHECK1-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
711 // CHECK1-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
712 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
713 // CHECK1-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
714 // CHECK1-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
715 // CHECK1-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
716 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
717 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
718 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
719 // CHECK1-NEXT:    ret void
720 //
721 //
722 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
723 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
724 // CHECK1-NEXT:  entry:
725 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
726 // CHECK1-NEXT:    ret void
727 //
728 //
729 // CHECK2-LABEL: define {{[^@]+}}@_Z3bari
730 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
731 // CHECK2-NEXT:  entry:
732 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
733 // CHECK2-NEXT:    [[A:%.*]] = alloca i32, align 4
734 // CHECK2-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8
735 // CHECK2-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
736 // CHECK2-NEXT:    store i32 0, i32* [[A]], align 4
737 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
738 // CHECK2-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP0]])
739 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
740 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
741 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
742 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
743 // CHECK2-NEXT:    [[CALL1:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP2]])
744 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
745 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
746 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
747 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
748 // CHECK2-NEXT:    [[CALL3:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP4]])
749 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
750 // CHECK2-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
751 // CHECK2-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
752 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
753 // CHECK2-NEXT:    ret i32 [[TMP6]]
754 //
755 //
756 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
757 // CHECK2-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 {
758 // CHECK2-NEXT:  entry:
759 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
760 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
761 // CHECK2-NEXT:    [[B:%.*]] = alloca i32, align 4
762 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
763 // CHECK2-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
764 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
765 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
766 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
767 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
768 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i8, align 1
769 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__CASTED9:%.*]] = alloca i64, align 8
770 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS14:%.*]] = alloca [2 x i8*], align 8
771 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS15:%.*]] = alloca [2 x i8*], align 8
772 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS16:%.*]] = alloca [2 x i8*], align 8
773 // CHECK2-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
774 // CHECK2-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
775 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
776 // CHECK2-NEXT:    store i32 1, i32* [[B]], align 4
777 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
778 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 3
779 // CHECK2-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
780 // CHECK2-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
781 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
782 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32*
783 // CHECK2-NEXT:    store i32 [[TMP1]], i32* [[CONV]], align 4
784 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[B_CASTED]], align 8
785 // CHECK2-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
786 // CHECK2-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1
787 // CHECK2-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
788 // CHECK2-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL]] to i8
789 // CHECK2-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
790 // CHECK2-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
791 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
792 // CHECK2-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
793 // CHECK2-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to %struct.S1**
794 // CHECK2-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP6]], align 8
795 // CHECK2-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
796 // CHECK2-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to double**
797 // CHECK2-NEXT:    store double* [[A]], double** [[TMP8]], align 8
798 // CHECK2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
799 // CHECK2-NEXT:    store i8* null, i8** [[TMP9]], align 8
800 // CHECK2-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
801 // CHECK2-NEXT:    [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
802 // CHECK2-NEXT:    store i64 [[TMP2]], i64* [[TMP11]], align 8
803 // CHECK2-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
804 // CHECK2-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
805 // CHECK2-NEXT:    store i64 [[TMP2]], i64* [[TMP13]], align 8
806 // CHECK2-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
807 // CHECK2-NEXT:    store i8* null, i8** [[TMP14]], align 8
808 // CHECK2-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
809 // CHECK2-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
810 // CHECK2-NEXT:    store i64 [[TMP4]], i64* [[TMP16]], align 8
811 // CHECK2-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
812 // CHECK2-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
813 // CHECK2-NEXT:    store i64 [[TMP4]], i64* [[TMP18]], align 8
814 // CHECK2-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
815 // CHECK2-NEXT:    store i8* null, i8** [[TMP19]], align 8
816 // CHECK2-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
817 // CHECK2-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
818 // CHECK2-NEXT:    [[TMP22:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
819 // CHECK2-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP22]] to i1
820 // CHECK2-NEXT:    [[TMP23:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
821 // CHECK2-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP23]])
822 // CHECK2-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
823 // CHECK2-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
824 // CHECK2:       omp_offload.failed:
825 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i64 [[TMP2]], i64 [[TMP4]]) #[[ATTR3:[0-9]+]]
826 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
827 // CHECK2:       omp_offload.cont:
828 // CHECK2-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
829 // CHECK2-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP26]], 5
830 // CHECK2-NEXT:    [[FROMBOOL7:%.*]] = zext i1 [[CMP6]] to i8
831 // CHECK2-NEXT:    store i8 [[FROMBOOL7]], i8* [[DOTCAPTURE_EXPR_5]], align 1
832 // CHECK2-NEXT:    [[TMP27:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_5]], align 1
833 // CHECK2-NEXT:    [[TOBOOL8:%.*]] = trunc i8 [[TMP27]] to i1
834 // CHECK2-NEXT:    [[CONV10:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED9]] to i8*
835 // CHECK2-NEXT:    [[FROMBOOL11:%.*]] = zext i1 [[TOBOOL8]] to i8
836 // CHECK2-NEXT:    store i8 [[FROMBOOL11]], i8* [[CONV10]], align 1
837 // CHECK2-NEXT:    [[TMP28:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED9]], align 8
838 // CHECK2-NEXT:    [[TMP29:%.*]] = load i32, i32* [[N_ADDR]], align 4
839 // CHECK2-NEXT:    [[CMP12:%.*]] = icmp sgt i32 [[TMP29]], 4
840 // CHECK2-NEXT:    br i1 [[CMP12]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
841 // CHECK2:       omp_if.then:
842 // CHECK2-NEXT:    [[A13:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
843 // CHECK2-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS14]], i32 0, i32 0
844 // CHECK2-NEXT:    [[TMP31:%.*]] = bitcast i8** [[TMP30]] to %struct.S1**
845 // CHECK2-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP31]], align 8
846 // CHECK2-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS15]], i32 0, i32 0
847 // CHECK2-NEXT:    [[TMP33:%.*]] = bitcast i8** [[TMP32]] to double**
848 // CHECK2-NEXT:    store double* [[A13]], double** [[TMP33]], align 8
849 // CHECK2-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS16]], i64 0, i64 0
850 // CHECK2-NEXT:    store i8* null, i8** [[TMP34]], align 8
851 // CHECK2-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS14]], i32 0, i32 1
852 // CHECK2-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i64*
853 // CHECK2-NEXT:    store i64 [[TMP28]], i64* [[TMP36]], align 8
854 // CHECK2-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS15]], i32 0, i32 1
855 // CHECK2-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i64*
856 // CHECK2-NEXT:    store i64 [[TMP28]], i64* [[TMP38]], align 8
857 // CHECK2-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS16]], i64 0, i64 1
858 // CHECK2-NEXT:    store i8* null, i8** [[TMP39]], align 8
859 // CHECK2-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS14]], i32 0, i32 0
860 // CHECK2-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS15]], i32 0, i32 0
861 // CHECK2-NEXT:    [[TMP42:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_5]], align 1
862 // CHECK2-NEXT:    [[TOBOOL17:%.*]] = trunc i8 [[TMP42]] to i1
863 // CHECK2-NEXT:    [[TMP43:%.*]] = select i1 [[TOBOOL17]], i32 0, i32 1
864 // CHECK2-NEXT:    [[TMP44:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 2, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP43]])
865 // CHECK2-NEXT:    [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
866 // CHECK2-NEXT:    br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED18:%.*]], label [[OMP_OFFLOAD_CONT19:%.*]]
867 // CHECK2:       omp_offload.failed18:
868 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i64 [[TMP28]]) #[[ATTR3]]
869 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT19]]
870 // CHECK2:       omp_offload.cont19:
871 // CHECK2-NEXT:    br label [[OMP_IF_END:%.*]]
872 // CHECK2:       omp_if.else:
873 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i64 [[TMP28]]) #[[ATTR3]]
874 // CHECK2-NEXT:    br label [[OMP_IF_END]]
875 // CHECK2:       omp_if.end:
876 // CHECK2-NEXT:    [[A20:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
877 // CHECK2-NEXT:    [[TMP46:%.*]] = load double, double* [[A20]], align 8
878 // CHECK2-NEXT:    [[CONV21:%.*]] = fptosi double [[TMP46]] to i32
879 // CHECK2-NEXT:    ret i32 [[CONV21]]
880 //
881 //
882 // CHECK2-LABEL: define {{[^@]+}}@_ZL7fstatici
883 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
884 // CHECK2-NEXT:  entry:
885 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
886 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
887 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
888 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
889 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
890 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
891 // CHECK2-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
892 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
893 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 1
894 // CHECK2-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
895 // CHECK2-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
896 // CHECK2-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
897 // CHECK2-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
898 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
899 // CHECK2-NEXT:    [[FROMBOOL1:%.*]] = zext i1 [[TOBOOL]] to i8
900 // CHECK2-NEXT:    store i8 [[FROMBOOL1]], i8* [[CONV]], align 1
901 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
902 // CHECK2-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
903 // CHECK2-NEXT:    [[TOBOOL2:%.*]] = trunc i8 [[TMP3]] to i1
904 // CHECK2-NEXT:    br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
905 // CHECK2:       omp_if.then:
906 // CHECK2-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
907 // CHECK2-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
908 // CHECK2-NEXT:    store i64 [[TMP2]], i64* [[TMP5]], align 8
909 // CHECK2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
910 // CHECK2-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
911 // CHECK2-NEXT:    store i64 [[TMP2]], i64* [[TMP7]], align 8
912 // CHECK2-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
913 // CHECK2-NEXT:    store i8* null, i8** [[TMP8]], align 8
914 // CHECK2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
915 // CHECK2-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
916 // CHECK2-NEXT:    [[TMP11:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
917 // CHECK2-NEXT:    [[TOBOOL3:%.*]] = trunc i8 [[TMP11]] to i1
918 // CHECK2-NEXT:    [[TMP12:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
919 // CHECK2-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP9]], i8** [[TMP10]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP12]])
920 // CHECK2-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
921 // CHECK2-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
922 // CHECK2:       omp_offload.failed:
923 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR3]]
924 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
925 // CHECK2:       omp_offload.cont:
926 // CHECK2-NEXT:    br label [[OMP_IF_END:%.*]]
927 // CHECK2:       omp_if.else:
928 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR3]]
929 // CHECK2-NEXT:    br label [[OMP_IF_END]]
930 // CHECK2:       omp_if.end:
931 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, i32* [[N_ADDR]], align 4
932 // CHECK2-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP15]], 2
933 // CHECK2-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[SUB]], 2
934 // CHECK2-NEXT:    br i1 [[CMP4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE8:%.*]]
935 // CHECK2:       omp_if.then5:
936 // CHECK2-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0)
937 // CHECK2-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
938 // CHECK2-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
939 // CHECK2:       omp_offload.failed6:
940 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
941 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
942 // CHECK2:       omp_offload.cont7:
943 // CHECK2-NEXT:    br label [[OMP_IF_END9:%.*]]
944 // CHECK2:       omp_if.else8:
945 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
946 // CHECK2-NEXT:    br label [[OMP_IF_END9]]
947 // CHECK2:       omp_if.end9:
948 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
949 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
950 // CHECK2-NEXT:    ret i32 [[ADD]]
951 //
952 //
953 // CHECK2-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
954 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat {
955 // CHECK2-NEXT:  entry:
956 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
957 // CHECK2-NEXT:    [[A:%.*]] = alloca i32, align 4
958 // CHECK2-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
959 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
960 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
961 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
962 // CHECK2-NEXT:    [[B:%.*]] = alloca i16, align 2
963 // CHECK2-NEXT:    [[A_CASTED1:%.*]] = alloca i64, align 8
964 // CHECK2-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
965 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [2 x i8*], align 8
966 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [2 x i8*], align 8
967 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [2 x i8*], align 8
968 // CHECK2-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
969 // CHECK2-NEXT:    store i32 0, i32* [[A]], align 4
970 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A]], align 4
971 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32*
972 // CHECK2-NEXT:    store i32 [[TMP0]], i32* [[CONV]], align 4
973 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
974 // CHECK2-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
975 // CHECK2-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
976 // CHECK2-NEXT:    store i64 [[TMP1]], i64* [[TMP3]], align 8
977 // CHECK2-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
978 // CHECK2-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
979 // CHECK2-NEXT:    store i64 [[TMP1]], i64* [[TMP5]], align 8
980 // CHECK2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
981 // CHECK2-NEXT:    store i8* null, i8** [[TMP6]], align 8
982 // CHECK2-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
983 // CHECK2-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
984 // CHECK2-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.9, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 1)
985 // CHECK2-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
986 // CHECK2-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
987 // CHECK2:       omp_offload.failed:
988 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87(i64 [[TMP1]]) #[[ATTR3]]
989 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
990 // CHECK2:       omp_offload.cont:
991 // CHECK2-NEXT:    store i16 1, i16* [[B]], align 2
992 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[A]], align 4
993 // CHECK2-NEXT:    [[CONV2:%.*]] = bitcast i64* [[A_CASTED1]] to i32*
994 // CHECK2-NEXT:    store i32 [[TMP11]], i32* [[CONV2]], align 4
995 // CHECK2-NEXT:    [[TMP12:%.*]] = load i64, i64* [[A_CASTED1]], align 8
996 // CHECK2-NEXT:    [[TMP13:%.*]] = load i16, i16* [[B]], align 2
997 // CHECK2-NEXT:    [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i16*
998 // CHECK2-NEXT:    store i16 [[TMP13]], i16* [[CONV3]], align 2
999 // CHECK2-NEXT:    [[TMP14:%.*]] = load i64, i64* [[B_CASTED]], align 8
1000 // CHECK2-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
1001 // CHECK2-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
1002 // CHECK2-NEXT:    store i64 [[TMP12]], i64* [[TMP16]], align 8
1003 // CHECK2-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
1004 // CHECK2-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
1005 // CHECK2-NEXT:    store i64 [[TMP12]], i64* [[TMP18]], align 8
1006 // CHECK2-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
1007 // CHECK2-NEXT:    store i8* null, i8** [[TMP19]], align 8
1008 // CHECK2-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
1009 // CHECK2-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
1010 // CHECK2-NEXT:    store i64 [[TMP14]], i64* [[TMP21]], align 8
1011 // CHECK2-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
1012 // CHECK2-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
1013 // CHECK2-NEXT:    store i64 [[TMP14]], i64* [[TMP23]], align 8
1014 // CHECK2-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1
1015 // CHECK2-NEXT:    store i8* null, i8** [[TMP24]], align 8
1016 // CHECK2-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
1017 // CHECK2-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
1018 // CHECK2-NEXT:    [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 2, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0)
1019 // CHECK2-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
1020 // CHECK2-NEXT:    br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
1021 // CHECK2:       omp_offload.failed7:
1022 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i64 [[TMP12]], i64 [[TMP14]]) #[[ATTR3]]
1023 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
1024 // CHECK2:       omp_offload.cont8:
1025 // CHECK2-NEXT:    [[TMP29:%.*]] = load i32, i32* [[A]], align 4
1026 // CHECK2-NEXT:    ret i32 [[TMP29]]
1027 //
1028 //
1029 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
1030 // CHECK2-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
1031 // CHECK2-NEXT:  entry:
1032 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
1033 // CHECK2-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
1034 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1035 // CHECK2-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
1036 // CHECK2-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1037 // CHECK2-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1038 // CHECK2-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1039 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1040 // CHECK2-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
1041 // CHECK2-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
1042 // CHECK2-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1043 // CHECK2-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
1044 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
1045 // CHECK2-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1046 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
1047 // CHECK2-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
1048 // CHECK2-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
1049 // CHECK2-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
1050 // CHECK2-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV1]], align 8
1051 // CHECK2-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
1052 // CHECK2-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1053 // CHECK2:       omp_if.then:
1054 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP3]])
1055 // CHECK2-NEXT:    br label [[OMP_IF_END:%.*]]
1056 // CHECK2:       omp_if.else:
1057 // CHECK2-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1058 // CHECK2-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
1059 // CHECK2-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i64 [[TMP3]]) #[[ATTR3]]
1060 // CHECK2-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1061 // CHECK2-NEXT:    br label [[OMP_IF_END]]
1062 // CHECK2:       omp_if.end:
1063 // CHECK2-NEXT:    ret void
1064 //
1065 //
1066 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
1067 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR2:[0-9]+]] {
1068 // CHECK2-NEXT:  entry:
1069 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1070 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1071 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
1072 // CHECK2-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
1073 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1074 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1075 // CHECK2-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
1076 // CHECK2-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
1077 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
1078 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
1079 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
1080 // CHECK2-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
1081 // CHECK2-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
1082 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
1083 // CHECK2-NEXT:    store double [[ADD]], double* [[A]], align 8
1084 // CHECK2-NEXT:    ret void
1085 //
1086 //
1087 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
1088 // CHECK2-SAME: (%struct.S1* [[THIS:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1089 // CHECK2-NEXT:  entry:
1090 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
1091 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1092 // CHECK2-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1093 // CHECK2-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1094 // CHECK2-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1095 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1096 // CHECK2-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
1097 // CHECK2-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1098 // CHECK2-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
1099 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1100 // CHECK2-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
1101 // CHECK2-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
1102 // CHECK2-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1103 // CHECK2:       omp_if.then:
1104 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
1105 // CHECK2-NEXT:    br label [[OMP_IF_END:%.*]]
1106 // CHECK2:       omp_if.else:
1107 // CHECK2-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1108 // CHECK2-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
1109 // CHECK2-NEXT:    call void @.omp_outlined..1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR3]]
1110 // CHECK2-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1111 // CHECK2-NEXT:    br label [[OMP_IF_END]]
1112 // CHECK2:       omp_if.end:
1113 // CHECK2-NEXT:    ret void
1114 //
1115 //
1116 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
1117 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR2]] {
1118 // CHECK2-NEXT:  entry:
1119 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1120 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1121 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
1122 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1123 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1124 // CHECK2-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
1125 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
1126 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
1127 // CHECK2-NEXT:    store double 2.500000e+00, double* [[A]], align 8
1128 // CHECK2-NEXT:    ret void
1129 //
1130 //
1131 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
1132 // CHECK2-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1133 // CHECK2-NEXT:  entry:
1134 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1135 // CHECK2-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1136 // CHECK2-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1137 // CHECK2-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1138 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1139 // CHECK2-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1140 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1141 // CHECK2-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 8
1142 // CHECK2-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1143 // CHECK2-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1144 // CHECK2:       omp_if.then:
1145 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
1146 // CHECK2-NEXT:    br label [[OMP_IF_END:%.*]]
1147 // CHECK2:       omp_if.else:
1148 // CHECK2-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1149 // CHECK2-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
1150 // CHECK2-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR3]]
1151 // CHECK2-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1152 // CHECK2-NEXT:    br label [[OMP_IF_END]]
1153 // CHECK2:       omp_if.end:
1154 // CHECK2-NEXT:    ret void
1155 //
1156 //
1157 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4
1158 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
1159 // CHECK2-NEXT:  entry:
1160 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1161 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1162 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1163 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1164 // CHECK2-NEXT:    ret void
1165 //
1166 //
1167 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
1168 // CHECK2-SAME: () #[[ATTR1]] {
1169 // CHECK2-NEXT:  entry:
1170 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
1171 // CHECK2-NEXT:    ret void
1172 //
1173 //
1174 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7
1175 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
1176 // CHECK2-NEXT:  entry:
1177 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1178 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1179 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1180 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1181 // CHECK2-NEXT:    ret void
1182 //
1183 //
1184 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
1185 // CHECK2-SAME: (i64 [[A:%.*]]) #[[ATTR1]] {
1186 // CHECK2-NEXT:  entry:
1187 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1188 // CHECK2-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1189 // CHECK2-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1190 // CHECK2-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1191 // CHECK2-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1192 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1193 // CHECK2-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
1194 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1195 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
1196 // CHECK2-NEXT:    [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
1197 // CHECK2-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
1198 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
1199 // CHECK2-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1200 // CHECK2-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
1201 // CHECK2-NEXT:    call void @.omp_outlined..8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]]) #[[ATTR3]]
1202 // CHECK2-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1203 // CHECK2-NEXT:    ret void
1204 //
1205 //
1206 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8
1207 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR2]] {
1208 // CHECK2-NEXT:  entry:
1209 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1210 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1211 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1212 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1213 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1214 // CHECK2-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
1215 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1216 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
1217 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
1218 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
1219 // CHECK2-NEXT:    ret void
1220 //
1221 //
1222 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
1223 // CHECK2-SAME: (i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
1224 // CHECK2-NEXT:  entry:
1225 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1226 // CHECK2-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
1227 // CHECK2-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1228 // CHECK2-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
1229 // CHECK2-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
1230 // CHECK2-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
1231 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1232 // CHECK2-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
1233 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
1234 // CHECK2-NEXT:    [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
1235 // CHECK2-NEXT:    store i32 [[TMP0]], i32* [[CONV2]], align 4
1236 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
1237 // CHECK2-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
1238 // CHECK2-NEXT:    [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i16*
1239 // CHECK2-NEXT:    store i16 [[TMP2]], i16* [[CONV3]], align 2
1240 // CHECK2-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
1241 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
1242 // CHECK2-NEXT:    ret void
1243 //
1244 //
1245 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11
1246 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR2]] {
1247 // CHECK2-NEXT:  entry:
1248 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1249 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1250 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1251 // CHECK2-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
1252 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1253 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1254 // CHECK2-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
1255 // CHECK2-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
1256 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1257 // CHECK2-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
1258 // CHECK2-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
1259 // CHECK2-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
1260 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
1261 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
1262 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
1263 // CHECK2-NEXT:    ret void
1264 //
1265 //
1266 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1267 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] {
1268 // CHECK2-NEXT:  entry:
1269 // CHECK2-NEXT:    call void @__tgt_register_requires(i64 1)
1270 // CHECK2-NEXT:    ret void
1271 //
1272 //
1273 // CHECK3-LABEL: define {{[^@]+}}@_Z3bari
1274 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
1275 // CHECK3-NEXT:  entry:
1276 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1277 // CHECK3-NEXT:    [[A:%.*]] = alloca i32, align 4
1278 // CHECK3-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4
1279 // CHECK3-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1280 // CHECK3-NEXT:    store i32 0, i32* [[A]], align 4
1281 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1282 // CHECK3-NEXT:    [[CALL:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP0]])
1283 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
1284 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
1285 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
1286 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
1287 // CHECK3-NEXT:    [[CALL1:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP2]])
1288 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
1289 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
1290 // CHECK3-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
1291 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
1292 // CHECK3-NEXT:    [[CALL3:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP4]])
1293 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
1294 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
1295 // CHECK3-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
1296 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
1297 // CHECK3-NEXT:    ret i32 [[TMP6]]
1298 //
1299 //
1300 // CHECK3-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
1301 // CHECK3-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 {
1302 // CHECK3-NEXT:  entry:
1303 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1304 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1305 // CHECK3-NEXT:    [[B:%.*]] = alloca i32, align 4
1306 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1307 // CHECK3-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
1308 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1309 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
1310 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
1311 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
1312 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i8, align 1
1313 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED8:%.*]] = alloca i32, align 4
1314 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [2 x i8*], align 4
1315 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [2 x i8*], align 4
1316 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [2 x i8*], align 4
1317 // CHECK3-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1318 // CHECK3-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1319 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1320 // CHECK3-NEXT:    store i32 1, i32* [[B]], align 4
1321 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1322 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 3
1323 // CHECK3-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
1324 // CHECK3-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1325 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
1326 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[B_CASTED]], align 4
1327 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B_CASTED]], align 4
1328 // CHECK3-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1329 // CHECK3-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1
1330 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1331 // CHECK3-NEXT:    [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL]] to i8
1332 // CHECK3-NEXT:    store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
1333 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1334 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
1335 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1336 // CHECK3-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to %struct.S1**
1337 // CHECK3-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP6]], align 4
1338 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1339 // CHECK3-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to double**
1340 // CHECK3-NEXT:    store double* [[A]], double** [[TMP8]], align 4
1341 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1342 // CHECK3-NEXT:    store i8* null, i8** [[TMP9]], align 4
1343 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1344 // CHECK3-NEXT:    [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
1345 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[TMP11]], align 4
1346 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1347 // CHECK3-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
1348 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[TMP13]], align 4
1349 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1350 // CHECK3-NEXT:    store i8* null, i8** [[TMP14]], align 4
1351 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1352 // CHECK3-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32*
1353 // CHECK3-NEXT:    store i32 [[TMP4]], i32* [[TMP16]], align 4
1354 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1355 // CHECK3-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
1356 // CHECK3-NEXT:    store i32 [[TMP4]], i32* [[TMP18]], align 4
1357 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1358 // CHECK3-NEXT:    store i8* null, i8** [[TMP19]], align 4
1359 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1360 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1361 // CHECK3-NEXT:    [[TMP22:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1362 // CHECK3-NEXT:    [[TOBOOL3:%.*]] = trunc i8 [[TMP22]] to i1
1363 // CHECK3-NEXT:    [[TMP23:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
1364 // CHECK3-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP23]])
1365 // CHECK3-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1366 // CHECK3-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1367 // CHECK3:       omp_offload.failed:
1368 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i32 [[TMP2]], i32 [[TMP4]]) #[[ATTR3:[0-9]+]]
1369 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1370 // CHECK3:       omp_offload.cont:
1371 // CHECK3-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
1372 // CHECK3-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 5
1373 // CHECK3-NEXT:    [[FROMBOOL6:%.*]] = zext i1 [[CMP5]] to i8
1374 // CHECK3-NEXT:    store i8 [[FROMBOOL6]], i8* [[DOTCAPTURE_EXPR_4]], align 1
1375 // CHECK3-NEXT:    [[TMP27:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1
1376 // CHECK3-NEXT:    [[TOBOOL7:%.*]] = trunc i8 [[TMP27]] to i1
1377 // CHECK3-NEXT:    [[CONV9:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED8]] to i8*
1378 // CHECK3-NEXT:    [[FROMBOOL10:%.*]] = zext i1 [[TOBOOL7]] to i8
1379 // CHECK3-NEXT:    store i8 [[FROMBOOL10]], i8* [[CONV9]], align 1
1380 // CHECK3-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED8]], align 4
1381 // CHECK3-NEXT:    [[TMP29:%.*]] = load i32, i32* [[N_ADDR]], align 4
1382 // CHECK3-NEXT:    [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], 4
1383 // CHECK3-NEXT:    br i1 [[CMP11]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1384 // CHECK3:       omp_if.then:
1385 // CHECK3-NEXT:    [[A12:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
1386 // CHECK3-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
1387 // CHECK3-NEXT:    [[TMP31:%.*]] = bitcast i8** [[TMP30]] to %struct.S1**
1388 // CHECK3-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP31]], align 4
1389 // CHECK3-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
1390 // CHECK3-NEXT:    [[TMP33:%.*]] = bitcast i8** [[TMP32]] to double**
1391 // CHECK3-NEXT:    store double* [[A12]], double** [[TMP33]], align 4
1392 // CHECK3-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
1393 // CHECK3-NEXT:    store i8* null, i8** [[TMP34]], align 4
1394 // CHECK3-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 1
1395 // CHECK3-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32*
1396 // CHECK3-NEXT:    store i32 [[TMP28]], i32* [[TMP36]], align 4
1397 // CHECK3-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 1
1398 // CHECK3-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
1399 // CHECK3-NEXT:    store i32 [[TMP28]], i32* [[TMP38]], align 4
1400 // CHECK3-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 1
1401 // CHECK3-NEXT:    store i8* null, i8** [[TMP39]], align 4
1402 // CHECK3-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
1403 // CHECK3-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
1404 // CHECK3-NEXT:    [[TMP42:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1
1405 // CHECK3-NEXT:    [[TOBOOL16:%.*]] = trunc i8 [[TMP42]] to i1
1406 // CHECK3-NEXT:    [[TMP43:%.*]] = select i1 [[TOBOOL16]], i32 0, i32 1
1407 // CHECK3-NEXT:    [[TMP44:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 2, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP43]])
1408 // CHECK3-NEXT:    [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
1409 // CHECK3-NEXT:    br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
1410 // CHECK3:       omp_offload.failed17:
1411 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i32 [[TMP28]]) #[[ATTR3]]
1412 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
1413 // CHECK3:       omp_offload.cont18:
1414 // CHECK3-NEXT:    br label [[OMP_IF_END:%.*]]
1415 // CHECK3:       omp_if.else:
1416 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i32 [[TMP28]]) #[[ATTR3]]
1417 // CHECK3-NEXT:    br label [[OMP_IF_END]]
1418 // CHECK3:       omp_if.end:
1419 // CHECK3-NEXT:    [[A19:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
1420 // CHECK3-NEXT:    [[TMP46:%.*]] = load double, double* [[A19]], align 4
1421 // CHECK3-NEXT:    [[CONV20:%.*]] = fptosi double [[TMP46]] to i32
1422 // CHECK3-NEXT:    ret i32 [[CONV20]]
1423 //
1424 //
1425 // CHECK3-LABEL: define {{[^@]+}}@_ZL7fstatici
1426 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
1427 // CHECK3-NEXT:  entry:
1428 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1429 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1430 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1431 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1432 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1433 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1434 // CHECK3-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1435 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1436 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 1
1437 // CHECK3-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
1438 // CHECK3-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1439 // CHECK3-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1440 // CHECK3-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1441 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1442 // CHECK3-NEXT:    [[FROMBOOL1:%.*]] = zext i1 [[TOBOOL]] to i8
1443 // CHECK3-NEXT:    store i8 [[FROMBOOL1]], i8* [[CONV]], align 1
1444 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1445 // CHECK3-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1446 // CHECK3-NEXT:    [[TOBOOL2:%.*]] = trunc i8 [[TMP3]] to i1
1447 // CHECK3-NEXT:    br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1448 // CHECK3:       omp_if.then:
1449 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1450 // CHECK3-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
1451 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[TMP5]], align 4
1452 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1453 // CHECK3-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
1454 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[TMP7]], align 4
1455 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1456 // CHECK3-NEXT:    store i8* null, i8** [[TMP8]], align 4
1457 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1458 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1459 // CHECK3-NEXT:    [[TMP11:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1460 // CHECK3-NEXT:    [[TOBOOL3:%.*]] = trunc i8 [[TMP11]] to i1
1461 // CHECK3-NEXT:    [[TMP12:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
1462 // CHECK3-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP9]], i8** [[TMP10]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP12]])
1463 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1464 // CHECK3-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1465 // CHECK3:       omp_offload.failed:
1466 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR3]]
1467 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1468 // CHECK3:       omp_offload.cont:
1469 // CHECK3-NEXT:    br label [[OMP_IF_END:%.*]]
1470 // CHECK3:       omp_if.else:
1471 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR3]]
1472 // CHECK3-NEXT:    br label [[OMP_IF_END]]
1473 // CHECK3:       omp_if.end:
1474 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, i32* [[N_ADDR]], align 4
1475 // CHECK3-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP15]], 2
1476 // CHECK3-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[SUB]], 2
1477 // CHECK3-NEXT:    br i1 [[CMP4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE8:%.*]]
1478 // CHECK3:       omp_if.then5:
1479 // CHECK3-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0)
1480 // CHECK3-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1481 // CHECK3-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
1482 // CHECK3:       omp_offload.failed6:
1483 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
1484 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
1485 // CHECK3:       omp_offload.cont7:
1486 // CHECK3-NEXT:    br label [[OMP_IF_END9:%.*]]
1487 // CHECK3:       omp_if.else8:
1488 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
1489 // CHECK3-NEXT:    br label [[OMP_IF_END9]]
1490 // CHECK3:       omp_if.end9:
1491 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
1492 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
1493 // CHECK3-NEXT:    ret i32 [[ADD]]
1494 //
1495 //
1496 // CHECK3-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
1497 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat {
1498 // CHECK3-NEXT:  entry:
1499 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1500 // CHECK3-NEXT:    [[A:%.*]] = alloca i32, align 4
1501 // CHECK3-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
1502 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1503 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1504 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1505 // CHECK3-NEXT:    [[B:%.*]] = alloca i16, align 2
1506 // CHECK3-NEXT:    [[A_CASTED1:%.*]] = alloca i32, align 4
1507 // CHECK3-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
1508 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS2:%.*]] = alloca [2 x i8*], align 4
1509 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS3:%.*]] = alloca [2 x i8*], align 4
1510 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS4:%.*]] = alloca [2 x i8*], align 4
1511 // CHECK3-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1512 // CHECK3-NEXT:    store i32 0, i32* [[A]], align 4
1513 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A]], align 4
1514 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[A_CASTED]], align 4
1515 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
1516 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1517 // CHECK3-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32*
1518 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[TMP3]], align 4
1519 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1520 // CHECK3-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
1521 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[TMP5]], align 4
1522 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1523 // CHECK3-NEXT:    store i8* null, i8** [[TMP6]], align 4
1524 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1525 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1526 // CHECK3-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.9, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 1)
1527 // CHECK3-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1528 // CHECK3-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1529 // CHECK3:       omp_offload.failed:
1530 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87(i32 [[TMP1]]) #[[ATTR3]]
1531 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1532 // CHECK3:       omp_offload.cont:
1533 // CHECK3-NEXT:    store i16 1, i16* [[B]], align 2
1534 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[A]], align 4
1535 // CHECK3-NEXT:    store i32 [[TMP11]], i32* [[A_CASTED1]], align 4
1536 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[A_CASTED1]], align 4
1537 // CHECK3-NEXT:    [[TMP13:%.*]] = load i16, i16* [[B]], align 2
1538 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_CASTED]] to i16*
1539 // CHECK3-NEXT:    store i16 [[TMP13]], i16* [[CONV]], align 2
1540 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, i32* [[B_CASTED]], align 4
1541 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
1542 // CHECK3-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32*
1543 // CHECK3-NEXT:    store i32 [[TMP12]], i32* [[TMP16]], align 4
1544 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
1545 // CHECK3-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
1546 // CHECK3-NEXT:    store i32 [[TMP12]], i32* [[TMP18]], align 4
1547 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 0
1548 // CHECK3-NEXT:    store i8* null, i8** [[TMP19]], align 4
1549 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 1
1550 // CHECK3-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
1551 // CHECK3-NEXT:    store i32 [[TMP14]], i32* [[TMP21]], align 4
1552 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 1
1553 // CHECK3-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
1554 // CHECK3-NEXT:    store i32 [[TMP14]], i32* [[TMP23]], align 4
1555 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 1
1556 // CHECK3-NEXT:    store i8* null, i8** [[TMP24]], align 4
1557 // CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
1558 // CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
1559 // CHECK3-NEXT:    [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 2, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0)
1560 // CHECK3-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
1561 // CHECK3-NEXT:    br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
1562 // CHECK3:       omp_offload.failed5:
1563 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i32 [[TMP12]], i32 [[TMP14]]) #[[ATTR3]]
1564 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
1565 // CHECK3:       omp_offload.cont6:
1566 // CHECK3-NEXT:    [[TMP29:%.*]] = load i32, i32* [[A]], align 4
1567 // CHECK3-NEXT:    ret i32 [[TMP29]]
1568 //
1569 //
1570 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
1571 // CHECK3-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
1572 // CHECK3-NEXT:  entry:
1573 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1574 // CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
1575 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1576 // CHECK3-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
1577 // CHECK3-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1578 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1579 // CHECK3-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1580 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1581 // CHECK3-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1582 // CHECK3-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
1583 // CHECK3-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1584 // CHECK3-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1585 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1586 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B_ADDR]], align 4
1587 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[B_CASTED]], align 4
1588 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
1589 // CHECK3-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV]], align 4
1590 // CHECK3-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
1591 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1592 // CHECK3:       omp_if.then:
1593 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP3]])
1594 // CHECK3-NEXT:    br label [[OMP_IF_END:%.*]]
1595 // CHECK3:       omp_if.else:
1596 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1597 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
1598 // CHECK3-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i32 [[TMP3]]) #[[ATTR3]]
1599 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1600 // CHECK3-NEXT:    br label [[OMP_IF_END]]
1601 // CHECK3:       omp_if.end:
1602 // CHECK3-NEXT:    ret void
1603 //
1604 //
1605 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1606 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR2:[0-9]+]] {
1607 // CHECK3-NEXT:  entry:
1608 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1609 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1610 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1611 // CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
1612 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1613 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1614 // CHECK3-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1615 // CHECK3-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
1616 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1617 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
1618 // CHECK3-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
1619 // CHECK3-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
1620 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
1621 // CHECK3-NEXT:    store double [[ADD]], double* [[A]], align 4
1622 // CHECK3-NEXT:    ret void
1623 //
1624 //
1625 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
1626 // CHECK3-SAME: (%struct.S1* [[THIS:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1627 // CHECK3-NEXT:  entry:
1628 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1629 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1630 // CHECK3-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1631 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1632 // CHECK3-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1633 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1634 // CHECK3-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1635 // CHECK3-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1636 // CHECK3-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1637 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1638 // CHECK3-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 4
1639 // CHECK3-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
1640 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1641 // CHECK3:       omp_if.then:
1642 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
1643 // CHECK3-NEXT:    br label [[OMP_IF_END:%.*]]
1644 // CHECK3:       omp_if.else:
1645 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1646 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
1647 // CHECK3-NEXT:    call void @.omp_outlined..1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR3]]
1648 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1649 // CHECK3-NEXT:    br label [[OMP_IF_END]]
1650 // CHECK3:       omp_if.end:
1651 // CHECK3-NEXT:    ret void
1652 //
1653 //
1654 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1655 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR2]] {
1656 // CHECK3-NEXT:  entry:
1657 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1658 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1659 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1660 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1661 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1662 // CHECK3-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1663 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1664 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
1665 // CHECK3-NEXT:    store double 2.500000e+00, double* [[A]], align 4
1666 // CHECK3-NEXT:    ret void
1667 //
1668 //
1669 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
1670 // CHECK3-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1671 // CHECK3-NEXT:  entry:
1672 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1673 // CHECK3-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1674 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1675 // CHECK3-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1676 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1677 // CHECK3-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1678 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1679 // CHECK3-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 4
1680 // CHECK3-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1681 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1682 // CHECK3:       omp_if.then:
1683 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
1684 // CHECK3-NEXT:    br label [[OMP_IF_END:%.*]]
1685 // CHECK3:       omp_if.else:
1686 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1687 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
1688 // CHECK3-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR3]]
1689 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1690 // CHECK3-NEXT:    br label [[OMP_IF_END]]
1691 // CHECK3:       omp_if.end:
1692 // CHECK3-NEXT:    ret void
1693 //
1694 //
1695 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
1696 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
1697 // CHECK3-NEXT:  entry:
1698 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1699 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1700 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1701 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1702 // CHECK3-NEXT:    ret void
1703 //
1704 //
1705 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
1706 // CHECK3-SAME: () #[[ATTR1]] {
1707 // CHECK3-NEXT:  entry:
1708 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
1709 // CHECK3-NEXT:    ret void
1710 //
1711 //
1712 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
1713 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
1714 // CHECK3-NEXT:  entry:
1715 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1716 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1717 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1718 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1719 // CHECK3-NEXT:    ret void
1720 //
1721 //
1722 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
1723 // CHECK3-SAME: (i32 [[A:%.*]]) #[[ATTR1]] {
1724 // CHECK3-NEXT:  entry:
1725 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1726 // CHECK3-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
1727 // CHECK3-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1728 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1729 // CHECK3-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1730 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1731 // CHECK3-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1732 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
1733 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[A_CASTED]], align 4
1734 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
1735 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1736 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
1737 // CHECK3-NEXT:    call void @.omp_outlined..8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i32 [[TMP2]]) #[[ATTR3]]
1738 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1739 // CHECK3-NEXT:    ret void
1740 //
1741 //
1742 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..8
1743 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]]) #[[ATTR2]] {
1744 // CHECK3-NEXT:  entry:
1745 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1746 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1747 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1748 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1749 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1750 // CHECK3-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1751 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1752 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
1753 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
1754 // CHECK3-NEXT:    ret void
1755 //
1756 //
1757 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
1758 // CHECK3-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
1759 // CHECK3-NEXT:  entry:
1760 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1761 // CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
1762 // CHECK3-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
1763 // CHECK3-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
1764 // CHECK3-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1765 // CHECK3-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
1766 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
1767 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1768 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[A_CASTED]], align 4
1769 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
1770 // CHECK3-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
1771 // CHECK3-NEXT:    [[CONV1:%.*]] = bitcast i32* [[B_CASTED]] to i16*
1772 // CHECK3-NEXT:    store i16 [[TMP2]], i16* [[CONV1]], align 2
1773 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
1774 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
1775 // CHECK3-NEXT:    ret void
1776 //
1777 //
1778 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11
1779 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR2]] {
1780 // CHECK3-NEXT:  entry:
1781 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1782 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1783 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1784 // CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
1785 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1786 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1787 // CHECK3-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1788 // CHECK3-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
1789 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
1790 // CHECK3-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
1791 // CHECK3-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
1792 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
1793 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
1794 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
1795 // CHECK3-NEXT:    ret void
1796 //
1797 //
1798 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1799 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
1800 // CHECK3-NEXT:  entry:
1801 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
1802 // CHECK3-NEXT:    ret void
1803 //
1804 //
1805 // CHECK4-LABEL: define {{[^@]+}}@_Z3bari
1806 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
1807 // CHECK4-NEXT:  entry:
1808 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1809 // CHECK4-NEXT:    [[A:%.*]] = alloca i32, align 4
1810 // CHECK4-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4
1811 // CHECK4-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1812 // CHECK4-NEXT:    store i32 0, i32* [[A]], align 4
1813 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1814 // CHECK4-NEXT:    [[CALL:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP0]])
1815 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
1816 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
1817 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
1818 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
1819 // CHECK4-NEXT:    [[CALL1:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP2]])
1820 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
1821 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
1822 // CHECK4-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
1823 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
1824 // CHECK4-NEXT:    [[CALL3:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP4]])
1825 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
1826 // CHECK4-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
1827 // CHECK4-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
1828 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
1829 // CHECK4-NEXT:    ret i32 [[TMP6]]
1830 //
1831 //
1832 // CHECK4-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
1833 // CHECK4-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 {
1834 // CHECK4-NEXT:  entry:
1835 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1836 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1837 // CHECK4-NEXT:    [[B:%.*]] = alloca i32, align 4
1838 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1839 // CHECK4-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
1840 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1841 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
1842 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
1843 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
1844 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i8, align 1
1845 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__CASTED8:%.*]] = alloca i32, align 4
1846 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [2 x i8*], align 4
1847 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [2 x i8*], align 4
1848 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [2 x i8*], align 4
1849 // CHECK4-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1850 // CHECK4-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1851 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1852 // CHECK4-NEXT:    store i32 1, i32* [[B]], align 4
1853 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1854 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 3
1855 // CHECK4-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
1856 // CHECK4-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1857 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
1858 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[B_CASTED]], align 4
1859 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B_CASTED]], align 4
1860 // CHECK4-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1861 // CHECK4-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1
1862 // CHECK4-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1863 // CHECK4-NEXT:    [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL]] to i8
1864 // CHECK4-NEXT:    store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
1865 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1866 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
1867 // CHECK4-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1868 // CHECK4-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to %struct.S1**
1869 // CHECK4-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP6]], align 4
1870 // CHECK4-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1871 // CHECK4-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to double**
1872 // CHECK4-NEXT:    store double* [[A]], double** [[TMP8]], align 4
1873 // CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1874 // CHECK4-NEXT:    store i8* null, i8** [[TMP9]], align 4
1875 // CHECK4-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1876 // CHECK4-NEXT:    [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
1877 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[TMP11]], align 4
1878 // CHECK4-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1879 // CHECK4-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
1880 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[TMP13]], align 4
1881 // CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1882 // CHECK4-NEXT:    store i8* null, i8** [[TMP14]], align 4
1883 // CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1884 // CHECK4-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32*
1885 // CHECK4-NEXT:    store i32 [[TMP4]], i32* [[TMP16]], align 4
1886 // CHECK4-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1887 // CHECK4-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
1888 // CHECK4-NEXT:    store i32 [[TMP4]], i32* [[TMP18]], align 4
1889 // CHECK4-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1890 // CHECK4-NEXT:    store i8* null, i8** [[TMP19]], align 4
1891 // CHECK4-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1892 // CHECK4-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1893 // CHECK4-NEXT:    [[TMP22:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1894 // CHECK4-NEXT:    [[TOBOOL3:%.*]] = trunc i8 [[TMP22]] to i1
1895 // CHECK4-NEXT:    [[TMP23:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
1896 // CHECK4-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP23]])
1897 // CHECK4-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1898 // CHECK4-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1899 // CHECK4:       omp_offload.failed:
1900 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i32 [[TMP2]], i32 [[TMP4]]) #[[ATTR3:[0-9]+]]
1901 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1902 // CHECK4:       omp_offload.cont:
1903 // CHECK4-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
1904 // CHECK4-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 5
1905 // CHECK4-NEXT:    [[FROMBOOL6:%.*]] = zext i1 [[CMP5]] to i8
1906 // CHECK4-NEXT:    store i8 [[FROMBOOL6]], i8* [[DOTCAPTURE_EXPR_4]], align 1
1907 // CHECK4-NEXT:    [[TMP27:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1
1908 // CHECK4-NEXT:    [[TOBOOL7:%.*]] = trunc i8 [[TMP27]] to i1
1909 // CHECK4-NEXT:    [[CONV9:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED8]] to i8*
1910 // CHECK4-NEXT:    [[FROMBOOL10:%.*]] = zext i1 [[TOBOOL7]] to i8
1911 // CHECK4-NEXT:    store i8 [[FROMBOOL10]], i8* [[CONV9]], align 1
1912 // CHECK4-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED8]], align 4
1913 // CHECK4-NEXT:    [[TMP29:%.*]] = load i32, i32* [[N_ADDR]], align 4
1914 // CHECK4-NEXT:    [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], 4
1915 // CHECK4-NEXT:    br i1 [[CMP11]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1916 // CHECK4:       omp_if.then:
1917 // CHECK4-NEXT:    [[A12:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
1918 // CHECK4-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
1919 // CHECK4-NEXT:    [[TMP31:%.*]] = bitcast i8** [[TMP30]] to %struct.S1**
1920 // CHECK4-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP31]], align 4
1921 // CHECK4-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
1922 // CHECK4-NEXT:    [[TMP33:%.*]] = bitcast i8** [[TMP32]] to double**
1923 // CHECK4-NEXT:    store double* [[A12]], double** [[TMP33]], align 4
1924 // CHECK4-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
1925 // CHECK4-NEXT:    store i8* null, i8** [[TMP34]], align 4
1926 // CHECK4-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 1
1927 // CHECK4-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32*
1928 // CHECK4-NEXT:    store i32 [[TMP28]], i32* [[TMP36]], align 4
1929 // CHECK4-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 1
1930 // CHECK4-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
1931 // CHECK4-NEXT:    store i32 [[TMP28]], i32* [[TMP38]], align 4
1932 // CHECK4-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 1
1933 // CHECK4-NEXT:    store i8* null, i8** [[TMP39]], align 4
1934 // CHECK4-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
1935 // CHECK4-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
1936 // CHECK4-NEXT:    [[TMP42:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1
1937 // CHECK4-NEXT:    [[TOBOOL16:%.*]] = trunc i8 [[TMP42]] to i1
1938 // CHECK4-NEXT:    [[TMP43:%.*]] = select i1 [[TOBOOL16]], i32 0, i32 1
1939 // CHECK4-NEXT:    [[TMP44:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 2, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP43]])
1940 // CHECK4-NEXT:    [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
1941 // CHECK4-NEXT:    br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
1942 // CHECK4:       omp_offload.failed17:
1943 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i32 [[TMP28]]) #[[ATTR3]]
1944 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
1945 // CHECK4:       omp_offload.cont18:
1946 // CHECK4-NEXT:    br label [[OMP_IF_END:%.*]]
1947 // CHECK4:       omp_if.else:
1948 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i32 [[TMP28]]) #[[ATTR3]]
1949 // CHECK4-NEXT:    br label [[OMP_IF_END]]
1950 // CHECK4:       omp_if.end:
1951 // CHECK4-NEXT:    [[A19:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
1952 // CHECK4-NEXT:    [[TMP46:%.*]] = load double, double* [[A19]], align 4
1953 // CHECK4-NEXT:    [[CONV20:%.*]] = fptosi double [[TMP46]] to i32
1954 // CHECK4-NEXT:    ret i32 [[CONV20]]
1955 //
1956 //
1957 // CHECK4-LABEL: define {{[^@]+}}@_ZL7fstatici
1958 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
1959 // CHECK4-NEXT:  entry:
1960 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1961 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1962 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1963 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1964 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1965 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1966 // CHECK4-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1967 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1968 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 1
1969 // CHECK4-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
1970 // CHECK4-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1971 // CHECK4-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1972 // CHECK4-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
1973 // CHECK4-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1974 // CHECK4-NEXT:    [[FROMBOOL1:%.*]] = zext i1 [[TOBOOL]] to i8
1975 // CHECK4-NEXT:    store i8 [[FROMBOOL1]], i8* [[CONV]], align 1
1976 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1977 // CHECK4-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1978 // CHECK4-NEXT:    [[TOBOOL2:%.*]] = trunc i8 [[TMP3]] to i1
1979 // CHECK4-NEXT:    br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1980 // CHECK4:       omp_if.then:
1981 // CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1982 // CHECK4-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
1983 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[TMP5]], align 4
1984 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1985 // CHECK4-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
1986 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[TMP7]], align 4
1987 // CHECK4-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1988 // CHECK4-NEXT:    store i8* null, i8** [[TMP8]], align 4
1989 // CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1990 // CHECK4-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1991 // CHECK4-NEXT:    [[TMP11:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1992 // CHECK4-NEXT:    [[TOBOOL3:%.*]] = trunc i8 [[TMP11]] to i1
1993 // CHECK4-NEXT:    [[TMP12:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
1994 // CHECK4-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP9]], i8** [[TMP10]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP12]])
1995 // CHECK4-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1996 // CHECK4-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1997 // CHECK4:       omp_offload.failed:
1998 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR3]]
1999 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2000 // CHECK4:       omp_offload.cont:
2001 // CHECK4-NEXT:    br label [[OMP_IF_END:%.*]]
2002 // CHECK4:       omp_if.else:
2003 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR3]]
2004 // CHECK4-NEXT:    br label [[OMP_IF_END]]
2005 // CHECK4:       omp_if.end:
2006 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, i32* [[N_ADDR]], align 4
2007 // CHECK4-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP15]], 2
2008 // CHECK4-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[SUB]], 2
2009 // CHECK4-NEXT:    br i1 [[CMP4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE8:%.*]]
2010 // CHECK4:       omp_if.then5:
2011 // CHECK4-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0)
2012 // CHECK4-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2013 // CHECK4-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
2014 // CHECK4:       omp_offload.failed6:
2015 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
2016 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
2017 // CHECK4:       omp_offload.cont7:
2018 // CHECK4-NEXT:    br label [[OMP_IF_END9:%.*]]
2019 // CHECK4:       omp_if.else8:
2020 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
2021 // CHECK4-NEXT:    br label [[OMP_IF_END9]]
2022 // CHECK4:       omp_if.end9:
2023 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
2024 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
2025 // CHECK4-NEXT:    ret i32 [[ADD]]
2026 //
2027 //
2028 // CHECK4-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
2029 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat {
2030 // CHECK4-NEXT:  entry:
2031 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2032 // CHECK4-NEXT:    [[A:%.*]] = alloca i32, align 4
2033 // CHECK4-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
2034 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
2035 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
2036 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
2037 // CHECK4-NEXT:    [[B:%.*]] = alloca i16, align 2
2038 // CHECK4-NEXT:    [[A_CASTED1:%.*]] = alloca i32, align 4
2039 // CHECK4-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
2040 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS2:%.*]] = alloca [2 x i8*], align 4
2041 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS3:%.*]] = alloca [2 x i8*], align 4
2042 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS4:%.*]] = alloca [2 x i8*], align 4
2043 // CHECK4-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
2044 // CHECK4-NEXT:    store i32 0, i32* [[A]], align 4
2045 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A]], align 4
2046 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[A_CASTED]], align 4
2047 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
2048 // CHECK4-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2049 // CHECK4-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32*
2050 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[TMP3]], align 4
2051 // CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2052 // CHECK4-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
2053 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[TMP5]], align 4
2054 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2055 // CHECK4-NEXT:    store i8* null, i8** [[TMP6]], align 4
2056 // CHECK4-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2057 // CHECK4-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2058 // CHECK4-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.9, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 1)
2059 // CHECK4-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
2060 // CHECK4-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2061 // CHECK4:       omp_offload.failed:
2062 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87(i32 [[TMP1]]) #[[ATTR3]]
2063 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2064 // CHECK4:       omp_offload.cont:
2065 // CHECK4-NEXT:    store i16 1, i16* [[B]], align 2
2066 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[A]], align 4
2067 // CHECK4-NEXT:    store i32 [[TMP11]], i32* [[A_CASTED1]], align 4
2068 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[A_CASTED1]], align 4
2069 // CHECK4-NEXT:    [[TMP13:%.*]] = load i16, i16* [[B]], align 2
2070 // CHECK4-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_CASTED]] to i16*
2071 // CHECK4-NEXT:    store i16 [[TMP13]], i16* [[CONV]], align 2
2072 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, i32* [[B_CASTED]], align 4
2073 // CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
2074 // CHECK4-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32*
2075 // CHECK4-NEXT:    store i32 [[TMP12]], i32* [[TMP16]], align 4
2076 // CHECK4-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
2077 // CHECK4-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
2078 // CHECK4-NEXT:    store i32 [[TMP12]], i32* [[TMP18]], align 4
2079 // CHECK4-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 0
2080 // CHECK4-NEXT:    store i8* null, i8** [[TMP19]], align 4
2081 // CHECK4-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 1
2082 // CHECK4-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
2083 // CHECK4-NEXT:    store i32 [[TMP14]], i32* [[TMP21]], align 4
2084 // CHECK4-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 1
2085 // CHECK4-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
2086 // CHECK4-NEXT:    store i32 [[TMP14]], i32* [[TMP23]], align 4
2087 // CHECK4-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 1
2088 // CHECK4-NEXT:    store i8* null, i8** [[TMP24]], align 4
2089 // CHECK4-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
2090 // CHECK4-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
2091 // CHECK4-NEXT:    [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 2, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0)
2092 // CHECK4-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
2093 // CHECK4-NEXT:    br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
2094 // CHECK4:       omp_offload.failed5:
2095 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i32 [[TMP12]], i32 [[TMP14]]) #[[ATTR3]]
2096 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
2097 // CHECK4:       omp_offload.cont6:
2098 // CHECK4-NEXT:    [[TMP29:%.*]] = load i32, i32* [[A]], align 4
2099 // CHECK4-NEXT:    ret i32 [[TMP29]]
2100 //
2101 //
2102 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
2103 // CHECK4-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
2104 // CHECK4-NEXT:  entry:
2105 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2106 // CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2107 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2108 // CHECK4-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
2109 // CHECK4-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2110 // CHECK4-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2111 // CHECK4-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2112 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2113 // CHECK4-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2114 // CHECK4-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2115 // CHECK4-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2116 // CHECK4-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2117 // CHECK4-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2118 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B_ADDR]], align 4
2119 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[B_CASTED]], align 4
2120 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
2121 // CHECK4-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV]], align 4
2122 // CHECK4-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
2123 // CHECK4-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2124 // CHECK4:       omp_if.then:
2125 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP3]])
2126 // CHECK4-NEXT:    br label [[OMP_IF_END:%.*]]
2127 // CHECK4:       omp_if.else:
2128 // CHECK4-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2129 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2130 // CHECK4-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i32 [[TMP3]]) #[[ATTR3]]
2131 // CHECK4-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2132 // CHECK4-NEXT:    br label [[OMP_IF_END]]
2133 // CHECK4:       omp_if.end:
2134 // CHECK4-NEXT:    ret void
2135 //
2136 //
2137 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
2138 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR2:[0-9]+]] {
2139 // CHECK4-NEXT:  entry:
2140 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2141 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2142 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2143 // CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2144 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2145 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2146 // CHECK4-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2147 // CHECK4-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2148 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2149 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
2150 // CHECK4-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
2151 // CHECK4-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
2152 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2153 // CHECK4-NEXT:    store double [[ADD]], double* [[A]], align 4
2154 // CHECK4-NEXT:    ret void
2155 //
2156 //
2157 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
2158 // CHECK4-SAME: (%struct.S1* [[THIS:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2159 // CHECK4-NEXT:  entry:
2160 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2161 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2162 // CHECK4-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2163 // CHECK4-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2164 // CHECK4-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2165 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2166 // CHECK4-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2167 // CHECK4-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2168 // CHECK4-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2169 // CHECK4-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2170 // CHECK4-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 4
2171 // CHECK4-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
2172 // CHECK4-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2173 // CHECK4:       omp_if.then:
2174 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
2175 // CHECK4-NEXT:    br label [[OMP_IF_END:%.*]]
2176 // CHECK4:       omp_if.else:
2177 // CHECK4-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2178 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2179 // CHECK4-NEXT:    call void @.omp_outlined..1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR3]]
2180 // CHECK4-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2181 // CHECK4-NEXT:    br label [[OMP_IF_END]]
2182 // CHECK4:       omp_if.end:
2183 // CHECK4-NEXT:    ret void
2184 //
2185 //
2186 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
2187 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR2]] {
2188 // CHECK4-NEXT:  entry:
2189 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2190 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2191 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2192 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2193 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2194 // CHECK4-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2195 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2196 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2197 // CHECK4-NEXT:    store double 2.500000e+00, double* [[A]], align 4
2198 // CHECK4-NEXT:    ret void
2199 //
2200 //
2201 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
2202 // CHECK4-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2203 // CHECK4-NEXT:  entry:
2204 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2205 // CHECK4-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2206 // CHECK4-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2207 // CHECK4-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2208 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2209 // CHECK4-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2210 // CHECK4-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2211 // CHECK4-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 4
2212 // CHECK4-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
2213 // CHECK4-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2214 // CHECK4:       omp_if.then:
2215 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
2216 // CHECK4-NEXT:    br label [[OMP_IF_END:%.*]]
2217 // CHECK4:       omp_if.else:
2218 // CHECK4-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2219 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2220 // CHECK4-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR3]]
2221 // CHECK4-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2222 // CHECK4-NEXT:    br label [[OMP_IF_END]]
2223 // CHECK4:       omp_if.end:
2224 // CHECK4-NEXT:    ret void
2225 //
2226 //
2227 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4
2228 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
2229 // CHECK4-NEXT:  entry:
2230 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2231 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2232 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2233 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2234 // CHECK4-NEXT:    ret void
2235 //
2236 //
2237 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
2238 // CHECK4-SAME: () #[[ATTR1]] {
2239 // CHECK4-NEXT:  entry:
2240 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
2241 // CHECK4-NEXT:    ret void
2242 //
2243 //
2244 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..7
2245 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
2246 // CHECK4-NEXT:  entry:
2247 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2248 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2249 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2250 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2251 // CHECK4-NEXT:    ret void
2252 //
2253 //
2254 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
2255 // CHECK4-SAME: (i32 [[A:%.*]]) #[[ATTR1]] {
2256 // CHECK4-NEXT:  entry:
2257 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2258 // CHECK4-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
2259 // CHECK4-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2260 // CHECK4-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2261 // CHECK4-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2262 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2263 // CHECK4-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2264 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
2265 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[A_CASTED]], align 4
2266 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
2267 // CHECK4-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2268 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2269 // CHECK4-NEXT:    call void @.omp_outlined..8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i32 [[TMP2]]) #[[ATTR3]]
2270 // CHECK4-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2271 // CHECK4-NEXT:    ret void
2272 //
2273 //
2274 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..8
2275 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]]) #[[ATTR2]] {
2276 // CHECK4-NEXT:  entry:
2277 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2278 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2279 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2280 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2281 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2282 // CHECK4-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2283 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2284 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
2285 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
2286 // CHECK4-NEXT:    ret void
2287 //
2288 //
2289 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
2290 // CHECK4-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
2291 // CHECK4-NEXT:  entry:
2292 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2293 // CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2294 // CHECK4-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
2295 // CHECK4-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
2296 // CHECK4-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2297 // CHECK4-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2298 // CHECK4-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
2299 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2300 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[A_CASTED]], align 4
2301 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
2302 // CHECK4-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
2303 // CHECK4-NEXT:    [[CONV1:%.*]] = bitcast i32* [[B_CASTED]] to i16*
2304 // CHECK4-NEXT:    store i16 [[TMP2]], i16* [[CONV1]], align 2
2305 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
2306 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
2307 // CHECK4-NEXT:    ret void
2308 //
2309 //
2310 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..11
2311 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR2]] {
2312 // CHECK4-NEXT:  entry:
2313 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2314 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2315 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2316 // CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2317 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2318 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2319 // CHECK4-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2320 // CHECK4-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2321 // CHECK4-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
2322 // CHECK4-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
2323 // CHECK4-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
2324 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
2325 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
2326 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
2327 // CHECK4-NEXT:    ret void
2328 //
2329 //
2330 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2331 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] {
2332 // CHECK4-NEXT:  entry:
2333 // CHECK4-NEXT:    call void @__tgt_register_requires(i64 1)
2334 // CHECK4-NEXT:    ret void
2335 //
2336 //
2337 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
2338 // CHECK9-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
2339 // CHECK9-NEXT:  entry:
2340 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2341 // CHECK9-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2342 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2343 // CHECK9-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2344 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
2345 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2346 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2347 // CHECK9-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 8
2348 // CHECK9-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
2349 // CHECK9-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2350 // CHECK9:       omp_if.then:
2351 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
2352 // CHECK9-NEXT:    br label [[OMP_IF_END:%.*]]
2353 // CHECK9:       omp_if.else:
2354 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2355 // CHECK9-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2356 // CHECK9-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR2:[0-9]+]]
2357 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2358 // CHECK9-NEXT:    br label [[OMP_IF_END]]
2359 // CHECK9:       omp_if.end:
2360 // CHECK9-NEXT:    ret void
2361 //
2362 //
2363 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
2364 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
2365 // CHECK9-NEXT:  entry:
2366 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2367 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2368 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2369 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2370 // CHECK9-NEXT:    ret void
2371 //
2372 //
2373 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
2374 // CHECK9-SAME: () #[[ATTR0]] {
2375 // CHECK9-NEXT:  entry:
2376 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
2377 // CHECK9-NEXT:    ret void
2378 //
2379 //
2380 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
2381 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2382 // CHECK9-NEXT:  entry:
2383 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2384 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2385 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2386 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2387 // CHECK9-NEXT:    ret void
2388 //
2389 //
2390 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
2391 // CHECK9-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2392 // CHECK9-NEXT:  entry:
2393 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2394 // CHECK9-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2395 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2396 // CHECK9-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
2397 // CHECK9-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2398 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2399 // CHECK9-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2400 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2401 // CHECK9-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2402 // CHECK9-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2403 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2404 // CHECK9-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2405 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
2406 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2407 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2408 // CHECK9-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
2409 // CHECK9-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
2410 // CHECK9-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
2411 // CHECK9-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV1]], align 8
2412 // CHECK9-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
2413 // CHECK9-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2414 // CHECK9:       omp_if.then:
2415 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP3]])
2416 // CHECK9-NEXT:    br label [[OMP_IF_END:%.*]]
2417 // CHECK9:       omp_if.else:
2418 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2419 // CHECK9-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2420 // CHECK9-NEXT:    call void @.omp_outlined..2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i64 [[TMP3]]) #[[ATTR2]]
2421 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2422 // CHECK9-NEXT:    br label [[OMP_IF_END]]
2423 // CHECK9:       omp_if.end:
2424 // CHECK9-NEXT:    ret void
2425 //
2426 //
2427 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
2428 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
2429 // CHECK9-NEXT:  entry:
2430 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2431 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2432 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2433 // CHECK9-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2434 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2435 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2436 // CHECK9-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2437 // CHECK9-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2438 // CHECK9-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2439 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
2440 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
2441 // CHECK9-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
2442 // CHECK9-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
2443 // CHECK9-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2444 // CHECK9-NEXT:    store double [[ADD]], double* [[A]], align 8
2445 // CHECK9-NEXT:    ret void
2446 //
2447 //
2448 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
2449 // CHECK9-SAME: (%struct.S1* [[THIS:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2450 // CHECK9-NEXT:  entry:
2451 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2452 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2453 // CHECK9-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2454 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2455 // CHECK9-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2456 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2457 // CHECK9-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2458 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2459 // CHECK9-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2460 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2461 // CHECK9-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
2462 // CHECK9-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
2463 // CHECK9-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2464 // CHECK9:       omp_if.then:
2465 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
2466 // CHECK9-NEXT:    br label [[OMP_IF_END:%.*]]
2467 // CHECK9:       omp_if.else:
2468 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2469 // CHECK9-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2470 // CHECK9-NEXT:    call void @.omp_outlined..3(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR2]]
2471 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2472 // CHECK9-NEXT:    br label [[OMP_IF_END]]
2473 // CHECK9:       omp_if.end:
2474 // CHECK9-NEXT:    ret void
2475 //
2476 //
2477 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
2478 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
2479 // CHECK9-NEXT:  entry:
2480 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2481 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2482 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2483 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2484 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2485 // CHECK9-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2486 // CHECK9-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2487 // CHECK9-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2488 // CHECK9-NEXT:    store double 2.500000e+00, double* [[A]], align 8
2489 // CHECK9-NEXT:    ret void
2490 //
2491 //
2492 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
2493 // CHECK9-SAME: (i64 [[A:%.*]]) #[[ATTR0]] {
2494 // CHECK9-NEXT:  entry:
2495 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2496 // CHECK9-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2497 // CHECK9-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2498 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2499 // CHECK9-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2500 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2501 // CHECK9-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2502 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2503 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
2504 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
2505 // CHECK9-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
2506 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
2507 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2508 // CHECK9-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2509 // CHECK9-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]]) #[[ATTR2]]
2510 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2511 // CHECK9-NEXT:    ret void
2512 //
2513 //
2514 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
2515 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR1]] {
2516 // CHECK9-NEXT:  entry:
2517 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2518 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2519 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2520 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2521 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2522 // CHECK9-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2523 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2524 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
2525 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
2526 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
2527 // CHECK9-NEXT:    ret void
2528 //
2529 //
2530 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
2531 // CHECK9-SAME: (i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
2532 // CHECK9-NEXT:  entry:
2533 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2534 // CHECK9-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2535 // CHECK9-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2536 // CHECK9-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
2537 // CHECK9-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2538 // CHECK9-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2539 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2540 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
2541 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
2542 // CHECK9-NEXT:    [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
2543 // CHECK9-NEXT:    store i32 [[TMP0]], i32* [[CONV2]], align 4
2544 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
2545 // CHECK9-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
2546 // CHECK9-NEXT:    [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i16*
2547 // CHECK9-NEXT:    store i16 [[TMP2]], i16* [[CONV3]], align 2
2548 // CHECK9-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
2549 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
2550 // CHECK9-NEXT:    ret void
2551 //
2552 //
2553 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
2554 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
2555 // CHECK9-NEXT:  entry:
2556 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2557 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2558 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2559 // CHECK9-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2560 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2561 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2562 // CHECK9-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2563 // CHECK9-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2564 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2565 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
2566 // CHECK9-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
2567 // CHECK9-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
2568 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
2569 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
2570 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
2571 // CHECK9-NEXT:    ret void
2572 //
2573 //
2574 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
2575 // CHECK10-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
2576 // CHECK10-NEXT:  entry:
2577 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2578 // CHECK10-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2579 // CHECK10-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2580 // CHECK10-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2581 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
2582 // CHECK10-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2583 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2584 // CHECK10-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 8
2585 // CHECK10-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
2586 // CHECK10-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2587 // CHECK10:       omp_if.then:
2588 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
2589 // CHECK10-NEXT:    br label [[OMP_IF_END:%.*]]
2590 // CHECK10:       omp_if.else:
2591 // CHECK10-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2592 // CHECK10-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2593 // CHECK10-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR2:[0-9]+]]
2594 // CHECK10-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2595 // CHECK10-NEXT:    br label [[OMP_IF_END]]
2596 // CHECK10:       omp_if.end:
2597 // CHECK10-NEXT:    ret void
2598 //
2599 //
2600 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
2601 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
2602 // CHECK10-NEXT:  entry:
2603 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2604 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2605 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2606 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2607 // CHECK10-NEXT:    ret void
2608 //
2609 //
2610 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
2611 // CHECK10-SAME: () #[[ATTR0]] {
2612 // CHECK10-NEXT:  entry:
2613 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
2614 // CHECK10-NEXT:    ret void
2615 //
2616 //
2617 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
2618 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2619 // CHECK10-NEXT:  entry:
2620 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2621 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2622 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2623 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2624 // CHECK10-NEXT:    ret void
2625 //
2626 //
2627 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
2628 // CHECK10-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2629 // CHECK10-NEXT:  entry:
2630 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2631 // CHECK10-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2632 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2633 // CHECK10-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
2634 // CHECK10-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2635 // CHECK10-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2636 // CHECK10-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2637 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2638 // CHECK10-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2639 // CHECK10-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2640 // CHECK10-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2641 // CHECK10-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2642 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
2643 // CHECK10-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2644 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2645 // CHECK10-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
2646 // CHECK10-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
2647 // CHECK10-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
2648 // CHECK10-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV1]], align 8
2649 // CHECK10-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
2650 // CHECK10-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2651 // CHECK10:       omp_if.then:
2652 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP3]])
2653 // CHECK10-NEXT:    br label [[OMP_IF_END:%.*]]
2654 // CHECK10:       omp_if.else:
2655 // CHECK10-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2656 // CHECK10-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2657 // CHECK10-NEXT:    call void @.omp_outlined..2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i64 [[TMP3]]) #[[ATTR2]]
2658 // CHECK10-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2659 // CHECK10-NEXT:    br label [[OMP_IF_END]]
2660 // CHECK10:       omp_if.end:
2661 // CHECK10-NEXT:    ret void
2662 //
2663 //
2664 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
2665 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
2666 // CHECK10-NEXT:  entry:
2667 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2668 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2669 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2670 // CHECK10-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2671 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2672 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2673 // CHECK10-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2674 // CHECK10-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2675 // CHECK10-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2676 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
2677 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
2678 // CHECK10-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
2679 // CHECK10-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
2680 // CHECK10-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2681 // CHECK10-NEXT:    store double [[ADD]], double* [[A]], align 8
2682 // CHECK10-NEXT:    ret void
2683 //
2684 //
2685 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
2686 // CHECK10-SAME: (%struct.S1* [[THIS:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2687 // CHECK10-NEXT:  entry:
2688 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2689 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2690 // CHECK10-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2691 // CHECK10-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2692 // CHECK10-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2693 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2694 // CHECK10-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2695 // CHECK10-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2696 // CHECK10-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2697 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2698 // CHECK10-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
2699 // CHECK10-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
2700 // CHECK10-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2701 // CHECK10:       omp_if.then:
2702 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
2703 // CHECK10-NEXT:    br label [[OMP_IF_END:%.*]]
2704 // CHECK10:       omp_if.else:
2705 // CHECK10-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2706 // CHECK10-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2707 // CHECK10-NEXT:    call void @.omp_outlined..3(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR2]]
2708 // CHECK10-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2709 // CHECK10-NEXT:    br label [[OMP_IF_END]]
2710 // CHECK10:       omp_if.end:
2711 // CHECK10-NEXT:    ret void
2712 //
2713 //
2714 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
2715 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
2716 // CHECK10-NEXT:  entry:
2717 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2718 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2719 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2720 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2721 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2722 // CHECK10-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2723 // CHECK10-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2724 // CHECK10-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2725 // CHECK10-NEXT:    store double 2.500000e+00, double* [[A]], align 8
2726 // CHECK10-NEXT:    ret void
2727 //
2728 //
2729 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
2730 // CHECK10-SAME: (i64 [[A:%.*]]) #[[ATTR0]] {
2731 // CHECK10-NEXT:  entry:
2732 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2733 // CHECK10-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2734 // CHECK10-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2735 // CHECK10-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2736 // CHECK10-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2737 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2738 // CHECK10-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2739 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2740 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
2741 // CHECK10-NEXT:    [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
2742 // CHECK10-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
2743 // CHECK10-NEXT:    [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
2744 // CHECK10-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2745 // CHECK10-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2746 // CHECK10-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]]) #[[ATTR2]]
2747 // CHECK10-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2748 // CHECK10-NEXT:    ret void
2749 //
2750 //
2751 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4
2752 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR1]] {
2753 // CHECK10-NEXT:  entry:
2754 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2755 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2756 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2757 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2758 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2759 // CHECK10-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2760 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2761 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
2762 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
2763 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
2764 // CHECK10-NEXT:    ret void
2765 //
2766 //
2767 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
2768 // CHECK10-SAME: (i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
2769 // CHECK10-NEXT:  entry:
2770 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2771 // CHECK10-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2772 // CHECK10-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2773 // CHECK10-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
2774 // CHECK10-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2775 // CHECK10-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2776 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2777 // CHECK10-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
2778 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
2779 // CHECK10-NEXT:    [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
2780 // CHECK10-NEXT:    store i32 [[TMP0]], i32* [[CONV2]], align 4
2781 // CHECK10-NEXT:    [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
2782 // CHECK10-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
2783 // CHECK10-NEXT:    [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i16*
2784 // CHECK10-NEXT:    store i16 [[TMP2]], i16* [[CONV3]], align 2
2785 // CHECK10-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
2786 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
2787 // CHECK10-NEXT:    ret void
2788 //
2789 //
2790 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5
2791 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
2792 // CHECK10-NEXT:  entry:
2793 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2794 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2795 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2796 // CHECK10-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2797 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2798 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2799 // CHECK10-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2800 // CHECK10-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2801 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2802 // CHECK10-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
2803 // CHECK10-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
2804 // CHECK10-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
2805 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
2806 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
2807 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
2808 // CHECK10-NEXT:    ret void
2809 //
2810 //
2811 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
2812 // CHECK11-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
2813 // CHECK11-NEXT:  entry:
2814 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2815 // CHECK11-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2816 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2817 // CHECK11-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2818 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
2819 // CHECK11-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2820 // CHECK11-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2821 // CHECK11-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 4
2822 // CHECK11-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
2823 // CHECK11-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2824 // CHECK11:       omp_if.then:
2825 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
2826 // CHECK11-NEXT:    br label [[OMP_IF_END:%.*]]
2827 // CHECK11:       omp_if.else:
2828 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2829 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2830 // CHECK11-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR2:[0-9]+]]
2831 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2832 // CHECK11-NEXT:    br label [[OMP_IF_END]]
2833 // CHECK11:       omp_if.end:
2834 // CHECK11-NEXT:    ret void
2835 //
2836 //
2837 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
2838 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
2839 // CHECK11-NEXT:  entry:
2840 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2841 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2842 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2843 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2844 // CHECK11-NEXT:    ret void
2845 //
2846 //
2847 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
2848 // CHECK11-SAME: () #[[ATTR0]] {
2849 // CHECK11-NEXT:  entry:
2850 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
2851 // CHECK11-NEXT:    ret void
2852 //
2853 //
2854 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
2855 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2856 // CHECK11-NEXT:  entry:
2857 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2858 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2859 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2860 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2861 // CHECK11-NEXT:    ret void
2862 //
2863 //
2864 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
2865 // CHECK11-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2866 // CHECK11-NEXT:  entry:
2867 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2868 // CHECK11-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2869 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2870 // CHECK11-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
2871 // CHECK11-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2872 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2873 // CHECK11-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2874 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2875 // CHECK11-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2876 // CHECK11-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2877 // CHECK11-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2878 // CHECK11-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2879 // CHECK11-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2880 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B_ADDR]], align 4
2881 // CHECK11-NEXT:    store i32 [[TMP2]], i32* [[B_CASTED]], align 4
2882 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
2883 // CHECK11-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV]], align 4
2884 // CHECK11-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
2885 // CHECK11-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2886 // CHECK11:       omp_if.then:
2887 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP3]])
2888 // CHECK11-NEXT:    br label [[OMP_IF_END:%.*]]
2889 // CHECK11:       omp_if.else:
2890 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2891 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2892 // CHECK11-NEXT:    call void @.omp_outlined..2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i32 [[TMP3]]) #[[ATTR2]]
2893 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2894 // CHECK11-NEXT:    br label [[OMP_IF_END]]
2895 // CHECK11:       omp_if.end:
2896 // CHECK11-NEXT:    ret void
2897 //
2898 //
2899 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
2900 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
2901 // CHECK11-NEXT:  entry:
2902 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2903 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2904 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2905 // CHECK11-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2906 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2907 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2908 // CHECK11-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2909 // CHECK11-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2910 // CHECK11-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2911 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
2912 // CHECK11-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
2913 // CHECK11-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
2914 // CHECK11-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2915 // CHECK11-NEXT:    store double [[ADD]], double* [[A]], align 4
2916 // CHECK11-NEXT:    ret void
2917 //
2918 //
2919 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
2920 // CHECK11-SAME: (%struct.S1* [[THIS:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2921 // CHECK11-NEXT:  entry:
2922 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2923 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2924 // CHECK11-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2925 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2926 // CHECK11-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2927 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2928 // CHECK11-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2929 // CHECK11-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2930 // CHECK11-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2931 // CHECK11-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2932 // CHECK11-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 4
2933 // CHECK11-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
2934 // CHECK11-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2935 // CHECK11:       omp_if.then:
2936 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
2937 // CHECK11-NEXT:    br label [[OMP_IF_END:%.*]]
2938 // CHECK11:       omp_if.else:
2939 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2940 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2941 // CHECK11-NEXT:    call void @.omp_outlined..3(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR2]]
2942 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2943 // CHECK11-NEXT:    br label [[OMP_IF_END]]
2944 // CHECK11:       omp_if.end:
2945 // CHECK11-NEXT:    ret void
2946 //
2947 //
2948 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
2949 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
2950 // CHECK11-NEXT:  entry:
2951 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2952 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2953 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2954 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2955 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2956 // CHECK11-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2957 // CHECK11-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2958 // CHECK11-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2959 // CHECK11-NEXT:    store double 2.500000e+00, double* [[A]], align 4
2960 // CHECK11-NEXT:    ret void
2961 //
2962 //
2963 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
2964 // CHECK11-SAME: (i32 [[A:%.*]]) #[[ATTR0]] {
2965 // CHECK11-NEXT:  entry:
2966 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2967 // CHECK11-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
2968 // CHECK11-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2969 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2970 // CHECK11-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2971 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2972 // CHECK11-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2973 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
2974 // CHECK11-NEXT:    store i32 [[TMP1]], i32* [[A_CASTED]], align 4
2975 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
2976 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2977 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
2978 // CHECK11-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i32 [[TMP2]]) #[[ATTR2]]
2979 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2980 // CHECK11-NEXT:    ret void
2981 //
2982 //
2983 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4
2984 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]]) #[[ATTR1]] {
2985 // CHECK11-NEXT:  entry:
2986 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2987 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2988 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2989 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2990 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2991 // CHECK11-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2992 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2993 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
2994 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
2995 // CHECK11-NEXT:    ret void
2996 //
2997 //
2998 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
2999 // CHECK11-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
3000 // CHECK11-NEXT:  entry:
3001 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3002 // CHECK11-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
3003 // CHECK11-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
3004 // CHECK11-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
3005 // CHECK11-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
3006 // CHECK11-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
3007 // CHECK11-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
3008 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3009 // CHECK11-NEXT:    store i32 [[TMP0]], i32* [[A_CASTED]], align 4
3010 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
3011 // CHECK11-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
3012 // CHECK11-NEXT:    [[CONV1:%.*]] = bitcast i32* [[B_CASTED]] to i16*
3013 // CHECK11-NEXT:    store i16 [[TMP2]], i16* [[CONV1]], align 2
3014 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
3015 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
3016 // CHECK11-NEXT:    ret void
3017 //
3018 //
3019 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5
3020 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
3021 // CHECK11-NEXT:  entry:
3022 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3023 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3024 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3025 // CHECK11-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
3026 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3027 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3028 // CHECK11-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
3029 // CHECK11-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
3030 // CHECK11-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
3031 // CHECK11-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
3032 // CHECK11-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
3033 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
3034 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
3035 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
3036 // CHECK11-NEXT:    ret void
3037 //
3038 //
3039 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
3040 // CHECK12-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
3041 // CHECK12-NEXT:  entry:
3042 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
3043 // CHECK12-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3044 // CHECK12-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3045 // CHECK12-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3046 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
3047 // CHECK12-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
3048 // CHECK12-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3049 // CHECK12-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 4
3050 // CHECK12-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
3051 // CHECK12-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3052 // CHECK12:       omp_if.then:
3053 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
3054 // CHECK12-NEXT:    br label [[OMP_IF_END:%.*]]
3055 // CHECK12:       omp_if.else:
3056 // CHECK12-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3057 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
3058 // CHECK12-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR2:[0-9]+]]
3059 // CHECK12-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3060 // CHECK12-NEXT:    br label [[OMP_IF_END]]
3061 // CHECK12:       omp_if.end:
3062 // CHECK12-NEXT:    ret void
3063 //
3064 //
3065 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
3066 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
3067 // CHECK12-NEXT:  entry:
3068 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3069 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3070 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3071 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3072 // CHECK12-NEXT:    ret void
3073 //
3074 //
3075 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
3076 // CHECK12-SAME: () #[[ATTR0]] {
3077 // CHECK12-NEXT:  entry:
3078 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
3079 // CHECK12-NEXT:    ret void
3080 //
3081 //
3082 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
3083 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3084 // CHECK12-NEXT:  entry:
3085 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3086 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3087 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3088 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3089 // CHECK12-NEXT:    ret void
3090 //
3091 //
3092 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
3093 // CHECK12-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
3094 // CHECK12-NEXT:  entry:
3095 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
3096 // CHECK12-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
3097 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
3098 // CHECK12-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
3099 // CHECK12-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3100 // CHECK12-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3101 // CHECK12-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3102 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3103 // CHECK12-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
3104 // CHECK12-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
3105 // CHECK12-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
3106 // CHECK12-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
3107 // CHECK12-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3108 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B_ADDR]], align 4
3109 // CHECK12-NEXT:    store i32 [[TMP2]], i32* [[B_CASTED]], align 4
3110 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
3111 // CHECK12-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV]], align 4
3112 // CHECK12-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
3113 // CHECK12-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3114 // CHECK12:       omp_if.then:
3115 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP3]])
3116 // CHECK12-NEXT:    br label [[OMP_IF_END:%.*]]
3117 // CHECK12:       omp_if.else:
3118 // CHECK12-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3119 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
3120 // CHECK12-NEXT:    call void @.omp_outlined..2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i32 [[TMP3]]) #[[ATTR2]]
3121 // CHECK12-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3122 // CHECK12-NEXT:    br label [[OMP_IF_END]]
3123 // CHECK12:       omp_if.end:
3124 // CHECK12-NEXT:    ret void
3125 //
3126 //
3127 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2
3128 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
3129 // CHECK12-NEXT:  entry:
3130 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3131 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3132 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
3133 // CHECK12-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
3134 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3135 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3136 // CHECK12-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
3137 // CHECK12-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
3138 // CHECK12-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
3139 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
3140 // CHECK12-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
3141 // CHECK12-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
3142 // CHECK12-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
3143 // CHECK12-NEXT:    store double [[ADD]], double* [[A]], align 4
3144 // CHECK12-NEXT:    ret void
3145 //
3146 //
3147 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
3148 // CHECK12-SAME: (%struct.S1* [[THIS:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
3149 // CHECK12-NEXT:  entry:
3150 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
3151 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
3152 // CHECK12-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3153 // CHECK12-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3154 // CHECK12-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3155 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3156 // CHECK12-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
3157 // CHECK12-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
3158 // CHECK12-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
3159 // CHECK12-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3160 // CHECK12-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 4
3161 // CHECK12-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
3162 // CHECK12-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3163 // CHECK12:       omp_if.then:
3164 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
3165 // CHECK12-NEXT:    br label [[OMP_IF_END:%.*]]
3166 // CHECK12:       omp_if.else:
3167 // CHECK12-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3168 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
3169 // CHECK12-NEXT:    call void @.omp_outlined..3(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR2]]
3170 // CHECK12-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3171 // CHECK12-NEXT:    br label [[OMP_IF_END]]
3172 // CHECK12:       omp_if.end:
3173 // CHECK12-NEXT:    ret void
3174 //
3175 //
3176 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3
3177 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
3178 // CHECK12-NEXT:  entry:
3179 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3180 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3181 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
3182 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3183 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3184 // CHECK12-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
3185 // CHECK12-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
3186 // CHECK12-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
3187 // CHECK12-NEXT:    store double 2.500000e+00, double* [[A]], align 4
3188 // CHECK12-NEXT:    ret void
3189 //
3190 //
3191 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
3192 // CHECK12-SAME: (i32 [[A:%.*]]) #[[ATTR0]] {
3193 // CHECK12-NEXT:  entry:
3194 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3195 // CHECK12-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
3196 // CHECK12-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3197 // CHECK12-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3198 // CHECK12-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3199 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3200 // CHECK12-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
3201 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
3202 // CHECK12-NEXT:    store i32 [[TMP1]], i32* [[A_CASTED]], align 4
3203 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
3204 // CHECK12-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3205 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
3206 // CHECK12-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i32 [[TMP2]]) #[[ATTR2]]
3207 // CHECK12-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3208 // CHECK12-NEXT:    ret void
3209 //
3210 //
3211 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..4
3212 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]]) #[[ATTR1]] {
3213 // CHECK12-NEXT:  entry:
3214 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3215 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3216 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3217 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3218 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3219 // CHECK12-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
3220 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3221 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
3222 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
3223 // CHECK12-NEXT:    ret void
3224 //
3225 //
3226 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
3227 // CHECK12-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
3228 // CHECK12-NEXT:  entry:
3229 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3230 // CHECK12-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
3231 // CHECK12-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
3232 // CHECK12-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
3233 // CHECK12-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
3234 // CHECK12-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
3235 // CHECK12-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
3236 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3237 // CHECK12-NEXT:    store i32 [[TMP0]], i32* [[A_CASTED]], align 4
3238 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
3239 // CHECK12-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
3240 // CHECK12-NEXT:    [[CONV1:%.*]] = bitcast i32* [[B_CASTED]] to i16*
3241 // CHECK12-NEXT:    store i16 [[TMP2]], i16* [[CONV1]], align 2
3242 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
3243 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
3244 // CHECK12-NEXT:    ret void
3245 //
3246 //
3247 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..5
3248 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
3249 // CHECK12-NEXT:  entry:
3250 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3251 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3252 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3253 // CHECK12-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
3254 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3255 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3256 // CHECK12-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
3257 // CHECK12-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
3258 // CHECK12-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
3259 // CHECK12-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
3260 // CHECK12-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
3261 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
3262 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
3263 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
3264 // CHECK12-NEXT:    ret void
3265 //
3266 //
3267 // CHECK17-LABEL: define {{[^@]+}}@_Z3bari
3268 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
3269 // CHECK17-NEXT:  entry:
3270 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3271 // CHECK17-NEXT:    [[A:%.*]] = alloca i32, align 4
3272 // CHECK17-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8
3273 // CHECK17-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3274 // CHECK17-NEXT:    store i32 0, i32* [[A]], align 4
3275 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3276 // CHECK17-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP0]])
3277 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
3278 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
3279 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
3280 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
3281 // CHECK17-NEXT:    [[CALL1:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP2]])
3282 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
3283 // CHECK17-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
3284 // CHECK17-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
3285 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
3286 // CHECK17-NEXT:    [[CALL3:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP4]])
3287 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
3288 // CHECK17-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
3289 // CHECK17-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
3290 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
3291 // CHECK17-NEXT:    ret i32 [[TMP6]]
3292 //
3293 //
3294 // CHECK17-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
3295 // CHECK17-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 {
3296 // CHECK17-NEXT:  entry:
3297 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3298 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3299 // CHECK17-NEXT:    [[B:%.*]] = alloca i32, align 4
3300 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3301 // CHECK17-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
3302 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3303 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
3304 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
3305 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
3306 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i8, align 1
3307 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED9:%.*]] = alloca i64, align 8
3308 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS14:%.*]] = alloca [2 x i8*], align 8
3309 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS15:%.*]] = alloca [2 x i8*], align 8
3310 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS16:%.*]] = alloca [2 x i8*], align 8
3311 // CHECK17-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3312 // CHECK17-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3313 // CHECK17-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3314 // CHECK17-NEXT:    store i32 1, i32* [[B]], align 4
3315 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3316 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 3
3317 // CHECK17-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
3318 // CHECK17-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3319 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
3320 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32*
3321 // CHECK17-NEXT:    store i32 [[TMP1]], i32* [[CONV]], align 4
3322 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[B_CASTED]], align 8
3323 // CHECK17-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3324 // CHECK17-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1
3325 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3326 // CHECK17-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL]] to i8
3327 // CHECK17-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
3328 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3329 // CHECK17-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
3330 // CHECK17-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3331 // CHECK17-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to %struct.S1**
3332 // CHECK17-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP6]], align 8
3333 // CHECK17-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3334 // CHECK17-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to double**
3335 // CHECK17-NEXT:    store double* [[A]], double** [[TMP8]], align 8
3336 // CHECK17-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3337 // CHECK17-NEXT:    store i8* null, i8** [[TMP9]], align 8
3338 // CHECK17-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3339 // CHECK17-NEXT:    [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
3340 // CHECK17-NEXT:    store i64 [[TMP2]], i64* [[TMP11]], align 8
3341 // CHECK17-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3342 // CHECK17-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
3343 // CHECK17-NEXT:    store i64 [[TMP2]], i64* [[TMP13]], align 8
3344 // CHECK17-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
3345 // CHECK17-NEXT:    store i8* null, i8** [[TMP14]], align 8
3346 // CHECK17-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3347 // CHECK17-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
3348 // CHECK17-NEXT:    store i64 [[TMP4]], i64* [[TMP16]], align 8
3349 // CHECK17-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3350 // CHECK17-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
3351 // CHECK17-NEXT:    store i64 [[TMP4]], i64* [[TMP18]], align 8
3352 // CHECK17-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
3353 // CHECK17-NEXT:    store i8* null, i8** [[TMP19]], align 8
3354 // CHECK17-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3355 // CHECK17-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3356 // CHECK17-NEXT:    [[TMP22:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3357 // CHECK17-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP22]] to i1
3358 // CHECK17-NEXT:    [[TMP23:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
3359 // CHECK17-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP23]])
3360 // CHECK17-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
3361 // CHECK17-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3362 // CHECK17:       omp_offload.failed:
3363 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i64 [[TMP2]], i64 [[TMP4]]) #[[ATTR3:[0-9]+]]
3364 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3365 // CHECK17:       omp_offload.cont:
3366 // CHECK17-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
3367 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP26]], 5
3368 // CHECK17-NEXT:    [[FROMBOOL7:%.*]] = zext i1 [[CMP6]] to i8
3369 // CHECK17-NEXT:    store i8 [[FROMBOOL7]], i8* [[DOTCAPTURE_EXPR_5]], align 1
3370 // CHECK17-NEXT:    [[TMP27:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_5]], align 1
3371 // CHECK17-NEXT:    [[TOBOOL8:%.*]] = trunc i8 [[TMP27]] to i1
3372 // CHECK17-NEXT:    [[CONV10:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED9]] to i8*
3373 // CHECK17-NEXT:    [[FROMBOOL11:%.*]] = zext i1 [[TOBOOL8]] to i8
3374 // CHECK17-NEXT:    store i8 [[FROMBOOL11]], i8* [[CONV10]], align 1
3375 // CHECK17-NEXT:    [[TMP28:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED9]], align 8
3376 // CHECK17-NEXT:    [[TMP29:%.*]] = load i32, i32* [[N_ADDR]], align 4
3377 // CHECK17-NEXT:    [[CMP12:%.*]] = icmp sgt i32 [[TMP29]], 4
3378 // CHECK17-NEXT:    br i1 [[CMP12]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3379 // CHECK17:       omp_if.then:
3380 // CHECK17-NEXT:    [[A13:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
3381 // CHECK17-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS14]], i32 0, i32 0
3382 // CHECK17-NEXT:    [[TMP31:%.*]] = bitcast i8** [[TMP30]] to %struct.S1**
3383 // CHECK17-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP31]], align 8
3384 // CHECK17-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS15]], i32 0, i32 0
3385 // CHECK17-NEXT:    [[TMP33:%.*]] = bitcast i8** [[TMP32]] to double**
3386 // CHECK17-NEXT:    store double* [[A13]], double** [[TMP33]], align 8
3387 // CHECK17-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS16]], i64 0, i64 0
3388 // CHECK17-NEXT:    store i8* null, i8** [[TMP34]], align 8
3389 // CHECK17-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS14]], i32 0, i32 1
3390 // CHECK17-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i64*
3391 // CHECK17-NEXT:    store i64 [[TMP28]], i64* [[TMP36]], align 8
3392 // CHECK17-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS15]], i32 0, i32 1
3393 // CHECK17-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i64*
3394 // CHECK17-NEXT:    store i64 [[TMP28]], i64* [[TMP38]], align 8
3395 // CHECK17-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS16]], i64 0, i64 1
3396 // CHECK17-NEXT:    store i8* null, i8** [[TMP39]], align 8
3397 // CHECK17-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS14]], i32 0, i32 0
3398 // CHECK17-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS15]], i32 0, i32 0
3399 // CHECK17-NEXT:    [[TMP42:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_5]], align 1
3400 // CHECK17-NEXT:    [[TOBOOL17:%.*]] = trunc i8 [[TMP42]] to i1
3401 // CHECK17-NEXT:    [[TMP43:%.*]] = select i1 [[TOBOOL17]], i32 0, i32 1
3402 // CHECK17-NEXT:    [[TMP44:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 2, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP43]])
3403 // CHECK17-NEXT:    [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
3404 // CHECK17-NEXT:    br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED18:%.*]], label [[OMP_OFFLOAD_CONT19:%.*]]
3405 // CHECK17:       omp_offload.failed18:
3406 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i64 [[TMP28]]) #[[ATTR3]]
3407 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT19]]
3408 // CHECK17:       omp_offload.cont19:
3409 // CHECK17-NEXT:    br label [[OMP_IF_END:%.*]]
3410 // CHECK17:       omp_if.else:
3411 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i64 [[TMP28]]) #[[ATTR3]]
3412 // CHECK17-NEXT:    br label [[OMP_IF_END]]
3413 // CHECK17:       omp_if.end:
3414 // CHECK17-NEXT:    [[A20:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
3415 // CHECK17-NEXT:    [[TMP46:%.*]] = load double, double* [[A20]], align 8
3416 // CHECK17-NEXT:    [[CONV21:%.*]] = fptosi double [[TMP46]] to i32
3417 // CHECK17-NEXT:    ret i32 [[CONV21]]
3418 //
3419 //
3420 // CHECK17-LABEL: define {{[^@]+}}@_ZL7fstatici
3421 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
3422 // CHECK17-NEXT:  entry:
3423 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3424 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3425 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3426 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3427 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3428 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3429 // CHECK17-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3430 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3431 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 1
3432 // CHECK17-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
3433 // CHECK17-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3434 // CHECK17-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3435 // CHECK17-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
3436 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3437 // CHECK17-NEXT:    [[FROMBOOL1:%.*]] = zext i1 [[TOBOOL]] to i8
3438 // CHECK17-NEXT:    store i8 [[FROMBOOL1]], i8* [[CONV]], align 1
3439 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3440 // CHECK17-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3441 // CHECK17-NEXT:    [[TOBOOL2:%.*]] = trunc i8 [[TMP3]] to i1
3442 // CHECK17-NEXT:    br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3443 // CHECK17:       omp_if.then:
3444 // CHECK17-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3445 // CHECK17-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
3446 // CHECK17-NEXT:    store i64 [[TMP2]], i64* [[TMP5]], align 8
3447 // CHECK17-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3448 // CHECK17-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
3449 // CHECK17-NEXT:    store i64 [[TMP2]], i64* [[TMP7]], align 8
3450 // CHECK17-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3451 // CHECK17-NEXT:    store i8* null, i8** [[TMP8]], align 8
3452 // CHECK17-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3453 // CHECK17-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3454 // CHECK17-NEXT:    [[TMP11:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3455 // CHECK17-NEXT:    [[TOBOOL3:%.*]] = trunc i8 [[TMP11]] to i1
3456 // CHECK17-NEXT:    [[TMP12:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
3457 // CHECK17-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP9]], i8** [[TMP10]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP12]])
3458 // CHECK17-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3459 // CHECK17-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3460 // CHECK17:       omp_offload.failed:
3461 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR3]]
3462 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3463 // CHECK17:       omp_offload.cont:
3464 // CHECK17-NEXT:    br label [[OMP_IF_END:%.*]]
3465 // CHECK17:       omp_if.else:
3466 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR3]]
3467 // CHECK17-NEXT:    br label [[OMP_IF_END]]
3468 // CHECK17:       omp_if.end:
3469 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[N_ADDR]], align 4
3470 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP15]], 2
3471 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[SUB]], 2
3472 // CHECK17-NEXT:    br i1 [[CMP4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE8:%.*]]
3473 // CHECK17:       omp_if.then5:
3474 // CHECK17-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0)
3475 // CHECK17-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3476 // CHECK17-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
3477 // CHECK17:       omp_offload.failed6:
3478 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
3479 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
3480 // CHECK17:       omp_offload.cont7:
3481 // CHECK17-NEXT:    br label [[OMP_IF_END9:%.*]]
3482 // CHECK17:       omp_if.else8:
3483 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
3484 // CHECK17-NEXT:    br label [[OMP_IF_END9]]
3485 // CHECK17:       omp_if.end9:
3486 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
3487 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
3488 // CHECK17-NEXT:    ret i32 [[ADD]]
3489 //
3490 //
3491 // CHECK17-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
3492 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat {
3493 // CHECK17-NEXT:  entry:
3494 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3495 // CHECK17-NEXT:    [[A:%.*]] = alloca i32, align 4
3496 // CHECK17-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
3497 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3498 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3499 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3500 // CHECK17-NEXT:    [[B:%.*]] = alloca i16, align 2
3501 // CHECK17-NEXT:    [[A_CASTED1:%.*]] = alloca i64, align 8
3502 // CHECK17-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
3503 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [2 x i8*], align 8
3504 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [2 x i8*], align 8
3505 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [2 x i8*], align 8
3506 // CHECK17-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3507 // CHECK17-NEXT:    store i32 0, i32* [[A]], align 4
3508 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A]], align 4
3509 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32*
3510 // CHECK17-NEXT:    store i32 [[TMP0]], i32* [[CONV]], align 4
3511 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
3512 // CHECK17-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3513 // CHECK17-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
3514 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP3]], align 8
3515 // CHECK17-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3516 // CHECK17-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
3517 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP5]], align 8
3518 // CHECK17-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3519 // CHECK17-NEXT:    store i8* null, i8** [[TMP6]], align 8
3520 // CHECK17-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3521 // CHECK17-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3522 // CHECK17-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.9, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 1)
3523 // CHECK17-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
3524 // CHECK17-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3525 // CHECK17:       omp_offload.failed:
3526 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87(i64 [[TMP1]]) #[[ATTR3]]
3527 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3528 // CHECK17:       omp_offload.cont:
3529 // CHECK17-NEXT:    store i16 1, i16* [[B]], align 2
3530 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[A]], align 4
3531 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[A_CASTED1]] to i32*
3532 // CHECK17-NEXT:    store i32 [[TMP11]], i32* [[CONV2]], align 4
3533 // CHECK17-NEXT:    [[TMP12:%.*]] = load i64, i64* [[A_CASTED1]], align 8
3534 // CHECK17-NEXT:    [[TMP13:%.*]] = load i16, i16* [[B]], align 2
3535 // CHECK17-NEXT:    [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i16*
3536 // CHECK17-NEXT:    store i16 [[TMP13]], i16* [[CONV3]], align 2
3537 // CHECK17-NEXT:    [[TMP14:%.*]] = load i64, i64* [[B_CASTED]], align 8
3538 // CHECK17-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
3539 // CHECK17-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
3540 // CHECK17-NEXT:    store i64 [[TMP12]], i64* [[TMP16]], align 8
3541 // CHECK17-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
3542 // CHECK17-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
3543 // CHECK17-NEXT:    store i64 [[TMP12]], i64* [[TMP18]], align 8
3544 // CHECK17-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
3545 // CHECK17-NEXT:    store i8* null, i8** [[TMP19]], align 8
3546 // CHECK17-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
3547 // CHECK17-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
3548 // CHECK17-NEXT:    store i64 [[TMP14]], i64* [[TMP21]], align 8
3549 // CHECK17-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
3550 // CHECK17-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
3551 // CHECK17-NEXT:    store i64 [[TMP14]], i64* [[TMP23]], align 8
3552 // CHECK17-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1
3553 // CHECK17-NEXT:    store i8* null, i8** [[TMP24]], align 8
3554 // CHECK17-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
3555 // CHECK17-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
3556 // CHECK17-NEXT:    [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 2, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0)
3557 // CHECK17-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
3558 // CHECK17-NEXT:    br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
3559 // CHECK17:       omp_offload.failed7:
3560 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i64 [[TMP12]], i64 [[TMP14]]) #[[ATTR3]]
3561 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
3562 // CHECK17:       omp_offload.cont8:
3563 // CHECK17-NEXT:    [[TMP29:%.*]] = load i32, i32* [[A]], align 4
3564 // CHECK17-NEXT:    ret i32 [[TMP29]]
3565 //
3566 //
3567 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
3568 // CHECK17-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
3569 // CHECK17-NEXT:  entry:
3570 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3571 // CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
3572 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3573 // CHECK17-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
3574 // CHECK17-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3575 // CHECK17-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3576 // CHECK17-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3577 // CHECK17-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3578 // CHECK17-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3579 // CHECK17-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
3580 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3581 // CHECK17-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3582 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
3583 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3584 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
3585 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
3586 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
3587 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
3588 // CHECK17-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV1]], align 8
3589 // CHECK17-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
3590 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3591 // CHECK17:       omp_if.then:
3592 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP3]])
3593 // CHECK17-NEXT:    br label [[OMP_IF_END:%.*]]
3594 // CHECK17:       omp_if.else:
3595 // CHECK17-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3596 // CHECK17-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
3597 // CHECK17-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i64 [[TMP3]]) #[[ATTR3]]
3598 // CHECK17-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3599 // CHECK17-NEXT:    br label [[OMP_IF_END]]
3600 // CHECK17:       omp_if.end:
3601 // CHECK17-NEXT:    ret void
3602 //
3603 //
3604 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
3605 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR2:[0-9]+]] {
3606 // CHECK17-NEXT:  entry:
3607 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3608 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3609 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3610 // CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
3611 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3612 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3613 // CHECK17-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3614 // CHECK17-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
3615 // CHECK17-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3616 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
3617 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3618 // CHECK17-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
3619 // CHECK17-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
3620 // CHECK17-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
3621 // CHECK17-NEXT:    store double [[ADD]], double* [[A]], align 8
3622 // CHECK17-NEXT:    ret void
3623 //
3624 //
3625 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
3626 // CHECK17-SAME: (%struct.S1* [[THIS:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3627 // CHECK17-NEXT:  entry:
3628 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3629 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3630 // CHECK17-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3631 // CHECK17-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3632 // CHECK17-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3633 // CHECK17-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3634 // CHECK17-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3635 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3636 // CHECK17-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3637 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3638 // CHECK17-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
3639 // CHECK17-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
3640 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3641 // CHECK17:       omp_if.then:
3642 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
3643 // CHECK17-NEXT:    br label [[OMP_IF_END:%.*]]
3644 // CHECK17:       omp_if.else:
3645 // CHECK17-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3646 // CHECK17-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
3647 // CHECK17-NEXT:    call void @.omp_outlined..1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR3]]
3648 // CHECK17-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3649 // CHECK17-NEXT:    br label [[OMP_IF_END]]
3650 // CHECK17:       omp_if.end:
3651 // CHECK17-NEXT:    ret void
3652 //
3653 //
3654 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1
3655 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR2]] {
3656 // CHECK17-NEXT:  entry:
3657 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3658 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3659 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3660 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3661 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3662 // CHECK17-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3663 // CHECK17-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3664 // CHECK17-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
3665 // CHECK17-NEXT:    store double 2.500000e+00, double* [[A]], align 8
3666 // CHECK17-NEXT:    ret void
3667 //
3668 //
3669 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
3670 // CHECK17-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3671 // CHECK17-NEXT:  entry:
3672 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3673 // CHECK17-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3674 // CHECK17-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3675 // CHECK17-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3676 // CHECK17-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3677 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3678 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3679 // CHECK17-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 8
3680 // CHECK17-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
3681 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3682 // CHECK17:       omp_if.then:
3683 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
3684 // CHECK17-NEXT:    br label [[OMP_IF_END:%.*]]
3685 // CHECK17:       omp_if.else:
3686 // CHECK17-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3687 // CHECK17-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
3688 // CHECK17-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR3]]
3689 // CHECK17-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3690 // CHECK17-NEXT:    br label [[OMP_IF_END]]
3691 // CHECK17:       omp_if.end:
3692 // CHECK17-NEXT:    ret void
3693 //
3694 //
3695 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..4
3696 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
3697 // CHECK17-NEXT:  entry:
3698 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3699 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3700 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3701 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3702 // CHECK17-NEXT:    ret void
3703 //
3704 //
3705 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
3706 // CHECK17-SAME: () #[[ATTR1]] {
3707 // CHECK17-NEXT:  entry:
3708 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
3709 // CHECK17-NEXT:    ret void
3710 //
3711 //
3712 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..7
3713 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
3714 // CHECK17-NEXT:  entry:
3715 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3716 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3717 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3718 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3719 // CHECK17-NEXT:    ret void
3720 //
3721 //
3722 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
3723 // CHECK17-SAME: (i64 [[A:%.*]]) #[[ATTR1]] {
3724 // CHECK17-NEXT:  entry:
3725 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3726 // CHECK17-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
3727 // CHECK17-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3728 // CHECK17-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3729 // CHECK17-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3730 // CHECK17-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3731 // CHECK17-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3732 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
3733 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3734 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
3735 // CHECK17-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
3736 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
3737 // CHECK17-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3738 // CHECK17-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
3739 // CHECK17-NEXT:    call void @.omp_outlined..8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]]) #[[ATTR3]]
3740 // CHECK17-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3741 // CHECK17-NEXT:    ret void
3742 //
3743 //
3744 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..8
3745 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR2]] {
3746 // CHECK17-NEXT:  entry:
3747 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3748 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3749 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3750 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3751 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3752 // CHECK17-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3753 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
3754 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
3755 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
3756 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
3757 // CHECK17-NEXT:    ret void
3758 //
3759 //
3760 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
3761 // CHECK17-SAME: (i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
3762 // CHECK17-NEXT:  entry:
3763 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3764 // CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
3765 // CHECK17-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
3766 // CHECK17-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
3767 // CHECK17-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3768 // CHECK17-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
3769 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
3770 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
3771 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
3772 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
3773 // CHECK17-NEXT:    store i32 [[TMP0]], i32* [[CONV2]], align 4
3774 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
3775 // CHECK17-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
3776 // CHECK17-NEXT:    [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i16*
3777 // CHECK17-NEXT:    store i16 [[TMP2]], i16* [[CONV3]], align 2
3778 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
3779 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
3780 // CHECK17-NEXT:    ret void
3781 //
3782 //
3783 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11
3784 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR2]] {
3785 // CHECK17-NEXT:  entry:
3786 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3787 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3788 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3789 // CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
3790 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3791 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3792 // CHECK17-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3793 // CHECK17-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
3794 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
3795 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
3796 // CHECK17-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
3797 // CHECK17-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
3798 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3799 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
3800 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
3801 // CHECK17-NEXT:    ret void
3802 //
3803 //
3804 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3805 // CHECK17-SAME: () #[[ATTR4:[0-9]+]] {
3806 // CHECK17-NEXT:  entry:
3807 // CHECK17-NEXT:    call void @__tgt_register_requires(i64 1)
3808 // CHECK17-NEXT:    ret void
3809 //
3810 //
3811 // CHECK18-LABEL: define {{[^@]+}}@_Z3bari
3812 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
3813 // CHECK18-NEXT:  entry:
3814 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3815 // CHECK18-NEXT:    [[A:%.*]] = alloca i32, align 4
3816 // CHECK18-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8
3817 // CHECK18-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3818 // CHECK18-NEXT:    store i32 0, i32* [[A]], align 4
3819 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3820 // CHECK18-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP0]])
3821 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
3822 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
3823 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
3824 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
3825 // CHECK18-NEXT:    [[CALL1:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP2]])
3826 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
3827 // CHECK18-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
3828 // CHECK18-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
3829 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
3830 // CHECK18-NEXT:    [[CALL3:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP4]])
3831 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
3832 // CHECK18-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
3833 // CHECK18-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
3834 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
3835 // CHECK18-NEXT:    ret i32 [[TMP6]]
3836 //
3837 //
3838 // CHECK18-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
3839 // CHECK18-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 {
3840 // CHECK18-NEXT:  entry:
3841 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3842 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3843 // CHECK18-NEXT:    [[B:%.*]] = alloca i32, align 4
3844 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3845 // CHECK18-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
3846 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3847 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
3848 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
3849 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
3850 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i8, align 1
3851 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED9:%.*]] = alloca i64, align 8
3852 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS14:%.*]] = alloca [2 x i8*], align 8
3853 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS15:%.*]] = alloca [2 x i8*], align 8
3854 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS16:%.*]] = alloca [2 x i8*], align 8
3855 // CHECK18-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3856 // CHECK18-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3857 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3858 // CHECK18-NEXT:    store i32 1, i32* [[B]], align 4
3859 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3860 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 3
3861 // CHECK18-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
3862 // CHECK18-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3863 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
3864 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32*
3865 // CHECK18-NEXT:    store i32 [[TMP1]], i32* [[CONV]], align 4
3866 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[B_CASTED]], align 8
3867 // CHECK18-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3868 // CHECK18-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1
3869 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3870 // CHECK18-NEXT:    [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL]] to i8
3871 // CHECK18-NEXT:    store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
3872 // CHECK18-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3873 // CHECK18-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
3874 // CHECK18-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3875 // CHECK18-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to %struct.S1**
3876 // CHECK18-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP6]], align 8
3877 // CHECK18-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3878 // CHECK18-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to double**
3879 // CHECK18-NEXT:    store double* [[A]], double** [[TMP8]], align 8
3880 // CHECK18-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3881 // CHECK18-NEXT:    store i8* null, i8** [[TMP9]], align 8
3882 // CHECK18-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3883 // CHECK18-NEXT:    [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
3884 // CHECK18-NEXT:    store i64 [[TMP2]], i64* [[TMP11]], align 8
3885 // CHECK18-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3886 // CHECK18-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
3887 // CHECK18-NEXT:    store i64 [[TMP2]], i64* [[TMP13]], align 8
3888 // CHECK18-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
3889 // CHECK18-NEXT:    store i8* null, i8** [[TMP14]], align 8
3890 // CHECK18-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3891 // CHECK18-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
3892 // CHECK18-NEXT:    store i64 [[TMP4]], i64* [[TMP16]], align 8
3893 // CHECK18-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3894 // CHECK18-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
3895 // CHECK18-NEXT:    store i64 [[TMP4]], i64* [[TMP18]], align 8
3896 // CHECK18-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
3897 // CHECK18-NEXT:    store i8* null, i8** [[TMP19]], align 8
3898 // CHECK18-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3899 // CHECK18-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3900 // CHECK18-NEXT:    [[TMP22:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3901 // CHECK18-NEXT:    [[TOBOOL4:%.*]] = trunc i8 [[TMP22]] to i1
3902 // CHECK18-NEXT:    [[TMP23:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
3903 // CHECK18-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP23]])
3904 // CHECK18-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
3905 // CHECK18-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3906 // CHECK18:       omp_offload.failed:
3907 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i64 [[TMP2]], i64 [[TMP4]]) #[[ATTR3:[0-9]+]]
3908 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3909 // CHECK18:       omp_offload.cont:
3910 // CHECK18-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
3911 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP26]], 5
3912 // CHECK18-NEXT:    [[FROMBOOL7:%.*]] = zext i1 [[CMP6]] to i8
3913 // CHECK18-NEXT:    store i8 [[FROMBOOL7]], i8* [[DOTCAPTURE_EXPR_5]], align 1
3914 // CHECK18-NEXT:    [[TMP27:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_5]], align 1
3915 // CHECK18-NEXT:    [[TOBOOL8:%.*]] = trunc i8 [[TMP27]] to i1
3916 // CHECK18-NEXT:    [[CONV10:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED9]] to i8*
3917 // CHECK18-NEXT:    [[FROMBOOL11:%.*]] = zext i1 [[TOBOOL8]] to i8
3918 // CHECK18-NEXT:    store i8 [[FROMBOOL11]], i8* [[CONV10]], align 1
3919 // CHECK18-NEXT:    [[TMP28:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED9]], align 8
3920 // CHECK18-NEXT:    [[TMP29:%.*]] = load i32, i32* [[N_ADDR]], align 4
3921 // CHECK18-NEXT:    [[CMP12:%.*]] = icmp sgt i32 [[TMP29]], 4
3922 // CHECK18-NEXT:    br i1 [[CMP12]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3923 // CHECK18:       omp_if.then:
3924 // CHECK18-NEXT:    [[A13:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
3925 // CHECK18-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS14]], i32 0, i32 0
3926 // CHECK18-NEXT:    [[TMP31:%.*]] = bitcast i8** [[TMP30]] to %struct.S1**
3927 // CHECK18-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP31]], align 8
3928 // CHECK18-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS15]], i32 0, i32 0
3929 // CHECK18-NEXT:    [[TMP33:%.*]] = bitcast i8** [[TMP32]] to double**
3930 // CHECK18-NEXT:    store double* [[A13]], double** [[TMP33]], align 8
3931 // CHECK18-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS16]], i64 0, i64 0
3932 // CHECK18-NEXT:    store i8* null, i8** [[TMP34]], align 8
3933 // CHECK18-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS14]], i32 0, i32 1
3934 // CHECK18-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i64*
3935 // CHECK18-NEXT:    store i64 [[TMP28]], i64* [[TMP36]], align 8
3936 // CHECK18-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS15]], i32 0, i32 1
3937 // CHECK18-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i64*
3938 // CHECK18-NEXT:    store i64 [[TMP28]], i64* [[TMP38]], align 8
3939 // CHECK18-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS16]], i64 0, i64 1
3940 // CHECK18-NEXT:    store i8* null, i8** [[TMP39]], align 8
3941 // CHECK18-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS14]], i32 0, i32 0
3942 // CHECK18-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS15]], i32 0, i32 0
3943 // CHECK18-NEXT:    [[TMP42:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_5]], align 1
3944 // CHECK18-NEXT:    [[TOBOOL17:%.*]] = trunc i8 [[TMP42]] to i1
3945 // CHECK18-NEXT:    [[TMP43:%.*]] = select i1 [[TOBOOL17]], i32 0, i32 1
3946 // CHECK18-NEXT:    [[TMP44:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 2, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP43]])
3947 // CHECK18-NEXT:    [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
3948 // CHECK18-NEXT:    br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED18:%.*]], label [[OMP_OFFLOAD_CONT19:%.*]]
3949 // CHECK18:       omp_offload.failed18:
3950 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i64 [[TMP28]]) #[[ATTR3]]
3951 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT19]]
3952 // CHECK18:       omp_offload.cont19:
3953 // CHECK18-NEXT:    br label [[OMP_IF_END:%.*]]
3954 // CHECK18:       omp_if.else:
3955 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i64 [[TMP28]]) #[[ATTR3]]
3956 // CHECK18-NEXT:    br label [[OMP_IF_END]]
3957 // CHECK18:       omp_if.end:
3958 // CHECK18-NEXT:    [[A20:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
3959 // CHECK18-NEXT:    [[TMP46:%.*]] = load double, double* [[A20]], align 8
3960 // CHECK18-NEXT:    [[CONV21:%.*]] = fptosi double [[TMP46]] to i32
3961 // CHECK18-NEXT:    ret i32 [[CONV21]]
3962 //
3963 //
3964 // CHECK18-LABEL: define {{[^@]+}}@_ZL7fstatici
3965 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
3966 // CHECK18-NEXT:  entry:
3967 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3968 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3969 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3970 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3971 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3972 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3973 // CHECK18-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3974 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3975 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 1
3976 // CHECK18-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
3977 // CHECK18-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3978 // CHECK18-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3979 // CHECK18-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
3980 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3981 // CHECK18-NEXT:    [[FROMBOOL1:%.*]] = zext i1 [[TOBOOL]] to i8
3982 // CHECK18-NEXT:    store i8 [[FROMBOOL1]], i8* [[CONV]], align 1
3983 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3984 // CHECK18-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3985 // CHECK18-NEXT:    [[TOBOOL2:%.*]] = trunc i8 [[TMP3]] to i1
3986 // CHECK18-NEXT:    br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3987 // CHECK18:       omp_if.then:
3988 // CHECK18-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3989 // CHECK18-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
3990 // CHECK18-NEXT:    store i64 [[TMP2]], i64* [[TMP5]], align 8
3991 // CHECK18-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3992 // CHECK18-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
3993 // CHECK18-NEXT:    store i64 [[TMP2]], i64* [[TMP7]], align 8
3994 // CHECK18-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3995 // CHECK18-NEXT:    store i8* null, i8** [[TMP8]], align 8
3996 // CHECK18-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3997 // CHECK18-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3998 // CHECK18-NEXT:    [[TMP11:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3999 // CHECK18-NEXT:    [[TOBOOL3:%.*]] = trunc i8 [[TMP11]] to i1
4000 // CHECK18-NEXT:    [[TMP12:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
4001 // CHECK18-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP9]], i8** [[TMP10]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP12]])
4002 // CHECK18-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4003 // CHECK18-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4004 // CHECK18:       omp_offload.failed:
4005 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR3]]
4006 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4007 // CHECK18:       omp_offload.cont:
4008 // CHECK18-NEXT:    br label [[OMP_IF_END:%.*]]
4009 // CHECK18:       omp_if.else:
4010 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR3]]
4011 // CHECK18-NEXT:    br label [[OMP_IF_END]]
4012 // CHECK18:       omp_if.end:
4013 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[N_ADDR]], align 4
4014 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP15]], 2
4015 // CHECK18-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[SUB]], 2
4016 // CHECK18-NEXT:    br i1 [[CMP4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE8:%.*]]
4017 // CHECK18:       omp_if.then5:
4018 // CHECK18-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0)
4019 // CHECK18-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4020 // CHECK18-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
4021 // CHECK18:       omp_offload.failed6:
4022 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
4023 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
4024 // CHECK18:       omp_offload.cont7:
4025 // CHECK18-NEXT:    br label [[OMP_IF_END9:%.*]]
4026 // CHECK18:       omp_if.else8:
4027 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
4028 // CHECK18-NEXT:    br label [[OMP_IF_END9]]
4029 // CHECK18:       omp_if.end9:
4030 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
4031 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
4032 // CHECK18-NEXT:    ret i32 [[ADD]]
4033 //
4034 //
4035 // CHECK18-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
4036 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat {
4037 // CHECK18-NEXT:  entry:
4038 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4039 // CHECK18-NEXT:    [[A:%.*]] = alloca i32, align 4
4040 // CHECK18-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
4041 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4042 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4043 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4044 // CHECK18-NEXT:    [[B:%.*]] = alloca i16, align 2
4045 // CHECK18-NEXT:    [[A_CASTED1:%.*]] = alloca i64, align 8
4046 // CHECK18-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
4047 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [2 x i8*], align 8
4048 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [2 x i8*], align 8
4049 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [2 x i8*], align 8
4050 // CHECK18-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4051 // CHECK18-NEXT:    store i32 0, i32* [[A]], align 4
4052 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A]], align 4
4053 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32*
4054 // CHECK18-NEXT:    store i32 [[TMP0]], i32* [[CONV]], align 4
4055 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
4056 // CHECK18-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4057 // CHECK18-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
4058 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP3]], align 8
4059 // CHECK18-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4060 // CHECK18-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
4061 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP5]], align 8
4062 // CHECK18-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4063 // CHECK18-NEXT:    store i8* null, i8** [[TMP6]], align 8
4064 // CHECK18-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4065 // CHECK18-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4066 // CHECK18-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.9, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 1)
4067 // CHECK18-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
4068 // CHECK18-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4069 // CHECK18:       omp_offload.failed:
4070 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87(i64 [[TMP1]]) #[[ATTR3]]
4071 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4072 // CHECK18:       omp_offload.cont:
4073 // CHECK18-NEXT:    store i16 1, i16* [[B]], align 2
4074 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[A]], align 4
4075 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[A_CASTED1]] to i32*
4076 // CHECK18-NEXT:    store i32 [[TMP11]], i32* [[CONV2]], align 4
4077 // CHECK18-NEXT:    [[TMP12:%.*]] = load i64, i64* [[A_CASTED1]], align 8
4078 // CHECK18-NEXT:    [[TMP13:%.*]] = load i16, i16* [[B]], align 2
4079 // CHECK18-NEXT:    [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i16*
4080 // CHECK18-NEXT:    store i16 [[TMP13]], i16* [[CONV3]], align 2
4081 // CHECK18-NEXT:    [[TMP14:%.*]] = load i64, i64* [[B_CASTED]], align 8
4082 // CHECK18-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
4083 // CHECK18-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
4084 // CHECK18-NEXT:    store i64 [[TMP12]], i64* [[TMP16]], align 8
4085 // CHECK18-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
4086 // CHECK18-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
4087 // CHECK18-NEXT:    store i64 [[TMP12]], i64* [[TMP18]], align 8
4088 // CHECK18-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
4089 // CHECK18-NEXT:    store i8* null, i8** [[TMP19]], align 8
4090 // CHECK18-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
4091 // CHECK18-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
4092 // CHECK18-NEXT:    store i64 [[TMP14]], i64* [[TMP21]], align 8
4093 // CHECK18-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
4094 // CHECK18-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
4095 // CHECK18-NEXT:    store i64 [[TMP14]], i64* [[TMP23]], align 8
4096 // CHECK18-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1
4097 // CHECK18-NEXT:    store i8* null, i8** [[TMP24]], align 8
4098 // CHECK18-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
4099 // CHECK18-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
4100 // CHECK18-NEXT:    [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 2, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0)
4101 // CHECK18-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
4102 // CHECK18-NEXT:    br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
4103 // CHECK18:       omp_offload.failed7:
4104 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i64 [[TMP12]], i64 [[TMP14]]) #[[ATTR3]]
4105 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
4106 // CHECK18:       omp_offload.cont8:
4107 // CHECK18-NEXT:    [[TMP29:%.*]] = load i32, i32* [[A]], align 4
4108 // CHECK18-NEXT:    ret i32 [[TMP29]]
4109 //
4110 //
4111 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
4112 // CHECK18-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
4113 // CHECK18-NEXT:  entry:
4114 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
4115 // CHECK18-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
4116 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4117 // CHECK18-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
4118 // CHECK18-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4119 // CHECK18-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4120 // CHECK18-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4121 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4122 // CHECK18-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
4123 // CHECK18-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
4124 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4125 // CHECK18-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
4126 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
4127 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4128 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
4129 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
4130 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
4131 // CHECK18-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
4132 // CHECK18-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV1]], align 8
4133 // CHECK18-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
4134 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4135 // CHECK18:       omp_if.then:
4136 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP3]])
4137 // CHECK18-NEXT:    br label [[OMP_IF_END:%.*]]
4138 // CHECK18:       omp_if.else:
4139 // CHECK18-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4140 // CHECK18-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
4141 // CHECK18-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i64 [[TMP3]]) #[[ATTR3]]
4142 // CHECK18-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4143 // CHECK18-NEXT:    br label [[OMP_IF_END]]
4144 // CHECK18:       omp_if.end:
4145 // CHECK18-NEXT:    ret void
4146 //
4147 //
4148 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined.
4149 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR2:[0-9]+]] {
4150 // CHECK18-NEXT:  entry:
4151 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4152 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4153 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
4154 // CHECK18-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
4155 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4156 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4157 // CHECK18-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
4158 // CHECK18-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
4159 // CHECK18-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
4160 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
4161 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4162 // CHECK18-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
4163 // CHECK18-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
4164 // CHECK18-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
4165 // CHECK18-NEXT:    store double [[ADD]], double* [[A]], align 8
4166 // CHECK18-NEXT:    ret void
4167 //
4168 //
4169 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
4170 // CHECK18-SAME: (%struct.S1* [[THIS:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4171 // CHECK18-NEXT:  entry:
4172 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
4173 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4174 // CHECK18-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4175 // CHECK18-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4176 // CHECK18-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4177 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4178 // CHECK18-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
4179 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4180 // CHECK18-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
4181 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4182 // CHECK18-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
4183 // CHECK18-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
4184 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4185 // CHECK18:       omp_if.then:
4186 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
4187 // CHECK18-NEXT:    br label [[OMP_IF_END:%.*]]
4188 // CHECK18:       omp_if.else:
4189 // CHECK18-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4190 // CHECK18-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
4191 // CHECK18-NEXT:    call void @.omp_outlined..1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR3]]
4192 // CHECK18-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4193 // CHECK18-NEXT:    br label [[OMP_IF_END]]
4194 // CHECK18:       omp_if.end:
4195 // CHECK18-NEXT:    ret void
4196 //
4197 //
4198 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..1
4199 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR2]] {
4200 // CHECK18-NEXT:  entry:
4201 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4202 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4203 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
4204 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4205 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4206 // CHECK18-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
4207 // CHECK18-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
4208 // CHECK18-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
4209 // CHECK18-NEXT:    store double 2.500000e+00, double* [[A]], align 8
4210 // CHECK18-NEXT:    ret void
4211 //
4212 //
4213 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
4214 // CHECK18-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4215 // CHECK18-NEXT:  entry:
4216 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4217 // CHECK18-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4218 // CHECK18-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4219 // CHECK18-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4220 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4221 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4222 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4223 // CHECK18-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 8
4224 // CHECK18-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
4225 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4226 // CHECK18:       omp_if.then:
4227 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
4228 // CHECK18-NEXT:    br label [[OMP_IF_END:%.*]]
4229 // CHECK18:       omp_if.else:
4230 // CHECK18-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4231 // CHECK18-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
4232 // CHECK18-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR3]]
4233 // CHECK18-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4234 // CHECK18-NEXT:    br label [[OMP_IF_END]]
4235 // CHECK18:       omp_if.end:
4236 // CHECK18-NEXT:    ret void
4237 //
4238 //
4239 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..4
4240 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
4241 // CHECK18-NEXT:  entry:
4242 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4243 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4244 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4245 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4246 // CHECK18-NEXT:    ret void
4247 //
4248 //
4249 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
4250 // CHECK18-SAME: () #[[ATTR1]] {
4251 // CHECK18-NEXT:  entry:
4252 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
4253 // CHECK18-NEXT:    ret void
4254 //
4255 //
4256 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..7
4257 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
4258 // CHECK18-NEXT:  entry:
4259 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4260 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4261 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4262 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4263 // CHECK18-NEXT:    ret void
4264 //
4265 //
4266 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
4267 // CHECK18-SAME: (i64 [[A:%.*]]) #[[ATTR1]] {
4268 // CHECK18-NEXT:  entry:
4269 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4270 // CHECK18-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
4271 // CHECK18-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4272 // CHECK18-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4273 // CHECK18-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4274 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4275 // CHECK18-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
4276 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
4277 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4278 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
4279 // CHECK18-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
4280 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
4281 // CHECK18-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4282 // CHECK18-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
4283 // CHECK18-NEXT:    call void @.omp_outlined..8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]]) #[[ATTR3]]
4284 // CHECK18-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4285 // CHECK18-NEXT:    ret void
4286 //
4287 //
4288 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..8
4289 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR2]] {
4290 // CHECK18-NEXT:  entry:
4291 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4292 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4293 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4294 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4295 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4296 // CHECK18-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
4297 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
4298 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
4299 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
4300 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
4301 // CHECK18-NEXT:    ret void
4302 //
4303 //
4304 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
4305 // CHECK18-SAME: (i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
4306 // CHECK18-NEXT:  entry:
4307 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4308 // CHECK18-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
4309 // CHECK18-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
4310 // CHECK18-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
4311 // CHECK18-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
4312 // CHECK18-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
4313 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
4314 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
4315 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
4316 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
4317 // CHECK18-NEXT:    store i32 [[TMP0]], i32* [[CONV2]], align 4
4318 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
4319 // CHECK18-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
4320 // CHECK18-NEXT:    [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i16*
4321 // CHECK18-NEXT:    store i16 [[TMP2]], i16* [[CONV3]], align 2
4322 // CHECK18-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
4323 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
4324 // CHECK18-NEXT:    ret void
4325 //
4326 //
4327 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..11
4328 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR2]] {
4329 // CHECK18-NEXT:  entry:
4330 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4331 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4332 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4333 // CHECK18-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
4334 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4335 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4336 // CHECK18-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
4337 // CHECK18-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
4338 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
4339 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
4340 // CHECK18-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
4341 // CHECK18-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
4342 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4343 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
4344 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
4345 // CHECK18-NEXT:    ret void
4346 //
4347 //
4348 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4349 // CHECK18-SAME: () #[[ATTR4:[0-9]+]] {
4350 // CHECK18-NEXT:  entry:
4351 // CHECK18-NEXT:    call void @__tgt_register_requires(i64 1)
4352 // CHECK18-NEXT:    ret void
4353 //
4354 //
4355 // CHECK19-LABEL: define {{[^@]+}}@_Z3bari
4356 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
4357 // CHECK19-NEXT:  entry:
4358 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4359 // CHECK19-NEXT:    [[A:%.*]] = alloca i32, align 4
4360 // CHECK19-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4
4361 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4362 // CHECK19-NEXT:    store i32 0, i32* [[A]], align 4
4363 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
4364 // CHECK19-NEXT:    [[CALL:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP0]])
4365 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
4366 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
4367 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
4368 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4369 // CHECK19-NEXT:    [[CALL1:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP2]])
4370 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
4371 // CHECK19-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
4372 // CHECK19-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
4373 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
4374 // CHECK19-NEXT:    [[CALL3:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP4]])
4375 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
4376 // CHECK19-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
4377 // CHECK19-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
4378 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
4379 // CHECK19-NEXT:    ret i32 [[TMP6]]
4380 //
4381 //
4382 // CHECK19-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
4383 // CHECK19-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 {
4384 // CHECK19-NEXT:  entry:
4385 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4386 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4387 // CHECK19-NEXT:    [[B:%.*]] = alloca i32, align 4
4388 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4389 // CHECK19-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
4390 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4391 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
4392 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
4393 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
4394 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i8, align 1
4395 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED8:%.*]] = alloca i32, align 4
4396 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [2 x i8*], align 4
4397 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [2 x i8*], align 4
4398 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [2 x i8*], align 4
4399 // CHECK19-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4400 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4401 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4402 // CHECK19-NEXT:    store i32 1, i32* [[B]], align 4
4403 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
4404 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 3
4405 // CHECK19-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
4406 // CHECK19-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4407 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
4408 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[B_CASTED]], align 4
4409 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B_CASTED]], align 4
4410 // CHECK19-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4411 // CHECK19-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1
4412 // CHECK19-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4413 // CHECK19-NEXT:    [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL]] to i8
4414 // CHECK19-NEXT:    store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
4415 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4416 // CHECK19-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
4417 // CHECK19-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4418 // CHECK19-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to %struct.S1**
4419 // CHECK19-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP6]], align 4
4420 // CHECK19-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4421 // CHECK19-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to double**
4422 // CHECK19-NEXT:    store double* [[A]], double** [[TMP8]], align 4
4423 // CHECK19-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4424 // CHECK19-NEXT:    store i8* null, i8** [[TMP9]], align 4
4425 // CHECK19-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4426 // CHECK19-NEXT:    [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
4427 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[TMP11]], align 4
4428 // CHECK19-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4429 // CHECK19-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
4430 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[TMP13]], align 4
4431 // CHECK19-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4432 // CHECK19-NEXT:    store i8* null, i8** [[TMP14]], align 4
4433 // CHECK19-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4434 // CHECK19-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32*
4435 // CHECK19-NEXT:    store i32 [[TMP4]], i32* [[TMP16]], align 4
4436 // CHECK19-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4437 // CHECK19-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
4438 // CHECK19-NEXT:    store i32 [[TMP4]], i32* [[TMP18]], align 4
4439 // CHECK19-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4440 // CHECK19-NEXT:    store i8* null, i8** [[TMP19]], align 4
4441 // CHECK19-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4442 // CHECK19-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4443 // CHECK19-NEXT:    [[TMP22:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4444 // CHECK19-NEXT:    [[TOBOOL3:%.*]] = trunc i8 [[TMP22]] to i1
4445 // CHECK19-NEXT:    [[TMP23:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
4446 // CHECK19-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP23]])
4447 // CHECK19-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
4448 // CHECK19-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4449 // CHECK19:       omp_offload.failed:
4450 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i32 [[TMP2]], i32 [[TMP4]]) #[[ATTR3:[0-9]+]]
4451 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4452 // CHECK19:       omp_offload.cont:
4453 // CHECK19-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
4454 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 5
4455 // CHECK19-NEXT:    [[FROMBOOL6:%.*]] = zext i1 [[CMP5]] to i8
4456 // CHECK19-NEXT:    store i8 [[FROMBOOL6]], i8* [[DOTCAPTURE_EXPR_4]], align 1
4457 // CHECK19-NEXT:    [[TMP27:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1
4458 // CHECK19-NEXT:    [[TOBOOL7:%.*]] = trunc i8 [[TMP27]] to i1
4459 // CHECK19-NEXT:    [[CONV9:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED8]] to i8*
4460 // CHECK19-NEXT:    [[FROMBOOL10:%.*]] = zext i1 [[TOBOOL7]] to i8
4461 // CHECK19-NEXT:    store i8 [[FROMBOOL10]], i8* [[CONV9]], align 1
4462 // CHECK19-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED8]], align 4
4463 // CHECK19-NEXT:    [[TMP29:%.*]] = load i32, i32* [[N_ADDR]], align 4
4464 // CHECK19-NEXT:    [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], 4
4465 // CHECK19-NEXT:    br i1 [[CMP11]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4466 // CHECK19:       omp_if.then:
4467 // CHECK19-NEXT:    [[A12:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
4468 // CHECK19-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
4469 // CHECK19-NEXT:    [[TMP31:%.*]] = bitcast i8** [[TMP30]] to %struct.S1**
4470 // CHECK19-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP31]], align 4
4471 // CHECK19-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
4472 // CHECK19-NEXT:    [[TMP33:%.*]] = bitcast i8** [[TMP32]] to double**
4473 // CHECK19-NEXT:    store double* [[A12]], double** [[TMP33]], align 4
4474 // CHECK19-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
4475 // CHECK19-NEXT:    store i8* null, i8** [[TMP34]], align 4
4476 // CHECK19-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 1
4477 // CHECK19-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32*
4478 // CHECK19-NEXT:    store i32 [[TMP28]], i32* [[TMP36]], align 4
4479 // CHECK19-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 1
4480 // CHECK19-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
4481 // CHECK19-NEXT:    store i32 [[TMP28]], i32* [[TMP38]], align 4
4482 // CHECK19-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 1
4483 // CHECK19-NEXT:    store i8* null, i8** [[TMP39]], align 4
4484 // CHECK19-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
4485 // CHECK19-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
4486 // CHECK19-NEXT:    [[TMP42:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1
4487 // CHECK19-NEXT:    [[TOBOOL16:%.*]] = trunc i8 [[TMP42]] to i1
4488 // CHECK19-NEXT:    [[TMP43:%.*]] = select i1 [[TOBOOL16]], i32 0, i32 1
4489 // CHECK19-NEXT:    [[TMP44:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 2, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP43]])
4490 // CHECK19-NEXT:    [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
4491 // CHECK19-NEXT:    br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
4492 // CHECK19:       omp_offload.failed17:
4493 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i32 [[TMP28]]) #[[ATTR3]]
4494 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
4495 // CHECK19:       omp_offload.cont18:
4496 // CHECK19-NEXT:    br label [[OMP_IF_END:%.*]]
4497 // CHECK19:       omp_if.else:
4498 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i32 [[TMP28]]) #[[ATTR3]]
4499 // CHECK19-NEXT:    br label [[OMP_IF_END]]
4500 // CHECK19:       omp_if.end:
4501 // CHECK19-NEXT:    [[A19:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
4502 // CHECK19-NEXT:    [[TMP46:%.*]] = load double, double* [[A19]], align 4
4503 // CHECK19-NEXT:    [[CONV20:%.*]] = fptosi double [[TMP46]] to i32
4504 // CHECK19-NEXT:    ret i32 [[CONV20]]
4505 //
4506 //
4507 // CHECK19-LABEL: define {{[^@]+}}@_ZL7fstatici
4508 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
4509 // CHECK19-NEXT:  entry:
4510 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4511 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4512 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4513 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
4514 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
4515 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
4516 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4517 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
4518 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 1
4519 // CHECK19-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
4520 // CHECK19-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4521 // CHECK19-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4522 // CHECK19-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
4523 // CHECK19-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4524 // CHECK19-NEXT:    [[FROMBOOL1:%.*]] = zext i1 [[TOBOOL]] to i8
4525 // CHECK19-NEXT:    store i8 [[FROMBOOL1]], i8* [[CONV]], align 1
4526 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4527 // CHECK19-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4528 // CHECK19-NEXT:    [[TOBOOL2:%.*]] = trunc i8 [[TMP3]] to i1
4529 // CHECK19-NEXT:    br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4530 // CHECK19:       omp_if.then:
4531 // CHECK19-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4532 // CHECK19-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
4533 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[TMP5]], align 4
4534 // CHECK19-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4535 // CHECK19-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
4536 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[TMP7]], align 4
4537 // CHECK19-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4538 // CHECK19-NEXT:    store i8* null, i8** [[TMP8]], align 4
4539 // CHECK19-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4540 // CHECK19-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4541 // CHECK19-NEXT:    [[TMP11:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4542 // CHECK19-NEXT:    [[TOBOOL3:%.*]] = trunc i8 [[TMP11]] to i1
4543 // CHECK19-NEXT:    [[TMP12:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
4544 // CHECK19-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP9]], i8** [[TMP10]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP12]])
4545 // CHECK19-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4546 // CHECK19-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4547 // CHECK19:       omp_offload.failed:
4548 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR3]]
4549 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4550 // CHECK19:       omp_offload.cont:
4551 // CHECK19-NEXT:    br label [[OMP_IF_END:%.*]]
4552 // CHECK19:       omp_if.else:
4553 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR3]]
4554 // CHECK19-NEXT:    br label [[OMP_IF_END]]
4555 // CHECK19:       omp_if.end:
4556 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[N_ADDR]], align 4
4557 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP15]], 2
4558 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[SUB]], 2
4559 // CHECK19-NEXT:    br i1 [[CMP4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE8:%.*]]
4560 // CHECK19:       omp_if.then5:
4561 // CHECK19-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0)
4562 // CHECK19-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4563 // CHECK19-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
4564 // CHECK19:       omp_offload.failed6:
4565 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
4566 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
4567 // CHECK19:       omp_offload.cont7:
4568 // CHECK19-NEXT:    br label [[OMP_IF_END9:%.*]]
4569 // CHECK19:       omp_if.else8:
4570 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
4571 // CHECK19-NEXT:    br label [[OMP_IF_END9]]
4572 // CHECK19:       omp_if.end9:
4573 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
4574 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
4575 // CHECK19-NEXT:    ret i32 [[ADD]]
4576 //
4577 //
4578 // CHECK19-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
4579 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat {
4580 // CHECK19-NEXT:  entry:
4581 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4582 // CHECK19-NEXT:    [[A:%.*]] = alloca i32, align 4
4583 // CHECK19-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4584 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
4585 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
4586 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
4587 // CHECK19-NEXT:    [[B:%.*]] = alloca i16, align 2
4588 // CHECK19-NEXT:    [[A_CASTED1:%.*]] = alloca i32, align 4
4589 // CHECK19-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
4590 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS2:%.*]] = alloca [2 x i8*], align 4
4591 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS3:%.*]] = alloca [2 x i8*], align 4
4592 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS4:%.*]] = alloca [2 x i8*], align 4
4593 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4594 // CHECK19-NEXT:    store i32 0, i32* [[A]], align 4
4595 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A]], align 4
4596 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[A_CASTED]], align 4
4597 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
4598 // CHECK19-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4599 // CHECK19-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32*
4600 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[TMP3]], align 4
4601 // CHECK19-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4602 // CHECK19-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
4603 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[TMP5]], align 4
4604 // CHECK19-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4605 // CHECK19-NEXT:    store i8* null, i8** [[TMP6]], align 4
4606 // CHECK19-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4607 // CHECK19-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4608 // CHECK19-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.9, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 1)
4609 // CHECK19-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
4610 // CHECK19-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4611 // CHECK19:       omp_offload.failed:
4612 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87(i32 [[TMP1]]) #[[ATTR3]]
4613 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4614 // CHECK19:       omp_offload.cont:
4615 // CHECK19-NEXT:    store i16 1, i16* [[B]], align 2
4616 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[A]], align 4
4617 // CHECK19-NEXT:    store i32 [[TMP11]], i32* [[A_CASTED1]], align 4
4618 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[A_CASTED1]], align 4
4619 // CHECK19-NEXT:    [[TMP13:%.*]] = load i16, i16* [[B]], align 2
4620 // CHECK19-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_CASTED]] to i16*
4621 // CHECK19-NEXT:    store i16 [[TMP13]], i16* [[CONV]], align 2
4622 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[B_CASTED]], align 4
4623 // CHECK19-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
4624 // CHECK19-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32*
4625 // CHECK19-NEXT:    store i32 [[TMP12]], i32* [[TMP16]], align 4
4626 // CHECK19-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
4627 // CHECK19-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
4628 // CHECK19-NEXT:    store i32 [[TMP12]], i32* [[TMP18]], align 4
4629 // CHECK19-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 0
4630 // CHECK19-NEXT:    store i8* null, i8** [[TMP19]], align 4
4631 // CHECK19-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 1
4632 // CHECK19-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
4633 // CHECK19-NEXT:    store i32 [[TMP14]], i32* [[TMP21]], align 4
4634 // CHECK19-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 1
4635 // CHECK19-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
4636 // CHECK19-NEXT:    store i32 [[TMP14]], i32* [[TMP23]], align 4
4637 // CHECK19-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 1
4638 // CHECK19-NEXT:    store i8* null, i8** [[TMP24]], align 4
4639 // CHECK19-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
4640 // CHECK19-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
4641 // CHECK19-NEXT:    [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 2, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0)
4642 // CHECK19-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
4643 // CHECK19-NEXT:    br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
4644 // CHECK19:       omp_offload.failed5:
4645 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i32 [[TMP12]], i32 [[TMP14]]) #[[ATTR3]]
4646 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
4647 // CHECK19:       omp_offload.cont6:
4648 // CHECK19-NEXT:    [[TMP29:%.*]] = load i32, i32* [[A]], align 4
4649 // CHECK19-NEXT:    ret i32 [[TMP29]]
4650 //
4651 //
4652 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
4653 // CHECK19-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
4654 // CHECK19-NEXT:  entry:
4655 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4656 // CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
4657 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4658 // CHECK19-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
4659 // CHECK19-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4660 // CHECK19-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4661 // CHECK19-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4662 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4663 // CHECK19-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4664 // CHECK19-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
4665 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4666 // CHECK19-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4667 // CHECK19-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4668 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B_ADDR]], align 4
4669 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[B_CASTED]], align 4
4670 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
4671 // CHECK19-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV]], align 4
4672 // CHECK19-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
4673 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4674 // CHECK19:       omp_if.then:
4675 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP3]])
4676 // CHECK19-NEXT:    br label [[OMP_IF_END:%.*]]
4677 // CHECK19:       omp_if.else:
4678 // CHECK19-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4679 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
4680 // CHECK19-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i32 [[TMP3]]) #[[ATTR3]]
4681 // CHECK19-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4682 // CHECK19-NEXT:    br label [[OMP_IF_END]]
4683 // CHECK19:       omp_if.end:
4684 // CHECK19-NEXT:    ret void
4685 //
4686 //
4687 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.
4688 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR2:[0-9]+]] {
4689 // CHECK19-NEXT:  entry:
4690 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4691 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4692 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4693 // CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
4694 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4695 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4696 // CHECK19-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4697 // CHECK19-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
4698 // CHECK19-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4699 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
4700 // CHECK19-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
4701 // CHECK19-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
4702 // CHECK19-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
4703 // CHECK19-NEXT:    store double [[ADD]], double* [[A]], align 4
4704 // CHECK19-NEXT:    ret void
4705 //
4706 //
4707 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
4708 // CHECK19-SAME: (%struct.S1* [[THIS:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4709 // CHECK19-NEXT:  entry:
4710 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4711 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4712 // CHECK19-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4713 // CHECK19-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4714 // CHECK19-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4715 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4716 // CHECK19-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4717 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4718 // CHECK19-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4719 // CHECK19-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4720 // CHECK19-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 4
4721 // CHECK19-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
4722 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4723 // CHECK19:       omp_if.then:
4724 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
4725 // CHECK19-NEXT:    br label [[OMP_IF_END:%.*]]
4726 // CHECK19:       omp_if.else:
4727 // CHECK19-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4728 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
4729 // CHECK19-NEXT:    call void @.omp_outlined..1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR3]]
4730 // CHECK19-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4731 // CHECK19-NEXT:    br label [[OMP_IF_END]]
4732 // CHECK19:       omp_if.end:
4733 // CHECK19-NEXT:    ret void
4734 //
4735 //
4736 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1
4737 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR2]] {
4738 // CHECK19-NEXT:  entry:
4739 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4740 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4741 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4742 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4743 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4744 // CHECK19-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4745 // CHECK19-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4746 // CHECK19-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
4747 // CHECK19-NEXT:    store double 2.500000e+00, double* [[A]], align 4
4748 // CHECK19-NEXT:    ret void
4749 //
4750 //
4751 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
4752 // CHECK19-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4753 // CHECK19-NEXT:  entry:
4754 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4755 // CHECK19-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4756 // CHECK19-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4757 // CHECK19-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4758 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4759 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4760 // CHECK19-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4761 // CHECK19-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 4
4762 // CHECK19-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
4763 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4764 // CHECK19:       omp_if.then:
4765 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
4766 // CHECK19-NEXT:    br label [[OMP_IF_END:%.*]]
4767 // CHECK19:       omp_if.else:
4768 // CHECK19-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4769 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
4770 // CHECK19-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR3]]
4771 // CHECK19-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4772 // CHECK19-NEXT:    br label [[OMP_IF_END]]
4773 // CHECK19:       omp_if.end:
4774 // CHECK19-NEXT:    ret void
4775 //
4776 //
4777 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..4
4778 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
4779 // CHECK19-NEXT:  entry:
4780 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4781 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4782 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4783 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4784 // CHECK19-NEXT:    ret void
4785 //
4786 //
4787 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
4788 // CHECK19-SAME: () #[[ATTR1]] {
4789 // CHECK19-NEXT:  entry:
4790 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
4791 // CHECK19-NEXT:    ret void
4792 //
4793 //
4794 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..7
4795 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
4796 // CHECK19-NEXT:  entry:
4797 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4798 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4799 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4800 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4801 // CHECK19-NEXT:    ret void
4802 //
4803 //
4804 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
4805 // CHECK19-SAME: (i32 [[A:%.*]]) #[[ATTR1]] {
4806 // CHECK19-NEXT:  entry:
4807 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4808 // CHECK19-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4809 // CHECK19-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4810 // CHECK19-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4811 // CHECK19-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4812 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4813 // CHECK19-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4814 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
4815 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[A_CASTED]], align 4
4816 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
4817 // CHECK19-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4818 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
4819 // CHECK19-NEXT:    call void @.omp_outlined..8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i32 [[TMP2]]) #[[ATTR3]]
4820 // CHECK19-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4821 // CHECK19-NEXT:    ret void
4822 //
4823 //
4824 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..8
4825 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]]) #[[ATTR2]] {
4826 // CHECK19-NEXT:  entry:
4827 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4828 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4829 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4830 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4831 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4832 // CHECK19-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4833 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4834 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
4835 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
4836 // CHECK19-NEXT:    ret void
4837 //
4838 //
4839 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
4840 // CHECK19-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
4841 // CHECK19-NEXT:  entry:
4842 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4843 // CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
4844 // CHECK19-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4845 // CHECK19-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
4846 // CHECK19-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4847 // CHECK19-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
4848 // CHECK19-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
4849 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4850 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[A_CASTED]], align 4
4851 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
4852 // CHECK19-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
4853 // CHECK19-NEXT:    [[CONV1:%.*]] = bitcast i32* [[B_CASTED]] to i16*
4854 // CHECK19-NEXT:    store i16 [[TMP2]], i16* [[CONV1]], align 2
4855 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
4856 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
4857 // CHECK19-NEXT:    ret void
4858 //
4859 //
4860 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11
4861 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR2]] {
4862 // CHECK19-NEXT:  entry:
4863 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4864 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4865 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4866 // CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
4867 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4868 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4869 // CHECK19-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4870 // CHECK19-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
4871 // CHECK19-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
4872 // CHECK19-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
4873 // CHECK19-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
4874 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
4875 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
4876 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
4877 // CHECK19-NEXT:    ret void
4878 //
4879 //
4880 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4881 // CHECK19-SAME: () #[[ATTR4:[0-9]+]] {
4882 // CHECK19-NEXT:  entry:
4883 // CHECK19-NEXT:    call void @__tgt_register_requires(i64 1)
4884 // CHECK19-NEXT:    ret void
4885 //
4886 //
4887 // CHECK20-LABEL: define {{[^@]+}}@_Z3bari
4888 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
4889 // CHECK20-NEXT:  entry:
4890 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4891 // CHECK20-NEXT:    [[A:%.*]] = alloca i32, align 4
4892 // CHECK20-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4
4893 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4894 // CHECK20-NEXT:    store i32 0, i32* [[A]], align 4
4895 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
4896 // CHECK20-NEXT:    [[CALL:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP0]])
4897 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
4898 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
4899 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
4900 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4901 // CHECK20-NEXT:    [[CALL1:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP2]])
4902 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
4903 // CHECK20-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
4904 // CHECK20-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
4905 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
4906 // CHECK20-NEXT:    [[CALL3:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP4]])
4907 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
4908 // CHECK20-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
4909 // CHECK20-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
4910 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
4911 // CHECK20-NEXT:    ret i32 [[TMP6]]
4912 //
4913 //
4914 // CHECK20-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
4915 // CHECK20-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 {
4916 // CHECK20-NEXT:  entry:
4917 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4918 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4919 // CHECK20-NEXT:    [[B:%.*]] = alloca i32, align 4
4920 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4921 // CHECK20-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
4922 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4923 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
4924 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
4925 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
4926 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i8, align 1
4927 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED8:%.*]] = alloca i32, align 4
4928 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [2 x i8*], align 4
4929 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [2 x i8*], align 4
4930 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [2 x i8*], align 4
4931 // CHECK20-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4932 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4933 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4934 // CHECK20-NEXT:    store i32 1, i32* [[B]], align 4
4935 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
4936 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 3
4937 // CHECK20-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
4938 // CHECK20-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4939 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
4940 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[B_CASTED]], align 4
4941 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B_CASTED]], align 4
4942 // CHECK20-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4943 // CHECK20-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1
4944 // CHECK20-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4945 // CHECK20-NEXT:    [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL]] to i8
4946 // CHECK20-NEXT:    store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
4947 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4948 // CHECK20-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
4949 // CHECK20-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4950 // CHECK20-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to %struct.S1**
4951 // CHECK20-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP6]], align 4
4952 // CHECK20-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4953 // CHECK20-NEXT:    [[TMP8:%.*]] = bitcast i8** [[TMP7]] to double**
4954 // CHECK20-NEXT:    store double* [[A]], double** [[TMP8]], align 4
4955 // CHECK20-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4956 // CHECK20-NEXT:    store i8* null, i8** [[TMP9]], align 4
4957 // CHECK20-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4958 // CHECK20-NEXT:    [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
4959 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[TMP11]], align 4
4960 // CHECK20-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4961 // CHECK20-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
4962 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[TMP13]], align 4
4963 // CHECK20-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4964 // CHECK20-NEXT:    store i8* null, i8** [[TMP14]], align 4
4965 // CHECK20-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4966 // CHECK20-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32*
4967 // CHECK20-NEXT:    store i32 [[TMP4]], i32* [[TMP16]], align 4
4968 // CHECK20-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4969 // CHECK20-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
4970 // CHECK20-NEXT:    store i32 [[TMP4]], i32* [[TMP18]], align 4
4971 // CHECK20-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4972 // CHECK20-NEXT:    store i8* null, i8** [[TMP19]], align 4
4973 // CHECK20-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4974 // CHECK20-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4975 // CHECK20-NEXT:    [[TMP22:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4976 // CHECK20-NEXT:    [[TOBOOL3:%.*]] = trunc i8 [[TMP22]] to i1
4977 // CHECK20-NEXT:    [[TMP23:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
4978 // CHECK20-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP23]])
4979 // CHECK20-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
4980 // CHECK20-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4981 // CHECK20:       omp_offload.failed:
4982 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i32 [[TMP2]], i32 [[TMP4]]) #[[ATTR3:[0-9]+]]
4983 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4984 // CHECK20:       omp_offload.cont:
4985 // CHECK20-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
4986 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 5
4987 // CHECK20-NEXT:    [[FROMBOOL6:%.*]] = zext i1 [[CMP5]] to i8
4988 // CHECK20-NEXT:    store i8 [[FROMBOOL6]], i8* [[DOTCAPTURE_EXPR_4]], align 1
4989 // CHECK20-NEXT:    [[TMP27:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1
4990 // CHECK20-NEXT:    [[TOBOOL7:%.*]] = trunc i8 [[TMP27]] to i1
4991 // CHECK20-NEXT:    [[CONV9:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED8]] to i8*
4992 // CHECK20-NEXT:    [[FROMBOOL10:%.*]] = zext i1 [[TOBOOL7]] to i8
4993 // CHECK20-NEXT:    store i8 [[FROMBOOL10]], i8* [[CONV9]], align 1
4994 // CHECK20-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED8]], align 4
4995 // CHECK20-NEXT:    [[TMP29:%.*]] = load i32, i32* [[N_ADDR]], align 4
4996 // CHECK20-NEXT:    [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], 4
4997 // CHECK20-NEXT:    br i1 [[CMP11]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4998 // CHECK20:       omp_if.then:
4999 // CHECK20-NEXT:    [[A12:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
5000 // CHECK20-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
5001 // CHECK20-NEXT:    [[TMP31:%.*]] = bitcast i8** [[TMP30]] to %struct.S1**
5002 // CHECK20-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP31]], align 4
5003 // CHECK20-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
5004 // CHECK20-NEXT:    [[TMP33:%.*]] = bitcast i8** [[TMP32]] to double**
5005 // CHECK20-NEXT:    store double* [[A12]], double** [[TMP33]], align 4
5006 // CHECK20-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
5007 // CHECK20-NEXT:    store i8* null, i8** [[TMP34]], align 4
5008 // CHECK20-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 1
5009 // CHECK20-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32*
5010 // CHECK20-NEXT:    store i32 [[TMP28]], i32* [[TMP36]], align 4
5011 // CHECK20-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 1
5012 // CHECK20-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
5013 // CHECK20-NEXT:    store i32 [[TMP28]], i32* [[TMP38]], align 4
5014 // CHECK20-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 1
5015 // CHECK20-NEXT:    store i8* null, i8** [[TMP39]], align 4
5016 // CHECK20-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
5017 // CHECK20-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
5018 // CHECK20-NEXT:    [[TMP42:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1
5019 // CHECK20-NEXT:    [[TOBOOL16:%.*]] = trunc i8 [[TMP42]] to i1
5020 // CHECK20-NEXT:    [[TMP43:%.*]] = select i1 [[TOBOOL16]], i32 0, i32 1
5021 // CHECK20-NEXT:    [[TMP44:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 2, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP43]])
5022 // CHECK20-NEXT:    [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
5023 // CHECK20-NEXT:    br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
5024 // CHECK20:       omp_offload.failed17:
5025 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i32 [[TMP28]]) #[[ATTR3]]
5026 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
5027 // CHECK20:       omp_offload.cont18:
5028 // CHECK20-NEXT:    br label [[OMP_IF_END:%.*]]
5029 // CHECK20:       omp_if.else:
5030 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]], i32 [[TMP28]]) #[[ATTR3]]
5031 // CHECK20-NEXT:    br label [[OMP_IF_END]]
5032 // CHECK20:       omp_if.end:
5033 // CHECK20-NEXT:    [[A19:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
5034 // CHECK20-NEXT:    [[TMP46:%.*]] = load double, double* [[A19]], align 4
5035 // CHECK20-NEXT:    [[CONV20:%.*]] = fptosi double [[TMP46]] to i32
5036 // CHECK20-NEXT:    ret i32 [[CONV20]]
5037 //
5038 //
5039 // CHECK20-LABEL: define {{[^@]+}}@_ZL7fstatici
5040 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
5041 // CHECK20-NEXT:  entry:
5042 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
5043 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5044 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
5045 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
5046 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
5047 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
5048 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
5049 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
5050 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 1
5051 // CHECK20-NEXT:    [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8
5052 // CHECK20-NEXT:    store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5053 // CHECK20-NEXT:    [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5054 // CHECK20-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
5055 // CHECK20-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8*
5056 // CHECK20-NEXT:    [[FROMBOOL1:%.*]] = zext i1 [[TOBOOL]] to i8
5057 // CHECK20-NEXT:    store i8 [[FROMBOOL1]], i8* [[CONV]], align 1
5058 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
5059 // CHECK20-NEXT:    [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5060 // CHECK20-NEXT:    [[TOBOOL2:%.*]] = trunc i8 [[TMP3]] to i1
5061 // CHECK20-NEXT:    br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5062 // CHECK20:       omp_if.then:
5063 // CHECK20-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5064 // CHECK20-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
5065 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[TMP5]], align 4
5066 // CHECK20-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5067 // CHECK20-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
5068 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[TMP7]], align 4
5069 // CHECK20-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5070 // CHECK20-NEXT:    store i8* null, i8** [[TMP8]], align 4
5071 // CHECK20-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5072 // CHECK20-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5073 // CHECK20-NEXT:    [[TMP11:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5074 // CHECK20-NEXT:    [[TOBOOL3:%.*]] = trunc i8 [[TMP11]] to i1
5075 // CHECK20-NEXT:    [[TMP12:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
5076 // CHECK20-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP9]], i8** [[TMP10]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 1, i32 [[TMP12]])
5077 // CHECK20-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5078 // CHECK20-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5079 // CHECK20:       omp_offload.failed:
5080 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR3]]
5081 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5082 // CHECK20:       omp_offload.cont:
5083 // CHECK20-NEXT:    br label [[OMP_IF_END:%.*]]
5084 // CHECK20:       omp_if.else:
5085 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR3]]
5086 // CHECK20-NEXT:    br label [[OMP_IF_END]]
5087 // CHECK20:       omp_if.end:
5088 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[N_ADDR]], align 4
5089 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP15]], 2
5090 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[SUB]], 2
5091 // CHECK20-NEXT:    br i1 [[CMP4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE8:%.*]]
5092 // CHECK20:       omp_if.then5:
5093 // CHECK20-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 1, i32 0)
5094 // CHECK20-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5095 // CHECK20-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
5096 // CHECK20:       omp_offload.failed6:
5097 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
5098 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
5099 // CHECK20:       omp_offload.cont7:
5100 // CHECK20-NEXT:    br label [[OMP_IF_END9:%.*]]
5101 // CHECK20:       omp_if.else8:
5102 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]]
5103 // CHECK20-NEXT:    br label [[OMP_IF_END9]]
5104 // CHECK20:       omp_if.end9:
5105 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
5106 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], 1
5107 // CHECK20-NEXT:    ret i32 [[ADD]]
5108 //
5109 //
5110 // CHECK20-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
5111 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat {
5112 // CHECK20-NEXT:  entry:
5113 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
5114 // CHECK20-NEXT:    [[A:%.*]] = alloca i32, align 4
5115 // CHECK20-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5116 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
5117 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
5118 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
5119 // CHECK20-NEXT:    [[B:%.*]] = alloca i16, align 2
5120 // CHECK20-NEXT:    [[A_CASTED1:%.*]] = alloca i32, align 4
5121 // CHECK20-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
5122 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS2:%.*]] = alloca [2 x i8*], align 4
5123 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS3:%.*]] = alloca [2 x i8*], align 4
5124 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS4:%.*]] = alloca [2 x i8*], align 4
5125 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
5126 // CHECK20-NEXT:    store i32 0, i32* [[A]], align 4
5127 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A]], align 4
5128 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[A_CASTED]], align 4
5129 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
5130 // CHECK20-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5131 // CHECK20-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32*
5132 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[TMP3]], align 4
5133 // CHECK20-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5134 // CHECK20-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
5135 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[TMP5]], align 4
5136 // CHECK20-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5137 // CHECK20-NEXT:    store i8* null, i8** [[TMP6]], align 4
5138 // CHECK20-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5139 // CHECK20-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5140 // CHECK20-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.9, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 1, i32 1)
5141 // CHECK20-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
5142 // CHECK20-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5143 // CHECK20:       omp_offload.failed:
5144 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87(i32 [[TMP1]]) #[[ATTR3]]
5145 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5146 // CHECK20:       omp_offload.cont:
5147 // CHECK20-NEXT:    store i16 1, i16* [[B]], align 2
5148 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[A]], align 4
5149 // CHECK20-NEXT:    store i32 [[TMP11]], i32* [[A_CASTED1]], align 4
5150 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[A_CASTED1]], align 4
5151 // CHECK20-NEXT:    [[TMP13:%.*]] = load i16, i16* [[B]], align 2
5152 // CHECK20-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_CASTED]] to i16*
5153 // CHECK20-NEXT:    store i16 [[TMP13]], i16* [[CONV]], align 2
5154 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[B_CASTED]], align 4
5155 // CHECK20-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
5156 // CHECK20-NEXT:    [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32*
5157 // CHECK20-NEXT:    store i32 [[TMP12]], i32* [[TMP16]], align 4
5158 // CHECK20-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
5159 // CHECK20-NEXT:    [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
5160 // CHECK20-NEXT:    store i32 [[TMP12]], i32* [[TMP18]], align 4
5161 // CHECK20-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 0
5162 // CHECK20-NEXT:    store i8* null, i8** [[TMP19]], align 4
5163 // CHECK20-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 1
5164 // CHECK20-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
5165 // CHECK20-NEXT:    store i32 [[TMP14]], i32* [[TMP21]], align 4
5166 // CHECK20-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 1
5167 // CHECK20-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
5168 // CHECK20-NEXT:    store i32 [[TMP14]], i32* [[TMP23]], align 4
5169 // CHECK20-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 1
5170 // CHECK20-NEXT:    store i8* null, i8** [[TMP24]], align 4
5171 // CHECK20-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
5172 // CHECK20-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
5173 // CHECK20-NEXT:    [[TMP27:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 2, i8** [[TMP25]], i8** [[TMP26]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 1, i32 0)
5174 // CHECK20-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
5175 // CHECK20-NEXT:    br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
5176 // CHECK20:       omp_offload.failed5:
5177 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i32 [[TMP12]], i32 [[TMP14]]) #[[ATTR3]]
5178 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
5179 // CHECK20:       omp_offload.cont6:
5180 // CHECK20-NEXT:    [[TMP29:%.*]] = load i32, i32* [[A]], align 4
5181 // CHECK20-NEXT:    ret i32 [[TMP29]]
5182 //
5183 //
5184 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
5185 // CHECK20-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
5186 // CHECK20-NEXT:  entry:
5187 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
5188 // CHECK20-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
5189 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5190 // CHECK20-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
5191 // CHECK20-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5192 // CHECK20-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5193 // CHECK20-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5194 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5195 // CHECK20-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
5196 // CHECK20-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
5197 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5198 // CHECK20-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
5199 // CHECK20-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5200 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B_ADDR]], align 4
5201 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[B_CASTED]], align 4
5202 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
5203 // CHECK20-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV]], align 4
5204 // CHECK20-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
5205 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5206 // CHECK20:       omp_if.then:
5207 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP3]])
5208 // CHECK20-NEXT:    br label [[OMP_IF_END:%.*]]
5209 // CHECK20:       omp_if.else:
5210 // CHECK20-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5211 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5212 // CHECK20-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i32 [[TMP3]]) #[[ATTR3]]
5213 // CHECK20-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5214 // CHECK20-NEXT:    br label [[OMP_IF_END]]
5215 // CHECK20:       omp_if.end:
5216 // CHECK20-NEXT:    ret void
5217 //
5218 //
5219 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined.
5220 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR2:[0-9]+]] {
5221 // CHECK20-NEXT:  entry:
5222 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5223 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5224 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
5225 // CHECK20-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
5226 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5227 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5228 // CHECK20-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
5229 // CHECK20-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
5230 // CHECK20-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
5231 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
5232 // CHECK20-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
5233 // CHECK20-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
5234 // CHECK20-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
5235 // CHECK20-NEXT:    store double [[ADD]], double* [[A]], align 4
5236 // CHECK20-NEXT:    ret void
5237 //
5238 //
5239 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
5240 // CHECK20-SAME: (%struct.S1* [[THIS:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5241 // CHECK20-NEXT:  entry:
5242 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
5243 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5244 // CHECK20-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5245 // CHECK20-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5246 // CHECK20-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5247 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5248 // CHECK20-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
5249 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5250 // CHECK20-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
5251 // CHECK20-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5252 // CHECK20-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 4
5253 // CHECK20-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
5254 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5255 // CHECK20:       omp_if.then:
5256 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
5257 // CHECK20-NEXT:    br label [[OMP_IF_END:%.*]]
5258 // CHECK20:       omp_if.else:
5259 // CHECK20-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5260 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5261 // CHECK20-NEXT:    call void @.omp_outlined..1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR3]]
5262 // CHECK20-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5263 // CHECK20-NEXT:    br label [[OMP_IF_END]]
5264 // CHECK20:       omp_if.end:
5265 // CHECK20-NEXT:    ret void
5266 //
5267 //
5268 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..1
5269 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR2]] {
5270 // CHECK20-NEXT:  entry:
5271 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5272 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5273 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
5274 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5275 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5276 // CHECK20-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
5277 // CHECK20-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
5278 // CHECK20-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
5279 // CHECK20-NEXT:    store double 2.500000e+00, double* [[A]], align 4
5280 // CHECK20-NEXT:    ret void
5281 //
5282 //
5283 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
5284 // CHECK20-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5285 // CHECK20-NEXT:  entry:
5286 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5287 // CHECK20-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5288 // CHECK20-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5289 // CHECK20-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5290 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5291 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5292 // CHECK20-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5293 // CHECK20-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 4
5294 // CHECK20-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
5295 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5296 // CHECK20:       omp_if.then:
5297 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
5298 // CHECK20-NEXT:    br label [[OMP_IF_END:%.*]]
5299 // CHECK20:       omp_if.else:
5300 // CHECK20-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5301 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5302 // CHECK20-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR3]]
5303 // CHECK20-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5304 // CHECK20-NEXT:    br label [[OMP_IF_END]]
5305 // CHECK20:       omp_if.end:
5306 // CHECK20-NEXT:    ret void
5307 //
5308 //
5309 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..4
5310 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
5311 // CHECK20-NEXT:  entry:
5312 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5313 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5314 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5315 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5316 // CHECK20-NEXT:    ret void
5317 //
5318 //
5319 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
5320 // CHECK20-SAME: () #[[ATTR1]] {
5321 // CHECK20-NEXT:  entry:
5322 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
5323 // CHECK20-NEXT:    ret void
5324 //
5325 //
5326 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..7
5327 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
5328 // CHECK20-NEXT:  entry:
5329 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5330 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5331 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5332 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5333 // CHECK20-NEXT:    ret void
5334 //
5335 //
5336 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
5337 // CHECK20-SAME: (i32 [[A:%.*]]) #[[ATTR1]] {
5338 // CHECK20-NEXT:  entry:
5339 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5340 // CHECK20-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5341 // CHECK20-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5342 // CHECK20-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5343 // CHECK20-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5344 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5345 // CHECK20-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5346 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
5347 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[A_CASTED]], align 4
5348 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
5349 // CHECK20-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5350 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5351 // CHECK20-NEXT:    call void @.omp_outlined..8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i32 [[TMP2]]) #[[ATTR3]]
5352 // CHECK20-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5353 // CHECK20-NEXT:    ret void
5354 //
5355 //
5356 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..8
5357 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]]) #[[ATTR2]] {
5358 // CHECK20-NEXT:  entry:
5359 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5360 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5361 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5362 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5363 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5364 // CHECK20-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5365 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
5366 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
5367 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
5368 // CHECK20-NEXT:    ret void
5369 //
5370 //
5371 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
5372 // CHECK20-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
5373 // CHECK20-NEXT:  entry:
5374 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5375 // CHECK20-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
5376 // CHECK20-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5377 // CHECK20-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
5378 // CHECK20-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5379 // CHECK20-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
5380 // CHECK20-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
5381 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
5382 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[A_CASTED]], align 4
5383 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
5384 // CHECK20-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
5385 // CHECK20-NEXT:    [[CONV1:%.*]] = bitcast i32* [[B_CASTED]] to i16*
5386 // CHECK20-NEXT:    store i16 [[TMP2]], i16* [[CONV1]], align 2
5387 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
5388 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
5389 // CHECK20-NEXT:    ret void
5390 //
5391 //
5392 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..11
5393 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR2]] {
5394 // CHECK20-NEXT:  entry:
5395 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5396 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5397 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5398 // CHECK20-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
5399 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5400 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5401 // CHECK20-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5402 // CHECK20-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
5403 // CHECK20-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
5404 // CHECK20-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
5405 // CHECK20-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
5406 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
5407 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
5408 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
5409 // CHECK20-NEXT:    ret void
5410 //
5411 //
5412 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5413 // CHECK20-SAME: () #[[ATTR4:[0-9]+]] {
5414 // CHECK20-NEXT:  entry:
5415 // CHECK20-NEXT:    call void @__tgt_register_requires(i64 1)
5416 // CHECK20-NEXT:    ret void
5417 //
5418 //
5419 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
5420 // CHECK25-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
5421 // CHECK25-NEXT:  entry:
5422 // CHECK25-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5423 // CHECK25-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5424 // CHECK25-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5425 // CHECK25-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5426 // CHECK25-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
5427 // CHECK25-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5428 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5429 // CHECK25-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 8
5430 // CHECK25-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
5431 // CHECK25-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5432 // CHECK25:       omp_if.then:
5433 // CHECK25-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
5434 // CHECK25-NEXT:    br label [[OMP_IF_END:%.*]]
5435 // CHECK25:       omp_if.else:
5436 // CHECK25-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5437 // CHECK25-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5438 // CHECK25-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR2:[0-9]+]]
5439 // CHECK25-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5440 // CHECK25-NEXT:    br label [[OMP_IF_END]]
5441 // CHECK25:       omp_if.end:
5442 // CHECK25-NEXT:    ret void
5443 //
5444 //
5445 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined.
5446 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
5447 // CHECK25-NEXT:  entry:
5448 // CHECK25-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5449 // CHECK25-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5450 // CHECK25-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5451 // CHECK25-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5452 // CHECK25-NEXT:    ret void
5453 //
5454 //
5455 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
5456 // CHECK25-SAME: () #[[ATTR0]] {
5457 // CHECK25-NEXT:  entry:
5458 // CHECK25-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
5459 // CHECK25-NEXT:    ret void
5460 //
5461 //
5462 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..1
5463 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5464 // CHECK25-NEXT:  entry:
5465 // CHECK25-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5466 // CHECK25-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5467 // CHECK25-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5468 // CHECK25-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5469 // CHECK25-NEXT:    ret void
5470 //
5471 //
5472 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
5473 // CHECK25-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
5474 // CHECK25-NEXT:  entry:
5475 // CHECK25-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
5476 // CHECK25-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
5477 // CHECK25-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5478 // CHECK25-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
5479 // CHECK25-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5480 // CHECK25-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5481 // CHECK25-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5482 // CHECK25-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5483 // CHECK25-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
5484 // CHECK25-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
5485 // CHECK25-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5486 // CHECK25-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
5487 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
5488 // CHECK25-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5489 // CHECK25-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
5490 // CHECK25-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
5491 // CHECK25-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
5492 // CHECK25-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
5493 // CHECK25-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV1]], align 8
5494 // CHECK25-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
5495 // CHECK25-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5496 // CHECK25:       omp_if.then:
5497 // CHECK25-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP3]])
5498 // CHECK25-NEXT:    br label [[OMP_IF_END:%.*]]
5499 // CHECK25:       omp_if.else:
5500 // CHECK25-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5501 // CHECK25-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5502 // CHECK25-NEXT:    call void @.omp_outlined..2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i64 [[TMP3]]) #[[ATTR2]]
5503 // CHECK25-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5504 // CHECK25-NEXT:    br label [[OMP_IF_END]]
5505 // CHECK25:       omp_if.end:
5506 // CHECK25-NEXT:    ret void
5507 //
5508 //
5509 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..2
5510 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
5511 // CHECK25-NEXT:  entry:
5512 // CHECK25-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5513 // CHECK25-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5514 // CHECK25-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
5515 // CHECK25-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
5516 // CHECK25-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5517 // CHECK25-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5518 // CHECK25-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
5519 // CHECK25-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
5520 // CHECK25-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
5521 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
5522 // CHECK25-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
5523 // CHECK25-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
5524 // CHECK25-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
5525 // CHECK25-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
5526 // CHECK25-NEXT:    store double [[ADD]], double* [[A]], align 8
5527 // CHECK25-NEXT:    ret void
5528 //
5529 //
5530 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
5531 // CHECK25-SAME: (%struct.S1* [[THIS:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
5532 // CHECK25-NEXT:  entry:
5533 // CHECK25-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
5534 // CHECK25-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5535 // CHECK25-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5536 // CHECK25-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5537 // CHECK25-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5538 // CHECK25-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5539 // CHECK25-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
5540 // CHECK25-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5541 // CHECK25-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
5542 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5543 // CHECK25-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
5544 // CHECK25-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
5545 // CHECK25-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5546 // CHECK25:       omp_if.then:
5547 // CHECK25-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
5548 // CHECK25-NEXT:    br label [[OMP_IF_END:%.*]]
5549 // CHECK25:       omp_if.else:
5550 // CHECK25-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5551 // CHECK25-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5552 // CHECK25-NEXT:    call void @.omp_outlined..3(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR2]]
5553 // CHECK25-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5554 // CHECK25-NEXT:    br label [[OMP_IF_END]]
5555 // CHECK25:       omp_if.end:
5556 // CHECK25-NEXT:    ret void
5557 //
5558 //
5559 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..3
5560 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
5561 // CHECK25-NEXT:  entry:
5562 // CHECK25-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5563 // CHECK25-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5564 // CHECK25-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
5565 // CHECK25-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5566 // CHECK25-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5567 // CHECK25-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
5568 // CHECK25-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
5569 // CHECK25-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
5570 // CHECK25-NEXT:    store double 2.500000e+00, double* [[A]], align 8
5571 // CHECK25-NEXT:    ret void
5572 //
5573 //
5574 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
5575 // CHECK25-SAME: (i64 [[A:%.*]]) #[[ATTR0]] {
5576 // CHECK25-NEXT:  entry:
5577 // CHECK25-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
5578 // CHECK25-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
5579 // CHECK25-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5580 // CHECK25-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5581 // CHECK25-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5582 // CHECK25-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5583 // CHECK25-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
5584 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
5585 // CHECK25-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
5586 // CHECK25-NEXT:    [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
5587 // CHECK25-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
5588 // CHECK25-NEXT:    [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
5589 // CHECK25-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5590 // CHECK25-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5591 // CHECK25-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]]) #[[ATTR2]]
5592 // CHECK25-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5593 // CHECK25-NEXT:    ret void
5594 //
5595 //
5596 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..4
5597 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR1]] {
5598 // CHECK25-NEXT:  entry:
5599 // CHECK25-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5600 // CHECK25-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5601 // CHECK25-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
5602 // CHECK25-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5603 // CHECK25-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5604 // CHECK25-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
5605 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
5606 // CHECK25-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
5607 // CHECK25-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
5608 // CHECK25-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
5609 // CHECK25-NEXT:    ret void
5610 //
5611 //
5612 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
5613 // CHECK25-SAME: (i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
5614 // CHECK25-NEXT:  entry:
5615 // CHECK25-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
5616 // CHECK25-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
5617 // CHECK25-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
5618 // CHECK25-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
5619 // CHECK25-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
5620 // CHECK25-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
5621 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
5622 // CHECK25-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
5623 // CHECK25-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
5624 // CHECK25-NEXT:    [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
5625 // CHECK25-NEXT:    store i32 [[TMP0]], i32* [[CONV2]], align 4
5626 // CHECK25-NEXT:    [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
5627 // CHECK25-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
5628 // CHECK25-NEXT:    [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i16*
5629 // CHECK25-NEXT:    store i16 [[TMP2]], i16* [[CONV3]], align 2
5630 // CHECK25-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
5631 // CHECK25-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
5632 // CHECK25-NEXT:    ret void
5633 //
5634 //
5635 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..5
5636 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
5637 // CHECK25-NEXT:  entry:
5638 // CHECK25-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5639 // CHECK25-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5640 // CHECK25-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
5641 // CHECK25-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
5642 // CHECK25-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5643 // CHECK25-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5644 // CHECK25-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
5645 // CHECK25-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
5646 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
5647 // CHECK25-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
5648 // CHECK25-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
5649 // CHECK25-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
5650 // CHECK25-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
5651 // CHECK25-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
5652 // CHECK25-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
5653 // CHECK25-NEXT:    ret void
5654 //
5655 //
5656 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
5657 // CHECK26-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
5658 // CHECK26-NEXT:  entry:
5659 // CHECK26-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5660 // CHECK26-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5661 // CHECK26-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5662 // CHECK26-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5663 // CHECK26-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
5664 // CHECK26-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5665 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5666 // CHECK26-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 8
5667 // CHECK26-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
5668 // CHECK26-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5669 // CHECK26:       omp_if.then:
5670 // CHECK26-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
5671 // CHECK26-NEXT:    br label [[OMP_IF_END:%.*]]
5672 // CHECK26:       omp_if.else:
5673 // CHECK26-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5674 // CHECK26-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5675 // CHECK26-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR2:[0-9]+]]
5676 // CHECK26-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5677 // CHECK26-NEXT:    br label [[OMP_IF_END]]
5678 // CHECK26:       omp_if.end:
5679 // CHECK26-NEXT:    ret void
5680 //
5681 //
5682 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined.
5683 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
5684 // CHECK26-NEXT:  entry:
5685 // CHECK26-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5686 // CHECK26-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5687 // CHECK26-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5688 // CHECK26-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5689 // CHECK26-NEXT:    ret void
5690 //
5691 //
5692 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
5693 // CHECK26-SAME: () #[[ATTR0]] {
5694 // CHECK26-NEXT:  entry:
5695 // CHECK26-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
5696 // CHECK26-NEXT:    ret void
5697 //
5698 //
5699 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..1
5700 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5701 // CHECK26-NEXT:  entry:
5702 // CHECK26-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5703 // CHECK26-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5704 // CHECK26-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5705 // CHECK26-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5706 // CHECK26-NEXT:    ret void
5707 //
5708 //
5709 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
5710 // CHECK26-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
5711 // CHECK26-NEXT:  entry:
5712 // CHECK26-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
5713 // CHECK26-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
5714 // CHECK26-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5715 // CHECK26-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
5716 // CHECK26-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5717 // CHECK26-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5718 // CHECK26-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5719 // CHECK26-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5720 // CHECK26-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
5721 // CHECK26-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
5722 // CHECK26-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5723 // CHECK26-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
5724 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
5725 // CHECK26-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5726 // CHECK26-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
5727 // CHECK26-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
5728 // CHECK26-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
5729 // CHECK26-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
5730 // CHECK26-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV1]], align 8
5731 // CHECK26-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
5732 // CHECK26-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5733 // CHECK26:       omp_if.then:
5734 // CHECK26-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP3]])
5735 // CHECK26-NEXT:    br label [[OMP_IF_END:%.*]]
5736 // CHECK26:       omp_if.else:
5737 // CHECK26-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5738 // CHECK26-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5739 // CHECK26-NEXT:    call void @.omp_outlined..2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i64 [[TMP3]]) #[[ATTR2]]
5740 // CHECK26-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5741 // CHECK26-NEXT:    br label [[OMP_IF_END]]
5742 // CHECK26:       omp_if.end:
5743 // CHECK26-NEXT:    ret void
5744 //
5745 //
5746 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..2
5747 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
5748 // CHECK26-NEXT:  entry:
5749 // CHECK26-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5750 // CHECK26-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5751 // CHECK26-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
5752 // CHECK26-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
5753 // CHECK26-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5754 // CHECK26-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5755 // CHECK26-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
5756 // CHECK26-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
5757 // CHECK26-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
5758 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
5759 // CHECK26-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
5760 // CHECK26-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
5761 // CHECK26-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
5762 // CHECK26-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
5763 // CHECK26-NEXT:    store double [[ADD]], double* [[A]], align 8
5764 // CHECK26-NEXT:    ret void
5765 //
5766 //
5767 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
5768 // CHECK26-SAME: (%struct.S1* [[THIS:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
5769 // CHECK26-NEXT:  entry:
5770 // CHECK26-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
5771 // CHECK26-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5772 // CHECK26-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5773 // CHECK26-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5774 // CHECK26-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5775 // CHECK26-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5776 // CHECK26-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
5777 // CHECK26-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5778 // CHECK26-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
5779 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5780 // CHECK26-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
5781 // CHECK26-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
5782 // CHECK26-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5783 // CHECK26:       omp_if.then:
5784 // CHECK26-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
5785 // CHECK26-NEXT:    br label [[OMP_IF_END:%.*]]
5786 // CHECK26:       omp_if.else:
5787 // CHECK26-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5788 // CHECK26-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5789 // CHECK26-NEXT:    call void @.omp_outlined..3(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR2]]
5790 // CHECK26-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5791 // CHECK26-NEXT:    br label [[OMP_IF_END]]
5792 // CHECK26:       omp_if.end:
5793 // CHECK26-NEXT:    ret void
5794 //
5795 //
5796 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..3
5797 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
5798 // CHECK26-NEXT:  entry:
5799 // CHECK26-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5800 // CHECK26-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5801 // CHECK26-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
5802 // CHECK26-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5803 // CHECK26-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5804 // CHECK26-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
5805 // CHECK26-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
5806 // CHECK26-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
5807 // CHECK26-NEXT:    store double 2.500000e+00, double* [[A]], align 8
5808 // CHECK26-NEXT:    ret void
5809 //
5810 //
5811 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
5812 // CHECK26-SAME: (i64 [[A:%.*]]) #[[ATTR0]] {
5813 // CHECK26-NEXT:  entry:
5814 // CHECK26-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
5815 // CHECK26-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
5816 // CHECK26-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5817 // CHECK26-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5818 // CHECK26-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5819 // CHECK26-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5820 // CHECK26-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
5821 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
5822 // CHECK26-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
5823 // CHECK26-NEXT:    [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
5824 // CHECK26-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
5825 // CHECK26-NEXT:    [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
5826 // CHECK26-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5827 // CHECK26-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5828 // CHECK26-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]]) #[[ATTR2]]
5829 // CHECK26-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5830 // CHECK26-NEXT:    ret void
5831 //
5832 //
5833 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..4
5834 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR1]] {
5835 // CHECK26-NEXT:  entry:
5836 // CHECK26-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5837 // CHECK26-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5838 // CHECK26-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
5839 // CHECK26-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5840 // CHECK26-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5841 // CHECK26-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
5842 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
5843 // CHECK26-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
5844 // CHECK26-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
5845 // CHECK26-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
5846 // CHECK26-NEXT:    ret void
5847 //
5848 //
5849 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
5850 // CHECK26-SAME: (i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
5851 // CHECK26-NEXT:  entry:
5852 // CHECK26-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
5853 // CHECK26-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
5854 // CHECK26-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
5855 // CHECK26-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
5856 // CHECK26-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
5857 // CHECK26-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
5858 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
5859 // CHECK26-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
5860 // CHECK26-NEXT:    [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
5861 // CHECK26-NEXT:    [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
5862 // CHECK26-NEXT:    store i32 [[TMP0]], i32* [[CONV2]], align 4
5863 // CHECK26-NEXT:    [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
5864 // CHECK26-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
5865 // CHECK26-NEXT:    [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i16*
5866 // CHECK26-NEXT:    store i16 [[TMP2]], i16* [[CONV3]], align 2
5867 // CHECK26-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
5868 // CHECK26-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
5869 // CHECK26-NEXT:    ret void
5870 //
5871 //
5872 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..5
5873 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
5874 // CHECK26-NEXT:  entry:
5875 // CHECK26-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5876 // CHECK26-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5877 // CHECK26-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
5878 // CHECK26-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
5879 // CHECK26-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5880 // CHECK26-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5881 // CHECK26-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
5882 // CHECK26-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
5883 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
5884 // CHECK26-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
5885 // CHECK26-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
5886 // CHECK26-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
5887 // CHECK26-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
5888 // CHECK26-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
5889 // CHECK26-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
5890 // CHECK26-NEXT:    ret void
5891 //
5892 //
5893 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
5894 // CHECK27-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
5895 // CHECK27-NEXT:  entry:
5896 // CHECK27-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5897 // CHECK27-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5898 // CHECK27-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5899 // CHECK27-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5900 // CHECK27-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
5901 // CHECK27-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5902 // CHECK27-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5903 // CHECK27-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 4
5904 // CHECK27-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
5905 // CHECK27-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5906 // CHECK27:       omp_if.then:
5907 // CHECK27-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
5908 // CHECK27-NEXT:    br label [[OMP_IF_END:%.*]]
5909 // CHECK27:       omp_if.else:
5910 // CHECK27-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5911 // CHECK27-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5912 // CHECK27-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR2:[0-9]+]]
5913 // CHECK27-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5914 // CHECK27-NEXT:    br label [[OMP_IF_END]]
5915 // CHECK27:       omp_if.end:
5916 // CHECK27-NEXT:    ret void
5917 //
5918 //
5919 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined.
5920 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
5921 // CHECK27-NEXT:  entry:
5922 // CHECK27-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5923 // CHECK27-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5924 // CHECK27-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5925 // CHECK27-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5926 // CHECK27-NEXT:    ret void
5927 //
5928 //
5929 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
5930 // CHECK27-SAME: () #[[ATTR0]] {
5931 // CHECK27-NEXT:  entry:
5932 // CHECK27-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
5933 // CHECK27-NEXT:    ret void
5934 //
5935 //
5936 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..1
5937 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5938 // CHECK27-NEXT:  entry:
5939 // CHECK27-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5940 // CHECK27-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5941 // CHECK27-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5942 // CHECK27-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5943 // CHECK27-NEXT:    ret void
5944 //
5945 //
5946 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
5947 // CHECK27-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
5948 // CHECK27-NEXT:  entry:
5949 // CHECK27-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
5950 // CHECK27-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
5951 // CHECK27-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5952 // CHECK27-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
5953 // CHECK27-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
5954 // CHECK27-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5955 // CHECK27-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5956 // CHECK27-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5957 // CHECK27-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
5958 // CHECK27-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
5959 // CHECK27-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5960 // CHECK27-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
5961 // CHECK27-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5962 // CHECK27-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B_ADDR]], align 4
5963 // CHECK27-NEXT:    store i32 [[TMP2]], i32* [[B_CASTED]], align 4
5964 // CHECK27-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
5965 // CHECK27-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV]], align 4
5966 // CHECK27-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
5967 // CHECK27-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5968 // CHECK27:       omp_if.then:
5969 // CHECK27-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP3]])
5970 // CHECK27-NEXT:    br label [[OMP_IF_END:%.*]]
5971 // CHECK27:       omp_if.else:
5972 // CHECK27-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5973 // CHECK27-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
5974 // CHECK27-NEXT:    call void @.omp_outlined..2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i32 [[TMP3]]) #[[ATTR2]]
5975 // CHECK27-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5976 // CHECK27-NEXT:    br label [[OMP_IF_END]]
5977 // CHECK27:       omp_if.end:
5978 // CHECK27-NEXT:    ret void
5979 //
5980 //
5981 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..2
5982 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
5983 // CHECK27-NEXT:  entry:
5984 // CHECK27-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5985 // CHECK27-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5986 // CHECK27-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
5987 // CHECK27-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
5988 // CHECK27-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5989 // CHECK27-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5990 // CHECK27-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
5991 // CHECK27-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
5992 // CHECK27-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
5993 // CHECK27-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
5994 // CHECK27-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
5995 // CHECK27-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
5996 // CHECK27-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
5997 // CHECK27-NEXT:    store double [[ADD]], double* [[A]], align 4
5998 // CHECK27-NEXT:    ret void
5999 //
6000 //
6001 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
6002 // CHECK27-SAME: (%struct.S1* [[THIS:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
6003 // CHECK27-NEXT:  entry:
6004 // CHECK27-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
6005 // CHECK27-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
6006 // CHECK27-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6007 // CHECK27-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6008 // CHECK27-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6009 // CHECK27-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
6010 // CHECK27-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
6011 // CHECK27-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
6012 // CHECK27-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
6013 // CHECK27-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6014 // CHECK27-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 4
6015 // CHECK27-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
6016 // CHECK27-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6017 // CHECK27:       omp_if.then:
6018 // CHECK27-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
6019 // CHECK27-NEXT:    br label [[OMP_IF_END:%.*]]
6020 // CHECK27:       omp_if.else:
6021 // CHECK27-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
6022 // CHECK27-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
6023 // CHECK27-NEXT:    call void @.omp_outlined..3(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR2]]
6024 // CHECK27-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
6025 // CHECK27-NEXT:    br label [[OMP_IF_END]]
6026 // CHECK27:       omp_if.end:
6027 // CHECK27-NEXT:    ret void
6028 //
6029 //
6030 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..3
6031 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
6032 // CHECK27-NEXT:  entry:
6033 // CHECK27-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6034 // CHECK27-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6035 // CHECK27-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
6036 // CHECK27-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6037 // CHECK27-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6038 // CHECK27-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
6039 // CHECK27-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
6040 // CHECK27-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
6041 // CHECK27-NEXT:    store double 2.500000e+00, double* [[A]], align 4
6042 // CHECK27-NEXT:    ret void
6043 //
6044 //
6045 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
6046 // CHECK27-SAME: (i32 [[A:%.*]]) #[[ATTR0]] {
6047 // CHECK27-NEXT:  entry:
6048 // CHECK27-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6049 // CHECK27-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
6050 // CHECK27-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6051 // CHECK27-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6052 // CHECK27-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6053 // CHECK27-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
6054 // CHECK27-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
6055 // CHECK27-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
6056 // CHECK27-NEXT:    store i32 [[TMP1]], i32* [[A_CASTED]], align 4
6057 // CHECK27-NEXT:    [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
6058 // CHECK27-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
6059 // CHECK27-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
6060 // CHECK27-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i32 [[TMP2]]) #[[ATTR2]]
6061 // CHECK27-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
6062 // CHECK27-NEXT:    ret void
6063 //
6064 //
6065 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..4
6066 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]]) #[[ATTR1]] {
6067 // CHECK27-NEXT:  entry:
6068 // CHECK27-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6069 // CHECK27-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6070 // CHECK27-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6071 // CHECK27-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6072 // CHECK27-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6073 // CHECK27-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
6074 // CHECK27-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
6075 // CHECK27-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
6076 // CHECK27-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
6077 // CHECK27-NEXT:    ret void
6078 //
6079 //
6080 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
6081 // CHECK27-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
6082 // CHECK27-NEXT:  entry:
6083 // CHECK27-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6084 // CHECK27-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
6085 // CHECK27-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
6086 // CHECK27-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
6087 // CHECK27-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
6088 // CHECK27-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
6089 // CHECK27-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
6090 // CHECK27-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
6091 // CHECK27-NEXT:    store i32 [[TMP0]], i32* [[A_CASTED]], align 4
6092 // CHECK27-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
6093 // CHECK27-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
6094 // CHECK27-NEXT:    [[CONV1:%.*]] = bitcast i32* [[B_CASTED]] to i16*
6095 // CHECK27-NEXT:    store i16 [[TMP2]], i16* [[CONV1]], align 2
6096 // CHECK27-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
6097 // CHECK27-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
6098 // CHECK27-NEXT:    ret void
6099 //
6100 //
6101 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..5
6102 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
6103 // CHECK27-NEXT:  entry:
6104 // CHECK27-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6105 // CHECK27-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6106 // CHECK27-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6107 // CHECK27-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
6108 // CHECK27-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6109 // CHECK27-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6110 // CHECK27-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
6111 // CHECK27-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
6112 // CHECK27-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
6113 // CHECK27-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
6114 // CHECK27-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
6115 // CHECK27-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
6116 // CHECK27-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
6117 // CHECK27-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
6118 // CHECK27-NEXT:    ret void
6119 //
6120 //
6121 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
6122 // CHECK28-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
6123 // CHECK28-NEXT:  entry:
6124 // CHECK28-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
6125 // CHECK28-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6126 // CHECK28-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6127 // CHECK28-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6128 // CHECK28-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
6129 // CHECK28-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
6130 // CHECK28-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6131 // CHECK28-NEXT:    [[TMP1:%.*]] = load i8, i8* [[CONV]], align 4
6132 // CHECK28-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1
6133 // CHECK28-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6134 // CHECK28:       omp_if.then:
6135 // CHECK28-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
6136 // CHECK28-NEXT:    br label [[OMP_IF_END:%.*]]
6137 // CHECK28:       omp_if.else:
6138 // CHECK28-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
6139 // CHECK28-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
6140 // CHECK28-NEXT:    call void @.omp_outlined.(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]]) #[[ATTR2:[0-9]+]]
6141 // CHECK28-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
6142 // CHECK28-NEXT:    br label [[OMP_IF_END]]
6143 // CHECK28:       omp_if.end:
6144 // CHECK28-NEXT:    ret void
6145 //
6146 //
6147 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined.
6148 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
6149 // CHECK28-NEXT:  entry:
6150 // CHECK28-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6151 // CHECK28-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6152 // CHECK28-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6153 // CHECK28-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6154 // CHECK28-NEXT:    ret void
6155 //
6156 //
6157 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
6158 // CHECK28-SAME: () #[[ATTR0]] {
6159 // CHECK28-NEXT:  entry:
6160 // CHECK28-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
6161 // CHECK28-NEXT:    ret void
6162 //
6163 //
6164 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..1
6165 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6166 // CHECK28-NEXT:  entry:
6167 // CHECK28-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6168 // CHECK28-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6169 // CHECK28-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6170 // CHECK28-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6171 // CHECK28-NEXT:    ret void
6172 //
6173 //
6174 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
6175 // CHECK28-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
6176 // CHECK28-NEXT:  entry:
6177 // CHECK28-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
6178 // CHECK28-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
6179 // CHECK28-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
6180 // CHECK28-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
6181 // CHECK28-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6182 // CHECK28-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6183 // CHECK28-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6184 // CHECK28-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
6185 // CHECK28-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
6186 // CHECK28-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
6187 // CHECK28-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
6188 // CHECK28-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
6189 // CHECK28-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6190 // CHECK28-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B_ADDR]], align 4
6191 // CHECK28-NEXT:    store i32 [[TMP2]], i32* [[B_CASTED]], align 4
6192 // CHECK28-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
6193 // CHECK28-NEXT:    [[TMP4:%.*]] = load i8, i8* [[CONV]], align 4
6194 // CHECK28-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1
6195 // CHECK28-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6196 // CHECK28:       omp_if.then:
6197 // CHECK28-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP3]])
6198 // CHECK28-NEXT:    br label [[OMP_IF_END:%.*]]
6199 // CHECK28:       omp_if.else:
6200 // CHECK28-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
6201 // CHECK28-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
6202 // CHECK28-NEXT:    call void @.omp_outlined..2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]], i32 [[TMP3]]) #[[ATTR2]]
6203 // CHECK28-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
6204 // CHECK28-NEXT:    br label [[OMP_IF_END]]
6205 // CHECK28:       omp_if.end:
6206 // CHECK28-NEXT:    ret void
6207 //
6208 //
6209 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..2
6210 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
6211 // CHECK28-NEXT:  entry:
6212 // CHECK28-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6213 // CHECK28-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6214 // CHECK28-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
6215 // CHECK28-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
6216 // CHECK28-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6217 // CHECK28-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6218 // CHECK28-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
6219 // CHECK28-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
6220 // CHECK28-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
6221 // CHECK28-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
6222 // CHECK28-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
6223 // CHECK28-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
6224 // CHECK28-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
6225 // CHECK28-NEXT:    store double [[ADD]], double* [[A]], align 4
6226 // CHECK28-NEXT:    ret void
6227 //
6228 //
6229 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
6230 // CHECK28-SAME: (%struct.S1* [[THIS:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
6231 // CHECK28-NEXT:  entry:
6232 // CHECK28-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
6233 // CHECK28-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
6234 // CHECK28-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6235 // CHECK28-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6236 // CHECK28-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6237 // CHECK28-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
6238 // CHECK28-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
6239 // CHECK28-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
6240 // CHECK28-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
6241 // CHECK28-NEXT:    [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6242 // CHECK28-NEXT:    [[TMP2:%.*]] = load i8, i8* [[CONV]], align 4
6243 // CHECK28-NEXT:    [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
6244 // CHECK28-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6245 // CHECK28:       omp_if.then:
6246 // CHECK28-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
6247 // CHECK28-NEXT:    br label [[OMP_IF_END:%.*]]
6248 // CHECK28:       omp_if.else:
6249 // CHECK28-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
6250 // CHECK28-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
6251 // CHECK28-NEXT:    call void @.omp_outlined..3(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.S1* [[TMP1]]) #[[ATTR2]]
6252 // CHECK28-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
6253 // CHECK28-NEXT:    br label [[OMP_IF_END]]
6254 // CHECK28:       omp_if.end:
6255 // CHECK28-NEXT:    ret void
6256 //
6257 //
6258 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..3
6259 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
6260 // CHECK28-NEXT:  entry:
6261 // CHECK28-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6262 // CHECK28-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6263 // CHECK28-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
6264 // CHECK28-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6265 // CHECK28-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6266 // CHECK28-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
6267 // CHECK28-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
6268 // CHECK28-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
6269 // CHECK28-NEXT:    store double 2.500000e+00, double* [[A]], align 4
6270 // CHECK28-NEXT:    ret void
6271 //
6272 //
6273 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87
6274 // CHECK28-SAME: (i32 [[A:%.*]]) #[[ATTR0]] {
6275 // CHECK28-NEXT:  entry:
6276 // CHECK28-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6277 // CHECK28-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
6278 // CHECK28-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
6279 // CHECK28-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6280 // CHECK28-NEXT:    store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6281 // CHECK28-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
6282 // CHECK28-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
6283 // CHECK28-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
6284 // CHECK28-NEXT:    store i32 [[TMP1]], i32* [[A_CASTED]], align 4
6285 // CHECK28-NEXT:    [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
6286 // CHECK28-NEXT:    call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
6287 // CHECK28-NEXT:    store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4
6288 // CHECK28-NEXT:    call void @.omp_outlined..4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i32 [[TMP2]]) #[[ATTR2]]
6289 // CHECK28-NEXT:    call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
6290 // CHECK28-NEXT:    ret void
6291 //
6292 //
6293 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..4
6294 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]]) #[[ATTR1]] {
6295 // CHECK28-NEXT:  entry:
6296 // CHECK28-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6297 // CHECK28-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6298 // CHECK28-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6299 // CHECK28-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6300 // CHECK28-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6301 // CHECK28-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
6302 // CHECK28-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
6303 // CHECK28-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
6304 // CHECK28-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
6305 // CHECK28-NEXT:    ret void
6306 //
6307 //
6308 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
6309 // CHECK28-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
6310 // CHECK28-NEXT:  entry:
6311 // CHECK28-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6312 // CHECK28-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
6313 // CHECK28-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
6314 // CHECK28-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
6315 // CHECK28-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
6316 // CHECK28-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
6317 // CHECK28-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
6318 // CHECK28-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
6319 // CHECK28-NEXT:    store i32 [[TMP0]], i32* [[A_CASTED]], align 4
6320 // CHECK28-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
6321 // CHECK28-NEXT:    [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
6322 // CHECK28-NEXT:    [[CONV1:%.*]] = bitcast i32* [[B_CASTED]] to i16*
6323 // CHECK28-NEXT:    store i16 [[TMP2]], i16* [[CONV1]], align 2
6324 // CHECK28-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
6325 // CHECK28-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
6326 // CHECK28-NEXT:    ret void
6327 //
6328 //
6329 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..5
6330 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
6331 // CHECK28-NEXT:  entry:
6332 // CHECK28-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6333 // CHECK28-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6334 // CHECK28-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6335 // CHECK28-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
6336 // CHECK28-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6337 // CHECK28-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6338 // CHECK28-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
6339 // CHECK28-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
6340 // CHECK28-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
6341 // CHECK28-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
6342 // CHECK28-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
6343 // CHECK28-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
6344 // CHECK28-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
6345 // CHECK28-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
6346 // CHECK28-NEXT:    ret void
6347 //
6348