1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5 
6 // Test host codegen.
7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
10 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
13 
14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
15 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
17 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
18 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
20 
21 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
22 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
23 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
24 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
25 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
26 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
27 
28 #ifdef CK1
29 
30 template <typename T, int X, long long Y>
31 struct SS{
32   T a[X];
33   float b;
fooSS34   int foo(void) {
35 
36     #pragma omp target teams distribute parallel for
37     for(int i = 0; i < X; i++) {
38       a[i] = (T)0;
39     }
40     #pragma omp target teams distribute parallel for schedule(static)
41     for(int i = 0; i < X; i++) {
42       a[i] = (T)0;
43     }
44     #pragma omp target teams distribute parallel for schedule(static, X/2)
45     for(int i = 0; i < X; i++) {
46       a[i] = (T)0;
47     }
48 
49     #pragma omp target teams distribute parallel for schedule(dynamic)
50     for(int i = 0; i < X; i++) {
51       a[i] = (T)0;
52     }
53 
54     #pragma omp target teams distribute parallel for schedule(dynamic, X/2)
55     for(int i = 0; i < X; i++) {
56       a[i] = (T)0;
57     }
58 
59 
60 
61 
62 
63 
64 
65 
66 
67 
68 
69 
70 
71 
72 
73 
74     return a[0];
75   }
76 };
77 
teams_template_struct(void)78 int teams_template_struct(void) {
79   SS<int, 123, 456> V;
80   return V.foo();
81 
82 }
83 #endif // CK1
84 
85 // Test host codegen.
86 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
87 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
88 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14
89 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
90 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
91 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16
92 
93 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
94 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
95 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18
96 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
97 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
98 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20
99 
100 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
101 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
102 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
103 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
104 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
105 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
106 #ifdef CK2
107 
108 template <typename T, int n>
tmain(T argc)109 int tmain(T argc) {
110   T a[n];
111   int m = 10;
112 #pragma omp target teams distribute parallel for
113   for(int i = 0; i < n; i++) {
114     a[i] = (T)0;
115   }
116 #pragma omp target teams distribute parallel for schedule(static)
117   for(int i = 0; i < n; i++) {
118     a[i] = (T)0;
119   }
120 #pragma omp target teams distribute parallel for schedule(static, m)
121   for(int i = 0; i < n; i++) {
122     a[i] = (T)0;
123   }
124 #pragma omp target teams distribute parallel for schedule(dynamic)
125   for(int i = 0; i < n; i++) {
126     a[i] = (T)0;
127   }
128 #pragma omp target teams distribute parallel for schedule(dynamic, m)
129   for(int i = 0; i < n; i++) {
130     a[i] = (T)0;
131   }
132   return 0;
133 }
134 
main(int argc,char ** argv)135 int main (int argc, char **argv) {
136   int n = 100;
137   int a[n];
138   int m = 10;
139 #pragma omp target teams distribute parallel for
140   for(int i = 0; i < n; i++) {
141     a[i] = 0;
142   }
143 #pragma omp target teams distribute parallel for dist_schedule(static)
144   for(int i = 0; i < n; i++) {
145     a[i] = 0;
146   }
147 #pragma omp target teams distribute parallel for dist_schedule(static, m)
148   for(int i = 0; i < n; i++) {
149     a[i] = 0;
150   }
151 #pragma omp target teams distribute parallel for schedule(dynamic)
152   for(int i = 0; i < n; i++) {
153     a[i] = 0;
154   }
155 #pragma omp target teams distribute parallel for schedule(dynamic, m)
156   for(int i = 0; i < n; i++) {
157     a[i] = 0;
158   }
159   return tmain<int, 10>(argc);
160 }
161 
162 
163 
164 
165 
166 
167 
168 
169 
170 
171 
172 
173 
174 
175 
176 
177 
178 
179 
180 
181 
182 
183 
184 
185 
186 
187 
188 
189 
190 
191 
192 
193 
194 
195 #endif // CK2
196 #endif // #ifndef HEADER
197 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
198 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
199 // CHECK1-NEXT:  entry:
200 // CHECK1-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
201 // CHECK1-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
202 // CHECK1-NEXT:    ret i32 [[CALL]]
203 //
204 //
205 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
206 // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
207 // CHECK1-NEXT:  entry:
208 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
209 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
210 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
211 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
212 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
213 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
214 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
215 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
216 // CHECK1-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
217 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
218 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
219 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
220 // CHECK1-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
221 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
222 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
223 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
224 // CHECK1-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
225 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
226 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
227 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
228 // CHECK1-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
229 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
230 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
231 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
232 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
233 // CHECK1-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
234 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
235 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
236 // CHECK1-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
237 // CHECK1-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
238 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
239 // CHECK1-NEXT:    store i8* null, i8** [[TMP4]], align 8
240 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
241 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
242 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
243 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
244 // CHECK1-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
245 // CHECK1-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
246 // CHECK1:       omp_offload.failed:
247 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
248 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
249 // CHECK1:       omp_offload.cont:
250 // CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
251 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
252 // CHECK1-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
253 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
254 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
255 // CHECK1-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
256 // CHECK1-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
257 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
258 // CHECK1-NEXT:    store i8* null, i8** [[TMP13]], align 8
259 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
260 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
261 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
262 // CHECK1-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
263 // CHECK1-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
264 // CHECK1-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
265 // CHECK1:       omp_offload.failed7:
266 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
267 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
268 // CHECK1:       omp_offload.cont8:
269 // CHECK1-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
270 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
271 // CHECK1-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
272 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
273 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
274 // CHECK1-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
275 // CHECK1-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
276 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
277 // CHECK1-NEXT:    store i8* null, i8** [[TMP22]], align 8
278 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
279 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
280 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
281 // CHECK1-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
282 // CHECK1-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
283 // CHECK1-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
284 // CHECK1:       omp_offload.failed14:
285 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
286 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
287 // CHECK1:       omp_offload.cont15:
288 // CHECK1-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
289 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
290 // CHECK1-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
291 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
292 // CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
293 // CHECK1-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
294 // CHECK1-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
295 // CHECK1-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
296 // CHECK1-NEXT:    store i8* null, i8** [[TMP31]], align 8
297 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
298 // CHECK1-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
299 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
300 // CHECK1-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
301 // CHECK1-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
302 // CHECK1-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
303 // CHECK1:       omp_offload.failed21:
304 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
305 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
306 // CHECK1:       omp_offload.cont22:
307 // CHECK1-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
308 // CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
309 // CHECK1-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
310 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
311 // CHECK1-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
312 // CHECK1-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
313 // CHECK1-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
314 // CHECK1-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
315 // CHECK1-NEXT:    store i8* null, i8** [[TMP40]], align 8
316 // CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
317 // CHECK1-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
318 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
319 // CHECK1-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
320 // CHECK1-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
321 // CHECK1-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
322 // CHECK1:       omp_offload.failed28:
323 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
324 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
325 // CHECK1:       omp_offload.cont29:
326 // CHECK1-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
327 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
328 // CHECK1-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
329 // CHECK1-NEXT:    ret i32 [[TMP45]]
330 //
331 //
332 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
333 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
334 // CHECK1-NEXT:  entry:
335 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
336 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
337 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
338 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
339 // CHECK1-NEXT:    ret void
340 //
341 //
342 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
343 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
344 // CHECK1-NEXT:  entry:
345 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
346 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
347 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
348 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
349 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
350 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
351 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
352 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
353 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
354 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
355 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
356 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
357 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
358 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
359 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
360 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
361 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
362 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
363 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
364 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
365 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
366 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
367 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
368 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
369 // CHECK1:       cond.true:
370 // CHECK1-NEXT:    br label [[COND_END:%.*]]
371 // CHECK1:       cond.false:
372 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
373 // CHECK1-NEXT:    br label [[COND_END]]
374 // CHECK1:       cond.end:
375 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
376 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
377 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
378 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
379 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
380 // CHECK1:       omp.inner.for.cond:
381 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
382 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
383 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
384 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
385 // CHECK1:       omp.inner.for.body:
386 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
387 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
388 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
389 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
390 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
391 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
392 // CHECK1:       omp.inner.for.inc:
393 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
394 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
395 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
396 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
397 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
398 // CHECK1:       omp.inner.for.end:
399 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
400 // CHECK1:       omp.loop.exit:
401 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
402 // CHECK1-NEXT:    ret void
403 //
404 //
405 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
406 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
407 // CHECK1-NEXT:  entry:
408 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
409 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
410 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
411 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
412 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
413 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
414 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
415 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
416 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
417 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
418 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
419 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
420 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
421 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
422 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
423 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
424 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
425 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
426 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
427 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
428 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
429 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
430 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
431 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
432 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
433 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
434 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
435 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
436 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
437 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
438 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
439 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
440 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
441 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
442 // CHECK1:       cond.true:
443 // CHECK1-NEXT:    br label [[COND_END:%.*]]
444 // CHECK1:       cond.false:
445 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
446 // CHECK1-NEXT:    br label [[COND_END]]
447 // CHECK1:       cond.end:
448 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
449 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
450 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
451 // CHECK1-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
452 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
453 // CHECK1:       omp.inner.for.cond:
454 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
455 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
456 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
457 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
458 // CHECK1:       omp.inner.for.body:
459 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
460 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
461 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
462 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
463 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
464 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
465 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
466 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
467 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
468 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
469 // CHECK1:       omp.body.continue:
470 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
471 // CHECK1:       omp.inner.for.inc:
472 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
473 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
474 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
475 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
476 // CHECK1:       omp.inner.for.end:
477 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
478 // CHECK1:       omp.loop.exit:
479 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
480 // CHECK1-NEXT:    ret void
481 //
482 //
483 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
484 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
485 // CHECK1-NEXT:  entry:
486 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
487 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
488 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
489 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
490 // CHECK1-NEXT:    ret void
491 //
492 //
493 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
494 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
495 // CHECK1-NEXT:  entry:
496 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
497 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
498 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
499 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
500 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
501 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
502 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
503 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
504 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
505 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
506 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
507 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
508 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
509 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
510 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
511 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
512 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
513 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
514 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
515 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
516 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
517 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
518 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
519 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
520 // CHECK1:       cond.true:
521 // CHECK1-NEXT:    br label [[COND_END:%.*]]
522 // CHECK1:       cond.false:
523 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
524 // CHECK1-NEXT:    br label [[COND_END]]
525 // CHECK1:       cond.end:
526 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
527 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
528 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
529 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
530 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
531 // CHECK1:       omp.inner.for.cond:
532 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
533 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
534 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
535 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
536 // CHECK1:       omp.inner.for.body:
537 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
538 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
539 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
540 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
541 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
542 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
543 // CHECK1:       omp.inner.for.inc:
544 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
545 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
546 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
547 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
548 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
549 // CHECK1:       omp.inner.for.end:
550 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
551 // CHECK1:       omp.loop.exit:
552 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
553 // CHECK1-NEXT:    ret void
554 //
555 //
556 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
557 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
558 // CHECK1-NEXT:  entry:
559 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
560 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
561 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
562 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
563 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
564 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
565 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
566 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
567 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
568 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
569 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
570 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
571 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
572 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
573 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
574 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
575 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
576 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
577 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
578 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
579 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
580 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
581 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
582 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
583 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
584 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
585 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
586 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
587 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
588 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
589 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
590 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
591 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
592 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
593 // CHECK1:       cond.true:
594 // CHECK1-NEXT:    br label [[COND_END:%.*]]
595 // CHECK1:       cond.false:
596 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
597 // CHECK1-NEXT:    br label [[COND_END]]
598 // CHECK1:       cond.end:
599 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
600 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
601 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
602 // CHECK1-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
603 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
604 // CHECK1:       omp.inner.for.cond:
605 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
606 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
607 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
608 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
609 // CHECK1:       omp.inner.for.body:
610 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
611 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
612 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
613 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
614 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
615 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
616 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
617 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
618 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
619 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
620 // CHECK1:       omp.body.continue:
621 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
622 // CHECK1:       omp.inner.for.inc:
623 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
624 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
625 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
626 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
627 // CHECK1:       omp.inner.for.end:
628 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
629 // CHECK1:       omp.loop.exit:
630 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
631 // CHECK1-NEXT:    ret void
632 //
633 //
634 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
635 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
636 // CHECK1-NEXT:  entry:
637 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
638 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
639 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
640 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
641 // CHECK1-NEXT:    ret void
642 //
643 //
644 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
645 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
646 // CHECK1-NEXT:  entry:
647 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
648 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
649 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
650 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
651 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
652 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
653 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
654 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
655 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
656 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
657 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
658 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
659 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
660 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
661 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
662 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
663 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
664 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
665 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
666 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
667 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
668 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
669 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
670 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
671 // CHECK1:       cond.true:
672 // CHECK1-NEXT:    br label [[COND_END:%.*]]
673 // CHECK1:       cond.false:
674 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
675 // CHECK1-NEXT:    br label [[COND_END]]
676 // CHECK1:       cond.end:
677 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
678 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
679 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
680 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
681 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
682 // CHECK1:       omp.inner.for.cond:
683 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
684 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
685 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
686 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
687 // CHECK1:       omp.inner.for.body:
688 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
689 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
690 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
691 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
692 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
693 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
694 // CHECK1:       omp.inner.for.inc:
695 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
696 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
697 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
698 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
699 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
700 // CHECK1:       omp.inner.for.end:
701 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
702 // CHECK1:       omp.loop.exit:
703 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
704 // CHECK1-NEXT:    ret void
705 //
706 //
707 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
708 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
709 // CHECK1-NEXT:  entry:
710 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
711 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
712 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
713 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
714 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
715 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
716 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
717 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
718 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
719 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
720 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
721 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
722 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
723 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
724 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
725 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
726 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
727 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
728 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
729 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
730 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
731 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
732 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
733 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
734 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
735 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
736 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
737 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
738 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
739 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
740 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
741 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
742 // CHECK1:       omp.dispatch.cond:
743 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
744 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
745 // CHECK1-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
746 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
747 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
748 // CHECK1:       cond.true:
749 // CHECK1-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
750 // CHECK1-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
751 // CHECK1-NEXT:    br label [[COND_END:%.*]]
752 // CHECK1:       cond.false:
753 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
754 // CHECK1-NEXT:    br label [[COND_END]]
755 // CHECK1:       cond.end:
756 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
757 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
758 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
759 // CHECK1-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
760 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
761 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
762 // CHECK1-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
763 // CHECK1-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
764 // CHECK1:       omp.dispatch.body:
765 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
766 // CHECK1:       omp.inner.for.cond:
767 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
768 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
769 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
770 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
771 // CHECK1:       omp.inner.for.body:
772 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
773 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
774 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
775 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
776 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
777 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
778 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
779 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
780 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
781 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
782 // CHECK1:       omp.body.continue:
783 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
784 // CHECK1:       omp.inner.for.inc:
785 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
786 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
787 // CHECK1-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
788 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
789 // CHECK1:       omp.inner.for.end:
790 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
791 // CHECK1:       omp.dispatch.inc:
792 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
793 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
794 // CHECK1-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
795 // CHECK1-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
796 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
797 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
798 // CHECK1-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
799 // CHECK1-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
800 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
801 // CHECK1:       omp.dispatch.end:
802 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
803 // CHECK1-NEXT:    ret void
804 //
805 //
806 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
807 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
808 // CHECK1-NEXT:  entry:
809 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
810 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
811 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
812 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
813 // CHECK1-NEXT:    ret void
814 //
815 //
816 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
817 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
818 // CHECK1-NEXT:  entry:
819 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
820 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
821 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
822 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
823 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
824 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
825 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
826 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
827 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
828 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
829 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
830 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
831 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
832 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
833 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
834 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
835 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
836 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
837 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
838 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
839 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
840 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
841 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
842 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
843 // CHECK1:       cond.true:
844 // CHECK1-NEXT:    br label [[COND_END:%.*]]
845 // CHECK1:       cond.false:
846 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
847 // CHECK1-NEXT:    br label [[COND_END]]
848 // CHECK1:       cond.end:
849 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
850 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
851 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
852 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
853 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
854 // CHECK1:       omp.inner.for.cond:
855 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
856 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
857 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
858 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
859 // CHECK1:       omp.inner.for.body:
860 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
861 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
862 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
863 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
864 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
865 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
866 // CHECK1:       omp.inner.for.inc:
867 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
868 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
869 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
870 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
871 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
872 // CHECK1:       omp.inner.for.end:
873 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
874 // CHECK1:       omp.loop.exit:
875 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
876 // CHECK1-NEXT:    ret void
877 //
878 //
879 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
880 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
881 // CHECK1-NEXT:  entry:
882 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
883 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
884 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
885 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
886 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
887 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
888 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
889 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
890 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
891 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
892 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
893 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
894 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
895 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
896 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
897 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
898 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
899 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
900 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
901 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
902 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
903 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
904 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
905 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
906 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
907 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
908 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
909 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
910 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
911 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
912 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
913 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
914 // CHECK1-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
915 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
916 // CHECK1:       omp.dispatch.cond:
917 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
918 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
919 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
920 // CHECK1:       omp.dispatch.body:
921 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
922 // CHECK1-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
923 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
924 // CHECK1:       omp.inner.for.cond:
925 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
926 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
927 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
928 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
929 // CHECK1:       omp.inner.for.body:
930 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
931 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
932 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
933 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
934 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
935 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
936 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
937 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
938 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
939 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
940 // CHECK1:       omp.body.continue:
941 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
942 // CHECK1:       omp.inner.for.inc:
943 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
944 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
945 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
946 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
947 // CHECK1:       omp.inner.for.end:
948 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
949 // CHECK1:       omp.dispatch.inc:
950 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
951 // CHECK1:       omp.dispatch.end:
952 // CHECK1-NEXT:    ret void
953 //
954 //
955 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
956 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
957 // CHECK1-NEXT:  entry:
958 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
959 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
960 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
961 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
962 // CHECK1-NEXT:    ret void
963 //
964 //
965 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
966 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
967 // CHECK1-NEXT:  entry:
968 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
969 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
970 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
971 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
972 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
973 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
974 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
975 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
976 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
977 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
978 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
979 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
980 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
981 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
982 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
983 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
984 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
985 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
986 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
987 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
988 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
989 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
990 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
991 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
992 // CHECK1:       cond.true:
993 // CHECK1-NEXT:    br label [[COND_END:%.*]]
994 // CHECK1:       cond.false:
995 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
996 // CHECK1-NEXT:    br label [[COND_END]]
997 // CHECK1:       cond.end:
998 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
999 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1000 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1001 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1002 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1003 // CHECK1:       omp.inner.for.cond:
1004 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1005 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1006 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1007 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1008 // CHECK1:       omp.inner.for.body:
1009 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1010 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1011 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1012 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1013 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1014 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1015 // CHECK1:       omp.inner.for.inc:
1016 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1017 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1018 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1019 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1020 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1021 // CHECK1:       omp.inner.for.end:
1022 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1023 // CHECK1:       omp.loop.exit:
1024 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1025 // CHECK1-NEXT:    ret void
1026 //
1027 //
1028 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1029 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1030 // CHECK1-NEXT:  entry:
1031 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1032 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1033 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1034 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1035 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1036 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1037 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1038 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1039 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1040 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1041 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1042 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1043 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1044 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1045 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1046 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1047 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1048 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1049 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1050 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1051 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1052 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1053 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1054 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1055 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1056 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1057 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1058 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1059 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1060 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1061 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1062 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1063 // CHECK1-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
1064 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1065 // CHECK1:       omp.dispatch.cond:
1066 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1067 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1068 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1069 // CHECK1:       omp.dispatch.body:
1070 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1071 // CHECK1-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1072 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1073 // CHECK1:       omp.inner.for.cond:
1074 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1075 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
1076 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1077 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1078 // CHECK1:       omp.inner.for.body:
1079 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1080 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1081 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1082 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
1083 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1084 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
1085 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1086 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1087 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
1088 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1089 // CHECK1:       omp.body.continue:
1090 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1091 // CHECK1:       omp.inner.for.inc:
1092 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1093 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1094 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1095 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1096 // CHECK1:       omp.inner.for.end:
1097 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1098 // CHECK1:       omp.dispatch.inc:
1099 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
1100 // CHECK1:       omp.dispatch.end:
1101 // CHECK1-NEXT:    ret void
1102 //
1103 //
1104 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1105 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
1106 // CHECK1-NEXT:  entry:
1107 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
1108 // CHECK1-NEXT:    ret void
1109 //
1110 //
1111 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1112 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
1113 // CHECK2-NEXT:  entry:
1114 // CHECK2-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1115 // CHECK2-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1116 // CHECK2-NEXT:    ret i32 [[CALL]]
1117 //
1118 //
1119 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1120 // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1121 // CHECK2-NEXT:  entry:
1122 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1123 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1124 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1125 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1126 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1127 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
1128 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
1129 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
1130 // CHECK2-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
1131 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
1132 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
1133 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
1134 // CHECK2-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
1135 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
1136 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
1137 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
1138 // CHECK2-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
1139 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
1140 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
1141 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
1142 // CHECK2-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
1143 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1144 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1145 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1146 // CHECK2-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1147 // CHECK2-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
1148 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
1149 // CHECK2-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1150 // CHECK2-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
1151 // CHECK2-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
1152 // CHECK2-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1153 // CHECK2-NEXT:    store i8* null, i8** [[TMP4]], align 8
1154 // CHECK2-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1155 // CHECK2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1156 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
1157 // CHECK2-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1158 // CHECK2-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
1159 // CHECK2-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1160 // CHECK2:       omp_offload.failed:
1161 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
1162 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1163 // CHECK2:       omp_offload.cont:
1164 // CHECK2-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1165 // CHECK2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1166 // CHECK2-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
1167 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
1168 // CHECK2-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1169 // CHECK2-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
1170 // CHECK2-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
1171 // CHECK2-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
1172 // CHECK2-NEXT:    store i8* null, i8** [[TMP13]], align 8
1173 // CHECK2-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1174 // CHECK2-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1175 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1176 // CHECK2-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1177 // CHECK2-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1178 // CHECK2-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
1179 // CHECK2:       omp_offload.failed7:
1180 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
1181 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
1182 // CHECK2:       omp_offload.cont8:
1183 // CHECK2-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1184 // CHECK2-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1185 // CHECK2-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
1186 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
1187 // CHECK2-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1188 // CHECK2-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
1189 // CHECK2-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
1190 // CHECK2-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
1191 // CHECK2-NEXT:    store i8* null, i8** [[TMP22]], align 8
1192 // CHECK2-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1193 // CHECK2-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1194 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1195 // CHECK2-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1196 // CHECK2-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1197 // CHECK2-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
1198 // CHECK2:       omp_offload.failed14:
1199 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
1200 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
1201 // CHECK2:       omp_offload.cont15:
1202 // CHECK2-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1203 // CHECK2-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
1204 // CHECK2-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
1205 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
1206 // CHECK2-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
1207 // CHECK2-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
1208 // CHECK2-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
1209 // CHECK2-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
1210 // CHECK2-NEXT:    store i8* null, i8** [[TMP31]], align 8
1211 // CHECK2-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
1212 // CHECK2-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
1213 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1214 // CHECK2-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1215 // CHECK2-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
1216 // CHECK2-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
1217 // CHECK2:       omp_offload.failed21:
1218 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
1219 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
1220 // CHECK2:       omp_offload.cont22:
1221 // CHECK2-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1222 // CHECK2-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
1223 // CHECK2-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
1224 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
1225 // CHECK2-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
1226 // CHECK2-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
1227 // CHECK2-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
1228 // CHECK2-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
1229 // CHECK2-NEXT:    store i8* null, i8** [[TMP40]], align 8
1230 // CHECK2-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
1231 // CHECK2-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
1232 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1233 // CHECK2-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1234 // CHECK2-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
1235 // CHECK2-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
1236 // CHECK2:       omp_offload.failed28:
1237 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
1238 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
1239 // CHECK2:       omp_offload.cont29:
1240 // CHECK2-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1241 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
1242 // CHECK2-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1243 // CHECK2-NEXT:    ret i32 [[TMP45]]
1244 //
1245 //
1246 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
1247 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
1248 // CHECK2-NEXT:  entry:
1249 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1250 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1251 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1252 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1253 // CHECK2-NEXT:    ret void
1254 //
1255 //
1256 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
1257 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1258 // CHECK2-NEXT:  entry:
1259 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1260 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1261 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1262 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1263 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1264 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1265 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1266 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1267 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1268 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1269 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1270 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1271 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1272 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1273 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1274 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1275 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1276 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1277 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1278 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1279 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1280 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1281 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1282 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1283 // CHECK2:       cond.true:
1284 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1285 // CHECK2:       cond.false:
1286 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1287 // CHECK2-NEXT:    br label [[COND_END]]
1288 // CHECK2:       cond.end:
1289 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1290 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1291 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1292 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1293 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1294 // CHECK2:       omp.inner.for.cond:
1295 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1296 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1297 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1298 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1299 // CHECK2:       omp.inner.for.body:
1300 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1301 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1302 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1303 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1304 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1305 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1306 // CHECK2:       omp.inner.for.inc:
1307 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1308 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1309 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1310 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1311 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1312 // CHECK2:       omp.inner.for.end:
1313 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1314 // CHECK2:       omp.loop.exit:
1315 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1316 // CHECK2-NEXT:    ret void
1317 //
1318 //
1319 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
1320 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1321 // CHECK2-NEXT:  entry:
1322 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1323 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1324 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1325 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1326 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1327 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1328 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1329 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1330 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1331 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1332 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1333 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1334 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1335 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1336 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1337 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1338 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1339 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1340 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1341 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1342 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1343 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1344 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1345 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1346 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1347 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1348 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1349 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1350 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1351 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1352 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1353 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1354 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1355 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1356 // CHECK2:       cond.true:
1357 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1358 // CHECK2:       cond.false:
1359 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1360 // CHECK2-NEXT:    br label [[COND_END]]
1361 // CHECK2:       cond.end:
1362 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1363 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1364 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1365 // CHECK2-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1366 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1367 // CHECK2:       omp.inner.for.cond:
1368 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1369 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1370 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1371 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1372 // CHECK2:       omp.inner.for.body:
1373 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1374 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1375 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1376 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1377 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1378 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1379 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1380 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1381 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1382 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1383 // CHECK2:       omp.body.continue:
1384 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1385 // CHECK2:       omp.inner.for.inc:
1386 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1387 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1388 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1389 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1390 // CHECK2:       omp.inner.for.end:
1391 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1392 // CHECK2:       omp.loop.exit:
1393 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1394 // CHECK2-NEXT:    ret void
1395 //
1396 //
1397 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
1398 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1399 // CHECK2-NEXT:  entry:
1400 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1401 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1402 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1403 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1404 // CHECK2-NEXT:    ret void
1405 //
1406 //
1407 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
1408 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1409 // CHECK2-NEXT:  entry:
1410 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1411 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1412 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1413 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1414 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1415 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1416 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1417 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1418 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1419 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1420 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1421 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1422 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1423 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1424 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1425 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1426 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1427 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1428 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1429 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1430 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1431 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1432 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1433 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1434 // CHECK2:       cond.true:
1435 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1436 // CHECK2:       cond.false:
1437 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1438 // CHECK2-NEXT:    br label [[COND_END]]
1439 // CHECK2:       cond.end:
1440 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1441 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1442 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1443 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1444 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1445 // CHECK2:       omp.inner.for.cond:
1446 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1447 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1448 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1449 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1450 // CHECK2:       omp.inner.for.body:
1451 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1452 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1453 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1454 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1455 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1456 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1457 // CHECK2:       omp.inner.for.inc:
1458 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1459 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1460 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1461 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1462 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1463 // CHECK2:       omp.inner.for.end:
1464 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1465 // CHECK2:       omp.loop.exit:
1466 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1467 // CHECK2-NEXT:    ret void
1468 //
1469 //
1470 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1471 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1472 // CHECK2-NEXT:  entry:
1473 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1474 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1475 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1476 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1477 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1478 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1479 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1480 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1481 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1482 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1483 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1484 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1485 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1486 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1487 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1488 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1489 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1490 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1491 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1492 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1493 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1494 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1495 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1496 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1497 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1498 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1499 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1500 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1501 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1502 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1503 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1504 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1505 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1506 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1507 // CHECK2:       cond.true:
1508 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1509 // CHECK2:       cond.false:
1510 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1511 // CHECK2-NEXT:    br label [[COND_END]]
1512 // CHECK2:       cond.end:
1513 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1514 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1515 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1516 // CHECK2-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1517 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1518 // CHECK2:       omp.inner.for.cond:
1519 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1520 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1521 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1522 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1523 // CHECK2:       omp.inner.for.body:
1524 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1525 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1526 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1527 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1528 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1529 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1530 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1531 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1532 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1533 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1534 // CHECK2:       omp.body.continue:
1535 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1536 // CHECK2:       omp.inner.for.inc:
1537 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1538 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1539 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1540 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1541 // CHECK2:       omp.inner.for.end:
1542 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1543 // CHECK2:       omp.loop.exit:
1544 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1545 // CHECK2-NEXT:    ret void
1546 //
1547 //
1548 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
1549 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1550 // CHECK2-NEXT:  entry:
1551 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1552 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1553 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1554 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1555 // CHECK2-NEXT:    ret void
1556 //
1557 //
1558 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6
1559 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1560 // CHECK2-NEXT:  entry:
1561 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1562 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1563 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1564 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1565 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1566 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1567 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1568 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1569 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1570 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1571 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1572 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1573 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1574 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1575 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1576 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1577 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1578 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1579 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1580 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1581 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1582 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1583 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1584 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1585 // CHECK2:       cond.true:
1586 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1587 // CHECK2:       cond.false:
1588 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1589 // CHECK2-NEXT:    br label [[COND_END]]
1590 // CHECK2:       cond.end:
1591 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1592 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1593 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1594 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1595 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1596 // CHECK2:       omp.inner.for.cond:
1597 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1598 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1599 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1600 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1601 // CHECK2:       omp.inner.for.body:
1602 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1603 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1604 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1605 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1606 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1607 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1608 // CHECK2:       omp.inner.for.inc:
1609 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1610 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1611 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1612 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1613 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1614 // CHECK2:       omp.inner.for.end:
1615 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1616 // CHECK2:       omp.loop.exit:
1617 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1618 // CHECK2-NEXT:    ret void
1619 //
1620 //
1621 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7
1622 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1623 // CHECK2-NEXT:  entry:
1624 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1625 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1626 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1627 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1628 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1629 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1630 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1631 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1632 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1633 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1634 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1635 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1636 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1637 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1638 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1639 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1640 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1641 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1642 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1643 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1644 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1645 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1646 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1647 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1648 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1649 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1650 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1651 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1652 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1653 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1654 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
1655 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1656 // CHECK2:       omp.dispatch.cond:
1657 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1658 // CHECK2-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1659 // CHECK2-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
1660 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
1661 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1662 // CHECK2:       cond.true:
1663 // CHECK2-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1664 // CHECK2-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
1665 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1666 // CHECK2:       cond.false:
1667 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1668 // CHECK2-NEXT:    br label [[COND_END]]
1669 // CHECK2:       cond.end:
1670 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
1671 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1672 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1673 // CHECK2-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
1674 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1675 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1676 // CHECK2-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1677 // CHECK2-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1678 // CHECK2:       omp.dispatch.body:
1679 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1680 // CHECK2:       omp.inner.for.cond:
1681 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1682 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1683 // CHECK2-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1684 // CHECK2-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1685 // CHECK2:       omp.inner.for.body:
1686 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1687 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1688 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1689 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1690 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1691 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1692 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1693 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1694 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1695 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1696 // CHECK2:       omp.body.continue:
1697 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1698 // CHECK2:       omp.inner.for.inc:
1699 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1700 // CHECK2-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
1701 // CHECK2-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1702 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1703 // CHECK2:       omp.inner.for.end:
1704 // CHECK2-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1705 // CHECK2:       omp.dispatch.inc:
1706 // CHECK2-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1707 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1708 // CHECK2-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1709 // CHECK2-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
1710 // CHECK2-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1711 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1712 // CHECK2-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1713 // CHECK2-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
1714 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND]]
1715 // CHECK2:       omp.dispatch.end:
1716 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1717 // CHECK2-NEXT:    ret void
1718 //
1719 //
1720 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
1721 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1722 // CHECK2-NEXT:  entry:
1723 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1724 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1725 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1726 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1727 // CHECK2-NEXT:    ret void
1728 //
1729 //
1730 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10
1731 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1732 // CHECK2-NEXT:  entry:
1733 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1734 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1735 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1736 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1737 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1738 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1739 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1740 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1741 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1742 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1743 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1744 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1745 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1746 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1747 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1748 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1749 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1750 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1751 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1752 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1753 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1754 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1755 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1756 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1757 // CHECK2:       cond.true:
1758 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1759 // CHECK2:       cond.false:
1760 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1761 // CHECK2-NEXT:    br label [[COND_END]]
1762 // CHECK2:       cond.end:
1763 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1764 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1765 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1766 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1767 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1768 // CHECK2:       omp.inner.for.cond:
1769 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1770 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1771 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1772 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1773 // CHECK2:       omp.inner.for.body:
1774 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1775 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1776 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1777 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1778 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1779 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1780 // CHECK2:       omp.inner.for.inc:
1781 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1782 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1783 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1784 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1785 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1786 // CHECK2:       omp.inner.for.end:
1787 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1788 // CHECK2:       omp.loop.exit:
1789 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1790 // CHECK2-NEXT:    ret void
1791 //
1792 //
1793 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11
1794 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1795 // CHECK2-NEXT:  entry:
1796 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1797 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1798 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1799 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1800 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1801 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1802 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1803 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1804 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1805 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1806 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1807 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1808 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1809 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1810 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1811 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1812 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1813 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1814 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1815 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1816 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1817 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1818 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1819 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1820 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1821 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1822 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1823 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1824 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1825 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1826 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1827 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1828 // CHECK2-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
1829 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1830 // CHECK2:       omp.dispatch.cond:
1831 // CHECK2-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1832 // CHECK2-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1833 // CHECK2-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1834 // CHECK2:       omp.dispatch.body:
1835 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1836 // CHECK2-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1837 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1838 // CHECK2:       omp.inner.for.cond:
1839 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1840 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
1841 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1842 // CHECK2-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1843 // CHECK2:       omp.inner.for.body:
1844 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1845 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1846 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1847 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
1848 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1849 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
1850 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1851 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1852 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
1853 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1854 // CHECK2:       omp.body.continue:
1855 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1856 // CHECK2:       omp.inner.for.inc:
1857 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1858 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1859 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1860 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
1861 // CHECK2:       omp.inner.for.end:
1862 // CHECK2-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1863 // CHECK2:       omp.dispatch.inc:
1864 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND]]
1865 // CHECK2:       omp.dispatch.end:
1866 // CHECK2-NEXT:    ret void
1867 //
1868 //
1869 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
1870 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1871 // CHECK2-NEXT:  entry:
1872 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1873 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1874 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1875 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1876 // CHECK2-NEXT:    ret void
1877 //
1878 //
1879 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14
1880 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1881 // CHECK2-NEXT:  entry:
1882 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1883 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1884 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1885 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1886 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1887 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1888 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1889 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1890 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1891 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1892 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1893 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1894 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1895 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1896 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1897 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1898 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1899 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1900 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1901 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1902 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1903 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1904 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1905 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1906 // CHECK2:       cond.true:
1907 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1908 // CHECK2:       cond.false:
1909 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1910 // CHECK2-NEXT:    br label [[COND_END]]
1911 // CHECK2:       cond.end:
1912 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1913 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1914 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1915 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1916 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1917 // CHECK2:       omp.inner.for.cond:
1918 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1919 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1920 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1921 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1922 // CHECK2:       omp.inner.for.body:
1923 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1924 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1925 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1926 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1927 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1928 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1929 // CHECK2:       omp.inner.for.inc:
1930 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1931 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1932 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1933 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1934 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1935 // CHECK2:       omp.inner.for.end:
1936 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1937 // CHECK2:       omp.loop.exit:
1938 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1939 // CHECK2-NEXT:    ret void
1940 //
1941 //
1942 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..15
1943 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1944 // CHECK2-NEXT:  entry:
1945 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1946 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1947 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1948 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1949 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1950 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1951 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1952 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1953 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1954 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1955 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1956 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1957 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1958 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1959 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1960 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1961 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1962 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1963 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1964 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1965 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1966 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1967 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1968 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1969 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1970 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1971 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1972 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1973 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1974 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1975 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1976 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1977 // CHECK2-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
1978 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1979 // CHECK2:       omp.dispatch.cond:
1980 // CHECK2-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1981 // CHECK2-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1982 // CHECK2-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1983 // CHECK2:       omp.dispatch.body:
1984 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1985 // CHECK2-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1986 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1987 // CHECK2:       omp.inner.for.cond:
1988 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1989 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
1990 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1991 // CHECK2-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1992 // CHECK2:       omp.inner.for.body:
1993 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1994 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1995 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1996 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
1997 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1998 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
1999 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
2000 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2001 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
2002 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2003 // CHECK2:       omp.body.continue:
2004 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2005 // CHECK2:       omp.inner.for.inc:
2006 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2007 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
2008 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2009 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
2010 // CHECK2:       omp.inner.for.end:
2011 // CHECK2-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2012 // CHECK2:       omp.dispatch.inc:
2013 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND]]
2014 // CHECK2:       omp.dispatch.end:
2015 // CHECK2-NEXT:    ret void
2016 //
2017 //
2018 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2019 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
2020 // CHECK2-NEXT:  entry:
2021 // CHECK2-NEXT:    call void @__tgt_register_requires(i64 1)
2022 // CHECK2-NEXT:    ret void
2023 //
2024 //
2025 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
2026 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
2027 // CHECK3-NEXT:  entry:
2028 // CHECK3-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
2029 // CHECK3-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
2030 // CHECK3-NEXT:    ret i32 [[CALL]]
2031 //
2032 //
2033 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
2034 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
2035 // CHECK3-NEXT:  entry:
2036 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2037 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
2038 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
2039 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
2040 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2041 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
2042 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
2043 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
2044 // CHECK3-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
2045 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
2046 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
2047 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
2048 // CHECK3-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
2049 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
2050 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
2051 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
2052 // CHECK3-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
2053 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
2054 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
2055 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
2056 // CHECK3-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
2057 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2058 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2059 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2060 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2061 // CHECK3-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
2062 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
2063 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2064 // CHECK3-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
2065 // CHECK3-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
2066 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2067 // CHECK3-NEXT:    store i8* null, i8** [[TMP4]], align 4
2068 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2069 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2070 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
2071 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2072 // CHECK3-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
2073 // CHECK3-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2074 // CHECK3:       omp_offload.failed:
2075 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
2076 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2077 // CHECK3:       omp_offload.cont:
2078 // CHECK3-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2079 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2080 // CHECK3-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
2081 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
2082 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2083 // CHECK3-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
2084 // CHECK3-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
2085 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
2086 // CHECK3-NEXT:    store i8* null, i8** [[TMP13]], align 4
2087 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2088 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2089 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2090 // CHECK3-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2091 // CHECK3-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2092 // CHECK3-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2093 // CHECK3:       omp_offload.failed7:
2094 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
2095 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
2096 // CHECK3:       omp_offload.cont8:
2097 // CHECK3-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2098 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
2099 // CHECK3-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
2100 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
2101 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
2102 // CHECK3-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
2103 // CHECK3-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
2104 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
2105 // CHECK3-NEXT:    store i8* null, i8** [[TMP22]], align 4
2106 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
2107 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
2108 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2109 // CHECK3-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2110 // CHECK3-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2111 // CHECK3-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
2112 // CHECK3:       omp_offload.failed14:
2113 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
2114 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
2115 // CHECK3:       omp_offload.cont15:
2116 // CHECK3-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2117 // CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
2118 // CHECK3-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
2119 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
2120 // CHECK3-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
2121 // CHECK3-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
2122 // CHECK3-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
2123 // CHECK3-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
2124 // CHECK3-NEXT:    store i8* null, i8** [[TMP31]], align 4
2125 // CHECK3-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
2126 // CHECK3-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
2127 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2128 // CHECK3-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2129 // CHECK3-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
2130 // CHECK3-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
2131 // CHECK3:       omp_offload.failed21:
2132 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
2133 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
2134 // CHECK3:       omp_offload.cont22:
2135 // CHECK3-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2136 // CHECK3-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
2137 // CHECK3-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
2138 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
2139 // CHECK3-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
2140 // CHECK3-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
2141 // CHECK3-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
2142 // CHECK3-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
2143 // CHECK3-NEXT:    store i8* null, i8** [[TMP40]], align 4
2144 // CHECK3-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
2145 // CHECK3-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
2146 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2147 // CHECK3-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2148 // CHECK3-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
2149 // CHECK3-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
2150 // CHECK3:       omp_offload.failed28:
2151 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
2152 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
2153 // CHECK3:       omp_offload.cont29:
2154 // CHECK3-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2155 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
2156 // CHECK3-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2157 // CHECK3-NEXT:    ret i32 [[TMP45]]
2158 //
2159 //
2160 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
2161 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
2162 // CHECK3-NEXT:  entry:
2163 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2164 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2165 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2166 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2167 // CHECK3-NEXT:    ret void
2168 //
2169 //
2170 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
2171 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2172 // CHECK3-NEXT:  entry:
2173 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2174 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2175 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2176 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2177 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2178 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2179 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2180 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2181 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2182 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2183 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2184 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2185 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2186 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2187 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2188 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2189 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2190 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2191 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2192 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2193 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2194 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2195 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2196 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2197 // CHECK3:       cond.true:
2198 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2199 // CHECK3:       cond.false:
2200 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2201 // CHECK3-NEXT:    br label [[COND_END]]
2202 // CHECK3:       cond.end:
2203 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2204 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2205 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2206 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2207 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2208 // CHECK3:       omp.inner.for.cond:
2209 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2210 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2211 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2212 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2213 // CHECK3:       omp.inner.for.body:
2214 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2215 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2216 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2217 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2218 // CHECK3:       omp.inner.for.inc:
2219 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2220 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2221 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2222 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2223 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2224 // CHECK3:       omp.inner.for.end:
2225 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2226 // CHECK3:       omp.loop.exit:
2227 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2228 // CHECK3-NEXT:    ret void
2229 //
2230 //
2231 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
2232 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2233 // CHECK3-NEXT:  entry:
2234 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2235 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2236 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2237 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2238 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2239 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2240 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2241 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2242 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2243 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2244 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2245 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2246 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2247 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2248 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2249 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2250 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2251 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2252 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2253 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2254 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2255 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2256 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2257 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2258 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2259 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2260 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2261 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2262 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2263 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2264 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2265 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2266 // CHECK3:       cond.true:
2267 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2268 // CHECK3:       cond.false:
2269 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2270 // CHECK3-NEXT:    br label [[COND_END]]
2271 // CHECK3:       cond.end:
2272 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2273 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2274 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2275 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2276 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2277 // CHECK3:       omp.inner.for.cond:
2278 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2279 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2280 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2281 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2282 // CHECK3:       omp.inner.for.body:
2283 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2284 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2285 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2286 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2287 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2288 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2289 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
2290 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
2291 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2292 // CHECK3:       omp.body.continue:
2293 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2294 // CHECK3:       omp.inner.for.inc:
2295 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2296 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
2297 // CHECK3-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2298 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2299 // CHECK3:       omp.inner.for.end:
2300 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2301 // CHECK3:       omp.loop.exit:
2302 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2303 // CHECK3-NEXT:    ret void
2304 //
2305 //
2306 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
2307 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2308 // CHECK3-NEXT:  entry:
2309 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2310 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2311 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2312 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2313 // CHECK3-NEXT:    ret void
2314 //
2315 //
2316 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
2317 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2318 // CHECK3-NEXT:  entry:
2319 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2320 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2321 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2322 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2323 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2324 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2325 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2326 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2327 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2328 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2329 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2330 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2331 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2332 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2333 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2334 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2335 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2336 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2337 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2338 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2339 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2340 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2341 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2342 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2343 // CHECK3:       cond.true:
2344 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2345 // CHECK3:       cond.false:
2346 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2347 // CHECK3-NEXT:    br label [[COND_END]]
2348 // CHECK3:       cond.end:
2349 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2350 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2351 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2352 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2353 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2354 // CHECK3:       omp.inner.for.cond:
2355 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2356 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2357 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2358 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2359 // CHECK3:       omp.inner.for.body:
2360 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2361 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2362 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2363 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2364 // CHECK3:       omp.inner.for.inc:
2365 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2366 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2367 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2368 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2369 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2370 // CHECK3:       omp.inner.for.end:
2371 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2372 // CHECK3:       omp.loop.exit:
2373 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2374 // CHECK3-NEXT:    ret void
2375 //
2376 //
2377 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
2378 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2379 // CHECK3-NEXT:  entry:
2380 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2381 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2382 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2383 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2384 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2385 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2386 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2387 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2388 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2389 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2390 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2391 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2392 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2393 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2394 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2395 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2396 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2397 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2398 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2399 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2400 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2401 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2402 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2403 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2404 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2405 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2406 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2407 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2408 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2409 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2410 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2411 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2412 // CHECK3:       cond.true:
2413 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2414 // CHECK3:       cond.false:
2415 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2416 // CHECK3-NEXT:    br label [[COND_END]]
2417 // CHECK3:       cond.end:
2418 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2419 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2420 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2421 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2422 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2423 // CHECK3:       omp.inner.for.cond:
2424 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2425 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2426 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2427 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2428 // CHECK3:       omp.inner.for.body:
2429 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2430 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2431 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2432 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2433 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2434 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2435 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
2436 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
2437 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2438 // CHECK3:       omp.body.continue:
2439 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2440 // CHECK3:       omp.inner.for.inc:
2441 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2442 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
2443 // CHECK3-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2444 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2445 // CHECK3:       omp.inner.for.end:
2446 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2447 // CHECK3:       omp.loop.exit:
2448 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2449 // CHECK3-NEXT:    ret void
2450 //
2451 //
2452 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
2453 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2454 // CHECK3-NEXT:  entry:
2455 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2456 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2457 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2458 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2459 // CHECK3-NEXT:    ret void
2460 //
2461 //
2462 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6
2463 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2464 // CHECK3-NEXT:  entry:
2465 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2466 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2467 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2468 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2469 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2470 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2471 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2472 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2473 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2474 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2475 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2476 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2477 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2478 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2479 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2480 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2481 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2482 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2483 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2484 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2485 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2486 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2487 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2488 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2489 // CHECK3:       cond.true:
2490 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2491 // CHECK3:       cond.false:
2492 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2493 // CHECK3-NEXT:    br label [[COND_END]]
2494 // CHECK3:       cond.end:
2495 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2496 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2497 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2498 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2499 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2500 // CHECK3:       omp.inner.for.cond:
2501 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2502 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2503 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2504 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2505 // CHECK3:       omp.inner.for.body:
2506 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2507 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2508 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2509 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2510 // CHECK3:       omp.inner.for.inc:
2511 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2512 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2513 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2514 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2515 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2516 // CHECK3:       omp.inner.for.end:
2517 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2518 // CHECK3:       omp.loop.exit:
2519 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2520 // CHECK3-NEXT:    ret void
2521 //
2522 //
2523 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
2524 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2525 // CHECK3-NEXT:  entry:
2526 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2527 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2528 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2529 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2530 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2531 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2532 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2533 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2534 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2535 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2536 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2537 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2538 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2539 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2540 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2541 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2542 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2543 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2544 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2545 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2546 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2547 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2548 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2549 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2550 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2551 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2552 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2553 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2554 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
2555 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2556 // CHECK3:       omp.dispatch.cond:
2557 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2558 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2559 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
2560 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2561 // CHECK3:       cond.true:
2562 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2563 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2564 // CHECK3:       cond.false:
2565 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2566 // CHECK3-NEXT:    br label [[COND_END]]
2567 // CHECK3:       cond.end:
2568 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
2569 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2570 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2571 // CHECK3-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
2572 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2573 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2574 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2575 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2576 // CHECK3:       omp.dispatch.body:
2577 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2578 // CHECK3:       omp.inner.for.cond:
2579 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2580 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2581 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2582 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2583 // CHECK3:       omp.inner.for.body:
2584 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2585 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2586 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2587 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2588 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2589 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
2590 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
2591 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
2592 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2593 // CHECK3:       omp.body.continue:
2594 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2595 // CHECK3:       omp.inner.for.inc:
2596 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2597 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
2598 // CHECK3-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2599 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2600 // CHECK3:       omp.inner.for.end:
2601 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2602 // CHECK3:       omp.dispatch.inc:
2603 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2604 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2605 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2606 // CHECK3-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
2607 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2608 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2609 // CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2610 // CHECK3-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
2611 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
2612 // CHECK3:       omp.dispatch.end:
2613 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2614 // CHECK3-NEXT:    ret void
2615 //
2616 //
2617 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
2618 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2619 // CHECK3-NEXT:  entry:
2620 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2621 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2622 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2623 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2624 // CHECK3-NEXT:    ret void
2625 //
2626 //
2627 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10
2628 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2629 // CHECK3-NEXT:  entry:
2630 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2631 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2632 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2633 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2634 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2635 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2636 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2637 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2638 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2639 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2640 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2641 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2642 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2643 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2644 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2645 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2646 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2647 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2648 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2649 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2650 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2651 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2652 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2653 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2654 // CHECK3:       cond.true:
2655 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2656 // CHECK3:       cond.false:
2657 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2658 // CHECK3-NEXT:    br label [[COND_END]]
2659 // CHECK3:       cond.end:
2660 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2661 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2662 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2663 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2664 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2665 // CHECK3:       omp.inner.for.cond:
2666 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2667 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2668 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2669 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2670 // CHECK3:       omp.inner.for.body:
2671 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2672 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2673 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2674 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2675 // CHECK3:       omp.inner.for.inc:
2676 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2677 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2678 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2679 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2680 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2681 // CHECK3:       omp.inner.for.end:
2682 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2683 // CHECK3:       omp.loop.exit:
2684 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2685 // CHECK3-NEXT:    ret void
2686 //
2687 //
2688 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11
2689 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2690 // CHECK3-NEXT:  entry:
2691 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2692 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2693 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2694 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2695 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2696 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2697 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2698 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2699 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2700 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2701 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2702 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2703 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2704 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2705 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2706 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2707 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2708 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2709 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2710 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2711 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2712 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2713 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2714 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2715 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2716 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2717 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2718 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2719 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2720 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2721 // CHECK3-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
2722 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2723 // CHECK3:       omp.dispatch.cond:
2724 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2725 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2726 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2727 // CHECK3:       omp.dispatch.body:
2728 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2729 // CHECK3-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2730 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2731 // CHECK3:       omp.inner.for.cond:
2732 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2733 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
2734 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2735 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2736 // CHECK3:       omp.inner.for.body:
2737 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2738 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2739 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2740 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
2741 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2742 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
2743 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
2744 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
2745 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2746 // CHECK3:       omp.body.continue:
2747 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2748 // CHECK3:       omp.inner.for.inc:
2749 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2750 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2751 // CHECK3-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2752 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
2753 // CHECK3:       omp.inner.for.end:
2754 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2755 // CHECK3:       omp.dispatch.inc:
2756 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
2757 // CHECK3:       omp.dispatch.end:
2758 // CHECK3-NEXT:    ret void
2759 //
2760 //
2761 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
2762 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2763 // CHECK3-NEXT:  entry:
2764 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2765 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2766 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2767 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2768 // CHECK3-NEXT:    ret void
2769 //
2770 //
2771 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14
2772 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2773 // CHECK3-NEXT:  entry:
2774 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2775 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2776 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2777 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2778 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2779 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2780 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2781 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2782 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2783 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2784 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2785 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2786 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2787 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2788 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2789 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2790 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2791 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2792 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2793 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2794 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2795 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2796 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2797 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2798 // CHECK3:       cond.true:
2799 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2800 // CHECK3:       cond.false:
2801 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2802 // CHECK3-NEXT:    br label [[COND_END]]
2803 // CHECK3:       cond.end:
2804 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2805 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2806 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2807 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2808 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2809 // CHECK3:       omp.inner.for.cond:
2810 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2811 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2812 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2813 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2814 // CHECK3:       omp.inner.for.body:
2815 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2816 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2817 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2818 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2819 // CHECK3:       omp.inner.for.inc:
2820 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2821 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2822 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2823 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2824 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2825 // CHECK3:       omp.inner.for.end:
2826 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2827 // CHECK3:       omp.loop.exit:
2828 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2829 // CHECK3-NEXT:    ret void
2830 //
2831 //
2832 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15
2833 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2834 // CHECK3-NEXT:  entry:
2835 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2836 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2837 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2838 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2839 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2840 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2841 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2842 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2843 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2844 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2845 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2846 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2847 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2848 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2849 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2850 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2851 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2852 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2853 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2854 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2855 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2856 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2857 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2858 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2859 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2860 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2861 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2862 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2863 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2864 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2865 // CHECK3-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
2866 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2867 // CHECK3:       omp.dispatch.cond:
2868 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2869 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2870 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2871 // CHECK3:       omp.dispatch.body:
2872 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2873 // CHECK3-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2874 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2875 // CHECK3:       omp.inner.for.cond:
2876 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2877 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
2878 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2879 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2880 // CHECK3:       omp.inner.for.body:
2881 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2882 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2883 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2884 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
2885 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2886 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
2887 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
2888 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
2889 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2890 // CHECK3:       omp.body.continue:
2891 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2892 // CHECK3:       omp.inner.for.inc:
2893 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2894 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2895 // CHECK3-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2896 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
2897 // CHECK3:       omp.inner.for.end:
2898 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2899 // CHECK3:       omp.dispatch.inc:
2900 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
2901 // CHECK3:       omp.dispatch.end:
2902 // CHECK3-NEXT:    ret void
2903 //
2904 //
2905 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2906 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
2907 // CHECK3-NEXT:  entry:
2908 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
2909 // CHECK3-NEXT:    ret void
2910 //
2911 //
2912 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv
2913 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
2914 // CHECK4-NEXT:  entry:
2915 // CHECK4-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
2916 // CHECK4-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
2917 // CHECK4-NEXT:    ret i32 [[CALL]]
2918 //
2919 //
2920 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
2921 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
2922 // CHECK4-NEXT:  entry:
2923 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2924 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
2925 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
2926 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
2927 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2928 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
2929 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
2930 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
2931 // CHECK4-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
2932 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
2933 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
2934 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
2935 // CHECK4-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
2936 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
2937 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
2938 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
2939 // CHECK4-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
2940 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
2941 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
2942 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
2943 // CHECK4-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
2944 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2945 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2946 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2947 // CHECK4-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2948 // CHECK4-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
2949 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
2950 // CHECK4-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2951 // CHECK4-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
2952 // CHECK4-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
2953 // CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2954 // CHECK4-NEXT:    store i8* null, i8** [[TMP4]], align 4
2955 // CHECK4-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2956 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2957 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
2958 // CHECK4-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2959 // CHECK4-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
2960 // CHECK4-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2961 // CHECK4:       omp_offload.failed:
2962 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
2963 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2964 // CHECK4:       omp_offload.cont:
2965 // CHECK4-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2966 // CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2967 // CHECK4-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
2968 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
2969 // CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2970 // CHECK4-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
2971 // CHECK4-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
2972 // CHECK4-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
2973 // CHECK4-NEXT:    store i8* null, i8** [[TMP13]], align 4
2974 // CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2975 // CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2976 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2977 // CHECK4-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2978 // CHECK4-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2979 // CHECK4-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2980 // CHECK4:       omp_offload.failed7:
2981 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
2982 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
2983 // CHECK4:       omp_offload.cont8:
2984 // CHECK4-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2985 // CHECK4-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
2986 // CHECK4-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
2987 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
2988 // CHECK4-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
2989 // CHECK4-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
2990 // CHECK4-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
2991 // CHECK4-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
2992 // CHECK4-NEXT:    store i8* null, i8** [[TMP22]], align 4
2993 // CHECK4-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
2994 // CHECK4-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
2995 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2996 // CHECK4-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2997 // CHECK4-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2998 // CHECK4-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
2999 // CHECK4:       omp_offload.failed14:
3000 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
3001 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
3002 // CHECK4:       omp_offload.cont15:
3003 // CHECK4-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3004 // CHECK4-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3005 // CHECK4-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
3006 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
3007 // CHECK4-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3008 // CHECK4-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
3009 // CHECK4-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
3010 // CHECK4-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
3011 // CHECK4-NEXT:    store i8* null, i8** [[TMP31]], align 4
3012 // CHECK4-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3013 // CHECK4-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3014 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3015 // CHECK4-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3016 // CHECK4-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
3017 // CHECK4-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
3018 // CHECK4:       omp_offload.failed21:
3019 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
3020 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
3021 // CHECK4:       omp_offload.cont22:
3022 // CHECK4-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3023 // CHECK4-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3024 // CHECK4-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
3025 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
3026 // CHECK4-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3027 // CHECK4-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
3028 // CHECK4-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
3029 // CHECK4-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
3030 // CHECK4-NEXT:    store i8* null, i8** [[TMP40]], align 4
3031 // CHECK4-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3032 // CHECK4-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3033 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3034 // CHECK4-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3035 // CHECK4-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
3036 // CHECK4-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
3037 // CHECK4:       omp_offload.failed28:
3038 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
3039 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
3040 // CHECK4:       omp_offload.cont29:
3041 // CHECK4-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3042 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
3043 // CHECK4-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3044 // CHECK4-NEXT:    ret i32 [[TMP45]]
3045 //
3046 //
3047 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
3048 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3049 // CHECK4-NEXT:  entry:
3050 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3051 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3052 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3053 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3054 // CHECK4-NEXT:    ret void
3055 //
3056 //
3057 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
3058 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3059 // CHECK4-NEXT:  entry:
3060 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3061 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3062 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3063 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3064 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3065 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3066 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3067 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3068 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3069 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3070 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3071 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3072 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3073 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3074 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3075 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3076 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3077 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3078 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3079 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3080 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3081 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3082 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3083 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3084 // CHECK4:       cond.true:
3085 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3086 // CHECK4:       cond.false:
3087 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3088 // CHECK4-NEXT:    br label [[COND_END]]
3089 // CHECK4:       cond.end:
3090 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3091 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3092 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3093 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3094 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3095 // CHECK4:       omp.inner.for.cond:
3096 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3097 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3098 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3099 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3100 // CHECK4:       omp.inner.for.body:
3101 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3102 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3103 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3104 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3105 // CHECK4:       omp.inner.for.inc:
3106 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3107 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3108 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3109 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3110 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3111 // CHECK4:       omp.inner.for.end:
3112 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3113 // CHECK4:       omp.loop.exit:
3114 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3115 // CHECK4-NEXT:    ret void
3116 //
3117 //
3118 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
3119 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3120 // CHECK4-NEXT:  entry:
3121 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3122 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3123 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3124 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3125 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3126 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3127 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3128 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3129 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3130 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3131 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3132 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3133 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3134 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3135 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3136 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3137 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3138 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3139 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3140 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3141 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3142 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3143 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3144 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3145 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3146 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3147 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3148 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3149 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3150 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3151 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3152 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3153 // CHECK4:       cond.true:
3154 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3155 // CHECK4:       cond.false:
3156 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3157 // CHECK4-NEXT:    br label [[COND_END]]
3158 // CHECK4:       cond.end:
3159 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3160 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3161 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3162 // CHECK4-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3163 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3164 // CHECK4:       omp.inner.for.cond:
3165 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3166 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3167 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3168 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3169 // CHECK4:       omp.inner.for.body:
3170 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3171 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3172 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3173 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3174 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3175 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3176 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
3177 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3178 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3179 // CHECK4:       omp.body.continue:
3180 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3181 // CHECK4:       omp.inner.for.inc:
3182 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3183 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3184 // CHECK4-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3185 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3186 // CHECK4:       omp.inner.for.end:
3187 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3188 // CHECK4:       omp.loop.exit:
3189 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3190 // CHECK4-NEXT:    ret void
3191 //
3192 //
3193 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
3194 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3195 // CHECK4-NEXT:  entry:
3196 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3197 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3198 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3199 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3200 // CHECK4-NEXT:    ret void
3201 //
3202 //
3203 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2
3204 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3205 // CHECK4-NEXT:  entry:
3206 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3207 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3208 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3209 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3210 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3211 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3212 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3213 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3214 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3215 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3216 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3217 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3218 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3219 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3220 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3221 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3222 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3223 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3224 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3225 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3226 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3227 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3228 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3229 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3230 // CHECK4:       cond.true:
3231 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3232 // CHECK4:       cond.false:
3233 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3234 // CHECK4-NEXT:    br label [[COND_END]]
3235 // CHECK4:       cond.end:
3236 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3237 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3238 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3239 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3240 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3241 // CHECK4:       omp.inner.for.cond:
3242 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3243 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3244 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3245 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3246 // CHECK4:       omp.inner.for.body:
3247 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3248 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3249 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3250 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3251 // CHECK4:       omp.inner.for.inc:
3252 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3253 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3254 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3255 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3256 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3257 // CHECK4:       omp.inner.for.end:
3258 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3259 // CHECK4:       omp.loop.exit:
3260 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3261 // CHECK4-NEXT:    ret void
3262 //
3263 //
3264 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3
3265 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3266 // CHECK4-NEXT:  entry:
3267 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3268 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3269 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3270 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3271 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3272 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3273 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3274 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3275 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3276 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3277 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3278 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3279 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3280 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3281 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3282 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3283 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3284 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3285 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3286 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3287 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3288 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3289 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3290 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3291 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3292 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3293 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3294 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3295 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3296 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3297 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3298 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3299 // CHECK4:       cond.true:
3300 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3301 // CHECK4:       cond.false:
3302 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3303 // CHECK4-NEXT:    br label [[COND_END]]
3304 // CHECK4:       cond.end:
3305 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3306 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3307 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3308 // CHECK4-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3309 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3310 // CHECK4:       omp.inner.for.cond:
3311 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3312 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3313 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3314 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3315 // CHECK4:       omp.inner.for.body:
3316 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3317 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3318 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3319 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3320 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3321 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3322 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
3323 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3324 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3325 // CHECK4:       omp.body.continue:
3326 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3327 // CHECK4:       omp.inner.for.inc:
3328 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3329 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3330 // CHECK4-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3331 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3332 // CHECK4:       omp.inner.for.end:
3333 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3334 // CHECK4:       omp.loop.exit:
3335 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3336 // CHECK4-NEXT:    ret void
3337 //
3338 //
3339 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
3340 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3341 // CHECK4-NEXT:  entry:
3342 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3343 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3344 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3345 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3346 // CHECK4-NEXT:    ret void
3347 //
3348 //
3349 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..6
3350 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3351 // CHECK4-NEXT:  entry:
3352 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3353 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3354 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3355 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3356 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3357 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3358 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3359 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3360 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3361 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3362 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3363 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3364 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3365 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3366 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3367 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3368 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3369 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3370 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3371 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3372 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3373 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3374 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3375 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3376 // CHECK4:       cond.true:
3377 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3378 // CHECK4:       cond.false:
3379 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3380 // CHECK4-NEXT:    br label [[COND_END]]
3381 // CHECK4:       cond.end:
3382 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3383 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3384 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3385 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3386 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3387 // CHECK4:       omp.inner.for.cond:
3388 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3389 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3390 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3391 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3392 // CHECK4:       omp.inner.for.body:
3393 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3394 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3395 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3396 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3397 // CHECK4:       omp.inner.for.inc:
3398 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3399 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3400 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3401 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3402 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3403 // CHECK4:       omp.inner.for.end:
3404 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3405 // CHECK4:       omp.loop.exit:
3406 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3407 // CHECK4-NEXT:    ret void
3408 //
3409 //
3410 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..7
3411 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3412 // CHECK4-NEXT:  entry:
3413 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3414 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3415 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3416 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3417 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3418 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3419 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3420 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3421 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3422 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3423 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3424 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3425 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3426 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3427 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3428 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3429 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3430 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3431 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3432 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3433 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3434 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3435 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3436 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3437 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3438 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3439 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3440 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3441 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
3442 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3443 // CHECK4:       omp.dispatch.cond:
3444 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3445 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3446 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
3447 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3448 // CHECK4:       cond.true:
3449 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3450 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3451 // CHECK4:       cond.false:
3452 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3453 // CHECK4-NEXT:    br label [[COND_END]]
3454 // CHECK4:       cond.end:
3455 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
3456 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3457 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3458 // CHECK4-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
3459 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3460 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3461 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
3462 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3463 // CHECK4:       omp.dispatch.body:
3464 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3465 // CHECK4:       omp.inner.for.cond:
3466 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3467 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3468 // CHECK4-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3469 // CHECK4-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3470 // CHECK4:       omp.inner.for.body:
3471 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3472 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
3473 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3474 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3475 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3476 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
3477 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
3478 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3479 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3480 // CHECK4:       omp.body.continue:
3481 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3482 // CHECK4:       omp.inner.for.inc:
3483 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3484 // CHECK4-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
3485 // CHECK4-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3486 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3487 // CHECK4:       omp.inner.for.end:
3488 // CHECK4-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3489 // CHECK4:       omp.dispatch.inc:
3490 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3491 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3492 // CHECK4-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3493 // CHECK4-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
3494 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3495 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3496 // CHECK4-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
3497 // CHECK4-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
3498 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND]]
3499 // CHECK4:       omp.dispatch.end:
3500 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3501 // CHECK4-NEXT:    ret void
3502 //
3503 //
3504 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
3505 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3506 // CHECK4-NEXT:  entry:
3507 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3508 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3509 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3510 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3511 // CHECK4-NEXT:    ret void
3512 //
3513 //
3514 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..10
3515 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3516 // CHECK4-NEXT:  entry:
3517 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3518 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3519 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3520 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3521 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3522 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3523 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3524 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3525 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3526 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3527 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3528 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3529 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3530 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3531 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3532 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3533 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3534 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3535 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3536 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3537 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3538 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3539 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3540 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3541 // CHECK4:       cond.true:
3542 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3543 // CHECK4:       cond.false:
3544 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3545 // CHECK4-NEXT:    br label [[COND_END]]
3546 // CHECK4:       cond.end:
3547 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3548 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3549 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3550 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3551 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3552 // CHECK4:       omp.inner.for.cond:
3553 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3554 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3555 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3556 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3557 // CHECK4:       omp.inner.for.body:
3558 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3559 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3560 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3561 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3562 // CHECK4:       omp.inner.for.inc:
3563 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3564 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3565 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3566 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3567 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3568 // CHECK4:       omp.inner.for.end:
3569 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3570 // CHECK4:       omp.loop.exit:
3571 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3572 // CHECK4-NEXT:    ret void
3573 //
3574 //
3575 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..11
3576 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3577 // CHECK4-NEXT:  entry:
3578 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3579 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3580 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3581 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3582 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3583 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3584 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3585 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3586 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3587 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3588 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3589 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3590 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3591 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3592 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3593 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3594 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3595 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3596 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3597 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3598 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3599 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3600 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3601 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3602 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3603 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3604 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3605 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3606 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3607 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3608 // CHECK4-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
3609 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3610 // CHECK4:       omp.dispatch.cond:
3611 // CHECK4-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3612 // CHECK4-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3613 // CHECK4-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3614 // CHECK4:       omp.dispatch.body:
3615 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3616 // CHECK4-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3617 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3618 // CHECK4:       omp.inner.for.cond:
3619 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3620 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
3621 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3622 // CHECK4-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3623 // CHECK4:       omp.inner.for.body:
3624 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3625 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3626 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3627 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
3628 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3629 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
3630 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
3631 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
3632 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3633 // CHECK4:       omp.body.continue:
3634 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3635 // CHECK4:       omp.inner.for.inc:
3636 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3637 // CHECK4-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
3638 // CHECK4-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3639 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
3640 // CHECK4:       omp.inner.for.end:
3641 // CHECK4-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3642 // CHECK4:       omp.dispatch.inc:
3643 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND]]
3644 // CHECK4:       omp.dispatch.end:
3645 // CHECK4-NEXT:    ret void
3646 //
3647 //
3648 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
3649 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3650 // CHECK4-NEXT:  entry:
3651 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3652 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3653 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3654 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3655 // CHECK4-NEXT:    ret void
3656 //
3657 //
3658 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..14
3659 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3660 // CHECK4-NEXT:  entry:
3661 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3662 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3663 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3664 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3665 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3666 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3667 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3668 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3669 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3670 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3671 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3672 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3673 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3674 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3675 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3676 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3677 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3678 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3679 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3680 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3681 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3682 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3683 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3684 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3685 // CHECK4:       cond.true:
3686 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3687 // CHECK4:       cond.false:
3688 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3689 // CHECK4-NEXT:    br label [[COND_END]]
3690 // CHECK4:       cond.end:
3691 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3692 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3693 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3694 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3695 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3696 // CHECK4:       omp.inner.for.cond:
3697 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3698 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3699 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3700 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3701 // CHECK4:       omp.inner.for.body:
3702 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3703 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3704 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3705 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3706 // CHECK4:       omp.inner.for.inc:
3707 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3708 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3709 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3710 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3711 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3712 // CHECK4:       omp.inner.for.end:
3713 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3714 // CHECK4:       omp.loop.exit:
3715 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3716 // CHECK4-NEXT:    ret void
3717 //
3718 //
3719 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..15
3720 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3721 // CHECK4-NEXT:  entry:
3722 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3723 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3724 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3725 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3726 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3727 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3728 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3729 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3730 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3731 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3732 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3733 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3734 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3735 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3736 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3737 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3738 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3739 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3740 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3741 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3742 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3743 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3744 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3745 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3746 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3747 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3748 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3749 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3750 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3751 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3752 // CHECK4-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
3753 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3754 // CHECK4:       omp.dispatch.cond:
3755 // CHECK4-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3756 // CHECK4-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3757 // CHECK4-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3758 // CHECK4:       omp.dispatch.body:
3759 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3760 // CHECK4-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3761 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3762 // CHECK4:       omp.inner.for.cond:
3763 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3764 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
3765 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3766 // CHECK4-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3767 // CHECK4:       omp.inner.for.body:
3768 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3769 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3770 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3771 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
3772 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3773 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
3774 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
3775 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
3776 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3777 // CHECK4:       omp.body.continue:
3778 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3779 // CHECK4:       omp.inner.for.inc:
3780 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3781 // CHECK4-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
3782 // CHECK4-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3783 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
3784 // CHECK4:       omp.inner.for.end:
3785 // CHECK4-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3786 // CHECK4:       omp.dispatch.inc:
3787 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND]]
3788 // CHECK4:       omp.dispatch.end:
3789 // CHECK4-NEXT:    ret void
3790 //
3791 //
3792 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3793 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] {
3794 // CHECK4-NEXT:  entry:
3795 // CHECK4-NEXT:    call void @__tgt_register_requires(i64 1)
3796 // CHECK4-NEXT:    ret void
3797 //
3798 //
3799 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
3800 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
3801 // CHECK5-NEXT:  entry:
3802 // CHECK5-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
3803 // CHECK5-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
3804 // CHECK5-NEXT:    ret i32 [[CALL]]
3805 //
3806 //
3807 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
3808 // CHECK5-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
3809 // CHECK5-NEXT:  entry:
3810 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3811 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3812 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3813 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3814 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3815 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
3816 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
3817 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
3818 // CHECK5-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
3819 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
3820 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
3821 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
3822 // CHECK5-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
3823 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
3824 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
3825 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
3826 // CHECK5-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
3827 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
3828 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
3829 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
3830 // CHECK5-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
3831 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3832 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3833 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
3834 // CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3835 // CHECK5-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
3836 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
3837 // CHECK5-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3838 // CHECK5-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
3839 // CHECK5-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
3840 // CHECK5-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3841 // CHECK5-NEXT:    store i8* null, i8** [[TMP4]], align 8
3842 // CHECK5-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3843 // CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3844 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
3845 // CHECK5-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3846 // CHECK5-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
3847 // CHECK5-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3848 // CHECK5:       omp_offload.failed:
3849 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
3850 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3851 // CHECK5:       omp_offload.cont:
3852 // CHECK5-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3853 // CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3854 // CHECK5-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
3855 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
3856 // CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3857 // CHECK5-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
3858 // CHECK5-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
3859 // CHECK5-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
3860 // CHECK5-NEXT:    store i8* null, i8** [[TMP13]], align 8
3861 // CHECK5-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3862 // CHECK5-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3863 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3864 // CHECK5-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3865 // CHECK5-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3866 // CHECK5-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
3867 // CHECK5:       omp_offload.failed7:
3868 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
3869 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
3870 // CHECK5:       omp_offload.cont8:
3871 // CHECK5-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3872 // CHECK5-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
3873 // CHECK5-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
3874 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
3875 // CHECK5-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
3876 // CHECK5-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
3877 // CHECK5-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
3878 // CHECK5-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
3879 // CHECK5-NEXT:    store i8* null, i8** [[TMP22]], align 8
3880 // CHECK5-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
3881 // CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
3882 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3883 // CHECK5-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3884 // CHECK5-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3885 // CHECK5-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
3886 // CHECK5:       omp_offload.failed14:
3887 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
3888 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
3889 // CHECK5:       omp_offload.cont15:
3890 // CHECK5-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3891 // CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3892 // CHECK5-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
3893 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
3894 // CHECK5-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3895 // CHECK5-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
3896 // CHECK5-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
3897 // CHECK5-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
3898 // CHECK5-NEXT:    store i8* null, i8** [[TMP31]], align 8
3899 // CHECK5-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3900 // CHECK5-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3901 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3902 // CHECK5-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3903 // CHECK5-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
3904 // CHECK5-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
3905 // CHECK5:       omp_offload.failed21:
3906 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
3907 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
3908 // CHECK5:       omp_offload.cont22:
3909 // CHECK5-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3910 // CHECK5-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3911 // CHECK5-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
3912 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
3913 // CHECK5-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3914 // CHECK5-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
3915 // CHECK5-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
3916 // CHECK5-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
3917 // CHECK5-NEXT:    store i8* null, i8** [[TMP40]], align 8
3918 // CHECK5-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3919 // CHECK5-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3920 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3921 // CHECK5-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3922 // CHECK5-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
3923 // CHECK5-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
3924 // CHECK5:       omp_offload.failed28:
3925 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
3926 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
3927 // CHECK5:       omp_offload.cont29:
3928 // CHECK5-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3929 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
3930 // CHECK5-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3931 // CHECK5-NEXT:    ret i32 [[TMP45]]
3932 //
3933 //
3934 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
3935 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3936 // CHECK5-NEXT:  entry:
3937 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3938 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3939 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3940 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3941 // CHECK5-NEXT:    ret void
3942 //
3943 //
3944 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
3945 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3946 // CHECK5-NEXT:  entry:
3947 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3948 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3949 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3950 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3951 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3952 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3953 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3954 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3955 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3956 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3957 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3958 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3959 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3960 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3961 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3962 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3963 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3964 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3965 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3966 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3967 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3968 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3969 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3970 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3971 // CHECK5:       cond.true:
3972 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3973 // CHECK5:       cond.false:
3974 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3975 // CHECK5-NEXT:    br label [[COND_END]]
3976 // CHECK5:       cond.end:
3977 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3978 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3979 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3980 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3981 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3982 // CHECK5:       omp.inner.for.cond:
3983 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3984 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3985 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3986 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3987 // CHECK5:       omp.inner.for.body:
3988 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3989 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3990 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3991 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3992 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
3993 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3994 // CHECK5:       omp.inner.for.inc:
3995 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3996 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3997 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3998 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3999 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4000 // CHECK5:       omp.inner.for.end:
4001 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4002 // CHECK5:       omp.loop.exit:
4003 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4004 // CHECK5-NEXT:    ret void
4005 //
4006 //
4007 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
4008 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4009 // CHECK5-NEXT:  entry:
4010 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4011 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4012 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4013 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4014 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4015 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4016 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4017 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4018 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4019 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4020 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4021 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4022 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4023 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4024 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4025 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4026 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4027 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4028 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4029 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4030 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4031 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4032 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4033 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4034 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4035 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4036 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4037 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4038 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4039 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4040 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4041 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4042 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
4043 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4044 // CHECK5:       cond.true:
4045 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4046 // CHECK5:       cond.false:
4047 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4048 // CHECK5-NEXT:    br label [[COND_END]]
4049 // CHECK5:       cond.end:
4050 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4051 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4052 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4053 // CHECK5-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4054 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4055 // CHECK5:       omp.inner.for.cond:
4056 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4057 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4058 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4059 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4060 // CHECK5:       omp.inner.for.body:
4061 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4062 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4063 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4064 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4065 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4066 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
4067 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4068 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4069 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4070 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4071 // CHECK5:       omp.body.continue:
4072 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4073 // CHECK5:       omp.inner.for.inc:
4074 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4075 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
4076 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4077 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4078 // CHECK5:       omp.inner.for.end:
4079 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4080 // CHECK5:       omp.loop.exit:
4081 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4082 // CHECK5-NEXT:    ret void
4083 //
4084 //
4085 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
4086 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4087 // CHECK5-NEXT:  entry:
4088 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4089 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4090 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4091 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4092 // CHECK5-NEXT:    ret void
4093 //
4094 //
4095 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
4096 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4097 // CHECK5-NEXT:  entry:
4098 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4099 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4100 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4101 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4102 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4103 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4104 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4105 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4106 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4107 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4108 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4109 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4110 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4111 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4112 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4113 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4114 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4115 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4116 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4117 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4118 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4119 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4120 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4121 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4122 // CHECK5:       cond.true:
4123 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4124 // CHECK5:       cond.false:
4125 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4126 // CHECK5-NEXT:    br label [[COND_END]]
4127 // CHECK5:       cond.end:
4128 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4129 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4130 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4131 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4132 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4133 // CHECK5:       omp.inner.for.cond:
4134 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4135 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4136 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4137 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4138 // CHECK5:       omp.inner.for.body:
4139 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4140 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4141 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4142 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4143 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4144 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4145 // CHECK5:       omp.inner.for.inc:
4146 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4147 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4148 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4149 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4150 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4151 // CHECK5:       omp.inner.for.end:
4152 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4153 // CHECK5:       omp.loop.exit:
4154 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4155 // CHECK5-NEXT:    ret void
4156 //
4157 //
4158 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
4159 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4160 // CHECK5-NEXT:  entry:
4161 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4162 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4163 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4164 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4165 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4166 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4167 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4168 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4169 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4170 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4171 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4172 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4173 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4174 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4175 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4176 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4177 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4178 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4179 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4180 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4181 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4182 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4183 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4184 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4185 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4186 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4187 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4188 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4189 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4190 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4191 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4192 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4193 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
4194 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4195 // CHECK5:       cond.true:
4196 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4197 // CHECK5:       cond.false:
4198 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4199 // CHECK5-NEXT:    br label [[COND_END]]
4200 // CHECK5:       cond.end:
4201 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4202 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4203 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4204 // CHECK5-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4205 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4206 // CHECK5:       omp.inner.for.cond:
4207 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4208 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4209 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4210 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4211 // CHECK5:       omp.inner.for.body:
4212 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4213 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4214 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4215 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4216 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4217 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
4218 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4219 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4220 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4221 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4222 // CHECK5:       omp.body.continue:
4223 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4224 // CHECK5:       omp.inner.for.inc:
4225 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4226 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
4227 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4228 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4229 // CHECK5:       omp.inner.for.end:
4230 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4231 // CHECK5:       omp.loop.exit:
4232 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4233 // CHECK5-NEXT:    ret void
4234 //
4235 //
4236 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
4237 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4238 // CHECK5-NEXT:  entry:
4239 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4240 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4241 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4242 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4243 // CHECK5-NEXT:    ret void
4244 //
4245 //
4246 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
4247 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4248 // CHECK5-NEXT:  entry:
4249 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4250 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4251 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4252 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4253 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4254 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4255 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4256 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4257 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4258 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4259 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4260 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4261 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4262 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4263 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4264 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4265 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4266 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4267 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4268 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4269 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4270 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4271 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4272 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4273 // CHECK5:       cond.true:
4274 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4275 // CHECK5:       cond.false:
4276 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4277 // CHECK5-NEXT:    br label [[COND_END]]
4278 // CHECK5:       cond.end:
4279 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4280 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4281 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4282 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4283 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4284 // CHECK5:       omp.inner.for.cond:
4285 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4286 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4287 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4288 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4289 // CHECK5:       omp.inner.for.body:
4290 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4291 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4292 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4293 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4294 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4295 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4296 // CHECK5:       omp.inner.for.inc:
4297 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4298 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4299 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4300 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4301 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4302 // CHECK5:       omp.inner.for.end:
4303 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4304 // CHECK5:       omp.loop.exit:
4305 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4306 // CHECK5-NEXT:    ret void
4307 //
4308 //
4309 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7
4310 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4311 // CHECK5-NEXT:  entry:
4312 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4313 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4314 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4315 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4316 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4317 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4318 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4319 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4320 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4321 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4322 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4323 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4324 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4325 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4326 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4327 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4328 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4329 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4330 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4331 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4332 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4333 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4334 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4335 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4336 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4337 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4338 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4339 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4340 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4341 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4342 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
4343 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4344 // CHECK5:       omp.dispatch.cond:
4345 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4346 // CHECK5-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4347 // CHECK5-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
4348 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
4349 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4350 // CHECK5:       cond.true:
4351 // CHECK5-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4352 // CHECK5-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
4353 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4354 // CHECK5:       cond.false:
4355 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4356 // CHECK5-NEXT:    br label [[COND_END]]
4357 // CHECK5:       cond.end:
4358 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
4359 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4360 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4361 // CHECK5-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
4362 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4363 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4364 // CHECK5-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
4365 // CHECK5-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4366 // CHECK5:       omp.dispatch.body:
4367 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4368 // CHECK5:       omp.inner.for.cond:
4369 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4370 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4371 // CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4372 // CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4373 // CHECK5:       omp.inner.for.body:
4374 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4375 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
4376 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4377 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4378 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4379 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
4380 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
4381 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4382 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4383 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4384 // CHECK5:       omp.body.continue:
4385 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4386 // CHECK5:       omp.inner.for.inc:
4387 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4388 // CHECK5-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
4389 // CHECK5-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
4390 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4391 // CHECK5:       omp.inner.for.end:
4392 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4393 // CHECK5:       omp.dispatch.inc:
4394 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4395 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4396 // CHECK5-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
4397 // CHECK5-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
4398 // CHECK5-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4399 // CHECK5-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4400 // CHECK5-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
4401 // CHECK5-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
4402 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
4403 // CHECK5:       omp.dispatch.end:
4404 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4405 // CHECK5-NEXT:    ret void
4406 //
4407 //
4408 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
4409 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4410 // CHECK5-NEXT:  entry:
4411 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4412 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4413 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4414 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4415 // CHECK5-NEXT:    ret void
4416 //
4417 //
4418 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10
4419 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4420 // CHECK5-NEXT:  entry:
4421 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4422 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4423 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4424 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4425 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4426 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4427 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4428 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4429 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4430 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4431 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4432 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4433 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4434 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4435 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4436 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4437 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4438 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4439 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4440 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4441 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4442 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4443 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4444 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4445 // CHECK5:       cond.true:
4446 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4447 // CHECK5:       cond.false:
4448 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4449 // CHECK5-NEXT:    br label [[COND_END]]
4450 // CHECK5:       cond.end:
4451 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4452 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4453 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4454 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4455 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4456 // CHECK5:       omp.inner.for.cond:
4457 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4458 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4459 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4460 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4461 // CHECK5:       omp.inner.for.body:
4462 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4463 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4464 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4465 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4466 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4467 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4468 // CHECK5:       omp.inner.for.inc:
4469 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4470 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4471 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4472 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4473 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4474 // CHECK5:       omp.inner.for.end:
4475 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4476 // CHECK5:       omp.loop.exit:
4477 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4478 // CHECK5-NEXT:    ret void
4479 //
4480 //
4481 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11
4482 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4483 // CHECK5-NEXT:  entry:
4484 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4485 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4486 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4487 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4488 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4489 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4490 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4491 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4492 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4493 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4494 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4495 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4496 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4497 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4498 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4499 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4500 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4501 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4502 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4503 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4504 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4505 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4506 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4507 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4508 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4509 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4510 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4511 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4512 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4513 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4514 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4515 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4516 // CHECK5-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
4517 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4518 // CHECK5:       omp.dispatch.cond:
4519 // CHECK5-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
4520 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4521 // CHECK5-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4522 // CHECK5:       omp.dispatch.body:
4523 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4524 // CHECK5-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
4525 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4526 // CHECK5:       omp.inner.for.cond:
4527 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
4528 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
4529 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4530 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4531 // CHECK5:       omp.inner.for.body:
4532 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
4533 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4534 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4535 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
4536 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4537 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
4538 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
4539 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4540 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
4541 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4542 // CHECK5:       omp.body.continue:
4543 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4544 // CHECK5:       omp.inner.for.inc:
4545 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
4546 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
4547 // CHECK5-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
4548 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
4549 // CHECK5:       omp.inner.for.end:
4550 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4551 // CHECK5:       omp.dispatch.inc:
4552 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
4553 // CHECK5:       omp.dispatch.end:
4554 // CHECK5-NEXT:    ret void
4555 //
4556 //
4557 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
4558 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4559 // CHECK5-NEXT:  entry:
4560 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4561 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4562 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4563 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4564 // CHECK5-NEXT:    ret void
4565 //
4566 //
4567 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14
4568 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4569 // CHECK5-NEXT:  entry:
4570 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4571 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4572 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4573 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4574 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4575 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4576 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4577 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4578 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4579 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4580 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4581 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4582 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4583 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4584 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4585 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4586 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4587 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4588 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4589 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4590 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4591 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4592 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4593 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4594 // CHECK5:       cond.true:
4595 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4596 // CHECK5:       cond.false:
4597 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4598 // CHECK5-NEXT:    br label [[COND_END]]
4599 // CHECK5:       cond.end:
4600 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4601 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4602 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4603 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4604 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4605 // CHECK5:       omp.inner.for.cond:
4606 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4607 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4608 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4609 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4610 // CHECK5:       omp.inner.for.body:
4611 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4612 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4613 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4614 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4615 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4616 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4617 // CHECK5:       omp.inner.for.inc:
4618 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4619 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4620 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4621 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4622 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4623 // CHECK5:       omp.inner.for.end:
4624 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4625 // CHECK5:       omp.loop.exit:
4626 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4627 // CHECK5-NEXT:    ret void
4628 //
4629 //
4630 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15
4631 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4632 // CHECK5-NEXT:  entry:
4633 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4634 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4635 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4636 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4637 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4638 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4639 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4640 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4641 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4642 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4643 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4644 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4645 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4646 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4647 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4648 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4649 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4650 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4651 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4652 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4653 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4654 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4655 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4656 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4657 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4658 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4659 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4660 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4661 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4662 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4663 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4664 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4665 // CHECK5-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
4666 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4667 // CHECK5:       omp.dispatch.cond:
4668 // CHECK5-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
4669 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4670 // CHECK5-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4671 // CHECK5:       omp.dispatch.body:
4672 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4673 // CHECK5-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
4674 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4675 // CHECK5:       omp.inner.for.cond:
4676 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4677 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
4678 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4679 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4680 // CHECK5:       omp.inner.for.body:
4681 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4682 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4683 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4684 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
4685 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4686 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
4687 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
4688 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4689 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
4690 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4691 // CHECK5:       omp.body.continue:
4692 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4693 // CHECK5:       omp.inner.for.inc:
4694 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4695 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
4696 // CHECK5-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4697 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
4698 // CHECK5:       omp.inner.for.end:
4699 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4700 // CHECK5:       omp.dispatch.inc:
4701 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
4702 // CHECK5:       omp.dispatch.end:
4703 // CHECK5-NEXT:    ret void
4704 //
4705 //
4706 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4707 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
4708 // CHECK5-NEXT:  entry:
4709 // CHECK5-NEXT:    call void @__tgt_register_requires(i64 1)
4710 // CHECK5-NEXT:    ret void
4711 //
4712 //
4713 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_template_structv
4714 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
4715 // CHECK6-NEXT:  entry:
4716 // CHECK6-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
4717 // CHECK6-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
4718 // CHECK6-NEXT:    ret i32 [[CALL]]
4719 //
4720 //
4721 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
4722 // CHECK6-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
4723 // CHECK6-NEXT:  entry:
4724 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4725 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4726 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4727 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4728 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4729 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
4730 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
4731 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
4732 // CHECK6-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
4733 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
4734 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
4735 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
4736 // CHECK6-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
4737 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
4738 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
4739 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
4740 // CHECK6-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
4741 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
4742 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
4743 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
4744 // CHECK6-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
4745 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4746 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4747 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
4748 // CHECK6-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4749 // CHECK6-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
4750 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
4751 // CHECK6-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4752 // CHECK6-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
4753 // CHECK6-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
4754 // CHECK6-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4755 // CHECK6-NEXT:    store i8* null, i8** [[TMP4]], align 8
4756 // CHECK6-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4757 // CHECK6-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4758 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
4759 // CHECK6-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4760 // CHECK6-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
4761 // CHECK6-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4762 // CHECK6:       omp_offload.failed:
4763 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
4764 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4765 // CHECK6:       omp_offload.cont:
4766 // CHECK6-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4767 // CHECK6-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
4768 // CHECK6-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
4769 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
4770 // CHECK6-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
4771 // CHECK6-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
4772 // CHECK6-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
4773 // CHECK6-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
4774 // CHECK6-NEXT:    store i8* null, i8** [[TMP13]], align 8
4775 // CHECK6-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
4776 // CHECK6-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
4777 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4778 // CHECK6-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4779 // CHECK6-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4780 // CHECK6-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
4781 // CHECK6:       omp_offload.failed7:
4782 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
4783 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
4784 // CHECK6:       omp_offload.cont8:
4785 // CHECK6-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4786 // CHECK6-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
4787 // CHECK6-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
4788 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
4789 // CHECK6-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
4790 // CHECK6-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
4791 // CHECK6-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
4792 // CHECK6-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
4793 // CHECK6-NEXT:    store i8* null, i8** [[TMP22]], align 8
4794 // CHECK6-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
4795 // CHECK6-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
4796 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4797 // CHECK6-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4798 // CHECK6-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
4799 // CHECK6-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
4800 // CHECK6:       omp_offload.failed14:
4801 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
4802 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
4803 // CHECK6:       omp_offload.cont15:
4804 // CHECK6-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4805 // CHECK6-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
4806 // CHECK6-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
4807 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
4808 // CHECK6-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
4809 // CHECK6-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
4810 // CHECK6-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
4811 // CHECK6-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
4812 // CHECK6-NEXT:    store i8* null, i8** [[TMP31]], align 8
4813 // CHECK6-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
4814 // CHECK6-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
4815 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4816 // CHECK6-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4817 // CHECK6-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
4818 // CHECK6-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
4819 // CHECK6:       omp_offload.failed21:
4820 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
4821 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
4822 // CHECK6:       omp_offload.cont22:
4823 // CHECK6-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4824 // CHECK6-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
4825 // CHECK6-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
4826 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
4827 // CHECK6-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
4828 // CHECK6-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
4829 // CHECK6-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
4830 // CHECK6-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
4831 // CHECK6-NEXT:    store i8* null, i8** [[TMP40]], align 8
4832 // CHECK6-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
4833 // CHECK6-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
4834 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4835 // CHECK6-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4836 // CHECK6-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
4837 // CHECK6-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
4838 // CHECK6:       omp_offload.failed28:
4839 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
4840 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
4841 // CHECK6:       omp_offload.cont29:
4842 // CHECK6-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4843 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
4844 // CHECK6-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4845 // CHECK6-NEXT:    ret i32 [[TMP45]]
4846 //
4847 //
4848 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
4849 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
4850 // CHECK6-NEXT:  entry:
4851 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4852 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4853 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4854 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4855 // CHECK6-NEXT:    ret void
4856 //
4857 //
4858 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined.
4859 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4860 // CHECK6-NEXT:  entry:
4861 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4862 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4863 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4864 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4865 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4866 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4867 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4868 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4869 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4870 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4871 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4872 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4873 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4874 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4875 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4876 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4877 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4878 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4879 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4880 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4881 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4882 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4883 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4884 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4885 // CHECK6:       cond.true:
4886 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4887 // CHECK6:       cond.false:
4888 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4889 // CHECK6-NEXT:    br label [[COND_END]]
4890 // CHECK6:       cond.end:
4891 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4892 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4893 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4894 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4895 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4896 // CHECK6:       omp.inner.for.cond:
4897 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4898 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4899 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4900 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4901 // CHECK6:       omp.inner.for.body:
4902 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4903 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4904 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4905 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4906 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4907 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4908 // CHECK6:       omp.inner.for.inc:
4909 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4910 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4911 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4912 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4913 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4914 // CHECK6:       omp.inner.for.end:
4915 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4916 // CHECK6:       omp.loop.exit:
4917 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4918 // CHECK6-NEXT:    ret void
4919 //
4920 //
4921 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1
4922 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4923 // CHECK6-NEXT:  entry:
4924 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4925 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4926 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4927 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4928 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4929 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4930 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4931 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4932 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4933 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4934 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4935 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4936 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4937 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4938 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4939 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4940 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4941 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4942 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4943 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4944 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4945 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4946 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4947 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4948 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4949 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4950 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4951 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4952 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4953 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4954 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4955 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4956 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
4957 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4958 // CHECK6:       cond.true:
4959 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4960 // CHECK6:       cond.false:
4961 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4962 // CHECK6-NEXT:    br label [[COND_END]]
4963 // CHECK6:       cond.end:
4964 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4965 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4966 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4967 // CHECK6-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4968 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4969 // CHECK6:       omp.inner.for.cond:
4970 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4971 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4972 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4973 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4974 // CHECK6:       omp.inner.for.body:
4975 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4976 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4977 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4978 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4979 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4980 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
4981 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4982 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4983 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4984 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4985 // CHECK6:       omp.body.continue:
4986 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4987 // CHECK6:       omp.inner.for.inc:
4988 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4989 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
4990 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4991 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4992 // CHECK6:       omp.inner.for.end:
4993 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4994 // CHECK6:       omp.loop.exit:
4995 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4996 // CHECK6-NEXT:    ret void
4997 //
4998 //
4999 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
5000 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5001 // CHECK6-NEXT:  entry:
5002 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5003 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5004 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5005 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5006 // CHECK6-NEXT:    ret void
5007 //
5008 //
5009 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2
5010 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5011 // CHECK6-NEXT:  entry:
5012 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5013 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5014 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5015 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5016 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5017 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5018 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5019 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5020 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5021 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5022 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5023 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5024 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5025 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5026 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5027 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5028 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5029 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5030 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5031 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5032 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5033 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5034 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5035 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5036 // CHECK6:       cond.true:
5037 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5038 // CHECK6:       cond.false:
5039 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5040 // CHECK6-NEXT:    br label [[COND_END]]
5041 // CHECK6:       cond.end:
5042 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5043 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5044 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5045 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5046 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5047 // CHECK6:       omp.inner.for.cond:
5048 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5049 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5050 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5051 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5052 // CHECK6:       omp.inner.for.body:
5053 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5054 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5055 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5056 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5057 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
5058 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5059 // CHECK6:       omp.inner.for.inc:
5060 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5061 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5062 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5063 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5064 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5065 // CHECK6:       omp.inner.for.end:
5066 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5067 // CHECK6:       omp.loop.exit:
5068 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5069 // CHECK6-NEXT:    ret void
5070 //
5071 //
5072 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3
5073 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5074 // CHECK6-NEXT:  entry:
5075 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5076 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5077 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5078 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5079 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5080 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5081 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5082 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5083 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5084 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5085 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5086 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5087 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5088 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5089 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5090 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5091 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5092 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5093 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5094 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5095 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5096 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
5097 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5098 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
5099 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5100 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5101 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5102 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5103 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5104 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5105 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5106 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5107 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
5108 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5109 // CHECK6:       cond.true:
5110 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5111 // CHECK6:       cond.false:
5112 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5113 // CHECK6-NEXT:    br label [[COND_END]]
5114 // CHECK6:       cond.end:
5115 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
5116 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5117 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5118 // CHECK6-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5119 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5120 // CHECK6:       omp.inner.for.cond:
5121 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5122 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5123 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5124 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5125 // CHECK6:       omp.inner.for.body:
5126 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5127 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5128 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5129 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5130 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5131 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
5132 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
5133 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5134 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5135 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5136 // CHECK6:       omp.body.continue:
5137 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5138 // CHECK6:       omp.inner.for.inc:
5139 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5140 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
5141 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5142 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5143 // CHECK6:       omp.inner.for.end:
5144 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5145 // CHECK6:       omp.loop.exit:
5146 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5147 // CHECK6-NEXT:    ret void
5148 //
5149 //
5150 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
5151 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5152 // CHECK6-NEXT:  entry:
5153 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5154 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5155 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5156 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5157 // CHECK6-NEXT:    ret void
5158 //
5159 //
5160 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6
5161 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5162 // CHECK6-NEXT:  entry:
5163 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5164 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5165 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5166 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5167 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5168 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5169 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5170 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5171 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5172 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5173 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5174 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5175 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5176 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5177 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5178 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5179 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5180 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5181 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5182 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5183 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5184 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5185 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5186 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5187 // CHECK6:       cond.true:
5188 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5189 // CHECK6:       cond.false:
5190 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5191 // CHECK6-NEXT:    br label [[COND_END]]
5192 // CHECK6:       cond.end:
5193 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5194 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5195 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5196 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5197 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5198 // CHECK6:       omp.inner.for.cond:
5199 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5200 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5201 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5202 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5203 // CHECK6:       omp.inner.for.body:
5204 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5205 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5206 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5207 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5208 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
5209 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5210 // CHECK6:       omp.inner.for.inc:
5211 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5212 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5213 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5214 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5215 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5216 // CHECK6:       omp.inner.for.end:
5217 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5218 // CHECK6:       omp.loop.exit:
5219 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5220 // CHECK6-NEXT:    ret void
5221 //
5222 //
5223 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7
5224 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5225 // CHECK6-NEXT:  entry:
5226 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5227 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5228 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5229 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5230 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5231 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5232 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5233 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5234 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5235 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5236 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5237 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5238 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5239 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5240 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5241 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5242 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5243 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5244 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5245 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5246 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5247 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
5248 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5249 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
5250 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5251 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5252 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5253 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5254 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5255 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5256 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
5257 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5258 // CHECK6:       omp.dispatch.cond:
5259 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5260 // CHECK6-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5261 // CHECK6-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
5262 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
5263 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5264 // CHECK6:       cond.true:
5265 // CHECK6-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5266 // CHECK6-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
5267 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5268 // CHECK6:       cond.false:
5269 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5270 // CHECK6-NEXT:    br label [[COND_END]]
5271 // CHECK6:       cond.end:
5272 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
5273 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5274 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5275 // CHECK6-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
5276 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5277 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5278 // CHECK6-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
5279 // CHECK6-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5280 // CHECK6:       omp.dispatch.body:
5281 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5282 // CHECK6:       omp.inner.for.cond:
5283 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5284 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5285 // CHECK6-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
5286 // CHECK6-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5287 // CHECK6:       omp.inner.for.body:
5288 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5289 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
5290 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5291 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5292 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5293 // CHECK6-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
5294 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
5295 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5296 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5297 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5298 // CHECK6:       omp.body.continue:
5299 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5300 // CHECK6:       omp.inner.for.inc:
5301 // CHECK6-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5302 // CHECK6-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
5303 // CHECK6-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
5304 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5305 // CHECK6:       omp.inner.for.end:
5306 // CHECK6-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5307 // CHECK6:       omp.dispatch.inc:
5308 // CHECK6-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5309 // CHECK6-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5310 // CHECK6-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
5311 // CHECK6-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
5312 // CHECK6-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5313 // CHECK6-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5314 // CHECK6-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
5315 // CHECK6-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
5316 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND]]
5317 // CHECK6:       omp.dispatch.end:
5318 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5319 // CHECK6-NEXT:    ret void
5320 //
5321 //
5322 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
5323 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5324 // CHECK6-NEXT:  entry:
5325 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5326 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5327 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5328 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5329 // CHECK6-NEXT:    ret void
5330 //
5331 //
5332 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10
5333 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5334 // CHECK6-NEXT:  entry:
5335 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5336 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5337 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5338 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5339 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5340 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5341 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5342 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5343 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5344 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5345 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5346 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5347 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5348 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5349 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5350 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5351 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5352 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5353 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5354 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5355 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5356 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5357 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5358 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5359 // CHECK6:       cond.true:
5360 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5361 // CHECK6:       cond.false:
5362 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5363 // CHECK6-NEXT:    br label [[COND_END]]
5364 // CHECK6:       cond.end:
5365 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5366 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5367 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5368 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5369 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5370 // CHECK6:       omp.inner.for.cond:
5371 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5372 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5373 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5374 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5375 // CHECK6:       omp.inner.for.body:
5376 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5377 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5378 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5379 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5380 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
5381 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5382 // CHECK6:       omp.inner.for.inc:
5383 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5384 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5385 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5386 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5387 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5388 // CHECK6:       omp.inner.for.end:
5389 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5390 // CHECK6:       omp.loop.exit:
5391 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5392 // CHECK6-NEXT:    ret void
5393 //
5394 //
5395 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11
5396 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5397 // CHECK6-NEXT:  entry:
5398 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5399 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5400 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5401 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5402 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5403 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5404 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5405 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5406 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5407 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5408 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5409 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5410 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5411 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5412 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5413 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5414 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5415 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5416 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5417 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5418 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5419 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
5420 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5421 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
5422 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5423 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5424 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5425 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5426 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5427 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5428 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5429 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5430 // CHECK6-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
5431 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5432 // CHECK6:       omp.dispatch.cond:
5433 // CHECK6-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
5434 // CHECK6-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
5435 // CHECK6-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5436 // CHECK6:       omp.dispatch.body:
5437 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5438 // CHECK6-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
5439 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5440 // CHECK6:       omp.inner.for.cond:
5441 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
5442 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
5443 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5444 // CHECK6-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5445 // CHECK6:       omp.inner.for.body:
5446 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
5447 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
5448 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5449 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
5450 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5451 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
5452 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
5453 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5454 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
5455 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5456 // CHECK6:       omp.body.continue:
5457 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5458 // CHECK6:       omp.inner.for.inc:
5459 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
5460 // CHECK6-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
5461 // CHECK6-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
5462 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
5463 // CHECK6:       omp.inner.for.end:
5464 // CHECK6-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5465 // CHECK6:       omp.dispatch.inc:
5466 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND]]
5467 // CHECK6:       omp.dispatch.end:
5468 // CHECK6-NEXT:    ret void
5469 //
5470 //
5471 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
5472 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5473 // CHECK6-NEXT:  entry:
5474 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5475 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5476 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5477 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5478 // CHECK6-NEXT:    ret void
5479 //
5480 //
5481 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..14
5482 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5483 // CHECK6-NEXT:  entry:
5484 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5485 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5486 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5487 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5488 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5489 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5490 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5491 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5492 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5493 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5494 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5495 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5496 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5497 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5498 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5499 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5500 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5501 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5502 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5503 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5504 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5505 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5506 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5507 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5508 // CHECK6:       cond.true:
5509 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5510 // CHECK6:       cond.false:
5511 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5512 // CHECK6-NEXT:    br label [[COND_END]]
5513 // CHECK6:       cond.end:
5514 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5515 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5516 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5517 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5518 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5519 // CHECK6:       omp.inner.for.cond:
5520 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5521 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5522 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5523 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5524 // CHECK6:       omp.inner.for.body:
5525 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5526 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5527 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5528 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5529 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
5530 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5531 // CHECK6:       omp.inner.for.inc:
5532 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5533 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5534 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5535 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5536 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5537 // CHECK6:       omp.inner.for.end:
5538 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5539 // CHECK6:       omp.loop.exit:
5540 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5541 // CHECK6-NEXT:    ret void
5542 //
5543 //
5544 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..15
5545 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5546 // CHECK6-NEXT:  entry:
5547 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5548 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5549 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5550 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5551 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5552 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5553 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5554 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5555 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5556 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5557 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5558 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5559 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5560 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5561 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5562 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5563 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5564 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5565 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5566 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5567 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5568 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
5569 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5570 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
5571 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5572 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5573 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5574 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5575 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5576 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5577 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5578 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5579 // CHECK6-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
5580 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5581 // CHECK6:       omp.dispatch.cond:
5582 // CHECK6-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
5583 // CHECK6-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
5584 // CHECK6-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5585 // CHECK6:       omp.dispatch.body:
5586 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5587 // CHECK6-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
5588 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5589 // CHECK6:       omp.inner.for.cond:
5590 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5591 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
5592 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5593 // CHECK6-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5594 // CHECK6:       omp.inner.for.body:
5595 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5596 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
5597 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5598 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
5599 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5600 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
5601 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
5602 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5603 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
5604 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5605 // CHECK6:       omp.body.continue:
5606 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5607 // CHECK6:       omp.inner.for.inc:
5608 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5609 // CHECK6-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
5610 // CHECK6-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5611 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
5612 // CHECK6:       omp.inner.for.end:
5613 // CHECK6-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5614 // CHECK6:       omp.dispatch.inc:
5615 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND]]
5616 // CHECK6:       omp.dispatch.end:
5617 // CHECK6-NEXT:    ret void
5618 //
5619 //
5620 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5621 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] {
5622 // CHECK6-NEXT:  entry:
5623 // CHECK6-NEXT:    call void @__tgt_register_requires(i64 1)
5624 // CHECK6-NEXT:    ret void
5625 //
5626 //
5627 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5628 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
5629 // CHECK7-NEXT:  entry:
5630 // CHECK7-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5631 // CHECK7-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5632 // CHECK7-NEXT:    ret i32 [[CALL]]
5633 //
5634 //
5635 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5636 // CHECK7-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5637 // CHECK7-NEXT:  entry:
5638 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5639 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
5640 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
5641 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
5642 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5643 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
5644 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
5645 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
5646 // CHECK7-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
5647 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
5648 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
5649 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
5650 // CHECK7-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
5651 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
5652 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
5653 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
5654 // CHECK7-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
5655 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
5656 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
5657 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
5658 // CHECK7-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
5659 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5660 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5661 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
5662 // CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5663 // CHECK7-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
5664 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
5665 // CHECK7-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5666 // CHECK7-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
5667 // CHECK7-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
5668 // CHECK7-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5669 // CHECK7-NEXT:    store i8* null, i8** [[TMP4]], align 4
5670 // CHECK7-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5671 // CHECK7-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5672 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
5673 // CHECK7-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5674 // CHECK7-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
5675 // CHECK7-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5676 // CHECK7:       omp_offload.failed:
5677 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
5678 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5679 // CHECK7:       omp_offload.cont:
5680 // CHECK7-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5681 // CHECK7-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
5682 // CHECK7-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
5683 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
5684 // CHECK7-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
5685 // CHECK7-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
5686 // CHECK7-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
5687 // CHECK7-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
5688 // CHECK7-NEXT:    store i8* null, i8** [[TMP13]], align 4
5689 // CHECK7-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
5690 // CHECK7-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
5691 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5692 // CHECK7-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5693 // CHECK7-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5694 // CHECK7-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
5695 // CHECK7:       omp_offload.failed7:
5696 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
5697 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
5698 // CHECK7:       omp_offload.cont8:
5699 // CHECK7-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5700 // CHECK7-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
5701 // CHECK7-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
5702 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
5703 // CHECK7-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
5704 // CHECK7-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
5705 // CHECK7-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
5706 // CHECK7-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
5707 // CHECK7-NEXT:    store i8* null, i8** [[TMP22]], align 4
5708 // CHECK7-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
5709 // CHECK7-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
5710 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5711 // CHECK7-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5712 // CHECK7-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
5713 // CHECK7-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
5714 // CHECK7:       omp_offload.failed14:
5715 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
5716 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
5717 // CHECK7:       omp_offload.cont15:
5718 // CHECK7-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5719 // CHECK7-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
5720 // CHECK7-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
5721 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
5722 // CHECK7-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
5723 // CHECK7-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
5724 // CHECK7-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
5725 // CHECK7-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
5726 // CHECK7-NEXT:    store i8* null, i8** [[TMP31]], align 4
5727 // CHECK7-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
5728 // CHECK7-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
5729 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5730 // CHECK7-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5731 // CHECK7-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
5732 // CHECK7-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
5733 // CHECK7:       omp_offload.failed21:
5734 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
5735 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
5736 // CHECK7:       omp_offload.cont22:
5737 // CHECK7-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5738 // CHECK7-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
5739 // CHECK7-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
5740 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
5741 // CHECK7-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
5742 // CHECK7-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
5743 // CHECK7-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
5744 // CHECK7-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
5745 // CHECK7-NEXT:    store i8* null, i8** [[TMP40]], align 4
5746 // CHECK7-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
5747 // CHECK7-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
5748 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5749 // CHECK7-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5750 // CHECK7-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
5751 // CHECK7-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
5752 // CHECK7:       omp_offload.failed28:
5753 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
5754 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
5755 // CHECK7:       omp_offload.cont29:
5756 // CHECK7-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5757 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
5758 // CHECK7-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
5759 // CHECK7-NEXT:    ret i32 [[TMP45]]
5760 //
5761 //
5762 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
5763 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
5764 // CHECK7-NEXT:  entry:
5765 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5766 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5767 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5768 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5769 // CHECK7-NEXT:    ret void
5770 //
5771 //
5772 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined.
5773 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5774 // CHECK7-NEXT:  entry:
5775 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5776 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5777 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5778 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5779 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5780 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5781 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5782 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5783 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5784 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5785 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5786 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5787 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5788 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5789 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5790 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5791 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5792 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5793 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5794 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5795 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5796 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5797 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5798 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5799 // CHECK7:       cond.true:
5800 // CHECK7-NEXT:    br label [[COND_END:%.*]]
5801 // CHECK7:       cond.false:
5802 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5803 // CHECK7-NEXT:    br label [[COND_END]]
5804 // CHECK7:       cond.end:
5805 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5806 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5807 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5808 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5809 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5810 // CHECK7:       omp.inner.for.cond:
5811 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5812 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5813 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5814 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5815 // CHECK7:       omp.inner.for.body:
5816 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5817 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5818 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
5819 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5820 // CHECK7:       omp.inner.for.inc:
5821 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5822 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5823 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
5824 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5825 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
5826 // CHECK7:       omp.inner.for.end:
5827 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5828 // CHECK7:       omp.loop.exit:
5829 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5830 // CHECK7-NEXT:    ret void
5831 //
5832 //
5833 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1
5834 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5835 // CHECK7-NEXT:  entry:
5836 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5837 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5838 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5839 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5840 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5841 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5842 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5843 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5844 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5845 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5846 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5847 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5848 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5849 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5850 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5851 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5852 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5853 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5854 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5855 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5856 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5857 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5858 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
5859 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
5860 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5861 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5862 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5863 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5864 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5865 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5866 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
5867 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5868 // CHECK7:       cond.true:
5869 // CHECK7-NEXT:    br label [[COND_END:%.*]]
5870 // CHECK7:       cond.false:
5871 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5872 // CHECK7-NEXT:    br label [[COND_END]]
5873 // CHECK7:       cond.end:
5874 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
5875 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5876 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5877 // CHECK7-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5878 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5879 // CHECK7:       omp.inner.for.cond:
5880 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5881 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5882 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5883 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5884 // CHECK7:       omp.inner.for.body:
5885 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5886 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5887 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5888 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5889 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5890 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
5891 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
5892 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5893 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5894 // CHECK7:       omp.body.continue:
5895 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5896 // CHECK7:       omp.inner.for.inc:
5897 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5898 // CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
5899 // CHECK7-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
5900 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
5901 // CHECK7:       omp.inner.for.end:
5902 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5903 // CHECK7:       omp.loop.exit:
5904 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5905 // CHECK7-NEXT:    ret void
5906 //
5907 //
5908 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
5909 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5910 // CHECK7-NEXT:  entry:
5911 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5912 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5913 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5914 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5915 // CHECK7-NEXT:    ret void
5916 //
5917 //
5918 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2
5919 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5920 // CHECK7-NEXT:  entry:
5921 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5922 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5923 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5924 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5925 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5926 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5927 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5928 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5929 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5930 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5931 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5932 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5933 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5934 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5935 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5936 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5937 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5938 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5939 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5940 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5941 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5942 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5943 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5944 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5945 // CHECK7:       cond.true:
5946 // CHECK7-NEXT:    br label [[COND_END:%.*]]
5947 // CHECK7:       cond.false:
5948 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5949 // CHECK7-NEXT:    br label [[COND_END]]
5950 // CHECK7:       cond.end:
5951 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5952 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5953 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5954 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5955 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5956 // CHECK7:       omp.inner.for.cond:
5957 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5958 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5959 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5960 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5961 // CHECK7:       omp.inner.for.body:
5962 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5963 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5964 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
5965 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5966 // CHECK7:       omp.inner.for.inc:
5967 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5968 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5969 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
5970 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5971 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
5972 // CHECK7:       omp.inner.for.end:
5973 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5974 // CHECK7:       omp.loop.exit:
5975 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5976 // CHECK7-NEXT:    ret void
5977 //
5978 //
5979 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3
5980 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5981 // CHECK7-NEXT:  entry:
5982 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5983 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5984 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5985 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5986 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5987 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5988 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5989 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5990 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5991 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5992 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5993 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5994 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5995 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5996 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5997 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5998 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5999 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6000 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6001 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6002 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6003 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6004 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6005 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6006 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6007 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6008 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6009 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6010 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6011 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6012 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
6013 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6014 // CHECK7:       cond.true:
6015 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6016 // CHECK7:       cond.false:
6017 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6018 // CHECK7-NEXT:    br label [[COND_END]]
6019 // CHECK7:       cond.end:
6020 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6021 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6022 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6023 // CHECK7-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6024 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6025 // CHECK7:       omp.inner.for.cond:
6026 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6027 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6028 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6029 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6030 // CHECK7:       omp.inner.for.body:
6031 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6032 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6033 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6034 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6035 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6036 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6037 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
6038 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
6039 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6040 // CHECK7:       omp.body.continue:
6041 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6042 // CHECK7:       omp.inner.for.inc:
6043 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6044 // CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
6045 // CHECK7-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
6046 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6047 // CHECK7:       omp.inner.for.end:
6048 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6049 // CHECK7:       omp.loop.exit:
6050 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6051 // CHECK7-NEXT:    ret void
6052 //
6053 //
6054 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
6055 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6056 // CHECK7-NEXT:  entry:
6057 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6058 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6059 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6060 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6061 // CHECK7-NEXT:    ret void
6062 //
6063 //
6064 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..6
6065 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6066 // CHECK7-NEXT:  entry:
6067 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6068 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6069 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6070 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6071 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6072 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6073 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6074 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6075 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6076 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6077 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6078 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6079 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6080 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6081 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6082 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6083 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6084 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6085 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6086 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6087 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6088 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6089 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6090 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6091 // CHECK7:       cond.true:
6092 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6093 // CHECK7:       cond.false:
6094 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6095 // CHECK7-NEXT:    br label [[COND_END]]
6096 // CHECK7:       cond.end:
6097 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6098 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6099 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6100 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6101 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6102 // CHECK7:       omp.inner.for.cond:
6103 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6104 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6105 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6106 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6107 // CHECK7:       omp.inner.for.body:
6108 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6109 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6110 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6111 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6112 // CHECK7:       omp.inner.for.inc:
6113 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6114 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6115 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6116 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6117 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6118 // CHECK7:       omp.inner.for.end:
6119 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6120 // CHECK7:       omp.loop.exit:
6121 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6122 // CHECK7-NEXT:    ret void
6123 //
6124 //
6125 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..7
6126 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6127 // CHECK7-NEXT:  entry:
6128 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6129 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6130 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6131 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6132 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6133 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6134 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6135 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6136 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6137 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6138 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6139 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6140 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6141 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6142 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6143 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6144 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6145 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6146 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6147 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6148 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6149 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6150 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6151 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6152 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6153 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6154 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6155 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6156 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
6157 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6158 // CHECK7:       omp.dispatch.cond:
6159 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6160 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6161 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
6162 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6163 // CHECK7:       cond.true:
6164 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6165 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6166 // CHECK7:       cond.false:
6167 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6168 // CHECK7-NEXT:    br label [[COND_END]]
6169 // CHECK7:       cond.end:
6170 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
6171 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6172 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6173 // CHECK7-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
6174 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6175 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6176 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
6177 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6178 // CHECK7:       omp.dispatch.body:
6179 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6180 // CHECK7:       omp.inner.for.cond:
6181 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6182 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6183 // CHECK7-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
6184 // CHECK7-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6185 // CHECK7:       omp.inner.for.body:
6186 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6187 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
6188 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6189 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6190 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6191 // CHECK7-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
6192 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
6193 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
6194 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6195 // CHECK7:       omp.body.continue:
6196 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6197 // CHECK7:       omp.inner.for.inc:
6198 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6199 // CHECK7-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
6200 // CHECK7-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6201 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6202 // CHECK7:       omp.inner.for.end:
6203 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6204 // CHECK7:       omp.dispatch.inc:
6205 // CHECK7-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6206 // CHECK7-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6207 // CHECK7-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
6208 // CHECK7-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
6209 // CHECK7-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6210 // CHECK7-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6211 // CHECK7-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
6212 // CHECK7-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
6213 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
6214 // CHECK7:       omp.dispatch.end:
6215 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6216 // CHECK7-NEXT:    ret void
6217 //
6218 //
6219 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
6220 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6221 // CHECK7-NEXT:  entry:
6222 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6223 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6224 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6225 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6226 // CHECK7-NEXT:    ret void
6227 //
6228 //
6229 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..10
6230 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6231 // CHECK7-NEXT:  entry:
6232 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6233 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6234 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6235 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6236 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6237 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6238 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6239 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6240 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6241 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6242 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6243 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6244 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6245 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6246 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6247 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6248 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6249 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6250 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6251 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6252 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6253 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6254 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6255 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6256 // CHECK7:       cond.true:
6257 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6258 // CHECK7:       cond.false:
6259 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6260 // CHECK7-NEXT:    br label [[COND_END]]
6261 // CHECK7:       cond.end:
6262 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6263 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6264 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6265 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6266 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6267 // CHECK7:       omp.inner.for.cond:
6268 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6269 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6270 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6271 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6272 // CHECK7:       omp.inner.for.body:
6273 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6274 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6275 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6276 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6277 // CHECK7:       omp.inner.for.inc:
6278 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6279 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6280 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6281 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6282 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6283 // CHECK7:       omp.inner.for.end:
6284 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6285 // CHECK7:       omp.loop.exit:
6286 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6287 // CHECK7-NEXT:    ret void
6288 //
6289 //
6290 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..11
6291 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6292 // CHECK7-NEXT:  entry:
6293 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6294 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6295 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6296 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6297 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6298 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6299 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6300 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6301 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6302 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6303 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6304 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6305 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6306 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6307 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6308 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6309 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6310 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6311 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6312 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6313 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6314 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6315 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6316 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6317 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6318 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6319 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6320 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6321 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6322 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
6323 // CHECK7-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
6324 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6325 // CHECK7:       omp.dispatch.cond:
6326 // CHECK7-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6327 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
6328 // CHECK7-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6329 // CHECK7:       omp.dispatch.body:
6330 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6331 // CHECK7-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
6332 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6333 // CHECK7:       omp.inner.for.cond:
6334 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6335 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
6336 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6337 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6338 // CHECK7:       omp.inner.for.body:
6339 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6340 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6341 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6342 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
6343 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6344 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
6345 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
6346 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
6347 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6348 // CHECK7:       omp.body.continue:
6349 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6350 // CHECK7:       omp.inner.for.inc:
6351 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6352 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
6353 // CHECK7-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6354 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
6355 // CHECK7:       omp.inner.for.end:
6356 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6357 // CHECK7:       omp.dispatch.inc:
6358 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
6359 // CHECK7:       omp.dispatch.end:
6360 // CHECK7-NEXT:    ret void
6361 //
6362 //
6363 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
6364 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6365 // CHECK7-NEXT:  entry:
6366 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6367 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6368 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6369 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6370 // CHECK7-NEXT:    ret void
6371 //
6372 //
6373 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..14
6374 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6375 // CHECK7-NEXT:  entry:
6376 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6377 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6378 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6379 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6380 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6381 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6382 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6383 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6384 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6385 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6386 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6387 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6388 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6389 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6390 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6391 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6392 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6393 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6394 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6395 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6396 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6397 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6398 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6399 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6400 // CHECK7:       cond.true:
6401 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6402 // CHECK7:       cond.false:
6403 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6404 // CHECK7-NEXT:    br label [[COND_END]]
6405 // CHECK7:       cond.end:
6406 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6407 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6408 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6409 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6410 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6411 // CHECK7:       omp.inner.for.cond:
6412 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6413 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6414 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6415 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6416 // CHECK7:       omp.inner.for.body:
6417 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6418 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6419 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6420 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6421 // CHECK7:       omp.inner.for.inc:
6422 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6423 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6424 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6425 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6426 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6427 // CHECK7:       omp.inner.for.end:
6428 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6429 // CHECK7:       omp.loop.exit:
6430 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6431 // CHECK7-NEXT:    ret void
6432 //
6433 //
6434 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..15
6435 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6436 // CHECK7-NEXT:  entry:
6437 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6438 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6439 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6440 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6441 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6442 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6443 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6444 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6445 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6446 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6447 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6448 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6449 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6450 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6451 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6452 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6453 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6454 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6455 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6456 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6457 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6458 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6459 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6460 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6461 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6462 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6463 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6464 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6465 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6466 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
6467 // CHECK7-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
6468 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6469 // CHECK7:       omp.dispatch.cond:
6470 // CHECK7-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6471 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
6472 // CHECK7-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6473 // CHECK7:       omp.dispatch.body:
6474 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6475 // CHECK7-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
6476 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6477 // CHECK7:       omp.inner.for.cond:
6478 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
6479 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
6480 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6481 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6482 // CHECK7:       omp.inner.for.body:
6483 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
6484 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6485 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6486 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
6487 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6488 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
6489 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
6490 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
6491 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6492 // CHECK7:       omp.body.continue:
6493 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6494 // CHECK7:       omp.inner.for.inc:
6495 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
6496 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
6497 // CHECK7-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
6498 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
6499 // CHECK7:       omp.inner.for.end:
6500 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6501 // CHECK7:       omp.dispatch.inc:
6502 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
6503 // CHECK7:       omp.dispatch.end:
6504 // CHECK7-NEXT:    ret void
6505 //
6506 //
6507 // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6508 // CHECK7-SAME: () #[[ATTR3:[0-9]+]] {
6509 // CHECK7-NEXT:  entry:
6510 // CHECK7-NEXT:    call void @__tgt_register_requires(i64 1)
6511 // CHECK7-NEXT:    ret void
6512 //
6513 //
6514 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_template_structv
6515 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
6516 // CHECK8-NEXT:  entry:
6517 // CHECK8-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
6518 // CHECK8-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
6519 // CHECK8-NEXT:    ret i32 [[CALL]]
6520 //
6521 //
6522 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
6523 // CHECK8-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
6524 // CHECK8-NEXT:  entry:
6525 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6526 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
6527 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
6528 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
6529 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6530 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
6531 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
6532 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
6533 // CHECK8-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
6534 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
6535 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
6536 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
6537 // CHECK8-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
6538 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
6539 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
6540 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
6541 // CHECK8-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
6542 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
6543 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
6544 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
6545 // CHECK8-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
6546 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6547 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6548 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
6549 // CHECK8-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6550 // CHECK8-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
6551 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
6552 // CHECK8-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6553 // CHECK8-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
6554 // CHECK8-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
6555 // CHECK8-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
6556 // CHECK8-NEXT:    store i8* null, i8** [[TMP4]], align 4
6557 // CHECK8-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6558 // CHECK8-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6559 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
6560 // CHECK8-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6561 // CHECK8-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
6562 // CHECK8-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6563 // CHECK8:       omp_offload.failed:
6564 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
6565 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT]]
6566 // CHECK8:       omp_offload.cont:
6567 // CHECK8-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6568 // CHECK8-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
6569 // CHECK8-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
6570 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
6571 // CHECK8-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
6572 // CHECK8-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
6573 // CHECK8-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
6574 // CHECK8-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
6575 // CHECK8-NEXT:    store i8* null, i8** [[TMP13]], align 4
6576 // CHECK8-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
6577 // CHECK8-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
6578 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6579 // CHECK8-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6580 // CHECK8-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
6581 // CHECK8-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
6582 // CHECK8:       omp_offload.failed7:
6583 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
6584 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
6585 // CHECK8:       omp_offload.cont8:
6586 // CHECK8-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6587 // CHECK8-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
6588 // CHECK8-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
6589 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
6590 // CHECK8-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
6591 // CHECK8-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
6592 // CHECK8-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
6593 // CHECK8-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
6594 // CHECK8-NEXT:    store i8* null, i8** [[TMP22]], align 4
6595 // CHECK8-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
6596 // CHECK8-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
6597 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6598 // CHECK8-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6599 // CHECK8-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
6600 // CHECK8-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
6601 // CHECK8:       omp_offload.failed14:
6602 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
6603 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
6604 // CHECK8:       omp_offload.cont15:
6605 // CHECK8-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6606 // CHECK8-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
6607 // CHECK8-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
6608 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
6609 // CHECK8-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
6610 // CHECK8-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
6611 // CHECK8-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
6612 // CHECK8-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
6613 // CHECK8-NEXT:    store i8* null, i8** [[TMP31]], align 4
6614 // CHECK8-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
6615 // CHECK8-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
6616 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6617 // CHECK8-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6618 // CHECK8-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
6619 // CHECK8-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
6620 // CHECK8:       omp_offload.failed21:
6621 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
6622 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
6623 // CHECK8:       omp_offload.cont22:
6624 // CHECK8-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6625 // CHECK8-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
6626 // CHECK8-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
6627 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
6628 // CHECK8-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
6629 // CHECK8-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
6630 // CHECK8-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
6631 // CHECK8-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
6632 // CHECK8-NEXT:    store i8* null, i8** [[TMP40]], align 4
6633 // CHECK8-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
6634 // CHECK8-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
6635 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6636 // CHECK8-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6637 // CHECK8-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
6638 // CHECK8-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
6639 // CHECK8:       omp_offload.failed28:
6640 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
6641 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
6642 // CHECK8:       omp_offload.cont29:
6643 // CHECK8-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6644 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
6645 // CHECK8-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
6646 // CHECK8-NEXT:    ret i32 [[TMP45]]
6647 //
6648 //
6649 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
6650 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
6651 // CHECK8-NEXT:  entry:
6652 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6653 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6654 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6655 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6656 // CHECK8-NEXT:    ret void
6657 //
6658 //
6659 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined.
6660 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6661 // CHECK8-NEXT:  entry:
6662 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6663 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6664 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6665 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6666 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6667 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6668 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6669 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6670 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6671 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6672 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6673 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6674 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6675 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6676 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6677 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6678 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6679 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6680 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6681 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6682 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6683 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6684 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6685 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6686 // CHECK8:       cond.true:
6687 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6688 // CHECK8:       cond.false:
6689 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6690 // CHECK8-NEXT:    br label [[COND_END]]
6691 // CHECK8:       cond.end:
6692 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6693 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6694 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6695 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6696 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6697 // CHECK8:       omp.inner.for.cond:
6698 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6699 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6700 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6701 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6702 // CHECK8:       omp.inner.for.body:
6703 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6704 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6705 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6706 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6707 // CHECK8:       omp.inner.for.inc:
6708 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6709 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6710 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6711 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6712 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
6713 // CHECK8:       omp.inner.for.end:
6714 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6715 // CHECK8:       omp.loop.exit:
6716 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6717 // CHECK8-NEXT:    ret void
6718 //
6719 //
6720 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..1
6721 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6722 // CHECK8-NEXT:  entry:
6723 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6724 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6725 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6726 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6727 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6728 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6729 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6730 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6731 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6732 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6733 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6734 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6735 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6736 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6737 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6738 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6739 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6740 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6741 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6742 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6743 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6744 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6745 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6746 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6747 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6748 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6749 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6750 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6751 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6752 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6753 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
6754 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6755 // CHECK8:       cond.true:
6756 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6757 // CHECK8:       cond.false:
6758 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6759 // CHECK8-NEXT:    br label [[COND_END]]
6760 // CHECK8:       cond.end:
6761 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6762 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6763 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6764 // CHECK8-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6765 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6766 // CHECK8:       omp.inner.for.cond:
6767 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6768 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6769 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6770 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6771 // CHECK8:       omp.inner.for.body:
6772 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6773 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6774 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6775 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6776 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6777 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6778 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
6779 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
6780 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6781 // CHECK8:       omp.body.continue:
6782 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6783 // CHECK8:       omp.inner.for.inc:
6784 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6785 // CHECK8-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
6786 // CHECK8-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
6787 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
6788 // CHECK8:       omp.inner.for.end:
6789 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6790 // CHECK8:       omp.loop.exit:
6791 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6792 // CHECK8-NEXT:    ret void
6793 //
6794 //
6795 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
6796 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6797 // CHECK8-NEXT:  entry:
6798 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6799 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6800 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6801 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6802 // CHECK8-NEXT:    ret void
6803 //
6804 //
6805 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2
6806 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6807 // CHECK8-NEXT:  entry:
6808 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6809 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6810 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6811 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6812 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6813 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6814 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6815 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6816 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6817 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6818 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6819 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6820 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6821 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6822 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6823 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6824 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6825 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6826 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6827 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6828 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6829 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6830 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6831 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6832 // CHECK8:       cond.true:
6833 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6834 // CHECK8:       cond.false:
6835 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6836 // CHECK8-NEXT:    br label [[COND_END]]
6837 // CHECK8:       cond.end:
6838 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6839 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6840 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6841 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6842 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6843 // CHECK8:       omp.inner.for.cond:
6844 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6845 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6846 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6847 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6848 // CHECK8:       omp.inner.for.body:
6849 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6850 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6851 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6852 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6853 // CHECK8:       omp.inner.for.inc:
6854 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6855 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6856 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6857 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6858 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
6859 // CHECK8:       omp.inner.for.end:
6860 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6861 // CHECK8:       omp.loop.exit:
6862 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6863 // CHECK8-NEXT:    ret void
6864 //
6865 //
6866 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3
6867 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6868 // CHECK8-NEXT:  entry:
6869 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6870 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6871 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6872 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6873 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6874 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6875 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6876 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6877 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6878 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6879 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6880 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6881 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6882 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6883 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6884 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6885 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6886 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6887 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6888 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6889 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6890 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6891 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6892 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6893 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6894 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6895 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6896 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6897 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6898 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6899 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
6900 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6901 // CHECK8:       cond.true:
6902 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6903 // CHECK8:       cond.false:
6904 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6905 // CHECK8-NEXT:    br label [[COND_END]]
6906 // CHECK8:       cond.end:
6907 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6908 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6909 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6910 // CHECK8-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6911 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6912 // CHECK8:       omp.inner.for.cond:
6913 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6914 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6915 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6916 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6917 // CHECK8:       omp.inner.for.body:
6918 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6919 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6920 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6921 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6922 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6923 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6924 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
6925 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
6926 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6927 // CHECK8:       omp.body.continue:
6928 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6929 // CHECK8:       omp.inner.for.inc:
6930 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6931 // CHECK8-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
6932 // CHECK8-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
6933 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
6934 // CHECK8:       omp.inner.for.end:
6935 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6936 // CHECK8:       omp.loop.exit:
6937 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6938 // CHECK8-NEXT:    ret void
6939 //
6940 //
6941 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
6942 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6943 // CHECK8-NEXT:  entry:
6944 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6945 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6946 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6947 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6948 // CHECK8-NEXT:    ret void
6949 //
6950 //
6951 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..6
6952 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6953 // CHECK8-NEXT:  entry:
6954 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6955 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6956 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6957 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6958 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6959 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6960 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6961 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6962 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6963 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6964 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6965 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6966 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6967 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6968 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6969 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6970 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6971 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6972 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6973 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6974 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6975 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6976 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6977 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6978 // CHECK8:       cond.true:
6979 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6980 // CHECK8:       cond.false:
6981 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6982 // CHECK8-NEXT:    br label [[COND_END]]
6983 // CHECK8:       cond.end:
6984 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6985 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6986 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6987 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6988 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6989 // CHECK8:       omp.inner.for.cond:
6990 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6991 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6992 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6993 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6994 // CHECK8:       omp.inner.for.body:
6995 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6996 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6997 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6998 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6999 // CHECK8:       omp.inner.for.inc:
7000 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7001 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7002 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7003 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7004 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7005 // CHECK8:       omp.inner.for.end:
7006 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7007 // CHECK8:       omp.loop.exit:
7008 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7009 // CHECK8-NEXT:    ret void
7010 //
7011 //
7012 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..7
7013 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7014 // CHECK8-NEXT:  entry:
7015 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7016 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7017 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7018 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7019 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7020 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7021 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7022 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7023 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7024 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7025 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7026 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7027 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7028 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7029 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7030 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7031 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7032 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7033 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7034 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
7035 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7036 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7037 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7038 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7039 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7040 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7041 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7042 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7043 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
7044 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
7045 // CHECK8:       omp.dispatch.cond:
7046 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7047 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7048 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
7049 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7050 // CHECK8:       cond.true:
7051 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7052 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7053 // CHECK8:       cond.false:
7054 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7055 // CHECK8-NEXT:    br label [[COND_END]]
7056 // CHECK8:       cond.end:
7057 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
7058 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7059 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7060 // CHECK8-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
7061 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7062 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7063 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
7064 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7065 // CHECK8:       omp.dispatch.body:
7066 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7067 // CHECK8:       omp.inner.for.cond:
7068 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7069 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7070 // CHECK8-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
7071 // CHECK8-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7072 // CHECK8:       omp.inner.for.body:
7073 // CHECK8-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7074 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
7075 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7076 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7077 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7078 // CHECK8-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
7079 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
7080 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
7081 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7082 // CHECK8:       omp.body.continue:
7083 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7084 // CHECK8:       omp.inner.for.inc:
7085 // CHECK8-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7086 // CHECK8-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
7087 // CHECK8-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7088 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7089 // CHECK8:       omp.inner.for.end:
7090 // CHECK8-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
7091 // CHECK8:       omp.dispatch.inc:
7092 // CHECK8-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7093 // CHECK8-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7094 // CHECK8-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
7095 // CHECK8-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
7096 // CHECK8-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7097 // CHECK8-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7098 // CHECK8-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
7099 // CHECK8-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
7100 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND]]
7101 // CHECK8:       omp.dispatch.end:
7102 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7103 // CHECK8-NEXT:    ret void
7104 //
7105 //
7106 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
7107 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7108 // CHECK8-NEXT:  entry:
7109 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7110 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7111 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7112 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
7113 // CHECK8-NEXT:    ret void
7114 //
7115 //
7116 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..10
7117 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7118 // CHECK8-NEXT:  entry:
7119 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7120 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7121 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7122 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7123 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7124 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7125 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7126 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7127 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7128 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7129 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7130 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7131 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7132 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7133 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7134 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
7135 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7136 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7137 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7138 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7139 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7140 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7141 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
7142 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7143 // CHECK8:       cond.true:
7144 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7145 // CHECK8:       cond.false:
7146 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7147 // CHECK8-NEXT:    br label [[COND_END]]
7148 // CHECK8:       cond.end:
7149 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7150 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7151 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7152 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7153 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7154 // CHECK8:       omp.inner.for.cond:
7155 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7156 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7157 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7158 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7159 // CHECK8:       omp.inner.for.body:
7160 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7161 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7162 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
7163 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7164 // CHECK8:       omp.inner.for.inc:
7165 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7166 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7167 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7168 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7169 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7170 // CHECK8:       omp.inner.for.end:
7171 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7172 // CHECK8:       omp.loop.exit:
7173 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7174 // CHECK8-NEXT:    ret void
7175 //
7176 //
7177 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..11
7178 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7179 // CHECK8-NEXT:  entry:
7180 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7181 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7182 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7183 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7184 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7185 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7186 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7187 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7188 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7189 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7190 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7191 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7192 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7193 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7194 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7195 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7196 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7197 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7198 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7199 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
7200 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7201 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7202 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7203 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7204 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7205 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7206 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7207 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7208 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7209 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
7210 // CHECK8-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
7211 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
7212 // CHECK8:       omp.dispatch.cond:
7213 // CHECK8-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
7214 // CHECK8-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
7215 // CHECK8-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7216 // CHECK8:       omp.dispatch.body:
7217 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7218 // CHECK8-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
7219 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7220 // CHECK8:       omp.inner.for.cond:
7221 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
7222 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
7223 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
7224 // CHECK8-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7225 // CHECK8:       omp.inner.for.body:
7226 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
7227 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
7228 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7229 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
7230 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7231 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
7232 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
7233 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
7234 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7235 // CHECK8:       omp.body.continue:
7236 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7237 // CHECK8:       omp.inner.for.inc:
7238 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
7239 // CHECK8-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
7240 // CHECK8-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
7241 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
7242 // CHECK8:       omp.inner.for.end:
7243 // CHECK8-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
7244 // CHECK8:       omp.dispatch.inc:
7245 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND]]
7246 // CHECK8:       omp.dispatch.end:
7247 // CHECK8-NEXT:    ret void
7248 //
7249 //
7250 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
7251 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7252 // CHECK8-NEXT:  entry:
7253 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7254 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7255 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7256 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
7257 // CHECK8-NEXT:    ret void
7258 //
7259 //
7260 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..14
7261 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7262 // CHECK8-NEXT:  entry:
7263 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7264 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7265 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7266 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7267 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7268 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7269 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7270 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7271 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7272 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7273 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7274 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7275 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7276 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7277 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7278 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
7279 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7280 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7281 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7282 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7283 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7284 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7285 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
7286 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7287 // CHECK8:       cond.true:
7288 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7289 // CHECK8:       cond.false:
7290 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7291 // CHECK8-NEXT:    br label [[COND_END]]
7292 // CHECK8:       cond.end:
7293 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7294 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7295 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7296 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7297 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7298 // CHECK8:       omp.inner.for.cond:
7299 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7300 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7301 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7302 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7303 // CHECK8:       omp.inner.for.body:
7304 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7305 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7306 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
7307 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7308 // CHECK8:       omp.inner.for.inc:
7309 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7310 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7311 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7312 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7313 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7314 // CHECK8:       omp.inner.for.end:
7315 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7316 // CHECK8:       omp.loop.exit:
7317 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7318 // CHECK8-NEXT:    ret void
7319 //
7320 //
7321 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..15
7322 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7323 // CHECK8-NEXT:  entry:
7324 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7325 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7326 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7327 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7328 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7329 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7330 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7331 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7332 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7333 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7334 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7335 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7336 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7337 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7338 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7339 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7340 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7341 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7342 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7343 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
7344 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7345 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7346 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7347 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7348 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7349 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7350 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7351 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7352 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7353 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
7354 // CHECK8-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
7355 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
7356 // CHECK8:       omp.dispatch.cond:
7357 // CHECK8-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
7358 // CHECK8-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
7359 // CHECK8-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7360 // CHECK8:       omp.dispatch.body:
7361 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7362 // CHECK8-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
7363 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7364 // CHECK8:       omp.inner.for.cond:
7365 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
7366 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
7367 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
7368 // CHECK8-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7369 // CHECK8:       omp.inner.for.body:
7370 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
7371 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
7372 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7373 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
7374 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7375 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
7376 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
7377 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
7378 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7379 // CHECK8:       omp.body.continue:
7380 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7381 // CHECK8:       omp.inner.for.inc:
7382 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
7383 // CHECK8-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
7384 // CHECK8-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
7385 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
7386 // CHECK8:       omp.inner.for.end:
7387 // CHECK8-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
7388 // CHECK8:       omp.dispatch.inc:
7389 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND]]
7390 // CHECK8:       omp.dispatch.end:
7391 // CHECK8-NEXT:    ret void
7392 //
7393 //
7394 // CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7395 // CHECK8-SAME: () #[[ATTR3:[0-9]+]] {
7396 // CHECK8-NEXT:  entry:
7397 // CHECK8-NEXT:    call void @__tgt_register_requires(i64 1)
7398 // CHECK8-NEXT:    ret void
7399 //
7400 //
7401 // CHECK13-LABEL: define {{[^@]+}}@main
7402 // CHECK13-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
7403 // CHECK13-NEXT:  entry:
7404 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
7405 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
7406 // CHECK13-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
7407 // CHECK13-NEXT:    [[N:%.*]] = alloca i32, align 4
7408 // CHECK13-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
7409 // CHECK13-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
7410 // CHECK13-NEXT:    [[M:%.*]] = alloca i32, align 4
7411 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
7412 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
7413 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
7414 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
7415 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
7416 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7417 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7418 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7419 // CHECK13-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
7420 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
7421 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
7422 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
7423 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
7424 // CHECK13-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
7425 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
7426 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
7427 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
7428 // CHECK13-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
7429 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7430 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8
7431 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8
7432 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8
7433 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8
7434 // CHECK13-NEXT:    [[_TMP26:%.*]] = alloca i32, align 4
7435 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
7436 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
7437 // CHECK13-NEXT:    [[N_CASTED35:%.*]] = alloca i64, align 8
7438 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS37:%.*]] = alloca [3 x i8*], align 8
7439 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS38:%.*]] = alloca [3 x i8*], align 8
7440 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS39:%.*]] = alloca [3 x i8*], align 8
7441 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES40:%.*]] = alloca [3 x i64], align 8
7442 // CHECK13-NEXT:    [[_TMP41:%.*]] = alloca i32, align 4
7443 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
7444 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_43:%.*]] = alloca i32, align 4
7445 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_50:%.*]] = alloca i32, align 4
7446 // CHECK13-NEXT:    [[N_CASTED51:%.*]] = alloca i64, align 8
7447 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED53:%.*]] = alloca i64, align 8
7448 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS55:%.*]] = alloca [4 x i8*], align 8
7449 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS56:%.*]] = alloca [4 x i8*], align 8
7450 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS57:%.*]] = alloca [4 x i8*], align 8
7451 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES58:%.*]] = alloca [4 x i64], align 8
7452 // CHECK13-NEXT:    [[_TMP59:%.*]] = alloca i32, align 4
7453 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_60:%.*]] = alloca i32, align 4
7454 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_61:%.*]] = alloca i32, align 4
7455 // CHECK13-NEXT:    store i32 0, i32* [[RETVAL]], align 4
7456 // CHECK13-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7457 // CHECK13-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
7458 // CHECK13-NEXT:    store i32 100, i32* [[N]], align 4
7459 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
7460 // CHECK13-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
7461 // CHECK13-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
7462 // CHECK13-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
7463 // CHECK13-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
7464 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
7465 // CHECK13-NEXT:    store i32 10, i32* [[M]], align 4
7466 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
7467 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
7468 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
7469 // CHECK13-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
7470 // CHECK13-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
7471 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7472 // CHECK13-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
7473 // CHECK13-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
7474 // CHECK13-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7475 // CHECK13-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
7476 // CHECK13-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
7477 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7478 // CHECK13-NEXT:    store i64 4, i64* [[TMP10]], align 8
7479 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7480 // CHECK13-NEXT:    store i8* null, i8** [[TMP11]], align 8
7481 // CHECK13-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7482 // CHECK13-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
7483 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
7484 // CHECK13-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7485 // CHECK13-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
7486 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
7487 // CHECK13-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
7488 // CHECK13-NEXT:    store i64 8, i64* [[TMP16]], align 8
7489 // CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
7490 // CHECK13-NEXT:    store i8* null, i8** [[TMP17]], align 8
7491 // CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7492 // CHECK13-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
7493 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
7494 // CHECK13-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7495 // CHECK13-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
7496 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
7497 // CHECK13-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
7498 // CHECK13-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
7499 // CHECK13-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
7500 // CHECK13-NEXT:    store i8* null, i8** [[TMP23]], align 8
7501 // CHECK13-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7502 // CHECK13-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7503 // CHECK13-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7504 // CHECK13-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
7505 // CHECK13-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
7506 // CHECK13-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7507 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
7508 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7509 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7510 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7511 // CHECK13-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7512 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
7513 // CHECK13-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
7514 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
7515 // CHECK13-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7516 // CHECK13-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
7517 // CHECK13-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7518 // CHECK13:       omp_offload.failed:
7519 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
7520 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
7521 // CHECK13:       omp_offload.cont:
7522 // CHECK13-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
7523 // CHECK13-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
7524 // CHECK13-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
7525 // CHECK13-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
7526 // CHECK13-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
7527 // CHECK13-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
7528 // CHECK13-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
7529 // CHECK13-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
7530 // CHECK13-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
7531 // CHECK13-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
7532 // CHECK13-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
7533 // CHECK13-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
7534 // CHECK13-NEXT:    store i64 4, i64* [[TMP40]], align 8
7535 // CHECK13-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
7536 // CHECK13-NEXT:    store i8* null, i8** [[TMP41]], align 8
7537 // CHECK13-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
7538 // CHECK13-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
7539 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
7540 // CHECK13-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
7541 // CHECK13-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
7542 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
7543 // CHECK13-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
7544 // CHECK13-NEXT:    store i64 8, i64* [[TMP46]], align 8
7545 // CHECK13-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
7546 // CHECK13-NEXT:    store i8* null, i8** [[TMP47]], align 8
7547 // CHECK13-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
7548 // CHECK13-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
7549 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
7550 // CHECK13-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
7551 // CHECK13-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
7552 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
7553 // CHECK13-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
7554 // CHECK13-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
7555 // CHECK13-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
7556 // CHECK13-NEXT:    store i8* null, i8** [[TMP53]], align 8
7557 // CHECK13-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
7558 // CHECK13-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
7559 // CHECK13-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
7560 // CHECK13-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
7561 // CHECK13-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
7562 // CHECK13-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
7563 // CHECK13-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
7564 // CHECK13-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
7565 // CHECK13-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
7566 // CHECK13-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
7567 // CHECK13-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
7568 // CHECK13-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
7569 // CHECK13-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
7570 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
7571 // CHECK13-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7572 // CHECK13-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
7573 // CHECK13-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
7574 // CHECK13:       omp_offload.failed16:
7575 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
7576 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
7577 // CHECK13:       omp_offload.cont17:
7578 // CHECK13-NEXT:    [[TMP63:%.*]] = load i32, i32* [[M]], align 4
7579 // CHECK13-NEXT:    store i32 [[TMP63]], i32* [[DOTCAPTURE_EXPR_18]], align 4
7580 // CHECK13-NEXT:    [[TMP64:%.*]] = load i32, i32* [[N]], align 4
7581 // CHECK13-NEXT:    [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
7582 // CHECK13-NEXT:    store i32 [[TMP64]], i32* [[CONV20]], align 4
7583 // CHECK13-NEXT:    [[TMP65:%.*]] = load i64, i64* [[N_CASTED19]], align 8
7584 // CHECK13-NEXT:    [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
7585 // CHECK13-NEXT:    [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
7586 // CHECK13-NEXT:    store i32 [[TMP66]], i32* [[CONV21]], align 4
7587 // CHECK13-NEXT:    [[TMP67:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
7588 // CHECK13-NEXT:    [[TMP68:%.*]] = mul nuw i64 [[TMP1]], 4
7589 // CHECK13-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
7590 // CHECK13-NEXT:    [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64*
7591 // CHECK13-NEXT:    store i64 [[TMP65]], i64* [[TMP70]], align 8
7592 // CHECK13-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
7593 // CHECK13-NEXT:    [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i64*
7594 // CHECK13-NEXT:    store i64 [[TMP65]], i64* [[TMP72]], align 8
7595 // CHECK13-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
7596 // CHECK13-NEXT:    store i64 4, i64* [[TMP73]], align 8
7597 // CHECK13-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
7598 // CHECK13-NEXT:    store i8* null, i8** [[TMP74]], align 8
7599 // CHECK13-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
7600 // CHECK13-NEXT:    [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64*
7601 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP76]], align 8
7602 // CHECK13-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
7603 // CHECK13-NEXT:    [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64*
7604 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP78]], align 8
7605 // CHECK13-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 1
7606 // CHECK13-NEXT:    store i64 8, i64* [[TMP79]], align 8
7607 // CHECK13-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
7608 // CHECK13-NEXT:    store i8* null, i8** [[TMP80]], align 8
7609 // CHECK13-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2
7610 // CHECK13-NEXT:    [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32**
7611 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP82]], align 8
7612 // CHECK13-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2
7613 // CHECK13-NEXT:    [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
7614 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP84]], align 8
7615 // CHECK13-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2
7616 // CHECK13-NEXT:    store i64 [[TMP68]], i64* [[TMP85]], align 8
7617 // CHECK13-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2
7618 // CHECK13-NEXT:    store i8* null, i8** [[TMP86]], align 8
7619 // CHECK13-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3
7620 // CHECK13-NEXT:    [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64*
7621 // CHECK13-NEXT:    store i64 [[TMP67]], i64* [[TMP88]], align 8
7622 // CHECK13-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3
7623 // CHECK13-NEXT:    [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i64*
7624 // CHECK13-NEXT:    store i64 [[TMP67]], i64* [[TMP90]], align 8
7625 // CHECK13-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 3
7626 // CHECK13-NEXT:    store i64 4, i64* [[TMP91]], align 8
7627 // CHECK13-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3
7628 // CHECK13-NEXT:    store i8* null, i8** [[TMP92]], align 8
7629 // CHECK13-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
7630 // CHECK13-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
7631 // CHECK13-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
7632 // CHECK13-NEXT:    [[TMP96:%.*]] = load i32, i32* [[N]], align 4
7633 // CHECK13-NEXT:    store i32 [[TMP96]], i32* [[DOTCAPTURE_EXPR_27]], align 4
7634 // CHECK13-NEXT:    [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
7635 // CHECK13-NEXT:    [[SUB29:%.*]] = sub nsw i32 [[TMP97]], 0
7636 // CHECK13-NEXT:    [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
7637 // CHECK13-NEXT:    [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1
7638 // CHECK13-NEXT:    store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4
7639 // CHECK13-NEXT:    [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
7640 // CHECK13-NEXT:    [[ADD32:%.*]] = add nsw i32 [[TMP98]], 1
7641 // CHECK13-NEXT:    [[TMP99:%.*]] = zext i32 [[ADD32]] to i64
7642 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP99]])
7643 // CHECK13-NEXT:    [[TMP100:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, i32 4, i8** [[TMP93]], i8** [[TMP94]], i64* [[TMP95]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7644 // CHECK13-NEXT:    [[TMP101:%.*]] = icmp ne i32 [[TMP100]], 0
7645 // CHECK13-NEXT:    br i1 [[TMP101]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]]
7646 // CHECK13:       omp_offload.failed33:
7647 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP65]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP67]]) #[[ATTR3]]
7648 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT34]]
7649 // CHECK13:       omp_offload.cont34:
7650 // CHECK13-NEXT:    [[TMP102:%.*]] = load i32, i32* [[N]], align 4
7651 // CHECK13-NEXT:    [[CONV36:%.*]] = bitcast i64* [[N_CASTED35]] to i32*
7652 // CHECK13-NEXT:    store i32 [[TMP102]], i32* [[CONV36]], align 4
7653 // CHECK13-NEXT:    [[TMP103:%.*]] = load i64, i64* [[N_CASTED35]], align 8
7654 // CHECK13-NEXT:    [[TMP104:%.*]] = mul nuw i64 [[TMP1]], 4
7655 // CHECK13-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 0
7656 // CHECK13-NEXT:    [[TMP106:%.*]] = bitcast i8** [[TMP105]] to i64*
7657 // CHECK13-NEXT:    store i64 [[TMP103]], i64* [[TMP106]], align 8
7658 // CHECK13-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 0
7659 // CHECK13-NEXT:    [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i64*
7660 // CHECK13-NEXT:    store i64 [[TMP103]], i64* [[TMP108]], align 8
7661 // CHECK13-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 0
7662 // CHECK13-NEXT:    store i64 4, i64* [[TMP109]], align 8
7663 // CHECK13-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS39]], i64 0, i64 0
7664 // CHECK13-NEXT:    store i8* null, i8** [[TMP110]], align 8
7665 // CHECK13-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 1
7666 // CHECK13-NEXT:    [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64*
7667 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP112]], align 8
7668 // CHECK13-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 1
7669 // CHECK13-NEXT:    [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i64*
7670 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP114]], align 8
7671 // CHECK13-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 1
7672 // CHECK13-NEXT:    store i64 8, i64* [[TMP115]], align 8
7673 // CHECK13-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS39]], i64 0, i64 1
7674 // CHECK13-NEXT:    store i8* null, i8** [[TMP116]], align 8
7675 // CHECK13-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 2
7676 // CHECK13-NEXT:    [[TMP118:%.*]] = bitcast i8** [[TMP117]] to i32**
7677 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP118]], align 8
7678 // CHECK13-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 2
7679 // CHECK13-NEXT:    [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
7680 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP120]], align 8
7681 // CHECK13-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 2
7682 // CHECK13-NEXT:    store i64 [[TMP104]], i64* [[TMP121]], align 8
7683 // CHECK13-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS39]], i64 0, i64 2
7684 // CHECK13-NEXT:    store i8* null, i8** [[TMP122]], align 8
7685 // CHECK13-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 0
7686 // CHECK13-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 0
7687 // CHECK13-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 0
7688 // CHECK13-NEXT:    [[TMP126:%.*]] = load i32, i32* [[N]], align 4
7689 // CHECK13-NEXT:    store i32 [[TMP126]], i32* [[DOTCAPTURE_EXPR_42]], align 4
7690 // CHECK13-NEXT:    [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
7691 // CHECK13-NEXT:    [[SUB44:%.*]] = sub nsw i32 [[TMP127]], 0
7692 // CHECK13-NEXT:    [[DIV45:%.*]] = sdiv i32 [[SUB44]], 1
7693 // CHECK13-NEXT:    [[SUB46:%.*]] = sub nsw i32 [[DIV45]], 1
7694 // CHECK13-NEXT:    store i32 [[SUB46]], i32* [[DOTCAPTURE_EXPR_43]], align 4
7695 // CHECK13-NEXT:    [[TMP128:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_43]], align 4
7696 // CHECK13-NEXT:    [[ADD47:%.*]] = add nsw i32 [[TMP128]], 1
7697 // CHECK13-NEXT:    [[TMP129:%.*]] = zext i32 [[ADD47]] to i64
7698 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP129]])
7699 // CHECK13-NEXT:    [[TMP130:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, i32 3, i8** [[TMP123]], i8** [[TMP124]], i64* [[TMP125]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7700 // CHECK13-NEXT:    [[TMP131:%.*]] = icmp ne i32 [[TMP130]], 0
7701 // CHECK13-NEXT:    br i1 [[TMP131]], label [[OMP_OFFLOAD_FAILED48:%.*]], label [[OMP_OFFLOAD_CONT49:%.*]]
7702 // CHECK13:       omp_offload.failed48:
7703 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP103]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
7704 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT49]]
7705 // CHECK13:       omp_offload.cont49:
7706 // CHECK13-NEXT:    [[TMP132:%.*]] = load i32, i32* [[M]], align 4
7707 // CHECK13-NEXT:    store i32 [[TMP132]], i32* [[DOTCAPTURE_EXPR_50]], align 4
7708 // CHECK13-NEXT:    [[TMP133:%.*]] = load i32, i32* [[N]], align 4
7709 // CHECK13-NEXT:    [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
7710 // CHECK13-NEXT:    store i32 [[TMP133]], i32* [[CONV52]], align 4
7711 // CHECK13-NEXT:    [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
7712 // CHECK13-NEXT:    [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_50]], align 4
7713 // CHECK13-NEXT:    [[CONV54:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED53]] to i32*
7714 // CHECK13-NEXT:    store i32 [[TMP135]], i32* [[CONV54]], align 4
7715 // CHECK13-NEXT:    [[TMP136:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED53]], align 8
7716 // CHECK13-NEXT:    [[TMP137:%.*]] = mul nuw i64 [[TMP1]], 4
7717 // CHECK13-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 0
7718 // CHECK13-NEXT:    [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
7719 // CHECK13-NEXT:    store i64 [[TMP134]], i64* [[TMP139]], align 8
7720 // CHECK13-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 0
7721 // CHECK13-NEXT:    [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i64*
7722 // CHECK13-NEXT:    store i64 [[TMP134]], i64* [[TMP141]], align 8
7723 // CHECK13-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 0
7724 // CHECK13-NEXT:    store i64 4, i64* [[TMP142]], align 8
7725 // CHECK13-NEXT:    [[TMP143:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 0
7726 // CHECK13-NEXT:    store i8* null, i8** [[TMP143]], align 8
7727 // CHECK13-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 1
7728 // CHECK13-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
7729 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP145]], align 8
7730 // CHECK13-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 1
7731 // CHECK13-NEXT:    [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64*
7732 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP147]], align 8
7733 // CHECK13-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 1
7734 // CHECK13-NEXT:    store i64 8, i64* [[TMP148]], align 8
7735 // CHECK13-NEXT:    [[TMP149:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 1
7736 // CHECK13-NEXT:    store i8* null, i8** [[TMP149]], align 8
7737 // CHECK13-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 2
7738 // CHECK13-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i32**
7739 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP151]], align 8
7740 // CHECK13-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 2
7741 // CHECK13-NEXT:    [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32**
7742 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP153]], align 8
7743 // CHECK13-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 2
7744 // CHECK13-NEXT:    store i64 [[TMP137]], i64* [[TMP154]], align 8
7745 // CHECK13-NEXT:    [[TMP155:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 2
7746 // CHECK13-NEXT:    store i8* null, i8** [[TMP155]], align 8
7747 // CHECK13-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 3
7748 // CHECK13-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i64*
7749 // CHECK13-NEXT:    store i64 [[TMP136]], i64* [[TMP157]], align 8
7750 // CHECK13-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 3
7751 // CHECK13-NEXT:    [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i64*
7752 // CHECK13-NEXT:    store i64 [[TMP136]], i64* [[TMP159]], align 8
7753 // CHECK13-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 3
7754 // CHECK13-NEXT:    store i64 4, i64* [[TMP160]], align 8
7755 // CHECK13-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 3
7756 // CHECK13-NEXT:    store i8* null, i8** [[TMP161]], align 8
7757 // CHECK13-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 0
7758 // CHECK13-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 0
7759 // CHECK13-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 0
7760 // CHECK13-NEXT:    [[TMP165:%.*]] = load i32, i32* [[N]], align 4
7761 // CHECK13-NEXT:    store i32 [[TMP165]], i32* [[DOTCAPTURE_EXPR_60]], align 4
7762 // CHECK13-NEXT:    [[TMP166:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_60]], align 4
7763 // CHECK13-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[TMP166]], 0
7764 // CHECK13-NEXT:    [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1
7765 // CHECK13-NEXT:    [[SUB64:%.*]] = sub nsw i32 [[DIV63]], 1
7766 // CHECK13-NEXT:    store i32 [[SUB64]], i32* [[DOTCAPTURE_EXPR_61]], align 4
7767 // CHECK13-NEXT:    [[TMP167:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_61]], align 4
7768 // CHECK13-NEXT:    [[ADD65:%.*]] = add nsw i32 [[TMP167]], 1
7769 // CHECK13-NEXT:    [[TMP168:%.*]] = zext i32 [[ADD65]] to i64
7770 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP168]])
7771 // CHECK13-NEXT:    [[TMP169:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, i32 4, i8** [[TMP162]], i8** [[TMP163]], i64* [[TMP164]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7772 // CHECK13-NEXT:    [[TMP170:%.*]] = icmp ne i32 [[TMP169]], 0
7773 // CHECK13-NEXT:    br i1 [[TMP170]], label [[OMP_OFFLOAD_FAILED66:%.*]], label [[OMP_OFFLOAD_CONT67:%.*]]
7774 // CHECK13:       omp_offload.failed66:
7775 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP136]]) #[[ATTR3]]
7776 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT67]]
7777 // CHECK13:       omp_offload.cont67:
7778 // CHECK13-NEXT:    [[TMP171:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
7779 // CHECK13-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP171]])
7780 // CHECK13-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
7781 // CHECK13-NEXT:    [[TMP172:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
7782 // CHECK13-NEXT:    call void @llvm.stackrestore(i8* [[TMP172]])
7783 // CHECK13-NEXT:    [[TMP173:%.*]] = load i32, i32* [[RETVAL]], align 4
7784 // CHECK13-NEXT:    ret i32 [[TMP173]]
7785 //
7786 //
7787 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
7788 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
7789 // CHECK13-NEXT:  entry:
7790 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
7791 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
7792 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
7793 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
7794 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
7795 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7796 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
7797 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
7798 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7799 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7800 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
7801 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
7802 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
7803 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
7804 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
7805 // CHECK13-NEXT:    ret void
7806 //
7807 //
7808 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined.
7809 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7810 // CHECK13-NEXT:  entry:
7811 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7812 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7813 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
7814 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
7815 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
7816 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7817 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7818 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7819 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7820 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
7821 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7822 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7823 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7824 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7825 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
7826 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
7827 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7828 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7829 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
7830 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7831 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
7832 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
7833 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7834 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7835 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
7836 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
7837 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7838 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7839 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7840 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7841 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7842 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
7843 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7844 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
7845 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7846 // CHECK13:       omp.precond.then:
7847 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7848 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7849 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
7850 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7851 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7852 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7853 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
7854 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7855 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7856 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7857 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
7858 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7859 // CHECK13:       cond.true:
7860 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7861 // CHECK13-NEXT:    br label [[COND_END:%.*]]
7862 // CHECK13:       cond.false:
7863 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7864 // CHECK13-NEXT:    br label [[COND_END]]
7865 // CHECK13:       cond.end:
7866 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
7867 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7868 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7869 // CHECK13-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
7870 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7871 // CHECK13:       omp.inner.for.cond:
7872 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7873 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7874 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
7875 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7876 // CHECK13:       omp.inner.for.body:
7877 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7878 // CHECK13-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
7879 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7880 // CHECK13-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
7881 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
7882 // CHECK13-NEXT:    [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
7883 // CHECK13-NEXT:    store i32 [[TMP19]], i32* [[CONV6]], align 4
7884 // CHECK13-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
7885 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
7886 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7887 // CHECK13:       omp.inner.for.inc:
7888 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7889 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7890 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
7891 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7892 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
7893 // CHECK13:       omp.inner.for.end:
7894 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7895 // CHECK13:       omp.loop.exit:
7896 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7897 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
7898 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
7899 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
7900 // CHECK13:       omp.precond.end:
7901 // CHECK13-NEXT:    ret void
7902 //
7903 //
7904 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1
7905 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7906 // CHECK13-NEXT:  entry:
7907 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7908 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7909 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7910 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7911 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
7912 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
7913 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
7914 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7915 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7916 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7917 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7918 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
7919 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7920 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7921 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7922 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7923 // CHECK13-NEXT:    [[I5:%.*]] = alloca i32, align 4
7924 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7925 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7926 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7927 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7928 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
7929 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7930 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
7931 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
7932 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7933 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7934 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
7935 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
7936 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7937 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7938 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7939 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7940 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7941 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
7942 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7943 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
7944 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7945 // CHECK13:       omp.precond.then:
7946 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7947 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7948 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
7949 // CHECK13-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7950 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
7951 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7952 // CHECK13-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
7953 // CHECK13-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
7954 // CHECK13-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
7955 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7956 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7957 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7958 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
7959 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7960 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7961 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7962 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
7963 // CHECK13-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7964 // CHECK13:       cond.true:
7965 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7966 // CHECK13-NEXT:    br label [[COND_END:%.*]]
7967 // CHECK13:       cond.false:
7968 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7969 // CHECK13-NEXT:    br label [[COND_END]]
7970 // CHECK13:       cond.end:
7971 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
7972 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7973 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7974 // CHECK13-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
7975 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7976 // CHECK13:       omp.inner.for.cond:
7977 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7978 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7979 // CHECK13-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
7980 // CHECK13-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7981 // CHECK13:       omp.inner.for.body:
7982 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7983 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
7984 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7985 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I5]], align 4
7986 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
7987 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
7988 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
7989 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
7990 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7991 // CHECK13:       omp.body.continue:
7992 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7993 // CHECK13:       omp.inner.for.inc:
7994 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7995 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
7996 // CHECK13-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
7997 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
7998 // CHECK13:       omp.inner.for.end:
7999 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8000 // CHECK13:       omp.loop.exit:
8001 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8002 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
8003 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
8004 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8005 // CHECK13:       omp.precond.end:
8006 // CHECK13-NEXT:    ret void
8007 //
8008 //
8009 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
8010 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8011 // CHECK13-NEXT:  entry:
8012 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8013 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8014 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8015 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
8016 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8017 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8018 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8019 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8020 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8021 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8022 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8023 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
8024 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
8025 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
8026 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
8027 // CHECK13-NEXT:    ret void
8028 //
8029 //
8030 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2
8031 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8032 // CHECK13-NEXT:  entry:
8033 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8034 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8035 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8036 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8037 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8038 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8039 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8040 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8041 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8042 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8043 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8044 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8045 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8046 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8047 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
8048 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
8049 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8050 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8051 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8052 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8053 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8054 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8055 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8056 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8057 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8058 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8059 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8060 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8061 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8062 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8063 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8064 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8065 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8066 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8067 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8068 // CHECK13:       omp.precond.then:
8069 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8070 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8071 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
8072 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8073 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8074 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8075 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
8076 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8077 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8078 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8079 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
8080 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8081 // CHECK13:       cond.true:
8082 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8083 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8084 // CHECK13:       cond.false:
8085 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8086 // CHECK13-NEXT:    br label [[COND_END]]
8087 // CHECK13:       cond.end:
8088 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
8089 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8090 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8091 // CHECK13-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
8092 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8093 // CHECK13:       omp.inner.for.cond:
8094 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8095 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8096 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8097 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8098 // CHECK13:       omp.inner.for.body:
8099 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8100 // CHECK13-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
8101 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8102 // CHECK13-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
8103 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
8104 // CHECK13-NEXT:    [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
8105 // CHECK13-NEXT:    store i32 [[TMP19]], i32* [[CONV6]], align 4
8106 // CHECK13-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
8107 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
8108 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8109 // CHECK13:       omp.inner.for.inc:
8110 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8111 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8112 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
8113 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8114 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8115 // CHECK13:       omp.inner.for.end:
8116 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8117 // CHECK13:       omp.loop.exit:
8118 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8119 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
8120 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
8121 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8122 // CHECK13:       omp.precond.end:
8123 // CHECK13-NEXT:    ret void
8124 //
8125 //
8126 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3
8127 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8128 // CHECK13-NEXT:  entry:
8129 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8130 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8131 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8132 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8133 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8134 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8135 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8136 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8137 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8138 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8139 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8140 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8141 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8142 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8143 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8144 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8145 // CHECK13-NEXT:    [[I5:%.*]] = alloca i32, align 4
8146 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8147 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8148 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8149 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8150 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8151 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8152 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8153 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8154 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8155 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8156 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8157 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8158 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8159 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8160 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8161 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8162 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8163 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8164 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8165 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8166 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8167 // CHECK13:       omp.precond.then:
8168 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8169 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8170 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
8171 // CHECK13-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8172 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
8173 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8174 // CHECK13-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
8175 // CHECK13-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
8176 // CHECK13-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
8177 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8178 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8179 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8180 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
8181 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8182 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8183 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8184 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
8185 // CHECK13-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8186 // CHECK13:       cond.true:
8187 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8188 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8189 // CHECK13:       cond.false:
8190 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8191 // CHECK13-NEXT:    br label [[COND_END]]
8192 // CHECK13:       cond.end:
8193 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
8194 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8195 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8196 // CHECK13-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
8197 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8198 // CHECK13:       omp.inner.for.cond:
8199 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8200 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8201 // CHECK13-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
8202 // CHECK13-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8203 // CHECK13:       omp.inner.for.body:
8204 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8205 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
8206 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8207 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I5]], align 4
8208 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
8209 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
8210 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
8211 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
8212 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8213 // CHECK13:       omp.body.continue:
8214 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8215 // CHECK13:       omp.inner.for.inc:
8216 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8217 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
8218 // CHECK13-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
8219 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8220 // CHECK13:       omp.inner.for.end:
8221 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8222 // CHECK13:       omp.loop.exit:
8223 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8224 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
8225 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
8226 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8227 // CHECK13:       omp.precond.end:
8228 // CHECK13-NEXT:    ret void
8229 //
8230 //
8231 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
8232 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8233 // CHECK13-NEXT:  entry:
8234 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8235 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8236 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8237 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8238 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
8239 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8240 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8241 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8242 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8243 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8244 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8245 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8246 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8247 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8248 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8249 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
8250 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
8251 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
8252 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
8253 // CHECK13-NEXT:    [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
8254 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[CONV3]], align 4
8255 // CHECK13-NEXT:    [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8256 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
8257 // CHECK13-NEXT:    ret void
8258 //
8259 //
8260 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5
8261 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8262 // CHECK13-NEXT:  entry:
8263 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8264 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8265 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8266 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8267 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8268 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8269 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8270 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8271 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8272 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
8273 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8274 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8275 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8276 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8277 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8278 // CHECK13-NEXT:    [[I5:%.*]] = alloca i32, align 4
8279 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
8280 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8281 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8282 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8283 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8284 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8285 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8286 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8287 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8288 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8289 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8290 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8291 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8292 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8293 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8294 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8295 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8296 // CHECK13-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
8297 // CHECK13-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
8298 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8299 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8300 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8301 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8302 // CHECK13:       omp.precond.then:
8303 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8304 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
8305 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
8306 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8307 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8308 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
8309 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8310 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
8311 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
8312 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8313 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
8314 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
8315 // CHECK13-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8316 // CHECK13:       cond.true:
8317 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
8318 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8319 // CHECK13:       cond.false:
8320 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8321 // CHECK13-NEXT:    br label [[COND_END]]
8322 // CHECK13:       cond.end:
8323 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8324 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8325 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8326 // CHECK13-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
8327 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8328 // CHECK13:       omp.inner.for.cond:
8329 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8330 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
8331 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
8332 // CHECK13-NEXT:    [[CMP7:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
8333 // CHECK13-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8334 // CHECK13:       omp.inner.for.body:
8335 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8336 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
8337 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8338 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
8339 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
8340 // CHECK13-NEXT:    [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
8341 // CHECK13-NEXT:    store i32 [[TMP20]], i32* [[CONV8]], align 4
8342 // CHECK13-NEXT:    [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
8343 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[CONV1]], align 8
8344 // CHECK13-NEXT:    [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
8345 // CHECK13-NEXT:    store i32 [[TMP22]], i32* [[CONV9]], align 4
8346 // CHECK13-NEXT:    [[TMP23:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8347 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP23]])
8348 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8349 // CHECK13:       omp.inner.for.inc:
8350 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8351 // CHECK13-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8352 // CHECK13-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
8353 // CHECK13-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
8354 // CHECK13-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8355 // CHECK13-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8356 // CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
8357 // CHECK13-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
8358 // CHECK13-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8359 // CHECK13-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8360 // CHECK13-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
8361 // CHECK13-NEXT:    store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
8362 // CHECK13-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8363 // CHECK13-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
8364 // CHECK13-NEXT:    [[CMP13:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]]
8365 // CHECK13-NEXT:    br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
8366 // CHECK13:       cond.true14:
8367 // CHECK13-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
8368 // CHECK13-NEXT:    br label [[COND_END16:%.*]]
8369 // CHECK13:       cond.false15:
8370 // CHECK13-NEXT:    [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8371 // CHECK13-NEXT:    br label [[COND_END16]]
8372 // CHECK13:       cond.end16:
8373 // CHECK13-NEXT:    [[COND17:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE14]] ], [ [[TMP33]], [[COND_FALSE15]] ]
8374 // CHECK13-NEXT:    store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
8375 // CHECK13-NEXT:    [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8376 // CHECK13-NEXT:    store i32 [[TMP34]], i32* [[DOTOMP_IV]], align 4
8377 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8378 // CHECK13:       omp.inner.for.end:
8379 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8380 // CHECK13:       omp.loop.exit:
8381 // CHECK13-NEXT:    [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8382 // CHECK13-NEXT:    [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
8383 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]])
8384 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8385 // CHECK13:       omp.precond.end:
8386 // CHECK13-NEXT:    ret void
8387 //
8388 //
8389 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6
8390 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8391 // CHECK13-NEXT:  entry:
8392 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8393 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8394 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8395 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8396 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8397 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8398 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8399 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8400 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8401 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8402 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8403 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
8404 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8405 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8406 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8407 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8408 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8409 // CHECK13-NEXT:    [[I7:%.*]] = alloca i32, align 4
8410 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8411 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8412 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8413 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8414 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8415 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8416 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8417 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8418 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8419 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8420 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8421 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8422 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8423 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8424 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8425 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8426 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8427 // CHECK13-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
8428 // CHECK13-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
8429 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8430 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8431 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8432 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8433 // CHECK13:       omp.precond.then:
8434 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8435 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
8436 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
8437 // CHECK13-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8438 // CHECK13-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
8439 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8440 // CHECK13-NEXT:    [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
8441 // CHECK13-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
8442 // CHECK13-NEXT:    store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
8443 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8444 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8445 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8446 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
8447 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8448 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8449 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
8450 // CHECK13-NEXT:    [[CMP8:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
8451 // CHECK13-NEXT:    br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8452 // CHECK13:       cond.true:
8453 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
8454 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8455 // CHECK13:       cond.false:
8456 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8457 // CHECK13-NEXT:    br label [[COND_END]]
8458 // CHECK13:       cond.end:
8459 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
8460 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8461 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8462 // CHECK13-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
8463 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8464 // CHECK13:       omp.inner.for.cond:
8465 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8466 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8467 // CHECK13-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
8468 // CHECK13-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8469 // CHECK13:       omp.inner.for.body:
8470 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8471 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
8472 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8473 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I7]], align 4
8474 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I7]], align 4
8475 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
8476 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
8477 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
8478 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8479 // CHECK13:       omp.body.continue:
8480 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8481 // CHECK13:       omp.inner.for.inc:
8482 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8483 // CHECK13-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1
8484 // CHECK13-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
8485 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8486 // CHECK13:       omp.inner.for.end:
8487 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8488 // CHECK13:       omp.loop.exit:
8489 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8490 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
8491 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
8492 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8493 // CHECK13:       omp.precond.end:
8494 // CHECK13-NEXT:    ret void
8495 //
8496 //
8497 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
8498 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8499 // CHECK13-NEXT:  entry:
8500 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8501 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8502 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8503 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
8504 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8505 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8506 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8507 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8508 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8509 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8510 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8511 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
8512 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
8513 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
8514 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
8515 // CHECK13-NEXT:    ret void
8516 //
8517 //
8518 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8
8519 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8520 // CHECK13-NEXT:  entry:
8521 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8522 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8523 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8524 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8525 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8526 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8527 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8528 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8529 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8530 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8531 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8532 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8533 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8534 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8535 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
8536 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
8537 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8538 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8539 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8540 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8541 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8542 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8543 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8544 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8545 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8546 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8547 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8548 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8549 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8550 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8551 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8552 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8553 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8554 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8555 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8556 // CHECK13:       omp.precond.then:
8557 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8558 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8559 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
8560 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8561 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8562 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8563 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
8564 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8565 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8566 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8567 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
8568 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8569 // CHECK13:       cond.true:
8570 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8571 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8572 // CHECK13:       cond.false:
8573 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8574 // CHECK13-NEXT:    br label [[COND_END]]
8575 // CHECK13:       cond.end:
8576 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
8577 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8578 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8579 // CHECK13-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
8580 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8581 // CHECK13:       omp.inner.for.cond:
8582 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8583 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8584 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8585 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8586 // CHECK13:       omp.inner.for.body:
8587 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8588 // CHECK13-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
8589 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8590 // CHECK13-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
8591 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
8592 // CHECK13-NEXT:    [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
8593 // CHECK13-NEXT:    store i32 [[TMP19]], i32* [[CONV6]], align 4
8594 // CHECK13-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
8595 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
8596 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8597 // CHECK13:       omp.inner.for.inc:
8598 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8599 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8600 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
8601 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8602 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8603 // CHECK13:       omp.inner.for.end:
8604 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8605 // CHECK13:       omp.loop.exit:
8606 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8607 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
8608 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
8609 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8610 // CHECK13:       omp.precond.end:
8611 // CHECK13-NEXT:    ret void
8612 //
8613 //
8614 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9
8615 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8616 // CHECK13-NEXT:  entry:
8617 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8618 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8619 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8620 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8621 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8622 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8623 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8624 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8625 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8626 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8627 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8628 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8629 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8630 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8631 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8632 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8633 // CHECK13-NEXT:    [[I5:%.*]] = alloca i32, align 4
8634 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8635 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8636 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8637 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8638 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8639 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8640 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8641 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8642 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8643 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8644 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8645 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8646 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8647 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8648 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8649 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8650 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8651 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8652 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8653 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8654 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8655 // CHECK13:       omp.precond.then:
8656 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8657 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8658 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
8659 // CHECK13-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8660 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
8661 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8662 // CHECK13-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
8663 // CHECK13-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
8664 // CHECK13-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
8665 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8666 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8667 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8668 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8669 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8670 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
8671 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
8672 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
8673 // CHECK13:       omp.dispatch.cond:
8674 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8675 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
8676 // CHECK13-NEXT:    [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
8677 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
8678 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8679 // CHECK13:       omp.dispatch.body:
8680 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8681 // CHECK13-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
8682 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8683 // CHECK13:       omp.inner.for.cond:
8684 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
8685 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
8686 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
8687 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8688 // CHECK13:       omp.inner.for.body:
8689 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
8690 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
8691 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8692 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !15
8693 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !15
8694 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
8695 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
8696 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
8697 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8698 // CHECK13:       omp.body.continue:
8699 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8700 // CHECK13:       omp.inner.for.inc:
8701 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
8702 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
8703 // CHECK13-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
8704 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
8705 // CHECK13:       omp.inner.for.end:
8706 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
8707 // CHECK13:       omp.dispatch.inc:
8708 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
8709 // CHECK13:       omp.dispatch.end:
8710 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8711 // CHECK13:       omp.precond.end:
8712 // CHECK13-NEXT:    ret void
8713 //
8714 //
8715 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
8716 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8717 // CHECK13-NEXT:  entry:
8718 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8719 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8720 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8721 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8722 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
8723 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8724 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8725 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8726 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8727 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8728 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8729 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8730 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8731 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8732 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8733 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
8734 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
8735 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
8736 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
8737 // CHECK13-NEXT:    [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
8738 // CHECK13-NEXT:    store i32 [[TMP4]], i32* [[CONV3]], align 4
8739 // CHECK13-NEXT:    [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8740 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
8741 // CHECK13-NEXT:    ret void
8742 //
8743 //
8744 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11
8745 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8746 // CHECK13-NEXT:  entry:
8747 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8748 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8749 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8750 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8751 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8752 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8753 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8754 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8755 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8756 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
8757 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8758 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8759 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8760 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8761 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8762 // CHECK13-NEXT:    [[I5:%.*]] = alloca i32, align 4
8763 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
8764 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8765 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8766 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8767 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8768 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8769 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8770 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8771 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8772 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8773 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8774 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8775 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8776 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8777 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8778 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8779 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8780 // CHECK13-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
8781 // CHECK13-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
8782 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8783 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8784 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8785 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8786 // CHECK13:       omp.precond.then:
8787 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8788 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
8789 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
8790 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8791 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8792 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8793 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
8794 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8795 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8796 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
8797 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
8798 // CHECK13-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8799 // CHECK13:       cond.true:
8800 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
8801 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8802 // CHECK13:       cond.false:
8803 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8804 // CHECK13-NEXT:    br label [[COND_END]]
8805 // CHECK13:       cond.end:
8806 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
8807 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8808 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8809 // CHECK13-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
8810 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8811 // CHECK13:       omp.inner.for.cond:
8812 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8813 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8814 // CHECK13-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8815 // CHECK13-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8816 // CHECK13:       omp.inner.for.body:
8817 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8818 // CHECK13-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
8819 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8820 // CHECK13-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
8821 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
8822 // CHECK13-NEXT:    [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
8823 // CHECK13-NEXT:    store i32 [[TMP19]], i32* [[CONV8]], align 4
8824 // CHECK13-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
8825 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[CONV1]], align 8
8826 // CHECK13-NEXT:    [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
8827 // CHECK13-NEXT:    store i32 [[TMP21]], i32* [[CONV9]], align 4
8828 // CHECK13-NEXT:    [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8829 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP22]])
8830 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8831 // CHECK13:       omp.inner.for.inc:
8832 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8833 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8834 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
8835 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8836 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8837 // CHECK13:       omp.inner.for.end:
8838 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8839 // CHECK13:       omp.loop.exit:
8840 // CHECK13-NEXT:    [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8841 // CHECK13-NEXT:    [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
8842 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
8843 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8844 // CHECK13:       omp.precond.end:
8845 // CHECK13-NEXT:    ret void
8846 //
8847 //
8848 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..12
8849 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8850 // CHECK13-NEXT:  entry:
8851 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8852 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8853 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8854 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8855 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8856 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8857 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8858 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8859 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8860 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8861 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8862 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
8863 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8864 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8865 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8866 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8867 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8868 // CHECK13-NEXT:    [[I7:%.*]] = alloca i32, align 4
8869 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8870 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8871 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8872 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8873 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8874 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8875 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8876 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8877 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8878 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8879 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8880 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8881 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8882 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8883 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8884 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8885 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8886 // CHECK13-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
8887 // CHECK13-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
8888 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8889 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8890 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8891 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8892 // CHECK13:       omp.precond.then:
8893 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8894 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
8895 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
8896 // CHECK13-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8897 // CHECK13-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
8898 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8899 // CHECK13-NEXT:    [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
8900 // CHECK13-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
8901 // CHECK13-NEXT:    store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
8902 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8903 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8904 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[CONV1]], align 8
8905 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8906 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8907 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8908 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
8909 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
8910 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
8911 // CHECK13:       omp.dispatch.cond:
8912 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8913 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
8914 // CHECK13-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
8915 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
8916 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8917 // CHECK13:       omp.dispatch.body:
8918 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8919 // CHECK13-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
8920 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8921 // CHECK13:       omp.inner.for.cond:
8922 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
8923 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
8924 // CHECK13-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
8925 // CHECK13-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8926 // CHECK13:       omp.inner.for.body:
8927 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
8928 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
8929 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8930 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I7]], align 4, !llvm.access.group !18
8931 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !18
8932 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
8933 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
8934 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
8935 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8936 // CHECK13:       omp.body.continue:
8937 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8938 // CHECK13:       omp.inner.for.inc:
8939 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
8940 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
8941 // CHECK13-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
8942 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
8943 // CHECK13:       omp.inner.for.end:
8944 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
8945 // CHECK13:       omp.dispatch.inc:
8946 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
8947 // CHECK13:       omp.dispatch.end:
8948 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8949 // CHECK13:       omp.precond.end:
8950 // CHECK13-NEXT:    ret void
8951 //
8952 //
8953 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
8954 // CHECK13-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
8955 // CHECK13-NEXT:  entry:
8956 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
8957 // CHECK13-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
8958 // CHECK13-NEXT:    [[M:%.*]] = alloca i32, align 4
8959 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
8960 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
8961 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
8962 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8963 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
8964 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
8965 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
8966 // CHECK13-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
8967 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8968 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8969 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
8970 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
8971 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
8972 // CHECK13-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
8973 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
8974 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
8975 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
8976 // CHECK13-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
8977 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
8978 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i64, align 8
8979 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [2 x i8*], align 8
8980 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS23:%.*]] = alloca [2 x i8*], align 8
8981 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [2 x i8*], align 8
8982 // CHECK13-NEXT:    [[_TMP25:%.*]] = alloca i32, align 4
8983 // CHECK13-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8984 // CHECK13-NEXT:    store i32 10, i32* [[M]], align 4
8985 // CHECK13-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8986 // CHECK13-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
8987 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
8988 // CHECK13-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8989 // CHECK13-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
8990 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
8991 // CHECK13-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
8992 // CHECK13-NEXT:    store i8* null, i8** [[TMP4]], align 8
8993 // CHECK13-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8994 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8995 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
8996 // CHECK13-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
8997 // CHECK13-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
8998 // CHECK13-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8999 // CHECK13:       omp_offload.failed:
9000 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
9001 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
9002 // CHECK13:       omp_offload.cont:
9003 // CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
9004 // CHECK13-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
9005 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
9006 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
9007 // CHECK13-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
9008 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
9009 // CHECK13-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
9010 // CHECK13-NEXT:    store i8* null, i8** [[TMP13]], align 8
9011 // CHECK13-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
9012 // CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
9013 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
9014 // CHECK13-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9015 // CHECK13-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
9016 // CHECK13-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
9017 // CHECK13:       omp_offload.failed5:
9018 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
9019 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
9020 // CHECK13:       omp_offload.cont6:
9021 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
9022 // CHECK13-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR_]], align 4
9023 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9024 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9025 // CHECK13-NEXT:    store i32 [[TMP19]], i32* [[CONV]], align 4
9026 // CHECK13-NEXT:    [[TMP20:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9027 // CHECK13-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
9028 // CHECK13-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [10 x i32]**
9029 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP22]], align 8
9030 // CHECK13-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
9031 // CHECK13-NEXT:    [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [10 x i32]**
9032 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP24]], align 8
9033 // CHECK13-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
9034 // CHECK13-NEXT:    store i8* null, i8** [[TMP25]], align 8
9035 // CHECK13-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
9036 // CHECK13-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
9037 // CHECK13-NEXT:    store i64 [[TMP20]], i64* [[TMP27]], align 8
9038 // CHECK13-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
9039 // CHECK13-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
9040 // CHECK13-NEXT:    store i64 [[TMP20]], i64* [[TMP29]], align 8
9041 // CHECK13-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
9042 // CHECK13-NEXT:    store i8* null, i8** [[TMP30]], align 8
9043 // CHECK13-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
9044 // CHECK13-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
9045 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
9046 // CHECK13-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, i32 2, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9047 // CHECK13-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
9048 // CHECK13-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
9049 // CHECK13:       omp_offload.failed11:
9050 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i64 [[TMP20]]) #[[ATTR3]]
9051 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
9052 // CHECK13:       omp_offload.cont12:
9053 // CHECK13-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
9054 // CHECK13-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to [10 x i32]**
9055 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP36]], align 8
9056 // CHECK13-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
9057 // CHECK13-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to [10 x i32]**
9058 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP38]], align 8
9059 // CHECK13-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
9060 // CHECK13-NEXT:    store i8* null, i8** [[TMP39]], align 8
9061 // CHECK13-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
9062 // CHECK13-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
9063 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
9064 // CHECK13-NEXT:    [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, i32 1, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9065 // CHECK13-NEXT:    [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
9066 // CHECK13-NEXT:    br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
9067 // CHECK13:       omp_offload.failed17:
9068 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
9069 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
9070 // CHECK13:       omp_offload.cont18:
9071 // CHECK13-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M]], align 4
9072 // CHECK13-NEXT:    store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_19]], align 4
9073 // CHECK13-NEXT:    [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
9074 // CHECK13-NEXT:    [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED20]] to i32*
9075 // CHECK13-NEXT:    store i32 [[TMP45]], i32* [[CONV21]], align 4
9076 // CHECK13-NEXT:    [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED20]], align 8
9077 // CHECK13-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
9078 // CHECK13-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to [10 x i32]**
9079 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP48]], align 8
9080 // CHECK13-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
9081 // CHECK13-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to [10 x i32]**
9082 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP50]], align 8
9083 // CHECK13-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
9084 // CHECK13-NEXT:    store i8* null, i8** [[TMP51]], align 8
9085 // CHECK13-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
9086 // CHECK13-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
9087 // CHECK13-NEXT:    store i64 [[TMP46]], i64* [[TMP53]], align 8
9088 // CHECK13-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
9089 // CHECK13-NEXT:    [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i64*
9090 // CHECK13-NEXT:    store i64 [[TMP46]], i64* [[TMP55]], align 8
9091 // CHECK13-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
9092 // CHECK13-NEXT:    store i8* null, i8** [[TMP56]], align 8
9093 // CHECK13-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
9094 // CHECK13-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
9095 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
9096 // CHECK13-NEXT:    [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, i32 2, i8** [[TMP57]], i8** [[TMP58]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9097 // CHECK13-NEXT:    [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0
9098 // CHECK13-NEXT:    br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED26:%.*]], label [[OMP_OFFLOAD_CONT27:%.*]]
9099 // CHECK13:       omp_offload.failed26:
9100 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i64 [[TMP46]]) #[[ATTR3]]
9101 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT27]]
9102 // CHECK13:       omp_offload.cont27:
9103 // CHECK13-NEXT:    ret i32 0
9104 //
9105 //
9106 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
9107 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9108 // CHECK13-NEXT:  entry:
9109 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9110 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9111 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9112 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
9113 // CHECK13-NEXT:    ret void
9114 //
9115 //
9116 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14
9117 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9118 // CHECK13-NEXT:  entry:
9119 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9120 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9121 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9122 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9123 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9124 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9125 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9126 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9127 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9128 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9129 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9130 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9131 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9132 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9133 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9134 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9135 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9136 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9137 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9138 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9139 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9140 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9141 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9142 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9143 // CHECK13:       cond.true:
9144 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9145 // CHECK13:       cond.false:
9146 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9147 // CHECK13-NEXT:    br label [[COND_END]]
9148 // CHECK13:       cond.end:
9149 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9150 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9151 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9152 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9153 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9154 // CHECK13:       omp.inner.for.cond:
9155 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9156 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9157 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9158 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9159 // CHECK13:       omp.inner.for.body:
9160 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9161 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
9162 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9163 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9164 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
9165 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9166 // CHECK13:       omp.inner.for.inc:
9167 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9168 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9169 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9170 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9171 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9172 // CHECK13:       omp.inner.for.end:
9173 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9174 // CHECK13:       omp.loop.exit:
9175 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9176 // CHECK13-NEXT:    ret void
9177 //
9178 //
9179 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15
9180 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9181 // CHECK13-NEXT:  entry:
9182 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9183 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9184 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9185 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9186 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9187 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9188 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9189 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9190 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9191 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9192 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9193 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9194 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9195 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9196 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9197 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9198 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9199 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9200 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9201 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
9202 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9203 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
9204 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9205 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
9206 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9207 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9208 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9209 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9210 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9211 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
9212 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9213 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9214 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
9215 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9216 // CHECK13:       cond.true:
9217 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9218 // CHECK13:       cond.false:
9219 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9220 // CHECK13-NEXT:    br label [[COND_END]]
9221 // CHECK13:       cond.end:
9222 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
9223 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9224 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9225 // CHECK13-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
9226 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9227 // CHECK13:       omp.inner.for.cond:
9228 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9229 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9230 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
9231 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9232 // CHECK13:       omp.inner.for.body:
9233 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9234 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
9235 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9236 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
9237 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
9238 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
9239 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9240 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
9241 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9242 // CHECK13:       omp.body.continue:
9243 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9244 // CHECK13:       omp.inner.for.inc:
9245 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9246 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
9247 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9248 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9249 // CHECK13:       omp.inner.for.end:
9250 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9251 // CHECK13:       omp.loop.exit:
9252 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
9253 // CHECK13-NEXT:    ret void
9254 //
9255 //
9256 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
9257 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9258 // CHECK13-NEXT:  entry:
9259 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9260 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9261 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9262 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
9263 // CHECK13-NEXT:    ret void
9264 //
9265 //
9266 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..17
9267 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9268 // CHECK13-NEXT:  entry:
9269 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9270 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9271 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9272 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9273 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9274 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9275 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9276 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9277 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9278 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9279 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9280 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9281 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9282 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9283 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9284 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9285 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9286 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9287 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9288 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9289 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9290 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9291 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9292 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9293 // CHECK13:       cond.true:
9294 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9295 // CHECK13:       cond.false:
9296 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9297 // CHECK13-NEXT:    br label [[COND_END]]
9298 // CHECK13:       cond.end:
9299 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9300 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9301 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9302 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9303 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9304 // CHECK13:       omp.inner.for.cond:
9305 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9306 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9307 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9308 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9309 // CHECK13:       omp.inner.for.body:
9310 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9311 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
9312 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9313 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9314 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
9315 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9316 // CHECK13:       omp.inner.for.inc:
9317 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9318 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9319 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9320 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9321 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9322 // CHECK13:       omp.inner.for.end:
9323 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9324 // CHECK13:       omp.loop.exit:
9325 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9326 // CHECK13-NEXT:    ret void
9327 //
9328 //
9329 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..18
9330 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9331 // CHECK13-NEXT:  entry:
9332 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9333 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9334 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9335 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9336 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9337 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9338 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9339 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9340 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9341 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9342 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9343 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9344 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9345 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9346 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9347 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9348 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9349 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9350 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9351 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
9352 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9353 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
9354 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9355 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
9356 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9357 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9358 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9359 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9360 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9361 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
9362 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9363 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9364 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
9365 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9366 // CHECK13:       cond.true:
9367 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9368 // CHECK13:       cond.false:
9369 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9370 // CHECK13-NEXT:    br label [[COND_END]]
9371 // CHECK13:       cond.end:
9372 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
9373 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9374 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9375 // CHECK13-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
9376 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9377 // CHECK13:       omp.inner.for.cond:
9378 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9379 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9380 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
9381 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9382 // CHECK13:       omp.inner.for.body:
9383 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9384 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
9385 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9386 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
9387 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
9388 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
9389 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9390 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
9391 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9392 // CHECK13:       omp.body.continue:
9393 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9394 // CHECK13:       omp.inner.for.inc:
9395 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9396 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
9397 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9398 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9399 // CHECK13:       omp.inner.for.end:
9400 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9401 // CHECK13:       omp.loop.exit:
9402 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
9403 // CHECK13-NEXT:    ret void
9404 //
9405 //
9406 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
9407 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9408 // CHECK13-NEXT:  entry:
9409 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9410 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9411 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9412 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9413 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9414 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9415 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9416 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
9417 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9418 // CHECK13-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
9419 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9420 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
9421 // CHECK13-NEXT:    ret void
9422 //
9423 //
9424 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..21
9425 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9426 // CHECK13-NEXT:  entry:
9427 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9428 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9429 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9430 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9431 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9432 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9433 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9434 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9435 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9436 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9437 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9438 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9439 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9440 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9441 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9442 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9443 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9444 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9445 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9446 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9447 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9448 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9449 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9450 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9451 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9452 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9453 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9454 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9455 // CHECK13:       cond.true:
9456 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9457 // CHECK13:       cond.false:
9458 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9459 // CHECK13-NEXT:    br label [[COND_END]]
9460 // CHECK13:       cond.end:
9461 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9462 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9463 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9464 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9465 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9466 // CHECK13:       omp.inner.for.cond:
9467 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9468 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9469 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9470 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9471 // CHECK13:       omp.inner.for.body:
9472 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9473 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
9474 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9475 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9476 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
9477 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9478 // CHECK13-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
9479 // CHECK13-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9480 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
9481 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9482 // CHECK13:       omp.inner.for.inc:
9483 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9484 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9485 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
9486 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9487 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9488 // CHECK13:       omp.inner.for.end:
9489 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9490 // CHECK13:       omp.loop.exit:
9491 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9492 // CHECK13-NEXT:    ret void
9493 //
9494 //
9495 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..22
9496 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9497 // CHECK13-NEXT:  entry:
9498 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9499 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9500 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9501 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9502 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9503 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9504 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9505 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9506 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9507 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9508 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9509 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9510 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9511 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9512 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9513 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9514 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9515 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9516 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9517 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9518 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9519 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9520 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
9521 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9522 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9523 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9524 // CHECK13-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
9525 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
9526 // CHECK13-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
9527 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9528 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9529 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
9530 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9531 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
9532 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
9533 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9534 // CHECK13:       omp.dispatch.cond:
9535 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9536 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9537 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
9538 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
9539 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9540 // CHECK13:       cond.true:
9541 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9542 // CHECK13-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
9543 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9544 // CHECK13:       cond.false:
9545 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9546 // CHECK13-NEXT:    br label [[COND_END]]
9547 // CHECK13:       cond.end:
9548 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
9549 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9550 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9551 // CHECK13-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
9552 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9553 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9554 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
9555 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9556 // CHECK13:       omp.dispatch.body:
9557 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9558 // CHECK13:       omp.inner.for.cond:
9559 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9560 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9561 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
9562 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9563 // CHECK13:       omp.inner.for.body:
9564 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9565 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
9566 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9567 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
9568 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
9569 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
9570 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9571 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
9572 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9573 // CHECK13:       omp.body.continue:
9574 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9575 // CHECK13:       omp.inner.for.inc:
9576 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9577 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
9578 // CHECK13-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
9579 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9580 // CHECK13:       omp.inner.for.end:
9581 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9582 // CHECK13:       omp.dispatch.inc:
9583 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9584 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9585 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
9586 // CHECK13-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
9587 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9588 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9589 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
9590 // CHECK13-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
9591 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
9592 // CHECK13:       omp.dispatch.end:
9593 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
9594 // CHECK13-NEXT:    ret void
9595 //
9596 //
9597 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
9598 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9599 // CHECK13-NEXT:  entry:
9600 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9601 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9602 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9603 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
9604 // CHECK13-NEXT:    ret void
9605 //
9606 //
9607 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..25
9608 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9609 // CHECK13-NEXT:  entry:
9610 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9611 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9612 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9613 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9614 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9615 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9616 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9617 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9618 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9619 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9620 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9621 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9622 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9623 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9624 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9625 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9626 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9627 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9628 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9629 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9630 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9631 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9632 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9633 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9634 // CHECK13:       cond.true:
9635 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9636 // CHECK13:       cond.false:
9637 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9638 // CHECK13-NEXT:    br label [[COND_END]]
9639 // CHECK13:       cond.end:
9640 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9641 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9642 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9643 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9644 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9645 // CHECK13:       omp.inner.for.cond:
9646 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9647 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9648 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9649 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9650 // CHECK13:       omp.inner.for.body:
9651 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9652 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
9653 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9654 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9655 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
9656 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9657 // CHECK13:       omp.inner.for.inc:
9658 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9659 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9660 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9661 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9662 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9663 // CHECK13:       omp.inner.for.end:
9664 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9665 // CHECK13:       omp.loop.exit:
9666 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9667 // CHECK13-NEXT:    ret void
9668 //
9669 //
9670 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..26
9671 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9672 // CHECK13-NEXT:  entry:
9673 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9674 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9675 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9676 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9677 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9678 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9679 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9680 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9681 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9682 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9683 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9684 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9685 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9686 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9687 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9688 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9689 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9690 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9691 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9692 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
9693 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9694 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
9695 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9696 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
9697 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9698 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9699 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9700 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9701 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9702 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9703 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9704 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
9705 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
9706 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9707 // CHECK13:       omp.dispatch.cond:
9708 // CHECK13-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
9709 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
9710 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9711 // CHECK13:       omp.dispatch.body:
9712 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9713 // CHECK13-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
9714 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9715 // CHECK13:       omp.inner.for.cond:
9716 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
9717 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
9718 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
9719 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9720 // CHECK13:       omp.inner.for.body:
9721 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
9722 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
9723 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9724 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
9725 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
9726 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
9727 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9728 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
9729 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9730 // CHECK13:       omp.body.continue:
9731 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9732 // CHECK13:       omp.inner.for.inc:
9733 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
9734 // CHECK13-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
9735 // CHECK13-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
9736 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
9737 // CHECK13:       omp.inner.for.end:
9738 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9739 // CHECK13:       omp.dispatch.inc:
9740 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
9741 // CHECK13:       omp.dispatch.end:
9742 // CHECK13-NEXT:    ret void
9743 //
9744 //
9745 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
9746 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9747 // CHECK13-NEXT:  entry:
9748 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9749 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9750 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9751 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9752 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9753 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9754 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9755 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
9756 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9757 // CHECK13-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
9758 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9759 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
9760 // CHECK13-NEXT:    ret void
9761 //
9762 //
9763 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..29
9764 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9765 // CHECK13-NEXT:  entry:
9766 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9767 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9768 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9769 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9770 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9771 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9772 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9773 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9774 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9775 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9776 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9777 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9778 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9779 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9780 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9781 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9782 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9783 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9784 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9785 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9786 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9787 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9788 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9789 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9790 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9791 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9792 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9793 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9794 // CHECK13:       cond.true:
9795 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9796 // CHECK13:       cond.false:
9797 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9798 // CHECK13-NEXT:    br label [[COND_END]]
9799 // CHECK13:       cond.end:
9800 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9801 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9802 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9803 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9804 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9805 // CHECK13:       omp.inner.for.cond:
9806 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9807 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9808 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9809 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9810 // CHECK13:       omp.inner.for.body:
9811 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9812 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
9813 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9814 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9815 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
9816 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9817 // CHECK13-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
9818 // CHECK13-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9819 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
9820 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9821 // CHECK13:       omp.inner.for.inc:
9822 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9823 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9824 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
9825 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9826 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9827 // CHECK13:       omp.inner.for.end:
9828 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9829 // CHECK13:       omp.loop.exit:
9830 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9831 // CHECK13-NEXT:    ret void
9832 //
9833 //
9834 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..30
9835 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9836 // CHECK13-NEXT:  entry:
9837 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9838 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9839 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9840 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9841 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9842 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9843 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9844 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9845 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9846 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9847 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9848 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9849 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9850 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9851 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9852 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9853 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9854 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9855 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9856 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9857 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9858 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9859 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
9860 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9861 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9862 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9863 // CHECK13-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
9864 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
9865 // CHECK13-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
9866 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9867 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9868 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
9869 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9870 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9871 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9872 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
9873 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
9874 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9875 // CHECK13:       omp.dispatch.cond:
9876 // CHECK13-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
9877 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
9878 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9879 // CHECK13:       omp.dispatch.body:
9880 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9881 // CHECK13-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
9882 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9883 // CHECK13:       omp.inner.for.cond:
9884 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
9885 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
9886 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
9887 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9888 // CHECK13:       omp.inner.for.body:
9889 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
9890 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
9891 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9892 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
9893 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
9894 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
9895 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9896 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
9897 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9898 // CHECK13:       omp.body.continue:
9899 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9900 // CHECK13:       omp.inner.for.inc:
9901 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
9902 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
9903 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
9904 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
9905 // CHECK13:       omp.inner.for.end:
9906 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9907 // CHECK13:       omp.dispatch.inc:
9908 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
9909 // CHECK13:       omp.dispatch.end:
9910 // CHECK13-NEXT:    ret void
9911 //
9912 //
9913 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
9914 // CHECK13-SAME: () #[[ATTR5:[0-9]+]] {
9915 // CHECK13-NEXT:  entry:
9916 // CHECK13-NEXT:    call void @__tgt_register_requires(i64 1)
9917 // CHECK13-NEXT:    ret void
9918 //
9919 //
9920 // CHECK14-LABEL: define {{[^@]+}}@main
9921 // CHECK14-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9922 // CHECK14-NEXT:  entry:
9923 // CHECK14-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
9924 // CHECK14-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
9925 // CHECK14-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
9926 // CHECK14-NEXT:    [[N:%.*]] = alloca i32, align 4
9927 // CHECK14-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
9928 // CHECK14-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
9929 // CHECK14-NEXT:    [[M:%.*]] = alloca i32, align 4
9930 // CHECK14-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
9931 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
9932 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
9933 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
9934 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
9935 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9936 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9937 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9938 // CHECK14-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
9939 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
9940 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
9941 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
9942 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
9943 // CHECK14-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
9944 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
9945 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
9946 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
9947 // CHECK14-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
9948 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9949 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8
9950 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8
9951 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8
9952 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8
9953 // CHECK14-NEXT:    [[_TMP26:%.*]] = alloca i32, align 4
9954 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
9955 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
9956 // CHECK14-NEXT:    [[N_CASTED35:%.*]] = alloca i64, align 8
9957 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS37:%.*]] = alloca [3 x i8*], align 8
9958 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS38:%.*]] = alloca [3 x i8*], align 8
9959 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS39:%.*]] = alloca [3 x i8*], align 8
9960 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES40:%.*]] = alloca [3 x i64], align 8
9961 // CHECK14-NEXT:    [[_TMP41:%.*]] = alloca i32, align 4
9962 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
9963 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_43:%.*]] = alloca i32, align 4
9964 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_50:%.*]] = alloca i32, align 4
9965 // CHECK14-NEXT:    [[N_CASTED51:%.*]] = alloca i64, align 8
9966 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED53:%.*]] = alloca i64, align 8
9967 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS55:%.*]] = alloca [4 x i8*], align 8
9968 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS56:%.*]] = alloca [4 x i8*], align 8
9969 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS57:%.*]] = alloca [4 x i8*], align 8
9970 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES58:%.*]] = alloca [4 x i64], align 8
9971 // CHECK14-NEXT:    [[_TMP59:%.*]] = alloca i32, align 4
9972 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_60:%.*]] = alloca i32, align 4
9973 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_61:%.*]] = alloca i32, align 4
9974 // CHECK14-NEXT:    store i32 0, i32* [[RETVAL]], align 4
9975 // CHECK14-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9976 // CHECK14-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
9977 // CHECK14-NEXT:    store i32 100, i32* [[N]], align 4
9978 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
9979 // CHECK14-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
9980 // CHECK14-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
9981 // CHECK14-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
9982 // CHECK14-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
9983 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
9984 // CHECK14-NEXT:    store i32 10, i32* [[M]], align 4
9985 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
9986 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
9987 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
9988 // CHECK14-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
9989 // CHECK14-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
9990 // CHECK14-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9991 // CHECK14-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
9992 // CHECK14-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
9993 // CHECK14-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9994 // CHECK14-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
9995 // CHECK14-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
9996 // CHECK14-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
9997 // CHECK14-NEXT:    store i64 4, i64* [[TMP10]], align 8
9998 // CHECK14-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
9999 // CHECK14-NEXT:    store i8* null, i8** [[TMP11]], align 8
10000 // CHECK14-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
10001 // CHECK14-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
10002 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
10003 // CHECK14-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
10004 // CHECK14-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
10005 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
10006 // CHECK14-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
10007 // CHECK14-NEXT:    store i64 8, i64* [[TMP16]], align 8
10008 // CHECK14-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
10009 // CHECK14-NEXT:    store i8* null, i8** [[TMP17]], align 8
10010 // CHECK14-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
10011 // CHECK14-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
10012 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
10013 // CHECK14-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
10014 // CHECK14-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
10015 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
10016 // CHECK14-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
10017 // CHECK14-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
10018 // CHECK14-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
10019 // CHECK14-NEXT:    store i8* null, i8** [[TMP23]], align 8
10020 // CHECK14-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10021 // CHECK14-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10022 // CHECK14-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
10023 // CHECK14-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
10024 // CHECK14-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
10025 // CHECK14-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10026 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
10027 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10028 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10029 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10030 // CHECK14-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10031 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
10032 // CHECK14-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
10033 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
10034 // CHECK14-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10035 // CHECK14-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
10036 // CHECK14-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
10037 // CHECK14:       omp_offload.failed:
10038 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
10039 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT]]
10040 // CHECK14:       omp_offload.cont:
10041 // CHECK14-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
10042 // CHECK14-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
10043 // CHECK14-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
10044 // CHECK14-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
10045 // CHECK14-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
10046 // CHECK14-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
10047 // CHECK14-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
10048 // CHECK14-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
10049 // CHECK14-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
10050 // CHECK14-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
10051 // CHECK14-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
10052 // CHECK14-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
10053 // CHECK14-NEXT:    store i64 4, i64* [[TMP40]], align 8
10054 // CHECK14-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
10055 // CHECK14-NEXT:    store i8* null, i8** [[TMP41]], align 8
10056 // CHECK14-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
10057 // CHECK14-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
10058 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
10059 // CHECK14-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
10060 // CHECK14-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
10061 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
10062 // CHECK14-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
10063 // CHECK14-NEXT:    store i64 8, i64* [[TMP46]], align 8
10064 // CHECK14-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
10065 // CHECK14-NEXT:    store i8* null, i8** [[TMP47]], align 8
10066 // CHECK14-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
10067 // CHECK14-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
10068 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
10069 // CHECK14-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
10070 // CHECK14-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
10071 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
10072 // CHECK14-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
10073 // CHECK14-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
10074 // CHECK14-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
10075 // CHECK14-NEXT:    store i8* null, i8** [[TMP53]], align 8
10076 // CHECK14-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
10077 // CHECK14-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
10078 // CHECK14-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
10079 // CHECK14-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
10080 // CHECK14-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
10081 // CHECK14-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
10082 // CHECK14-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
10083 // CHECK14-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
10084 // CHECK14-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
10085 // CHECK14-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
10086 // CHECK14-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
10087 // CHECK14-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
10088 // CHECK14-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
10089 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
10090 // CHECK14-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10091 // CHECK14-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
10092 // CHECK14-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
10093 // CHECK14:       omp_offload.failed16:
10094 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
10095 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
10096 // CHECK14:       omp_offload.cont17:
10097 // CHECK14-NEXT:    [[TMP63:%.*]] = load i32, i32* [[M]], align 4
10098 // CHECK14-NEXT:    store i32 [[TMP63]], i32* [[DOTCAPTURE_EXPR_18]], align 4
10099 // CHECK14-NEXT:    [[TMP64:%.*]] = load i32, i32* [[N]], align 4
10100 // CHECK14-NEXT:    [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
10101 // CHECK14-NEXT:    store i32 [[TMP64]], i32* [[CONV20]], align 4
10102 // CHECK14-NEXT:    [[TMP65:%.*]] = load i64, i64* [[N_CASTED19]], align 8
10103 // CHECK14-NEXT:    [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
10104 // CHECK14-NEXT:    [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10105 // CHECK14-NEXT:    store i32 [[TMP66]], i32* [[CONV21]], align 4
10106 // CHECK14-NEXT:    [[TMP67:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10107 // CHECK14-NEXT:    [[TMP68:%.*]] = mul nuw i64 [[TMP1]], 4
10108 // CHECK14-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
10109 // CHECK14-NEXT:    [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64*
10110 // CHECK14-NEXT:    store i64 [[TMP65]], i64* [[TMP70]], align 8
10111 // CHECK14-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
10112 // CHECK14-NEXT:    [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i64*
10113 // CHECK14-NEXT:    store i64 [[TMP65]], i64* [[TMP72]], align 8
10114 // CHECK14-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
10115 // CHECK14-NEXT:    store i64 4, i64* [[TMP73]], align 8
10116 // CHECK14-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
10117 // CHECK14-NEXT:    store i8* null, i8** [[TMP74]], align 8
10118 // CHECK14-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
10119 // CHECK14-NEXT:    [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64*
10120 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP76]], align 8
10121 // CHECK14-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
10122 // CHECK14-NEXT:    [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64*
10123 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP78]], align 8
10124 // CHECK14-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 1
10125 // CHECK14-NEXT:    store i64 8, i64* [[TMP79]], align 8
10126 // CHECK14-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
10127 // CHECK14-NEXT:    store i8* null, i8** [[TMP80]], align 8
10128 // CHECK14-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2
10129 // CHECK14-NEXT:    [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32**
10130 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP82]], align 8
10131 // CHECK14-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2
10132 // CHECK14-NEXT:    [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
10133 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP84]], align 8
10134 // CHECK14-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2
10135 // CHECK14-NEXT:    store i64 [[TMP68]], i64* [[TMP85]], align 8
10136 // CHECK14-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2
10137 // CHECK14-NEXT:    store i8* null, i8** [[TMP86]], align 8
10138 // CHECK14-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3
10139 // CHECK14-NEXT:    [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64*
10140 // CHECK14-NEXT:    store i64 [[TMP67]], i64* [[TMP88]], align 8
10141 // CHECK14-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3
10142 // CHECK14-NEXT:    [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i64*
10143 // CHECK14-NEXT:    store i64 [[TMP67]], i64* [[TMP90]], align 8
10144 // CHECK14-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 3
10145 // CHECK14-NEXT:    store i64 4, i64* [[TMP91]], align 8
10146 // CHECK14-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3
10147 // CHECK14-NEXT:    store i8* null, i8** [[TMP92]], align 8
10148 // CHECK14-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
10149 // CHECK14-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
10150 // CHECK14-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
10151 // CHECK14-NEXT:    [[TMP96:%.*]] = load i32, i32* [[N]], align 4
10152 // CHECK14-NEXT:    store i32 [[TMP96]], i32* [[DOTCAPTURE_EXPR_27]], align 4
10153 // CHECK14-NEXT:    [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
10154 // CHECK14-NEXT:    [[SUB29:%.*]] = sub nsw i32 [[TMP97]], 0
10155 // CHECK14-NEXT:    [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
10156 // CHECK14-NEXT:    [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1
10157 // CHECK14-NEXT:    store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4
10158 // CHECK14-NEXT:    [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
10159 // CHECK14-NEXT:    [[ADD32:%.*]] = add nsw i32 [[TMP98]], 1
10160 // CHECK14-NEXT:    [[TMP99:%.*]] = zext i32 [[ADD32]] to i64
10161 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP99]])
10162 // CHECK14-NEXT:    [[TMP100:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, i32 4, i8** [[TMP93]], i8** [[TMP94]], i64* [[TMP95]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10163 // CHECK14-NEXT:    [[TMP101:%.*]] = icmp ne i32 [[TMP100]], 0
10164 // CHECK14-NEXT:    br i1 [[TMP101]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]]
10165 // CHECK14:       omp_offload.failed33:
10166 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP65]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP67]]) #[[ATTR3]]
10167 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT34]]
10168 // CHECK14:       omp_offload.cont34:
10169 // CHECK14-NEXT:    [[TMP102:%.*]] = load i32, i32* [[N]], align 4
10170 // CHECK14-NEXT:    [[CONV36:%.*]] = bitcast i64* [[N_CASTED35]] to i32*
10171 // CHECK14-NEXT:    store i32 [[TMP102]], i32* [[CONV36]], align 4
10172 // CHECK14-NEXT:    [[TMP103:%.*]] = load i64, i64* [[N_CASTED35]], align 8
10173 // CHECK14-NEXT:    [[TMP104:%.*]] = mul nuw i64 [[TMP1]], 4
10174 // CHECK14-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 0
10175 // CHECK14-NEXT:    [[TMP106:%.*]] = bitcast i8** [[TMP105]] to i64*
10176 // CHECK14-NEXT:    store i64 [[TMP103]], i64* [[TMP106]], align 8
10177 // CHECK14-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 0
10178 // CHECK14-NEXT:    [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i64*
10179 // CHECK14-NEXT:    store i64 [[TMP103]], i64* [[TMP108]], align 8
10180 // CHECK14-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 0
10181 // CHECK14-NEXT:    store i64 4, i64* [[TMP109]], align 8
10182 // CHECK14-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS39]], i64 0, i64 0
10183 // CHECK14-NEXT:    store i8* null, i8** [[TMP110]], align 8
10184 // CHECK14-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 1
10185 // CHECK14-NEXT:    [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64*
10186 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP112]], align 8
10187 // CHECK14-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 1
10188 // CHECK14-NEXT:    [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i64*
10189 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP114]], align 8
10190 // CHECK14-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 1
10191 // CHECK14-NEXT:    store i64 8, i64* [[TMP115]], align 8
10192 // CHECK14-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS39]], i64 0, i64 1
10193 // CHECK14-NEXT:    store i8* null, i8** [[TMP116]], align 8
10194 // CHECK14-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 2
10195 // CHECK14-NEXT:    [[TMP118:%.*]] = bitcast i8** [[TMP117]] to i32**
10196 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP118]], align 8
10197 // CHECK14-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 2
10198 // CHECK14-NEXT:    [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
10199 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP120]], align 8
10200 // CHECK14-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 2
10201 // CHECK14-NEXT:    store i64 [[TMP104]], i64* [[TMP121]], align 8
10202 // CHECK14-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS39]], i64 0, i64 2
10203 // CHECK14-NEXT:    store i8* null, i8** [[TMP122]], align 8
10204 // CHECK14-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 0
10205 // CHECK14-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 0
10206 // CHECK14-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 0
10207 // CHECK14-NEXT:    [[TMP126:%.*]] = load i32, i32* [[N]], align 4
10208 // CHECK14-NEXT:    store i32 [[TMP126]], i32* [[DOTCAPTURE_EXPR_42]], align 4
10209 // CHECK14-NEXT:    [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
10210 // CHECK14-NEXT:    [[SUB44:%.*]] = sub nsw i32 [[TMP127]], 0
10211 // CHECK14-NEXT:    [[DIV45:%.*]] = sdiv i32 [[SUB44]], 1
10212 // CHECK14-NEXT:    [[SUB46:%.*]] = sub nsw i32 [[DIV45]], 1
10213 // CHECK14-NEXT:    store i32 [[SUB46]], i32* [[DOTCAPTURE_EXPR_43]], align 4
10214 // CHECK14-NEXT:    [[TMP128:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_43]], align 4
10215 // CHECK14-NEXT:    [[ADD47:%.*]] = add nsw i32 [[TMP128]], 1
10216 // CHECK14-NEXT:    [[TMP129:%.*]] = zext i32 [[ADD47]] to i64
10217 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP129]])
10218 // CHECK14-NEXT:    [[TMP130:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, i32 3, i8** [[TMP123]], i8** [[TMP124]], i64* [[TMP125]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10219 // CHECK14-NEXT:    [[TMP131:%.*]] = icmp ne i32 [[TMP130]], 0
10220 // CHECK14-NEXT:    br i1 [[TMP131]], label [[OMP_OFFLOAD_FAILED48:%.*]], label [[OMP_OFFLOAD_CONT49:%.*]]
10221 // CHECK14:       omp_offload.failed48:
10222 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP103]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
10223 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT49]]
10224 // CHECK14:       omp_offload.cont49:
10225 // CHECK14-NEXT:    [[TMP132:%.*]] = load i32, i32* [[M]], align 4
10226 // CHECK14-NEXT:    store i32 [[TMP132]], i32* [[DOTCAPTURE_EXPR_50]], align 4
10227 // CHECK14-NEXT:    [[TMP133:%.*]] = load i32, i32* [[N]], align 4
10228 // CHECK14-NEXT:    [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
10229 // CHECK14-NEXT:    store i32 [[TMP133]], i32* [[CONV52]], align 4
10230 // CHECK14-NEXT:    [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
10231 // CHECK14-NEXT:    [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_50]], align 4
10232 // CHECK14-NEXT:    [[CONV54:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED53]] to i32*
10233 // CHECK14-NEXT:    store i32 [[TMP135]], i32* [[CONV54]], align 4
10234 // CHECK14-NEXT:    [[TMP136:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED53]], align 8
10235 // CHECK14-NEXT:    [[TMP137:%.*]] = mul nuw i64 [[TMP1]], 4
10236 // CHECK14-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 0
10237 // CHECK14-NEXT:    [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
10238 // CHECK14-NEXT:    store i64 [[TMP134]], i64* [[TMP139]], align 8
10239 // CHECK14-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 0
10240 // CHECK14-NEXT:    [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i64*
10241 // CHECK14-NEXT:    store i64 [[TMP134]], i64* [[TMP141]], align 8
10242 // CHECK14-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 0
10243 // CHECK14-NEXT:    store i64 4, i64* [[TMP142]], align 8
10244 // CHECK14-NEXT:    [[TMP143:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 0
10245 // CHECK14-NEXT:    store i8* null, i8** [[TMP143]], align 8
10246 // CHECK14-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 1
10247 // CHECK14-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
10248 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP145]], align 8
10249 // CHECK14-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 1
10250 // CHECK14-NEXT:    [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64*
10251 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP147]], align 8
10252 // CHECK14-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 1
10253 // CHECK14-NEXT:    store i64 8, i64* [[TMP148]], align 8
10254 // CHECK14-NEXT:    [[TMP149:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 1
10255 // CHECK14-NEXT:    store i8* null, i8** [[TMP149]], align 8
10256 // CHECK14-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 2
10257 // CHECK14-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i32**
10258 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP151]], align 8
10259 // CHECK14-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 2
10260 // CHECK14-NEXT:    [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32**
10261 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP153]], align 8
10262 // CHECK14-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 2
10263 // CHECK14-NEXT:    store i64 [[TMP137]], i64* [[TMP154]], align 8
10264 // CHECK14-NEXT:    [[TMP155:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 2
10265 // CHECK14-NEXT:    store i8* null, i8** [[TMP155]], align 8
10266 // CHECK14-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 3
10267 // CHECK14-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i64*
10268 // CHECK14-NEXT:    store i64 [[TMP136]], i64* [[TMP157]], align 8
10269 // CHECK14-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 3
10270 // CHECK14-NEXT:    [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i64*
10271 // CHECK14-NEXT:    store i64 [[TMP136]], i64* [[TMP159]], align 8
10272 // CHECK14-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 3
10273 // CHECK14-NEXT:    store i64 4, i64* [[TMP160]], align 8
10274 // CHECK14-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 3
10275 // CHECK14-NEXT:    store i8* null, i8** [[TMP161]], align 8
10276 // CHECK14-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 0
10277 // CHECK14-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 0
10278 // CHECK14-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 0
10279 // CHECK14-NEXT:    [[TMP165:%.*]] = load i32, i32* [[N]], align 4
10280 // CHECK14-NEXT:    store i32 [[TMP165]], i32* [[DOTCAPTURE_EXPR_60]], align 4
10281 // CHECK14-NEXT:    [[TMP166:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_60]], align 4
10282 // CHECK14-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[TMP166]], 0
10283 // CHECK14-NEXT:    [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1
10284 // CHECK14-NEXT:    [[SUB64:%.*]] = sub nsw i32 [[DIV63]], 1
10285 // CHECK14-NEXT:    store i32 [[SUB64]], i32* [[DOTCAPTURE_EXPR_61]], align 4
10286 // CHECK14-NEXT:    [[TMP167:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_61]], align 4
10287 // CHECK14-NEXT:    [[ADD65:%.*]] = add nsw i32 [[TMP167]], 1
10288 // CHECK14-NEXT:    [[TMP168:%.*]] = zext i32 [[ADD65]] to i64
10289 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP168]])
10290 // CHECK14-NEXT:    [[TMP169:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, i32 4, i8** [[TMP162]], i8** [[TMP163]], i64* [[TMP164]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10291 // CHECK14-NEXT:    [[TMP170:%.*]] = icmp ne i32 [[TMP169]], 0
10292 // CHECK14-NEXT:    br i1 [[TMP170]], label [[OMP_OFFLOAD_FAILED66:%.*]], label [[OMP_OFFLOAD_CONT67:%.*]]
10293 // CHECK14:       omp_offload.failed66:
10294 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP136]]) #[[ATTR3]]
10295 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT67]]
10296 // CHECK14:       omp_offload.cont67:
10297 // CHECK14-NEXT:    [[TMP171:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
10298 // CHECK14-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP171]])
10299 // CHECK14-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
10300 // CHECK14-NEXT:    [[TMP172:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
10301 // CHECK14-NEXT:    call void @llvm.stackrestore(i8* [[TMP172]])
10302 // CHECK14-NEXT:    [[TMP173:%.*]] = load i32, i32* [[RETVAL]], align 4
10303 // CHECK14-NEXT:    ret i32 [[TMP173]]
10304 //
10305 //
10306 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
10307 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
10308 // CHECK14-NEXT:  entry:
10309 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10310 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10311 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10312 // CHECK14-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10313 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10314 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10315 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10316 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10317 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10318 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10319 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
10320 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10321 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
10322 // CHECK14-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
10323 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
10324 // CHECK14-NEXT:    ret void
10325 //
10326 //
10327 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined.
10328 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10329 // CHECK14-NEXT:  entry:
10330 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10331 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10332 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10333 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10334 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10335 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10336 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10337 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10338 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10339 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10340 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10341 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10342 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10343 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10344 // CHECK14-NEXT:    [[I3:%.*]] = alloca i32, align 4
10345 // CHECK14-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10346 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10347 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10348 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10349 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10350 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10351 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10352 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10353 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10354 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
10355 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10356 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10357 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10358 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10359 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10360 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10361 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10362 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10363 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10364 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10365 // CHECK14:       omp.precond.then:
10366 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10367 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10368 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
10369 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10370 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10371 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10372 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
10373 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10374 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10375 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10376 // CHECK14-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
10377 // CHECK14-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10378 // CHECK14:       cond.true:
10379 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10380 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10381 // CHECK14:       cond.false:
10382 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10383 // CHECK14-NEXT:    br label [[COND_END]]
10384 // CHECK14:       cond.end:
10385 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
10386 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10387 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10388 // CHECK14-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
10389 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10390 // CHECK14:       omp.inner.for.cond:
10391 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10392 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10393 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
10394 // CHECK14-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10395 // CHECK14:       omp.inner.for.body:
10396 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10397 // CHECK14-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
10398 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10399 // CHECK14-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
10400 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
10401 // CHECK14-NEXT:    [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10402 // CHECK14-NEXT:    store i32 [[TMP19]], i32* [[CONV6]], align 4
10403 // CHECK14-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
10404 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
10405 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10406 // CHECK14:       omp.inner.for.inc:
10407 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10408 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10409 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
10410 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10411 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10412 // CHECK14:       omp.inner.for.end:
10413 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10414 // CHECK14:       omp.loop.exit:
10415 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10416 // CHECK14-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
10417 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
10418 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
10419 // CHECK14:       omp.precond.end:
10420 // CHECK14-NEXT:    ret void
10421 //
10422 //
10423 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1
10424 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10425 // CHECK14-NEXT:  entry:
10426 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10427 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10428 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10429 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10430 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10431 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10432 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10433 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10434 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10435 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10436 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10437 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10438 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10439 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10440 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10441 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10442 // CHECK14-NEXT:    [[I5:%.*]] = alloca i32, align 4
10443 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10444 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10445 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10446 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10447 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10448 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10449 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10450 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10451 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10452 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10453 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
10454 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10455 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10456 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10457 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10458 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10459 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10460 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10461 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10462 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10463 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10464 // CHECK14:       omp.precond.then:
10465 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10466 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10467 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
10468 // CHECK14-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10469 // CHECK14-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
10470 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10471 // CHECK14-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
10472 // CHECK14-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
10473 // CHECK14-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
10474 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10475 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10476 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10477 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
10478 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10479 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10480 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10481 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
10482 // CHECK14-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10483 // CHECK14:       cond.true:
10484 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10485 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10486 // CHECK14:       cond.false:
10487 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10488 // CHECK14-NEXT:    br label [[COND_END]]
10489 // CHECK14:       cond.end:
10490 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
10491 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10492 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10493 // CHECK14-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
10494 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10495 // CHECK14:       omp.inner.for.cond:
10496 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10497 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10498 // CHECK14-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
10499 // CHECK14-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10500 // CHECK14:       omp.inner.for.body:
10501 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10502 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
10503 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10504 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I5]], align 4
10505 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
10506 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
10507 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
10508 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
10509 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10510 // CHECK14:       omp.body.continue:
10511 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10512 // CHECK14:       omp.inner.for.inc:
10513 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10514 // CHECK14-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
10515 // CHECK14-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
10516 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10517 // CHECK14:       omp.inner.for.end:
10518 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10519 // CHECK14:       omp.loop.exit:
10520 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10521 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
10522 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
10523 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
10524 // CHECK14:       omp.precond.end:
10525 // CHECK14-NEXT:    ret void
10526 //
10527 //
10528 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
10529 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10530 // CHECK14-NEXT:  entry:
10531 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10532 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10533 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10534 // CHECK14-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10535 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10536 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10537 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10538 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10539 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10540 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10541 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
10542 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10543 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
10544 // CHECK14-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
10545 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
10546 // CHECK14-NEXT:    ret void
10547 //
10548 //
10549 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2
10550 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10551 // CHECK14-NEXT:  entry:
10552 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10553 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10554 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10555 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10556 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10557 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10558 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10559 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10560 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10561 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10562 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10563 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10564 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10565 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10566 // CHECK14-NEXT:    [[I3:%.*]] = alloca i32, align 4
10567 // CHECK14-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10568 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10569 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10570 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10571 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10572 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10573 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10574 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10575 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10576 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
10577 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10578 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10579 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10580 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10581 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10582 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10583 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10584 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10585 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10586 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10587 // CHECK14:       omp.precond.then:
10588 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10589 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10590 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
10591 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10592 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10593 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10594 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
10595 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10596 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10597 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10598 // CHECK14-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
10599 // CHECK14-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10600 // CHECK14:       cond.true:
10601 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10602 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10603 // CHECK14:       cond.false:
10604 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10605 // CHECK14-NEXT:    br label [[COND_END]]
10606 // CHECK14:       cond.end:
10607 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
10608 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10609 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10610 // CHECK14-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
10611 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10612 // CHECK14:       omp.inner.for.cond:
10613 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10614 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10615 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
10616 // CHECK14-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10617 // CHECK14:       omp.inner.for.body:
10618 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10619 // CHECK14-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
10620 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10621 // CHECK14-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
10622 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
10623 // CHECK14-NEXT:    [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10624 // CHECK14-NEXT:    store i32 [[TMP19]], i32* [[CONV6]], align 4
10625 // CHECK14-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
10626 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
10627 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10628 // CHECK14:       omp.inner.for.inc:
10629 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10630 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10631 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
10632 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10633 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10634 // CHECK14:       omp.inner.for.end:
10635 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10636 // CHECK14:       omp.loop.exit:
10637 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10638 // CHECK14-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
10639 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
10640 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
10641 // CHECK14:       omp.precond.end:
10642 // CHECK14-NEXT:    ret void
10643 //
10644 //
10645 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3
10646 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10647 // CHECK14-NEXT:  entry:
10648 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10649 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10650 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10651 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10652 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10653 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10654 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10655 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10656 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10657 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10658 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10659 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10660 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10661 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10662 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10663 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10664 // CHECK14-NEXT:    [[I5:%.*]] = alloca i32, align 4
10665 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10666 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10667 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10668 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10669 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10670 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10671 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10672 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10673 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10674 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10675 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
10676 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10677 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10678 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10679 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10680 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10681 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10682 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10683 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10684 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10685 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10686 // CHECK14:       omp.precond.then:
10687 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10688 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10689 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
10690 // CHECK14-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10691 // CHECK14-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
10692 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10693 // CHECK14-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
10694 // CHECK14-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
10695 // CHECK14-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
10696 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10697 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10698 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10699 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
10700 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10701 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10702 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10703 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
10704 // CHECK14-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10705 // CHECK14:       cond.true:
10706 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10707 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10708 // CHECK14:       cond.false:
10709 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10710 // CHECK14-NEXT:    br label [[COND_END]]
10711 // CHECK14:       cond.end:
10712 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
10713 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10714 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10715 // CHECK14-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
10716 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10717 // CHECK14:       omp.inner.for.cond:
10718 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10719 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10720 // CHECK14-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
10721 // CHECK14-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10722 // CHECK14:       omp.inner.for.body:
10723 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10724 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
10725 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10726 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I5]], align 4
10727 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
10728 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
10729 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
10730 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
10731 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10732 // CHECK14:       omp.body.continue:
10733 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10734 // CHECK14:       omp.inner.for.inc:
10735 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10736 // CHECK14-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
10737 // CHECK14-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
10738 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10739 // CHECK14:       omp.inner.for.end:
10740 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10741 // CHECK14:       omp.loop.exit:
10742 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10743 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
10744 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
10745 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
10746 // CHECK14:       omp.precond.end:
10747 // CHECK14-NEXT:    ret void
10748 //
10749 //
10750 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
10751 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10752 // CHECK14-NEXT:  entry:
10753 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10754 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10755 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10756 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10757 // CHECK14-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10758 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10759 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10760 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10761 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10762 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10763 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10764 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10765 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10766 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10767 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
10768 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10769 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
10770 // CHECK14-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
10771 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
10772 // CHECK14-NEXT:    [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10773 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[CONV3]], align 4
10774 // CHECK14-NEXT:    [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10775 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
10776 // CHECK14-NEXT:    ret void
10777 //
10778 //
10779 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..5
10780 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10781 // CHECK14-NEXT:  entry:
10782 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10783 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10784 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10785 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10786 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10787 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10788 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10789 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10790 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10791 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
10792 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10793 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10794 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10795 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10796 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10797 // CHECK14-NEXT:    [[I5:%.*]] = alloca i32, align 4
10798 // CHECK14-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10799 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10800 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10801 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10802 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10803 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10804 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10805 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10806 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10807 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10808 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10809 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10810 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
10811 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10812 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10813 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10814 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10815 // CHECK14-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
10816 // CHECK14-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
10817 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10818 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10819 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10820 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10821 // CHECK14:       omp.precond.then:
10822 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10823 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10824 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
10825 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10826 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10827 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
10828 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10829 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
10830 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
10831 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10832 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10833 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10834 // CHECK14-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10835 // CHECK14:       cond.true:
10836 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10837 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10838 // CHECK14:       cond.false:
10839 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10840 // CHECK14-NEXT:    br label [[COND_END]]
10841 // CHECK14:       cond.end:
10842 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10843 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10844 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10845 // CHECK14-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
10846 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10847 // CHECK14:       omp.inner.for.cond:
10848 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10849 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10850 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
10851 // CHECK14-NEXT:    [[CMP7:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
10852 // CHECK14-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10853 // CHECK14:       omp.inner.for.body:
10854 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10855 // CHECK14-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10856 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10857 // CHECK14-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10858 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
10859 // CHECK14-NEXT:    [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10860 // CHECK14-NEXT:    store i32 [[TMP20]], i32* [[CONV8]], align 4
10861 // CHECK14-NEXT:    [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
10862 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[CONV1]], align 8
10863 // CHECK14-NEXT:    [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10864 // CHECK14-NEXT:    store i32 [[TMP22]], i32* [[CONV9]], align 4
10865 // CHECK14-NEXT:    [[TMP23:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10866 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP23]])
10867 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10868 // CHECK14:       omp.inner.for.inc:
10869 // CHECK14-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10870 // CHECK14-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10871 // CHECK14-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
10872 // CHECK14-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
10873 // CHECK14-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10874 // CHECK14-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10875 // CHECK14-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
10876 // CHECK14-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
10877 // CHECK14-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10878 // CHECK14-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10879 // CHECK14-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
10880 // CHECK14-NEXT:    store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
10881 // CHECK14-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10882 // CHECK14-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10883 // CHECK14-NEXT:    [[CMP13:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]]
10884 // CHECK14-NEXT:    br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
10885 // CHECK14:       cond.true14:
10886 // CHECK14-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10887 // CHECK14-NEXT:    br label [[COND_END16:%.*]]
10888 // CHECK14:       cond.false15:
10889 // CHECK14-NEXT:    [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10890 // CHECK14-NEXT:    br label [[COND_END16]]
10891 // CHECK14:       cond.end16:
10892 // CHECK14-NEXT:    [[COND17:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE14]] ], [ [[TMP33]], [[COND_FALSE15]] ]
10893 // CHECK14-NEXT:    store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
10894 // CHECK14-NEXT:    [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10895 // CHECK14-NEXT:    store i32 [[TMP34]], i32* [[DOTOMP_IV]], align 4
10896 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10897 // CHECK14:       omp.inner.for.end:
10898 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10899 // CHECK14:       omp.loop.exit:
10900 // CHECK14-NEXT:    [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10901 // CHECK14-NEXT:    [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
10902 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]])
10903 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
10904 // CHECK14:       omp.precond.end:
10905 // CHECK14-NEXT:    ret void
10906 //
10907 //
10908 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..6
10909 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10910 // CHECK14-NEXT:  entry:
10911 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10912 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10913 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10914 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10915 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10916 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10917 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10918 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10919 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10920 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10921 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10922 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
10923 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10924 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10925 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10926 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10927 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10928 // CHECK14-NEXT:    [[I7:%.*]] = alloca i32, align 4
10929 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10930 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10931 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10932 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10933 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10934 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10935 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10936 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10937 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10938 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10939 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10940 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10941 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
10942 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10943 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10944 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10945 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10946 // CHECK14-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
10947 // CHECK14-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
10948 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10949 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10950 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10951 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10952 // CHECK14:       omp.precond.then:
10953 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10954 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10955 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
10956 // CHECK14-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10957 // CHECK14-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
10958 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10959 // CHECK14-NEXT:    [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
10960 // CHECK14-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
10961 // CHECK14-NEXT:    store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
10962 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10963 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10964 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10965 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
10966 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10967 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10968 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10969 // CHECK14-NEXT:    [[CMP8:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
10970 // CHECK14-NEXT:    br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10971 // CHECK14:       cond.true:
10972 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10973 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10974 // CHECK14:       cond.false:
10975 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10976 // CHECK14-NEXT:    br label [[COND_END]]
10977 // CHECK14:       cond.end:
10978 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
10979 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10980 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10981 // CHECK14-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
10982 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10983 // CHECK14:       omp.inner.for.cond:
10984 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10985 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10986 // CHECK14-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
10987 // CHECK14-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10988 // CHECK14:       omp.inner.for.body:
10989 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10990 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
10991 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10992 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I7]], align 4
10993 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I7]], align 4
10994 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
10995 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
10996 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
10997 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10998 // CHECK14:       omp.body.continue:
10999 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11000 // CHECK14:       omp.inner.for.inc:
11001 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11002 // CHECK14-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1
11003 // CHECK14-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
11004 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11005 // CHECK14:       omp.inner.for.end:
11006 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11007 // CHECK14:       omp.loop.exit:
11008 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11009 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
11010 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
11011 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11012 // CHECK14:       omp.precond.end:
11013 // CHECK14-NEXT:    ret void
11014 //
11015 //
11016 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
11017 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11018 // CHECK14-NEXT:  entry:
11019 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
11020 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11021 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11022 // CHECK14-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
11023 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
11024 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11025 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11026 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11027 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11028 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11029 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
11030 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11031 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
11032 // CHECK14-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
11033 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
11034 // CHECK14-NEXT:    ret void
11035 //
11036 //
11037 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..8
11038 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11039 // CHECK14-NEXT:  entry:
11040 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11041 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11042 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
11043 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11044 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11045 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11046 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11047 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11048 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11049 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11050 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11051 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11052 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11053 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11054 // CHECK14-NEXT:    [[I3:%.*]] = alloca i32, align 4
11055 // CHECK14-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
11056 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11057 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11058 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
11059 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11060 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11061 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11062 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11063 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11064 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
11065 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
11066 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11067 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
11068 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11069 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11070 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11071 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11072 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11073 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
11074 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11075 // CHECK14:       omp.precond.then:
11076 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11077 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11078 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
11079 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11080 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11081 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11082 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
11083 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11084 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11085 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11086 // CHECK14-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
11087 // CHECK14-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11088 // CHECK14:       cond.true:
11089 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11090 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11091 // CHECK14:       cond.false:
11092 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11093 // CHECK14-NEXT:    br label [[COND_END]]
11094 // CHECK14:       cond.end:
11095 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
11096 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11097 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11098 // CHECK14-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
11099 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11100 // CHECK14:       omp.inner.for.cond:
11101 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11102 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11103 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
11104 // CHECK14-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11105 // CHECK14:       omp.inner.for.body:
11106 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11107 // CHECK14-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
11108 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11109 // CHECK14-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
11110 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
11111 // CHECK14-NEXT:    [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11112 // CHECK14-NEXT:    store i32 [[TMP19]], i32* [[CONV6]], align 4
11113 // CHECK14-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
11114 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
11115 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11116 // CHECK14:       omp.inner.for.inc:
11117 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11118 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11119 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
11120 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11121 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11122 // CHECK14:       omp.inner.for.end:
11123 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11124 // CHECK14:       omp.loop.exit:
11125 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11126 // CHECK14-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
11127 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
11128 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11129 // CHECK14:       omp.precond.end:
11130 // CHECK14-NEXT:    ret void
11131 //
11132 //
11133 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..9
11134 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11135 // CHECK14-NEXT:  entry:
11136 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11137 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11138 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11139 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11140 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
11141 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11142 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11143 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11144 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11145 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11146 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11147 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11148 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11149 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11150 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11151 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11152 // CHECK14-NEXT:    [[I5:%.*]] = alloca i32, align 4
11153 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11154 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11155 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11156 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11157 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
11158 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11159 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11160 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11161 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11162 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11163 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
11164 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
11165 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11166 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
11167 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11168 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11169 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11170 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11171 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11172 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
11173 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11174 // CHECK14:       omp.precond.then:
11175 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11176 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11177 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
11178 // CHECK14-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11179 // CHECK14-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
11180 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11181 // CHECK14-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
11182 // CHECK14-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
11183 // CHECK14-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
11184 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11185 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11186 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11187 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11188 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11189 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
11190 // CHECK14-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
11191 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
11192 // CHECK14:       omp.dispatch.cond:
11193 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11194 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
11195 // CHECK14-NEXT:    [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
11196 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
11197 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11198 // CHECK14:       omp.dispatch.body:
11199 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11200 // CHECK14-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
11201 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11202 // CHECK14:       omp.inner.for.cond:
11203 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
11204 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
11205 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
11206 // CHECK14-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11207 // CHECK14:       omp.inner.for.body:
11208 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
11209 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
11210 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11211 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !15
11212 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !15
11213 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
11214 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
11215 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
11216 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11217 // CHECK14:       omp.body.continue:
11218 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11219 // CHECK14:       omp.inner.for.inc:
11220 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
11221 // CHECK14-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
11222 // CHECK14-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
11223 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
11224 // CHECK14:       omp.inner.for.end:
11225 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
11226 // CHECK14:       omp.dispatch.inc:
11227 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
11228 // CHECK14:       omp.dispatch.end:
11229 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11230 // CHECK14:       omp.precond.end:
11231 // CHECK14-NEXT:    ret void
11232 //
11233 //
11234 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
11235 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11236 // CHECK14-NEXT:  entry:
11237 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
11238 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11239 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11240 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11241 // CHECK14-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
11242 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11243 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
11244 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11245 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11246 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11247 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11248 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11249 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11250 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11251 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
11252 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11253 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
11254 // CHECK14-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
11255 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
11256 // CHECK14-NEXT:    [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11257 // CHECK14-NEXT:    store i32 [[TMP4]], i32* [[CONV3]], align 4
11258 // CHECK14-NEXT:    [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11259 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
11260 // CHECK14-NEXT:    ret void
11261 //
11262 //
11263 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..11
11264 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11265 // CHECK14-NEXT:  entry:
11266 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11267 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11268 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
11269 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11270 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11271 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11272 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11273 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11274 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
11275 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
11276 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11277 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11278 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11279 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11280 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11281 // CHECK14-NEXT:    [[I5:%.*]] = alloca i32, align 4
11282 // CHECK14-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
11283 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11284 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11285 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11286 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
11287 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11288 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11289 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11290 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11291 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11292 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11293 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11294 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
11295 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
11296 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11297 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
11298 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11299 // CHECK14-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
11300 // CHECK14-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
11301 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11302 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11303 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
11304 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11305 // CHECK14:       omp.precond.then:
11306 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11307 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
11308 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
11309 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11310 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11311 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11312 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
11313 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11314 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11315 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
11316 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
11317 // CHECK14-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11318 // CHECK14:       cond.true:
11319 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
11320 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11321 // CHECK14:       cond.false:
11322 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11323 // CHECK14-NEXT:    br label [[COND_END]]
11324 // CHECK14:       cond.end:
11325 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
11326 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11327 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11328 // CHECK14-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
11329 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11330 // CHECK14:       omp.inner.for.cond:
11331 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11332 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11333 // CHECK14-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
11334 // CHECK14-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11335 // CHECK14:       omp.inner.for.body:
11336 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11337 // CHECK14-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
11338 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11339 // CHECK14-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
11340 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
11341 // CHECK14-NEXT:    [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11342 // CHECK14-NEXT:    store i32 [[TMP19]], i32* [[CONV8]], align 4
11343 // CHECK14-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
11344 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[CONV1]], align 8
11345 // CHECK14-NEXT:    [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11346 // CHECK14-NEXT:    store i32 [[TMP21]], i32* [[CONV9]], align 4
11347 // CHECK14-NEXT:    [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11348 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP22]])
11349 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11350 // CHECK14:       omp.inner.for.inc:
11351 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11352 // CHECK14-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11353 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
11354 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11355 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11356 // CHECK14:       omp.inner.for.end:
11357 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11358 // CHECK14:       omp.loop.exit:
11359 // CHECK14-NEXT:    [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11360 // CHECK14-NEXT:    [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
11361 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
11362 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11363 // CHECK14:       omp.precond.end:
11364 // CHECK14-NEXT:    ret void
11365 //
11366 //
11367 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..12
11368 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11369 // CHECK14-NEXT:  entry:
11370 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11371 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11372 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11373 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11374 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
11375 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11376 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11377 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11378 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11379 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11380 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
11381 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
11382 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11383 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11384 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11385 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11386 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11387 // CHECK14-NEXT:    [[I7:%.*]] = alloca i32, align 4
11388 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11389 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11390 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11391 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11392 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
11393 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11394 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11395 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11396 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11397 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11398 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11399 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11400 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
11401 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
11402 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11403 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
11404 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11405 // CHECK14-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
11406 // CHECK14-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
11407 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11408 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11409 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
11410 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11411 // CHECK14:       omp.precond.then:
11412 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11413 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
11414 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
11415 // CHECK14-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11416 // CHECK14-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
11417 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11418 // CHECK14-NEXT:    [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
11419 // CHECK14-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
11420 // CHECK14-NEXT:    store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
11421 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11422 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11423 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[CONV1]], align 8
11424 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11425 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11426 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11427 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
11428 // CHECK14-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
11429 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
11430 // CHECK14:       omp.dispatch.cond:
11431 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11432 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
11433 // CHECK14-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
11434 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
11435 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11436 // CHECK14:       omp.dispatch.body:
11437 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11438 // CHECK14-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
11439 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11440 // CHECK14:       omp.inner.for.cond:
11441 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
11442 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
11443 // CHECK14-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
11444 // CHECK14-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11445 // CHECK14:       omp.inner.for.body:
11446 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
11447 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
11448 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11449 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I7]], align 4, !llvm.access.group !18
11450 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !18
11451 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
11452 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
11453 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
11454 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11455 // CHECK14:       omp.body.continue:
11456 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11457 // CHECK14:       omp.inner.for.inc:
11458 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
11459 // CHECK14-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
11460 // CHECK14-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
11461 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
11462 // CHECK14:       omp.inner.for.end:
11463 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
11464 // CHECK14:       omp.dispatch.inc:
11465 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
11466 // CHECK14:       omp.dispatch.end:
11467 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11468 // CHECK14:       omp.precond.end:
11469 // CHECK14-NEXT:    ret void
11470 //
11471 //
11472 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
11473 // CHECK14-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
11474 // CHECK14-NEXT:  entry:
11475 // CHECK14-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
11476 // CHECK14-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
11477 // CHECK14-NEXT:    [[M:%.*]] = alloca i32, align 4
11478 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
11479 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
11480 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
11481 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11482 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
11483 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
11484 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
11485 // CHECK14-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
11486 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11487 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11488 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
11489 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
11490 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
11491 // CHECK14-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
11492 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
11493 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
11494 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
11495 // CHECK14-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
11496 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
11497 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i64, align 8
11498 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [2 x i8*], align 8
11499 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS23:%.*]] = alloca [2 x i8*], align 8
11500 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [2 x i8*], align 8
11501 // CHECK14-NEXT:    [[_TMP25:%.*]] = alloca i32, align 4
11502 // CHECK14-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
11503 // CHECK14-NEXT:    store i32 10, i32* [[M]], align 4
11504 // CHECK14-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11505 // CHECK14-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
11506 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
11507 // CHECK14-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11508 // CHECK14-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
11509 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
11510 // CHECK14-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
11511 // CHECK14-NEXT:    store i8* null, i8** [[TMP4]], align 8
11512 // CHECK14-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11513 // CHECK14-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11514 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11515 // CHECK14-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11516 // CHECK14-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
11517 // CHECK14-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11518 // CHECK14:       omp_offload.failed:
11519 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
11520 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT]]
11521 // CHECK14:       omp_offload.cont:
11522 // CHECK14-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11523 // CHECK14-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
11524 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
11525 // CHECK14-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11526 // CHECK14-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
11527 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
11528 // CHECK14-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
11529 // CHECK14-NEXT:    store i8* null, i8** [[TMP13]], align 8
11530 // CHECK14-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11531 // CHECK14-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11532 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11533 // CHECK14-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11534 // CHECK14-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
11535 // CHECK14-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
11536 // CHECK14:       omp_offload.failed5:
11537 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
11538 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
11539 // CHECK14:       omp_offload.cont6:
11540 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
11541 // CHECK14-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR_]], align 4
11542 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11543 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11544 // CHECK14-NEXT:    store i32 [[TMP19]], i32* [[CONV]], align 4
11545 // CHECK14-NEXT:    [[TMP20:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11546 // CHECK14-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
11547 // CHECK14-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [10 x i32]**
11548 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP22]], align 8
11549 // CHECK14-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
11550 // CHECK14-NEXT:    [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [10 x i32]**
11551 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP24]], align 8
11552 // CHECK14-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
11553 // CHECK14-NEXT:    store i8* null, i8** [[TMP25]], align 8
11554 // CHECK14-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
11555 // CHECK14-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
11556 // CHECK14-NEXT:    store i64 [[TMP20]], i64* [[TMP27]], align 8
11557 // CHECK14-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
11558 // CHECK14-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
11559 // CHECK14-NEXT:    store i64 [[TMP20]], i64* [[TMP29]], align 8
11560 // CHECK14-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
11561 // CHECK14-NEXT:    store i8* null, i8** [[TMP30]], align 8
11562 // CHECK14-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
11563 // CHECK14-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
11564 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11565 // CHECK14-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, i32 2, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11566 // CHECK14-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
11567 // CHECK14-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
11568 // CHECK14:       omp_offload.failed11:
11569 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i64 [[TMP20]]) #[[ATTR3]]
11570 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
11571 // CHECK14:       omp_offload.cont12:
11572 // CHECK14-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
11573 // CHECK14-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to [10 x i32]**
11574 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP36]], align 8
11575 // CHECK14-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
11576 // CHECK14-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to [10 x i32]**
11577 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP38]], align 8
11578 // CHECK14-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
11579 // CHECK14-NEXT:    store i8* null, i8** [[TMP39]], align 8
11580 // CHECK14-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
11581 // CHECK14-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
11582 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11583 // CHECK14-NEXT:    [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, i32 1, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11584 // CHECK14-NEXT:    [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
11585 // CHECK14-NEXT:    br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
11586 // CHECK14:       omp_offload.failed17:
11587 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
11588 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
11589 // CHECK14:       omp_offload.cont18:
11590 // CHECK14-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M]], align 4
11591 // CHECK14-NEXT:    store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_19]], align 4
11592 // CHECK14-NEXT:    [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
11593 // CHECK14-NEXT:    [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED20]] to i32*
11594 // CHECK14-NEXT:    store i32 [[TMP45]], i32* [[CONV21]], align 4
11595 // CHECK14-NEXT:    [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED20]], align 8
11596 // CHECK14-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
11597 // CHECK14-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to [10 x i32]**
11598 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP48]], align 8
11599 // CHECK14-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
11600 // CHECK14-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to [10 x i32]**
11601 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP50]], align 8
11602 // CHECK14-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
11603 // CHECK14-NEXT:    store i8* null, i8** [[TMP51]], align 8
11604 // CHECK14-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
11605 // CHECK14-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
11606 // CHECK14-NEXT:    store i64 [[TMP46]], i64* [[TMP53]], align 8
11607 // CHECK14-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
11608 // CHECK14-NEXT:    [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i64*
11609 // CHECK14-NEXT:    store i64 [[TMP46]], i64* [[TMP55]], align 8
11610 // CHECK14-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
11611 // CHECK14-NEXT:    store i8* null, i8** [[TMP56]], align 8
11612 // CHECK14-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
11613 // CHECK14-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
11614 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11615 // CHECK14-NEXT:    [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, i32 2, i8** [[TMP57]], i8** [[TMP58]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11616 // CHECK14-NEXT:    [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0
11617 // CHECK14-NEXT:    br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED26:%.*]], label [[OMP_OFFLOAD_CONT27:%.*]]
11618 // CHECK14:       omp_offload.failed26:
11619 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i64 [[TMP46]]) #[[ATTR3]]
11620 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT27]]
11621 // CHECK14:       omp_offload.cont27:
11622 // CHECK14-NEXT:    ret i32 0
11623 //
11624 //
11625 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
11626 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11627 // CHECK14-NEXT:  entry:
11628 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11629 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11630 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11631 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
11632 // CHECK14-NEXT:    ret void
11633 //
11634 //
11635 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..14
11636 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11637 // CHECK14-NEXT:  entry:
11638 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11639 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11640 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11641 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11642 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11643 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11644 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11645 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11646 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11647 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11648 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11649 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11650 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11651 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11652 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11653 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11654 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11655 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11656 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11657 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11658 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11659 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11660 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11661 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11662 // CHECK14:       cond.true:
11663 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11664 // CHECK14:       cond.false:
11665 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11666 // CHECK14-NEXT:    br label [[COND_END]]
11667 // CHECK14:       cond.end:
11668 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11669 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11670 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11671 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11672 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11673 // CHECK14:       omp.inner.for.cond:
11674 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11675 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11676 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11677 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11678 // CHECK14:       omp.inner.for.body:
11679 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11680 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11681 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11682 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11683 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
11684 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11685 // CHECK14:       omp.inner.for.inc:
11686 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11687 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11688 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11689 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11690 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11691 // CHECK14:       omp.inner.for.end:
11692 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11693 // CHECK14:       omp.loop.exit:
11694 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11695 // CHECK14-NEXT:    ret void
11696 //
11697 //
11698 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..15
11699 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11700 // CHECK14-NEXT:  entry:
11701 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11702 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11703 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11704 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11705 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11706 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11707 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11708 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11709 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11710 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11711 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11712 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11713 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11714 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11715 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11716 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11717 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11718 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11719 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11720 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
11721 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11722 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11723 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11724 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11725 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11726 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11727 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11728 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11729 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11730 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
11731 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11732 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11733 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
11734 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11735 // CHECK14:       cond.true:
11736 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11737 // CHECK14:       cond.false:
11738 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11739 // CHECK14-NEXT:    br label [[COND_END]]
11740 // CHECK14:       cond.end:
11741 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11742 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11743 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11744 // CHECK14-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
11745 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11746 // CHECK14:       omp.inner.for.cond:
11747 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11748 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11749 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11750 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11751 // CHECK14:       omp.inner.for.body:
11752 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11753 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11754 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11755 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
11756 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
11757 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
11758 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11759 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
11760 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11761 // CHECK14:       omp.body.continue:
11762 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11763 // CHECK14:       omp.inner.for.inc:
11764 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11765 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
11766 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11767 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11768 // CHECK14:       omp.inner.for.end:
11769 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11770 // CHECK14:       omp.loop.exit:
11771 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
11772 // CHECK14-NEXT:    ret void
11773 //
11774 //
11775 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
11776 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11777 // CHECK14-NEXT:  entry:
11778 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11779 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11780 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11781 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
11782 // CHECK14-NEXT:    ret void
11783 //
11784 //
11785 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..17
11786 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11787 // CHECK14-NEXT:  entry:
11788 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11789 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11790 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11791 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11792 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11793 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11794 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11795 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11796 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11797 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11798 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11799 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11800 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11801 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11802 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11803 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11804 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11805 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11806 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11807 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11808 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11809 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11810 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11811 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11812 // CHECK14:       cond.true:
11813 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11814 // CHECK14:       cond.false:
11815 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11816 // CHECK14-NEXT:    br label [[COND_END]]
11817 // CHECK14:       cond.end:
11818 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11819 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11820 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11821 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11822 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11823 // CHECK14:       omp.inner.for.cond:
11824 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11825 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11826 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11827 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11828 // CHECK14:       omp.inner.for.body:
11829 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11830 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11831 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11832 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11833 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
11834 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11835 // CHECK14:       omp.inner.for.inc:
11836 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11837 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11838 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11839 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11840 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11841 // CHECK14:       omp.inner.for.end:
11842 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11843 // CHECK14:       omp.loop.exit:
11844 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11845 // CHECK14-NEXT:    ret void
11846 //
11847 //
11848 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..18
11849 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11850 // CHECK14-NEXT:  entry:
11851 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11852 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11853 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11854 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11855 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11856 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11857 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11858 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11859 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11860 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11861 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11862 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11863 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11864 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11865 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11866 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11867 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11868 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11869 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11870 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
11871 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11872 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11873 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11874 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11875 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11876 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11877 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11878 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11879 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11880 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
11881 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11882 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11883 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
11884 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11885 // CHECK14:       cond.true:
11886 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11887 // CHECK14:       cond.false:
11888 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11889 // CHECK14-NEXT:    br label [[COND_END]]
11890 // CHECK14:       cond.end:
11891 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11892 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11893 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11894 // CHECK14-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
11895 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11896 // CHECK14:       omp.inner.for.cond:
11897 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11898 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11899 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11900 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11901 // CHECK14:       omp.inner.for.body:
11902 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11903 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11904 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11905 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
11906 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
11907 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
11908 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11909 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
11910 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11911 // CHECK14:       omp.body.continue:
11912 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11913 // CHECK14:       omp.inner.for.inc:
11914 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11915 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
11916 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11917 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11918 // CHECK14:       omp.inner.for.end:
11919 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11920 // CHECK14:       omp.loop.exit:
11921 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
11922 // CHECK14-NEXT:    ret void
11923 //
11924 //
11925 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
11926 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11927 // CHECK14-NEXT:  entry:
11928 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11929 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11930 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11931 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11932 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11933 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11934 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11935 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
11936 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11937 // CHECK14-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
11938 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11939 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
11940 // CHECK14-NEXT:    ret void
11941 //
11942 //
11943 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..21
11944 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11945 // CHECK14-NEXT:  entry:
11946 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11947 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11948 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11949 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11950 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11951 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11952 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11953 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11954 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11955 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11956 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11957 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11958 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11959 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11960 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11961 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11962 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11963 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11964 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11965 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11966 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11967 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11968 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11969 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11970 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11971 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11972 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11973 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11974 // CHECK14:       cond.true:
11975 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11976 // CHECK14:       cond.false:
11977 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11978 // CHECK14-NEXT:    br label [[COND_END]]
11979 // CHECK14:       cond.end:
11980 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11981 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11982 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11983 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11984 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11985 // CHECK14:       omp.inner.for.cond:
11986 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11987 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11988 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11989 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11990 // CHECK14:       omp.inner.for.body:
11991 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11992 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11993 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11994 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11995 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
11996 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11997 // CHECK14-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
11998 // CHECK14-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11999 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
12000 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12001 // CHECK14:       omp.inner.for.inc:
12002 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12003 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12004 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
12005 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12006 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12007 // CHECK14:       omp.inner.for.end:
12008 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12009 // CHECK14:       omp.loop.exit:
12010 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12011 // CHECK14-NEXT:    ret void
12012 //
12013 //
12014 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..22
12015 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12016 // CHECK14-NEXT:  entry:
12017 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12018 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12019 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12020 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12021 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12022 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12023 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12024 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12025 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12026 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12027 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12028 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12029 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12030 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12031 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12032 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12033 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12034 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12035 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12036 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12037 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12038 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12039 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
12040 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12041 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
12042 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12043 // CHECK14-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
12044 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
12045 // CHECK14-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
12046 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12047 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12048 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
12049 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12050 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
12051 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
12052 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
12053 // CHECK14:       omp.dispatch.cond:
12054 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12055 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12056 // CHECK14-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
12057 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
12058 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12059 // CHECK14:       cond.true:
12060 // CHECK14-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12061 // CHECK14-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
12062 // CHECK14-NEXT:    br label [[COND_END:%.*]]
12063 // CHECK14:       cond.false:
12064 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12065 // CHECK14-NEXT:    br label [[COND_END]]
12066 // CHECK14:       cond.end:
12067 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
12068 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12069 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12070 // CHECK14-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
12071 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12072 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12073 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
12074 // CHECK14-NEXT:    br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12075 // CHECK14:       omp.dispatch.body:
12076 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12077 // CHECK14:       omp.inner.for.cond:
12078 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12079 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12080 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
12081 // CHECK14-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12082 // CHECK14:       omp.inner.for.body:
12083 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12084 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
12085 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12086 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
12087 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
12088 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
12089 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12090 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
12091 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12092 // CHECK14:       omp.body.continue:
12093 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12094 // CHECK14:       omp.inner.for.inc:
12095 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12096 // CHECK14-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
12097 // CHECK14-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
12098 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12099 // CHECK14:       omp.inner.for.end:
12100 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
12101 // CHECK14:       omp.dispatch.inc:
12102 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12103 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12104 // CHECK14-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
12105 // CHECK14-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
12106 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12107 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12108 // CHECK14-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
12109 // CHECK14-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
12110 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
12111 // CHECK14:       omp.dispatch.end:
12112 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
12113 // CHECK14-NEXT:    ret void
12114 //
12115 //
12116 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
12117 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12118 // CHECK14-NEXT:  entry:
12119 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12120 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12121 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12122 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
12123 // CHECK14-NEXT:    ret void
12124 //
12125 //
12126 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..25
12127 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12128 // CHECK14-NEXT:  entry:
12129 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12130 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12131 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12132 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12133 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12134 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12135 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12136 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12137 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12138 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12139 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12140 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12141 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12142 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12143 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12144 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
12145 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12146 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12147 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12148 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12149 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12150 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12151 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12152 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12153 // CHECK14:       cond.true:
12154 // CHECK14-NEXT:    br label [[COND_END:%.*]]
12155 // CHECK14:       cond.false:
12156 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12157 // CHECK14-NEXT:    br label [[COND_END]]
12158 // CHECK14:       cond.end:
12159 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12160 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12161 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12162 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12163 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12164 // CHECK14:       omp.inner.for.cond:
12165 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12166 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12167 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12168 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12169 // CHECK14:       omp.inner.for.body:
12170 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12171 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12172 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12173 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12174 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
12175 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12176 // CHECK14:       omp.inner.for.inc:
12177 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12178 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12179 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12180 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12181 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12182 // CHECK14:       omp.inner.for.end:
12183 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12184 // CHECK14:       omp.loop.exit:
12185 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12186 // CHECK14-NEXT:    ret void
12187 //
12188 //
12189 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..26
12190 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12191 // CHECK14-NEXT:  entry:
12192 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12193 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12194 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12195 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12196 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12197 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12198 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12199 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12200 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12201 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12202 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12203 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12204 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12205 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12206 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12207 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12208 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12209 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12210 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12211 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
12212 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12213 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
12214 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12215 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
12216 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
12217 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
12218 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12219 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12220 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12221 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12222 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12223 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
12224 // CHECK14-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
12225 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
12226 // CHECK14:       omp.dispatch.cond:
12227 // CHECK14-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
12228 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
12229 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12230 // CHECK14:       omp.dispatch.body:
12231 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12232 // CHECK14-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
12233 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12234 // CHECK14:       omp.inner.for.cond:
12235 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
12236 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
12237 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
12238 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12239 // CHECK14:       omp.inner.for.body:
12240 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
12241 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
12242 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12243 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
12244 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
12245 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
12246 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12247 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
12248 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12249 // CHECK14:       omp.body.continue:
12250 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12251 // CHECK14:       omp.inner.for.inc:
12252 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
12253 // CHECK14-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
12254 // CHECK14-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
12255 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
12256 // CHECK14:       omp.inner.for.end:
12257 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
12258 // CHECK14:       omp.dispatch.inc:
12259 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
12260 // CHECK14:       omp.dispatch.end:
12261 // CHECK14-NEXT:    ret void
12262 //
12263 //
12264 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
12265 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12266 // CHECK14-NEXT:  entry:
12267 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12268 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12269 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12270 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12271 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12272 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12273 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12274 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
12275 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12276 // CHECK14-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
12277 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12278 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
12279 // CHECK14-NEXT:    ret void
12280 //
12281 //
12282 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..29
12283 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12284 // CHECK14-NEXT:  entry:
12285 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12286 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12287 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12288 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12289 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12290 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12291 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12292 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12293 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12294 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12295 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12296 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12297 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12298 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12299 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12300 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12301 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12302 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12303 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12304 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
12305 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12306 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12307 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12308 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12309 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12310 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12311 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12312 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12313 // CHECK14:       cond.true:
12314 // CHECK14-NEXT:    br label [[COND_END:%.*]]
12315 // CHECK14:       cond.false:
12316 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12317 // CHECK14-NEXT:    br label [[COND_END]]
12318 // CHECK14:       cond.end:
12319 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12320 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12321 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12322 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12323 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12324 // CHECK14:       omp.inner.for.cond:
12325 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12326 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12327 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12328 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12329 // CHECK14:       omp.inner.for.body:
12330 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12331 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12332 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12333 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12334 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
12335 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12336 // CHECK14-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
12337 // CHECK14-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12338 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
12339 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12340 // CHECK14:       omp.inner.for.inc:
12341 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12342 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12343 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
12344 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12345 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12346 // CHECK14:       omp.inner.for.end:
12347 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12348 // CHECK14:       omp.loop.exit:
12349 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12350 // CHECK14-NEXT:    ret void
12351 //
12352 //
12353 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..30
12354 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12355 // CHECK14-NEXT:  entry:
12356 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12357 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12358 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12359 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12360 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12361 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12362 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12363 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12364 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12365 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12366 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12367 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12368 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12369 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12370 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12371 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12372 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12373 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12374 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12375 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12376 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12377 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12378 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
12379 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12380 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
12381 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12382 // CHECK14-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
12383 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
12384 // CHECK14-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
12385 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12386 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12387 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
12388 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12389 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12390 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12391 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
12392 // CHECK14-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
12393 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
12394 // CHECK14:       omp.dispatch.cond:
12395 // CHECK14-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
12396 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
12397 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12398 // CHECK14:       omp.dispatch.body:
12399 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12400 // CHECK14-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
12401 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12402 // CHECK14:       omp.inner.for.cond:
12403 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
12404 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
12405 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
12406 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12407 // CHECK14:       omp.inner.for.body:
12408 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
12409 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
12410 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12411 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
12412 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
12413 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
12414 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12415 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
12416 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12417 // CHECK14:       omp.body.continue:
12418 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12419 // CHECK14:       omp.inner.for.inc:
12420 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
12421 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
12422 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
12423 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
12424 // CHECK14:       omp.inner.for.end:
12425 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
12426 // CHECK14:       omp.dispatch.inc:
12427 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
12428 // CHECK14:       omp.dispatch.end:
12429 // CHECK14-NEXT:    ret void
12430 //
12431 //
12432 // CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
12433 // CHECK14-SAME: () #[[ATTR5:[0-9]+]] {
12434 // CHECK14-NEXT:  entry:
12435 // CHECK14-NEXT:    call void @__tgt_register_requires(i64 1)
12436 // CHECK14-NEXT:    ret void
12437 //
12438 //
12439 // CHECK15-LABEL: define {{[^@]+}}@main
12440 // CHECK15-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
12441 // CHECK15-NEXT:  entry:
12442 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
12443 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
12444 // CHECK15-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
12445 // CHECK15-NEXT:    [[N:%.*]] = alloca i32, align 4
12446 // CHECK15-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
12447 // CHECK15-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
12448 // CHECK15-NEXT:    [[M:%.*]] = alloca i32, align 4
12449 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
12450 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
12451 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
12452 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
12453 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
12454 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12455 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12456 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12457 // CHECK15-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
12458 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
12459 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
12460 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
12461 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
12462 // CHECK15-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
12463 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
12464 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
12465 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
12466 // CHECK15-NEXT:    [[N_CASTED18:%.*]] = alloca i32, align 4
12467 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
12468 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4
12469 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4
12470 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4
12471 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4
12472 // CHECK15-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
12473 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
12474 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
12475 // CHECK15-NEXT:    [[N_CASTED32:%.*]] = alloca i32, align 4
12476 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS33:%.*]] = alloca [3 x i8*], align 4
12477 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS34:%.*]] = alloca [3 x i8*], align 4
12478 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS35:%.*]] = alloca [3 x i8*], align 4
12479 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES36:%.*]] = alloca [3 x i64], align 4
12480 // CHECK15-NEXT:    [[_TMP37:%.*]] = alloca i32, align 4
12481 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
12482 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
12483 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_46:%.*]] = alloca i32, align 4
12484 // CHECK15-NEXT:    [[N_CASTED47:%.*]] = alloca i32, align 4
12485 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED48:%.*]] = alloca i32, align 4
12486 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS49:%.*]] = alloca [4 x i8*], align 4
12487 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS50:%.*]] = alloca [4 x i8*], align 4
12488 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS51:%.*]] = alloca [4 x i8*], align 4
12489 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES52:%.*]] = alloca [4 x i64], align 4
12490 // CHECK15-NEXT:    [[_TMP53:%.*]] = alloca i32, align 4
12491 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_54:%.*]] = alloca i32, align 4
12492 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4
12493 // CHECK15-NEXT:    store i32 0, i32* [[RETVAL]], align 4
12494 // CHECK15-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
12495 // CHECK15-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
12496 // CHECK15-NEXT:    store i32 100, i32* [[N]], align 4
12497 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
12498 // CHECK15-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
12499 // CHECK15-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
12500 // CHECK15-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
12501 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
12502 // CHECK15-NEXT:    store i32 10, i32* [[M]], align 4
12503 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
12504 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
12505 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
12506 // CHECK15-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
12507 // CHECK15-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
12508 // CHECK15-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12509 // CHECK15-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
12510 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
12511 // CHECK15-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12512 // CHECK15-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
12513 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
12514 // CHECK15-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
12515 // CHECK15-NEXT:    store i64 4, i64* [[TMP10]], align 4
12516 // CHECK15-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
12517 // CHECK15-NEXT:    store i8* null, i8** [[TMP11]], align 4
12518 // CHECK15-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
12519 // CHECK15-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
12520 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
12521 // CHECK15-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
12522 // CHECK15-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
12523 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
12524 // CHECK15-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
12525 // CHECK15-NEXT:    store i64 4, i64* [[TMP16]], align 4
12526 // CHECK15-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
12527 // CHECK15-NEXT:    store i8* null, i8** [[TMP17]], align 4
12528 // CHECK15-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
12529 // CHECK15-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
12530 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
12531 // CHECK15-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
12532 // CHECK15-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
12533 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
12534 // CHECK15-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
12535 // CHECK15-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
12536 // CHECK15-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
12537 // CHECK15-NEXT:    store i8* null, i8** [[TMP23]], align 4
12538 // CHECK15-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12539 // CHECK15-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12540 // CHECK15-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
12541 // CHECK15-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
12542 // CHECK15-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
12543 // CHECK15-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12544 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
12545 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12546 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12547 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12548 // CHECK15-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12549 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
12550 // CHECK15-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
12551 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
12552 // CHECK15-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12553 // CHECK15-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
12554 // CHECK15-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
12555 // CHECK15:       omp_offload.failed:
12556 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
12557 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT]]
12558 // CHECK15:       omp_offload.cont:
12559 // CHECK15-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
12560 // CHECK15-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
12561 // CHECK15-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
12562 // CHECK15-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
12563 // CHECK15-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
12564 // CHECK15-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12565 // CHECK15-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
12566 // CHECK15-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
12567 // CHECK15-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12568 // CHECK15-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
12569 // CHECK15-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
12570 // CHECK15-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
12571 // CHECK15-NEXT:    store i64 4, i64* [[TMP41]], align 4
12572 // CHECK15-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
12573 // CHECK15-NEXT:    store i8* null, i8** [[TMP42]], align 4
12574 // CHECK15-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
12575 // CHECK15-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
12576 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
12577 // CHECK15-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
12578 // CHECK15-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
12579 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
12580 // CHECK15-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
12581 // CHECK15-NEXT:    store i64 4, i64* [[TMP47]], align 4
12582 // CHECK15-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
12583 // CHECK15-NEXT:    store i8* null, i8** [[TMP48]], align 4
12584 // CHECK15-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
12585 // CHECK15-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
12586 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
12587 // CHECK15-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
12588 // CHECK15-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
12589 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
12590 // CHECK15-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
12591 // CHECK15-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
12592 // CHECK15-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
12593 // CHECK15-NEXT:    store i8* null, i8** [[TMP54]], align 4
12594 // CHECK15-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12595 // CHECK15-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12596 // CHECK15-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
12597 // CHECK15-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
12598 // CHECK15-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
12599 // CHECK15-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
12600 // CHECK15-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
12601 // CHECK15-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
12602 // CHECK15-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
12603 // CHECK15-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
12604 // CHECK15-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
12605 // CHECK15-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
12606 // CHECK15-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
12607 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
12608 // CHECK15-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12609 // CHECK15-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
12610 // CHECK15-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
12611 // CHECK15:       omp_offload.failed15:
12612 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
12613 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
12614 // CHECK15:       omp_offload.cont16:
12615 // CHECK15-NEXT:    [[TMP64:%.*]] = load i32, i32* [[M]], align 4
12616 // CHECK15-NEXT:    store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_17]], align 4
12617 // CHECK15-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N]], align 4
12618 // CHECK15-NEXT:    store i32 [[TMP65]], i32* [[N_CASTED18]], align 4
12619 // CHECK15-NEXT:    [[TMP66:%.*]] = load i32, i32* [[N_CASTED18]], align 4
12620 // CHECK15-NEXT:    [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
12621 // CHECK15-NEXT:    store i32 [[TMP67]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
12622 // CHECK15-NEXT:    [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
12623 // CHECK15-NEXT:    [[TMP69:%.*]] = mul nuw i32 [[TMP0]], 4
12624 // CHECK15-NEXT:    [[TMP70:%.*]] = sext i32 [[TMP69]] to i64
12625 // CHECK15-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
12626 // CHECK15-NEXT:    [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32*
12627 // CHECK15-NEXT:    store i32 [[TMP66]], i32* [[TMP72]], align 4
12628 // CHECK15-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
12629 // CHECK15-NEXT:    [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32*
12630 // CHECK15-NEXT:    store i32 [[TMP66]], i32* [[TMP74]], align 4
12631 // CHECK15-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
12632 // CHECK15-NEXT:    store i64 4, i64* [[TMP75]], align 4
12633 // CHECK15-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
12634 // CHECK15-NEXT:    store i8* null, i8** [[TMP76]], align 4
12635 // CHECK15-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
12636 // CHECK15-NEXT:    [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32*
12637 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP78]], align 4
12638 // CHECK15-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
12639 // CHECK15-NEXT:    [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32*
12640 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP80]], align 4
12641 // CHECK15-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 1
12642 // CHECK15-NEXT:    store i64 4, i64* [[TMP81]], align 4
12643 // CHECK15-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1
12644 // CHECK15-NEXT:    store i8* null, i8** [[TMP82]], align 4
12645 // CHECK15-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
12646 // CHECK15-NEXT:    [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
12647 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP84]], align 4
12648 // CHECK15-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
12649 // CHECK15-NEXT:    [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32**
12650 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP86]], align 4
12651 // CHECK15-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2
12652 // CHECK15-NEXT:    store i64 [[TMP70]], i64* [[TMP87]], align 4
12653 // CHECK15-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2
12654 // CHECK15-NEXT:    store i8* null, i8** [[TMP88]], align 4
12655 // CHECK15-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
12656 // CHECK15-NEXT:    [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i32*
12657 // CHECK15-NEXT:    store i32 [[TMP68]], i32* [[TMP90]], align 4
12658 // CHECK15-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
12659 // CHECK15-NEXT:    [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i32*
12660 // CHECK15-NEXT:    store i32 [[TMP68]], i32* [[TMP92]], align 4
12661 // CHECK15-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
12662 // CHECK15-NEXT:    store i64 4, i64* [[TMP93]], align 4
12663 // CHECK15-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3
12664 // CHECK15-NEXT:    store i8* null, i8** [[TMP94]], align 4
12665 // CHECK15-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
12666 // CHECK15-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
12667 // CHECK15-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
12668 // CHECK15-NEXT:    [[TMP98:%.*]] = load i32, i32* [[N]], align 4
12669 // CHECK15-NEXT:    store i32 [[TMP98]], i32* [[DOTCAPTURE_EXPR_24]], align 4
12670 // CHECK15-NEXT:    [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
12671 // CHECK15-NEXT:    [[SUB26:%.*]] = sub nsw i32 [[TMP99]], 0
12672 // CHECK15-NEXT:    [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
12673 // CHECK15-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
12674 // CHECK15-NEXT:    store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4
12675 // CHECK15-NEXT:    [[TMP100:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
12676 // CHECK15-NEXT:    [[ADD29:%.*]] = add nsw i32 [[TMP100]], 1
12677 // CHECK15-NEXT:    [[TMP101:%.*]] = zext i32 [[ADD29]] to i64
12678 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP101]])
12679 // CHECK15-NEXT:    [[TMP102:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, i32 4, i8** [[TMP95]], i8** [[TMP96]], i64* [[TMP97]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12680 // CHECK15-NEXT:    [[TMP103:%.*]] = icmp ne i32 [[TMP102]], 0
12681 // CHECK15-NEXT:    br i1 [[TMP103]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]]
12682 // CHECK15:       omp_offload.failed30:
12683 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP66]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP68]]) #[[ATTR3]]
12684 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT31]]
12685 // CHECK15:       omp_offload.cont31:
12686 // CHECK15-NEXT:    [[TMP104:%.*]] = load i32, i32* [[N]], align 4
12687 // CHECK15-NEXT:    store i32 [[TMP104]], i32* [[N_CASTED32]], align 4
12688 // CHECK15-NEXT:    [[TMP105:%.*]] = load i32, i32* [[N_CASTED32]], align 4
12689 // CHECK15-NEXT:    [[TMP106:%.*]] = mul nuw i32 [[TMP0]], 4
12690 // CHECK15-NEXT:    [[TMP107:%.*]] = sext i32 [[TMP106]] to i64
12691 // CHECK15-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 0
12692 // CHECK15-NEXT:    [[TMP109:%.*]] = bitcast i8** [[TMP108]] to i32*
12693 // CHECK15-NEXT:    store i32 [[TMP105]], i32* [[TMP109]], align 4
12694 // CHECK15-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 0
12695 // CHECK15-NEXT:    [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i32*
12696 // CHECK15-NEXT:    store i32 [[TMP105]], i32* [[TMP111]], align 4
12697 // CHECK15-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 0
12698 // CHECK15-NEXT:    store i64 4, i64* [[TMP112]], align 4
12699 // CHECK15-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 0
12700 // CHECK15-NEXT:    store i8* null, i8** [[TMP113]], align 4
12701 // CHECK15-NEXT:    [[TMP114:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 1
12702 // CHECK15-NEXT:    [[TMP115:%.*]] = bitcast i8** [[TMP114]] to i32*
12703 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP115]], align 4
12704 // CHECK15-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 1
12705 // CHECK15-NEXT:    [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32*
12706 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP117]], align 4
12707 // CHECK15-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 1
12708 // CHECK15-NEXT:    store i64 4, i64* [[TMP118]], align 4
12709 // CHECK15-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 1
12710 // CHECK15-NEXT:    store i8* null, i8** [[TMP119]], align 4
12711 // CHECK15-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 2
12712 // CHECK15-NEXT:    [[TMP121:%.*]] = bitcast i8** [[TMP120]] to i32**
12713 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP121]], align 4
12714 // CHECK15-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 2
12715 // CHECK15-NEXT:    [[TMP123:%.*]] = bitcast i8** [[TMP122]] to i32**
12716 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP123]], align 4
12717 // CHECK15-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 2
12718 // CHECK15-NEXT:    store i64 [[TMP107]], i64* [[TMP124]], align 4
12719 // CHECK15-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 2
12720 // CHECK15-NEXT:    store i8* null, i8** [[TMP125]], align 4
12721 // CHECK15-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 0
12722 // CHECK15-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 0
12723 // CHECK15-NEXT:    [[TMP128:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 0
12724 // CHECK15-NEXT:    [[TMP129:%.*]] = load i32, i32* [[N]], align 4
12725 // CHECK15-NEXT:    store i32 [[TMP129]], i32* [[DOTCAPTURE_EXPR_38]], align 4
12726 // CHECK15-NEXT:    [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
12727 // CHECK15-NEXT:    [[SUB40:%.*]] = sub nsw i32 [[TMP130]], 0
12728 // CHECK15-NEXT:    [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
12729 // CHECK15-NEXT:    [[SUB42:%.*]] = sub nsw i32 [[DIV41]], 1
12730 // CHECK15-NEXT:    store i32 [[SUB42]], i32* [[DOTCAPTURE_EXPR_39]], align 4
12731 // CHECK15-NEXT:    [[TMP131:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_39]], align 4
12732 // CHECK15-NEXT:    [[ADD43:%.*]] = add nsw i32 [[TMP131]], 1
12733 // CHECK15-NEXT:    [[TMP132:%.*]] = zext i32 [[ADD43]] to i64
12734 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP132]])
12735 // CHECK15-NEXT:    [[TMP133:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, i32 3, i8** [[TMP126]], i8** [[TMP127]], i64* [[TMP128]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12736 // CHECK15-NEXT:    [[TMP134:%.*]] = icmp ne i32 [[TMP133]], 0
12737 // CHECK15-NEXT:    br i1 [[TMP134]], label [[OMP_OFFLOAD_FAILED44:%.*]], label [[OMP_OFFLOAD_CONT45:%.*]]
12738 // CHECK15:       omp_offload.failed44:
12739 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP105]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
12740 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT45]]
12741 // CHECK15:       omp_offload.cont45:
12742 // CHECK15-NEXT:    [[TMP135:%.*]] = load i32, i32* [[M]], align 4
12743 // CHECK15-NEXT:    store i32 [[TMP135]], i32* [[DOTCAPTURE_EXPR_46]], align 4
12744 // CHECK15-NEXT:    [[TMP136:%.*]] = load i32, i32* [[N]], align 4
12745 // CHECK15-NEXT:    store i32 [[TMP136]], i32* [[N_CASTED47]], align 4
12746 // CHECK15-NEXT:    [[TMP137:%.*]] = load i32, i32* [[N_CASTED47]], align 4
12747 // CHECK15-NEXT:    [[TMP138:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_46]], align 4
12748 // CHECK15-NEXT:    store i32 [[TMP138]], i32* [[DOTCAPTURE_EXPR__CASTED48]], align 4
12749 // CHECK15-NEXT:    [[TMP139:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED48]], align 4
12750 // CHECK15-NEXT:    [[TMP140:%.*]] = mul nuw i32 [[TMP0]], 4
12751 // CHECK15-NEXT:    [[TMP141:%.*]] = sext i32 [[TMP140]] to i64
12752 // CHECK15-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 0
12753 // CHECK15-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
12754 // CHECK15-NEXT:    store i32 [[TMP137]], i32* [[TMP143]], align 4
12755 // CHECK15-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 0
12756 // CHECK15-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i32*
12757 // CHECK15-NEXT:    store i32 [[TMP137]], i32* [[TMP145]], align 4
12758 // CHECK15-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 0
12759 // CHECK15-NEXT:    store i64 4, i64* [[TMP146]], align 4
12760 // CHECK15-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 0
12761 // CHECK15-NEXT:    store i8* null, i8** [[TMP147]], align 4
12762 // CHECK15-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 1
12763 // CHECK15-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
12764 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP149]], align 4
12765 // CHECK15-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 1
12766 // CHECK15-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i32*
12767 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP151]], align 4
12768 // CHECK15-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 1
12769 // CHECK15-NEXT:    store i64 4, i64* [[TMP152]], align 4
12770 // CHECK15-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 1
12771 // CHECK15-NEXT:    store i8* null, i8** [[TMP153]], align 4
12772 // CHECK15-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 2
12773 // CHECK15-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
12774 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP155]], align 4
12775 // CHECK15-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 2
12776 // CHECK15-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
12777 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP157]], align 4
12778 // CHECK15-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 2
12779 // CHECK15-NEXT:    store i64 [[TMP141]], i64* [[TMP158]], align 4
12780 // CHECK15-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 2
12781 // CHECK15-NEXT:    store i8* null, i8** [[TMP159]], align 4
12782 // CHECK15-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 3
12783 // CHECK15-NEXT:    [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32*
12784 // CHECK15-NEXT:    store i32 [[TMP139]], i32* [[TMP161]], align 4
12785 // CHECK15-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 3
12786 // CHECK15-NEXT:    [[TMP163:%.*]] = bitcast i8** [[TMP162]] to i32*
12787 // CHECK15-NEXT:    store i32 [[TMP139]], i32* [[TMP163]], align 4
12788 // CHECK15-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 3
12789 // CHECK15-NEXT:    store i64 4, i64* [[TMP164]], align 4
12790 // CHECK15-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 3
12791 // CHECK15-NEXT:    store i8* null, i8** [[TMP165]], align 4
12792 // CHECK15-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 0
12793 // CHECK15-NEXT:    [[TMP167:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 0
12794 // CHECK15-NEXT:    [[TMP168:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 0
12795 // CHECK15-NEXT:    [[TMP169:%.*]] = load i32, i32* [[N]], align 4
12796 // CHECK15-NEXT:    store i32 [[TMP169]], i32* [[DOTCAPTURE_EXPR_54]], align 4
12797 // CHECK15-NEXT:    [[TMP170:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_54]], align 4
12798 // CHECK15-NEXT:    [[SUB56:%.*]] = sub nsw i32 [[TMP170]], 0
12799 // CHECK15-NEXT:    [[DIV57:%.*]] = sdiv i32 [[SUB56]], 1
12800 // CHECK15-NEXT:    [[SUB58:%.*]] = sub nsw i32 [[DIV57]], 1
12801 // CHECK15-NEXT:    store i32 [[SUB58]], i32* [[DOTCAPTURE_EXPR_55]], align 4
12802 // CHECK15-NEXT:    [[TMP171:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_55]], align 4
12803 // CHECK15-NEXT:    [[ADD59:%.*]] = add nsw i32 [[TMP171]], 1
12804 // CHECK15-NEXT:    [[TMP172:%.*]] = zext i32 [[ADD59]] to i64
12805 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP172]])
12806 // CHECK15-NEXT:    [[TMP173:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, i32 4, i8** [[TMP166]], i8** [[TMP167]], i64* [[TMP168]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12807 // CHECK15-NEXT:    [[TMP174:%.*]] = icmp ne i32 [[TMP173]], 0
12808 // CHECK15-NEXT:    br i1 [[TMP174]], label [[OMP_OFFLOAD_FAILED60:%.*]], label [[OMP_OFFLOAD_CONT61:%.*]]
12809 // CHECK15:       omp_offload.failed60:
12810 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP139]]) #[[ATTR3]]
12811 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT61]]
12812 // CHECK15:       omp_offload.cont61:
12813 // CHECK15-NEXT:    [[TMP175:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
12814 // CHECK15-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP175]])
12815 // CHECK15-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
12816 // CHECK15-NEXT:    [[TMP176:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
12817 // CHECK15-NEXT:    call void @llvm.stackrestore(i8* [[TMP176]])
12818 // CHECK15-NEXT:    [[TMP177:%.*]] = load i32, i32* [[RETVAL]], align 4
12819 // CHECK15-NEXT:    ret i32 [[TMP177]]
12820 //
12821 //
12822 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
12823 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
12824 // CHECK15-NEXT:  entry:
12825 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
12826 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12827 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
12828 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
12829 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
12830 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12831 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
12832 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12833 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12834 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
12835 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
12836 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
12837 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
12838 // CHECK15-NEXT:    ret void
12839 //
12840 //
12841 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined.
12842 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12843 // CHECK15-NEXT:  entry:
12844 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12845 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12846 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
12847 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12848 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
12849 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12850 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12851 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12852 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12853 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
12854 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12855 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12856 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12857 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12858 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
12859 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
12860 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12861 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12862 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
12863 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12864 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
12865 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12866 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12867 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
12868 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
12869 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12870 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
12871 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12872 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12873 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12874 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
12875 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12876 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
12877 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12878 // CHECK15:       omp.precond.then:
12879 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12880 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12881 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
12882 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12883 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12884 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12885 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
12886 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12887 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12888 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12889 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
12890 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12891 // CHECK15:       cond.true:
12892 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12893 // CHECK15-NEXT:    br label [[COND_END:%.*]]
12894 // CHECK15:       cond.false:
12895 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12896 // CHECK15-NEXT:    br label [[COND_END]]
12897 // CHECK15:       cond.end:
12898 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
12899 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12900 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12901 // CHECK15-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
12902 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12903 // CHECK15:       omp.inner.for.cond:
12904 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12905 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12906 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
12907 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12908 // CHECK15:       omp.inner.for.body:
12909 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12910 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12911 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
12912 // CHECK15-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
12913 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
12914 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
12915 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12916 // CHECK15:       omp.inner.for.inc:
12917 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12918 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12919 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
12920 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12921 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
12922 // CHECK15:       omp.inner.for.end:
12923 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12924 // CHECK15:       omp.loop.exit:
12925 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12926 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
12927 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
12928 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
12929 // CHECK15:       omp.precond.end:
12930 // CHECK15-NEXT:    ret void
12931 //
12932 //
12933 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..1
12934 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12935 // CHECK15-NEXT:  entry:
12936 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12937 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12938 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12939 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12940 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
12941 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12942 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
12943 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12944 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12945 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12946 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12947 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
12948 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12949 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12950 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12951 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12952 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
12953 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12954 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12955 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12956 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12957 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
12958 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12959 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
12960 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12961 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12962 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
12963 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
12964 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12965 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
12966 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12967 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12968 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12969 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
12970 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12971 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
12972 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12973 // CHECK15:       omp.precond.then:
12974 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12975 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12976 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
12977 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12978 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12979 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
12980 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
12981 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12982 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12983 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12984 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
12985 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12986 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12987 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12988 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
12989 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12990 // CHECK15:       cond.true:
12991 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12992 // CHECK15-NEXT:    br label [[COND_END:%.*]]
12993 // CHECK15:       cond.false:
12994 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12995 // CHECK15-NEXT:    br label [[COND_END]]
12996 // CHECK15:       cond.end:
12997 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
12998 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12999 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13000 // CHECK15-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
13001 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13002 // CHECK15:       omp.inner.for.cond:
13003 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13004 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13005 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
13006 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13007 // CHECK15:       omp.inner.for.body:
13008 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13009 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
13010 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13011 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
13012 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
13013 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
13014 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
13015 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13016 // CHECK15:       omp.body.continue:
13017 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13018 // CHECK15:       omp.inner.for.inc:
13019 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13020 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
13021 // CHECK15-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
13022 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13023 // CHECK15:       omp.inner.for.end:
13024 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13025 // CHECK15:       omp.loop.exit:
13026 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13027 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
13028 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
13029 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13030 // CHECK15:       omp.precond.end:
13031 // CHECK15-NEXT:    ret void
13032 //
13033 //
13034 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
13035 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13036 // CHECK15-NEXT:  entry:
13037 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13038 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13039 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13040 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13041 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13042 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13043 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13044 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13045 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13046 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13047 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
13048 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
13049 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
13050 // CHECK15-NEXT:    ret void
13051 //
13052 //
13053 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..2
13054 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13055 // CHECK15-NEXT:  entry:
13056 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13057 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13058 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13059 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13060 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13061 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13062 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13063 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13064 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13065 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13066 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13067 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13068 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13069 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13070 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
13071 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13072 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13073 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13074 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13075 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13076 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13077 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13078 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13079 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13080 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
13081 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13082 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13083 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13084 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13085 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13086 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13087 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13088 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13089 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13090 // CHECK15:       omp.precond.then:
13091 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13092 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13093 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
13094 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13095 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13096 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13097 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
13098 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13099 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13100 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13101 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
13102 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13103 // CHECK15:       cond.true:
13104 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13105 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13106 // CHECK15:       cond.false:
13107 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13108 // CHECK15-NEXT:    br label [[COND_END]]
13109 // CHECK15:       cond.end:
13110 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
13111 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13112 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13113 // CHECK15-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
13114 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13115 // CHECK15:       omp.inner.for.cond:
13116 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13117 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13118 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
13119 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13120 // CHECK15:       omp.inner.for.body:
13121 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13122 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13123 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
13124 // CHECK15-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
13125 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
13126 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
13127 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13128 // CHECK15:       omp.inner.for.inc:
13129 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13130 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13131 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
13132 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13133 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13134 // CHECK15:       omp.inner.for.end:
13135 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13136 // CHECK15:       omp.loop.exit:
13137 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13138 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
13139 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
13140 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13141 // CHECK15:       omp.precond.end:
13142 // CHECK15-NEXT:    ret void
13143 //
13144 //
13145 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..3
13146 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13147 // CHECK15-NEXT:  entry:
13148 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13149 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13150 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13151 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13152 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13153 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13154 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13155 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13156 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13157 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13158 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13159 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13160 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13161 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13162 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13163 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13164 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
13165 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13166 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13167 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13168 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13169 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13170 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13171 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13172 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13173 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13174 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13175 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
13176 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13177 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13178 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13179 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13180 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13181 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13182 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13183 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13184 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13185 // CHECK15:       omp.precond.then:
13186 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
13187 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13188 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
13189 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13190 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13191 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
13192 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
13193 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13194 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13195 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13196 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
13197 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13198 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13199 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13200 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
13201 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13202 // CHECK15:       cond.true:
13203 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13204 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13205 // CHECK15:       cond.false:
13206 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13207 // CHECK15-NEXT:    br label [[COND_END]]
13208 // CHECK15:       cond.end:
13209 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
13210 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13211 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13212 // CHECK15-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
13213 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13214 // CHECK15:       omp.inner.for.cond:
13215 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13216 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13217 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
13218 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13219 // CHECK15:       omp.inner.for.body:
13220 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13221 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
13222 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13223 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
13224 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
13225 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
13226 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
13227 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13228 // CHECK15:       omp.body.continue:
13229 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13230 // CHECK15:       omp.inner.for.inc:
13231 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13232 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
13233 // CHECK15-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
13234 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13235 // CHECK15:       omp.inner.for.end:
13236 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13237 // CHECK15:       omp.loop.exit:
13238 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13239 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
13240 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
13241 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13242 // CHECK15:       omp.precond.end:
13243 // CHECK15-NEXT:    ret void
13244 //
13245 //
13246 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
13247 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13248 // CHECK15-NEXT:  entry:
13249 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13250 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13251 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13252 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13253 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13254 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13255 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13256 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13257 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13258 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13259 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13260 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13261 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13262 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
13263 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
13264 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13265 // CHECK15-NEXT:    store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13266 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13267 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
13268 // CHECK15-NEXT:    ret void
13269 //
13270 //
13271 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..5
13272 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13273 // CHECK15-NEXT:  entry:
13274 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13275 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13276 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13277 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13278 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13279 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13280 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13281 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13282 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13283 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13284 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13285 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13286 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13287 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13288 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13289 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
13290 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13291 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13292 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13293 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13294 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13295 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13296 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13297 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13298 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13299 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13300 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13301 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13302 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13303 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13304 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13305 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13306 // CHECK15-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13307 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13308 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13309 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13310 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13311 // CHECK15:       omp.precond.then:
13312 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13313 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13314 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
13315 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13316 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13317 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13318 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13319 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
13320 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
13321 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13322 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13323 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
13324 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13325 // CHECK15:       cond.true:
13326 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13327 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13328 // CHECK15:       cond.false:
13329 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13330 // CHECK15-NEXT:    br label [[COND_END]]
13331 // CHECK15:       cond.end:
13332 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13333 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13334 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13335 // CHECK15-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
13336 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13337 // CHECK15:       omp.inner.for.cond:
13338 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13339 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13340 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
13341 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
13342 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13343 // CHECK15:       omp.inner.for.body:
13344 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13345 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13346 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
13347 // CHECK15-NEXT:    store i32 [[TMP18]], i32* [[N_CASTED]], align 4
13348 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
13349 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13350 // CHECK15-NEXT:    store i32 [[TMP20]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13351 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13352 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP21]])
13353 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13354 // CHECK15:       omp.inner.for.inc:
13355 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13356 // CHECK15-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13357 // CHECK15-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
13358 // CHECK15-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
13359 // CHECK15-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13360 // CHECK15-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13361 // CHECK15-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
13362 // CHECK15-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
13363 // CHECK15-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13364 // CHECK15-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13365 // CHECK15-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
13366 // CHECK15-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
13367 // CHECK15-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13368 // CHECK15-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13369 // CHECK15-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]]
13370 // CHECK15-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
13371 // CHECK15:       cond.true11:
13372 // CHECK15-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13373 // CHECK15-NEXT:    br label [[COND_END13:%.*]]
13374 // CHECK15:       cond.false12:
13375 // CHECK15-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13376 // CHECK15-NEXT:    br label [[COND_END13]]
13377 // CHECK15:       cond.end13:
13378 // CHECK15-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ]
13379 // CHECK15-NEXT:    store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
13380 // CHECK15-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13381 // CHECK15-NEXT:    store i32 [[TMP32]], i32* [[DOTOMP_IV]], align 4
13382 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13383 // CHECK15:       omp.inner.for.end:
13384 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13385 // CHECK15:       omp.loop.exit:
13386 // CHECK15-NEXT:    [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13387 // CHECK15-NEXT:    [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
13388 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
13389 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13390 // CHECK15:       omp.precond.end:
13391 // CHECK15-NEXT:    ret void
13392 //
13393 //
13394 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..6
13395 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13396 // CHECK15-NEXT:  entry:
13397 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13398 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13399 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13400 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13401 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13402 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13403 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13404 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13405 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13406 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13407 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13408 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13409 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13410 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13411 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13412 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13413 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13414 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
13415 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13416 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13417 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13418 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13419 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13420 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13421 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13422 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13423 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13424 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13425 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13426 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13427 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13428 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13429 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13430 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13431 // CHECK15-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13432 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13433 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13434 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13435 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13436 // CHECK15:       omp.precond.then:
13437 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
13438 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13439 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
13440 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13441 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13442 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
13443 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
13444 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13445 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13446 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13447 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
13448 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13449 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13450 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13451 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
13452 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13453 // CHECK15:       cond.true:
13454 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13455 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13456 // CHECK15:       cond.false:
13457 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13458 // CHECK15-NEXT:    br label [[COND_END]]
13459 // CHECK15:       cond.end:
13460 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
13461 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13462 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13463 // CHECK15-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
13464 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13465 // CHECK15:       omp.inner.for.cond:
13466 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13467 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13468 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
13469 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13470 // CHECK15:       omp.inner.for.body:
13471 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13472 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
13473 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13474 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
13475 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I4]], align 4
13476 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
13477 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
13478 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13479 // CHECK15:       omp.body.continue:
13480 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13481 // CHECK15:       omp.inner.for.inc:
13482 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13483 // CHECK15-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
13484 // CHECK15-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
13485 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13486 // CHECK15:       omp.inner.for.end:
13487 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13488 // CHECK15:       omp.loop.exit:
13489 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13490 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
13491 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
13492 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13493 // CHECK15:       omp.precond.end:
13494 // CHECK15-NEXT:    ret void
13495 //
13496 //
13497 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
13498 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13499 // CHECK15-NEXT:  entry:
13500 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13501 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13502 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13503 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13504 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13505 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13506 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13507 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13508 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13509 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13510 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
13511 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
13512 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
13513 // CHECK15-NEXT:    ret void
13514 //
13515 //
13516 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..8
13517 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13518 // CHECK15-NEXT:  entry:
13519 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13520 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13521 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13522 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13523 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13524 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13525 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13526 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13527 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13528 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13529 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13530 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13531 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13532 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13533 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
13534 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13535 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13536 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13537 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13538 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13539 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13540 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13541 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13542 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13543 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
13544 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13545 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13546 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13547 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13548 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13549 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13550 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13551 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13552 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13553 // CHECK15:       omp.precond.then:
13554 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13555 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13556 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
13557 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13558 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13559 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13560 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
13561 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13562 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13563 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13564 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
13565 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13566 // CHECK15:       cond.true:
13567 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13568 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13569 // CHECK15:       cond.false:
13570 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13571 // CHECK15-NEXT:    br label [[COND_END]]
13572 // CHECK15:       cond.end:
13573 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
13574 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13575 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13576 // CHECK15-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
13577 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13578 // CHECK15:       omp.inner.for.cond:
13579 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13580 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13581 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
13582 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13583 // CHECK15:       omp.inner.for.body:
13584 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13585 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13586 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
13587 // CHECK15-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
13588 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
13589 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
13590 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13591 // CHECK15:       omp.inner.for.inc:
13592 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13593 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13594 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
13595 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13596 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13597 // CHECK15:       omp.inner.for.end:
13598 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13599 // CHECK15:       omp.loop.exit:
13600 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13601 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
13602 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
13603 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13604 // CHECK15:       omp.precond.end:
13605 // CHECK15-NEXT:    ret void
13606 //
13607 //
13608 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..9
13609 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13610 // CHECK15-NEXT:  entry:
13611 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13612 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13613 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13614 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13615 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13616 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13617 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13618 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13619 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13620 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13621 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13622 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13623 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13624 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13625 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13626 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13627 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
13628 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13629 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13630 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13631 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13632 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13633 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13634 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13635 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13636 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13637 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13638 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
13639 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13640 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13641 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13642 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13643 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13644 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13645 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13646 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13647 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13648 // CHECK15:       omp.precond.then:
13649 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
13650 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13651 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
13652 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13653 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13654 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
13655 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
13656 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13657 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13658 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13659 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13660 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13661 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
13662 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
13663 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
13664 // CHECK15:       omp.dispatch.cond:
13665 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13666 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
13667 // CHECK15-NEXT:    [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
13668 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
13669 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13670 // CHECK15:       omp.dispatch.body:
13671 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13672 // CHECK15-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
13673 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13674 // CHECK15:       omp.inner.for.cond:
13675 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13676 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
13677 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
13678 // CHECK15-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13679 // CHECK15:       omp.inner.for.body:
13680 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13681 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
13682 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13683 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
13684 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
13685 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
13686 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
13687 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13688 // CHECK15:       omp.body.continue:
13689 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13690 // CHECK15:       omp.inner.for.inc:
13691 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13692 // CHECK15-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1
13693 // CHECK15-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13694 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
13695 // CHECK15:       omp.inner.for.end:
13696 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
13697 // CHECK15:       omp.dispatch.inc:
13698 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
13699 // CHECK15:       omp.dispatch.end:
13700 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13701 // CHECK15:       omp.precond.end:
13702 // CHECK15-NEXT:    ret void
13703 //
13704 //
13705 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
13706 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13707 // CHECK15-NEXT:  entry:
13708 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13709 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13710 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13711 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13712 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13713 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13714 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13715 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13716 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13717 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13718 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13719 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13720 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13721 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
13722 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
13723 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13724 // CHECK15-NEXT:    store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13725 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13726 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
13727 // CHECK15-NEXT:    ret void
13728 //
13729 //
13730 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..11
13731 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13732 // CHECK15-NEXT:  entry:
13733 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13734 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13735 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13736 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13737 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13738 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13739 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13740 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13741 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13742 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13743 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13744 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13745 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13746 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13747 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13748 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
13749 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13750 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13751 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13752 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13753 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13754 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13755 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13756 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13757 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13758 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13759 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13760 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13761 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13762 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13763 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13764 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13765 // CHECK15-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13766 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13767 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13768 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13769 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13770 // CHECK15:       omp.precond.then:
13771 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13772 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13773 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
13774 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13775 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13776 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13777 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
13778 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13779 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13780 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13781 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
13782 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13783 // CHECK15:       cond.true:
13784 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13785 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13786 // CHECK15:       cond.false:
13787 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13788 // CHECK15-NEXT:    br label [[COND_END]]
13789 // CHECK15:       cond.end:
13790 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
13791 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13792 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13793 // CHECK15-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
13794 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13795 // CHECK15:       omp.inner.for.cond:
13796 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13797 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13798 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
13799 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13800 // CHECK15:       omp.inner.for.body:
13801 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13802 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13803 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
13804 // CHECK15-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
13805 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
13806 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13807 // CHECK15-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13808 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13809 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP20]])
13810 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13811 // CHECK15:       omp.inner.for.inc:
13812 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13813 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13814 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
13815 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13816 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13817 // CHECK15:       omp.inner.for.end:
13818 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13819 // CHECK15:       omp.loop.exit:
13820 // CHECK15-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13821 // CHECK15-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
13822 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
13823 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13824 // CHECK15:       omp.precond.end:
13825 // CHECK15-NEXT:    ret void
13826 //
13827 //
13828 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..12
13829 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13830 // CHECK15-NEXT:  entry:
13831 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13832 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13833 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13834 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13835 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13836 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13837 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13838 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13839 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13840 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13841 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13842 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13843 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13844 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13845 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13846 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13847 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13848 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
13849 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13850 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13851 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13852 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13853 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13854 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13855 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13856 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13857 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13858 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13859 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13860 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13861 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13862 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13863 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13864 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13865 // CHECK15-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13866 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13867 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13868 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13869 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13870 // CHECK15:       omp.precond.then:
13871 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
13872 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13873 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
13874 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13875 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13876 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
13877 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
13878 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13879 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13880 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13881 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13882 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13883 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13884 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
13885 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
13886 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
13887 // CHECK15:       omp.dispatch.cond:
13888 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13889 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
13890 // CHECK15-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
13891 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
13892 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13893 // CHECK15:       omp.dispatch.body:
13894 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13895 // CHECK15-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
13896 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13897 // CHECK15:       omp.inner.for.cond:
13898 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13899 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
13900 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
13901 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13902 // CHECK15:       omp.inner.for.body:
13903 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13904 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
13905 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13906 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
13907 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
13908 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP20]]
13909 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
13910 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13911 // CHECK15:       omp.body.continue:
13912 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13913 // CHECK15:       omp.inner.for.inc:
13914 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13915 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
13916 // CHECK15-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13917 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
13918 // CHECK15:       omp.inner.for.end:
13919 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
13920 // CHECK15:       omp.dispatch.inc:
13921 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
13922 // CHECK15:       omp.dispatch.end:
13923 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13924 // CHECK15:       omp.precond.end:
13925 // CHECK15-NEXT:    ret void
13926 //
13927 //
13928 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
13929 // CHECK15-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
13930 // CHECK15-NEXT:  entry:
13931 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
13932 // CHECK15-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
13933 // CHECK15-NEXT:    [[M:%.*]] = alloca i32, align 4
13934 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
13935 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
13936 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
13937 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13938 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
13939 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
13940 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
13941 // CHECK15-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
13942 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13943 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13944 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
13945 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
13946 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
13947 // CHECK15-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
13948 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
13949 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
13950 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
13951 // CHECK15-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
13952 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
13953 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i32, align 4
13954 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 4
13955 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 4
13956 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 4
13957 // CHECK15-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
13958 // CHECK15-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
13959 // CHECK15-NEXT:    store i32 10, i32* [[M]], align 4
13960 // CHECK15-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13961 // CHECK15-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
13962 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
13963 // CHECK15-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13964 // CHECK15-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
13965 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
13966 // CHECK15-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
13967 // CHECK15-NEXT:    store i8* null, i8** [[TMP4]], align 4
13968 // CHECK15-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13969 // CHECK15-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13970 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
13971 // CHECK15-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13972 // CHECK15-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
13973 // CHECK15-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
13974 // CHECK15:       omp_offload.failed:
13975 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
13976 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT]]
13977 // CHECK15:       omp_offload.cont:
13978 // CHECK15-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13979 // CHECK15-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
13980 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
13981 // CHECK15-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13982 // CHECK15-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
13983 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
13984 // CHECK15-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
13985 // CHECK15-NEXT:    store i8* null, i8** [[TMP13]], align 4
13986 // CHECK15-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13987 // CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13988 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
13989 // CHECK15-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13990 // CHECK15-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
13991 // CHECK15-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
13992 // CHECK15:       omp_offload.failed5:
13993 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
13994 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
13995 // CHECK15:       omp_offload.cont6:
13996 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
13997 // CHECK15-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR_]], align 4
13998 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13999 // CHECK15-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14000 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14001 // CHECK15-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
14002 // CHECK15-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [10 x i32]**
14003 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP22]], align 4
14004 // CHECK15-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
14005 // CHECK15-NEXT:    [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [10 x i32]**
14006 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP24]], align 4
14007 // CHECK15-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
14008 // CHECK15-NEXT:    store i8* null, i8** [[TMP25]], align 4
14009 // CHECK15-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
14010 // CHECK15-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
14011 // CHECK15-NEXT:    store i32 [[TMP20]], i32* [[TMP27]], align 4
14012 // CHECK15-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
14013 // CHECK15-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
14014 // CHECK15-NEXT:    store i32 [[TMP20]], i32* [[TMP29]], align 4
14015 // CHECK15-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
14016 // CHECK15-NEXT:    store i8* null, i8** [[TMP30]], align 4
14017 // CHECK15-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
14018 // CHECK15-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
14019 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
14020 // CHECK15-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, i32 2, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14021 // CHECK15-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
14022 // CHECK15-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
14023 // CHECK15:       omp_offload.failed11:
14024 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i32 [[TMP20]]) #[[ATTR3]]
14025 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
14026 // CHECK15:       omp_offload.cont12:
14027 // CHECK15-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
14028 // CHECK15-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to [10 x i32]**
14029 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP36]], align 4
14030 // CHECK15-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
14031 // CHECK15-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to [10 x i32]**
14032 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP38]], align 4
14033 // CHECK15-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
14034 // CHECK15-NEXT:    store i8* null, i8** [[TMP39]], align 4
14035 // CHECK15-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
14036 // CHECK15-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
14037 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
14038 // CHECK15-NEXT:    [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, i32 1, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14039 // CHECK15-NEXT:    [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
14040 // CHECK15-NEXT:    br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
14041 // CHECK15:       omp_offload.failed17:
14042 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
14043 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
14044 // CHECK15:       omp_offload.cont18:
14045 // CHECK15-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M]], align 4
14046 // CHECK15-NEXT:    store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_19]], align 4
14047 // CHECK15-NEXT:    [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
14048 // CHECK15-NEXT:    store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
14049 // CHECK15-NEXT:    [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
14050 // CHECK15-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
14051 // CHECK15-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to [10 x i32]**
14052 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP48]], align 4
14053 // CHECK15-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
14054 // CHECK15-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to [10 x i32]**
14055 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP50]], align 4
14056 // CHECK15-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i32 0, i32 0
14057 // CHECK15-NEXT:    store i8* null, i8** [[TMP51]], align 4
14058 // CHECK15-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
14059 // CHECK15-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i32*
14060 // CHECK15-NEXT:    store i32 [[TMP46]], i32* [[TMP53]], align 4
14061 // CHECK15-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
14062 // CHECK15-NEXT:    [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i32*
14063 // CHECK15-NEXT:    store i32 [[TMP46]], i32* [[TMP55]], align 4
14064 // CHECK15-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i32 0, i32 1
14065 // CHECK15-NEXT:    store i8* null, i8** [[TMP56]], align 4
14066 // CHECK15-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
14067 // CHECK15-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
14068 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
14069 // CHECK15-NEXT:    [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, i32 2, i8** [[TMP57]], i8** [[TMP58]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14070 // CHECK15-NEXT:    [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0
14071 // CHECK15-NEXT:    br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
14072 // CHECK15:       omp_offload.failed25:
14073 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i32 [[TMP46]]) #[[ATTR3]]
14074 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT26]]
14075 // CHECK15:       omp_offload.cont26:
14076 // CHECK15-NEXT:    ret i32 0
14077 //
14078 //
14079 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
14080 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14081 // CHECK15-NEXT:  entry:
14082 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14083 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14084 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14085 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
14086 // CHECK15-NEXT:    ret void
14087 //
14088 //
14089 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..14
14090 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14091 // CHECK15-NEXT:  entry:
14092 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14093 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14094 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14095 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14096 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14097 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14098 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14099 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14100 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14101 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14102 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14103 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14104 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14105 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14106 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14107 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14108 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14109 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14110 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14111 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14112 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14113 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14114 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14115 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14116 // CHECK15:       cond.true:
14117 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14118 // CHECK15:       cond.false:
14119 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14120 // CHECK15-NEXT:    br label [[COND_END]]
14121 // CHECK15:       cond.end:
14122 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14123 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14124 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14125 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14126 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14127 // CHECK15:       omp.inner.for.cond:
14128 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14129 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14130 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14131 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14132 // CHECK15:       omp.inner.for.body:
14133 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14134 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14135 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
14136 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14137 // CHECK15:       omp.inner.for.inc:
14138 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14139 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14140 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14141 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14142 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14143 // CHECK15:       omp.inner.for.end:
14144 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14145 // CHECK15:       omp.loop.exit:
14146 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14147 // CHECK15-NEXT:    ret void
14148 //
14149 //
14150 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..15
14151 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14152 // CHECK15-NEXT:  entry:
14153 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14154 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14155 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14156 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14157 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14158 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14159 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14160 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14161 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14162 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14163 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14164 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14165 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14166 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14167 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14168 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14169 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14170 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14171 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14172 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14173 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14174 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14175 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14176 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14177 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14178 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14179 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14180 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
14181 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14182 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14183 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
14184 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14185 // CHECK15:       cond.true:
14186 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14187 // CHECK15:       cond.false:
14188 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14189 // CHECK15-NEXT:    br label [[COND_END]]
14190 // CHECK15:       cond.end:
14191 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
14192 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14193 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14194 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
14195 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14196 // CHECK15:       omp.inner.for.cond:
14197 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14198 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14199 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14200 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14201 // CHECK15:       omp.inner.for.body:
14202 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14203 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14204 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14205 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
14206 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
14207 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
14208 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
14209 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14210 // CHECK15:       omp.body.continue:
14211 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14212 // CHECK15:       omp.inner.for.inc:
14213 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14214 // CHECK15-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
14215 // CHECK15-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
14216 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14217 // CHECK15:       omp.inner.for.end:
14218 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14219 // CHECK15:       omp.loop.exit:
14220 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
14221 // CHECK15-NEXT:    ret void
14222 //
14223 //
14224 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
14225 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14226 // CHECK15-NEXT:  entry:
14227 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14228 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14229 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14230 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
14231 // CHECK15-NEXT:    ret void
14232 //
14233 //
14234 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..17
14235 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14236 // CHECK15-NEXT:  entry:
14237 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14238 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14239 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14240 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14241 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14242 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14243 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14244 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14245 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14246 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14247 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14248 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14249 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14250 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14251 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14252 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14253 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14254 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14255 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14256 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14257 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14258 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14259 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14260 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14261 // CHECK15:       cond.true:
14262 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14263 // CHECK15:       cond.false:
14264 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14265 // CHECK15-NEXT:    br label [[COND_END]]
14266 // CHECK15:       cond.end:
14267 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14268 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14269 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14270 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14271 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14272 // CHECK15:       omp.inner.for.cond:
14273 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14274 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14275 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14276 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14277 // CHECK15:       omp.inner.for.body:
14278 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14279 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14280 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
14281 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14282 // CHECK15:       omp.inner.for.inc:
14283 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14284 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14285 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14286 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14287 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14288 // CHECK15:       omp.inner.for.end:
14289 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14290 // CHECK15:       omp.loop.exit:
14291 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14292 // CHECK15-NEXT:    ret void
14293 //
14294 //
14295 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..18
14296 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14297 // CHECK15-NEXT:  entry:
14298 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14299 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14300 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14301 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14302 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14303 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14304 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14305 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14306 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14307 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14308 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14309 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14310 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14311 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14312 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14313 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14314 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14315 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14316 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14317 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14318 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14319 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14320 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14321 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14322 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14323 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14324 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14325 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
14326 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14327 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14328 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
14329 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14330 // CHECK15:       cond.true:
14331 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14332 // CHECK15:       cond.false:
14333 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14334 // CHECK15-NEXT:    br label [[COND_END]]
14335 // CHECK15:       cond.end:
14336 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
14337 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14338 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14339 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
14340 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14341 // CHECK15:       omp.inner.for.cond:
14342 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14343 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14344 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14345 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14346 // CHECK15:       omp.inner.for.body:
14347 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14348 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14349 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14350 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
14351 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
14352 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
14353 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
14354 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14355 // CHECK15:       omp.body.continue:
14356 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14357 // CHECK15:       omp.inner.for.inc:
14358 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14359 // CHECK15-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
14360 // CHECK15-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
14361 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14362 // CHECK15:       omp.inner.for.end:
14363 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14364 // CHECK15:       omp.loop.exit:
14365 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
14366 // CHECK15-NEXT:    ret void
14367 //
14368 //
14369 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
14370 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14371 // CHECK15-NEXT:  entry:
14372 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14373 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14374 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14375 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14376 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14377 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14378 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14379 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14380 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14381 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
14382 // CHECK15-NEXT:    ret void
14383 //
14384 //
14385 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..21
14386 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14387 // CHECK15-NEXT:  entry:
14388 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14389 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14390 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14391 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14392 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14393 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14394 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14395 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14396 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14397 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14398 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14399 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14400 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14401 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14402 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14403 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14404 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14405 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14406 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14407 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14408 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14409 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14410 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14411 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14412 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14413 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14414 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14415 // CHECK15:       cond.true:
14416 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14417 // CHECK15:       cond.false:
14418 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14419 // CHECK15-NEXT:    br label [[COND_END]]
14420 // CHECK15:       cond.end:
14421 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14422 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14423 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14424 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14425 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14426 // CHECK15:       omp.inner.for.cond:
14427 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14428 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14429 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14430 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14431 // CHECK15:       omp.inner.for.body:
14432 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14433 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14434 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14435 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14436 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14437 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
14438 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14439 // CHECK15:       omp.inner.for.inc:
14440 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14441 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14442 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14443 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14444 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14445 // CHECK15:       omp.inner.for.end:
14446 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14447 // CHECK15:       omp.loop.exit:
14448 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14449 // CHECK15-NEXT:    ret void
14450 //
14451 //
14452 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..22
14453 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14454 // CHECK15-NEXT:  entry:
14455 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14456 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14457 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14458 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14459 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14460 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14461 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14462 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14463 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14464 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14465 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14466 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14467 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14468 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14469 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14470 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14471 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14472 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14473 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14474 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14475 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14476 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14477 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14478 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14479 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14480 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14481 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14482 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14483 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14484 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14485 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
14486 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
14487 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14488 // CHECK15:       omp.dispatch.cond:
14489 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14490 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14491 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
14492 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14493 // CHECK15:       cond.true:
14494 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14495 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14496 // CHECK15:       cond.false:
14497 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14498 // CHECK15-NEXT:    br label [[COND_END]]
14499 // CHECK15:       cond.end:
14500 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
14501 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14502 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14503 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
14504 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14505 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14506 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
14507 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14508 // CHECK15:       omp.dispatch.body:
14509 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14510 // CHECK15:       omp.inner.for.cond:
14511 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14512 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14513 // CHECK15-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
14514 // CHECK15-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14515 // CHECK15:       omp.inner.for.body:
14516 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14517 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
14518 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14519 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
14520 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
14521 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
14522 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
14523 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14524 // CHECK15:       omp.body.continue:
14525 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14526 // CHECK15:       omp.inner.for.inc:
14527 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14528 // CHECK15-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
14529 // CHECK15-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
14530 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14531 // CHECK15:       omp.inner.for.end:
14532 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14533 // CHECK15:       omp.dispatch.inc:
14534 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14535 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14536 // CHECK15-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
14537 // CHECK15-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
14538 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14539 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14540 // CHECK15-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
14541 // CHECK15-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
14542 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
14543 // CHECK15:       omp.dispatch.end:
14544 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
14545 // CHECK15-NEXT:    ret void
14546 //
14547 //
14548 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
14549 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14550 // CHECK15-NEXT:  entry:
14551 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14552 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14553 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14554 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
14555 // CHECK15-NEXT:    ret void
14556 //
14557 //
14558 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..25
14559 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14560 // CHECK15-NEXT:  entry:
14561 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14562 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14563 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14564 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14565 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14566 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14567 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14568 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14569 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14570 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14571 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14572 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14573 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14574 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14575 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14576 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14577 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14578 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14579 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14580 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14581 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14582 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14583 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14584 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14585 // CHECK15:       cond.true:
14586 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14587 // CHECK15:       cond.false:
14588 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14589 // CHECK15-NEXT:    br label [[COND_END]]
14590 // CHECK15:       cond.end:
14591 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14592 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14593 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14594 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14595 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14596 // CHECK15:       omp.inner.for.cond:
14597 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14598 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14599 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14600 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14601 // CHECK15:       omp.inner.for.body:
14602 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14603 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14604 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
14605 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14606 // CHECK15:       omp.inner.for.inc:
14607 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14608 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14609 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14610 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14611 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14612 // CHECK15:       omp.inner.for.end:
14613 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14614 // CHECK15:       omp.loop.exit:
14615 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14616 // CHECK15-NEXT:    ret void
14617 //
14618 //
14619 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..26
14620 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14621 // CHECK15-NEXT:  entry:
14622 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14623 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14624 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14625 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14626 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14627 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14628 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14629 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14630 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14631 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14632 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14633 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14634 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14635 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14636 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14637 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14638 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14639 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14640 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14641 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14642 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14643 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14644 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14645 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14646 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14647 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14648 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14649 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14650 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14651 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
14652 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
14653 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14654 // CHECK15:       omp.dispatch.cond:
14655 // CHECK15-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
14656 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
14657 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14658 // CHECK15:       omp.dispatch.body:
14659 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14660 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
14661 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14662 // CHECK15:       omp.inner.for.cond:
14663 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14664 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
14665 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
14666 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14667 // CHECK15:       omp.inner.for.body:
14668 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14669 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
14670 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14671 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
14672 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
14673 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
14674 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
14675 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14676 // CHECK15:       omp.body.continue:
14677 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14678 // CHECK15:       omp.inner.for.inc:
14679 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14680 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
14681 // CHECK15-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14682 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
14683 // CHECK15:       omp.inner.for.end:
14684 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14685 // CHECK15:       omp.dispatch.inc:
14686 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
14687 // CHECK15:       omp.dispatch.end:
14688 // CHECK15-NEXT:    ret void
14689 //
14690 //
14691 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
14692 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14693 // CHECK15-NEXT:  entry:
14694 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14695 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14696 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14697 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14698 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14699 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14700 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14701 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14702 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14703 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
14704 // CHECK15-NEXT:    ret void
14705 //
14706 //
14707 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..29
14708 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14709 // CHECK15-NEXT:  entry:
14710 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14711 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14712 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14713 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14714 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14715 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14716 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14717 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14718 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14719 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14720 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14721 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14722 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14723 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14724 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14725 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14726 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14727 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14728 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14729 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14730 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14731 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14732 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14733 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14734 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14735 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14736 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14737 // CHECK15:       cond.true:
14738 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14739 // CHECK15:       cond.false:
14740 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14741 // CHECK15-NEXT:    br label [[COND_END]]
14742 // CHECK15:       cond.end:
14743 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14744 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14745 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14746 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14747 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14748 // CHECK15:       omp.inner.for.cond:
14749 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14750 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14751 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14752 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14753 // CHECK15:       omp.inner.for.body:
14754 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14755 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14756 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14757 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14758 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14759 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
14760 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14761 // CHECK15:       omp.inner.for.inc:
14762 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14763 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14764 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14765 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14766 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14767 // CHECK15:       omp.inner.for.end:
14768 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14769 // CHECK15:       omp.loop.exit:
14770 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14771 // CHECK15-NEXT:    ret void
14772 //
14773 //
14774 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..30
14775 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14776 // CHECK15-NEXT:  entry:
14777 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14778 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14779 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14780 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14781 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14782 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14783 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14784 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14785 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14786 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14787 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14788 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14789 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14790 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14791 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14792 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14793 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14794 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14795 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14796 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14797 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14798 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14799 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14800 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14801 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14802 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14803 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14804 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14805 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14806 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14807 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14808 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14809 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
14810 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
14811 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14812 // CHECK15:       omp.dispatch.cond:
14813 // CHECK15-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
14814 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
14815 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14816 // CHECK15:       omp.dispatch.body:
14817 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14818 // CHECK15-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
14819 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14820 // CHECK15:       omp.inner.for.cond:
14821 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14822 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
14823 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
14824 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14825 // CHECK15:       omp.inner.for.body:
14826 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14827 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
14828 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14829 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
14830 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
14831 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
14832 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
14833 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14834 // CHECK15:       omp.body.continue:
14835 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14836 // CHECK15:       omp.inner.for.inc:
14837 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14838 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
14839 // CHECK15-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14840 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
14841 // CHECK15:       omp.inner.for.end:
14842 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14843 // CHECK15:       omp.dispatch.inc:
14844 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
14845 // CHECK15:       omp.dispatch.end:
14846 // CHECK15-NEXT:    ret void
14847 //
14848 //
14849 // CHECK15-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
14850 // CHECK15-SAME: () #[[ATTR5:[0-9]+]] {
14851 // CHECK15-NEXT:  entry:
14852 // CHECK15-NEXT:    call void @__tgt_register_requires(i64 1)
14853 // CHECK15-NEXT:    ret void
14854 //
14855 //
14856 // CHECK16-LABEL: define {{[^@]+}}@main
14857 // CHECK16-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
14858 // CHECK16-NEXT:  entry:
14859 // CHECK16-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
14860 // CHECK16-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
14861 // CHECK16-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
14862 // CHECK16-NEXT:    [[N:%.*]] = alloca i32, align 4
14863 // CHECK16-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
14864 // CHECK16-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
14865 // CHECK16-NEXT:    [[M:%.*]] = alloca i32, align 4
14866 // CHECK16-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
14867 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
14868 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
14869 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
14870 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
14871 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14872 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14873 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14874 // CHECK16-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
14875 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
14876 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
14877 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
14878 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
14879 // CHECK16-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
14880 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
14881 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
14882 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
14883 // CHECK16-NEXT:    [[N_CASTED18:%.*]] = alloca i32, align 4
14884 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14885 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4
14886 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4
14887 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4
14888 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4
14889 // CHECK16-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
14890 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
14891 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
14892 // CHECK16-NEXT:    [[N_CASTED32:%.*]] = alloca i32, align 4
14893 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS33:%.*]] = alloca [3 x i8*], align 4
14894 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS34:%.*]] = alloca [3 x i8*], align 4
14895 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS35:%.*]] = alloca [3 x i8*], align 4
14896 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES36:%.*]] = alloca [3 x i64], align 4
14897 // CHECK16-NEXT:    [[_TMP37:%.*]] = alloca i32, align 4
14898 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
14899 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
14900 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_46:%.*]] = alloca i32, align 4
14901 // CHECK16-NEXT:    [[N_CASTED47:%.*]] = alloca i32, align 4
14902 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED48:%.*]] = alloca i32, align 4
14903 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS49:%.*]] = alloca [4 x i8*], align 4
14904 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS50:%.*]] = alloca [4 x i8*], align 4
14905 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS51:%.*]] = alloca [4 x i8*], align 4
14906 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES52:%.*]] = alloca [4 x i64], align 4
14907 // CHECK16-NEXT:    [[_TMP53:%.*]] = alloca i32, align 4
14908 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_54:%.*]] = alloca i32, align 4
14909 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4
14910 // CHECK16-NEXT:    store i32 0, i32* [[RETVAL]], align 4
14911 // CHECK16-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
14912 // CHECK16-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
14913 // CHECK16-NEXT:    store i32 100, i32* [[N]], align 4
14914 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
14915 // CHECK16-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
14916 // CHECK16-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
14917 // CHECK16-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
14918 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
14919 // CHECK16-NEXT:    store i32 10, i32* [[M]], align 4
14920 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
14921 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
14922 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
14923 // CHECK16-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
14924 // CHECK16-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
14925 // CHECK16-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
14926 // CHECK16-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
14927 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
14928 // CHECK16-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
14929 // CHECK16-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
14930 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
14931 // CHECK16-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
14932 // CHECK16-NEXT:    store i64 4, i64* [[TMP10]], align 4
14933 // CHECK16-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
14934 // CHECK16-NEXT:    store i8* null, i8** [[TMP11]], align 4
14935 // CHECK16-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
14936 // CHECK16-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
14937 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
14938 // CHECK16-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
14939 // CHECK16-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
14940 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
14941 // CHECK16-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
14942 // CHECK16-NEXT:    store i64 4, i64* [[TMP16]], align 4
14943 // CHECK16-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
14944 // CHECK16-NEXT:    store i8* null, i8** [[TMP17]], align 4
14945 // CHECK16-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
14946 // CHECK16-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
14947 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
14948 // CHECK16-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
14949 // CHECK16-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
14950 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
14951 // CHECK16-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
14952 // CHECK16-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
14953 // CHECK16-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
14954 // CHECK16-NEXT:    store i8* null, i8** [[TMP23]], align 4
14955 // CHECK16-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
14956 // CHECK16-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
14957 // CHECK16-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
14958 // CHECK16-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
14959 // CHECK16-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
14960 // CHECK16-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14961 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
14962 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14963 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
14964 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14965 // CHECK16-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14966 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
14967 // CHECK16-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
14968 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
14969 // CHECK16-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14970 // CHECK16-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
14971 // CHECK16-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
14972 // CHECK16:       omp_offload.failed:
14973 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
14974 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT]]
14975 // CHECK16:       omp_offload.cont:
14976 // CHECK16-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
14977 // CHECK16-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
14978 // CHECK16-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
14979 // CHECK16-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
14980 // CHECK16-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
14981 // CHECK16-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
14982 // CHECK16-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
14983 // CHECK16-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
14984 // CHECK16-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
14985 // CHECK16-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
14986 // CHECK16-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
14987 // CHECK16-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
14988 // CHECK16-NEXT:    store i64 4, i64* [[TMP41]], align 4
14989 // CHECK16-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
14990 // CHECK16-NEXT:    store i8* null, i8** [[TMP42]], align 4
14991 // CHECK16-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
14992 // CHECK16-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
14993 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
14994 // CHECK16-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
14995 // CHECK16-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
14996 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
14997 // CHECK16-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
14998 // CHECK16-NEXT:    store i64 4, i64* [[TMP47]], align 4
14999 // CHECK16-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
15000 // CHECK16-NEXT:    store i8* null, i8** [[TMP48]], align 4
15001 // CHECK16-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
15002 // CHECK16-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
15003 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
15004 // CHECK16-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
15005 // CHECK16-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
15006 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
15007 // CHECK16-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
15008 // CHECK16-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
15009 // CHECK16-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
15010 // CHECK16-NEXT:    store i8* null, i8** [[TMP54]], align 4
15011 // CHECK16-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
15012 // CHECK16-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
15013 // CHECK16-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
15014 // CHECK16-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
15015 // CHECK16-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
15016 // CHECK16-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
15017 // CHECK16-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
15018 // CHECK16-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
15019 // CHECK16-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
15020 // CHECK16-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
15021 // CHECK16-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
15022 // CHECK16-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
15023 // CHECK16-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
15024 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
15025 // CHECK16-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15026 // CHECK16-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
15027 // CHECK16-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
15028 // CHECK16:       omp_offload.failed15:
15029 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
15030 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
15031 // CHECK16:       omp_offload.cont16:
15032 // CHECK16-NEXT:    [[TMP64:%.*]] = load i32, i32* [[M]], align 4
15033 // CHECK16-NEXT:    store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_17]], align 4
15034 // CHECK16-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N]], align 4
15035 // CHECK16-NEXT:    store i32 [[TMP65]], i32* [[N_CASTED18]], align 4
15036 // CHECK16-NEXT:    [[TMP66:%.*]] = load i32, i32* [[N_CASTED18]], align 4
15037 // CHECK16-NEXT:    [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
15038 // CHECK16-NEXT:    store i32 [[TMP67]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15039 // CHECK16-NEXT:    [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15040 // CHECK16-NEXT:    [[TMP69:%.*]] = mul nuw i32 [[TMP0]], 4
15041 // CHECK16-NEXT:    [[TMP70:%.*]] = sext i32 [[TMP69]] to i64
15042 // CHECK16-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
15043 // CHECK16-NEXT:    [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32*
15044 // CHECK16-NEXT:    store i32 [[TMP66]], i32* [[TMP72]], align 4
15045 // CHECK16-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
15046 // CHECK16-NEXT:    [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32*
15047 // CHECK16-NEXT:    store i32 [[TMP66]], i32* [[TMP74]], align 4
15048 // CHECK16-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
15049 // CHECK16-NEXT:    store i64 4, i64* [[TMP75]], align 4
15050 // CHECK16-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
15051 // CHECK16-NEXT:    store i8* null, i8** [[TMP76]], align 4
15052 // CHECK16-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
15053 // CHECK16-NEXT:    [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32*
15054 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP78]], align 4
15055 // CHECK16-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
15056 // CHECK16-NEXT:    [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32*
15057 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP80]], align 4
15058 // CHECK16-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 1
15059 // CHECK16-NEXT:    store i64 4, i64* [[TMP81]], align 4
15060 // CHECK16-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1
15061 // CHECK16-NEXT:    store i8* null, i8** [[TMP82]], align 4
15062 // CHECK16-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
15063 // CHECK16-NEXT:    [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
15064 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP84]], align 4
15065 // CHECK16-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
15066 // CHECK16-NEXT:    [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32**
15067 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP86]], align 4
15068 // CHECK16-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2
15069 // CHECK16-NEXT:    store i64 [[TMP70]], i64* [[TMP87]], align 4
15070 // CHECK16-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2
15071 // CHECK16-NEXT:    store i8* null, i8** [[TMP88]], align 4
15072 // CHECK16-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
15073 // CHECK16-NEXT:    [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i32*
15074 // CHECK16-NEXT:    store i32 [[TMP68]], i32* [[TMP90]], align 4
15075 // CHECK16-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
15076 // CHECK16-NEXT:    [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i32*
15077 // CHECK16-NEXT:    store i32 [[TMP68]], i32* [[TMP92]], align 4
15078 // CHECK16-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
15079 // CHECK16-NEXT:    store i64 4, i64* [[TMP93]], align 4
15080 // CHECK16-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3
15081 // CHECK16-NEXT:    store i8* null, i8** [[TMP94]], align 4
15082 // CHECK16-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
15083 // CHECK16-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
15084 // CHECK16-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
15085 // CHECK16-NEXT:    [[TMP98:%.*]] = load i32, i32* [[N]], align 4
15086 // CHECK16-NEXT:    store i32 [[TMP98]], i32* [[DOTCAPTURE_EXPR_24]], align 4
15087 // CHECK16-NEXT:    [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
15088 // CHECK16-NEXT:    [[SUB26:%.*]] = sub nsw i32 [[TMP99]], 0
15089 // CHECK16-NEXT:    [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
15090 // CHECK16-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
15091 // CHECK16-NEXT:    store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4
15092 // CHECK16-NEXT:    [[TMP100:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
15093 // CHECK16-NEXT:    [[ADD29:%.*]] = add nsw i32 [[TMP100]], 1
15094 // CHECK16-NEXT:    [[TMP101:%.*]] = zext i32 [[ADD29]] to i64
15095 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP101]])
15096 // CHECK16-NEXT:    [[TMP102:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, i32 4, i8** [[TMP95]], i8** [[TMP96]], i64* [[TMP97]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15097 // CHECK16-NEXT:    [[TMP103:%.*]] = icmp ne i32 [[TMP102]], 0
15098 // CHECK16-NEXT:    br i1 [[TMP103]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]]
15099 // CHECK16:       omp_offload.failed30:
15100 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP66]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP68]]) #[[ATTR3]]
15101 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT31]]
15102 // CHECK16:       omp_offload.cont31:
15103 // CHECK16-NEXT:    [[TMP104:%.*]] = load i32, i32* [[N]], align 4
15104 // CHECK16-NEXT:    store i32 [[TMP104]], i32* [[N_CASTED32]], align 4
15105 // CHECK16-NEXT:    [[TMP105:%.*]] = load i32, i32* [[N_CASTED32]], align 4
15106 // CHECK16-NEXT:    [[TMP106:%.*]] = mul nuw i32 [[TMP0]], 4
15107 // CHECK16-NEXT:    [[TMP107:%.*]] = sext i32 [[TMP106]] to i64
15108 // CHECK16-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 0
15109 // CHECK16-NEXT:    [[TMP109:%.*]] = bitcast i8** [[TMP108]] to i32*
15110 // CHECK16-NEXT:    store i32 [[TMP105]], i32* [[TMP109]], align 4
15111 // CHECK16-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 0
15112 // CHECK16-NEXT:    [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i32*
15113 // CHECK16-NEXT:    store i32 [[TMP105]], i32* [[TMP111]], align 4
15114 // CHECK16-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 0
15115 // CHECK16-NEXT:    store i64 4, i64* [[TMP112]], align 4
15116 // CHECK16-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 0
15117 // CHECK16-NEXT:    store i8* null, i8** [[TMP113]], align 4
15118 // CHECK16-NEXT:    [[TMP114:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 1
15119 // CHECK16-NEXT:    [[TMP115:%.*]] = bitcast i8** [[TMP114]] to i32*
15120 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP115]], align 4
15121 // CHECK16-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 1
15122 // CHECK16-NEXT:    [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32*
15123 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP117]], align 4
15124 // CHECK16-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 1
15125 // CHECK16-NEXT:    store i64 4, i64* [[TMP118]], align 4
15126 // CHECK16-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 1
15127 // CHECK16-NEXT:    store i8* null, i8** [[TMP119]], align 4
15128 // CHECK16-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 2
15129 // CHECK16-NEXT:    [[TMP121:%.*]] = bitcast i8** [[TMP120]] to i32**
15130 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP121]], align 4
15131 // CHECK16-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 2
15132 // CHECK16-NEXT:    [[TMP123:%.*]] = bitcast i8** [[TMP122]] to i32**
15133 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP123]], align 4
15134 // CHECK16-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 2
15135 // CHECK16-NEXT:    store i64 [[TMP107]], i64* [[TMP124]], align 4
15136 // CHECK16-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 2
15137 // CHECK16-NEXT:    store i8* null, i8** [[TMP125]], align 4
15138 // CHECK16-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 0
15139 // CHECK16-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 0
15140 // CHECK16-NEXT:    [[TMP128:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 0
15141 // CHECK16-NEXT:    [[TMP129:%.*]] = load i32, i32* [[N]], align 4
15142 // CHECK16-NEXT:    store i32 [[TMP129]], i32* [[DOTCAPTURE_EXPR_38]], align 4
15143 // CHECK16-NEXT:    [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
15144 // CHECK16-NEXT:    [[SUB40:%.*]] = sub nsw i32 [[TMP130]], 0
15145 // CHECK16-NEXT:    [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
15146 // CHECK16-NEXT:    [[SUB42:%.*]] = sub nsw i32 [[DIV41]], 1
15147 // CHECK16-NEXT:    store i32 [[SUB42]], i32* [[DOTCAPTURE_EXPR_39]], align 4
15148 // CHECK16-NEXT:    [[TMP131:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_39]], align 4
15149 // CHECK16-NEXT:    [[ADD43:%.*]] = add nsw i32 [[TMP131]], 1
15150 // CHECK16-NEXT:    [[TMP132:%.*]] = zext i32 [[ADD43]] to i64
15151 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP132]])
15152 // CHECK16-NEXT:    [[TMP133:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, i32 3, i8** [[TMP126]], i8** [[TMP127]], i64* [[TMP128]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15153 // CHECK16-NEXT:    [[TMP134:%.*]] = icmp ne i32 [[TMP133]], 0
15154 // CHECK16-NEXT:    br i1 [[TMP134]], label [[OMP_OFFLOAD_FAILED44:%.*]], label [[OMP_OFFLOAD_CONT45:%.*]]
15155 // CHECK16:       omp_offload.failed44:
15156 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP105]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
15157 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT45]]
15158 // CHECK16:       omp_offload.cont45:
15159 // CHECK16-NEXT:    [[TMP135:%.*]] = load i32, i32* [[M]], align 4
15160 // CHECK16-NEXT:    store i32 [[TMP135]], i32* [[DOTCAPTURE_EXPR_46]], align 4
15161 // CHECK16-NEXT:    [[TMP136:%.*]] = load i32, i32* [[N]], align 4
15162 // CHECK16-NEXT:    store i32 [[TMP136]], i32* [[N_CASTED47]], align 4
15163 // CHECK16-NEXT:    [[TMP137:%.*]] = load i32, i32* [[N_CASTED47]], align 4
15164 // CHECK16-NEXT:    [[TMP138:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_46]], align 4
15165 // CHECK16-NEXT:    store i32 [[TMP138]], i32* [[DOTCAPTURE_EXPR__CASTED48]], align 4
15166 // CHECK16-NEXT:    [[TMP139:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED48]], align 4
15167 // CHECK16-NEXT:    [[TMP140:%.*]] = mul nuw i32 [[TMP0]], 4
15168 // CHECK16-NEXT:    [[TMP141:%.*]] = sext i32 [[TMP140]] to i64
15169 // CHECK16-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 0
15170 // CHECK16-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
15171 // CHECK16-NEXT:    store i32 [[TMP137]], i32* [[TMP143]], align 4
15172 // CHECK16-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 0
15173 // CHECK16-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i32*
15174 // CHECK16-NEXT:    store i32 [[TMP137]], i32* [[TMP145]], align 4
15175 // CHECK16-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 0
15176 // CHECK16-NEXT:    store i64 4, i64* [[TMP146]], align 4
15177 // CHECK16-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 0
15178 // CHECK16-NEXT:    store i8* null, i8** [[TMP147]], align 4
15179 // CHECK16-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 1
15180 // CHECK16-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
15181 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP149]], align 4
15182 // CHECK16-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 1
15183 // CHECK16-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i32*
15184 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP151]], align 4
15185 // CHECK16-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 1
15186 // CHECK16-NEXT:    store i64 4, i64* [[TMP152]], align 4
15187 // CHECK16-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 1
15188 // CHECK16-NEXT:    store i8* null, i8** [[TMP153]], align 4
15189 // CHECK16-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 2
15190 // CHECK16-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
15191 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP155]], align 4
15192 // CHECK16-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 2
15193 // CHECK16-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
15194 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP157]], align 4
15195 // CHECK16-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 2
15196 // CHECK16-NEXT:    store i64 [[TMP141]], i64* [[TMP158]], align 4
15197 // CHECK16-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 2
15198 // CHECK16-NEXT:    store i8* null, i8** [[TMP159]], align 4
15199 // CHECK16-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 3
15200 // CHECK16-NEXT:    [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32*
15201 // CHECK16-NEXT:    store i32 [[TMP139]], i32* [[TMP161]], align 4
15202 // CHECK16-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 3
15203 // CHECK16-NEXT:    [[TMP163:%.*]] = bitcast i8** [[TMP162]] to i32*
15204 // CHECK16-NEXT:    store i32 [[TMP139]], i32* [[TMP163]], align 4
15205 // CHECK16-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 3
15206 // CHECK16-NEXT:    store i64 4, i64* [[TMP164]], align 4
15207 // CHECK16-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 3
15208 // CHECK16-NEXT:    store i8* null, i8** [[TMP165]], align 4
15209 // CHECK16-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 0
15210 // CHECK16-NEXT:    [[TMP167:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 0
15211 // CHECK16-NEXT:    [[TMP168:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 0
15212 // CHECK16-NEXT:    [[TMP169:%.*]] = load i32, i32* [[N]], align 4
15213 // CHECK16-NEXT:    store i32 [[TMP169]], i32* [[DOTCAPTURE_EXPR_54]], align 4
15214 // CHECK16-NEXT:    [[TMP170:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_54]], align 4
15215 // CHECK16-NEXT:    [[SUB56:%.*]] = sub nsw i32 [[TMP170]], 0
15216 // CHECK16-NEXT:    [[DIV57:%.*]] = sdiv i32 [[SUB56]], 1
15217 // CHECK16-NEXT:    [[SUB58:%.*]] = sub nsw i32 [[DIV57]], 1
15218 // CHECK16-NEXT:    store i32 [[SUB58]], i32* [[DOTCAPTURE_EXPR_55]], align 4
15219 // CHECK16-NEXT:    [[TMP171:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_55]], align 4
15220 // CHECK16-NEXT:    [[ADD59:%.*]] = add nsw i32 [[TMP171]], 1
15221 // CHECK16-NEXT:    [[TMP172:%.*]] = zext i32 [[ADD59]] to i64
15222 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP172]])
15223 // CHECK16-NEXT:    [[TMP173:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, i32 4, i8** [[TMP166]], i8** [[TMP167]], i64* [[TMP168]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15224 // CHECK16-NEXT:    [[TMP174:%.*]] = icmp ne i32 [[TMP173]], 0
15225 // CHECK16-NEXT:    br i1 [[TMP174]], label [[OMP_OFFLOAD_FAILED60:%.*]], label [[OMP_OFFLOAD_CONT61:%.*]]
15226 // CHECK16:       omp_offload.failed60:
15227 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP139]]) #[[ATTR3]]
15228 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT61]]
15229 // CHECK16:       omp_offload.cont61:
15230 // CHECK16-NEXT:    [[TMP175:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
15231 // CHECK16-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP175]])
15232 // CHECK16-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
15233 // CHECK16-NEXT:    [[TMP176:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
15234 // CHECK16-NEXT:    call void @llvm.stackrestore(i8* [[TMP176]])
15235 // CHECK16-NEXT:    [[TMP177:%.*]] = load i32, i32* [[RETVAL]], align 4
15236 // CHECK16-NEXT:    ret i32 [[TMP177]]
15237 //
15238 //
15239 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
15240 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
15241 // CHECK16-NEXT:  entry:
15242 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15243 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15244 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15245 // CHECK16-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
15246 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15247 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15248 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15249 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15250 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15251 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
15252 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
15253 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
15254 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
15255 // CHECK16-NEXT:    ret void
15256 //
15257 //
15258 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined.
15259 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15260 // CHECK16-NEXT:  entry:
15261 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15262 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15263 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15264 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15265 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15266 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15267 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15268 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15269 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15270 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15271 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15272 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15273 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15274 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15275 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15276 // CHECK16-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
15277 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15278 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15279 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15280 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15281 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15282 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15283 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15284 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
15285 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
15286 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15287 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
15288 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15289 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15290 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15291 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15292 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15293 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
15294 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15295 // CHECK16:       omp.precond.then:
15296 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15297 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15298 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
15299 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15300 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15301 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15302 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
15303 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15304 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15305 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15306 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
15307 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15308 // CHECK16:       cond.true:
15309 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15310 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15311 // CHECK16:       cond.false:
15312 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15313 // CHECK16-NEXT:    br label [[COND_END]]
15314 // CHECK16:       cond.end:
15315 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
15316 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15317 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15318 // CHECK16-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
15319 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15320 // CHECK16:       omp.inner.for.cond:
15321 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15322 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15323 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
15324 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15325 // CHECK16:       omp.inner.for.body:
15326 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15327 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15328 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
15329 // CHECK16-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
15330 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
15331 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
15332 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15333 // CHECK16:       omp.inner.for.inc:
15334 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15335 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15336 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
15337 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
15338 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15339 // CHECK16:       omp.inner.for.end:
15340 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15341 // CHECK16:       omp.loop.exit:
15342 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15343 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
15344 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
15345 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15346 // CHECK16:       omp.precond.end:
15347 // CHECK16-NEXT:    ret void
15348 //
15349 //
15350 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..1
15351 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15352 // CHECK16-NEXT:  entry:
15353 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15354 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15355 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15356 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15357 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15358 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15359 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15360 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15361 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15362 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15363 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15364 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15365 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
15366 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
15367 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15368 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15369 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15370 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15371 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15372 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15373 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15374 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15375 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15376 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15377 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15378 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15379 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
15380 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
15381 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15382 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
15383 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15384 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15385 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15386 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15387 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15388 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
15389 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15390 // CHECK16:       omp.precond.then:
15391 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
15392 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15393 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
15394 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15395 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15396 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
15397 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
15398 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15399 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15400 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15401 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
15402 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15403 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15404 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15405 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
15406 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15407 // CHECK16:       cond.true:
15408 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15409 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15410 // CHECK16:       cond.false:
15411 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15412 // CHECK16-NEXT:    br label [[COND_END]]
15413 // CHECK16:       cond.end:
15414 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
15415 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15416 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15417 // CHECK16-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
15418 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15419 // CHECK16:       omp.inner.for.cond:
15420 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15421 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15422 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
15423 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15424 // CHECK16:       omp.inner.for.body:
15425 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15426 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
15427 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15428 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
15429 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
15430 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
15431 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
15432 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
15433 // CHECK16:       omp.body.continue:
15434 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15435 // CHECK16:       omp.inner.for.inc:
15436 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15437 // CHECK16-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
15438 // CHECK16-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
15439 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15440 // CHECK16:       omp.inner.for.end:
15441 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15442 // CHECK16:       omp.loop.exit:
15443 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15444 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
15445 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
15446 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15447 // CHECK16:       omp.precond.end:
15448 // CHECK16-NEXT:    ret void
15449 //
15450 //
15451 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
15452 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15453 // CHECK16-NEXT:  entry:
15454 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15455 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15456 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15457 // CHECK16-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
15458 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15459 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15460 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15461 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15462 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15463 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
15464 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
15465 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
15466 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
15467 // CHECK16-NEXT:    ret void
15468 //
15469 //
15470 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..2
15471 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15472 // CHECK16-NEXT:  entry:
15473 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15474 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15475 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15476 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15477 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15478 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15479 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15480 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15481 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15482 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15483 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15484 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15485 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15486 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15487 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15488 // CHECK16-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
15489 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15490 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15491 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15492 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15493 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15494 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15495 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15496 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
15497 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
15498 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15499 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
15500 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15501 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15502 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15503 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15504 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15505 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
15506 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15507 // CHECK16:       omp.precond.then:
15508 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15509 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15510 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
15511 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15512 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15513 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15514 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
15515 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15516 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15517 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15518 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
15519 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15520 // CHECK16:       cond.true:
15521 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15522 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15523 // CHECK16:       cond.false:
15524 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15525 // CHECK16-NEXT:    br label [[COND_END]]
15526 // CHECK16:       cond.end:
15527 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
15528 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15529 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15530 // CHECK16-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
15531 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15532 // CHECK16:       omp.inner.for.cond:
15533 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15534 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15535 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
15536 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15537 // CHECK16:       omp.inner.for.body:
15538 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15539 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15540 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
15541 // CHECK16-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
15542 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
15543 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
15544 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15545 // CHECK16:       omp.inner.for.inc:
15546 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15547 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15548 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
15549 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
15550 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15551 // CHECK16:       omp.inner.for.end:
15552 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15553 // CHECK16:       omp.loop.exit:
15554 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15555 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
15556 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
15557 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15558 // CHECK16:       omp.precond.end:
15559 // CHECK16-NEXT:    ret void
15560 //
15561 //
15562 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..3
15563 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15564 // CHECK16-NEXT:  entry:
15565 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15566 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15567 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15568 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15569 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15570 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15571 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15572 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15573 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15574 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15575 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15576 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15577 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
15578 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
15579 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15580 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15581 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15582 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15583 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15584 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15585 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15586 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15587 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15588 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15589 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15590 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15591 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
15592 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
15593 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15594 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
15595 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15596 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15597 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15598 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15599 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15600 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
15601 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15602 // CHECK16:       omp.precond.then:
15603 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
15604 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15605 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
15606 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15607 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15608 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
15609 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
15610 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15611 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15612 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15613 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
15614 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15615 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15616 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15617 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
15618 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15619 // CHECK16:       cond.true:
15620 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15621 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15622 // CHECK16:       cond.false:
15623 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15624 // CHECK16-NEXT:    br label [[COND_END]]
15625 // CHECK16:       cond.end:
15626 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
15627 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15628 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15629 // CHECK16-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
15630 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15631 // CHECK16:       omp.inner.for.cond:
15632 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15633 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15634 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
15635 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15636 // CHECK16:       omp.inner.for.body:
15637 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15638 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
15639 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15640 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
15641 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
15642 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
15643 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
15644 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
15645 // CHECK16:       omp.body.continue:
15646 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15647 // CHECK16:       omp.inner.for.inc:
15648 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15649 // CHECK16-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
15650 // CHECK16-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
15651 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15652 // CHECK16:       omp.inner.for.end:
15653 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15654 // CHECK16:       omp.loop.exit:
15655 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15656 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
15657 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
15658 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15659 // CHECK16:       omp.precond.end:
15660 // CHECK16-NEXT:    ret void
15661 //
15662 //
15663 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
15664 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15665 // CHECK16-NEXT:  entry:
15666 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15667 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15668 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15669 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15670 // CHECK16-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
15671 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
15672 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15673 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15674 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15675 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15676 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15677 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15678 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
15679 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
15680 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
15681 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15682 // CHECK16-NEXT:    store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15683 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15684 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
15685 // CHECK16-NEXT:    ret void
15686 //
15687 //
15688 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..5
15689 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15690 // CHECK16-NEXT:  entry:
15691 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15692 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15693 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15694 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15695 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15696 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15697 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15698 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15699 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15700 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
15701 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15702 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15703 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15704 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15705 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15706 // CHECK16-NEXT:    [[I4:%.*]] = alloca i32, align 4
15707 // CHECK16-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
15708 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
15709 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15710 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15711 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15712 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15713 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15714 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15715 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15716 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15717 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
15718 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15719 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15720 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
15721 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15722 // CHECK16-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
15723 // CHECK16-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
15724 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15725 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15726 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
15727 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15728 // CHECK16:       omp.precond.then:
15729 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15730 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15731 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
15732 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15733 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15734 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15735 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15736 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
15737 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
15738 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15739 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15740 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
15741 // CHECK16-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15742 // CHECK16:       cond.true:
15743 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15744 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15745 // CHECK16:       cond.false:
15746 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15747 // CHECK16-NEXT:    br label [[COND_END]]
15748 // CHECK16:       cond.end:
15749 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
15750 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15751 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15752 // CHECK16-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
15753 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15754 // CHECK16:       omp.inner.for.cond:
15755 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15756 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15757 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
15758 // CHECK16-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
15759 // CHECK16-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15760 // CHECK16:       omp.inner.for.body:
15761 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15762 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15763 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
15764 // CHECK16-NEXT:    store i32 [[TMP18]], i32* [[N_CASTED]], align 4
15765 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
15766 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15767 // CHECK16-NEXT:    store i32 [[TMP20]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15768 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15769 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP21]])
15770 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15771 // CHECK16:       omp.inner.for.inc:
15772 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15773 // CHECK16-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15774 // CHECK16-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
15775 // CHECK16-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
15776 // CHECK16-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15777 // CHECK16-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15778 // CHECK16-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
15779 // CHECK16-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
15780 // CHECK16-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15781 // CHECK16-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15782 // CHECK16-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
15783 // CHECK16-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
15784 // CHECK16-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15785 // CHECK16-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15786 // CHECK16-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]]
15787 // CHECK16-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
15788 // CHECK16:       cond.true11:
15789 // CHECK16-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15790 // CHECK16-NEXT:    br label [[COND_END13:%.*]]
15791 // CHECK16:       cond.false12:
15792 // CHECK16-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15793 // CHECK16-NEXT:    br label [[COND_END13]]
15794 // CHECK16:       cond.end13:
15795 // CHECK16-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ]
15796 // CHECK16-NEXT:    store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
15797 // CHECK16-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15798 // CHECK16-NEXT:    store i32 [[TMP32]], i32* [[DOTOMP_IV]], align 4
15799 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15800 // CHECK16:       omp.inner.for.end:
15801 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15802 // CHECK16:       omp.loop.exit:
15803 // CHECK16-NEXT:    [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15804 // CHECK16-NEXT:    [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
15805 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
15806 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15807 // CHECK16:       omp.precond.end:
15808 // CHECK16-NEXT:    ret void
15809 //
15810 //
15811 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..6
15812 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15813 // CHECK16-NEXT:  entry:
15814 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15815 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15816 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15817 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15818 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15819 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15820 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15821 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15822 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15823 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15824 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15825 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
15826 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15827 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
15828 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
15829 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15830 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15831 // CHECK16-NEXT:    [[I4:%.*]] = alloca i32, align 4
15832 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15833 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15834 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15835 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15836 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15837 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15838 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15839 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15840 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15841 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15842 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
15843 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15844 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15845 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
15846 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15847 // CHECK16-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
15848 // CHECK16-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
15849 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15850 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15851 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
15852 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15853 // CHECK16:       omp.precond.then:
15854 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
15855 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15856 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
15857 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15858 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15859 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
15860 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
15861 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15862 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15863 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15864 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
15865 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15866 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15867 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15868 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
15869 // CHECK16-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15870 // CHECK16:       cond.true:
15871 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15872 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15873 // CHECK16:       cond.false:
15874 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15875 // CHECK16-NEXT:    br label [[COND_END]]
15876 // CHECK16:       cond.end:
15877 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
15878 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15879 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15880 // CHECK16-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
15881 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15882 // CHECK16:       omp.inner.for.cond:
15883 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15884 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15885 // CHECK16-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
15886 // CHECK16-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15887 // CHECK16:       omp.inner.for.body:
15888 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15889 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
15890 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15891 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
15892 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I4]], align 4
15893 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
15894 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
15895 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
15896 // CHECK16:       omp.body.continue:
15897 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15898 // CHECK16:       omp.inner.for.inc:
15899 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15900 // CHECK16-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
15901 // CHECK16-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
15902 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15903 // CHECK16:       omp.inner.for.end:
15904 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15905 // CHECK16:       omp.loop.exit:
15906 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15907 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
15908 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
15909 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15910 // CHECK16:       omp.precond.end:
15911 // CHECK16-NEXT:    ret void
15912 //
15913 //
15914 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
15915 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15916 // CHECK16-NEXT:  entry:
15917 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15918 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15919 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15920 // CHECK16-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
15921 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15922 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15923 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15924 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15925 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15926 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
15927 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
15928 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
15929 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
15930 // CHECK16-NEXT:    ret void
15931 //
15932 //
15933 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..8
15934 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15935 // CHECK16-NEXT:  entry:
15936 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15937 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15938 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15939 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15940 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15941 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15942 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15943 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15944 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15945 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15946 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15947 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15948 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15949 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15950 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15951 // CHECK16-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
15952 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15953 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15954 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15955 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15956 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15957 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15958 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15959 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
15960 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
15961 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15962 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
15963 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15964 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15965 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15966 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15967 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15968 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
15969 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15970 // CHECK16:       omp.precond.then:
15971 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15972 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15973 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
15974 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15975 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15976 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15977 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
15978 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15979 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15980 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15981 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
15982 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15983 // CHECK16:       cond.true:
15984 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15985 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15986 // CHECK16:       cond.false:
15987 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15988 // CHECK16-NEXT:    br label [[COND_END]]
15989 // CHECK16:       cond.end:
15990 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
15991 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15992 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15993 // CHECK16-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
15994 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15995 // CHECK16:       omp.inner.for.cond:
15996 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15997 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15998 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
15999 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16000 // CHECK16:       omp.inner.for.body:
16001 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16002 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16003 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
16004 // CHECK16-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
16005 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
16006 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
16007 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16008 // CHECK16:       omp.inner.for.inc:
16009 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16010 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16011 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
16012 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
16013 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16014 // CHECK16:       omp.inner.for.end:
16015 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16016 // CHECK16:       omp.loop.exit:
16017 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16018 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
16019 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
16020 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
16021 // CHECK16:       omp.precond.end:
16022 // CHECK16-NEXT:    ret void
16023 //
16024 //
16025 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..9
16026 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
16027 // CHECK16-NEXT:  entry:
16028 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16029 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16030 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16031 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16032 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
16033 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16034 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16035 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16036 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16037 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16038 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16039 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16040 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16041 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16042 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16043 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16044 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
16045 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16046 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16047 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16048 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16049 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
16050 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16051 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16052 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16053 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16054 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
16055 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
16056 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16057 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
16058 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16059 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
16060 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16061 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
16062 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16063 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
16064 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
16065 // CHECK16:       omp.precond.then:
16066 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16067 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16068 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
16069 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16070 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16071 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
16072 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
16073 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16074 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16075 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16076 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16077 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16078 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
16079 // CHECK16-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
16080 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
16081 // CHECK16:       omp.dispatch.cond:
16082 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16083 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
16084 // CHECK16-NEXT:    [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
16085 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
16086 // CHECK16-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16087 // CHECK16:       omp.dispatch.body:
16088 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16089 // CHECK16-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
16090 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16091 // CHECK16:       omp.inner.for.cond:
16092 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
16093 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
16094 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
16095 // CHECK16-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16096 // CHECK16:       omp.inner.for.body:
16097 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
16098 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
16099 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16100 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
16101 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
16102 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
16103 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
16104 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16105 // CHECK16:       omp.body.continue:
16106 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16107 // CHECK16:       omp.inner.for.inc:
16108 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
16109 // CHECK16-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1
16110 // CHECK16-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
16111 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
16112 // CHECK16:       omp.inner.for.end:
16113 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
16114 // CHECK16:       omp.dispatch.inc:
16115 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
16116 // CHECK16:       omp.dispatch.end:
16117 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
16118 // CHECK16:       omp.precond.end:
16119 // CHECK16-NEXT:    ret void
16120 //
16121 //
16122 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
16123 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16124 // CHECK16-NEXT:  entry:
16125 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
16126 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16127 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16128 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16129 // CHECK16-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
16130 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16131 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
16132 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16133 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16134 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16135 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16136 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16137 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
16138 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
16139 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
16140 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16141 // CHECK16-NEXT:    store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16142 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16143 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
16144 // CHECK16-NEXT:    ret void
16145 //
16146 //
16147 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..11
16148 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16149 // CHECK16-NEXT:  entry:
16150 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16151 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16152 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
16153 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16154 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16155 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16156 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16157 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16158 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16159 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
16160 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16161 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16162 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16163 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16164 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16165 // CHECK16-NEXT:    [[I4:%.*]] = alloca i32, align 4
16166 // CHECK16-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
16167 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16168 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16169 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16170 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
16171 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16172 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16173 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16174 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16175 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16176 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
16177 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16178 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16179 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
16180 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16181 // CHECK16-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
16182 // CHECK16-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
16183 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
16184 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16185 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
16186 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
16187 // CHECK16:       omp.precond.then:
16188 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16189 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16190 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
16191 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16192 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16193 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16194 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
16195 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16196 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16197 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16198 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
16199 // CHECK16-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16200 // CHECK16:       cond.true:
16201 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16202 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16203 // CHECK16:       cond.false:
16204 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16205 // CHECK16-NEXT:    br label [[COND_END]]
16206 // CHECK16:       cond.end:
16207 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
16208 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16209 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16210 // CHECK16-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
16211 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16212 // CHECK16:       omp.inner.for.cond:
16213 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16214 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16215 // CHECK16-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
16216 // CHECK16-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16217 // CHECK16:       omp.inner.for.body:
16218 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16219 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16220 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
16221 // CHECK16-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
16222 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
16223 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16224 // CHECK16-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16225 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16226 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP20]])
16227 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16228 // CHECK16:       omp.inner.for.inc:
16229 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16230 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16231 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
16232 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
16233 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16234 // CHECK16:       omp.inner.for.end:
16235 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16236 // CHECK16:       omp.loop.exit:
16237 // CHECK16-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16238 // CHECK16-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
16239 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
16240 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
16241 // CHECK16:       omp.precond.end:
16242 // CHECK16-NEXT:    ret void
16243 //
16244 //
16245 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..12
16246 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16247 // CHECK16-NEXT:  entry:
16248 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16249 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16250 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16251 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16252 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
16253 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16254 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16255 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16256 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16257 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16258 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16259 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
16260 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16261 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16262 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16263 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16264 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16265 // CHECK16-NEXT:    [[I4:%.*]] = alloca i32, align 4
16266 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16267 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16268 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16269 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16270 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
16271 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16272 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16273 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16274 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16275 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16276 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
16277 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16278 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16279 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
16280 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16281 // CHECK16-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
16282 // CHECK16-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
16283 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
16284 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16285 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
16286 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
16287 // CHECK16:       omp.precond.then:
16288 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16289 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16290 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
16291 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16292 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16293 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
16294 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
16295 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16296 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16297 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16298 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16299 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16300 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16301 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
16302 // CHECK16-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
16303 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
16304 // CHECK16:       omp.dispatch.cond:
16305 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16306 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
16307 // CHECK16-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
16308 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
16309 // CHECK16-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16310 // CHECK16:       omp.dispatch.body:
16311 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16312 // CHECK16-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
16313 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16314 // CHECK16:       omp.inner.for.cond:
16315 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
16316 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
16317 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
16318 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16319 // CHECK16:       omp.inner.for.body:
16320 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
16321 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
16322 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16323 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
16324 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
16325 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP20]]
16326 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
16327 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16328 // CHECK16:       omp.body.continue:
16329 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16330 // CHECK16:       omp.inner.for.inc:
16331 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
16332 // CHECK16-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
16333 // CHECK16-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
16334 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
16335 // CHECK16:       omp.inner.for.end:
16336 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
16337 // CHECK16:       omp.dispatch.inc:
16338 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
16339 // CHECK16:       omp.dispatch.end:
16340 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
16341 // CHECK16:       omp.precond.end:
16342 // CHECK16-NEXT:    ret void
16343 //
16344 //
16345 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
16346 // CHECK16-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
16347 // CHECK16-NEXT:  entry:
16348 // CHECK16-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
16349 // CHECK16-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
16350 // CHECK16-NEXT:    [[M:%.*]] = alloca i32, align 4
16351 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
16352 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
16353 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
16354 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16355 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
16356 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
16357 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
16358 // CHECK16-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
16359 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16360 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16361 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
16362 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
16363 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
16364 // CHECK16-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
16365 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
16366 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
16367 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
16368 // CHECK16-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
16369 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
16370 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i32, align 4
16371 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 4
16372 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 4
16373 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 4
16374 // CHECK16-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
16375 // CHECK16-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
16376 // CHECK16-NEXT:    store i32 10, i32* [[M]], align 4
16377 // CHECK16-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16378 // CHECK16-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
16379 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
16380 // CHECK16-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16381 // CHECK16-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
16382 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
16383 // CHECK16-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
16384 // CHECK16-NEXT:    store i8* null, i8** [[TMP4]], align 4
16385 // CHECK16-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16386 // CHECK16-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16387 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16388 // CHECK16-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16389 // CHECK16-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
16390 // CHECK16-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
16391 // CHECK16:       omp_offload.failed:
16392 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
16393 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT]]
16394 // CHECK16:       omp_offload.cont:
16395 // CHECK16-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
16396 // CHECK16-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
16397 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
16398 // CHECK16-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
16399 // CHECK16-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
16400 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
16401 // CHECK16-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
16402 // CHECK16-NEXT:    store i8* null, i8** [[TMP13]], align 4
16403 // CHECK16-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
16404 // CHECK16-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
16405 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16406 // CHECK16-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16407 // CHECK16-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
16408 // CHECK16-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
16409 // CHECK16:       omp_offload.failed5:
16410 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
16411 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
16412 // CHECK16:       omp_offload.cont6:
16413 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
16414 // CHECK16-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR_]], align 4
16415 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16416 // CHECK16-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16417 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16418 // CHECK16-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
16419 // CHECK16-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [10 x i32]**
16420 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP22]], align 4
16421 // CHECK16-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
16422 // CHECK16-NEXT:    [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [10 x i32]**
16423 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP24]], align 4
16424 // CHECK16-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
16425 // CHECK16-NEXT:    store i8* null, i8** [[TMP25]], align 4
16426 // CHECK16-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
16427 // CHECK16-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
16428 // CHECK16-NEXT:    store i32 [[TMP20]], i32* [[TMP27]], align 4
16429 // CHECK16-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
16430 // CHECK16-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
16431 // CHECK16-NEXT:    store i32 [[TMP20]], i32* [[TMP29]], align 4
16432 // CHECK16-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
16433 // CHECK16-NEXT:    store i8* null, i8** [[TMP30]], align 4
16434 // CHECK16-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
16435 // CHECK16-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
16436 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16437 // CHECK16-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, i32 2, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16438 // CHECK16-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
16439 // CHECK16-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
16440 // CHECK16:       omp_offload.failed11:
16441 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i32 [[TMP20]]) #[[ATTR3]]
16442 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
16443 // CHECK16:       omp_offload.cont12:
16444 // CHECK16-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
16445 // CHECK16-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to [10 x i32]**
16446 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP36]], align 4
16447 // CHECK16-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
16448 // CHECK16-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to [10 x i32]**
16449 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP38]], align 4
16450 // CHECK16-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
16451 // CHECK16-NEXT:    store i8* null, i8** [[TMP39]], align 4
16452 // CHECK16-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
16453 // CHECK16-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
16454 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16455 // CHECK16-NEXT:    [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, i32 1, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16456 // CHECK16-NEXT:    [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
16457 // CHECK16-NEXT:    br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
16458 // CHECK16:       omp_offload.failed17:
16459 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
16460 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
16461 // CHECK16:       omp_offload.cont18:
16462 // CHECK16-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M]], align 4
16463 // CHECK16-NEXT:    store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_19]], align 4
16464 // CHECK16-NEXT:    [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
16465 // CHECK16-NEXT:    store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
16466 // CHECK16-NEXT:    [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
16467 // CHECK16-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
16468 // CHECK16-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to [10 x i32]**
16469 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP48]], align 4
16470 // CHECK16-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
16471 // CHECK16-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to [10 x i32]**
16472 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP50]], align 4
16473 // CHECK16-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i32 0, i32 0
16474 // CHECK16-NEXT:    store i8* null, i8** [[TMP51]], align 4
16475 // CHECK16-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
16476 // CHECK16-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i32*
16477 // CHECK16-NEXT:    store i32 [[TMP46]], i32* [[TMP53]], align 4
16478 // CHECK16-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
16479 // CHECK16-NEXT:    [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i32*
16480 // CHECK16-NEXT:    store i32 [[TMP46]], i32* [[TMP55]], align 4
16481 // CHECK16-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i32 0, i32 1
16482 // CHECK16-NEXT:    store i8* null, i8** [[TMP56]], align 4
16483 // CHECK16-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
16484 // CHECK16-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
16485 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16486 // CHECK16-NEXT:    [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, i32 2, i8** [[TMP57]], i8** [[TMP58]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16487 // CHECK16-NEXT:    [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0
16488 // CHECK16-NEXT:    br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
16489 // CHECK16:       omp_offload.failed25:
16490 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i32 [[TMP46]]) #[[ATTR3]]
16491 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT26]]
16492 // CHECK16:       omp_offload.cont26:
16493 // CHECK16-NEXT:    ret i32 0
16494 //
16495 //
16496 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
16497 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16498 // CHECK16-NEXT:  entry:
16499 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16500 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16501 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16502 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
16503 // CHECK16-NEXT:    ret void
16504 //
16505 //
16506 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..14
16507 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16508 // CHECK16-NEXT:  entry:
16509 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16510 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16511 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16512 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16513 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16514 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16515 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16516 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16517 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16518 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16519 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16520 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16521 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16522 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16523 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16524 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16525 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16526 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16527 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16528 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16529 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16530 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16531 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
16532 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16533 // CHECK16:       cond.true:
16534 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16535 // CHECK16:       cond.false:
16536 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16537 // CHECK16-NEXT:    br label [[COND_END]]
16538 // CHECK16:       cond.end:
16539 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
16540 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16541 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16542 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
16543 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16544 // CHECK16:       omp.inner.for.cond:
16545 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16546 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16547 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
16548 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16549 // CHECK16:       omp.inner.for.body:
16550 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16551 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16552 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
16553 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16554 // CHECK16:       omp.inner.for.inc:
16555 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16556 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16557 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
16558 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
16559 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16560 // CHECK16:       omp.inner.for.end:
16561 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16562 // CHECK16:       omp.loop.exit:
16563 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
16564 // CHECK16-NEXT:    ret void
16565 //
16566 //
16567 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..15
16568 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16569 // CHECK16-NEXT:  entry:
16570 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16571 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16572 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16573 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16574 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16575 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16576 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16577 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16578 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16579 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16580 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16581 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16582 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16583 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16584 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16585 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16586 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16587 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16588 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16589 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
16590 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16591 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16592 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
16593 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
16594 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16595 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16596 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16597 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
16598 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16599 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16600 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
16601 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16602 // CHECK16:       cond.true:
16603 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16604 // CHECK16:       cond.false:
16605 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16606 // CHECK16-NEXT:    br label [[COND_END]]
16607 // CHECK16:       cond.end:
16608 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
16609 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16610 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16611 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
16612 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16613 // CHECK16:       omp.inner.for.cond:
16614 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16615 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16616 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
16617 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16618 // CHECK16:       omp.inner.for.body:
16619 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16620 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
16621 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16622 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
16623 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
16624 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
16625 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
16626 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16627 // CHECK16:       omp.body.continue:
16628 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16629 // CHECK16:       omp.inner.for.inc:
16630 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16631 // CHECK16-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
16632 // CHECK16-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
16633 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16634 // CHECK16:       omp.inner.for.end:
16635 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16636 // CHECK16:       omp.loop.exit:
16637 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
16638 // CHECK16-NEXT:    ret void
16639 //
16640 //
16641 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
16642 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16643 // CHECK16-NEXT:  entry:
16644 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16645 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16646 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16647 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
16648 // CHECK16-NEXT:    ret void
16649 //
16650 //
16651 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..17
16652 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16653 // CHECK16-NEXT:  entry:
16654 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16655 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16656 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16657 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16658 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16659 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16660 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16661 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16662 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16663 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16664 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16665 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16666 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16667 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16668 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16669 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16670 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16671 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16672 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16673 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16674 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16675 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16676 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
16677 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16678 // CHECK16:       cond.true:
16679 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16680 // CHECK16:       cond.false:
16681 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16682 // CHECK16-NEXT:    br label [[COND_END]]
16683 // CHECK16:       cond.end:
16684 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
16685 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16686 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16687 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
16688 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16689 // CHECK16:       omp.inner.for.cond:
16690 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16691 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16692 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
16693 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16694 // CHECK16:       omp.inner.for.body:
16695 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16696 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16697 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
16698 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16699 // CHECK16:       omp.inner.for.inc:
16700 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16701 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16702 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
16703 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
16704 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16705 // CHECK16:       omp.inner.for.end:
16706 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16707 // CHECK16:       omp.loop.exit:
16708 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
16709 // CHECK16-NEXT:    ret void
16710 //
16711 //
16712 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..18
16713 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16714 // CHECK16-NEXT:  entry:
16715 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16716 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16717 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16718 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16719 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16720 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16721 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16722 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16723 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16724 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16725 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16726 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16727 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16728 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16729 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16730 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16731 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16732 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16733 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16734 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
16735 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16736 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16737 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
16738 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
16739 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16740 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16741 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16742 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
16743 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16744 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16745 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
16746 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16747 // CHECK16:       cond.true:
16748 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16749 // CHECK16:       cond.false:
16750 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16751 // CHECK16-NEXT:    br label [[COND_END]]
16752 // CHECK16:       cond.end:
16753 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
16754 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16755 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16756 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
16757 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16758 // CHECK16:       omp.inner.for.cond:
16759 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16760 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16761 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
16762 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16763 // CHECK16:       omp.inner.for.body:
16764 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16765 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
16766 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16767 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
16768 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
16769 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
16770 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
16771 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16772 // CHECK16:       omp.body.continue:
16773 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16774 // CHECK16:       omp.inner.for.inc:
16775 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16776 // CHECK16-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
16777 // CHECK16-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
16778 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16779 // CHECK16:       omp.inner.for.end:
16780 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16781 // CHECK16:       omp.loop.exit:
16782 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
16783 // CHECK16-NEXT:    ret void
16784 //
16785 //
16786 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
16787 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16788 // CHECK16-NEXT:  entry:
16789 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16790 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16791 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16792 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16793 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16794 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16795 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16796 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16797 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16798 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
16799 // CHECK16-NEXT:    ret void
16800 //
16801 //
16802 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..21
16803 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16804 // CHECK16-NEXT:  entry:
16805 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16806 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16807 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16808 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16809 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16810 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16811 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16812 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16813 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16814 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16815 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16816 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16817 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16818 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16819 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16820 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16821 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16822 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16823 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16824 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16825 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16826 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16827 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16828 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16829 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16830 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
16831 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16832 // CHECK16:       cond.true:
16833 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16834 // CHECK16:       cond.false:
16835 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16836 // CHECK16-NEXT:    br label [[COND_END]]
16837 // CHECK16:       cond.end:
16838 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
16839 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16840 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16841 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
16842 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16843 // CHECK16:       omp.inner.for.cond:
16844 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16845 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16846 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
16847 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16848 // CHECK16:       omp.inner.for.body:
16849 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16850 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16851 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16852 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16853 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16854 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
16855 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16856 // CHECK16:       omp.inner.for.inc:
16857 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16858 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16859 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
16860 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
16861 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16862 // CHECK16:       omp.inner.for.end:
16863 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16864 // CHECK16:       omp.loop.exit:
16865 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
16866 // CHECK16-NEXT:    ret void
16867 //
16868 //
16869 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..22
16870 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16871 // CHECK16-NEXT:  entry:
16872 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16873 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16874 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16875 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16876 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16877 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16878 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16879 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16880 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16881 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16882 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16883 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16884 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16885 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16886 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16887 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16888 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16889 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16890 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16891 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16892 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16893 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
16894 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16895 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16896 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
16897 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
16898 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16899 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16900 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16901 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16902 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
16903 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
16904 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
16905 // CHECK16:       omp.dispatch.cond:
16906 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16907 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16908 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
16909 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16910 // CHECK16:       cond.true:
16911 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16912 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16913 // CHECK16:       cond.false:
16914 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16915 // CHECK16-NEXT:    br label [[COND_END]]
16916 // CHECK16:       cond.end:
16917 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
16918 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16919 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16920 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
16921 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16922 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16923 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
16924 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16925 // CHECK16:       omp.dispatch.body:
16926 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16927 // CHECK16:       omp.inner.for.cond:
16928 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16929 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16930 // CHECK16-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
16931 // CHECK16-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16932 // CHECK16:       omp.inner.for.body:
16933 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16934 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
16935 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16936 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
16937 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
16938 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
16939 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
16940 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16941 // CHECK16:       omp.body.continue:
16942 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16943 // CHECK16:       omp.inner.for.inc:
16944 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16945 // CHECK16-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
16946 // CHECK16-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
16947 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16948 // CHECK16:       omp.inner.for.end:
16949 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
16950 // CHECK16:       omp.dispatch.inc:
16951 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16952 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16953 // CHECK16-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
16954 // CHECK16-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
16955 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16956 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16957 // CHECK16-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
16958 // CHECK16-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
16959 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
16960 // CHECK16:       omp.dispatch.end:
16961 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
16962 // CHECK16-NEXT:    ret void
16963 //
16964 //
16965 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
16966 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16967 // CHECK16-NEXT:  entry:
16968 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16969 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16970 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16971 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
16972 // CHECK16-NEXT:    ret void
16973 //
16974 //
16975 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..25
16976 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16977 // CHECK16-NEXT:  entry:
16978 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16979 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16980 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16981 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16982 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16983 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16984 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16985 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16986 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16987 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16988 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16989 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16990 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16991 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16992 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16993 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16994 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16995 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16996 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16997 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16998 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16999 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17000 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
17001 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17002 // CHECK16:       cond.true:
17003 // CHECK16-NEXT:    br label [[COND_END:%.*]]
17004 // CHECK16:       cond.false:
17005 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17006 // CHECK16-NEXT:    br label [[COND_END]]
17007 // CHECK16:       cond.end:
17008 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
17009 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17010 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17011 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
17012 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17013 // CHECK16:       omp.inner.for.cond:
17014 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17015 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17016 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
17017 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17018 // CHECK16:       omp.inner.for.body:
17019 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17020 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17021 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
17022 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17023 // CHECK16:       omp.inner.for.inc:
17024 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17025 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17026 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
17027 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
17028 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
17029 // CHECK16:       omp.inner.for.end:
17030 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17031 // CHECK16:       omp.loop.exit:
17032 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
17033 // CHECK16-NEXT:    ret void
17034 //
17035 //
17036 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..26
17037 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
17038 // CHECK16-NEXT:  entry:
17039 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
17040 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
17041 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
17042 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
17043 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17044 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17045 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17046 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
17047 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
17048 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17049 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17050 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
17051 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
17052 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
17053 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17054 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17055 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17056 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17057 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
17058 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
17059 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17060 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17061 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
17062 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
17063 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17064 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17065 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17066 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17067 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17068 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
17069 // CHECK16-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
17070 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
17071 // CHECK16:       omp.dispatch.cond:
17072 // CHECK16-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
17073 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
17074 // CHECK16-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17075 // CHECK16:       omp.dispatch.body:
17076 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17077 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
17078 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17079 // CHECK16:       omp.inner.for.cond:
17080 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
17081 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
17082 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
17083 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17084 // CHECK16:       omp.inner.for.body:
17085 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
17086 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
17087 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17088 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
17089 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
17090 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
17091 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
17092 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
17093 // CHECK16:       omp.body.continue:
17094 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17095 // CHECK16:       omp.inner.for.inc:
17096 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
17097 // CHECK16-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
17098 // CHECK16-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
17099 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
17100 // CHECK16:       omp.inner.for.end:
17101 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
17102 // CHECK16:       omp.dispatch.inc:
17103 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
17104 // CHECK16:       omp.dispatch.end:
17105 // CHECK16-NEXT:    ret void
17106 //
17107 //
17108 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
17109 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
17110 // CHECK16-NEXT:  entry:
17111 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17112 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
17113 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
17114 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17115 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17116 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17117 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17118 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17119 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17120 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
17121 // CHECK16-NEXT:    ret void
17122 //
17123 //
17124 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..29
17125 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
17126 // CHECK16-NEXT:  entry:
17127 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
17128 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
17129 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17130 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
17131 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17132 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17133 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
17134 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
17135 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17136 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17137 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
17138 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
17139 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
17140 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
17141 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17142 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17143 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17144 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
17145 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
17146 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17147 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17148 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17149 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
17150 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17151 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17152 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
17153 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17154 // CHECK16:       cond.true:
17155 // CHECK16-NEXT:    br label [[COND_END:%.*]]
17156 // CHECK16:       cond.false:
17157 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17158 // CHECK16-NEXT:    br label [[COND_END]]
17159 // CHECK16:       cond.end:
17160 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
17161 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17162 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17163 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
17164 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17165 // CHECK16:       omp.inner.for.cond:
17166 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17167 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17168 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
17169 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17170 // CHECK16:       omp.inner.for.body:
17171 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17172 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17173 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17174 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17175 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17176 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
17177 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17178 // CHECK16:       omp.inner.for.inc:
17179 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17180 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17181 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
17182 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
17183 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
17184 // CHECK16:       omp.inner.for.end:
17185 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17186 // CHECK16:       omp.loop.exit:
17187 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
17188 // CHECK16-NEXT:    ret void
17189 //
17190 //
17191 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..30
17192 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
17193 // CHECK16-NEXT:  entry:
17194 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
17195 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
17196 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
17197 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
17198 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17199 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
17200 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17201 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17202 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
17203 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
17204 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17205 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17206 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
17207 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
17208 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
17209 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17210 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17211 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17212 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17213 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17214 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
17215 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
17216 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17217 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17218 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
17219 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
17220 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17221 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17222 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17223 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17224 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17225 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17226 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
17227 // CHECK16-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
17228 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
17229 // CHECK16:       omp.dispatch.cond:
17230 // CHECK16-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
17231 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
17232 // CHECK16-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17233 // CHECK16:       omp.dispatch.body:
17234 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17235 // CHECK16-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
17236 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17237 // CHECK16:       omp.inner.for.cond:
17238 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
17239 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
17240 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
17241 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17242 // CHECK16:       omp.inner.for.body:
17243 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
17244 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
17245 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17246 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
17247 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
17248 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
17249 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
17250 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
17251 // CHECK16:       omp.body.continue:
17252 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17253 // CHECK16:       omp.inner.for.inc:
17254 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
17255 // CHECK16-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
17256 // CHECK16-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
17257 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
17258 // CHECK16:       omp.inner.for.end:
17259 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
17260 // CHECK16:       omp.dispatch.inc:
17261 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
17262 // CHECK16:       omp.dispatch.end:
17263 // CHECK16-NEXT:    ret void
17264 //
17265 //
17266 // CHECK16-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
17267 // CHECK16-SAME: () #[[ATTR5:[0-9]+]] {
17268 // CHECK16-NEXT:  entry:
17269 // CHECK16-NEXT:    call void @__tgt_register_requires(i64 1)
17270 // CHECK16-NEXT:    ret void
17271 //
17272 //
17273 // CHECK17-LABEL: define {{[^@]+}}@main
17274 // CHECK17-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
17275 // CHECK17-NEXT:  entry:
17276 // CHECK17-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
17277 // CHECK17-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
17278 // CHECK17-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
17279 // CHECK17-NEXT:    [[N:%.*]] = alloca i32, align 4
17280 // CHECK17-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
17281 // CHECK17-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
17282 // CHECK17-NEXT:    [[M:%.*]] = alloca i32, align 4
17283 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
17284 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
17285 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
17286 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
17287 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
17288 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17289 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17290 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17291 // CHECK17-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
17292 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
17293 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
17294 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
17295 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
17296 // CHECK17-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
17297 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
17298 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
17299 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
17300 // CHECK17-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
17301 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
17302 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8
17303 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8
17304 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8
17305 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8
17306 // CHECK17-NEXT:    [[_TMP26:%.*]] = alloca i32, align 4
17307 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
17308 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
17309 // CHECK17-NEXT:    [[N_CASTED35:%.*]] = alloca i64, align 8
17310 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS37:%.*]] = alloca [3 x i8*], align 8
17311 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS38:%.*]] = alloca [3 x i8*], align 8
17312 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS39:%.*]] = alloca [3 x i8*], align 8
17313 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES40:%.*]] = alloca [3 x i64], align 8
17314 // CHECK17-NEXT:    [[_TMP41:%.*]] = alloca i32, align 4
17315 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
17316 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_43:%.*]] = alloca i32, align 4
17317 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_50:%.*]] = alloca i32, align 4
17318 // CHECK17-NEXT:    [[N_CASTED51:%.*]] = alloca i64, align 8
17319 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED53:%.*]] = alloca i64, align 8
17320 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS55:%.*]] = alloca [4 x i8*], align 8
17321 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS56:%.*]] = alloca [4 x i8*], align 8
17322 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS57:%.*]] = alloca [4 x i8*], align 8
17323 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES58:%.*]] = alloca [4 x i64], align 8
17324 // CHECK17-NEXT:    [[_TMP59:%.*]] = alloca i32, align 4
17325 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_60:%.*]] = alloca i32, align 4
17326 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_61:%.*]] = alloca i32, align 4
17327 // CHECK17-NEXT:    store i32 0, i32* [[RETVAL]], align 4
17328 // CHECK17-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
17329 // CHECK17-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
17330 // CHECK17-NEXT:    store i32 100, i32* [[N]], align 4
17331 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
17332 // CHECK17-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
17333 // CHECK17-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
17334 // CHECK17-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
17335 // CHECK17-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
17336 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
17337 // CHECK17-NEXT:    store i32 10, i32* [[M]], align 4
17338 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
17339 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
17340 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
17341 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
17342 // CHECK17-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
17343 // CHECK17-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
17344 // CHECK17-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
17345 // CHECK17-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
17346 // CHECK17-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
17347 // CHECK17-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
17348 // CHECK17-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
17349 // CHECK17-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
17350 // CHECK17-NEXT:    store i64 4, i64* [[TMP10]], align 8
17351 // CHECK17-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
17352 // CHECK17-NEXT:    store i8* null, i8** [[TMP11]], align 8
17353 // CHECK17-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
17354 // CHECK17-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
17355 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
17356 // CHECK17-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
17357 // CHECK17-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
17358 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
17359 // CHECK17-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
17360 // CHECK17-NEXT:    store i64 8, i64* [[TMP16]], align 8
17361 // CHECK17-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
17362 // CHECK17-NEXT:    store i8* null, i8** [[TMP17]], align 8
17363 // CHECK17-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
17364 // CHECK17-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
17365 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
17366 // CHECK17-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
17367 // CHECK17-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
17368 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
17369 // CHECK17-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
17370 // CHECK17-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
17371 // CHECK17-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
17372 // CHECK17-NEXT:    store i8* null, i8** [[TMP23]], align 8
17373 // CHECK17-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
17374 // CHECK17-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
17375 // CHECK17-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
17376 // CHECK17-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
17377 // CHECK17-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
17378 // CHECK17-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17379 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
17380 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17381 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17382 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17383 // CHECK17-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17384 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
17385 // CHECK17-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
17386 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
17387 // CHECK17-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17388 // CHECK17-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
17389 // CHECK17-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
17390 // CHECK17:       omp_offload.failed:
17391 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
17392 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
17393 // CHECK17:       omp_offload.cont:
17394 // CHECK17-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
17395 // CHECK17-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
17396 // CHECK17-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
17397 // CHECK17-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
17398 // CHECK17-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
17399 // CHECK17-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
17400 // CHECK17-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
17401 // CHECK17-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
17402 // CHECK17-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
17403 // CHECK17-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
17404 // CHECK17-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
17405 // CHECK17-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
17406 // CHECK17-NEXT:    store i64 4, i64* [[TMP40]], align 8
17407 // CHECK17-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
17408 // CHECK17-NEXT:    store i8* null, i8** [[TMP41]], align 8
17409 // CHECK17-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
17410 // CHECK17-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
17411 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
17412 // CHECK17-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
17413 // CHECK17-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
17414 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
17415 // CHECK17-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
17416 // CHECK17-NEXT:    store i64 8, i64* [[TMP46]], align 8
17417 // CHECK17-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
17418 // CHECK17-NEXT:    store i8* null, i8** [[TMP47]], align 8
17419 // CHECK17-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
17420 // CHECK17-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
17421 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
17422 // CHECK17-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
17423 // CHECK17-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
17424 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
17425 // CHECK17-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
17426 // CHECK17-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
17427 // CHECK17-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
17428 // CHECK17-NEXT:    store i8* null, i8** [[TMP53]], align 8
17429 // CHECK17-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
17430 // CHECK17-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
17431 // CHECK17-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
17432 // CHECK17-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
17433 // CHECK17-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
17434 // CHECK17-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
17435 // CHECK17-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
17436 // CHECK17-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
17437 // CHECK17-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
17438 // CHECK17-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
17439 // CHECK17-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
17440 // CHECK17-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
17441 // CHECK17-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
17442 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
17443 // CHECK17-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17444 // CHECK17-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
17445 // CHECK17-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
17446 // CHECK17:       omp_offload.failed16:
17447 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
17448 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
17449 // CHECK17:       omp_offload.cont17:
17450 // CHECK17-NEXT:    [[TMP63:%.*]] = load i32, i32* [[M]], align 4
17451 // CHECK17-NEXT:    store i32 [[TMP63]], i32* [[DOTCAPTURE_EXPR_18]], align 4
17452 // CHECK17-NEXT:    [[TMP64:%.*]] = load i32, i32* [[N]], align 4
17453 // CHECK17-NEXT:    [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
17454 // CHECK17-NEXT:    store i32 [[TMP64]], i32* [[CONV20]], align 4
17455 // CHECK17-NEXT:    [[TMP65:%.*]] = load i64, i64* [[N_CASTED19]], align 8
17456 // CHECK17-NEXT:    [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
17457 // CHECK17-NEXT:    [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
17458 // CHECK17-NEXT:    store i32 [[TMP66]], i32* [[CONV21]], align 4
17459 // CHECK17-NEXT:    [[TMP67:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
17460 // CHECK17-NEXT:    [[TMP68:%.*]] = mul nuw i64 [[TMP1]], 4
17461 // CHECK17-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
17462 // CHECK17-NEXT:    [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64*
17463 // CHECK17-NEXT:    store i64 [[TMP65]], i64* [[TMP70]], align 8
17464 // CHECK17-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
17465 // CHECK17-NEXT:    [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i64*
17466 // CHECK17-NEXT:    store i64 [[TMP65]], i64* [[TMP72]], align 8
17467 // CHECK17-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
17468 // CHECK17-NEXT:    store i64 4, i64* [[TMP73]], align 8
17469 // CHECK17-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
17470 // CHECK17-NEXT:    store i8* null, i8** [[TMP74]], align 8
17471 // CHECK17-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
17472 // CHECK17-NEXT:    [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64*
17473 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP76]], align 8
17474 // CHECK17-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
17475 // CHECK17-NEXT:    [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64*
17476 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP78]], align 8
17477 // CHECK17-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 1
17478 // CHECK17-NEXT:    store i64 8, i64* [[TMP79]], align 8
17479 // CHECK17-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
17480 // CHECK17-NEXT:    store i8* null, i8** [[TMP80]], align 8
17481 // CHECK17-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2
17482 // CHECK17-NEXT:    [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32**
17483 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP82]], align 8
17484 // CHECK17-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2
17485 // CHECK17-NEXT:    [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
17486 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP84]], align 8
17487 // CHECK17-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2
17488 // CHECK17-NEXT:    store i64 [[TMP68]], i64* [[TMP85]], align 8
17489 // CHECK17-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2
17490 // CHECK17-NEXT:    store i8* null, i8** [[TMP86]], align 8
17491 // CHECK17-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3
17492 // CHECK17-NEXT:    [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64*
17493 // CHECK17-NEXT:    store i64 [[TMP67]], i64* [[TMP88]], align 8
17494 // CHECK17-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3
17495 // CHECK17-NEXT:    [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i64*
17496 // CHECK17-NEXT:    store i64 [[TMP67]], i64* [[TMP90]], align 8
17497 // CHECK17-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 3
17498 // CHECK17-NEXT:    store i64 4, i64* [[TMP91]], align 8
17499 // CHECK17-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3
17500 // CHECK17-NEXT:    store i8* null, i8** [[TMP92]], align 8
17501 // CHECK17-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
17502 // CHECK17-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
17503 // CHECK17-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
17504 // CHECK17-NEXT:    [[TMP96:%.*]] = load i32, i32* [[N]], align 4
17505 // CHECK17-NEXT:    store i32 [[TMP96]], i32* [[DOTCAPTURE_EXPR_27]], align 4
17506 // CHECK17-NEXT:    [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
17507 // CHECK17-NEXT:    [[SUB29:%.*]] = sub nsw i32 [[TMP97]], 0
17508 // CHECK17-NEXT:    [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
17509 // CHECK17-NEXT:    [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1
17510 // CHECK17-NEXT:    store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4
17511 // CHECK17-NEXT:    [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
17512 // CHECK17-NEXT:    [[ADD32:%.*]] = add nsw i32 [[TMP98]], 1
17513 // CHECK17-NEXT:    [[TMP99:%.*]] = zext i32 [[ADD32]] to i64
17514 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP99]])
17515 // CHECK17-NEXT:    [[TMP100:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, i32 4, i8** [[TMP93]], i8** [[TMP94]], i64* [[TMP95]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17516 // CHECK17-NEXT:    [[TMP101:%.*]] = icmp ne i32 [[TMP100]], 0
17517 // CHECK17-NEXT:    br i1 [[TMP101]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]]
17518 // CHECK17:       omp_offload.failed33:
17519 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP65]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP67]]) #[[ATTR3]]
17520 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT34]]
17521 // CHECK17:       omp_offload.cont34:
17522 // CHECK17-NEXT:    [[TMP102:%.*]] = load i32, i32* [[N]], align 4
17523 // CHECK17-NEXT:    [[CONV36:%.*]] = bitcast i64* [[N_CASTED35]] to i32*
17524 // CHECK17-NEXT:    store i32 [[TMP102]], i32* [[CONV36]], align 4
17525 // CHECK17-NEXT:    [[TMP103:%.*]] = load i64, i64* [[N_CASTED35]], align 8
17526 // CHECK17-NEXT:    [[TMP104:%.*]] = mul nuw i64 [[TMP1]], 4
17527 // CHECK17-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 0
17528 // CHECK17-NEXT:    [[TMP106:%.*]] = bitcast i8** [[TMP105]] to i64*
17529 // CHECK17-NEXT:    store i64 [[TMP103]], i64* [[TMP106]], align 8
17530 // CHECK17-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 0
17531 // CHECK17-NEXT:    [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i64*
17532 // CHECK17-NEXT:    store i64 [[TMP103]], i64* [[TMP108]], align 8
17533 // CHECK17-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 0
17534 // CHECK17-NEXT:    store i64 4, i64* [[TMP109]], align 8
17535 // CHECK17-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS39]], i64 0, i64 0
17536 // CHECK17-NEXT:    store i8* null, i8** [[TMP110]], align 8
17537 // CHECK17-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 1
17538 // CHECK17-NEXT:    [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64*
17539 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP112]], align 8
17540 // CHECK17-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 1
17541 // CHECK17-NEXT:    [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i64*
17542 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP114]], align 8
17543 // CHECK17-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 1
17544 // CHECK17-NEXT:    store i64 8, i64* [[TMP115]], align 8
17545 // CHECK17-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS39]], i64 0, i64 1
17546 // CHECK17-NEXT:    store i8* null, i8** [[TMP116]], align 8
17547 // CHECK17-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 2
17548 // CHECK17-NEXT:    [[TMP118:%.*]] = bitcast i8** [[TMP117]] to i32**
17549 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP118]], align 8
17550 // CHECK17-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 2
17551 // CHECK17-NEXT:    [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
17552 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP120]], align 8
17553 // CHECK17-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 2
17554 // CHECK17-NEXT:    store i64 [[TMP104]], i64* [[TMP121]], align 8
17555 // CHECK17-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS39]], i64 0, i64 2
17556 // CHECK17-NEXT:    store i8* null, i8** [[TMP122]], align 8
17557 // CHECK17-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 0
17558 // CHECK17-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 0
17559 // CHECK17-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 0
17560 // CHECK17-NEXT:    [[TMP126:%.*]] = load i32, i32* [[N]], align 4
17561 // CHECK17-NEXT:    store i32 [[TMP126]], i32* [[DOTCAPTURE_EXPR_42]], align 4
17562 // CHECK17-NEXT:    [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
17563 // CHECK17-NEXT:    [[SUB44:%.*]] = sub nsw i32 [[TMP127]], 0
17564 // CHECK17-NEXT:    [[DIV45:%.*]] = sdiv i32 [[SUB44]], 1
17565 // CHECK17-NEXT:    [[SUB46:%.*]] = sub nsw i32 [[DIV45]], 1
17566 // CHECK17-NEXT:    store i32 [[SUB46]], i32* [[DOTCAPTURE_EXPR_43]], align 4
17567 // CHECK17-NEXT:    [[TMP128:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_43]], align 4
17568 // CHECK17-NEXT:    [[ADD47:%.*]] = add nsw i32 [[TMP128]], 1
17569 // CHECK17-NEXT:    [[TMP129:%.*]] = zext i32 [[ADD47]] to i64
17570 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP129]])
17571 // CHECK17-NEXT:    [[TMP130:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, i32 3, i8** [[TMP123]], i8** [[TMP124]], i64* [[TMP125]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17572 // CHECK17-NEXT:    [[TMP131:%.*]] = icmp ne i32 [[TMP130]], 0
17573 // CHECK17-NEXT:    br i1 [[TMP131]], label [[OMP_OFFLOAD_FAILED48:%.*]], label [[OMP_OFFLOAD_CONT49:%.*]]
17574 // CHECK17:       omp_offload.failed48:
17575 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP103]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
17576 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT49]]
17577 // CHECK17:       omp_offload.cont49:
17578 // CHECK17-NEXT:    [[TMP132:%.*]] = load i32, i32* [[M]], align 4
17579 // CHECK17-NEXT:    store i32 [[TMP132]], i32* [[DOTCAPTURE_EXPR_50]], align 4
17580 // CHECK17-NEXT:    [[TMP133:%.*]] = load i32, i32* [[N]], align 4
17581 // CHECK17-NEXT:    [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
17582 // CHECK17-NEXT:    store i32 [[TMP133]], i32* [[CONV52]], align 4
17583 // CHECK17-NEXT:    [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
17584 // CHECK17-NEXT:    [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_50]], align 4
17585 // CHECK17-NEXT:    [[CONV54:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED53]] to i32*
17586 // CHECK17-NEXT:    store i32 [[TMP135]], i32* [[CONV54]], align 4
17587 // CHECK17-NEXT:    [[TMP136:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED53]], align 8
17588 // CHECK17-NEXT:    [[TMP137:%.*]] = mul nuw i64 [[TMP1]], 4
17589 // CHECK17-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 0
17590 // CHECK17-NEXT:    [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
17591 // CHECK17-NEXT:    store i64 [[TMP134]], i64* [[TMP139]], align 8
17592 // CHECK17-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 0
17593 // CHECK17-NEXT:    [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i64*
17594 // CHECK17-NEXT:    store i64 [[TMP134]], i64* [[TMP141]], align 8
17595 // CHECK17-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 0
17596 // CHECK17-NEXT:    store i64 4, i64* [[TMP142]], align 8
17597 // CHECK17-NEXT:    [[TMP143:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 0
17598 // CHECK17-NEXT:    store i8* null, i8** [[TMP143]], align 8
17599 // CHECK17-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 1
17600 // CHECK17-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
17601 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP145]], align 8
17602 // CHECK17-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 1
17603 // CHECK17-NEXT:    [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64*
17604 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP147]], align 8
17605 // CHECK17-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 1
17606 // CHECK17-NEXT:    store i64 8, i64* [[TMP148]], align 8
17607 // CHECK17-NEXT:    [[TMP149:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 1
17608 // CHECK17-NEXT:    store i8* null, i8** [[TMP149]], align 8
17609 // CHECK17-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 2
17610 // CHECK17-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i32**
17611 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP151]], align 8
17612 // CHECK17-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 2
17613 // CHECK17-NEXT:    [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32**
17614 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP153]], align 8
17615 // CHECK17-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 2
17616 // CHECK17-NEXT:    store i64 [[TMP137]], i64* [[TMP154]], align 8
17617 // CHECK17-NEXT:    [[TMP155:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 2
17618 // CHECK17-NEXT:    store i8* null, i8** [[TMP155]], align 8
17619 // CHECK17-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 3
17620 // CHECK17-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i64*
17621 // CHECK17-NEXT:    store i64 [[TMP136]], i64* [[TMP157]], align 8
17622 // CHECK17-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 3
17623 // CHECK17-NEXT:    [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i64*
17624 // CHECK17-NEXT:    store i64 [[TMP136]], i64* [[TMP159]], align 8
17625 // CHECK17-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 3
17626 // CHECK17-NEXT:    store i64 4, i64* [[TMP160]], align 8
17627 // CHECK17-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 3
17628 // CHECK17-NEXT:    store i8* null, i8** [[TMP161]], align 8
17629 // CHECK17-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 0
17630 // CHECK17-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 0
17631 // CHECK17-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 0
17632 // CHECK17-NEXT:    [[TMP165:%.*]] = load i32, i32* [[N]], align 4
17633 // CHECK17-NEXT:    store i32 [[TMP165]], i32* [[DOTCAPTURE_EXPR_60]], align 4
17634 // CHECK17-NEXT:    [[TMP166:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_60]], align 4
17635 // CHECK17-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[TMP166]], 0
17636 // CHECK17-NEXT:    [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1
17637 // CHECK17-NEXT:    [[SUB64:%.*]] = sub nsw i32 [[DIV63]], 1
17638 // CHECK17-NEXT:    store i32 [[SUB64]], i32* [[DOTCAPTURE_EXPR_61]], align 4
17639 // CHECK17-NEXT:    [[TMP167:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_61]], align 4
17640 // CHECK17-NEXT:    [[ADD65:%.*]] = add nsw i32 [[TMP167]], 1
17641 // CHECK17-NEXT:    [[TMP168:%.*]] = zext i32 [[ADD65]] to i64
17642 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP168]])
17643 // CHECK17-NEXT:    [[TMP169:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, i32 4, i8** [[TMP162]], i8** [[TMP163]], i64* [[TMP164]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17644 // CHECK17-NEXT:    [[TMP170:%.*]] = icmp ne i32 [[TMP169]], 0
17645 // CHECK17-NEXT:    br i1 [[TMP170]], label [[OMP_OFFLOAD_FAILED66:%.*]], label [[OMP_OFFLOAD_CONT67:%.*]]
17646 // CHECK17:       omp_offload.failed66:
17647 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP136]]) #[[ATTR3]]
17648 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT67]]
17649 // CHECK17:       omp_offload.cont67:
17650 // CHECK17-NEXT:    [[TMP171:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
17651 // CHECK17-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP171]])
17652 // CHECK17-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
17653 // CHECK17-NEXT:    [[TMP172:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
17654 // CHECK17-NEXT:    call void @llvm.stackrestore(i8* [[TMP172]])
17655 // CHECK17-NEXT:    [[TMP173:%.*]] = load i32, i32* [[RETVAL]], align 4
17656 // CHECK17-NEXT:    ret i32 [[TMP173]]
17657 //
17658 //
17659 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
17660 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
17661 // CHECK17-NEXT:  entry:
17662 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
17663 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17664 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17665 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
17666 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
17667 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17668 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17669 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17670 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17671 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17672 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
17673 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
17674 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
17675 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
17676 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
17677 // CHECK17-NEXT:    ret void
17678 //
17679 //
17680 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
17681 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17682 // CHECK17-NEXT:  entry:
17683 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17684 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17685 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
17686 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17687 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17688 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17689 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17690 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17691 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17692 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
17693 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
17694 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
17695 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17696 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17697 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
17698 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
17699 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17700 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17701 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
17702 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17703 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17704 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17705 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17706 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17707 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
17708 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
17709 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17710 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
17711 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17712 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17713 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17714 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
17715 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17716 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
17717 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17718 // CHECK17:       omp.precond.then:
17719 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
17720 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17721 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
17722 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17723 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17724 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17725 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
17726 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17727 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17728 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17729 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
17730 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17731 // CHECK17:       cond.true:
17732 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17733 // CHECK17-NEXT:    br label [[COND_END:%.*]]
17734 // CHECK17:       cond.false:
17735 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17736 // CHECK17-NEXT:    br label [[COND_END]]
17737 // CHECK17:       cond.end:
17738 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
17739 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17740 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17741 // CHECK17-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
17742 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17743 // CHECK17:       omp.inner.for.cond:
17744 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17745 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17746 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
17747 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17748 // CHECK17:       omp.inner.for.body:
17749 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17750 // CHECK17-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
17751 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17752 // CHECK17-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
17753 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
17754 // CHECK17-NEXT:    [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
17755 // CHECK17-NEXT:    store i32 [[TMP19]], i32* [[CONV6]], align 4
17756 // CHECK17-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
17757 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
17758 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17759 // CHECK17:       omp.inner.for.inc:
17760 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17761 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17762 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
17763 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
17764 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
17765 // CHECK17:       omp.inner.for.end:
17766 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17767 // CHECK17:       omp.loop.exit:
17768 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17769 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
17770 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
17771 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
17772 // CHECK17:       omp.precond.end:
17773 // CHECK17-NEXT:    ret void
17774 //
17775 //
17776 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1
17777 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17778 // CHECK17-NEXT:  entry:
17779 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17780 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17781 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
17782 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
17783 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
17784 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17785 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17786 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17787 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17788 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17789 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17790 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
17791 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
17792 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
17793 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17794 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17795 // CHECK17-NEXT:    [[I5:%.*]] = alloca i32, align 4
17796 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17797 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17798 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
17799 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
17800 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
17801 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17802 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17803 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17804 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17805 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17806 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
17807 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
17808 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17809 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
17810 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17811 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17812 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17813 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
17814 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17815 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
17816 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17817 // CHECK17:       omp.precond.then:
17818 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
17819 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17820 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
17821 // CHECK17-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
17822 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
17823 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
17824 // CHECK17-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
17825 // CHECK17-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
17826 // CHECK17-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
17827 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17828 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17829 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17830 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
17831 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17832 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17833 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17834 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
17835 // CHECK17-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17836 // CHECK17:       cond.true:
17837 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17838 // CHECK17-NEXT:    br label [[COND_END:%.*]]
17839 // CHECK17:       cond.false:
17840 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17841 // CHECK17-NEXT:    br label [[COND_END]]
17842 // CHECK17:       cond.end:
17843 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
17844 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17845 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17846 // CHECK17-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
17847 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17848 // CHECK17:       omp.inner.for.cond:
17849 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17850 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17851 // CHECK17-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
17852 // CHECK17-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17853 // CHECK17:       omp.inner.for.body:
17854 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17855 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
17856 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17857 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I5]], align 4
17858 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
17859 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
17860 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
17861 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
17862 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
17863 // CHECK17:       omp.body.continue:
17864 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17865 // CHECK17:       omp.inner.for.inc:
17866 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17867 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
17868 // CHECK17-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
17869 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
17870 // CHECK17:       omp.inner.for.end:
17871 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17872 // CHECK17:       omp.loop.exit:
17873 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17874 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
17875 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
17876 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
17877 // CHECK17:       omp.precond.end:
17878 // CHECK17-NEXT:    ret void
17879 //
17880 //
17881 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
17882 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17883 // CHECK17-NEXT:  entry:
17884 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
17885 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17886 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17887 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
17888 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
17889 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17890 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17891 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17892 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17893 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17894 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
17895 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
17896 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
17897 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
17898 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
17899 // CHECK17-NEXT:    ret void
17900 //
17901 //
17902 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2
17903 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17904 // CHECK17-NEXT:  entry:
17905 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17906 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17907 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
17908 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17909 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17910 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17911 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17912 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17913 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17914 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
17915 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
17916 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
17917 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17918 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17919 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
17920 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
17921 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17922 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17923 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
17924 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17925 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17926 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17927 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17928 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17929 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
17930 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
17931 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17932 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
17933 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17934 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17935 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17936 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
17937 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17938 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
17939 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17940 // CHECK17:       omp.precond.then:
17941 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
17942 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17943 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
17944 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17945 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17946 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17947 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
17948 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17949 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17950 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17951 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
17952 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17953 // CHECK17:       cond.true:
17954 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17955 // CHECK17-NEXT:    br label [[COND_END:%.*]]
17956 // CHECK17:       cond.false:
17957 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17958 // CHECK17-NEXT:    br label [[COND_END]]
17959 // CHECK17:       cond.end:
17960 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
17961 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17962 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17963 // CHECK17-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
17964 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17965 // CHECK17:       omp.inner.for.cond:
17966 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17967 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17968 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
17969 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17970 // CHECK17:       omp.inner.for.body:
17971 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17972 // CHECK17-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
17973 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17974 // CHECK17-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
17975 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
17976 // CHECK17-NEXT:    [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
17977 // CHECK17-NEXT:    store i32 [[TMP19]], i32* [[CONV6]], align 4
17978 // CHECK17-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
17979 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
17980 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17981 // CHECK17:       omp.inner.for.inc:
17982 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17983 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17984 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
17985 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
17986 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
17987 // CHECK17:       omp.inner.for.end:
17988 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17989 // CHECK17:       omp.loop.exit:
17990 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17991 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
17992 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
17993 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
17994 // CHECK17:       omp.precond.end:
17995 // CHECK17-NEXT:    ret void
17996 //
17997 //
17998 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3
17999 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18000 // CHECK17-NEXT:  entry:
18001 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18002 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18003 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18004 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18005 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18006 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18007 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18008 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18009 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18010 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18011 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18012 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18013 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
18014 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
18015 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18016 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18017 // CHECK17-NEXT:    [[I5:%.*]] = alloca i32, align 4
18018 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18019 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18020 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18021 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18022 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18023 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18024 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18025 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18026 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18027 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18028 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18029 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
18030 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18031 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
18032 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18033 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
18034 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18035 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18036 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18037 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
18038 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18039 // CHECK17:       omp.precond.then:
18040 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
18041 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18042 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
18043 // CHECK17-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18044 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
18045 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18046 // CHECK17-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
18047 // CHECK17-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
18048 // CHECK17-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
18049 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18050 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18051 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18052 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
18053 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18054 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18055 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18056 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
18057 // CHECK17-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18058 // CHECK17:       cond.true:
18059 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18060 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18061 // CHECK17:       cond.false:
18062 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18063 // CHECK17-NEXT:    br label [[COND_END]]
18064 // CHECK17:       cond.end:
18065 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
18066 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18067 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18068 // CHECK17-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
18069 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18070 // CHECK17:       omp.inner.for.cond:
18071 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18072 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18073 // CHECK17-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
18074 // CHECK17-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18075 // CHECK17:       omp.inner.for.body:
18076 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18077 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
18078 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18079 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I5]], align 4
18080 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
18081 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
18082 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
18083 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
18084 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
18085 // CHECK17:       omp.body.continue:
18086 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18087 // CHECK17:       omp.inner.for.inc:
18088 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18089 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
18090 // CHECK17-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
18091 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18092 // CHECK17:       omp.inner.for.end:
18093 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18094 // CHECK17:       omp.loop.exit:
18095 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18096 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
18097 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
18098 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18099 // CHECK17:       omp.precond.end:
18100 // CHECK17-NEXT:    ret void
18101 //
18102 //
18103 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
18104 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18105 // CHECK17-NEXT:  entry:
18106 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18107 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18108 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18109 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18110 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
18111 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18112 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18113 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18114 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18115 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18116 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18117 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18118 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18119 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18120 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18121 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
18122 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
18123 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
18124 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
18125 // CHECK17-NEXT:    [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18126 // CHECK17-NEXT:    store i32 [[TMP4]], i32* [[CONV3]], align 4
18127 // CHECK17-NEXT:    [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18128 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
18129 // CHECK17-NEXT:    ret void
18130 //
18131 //
18132 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..5
18133 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18134 // CHECK17-NEXT:  entry:
18135 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18136 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18137 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18138 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18139 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18140 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18141 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18142 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18143 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
18144 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
18145 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18146 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18147 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18148 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18149 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18150 // CHECK17-NEXT:    [[I5:%.*]] = alloca i32, align 4
18151 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
18152 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18153 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18154 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18155 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18156 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18157 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18158 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18159 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18160 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18161 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18162 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18163 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18164 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
18165 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18166 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
18167 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18168 // CHECK17-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
18169 // CHECK17-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
18170 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18171 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18172 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
18173 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18174 // CHECK17:       omp.precond.then:
18175 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18176 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
18177 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
18178 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18179 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18180 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
18181 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18182 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
18183 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
18184 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18185 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
18186 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
18187 // CHECK17-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18188 // CHECK17:       cond.true:
18189 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
18190 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18191 // CHECK17:       cond.false:
18192 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18193 // CHECK17-NEXT:    br label [[COND_END]]
18194 // CHECK17:       cond.end:
18195 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
18196 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18197 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18198 // CHECK17-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
18199 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18200 // CHECK17:       omp.inner.for.cond:
18201 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18202 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
18203 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
18204 // CHECK17-NEXT:    [[CMP7:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
18205 // CHECK17-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18206 // CHECK17:       omp.inner.for.body:
18207 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18208 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
18209 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18210 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
18211 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
18212 // CHECK17-NEXT:    [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
18213 // CHECK17-NEXT:    store i32 [[TMP20]], i32* [[CONV8]], align 4
18214 // CHECK17-NEXT:    [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
18215 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[CONV1]], align 8
18216 // CHECK17-NEXT:    [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18217 // CHECK17-NEXT:    store i32 [[TMP22]], i32* [[CONV9]], align 4
18218 // CHECK17-NEXT:    [[TMP23:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18219 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP23]])
18220 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18221 // CHECK17:       omp.inner.for.inc:
18222 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18223 // CHECK17-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18224 // CHECK17-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
18225 // CHECK17-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
18226 // CHECK17-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18227 // CHECK17-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18228 // CHECK17-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
18229 // CHECK17-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
18230 // CHECK17-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18231 // CHECK17-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18232 // CHECK17-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
18233 // CHECK17-NEXT:    store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
18234 // CHECK17-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18235 // CHECK17-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
18236 // CHECK17-NEXT:    [[CMP13:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]]
18237 // CHECK17-NEXT:    br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
18238 // CHECK17:       cond.true14:
18239 // CHECK17-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
18240 // CHECK17-NEXT:    br label [[COND_END16:%.*]]
18241 // CHECK17:       cond.false15:
18242 // CHECK17-NEXT:    [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18243 // CHECK17-NEXT:    br label [[COND_END16]]
18244 // CHECK17:       cond.end16:
18245 // CHECK17-NEXT:    [[COND17:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE14]] ], [ [[TMP33]], [[COND_FALSE15]] ]
18246 // CHECK17-NEXT:    store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
18247 // CHECK17-NEXT:    [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18248 // CHECK17-NEXT:    store i32 [[TMP34]], i32* [[DOTOMP_IV]], align 4
18249 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18250 // CHECK17:       omp.inner.for.end:
18251 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18252 // CHECK17:       omp.loop.exit:
18253 // CHECK17-NEXT:    [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18254 // CHECK17-NEXT:    [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
18255 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]])
18256 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18257 // CHECK17:       omp.precond.end:
18258 // CHECK17-NEXT:    ret void
18259 //
18260 //
18261 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..6
18262 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18263 // CHECK17-NEXT:  entry:
18264 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18265 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18266 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18267 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18268 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18269 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18270 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18271 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18272 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18273 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18274 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
18275 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
18276 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18277 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
18278 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
18279 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18280 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18281 // CHECK17-NEXT:    [[I7:%.*]] = alloca i32, align 4
18282 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18283 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18284 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18285 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18286 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18287 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18288 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18289 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18290 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18291 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18292 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18293 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18294 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18295 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
18296 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18297 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
18298 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18299 // CHECK17-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
18300 // CHECK17-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
18301 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18302 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18303 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
18304 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18305 // CHECK17:       omp.precond.then:
18306 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
18307 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
18308 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
18309 // CHECK17-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18310 // CHECK17-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
18311 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18312 // CHECK17-NEXT:    [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
18313 // CHECK17-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
18314 // CHECK17-NEXT:    store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
18315 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18316 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18317 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18318 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
18319 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18320 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18321 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
18322 // CHECK17-NEXT:    [[CMP8:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
18323 // CHECK17-NEXT:    br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18324 // CHECK17:       cond.true:
18325 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
18326 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18327 // CHECK17:       cond.false:
18328 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18329 // CHECK17-NEXT:    br label [[COND_END]]
18330 // CHECK17:       cond.end:
18331 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
18332 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18333 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18334 // CHECK17-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
18335 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18336 // CHECK17:       omp.inner.for.cond:
18337 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18338 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18339 // CHECK17-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
18340 // CHECK17-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18341 // CHECK17:       omp.inner.for.body:
18342 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18343 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
18344 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18345 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I7]], align 4
18346 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I7]], align 4
18347 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
18348 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
18349 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
18350 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
18351 // CHECK17:       omp.body.continue:
18352 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18353 // CHECK17:       omp.inner.for.inc:
18354 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18355 // CHECK17-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1
18356 // CHECK17-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
18357 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18358 // CHECK17:       omp.inner.for.end:
18359 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18360 // CHECK17:       omp.loop.exit:
18361 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18362 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
18363 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
18364 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18365 // CHECK17:       omp.precond.end:
18366 // CHECK17-NEXT:    ret void
18367 //
18368 //
18369 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
18370 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18371 // CHECK17-NEXT:  entry:
18372 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18373 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18374 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18375 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
18376 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18377 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18378 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18379 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18380 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18381 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18382 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18383 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
18384 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
18385 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
18386 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
18387 // CHECK17-NEXT:    ret void
18388 //
18389 //
18390 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..8
18391 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18392 // CHECK17-NEXT:  entry:
18393 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18394 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18395 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18396 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18397 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18398 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18399 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18400 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18401 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18402 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18403 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18404 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18405 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18406 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18407 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
18408 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
18409 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18410 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18411 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18412 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18413 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18414 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18415 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18416 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18417 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18418 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
18419 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18420 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
18421 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18422 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
18423 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18424 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18425 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18426 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
18427 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18428 // CHECK17:       omp.precond.then:
18429 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18430 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18431 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
18432 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18433 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18434 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18435 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
18436 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18437 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18438 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18439 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
18440 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18441 // CHECK17:       cond.true:
18442 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18443 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18444 // CHECK17:       cond.false:
18445 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18446 // CHECK17-NEXT:    br label [[COND_END]]
18447 // CHECK17:       cond.end:
18448 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
18449 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18450 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18451 // CHECK17-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
18452 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18453 // CHECK17:       omp.inner.for.cond:
18454 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18455 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18456 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
18457 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18458 // CHECK17:       omp.inner.for.body:
18459 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18460 // CHECK17-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
18461 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18462 // CHECK17-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
18463 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
18464 // CHECK17-NEXT:    [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
18465 // CHECK17-NEXT:    store i32 [[TMP19]], i32* [[CONV6]], align 4
18466 // CHECK17-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
18467 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
18468 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18469 // CHECK17:       omp.inner.for.inc:
18470 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18471 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18472 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
18473 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
18474 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18475 // CHECK17:       omp.inner.for.end:
18476 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18477 // CHECK17:       omp.loop.exit:
18478 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18479 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
18480 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
18481 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18482 // CHECK17:       omp.precond.end:
18483 // CHECK17-NEXT:    ret void
18484 //
18485 //
18486 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..9
18487 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18488 // CHECK17-NEXT:  entry:
18489 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18490 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18491 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18492 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18493 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18494 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18495 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18496 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18497 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18498 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18499 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18500 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18501 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
18502 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
18503 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18504 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18505 // CHECK17-NEXT:    [[I5:%.*]] = alloca i32, align 4
18506 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18507 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18508 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18509 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18510 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18511 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18512 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18513 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18514 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18515 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18516 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18517 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
18518 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18519 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
18520 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18521 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
18522 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18523 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18524 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18525 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
18526 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18527 // CHECK17:       omp.precond.then:
18528 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
18529 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18530 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
18531 // CHECK17-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18532 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
18533 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18534 // CHECK17-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
18535 // CHECK17-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
18536 // CHECK17-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
18537 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18538 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18539 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18540 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18541 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18542 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
18543 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
18544 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
18545 // CHECK17:       omp.dispatch.cond:
18546 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18547 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
18548 // CHECK17-NEXT:    [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
18549 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
18550 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
18551 // CHECK17:       omp.dispatch.body:
18552 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18553 // CHECK17-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
18554 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18555 // CHECK17:       omp.inner.for.cond:
18556 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
18557 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
18558 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
18559 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18560 // CHECK17:       omp.inner.for.body:
18561 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
18562 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
18563 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18564 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !15
18565 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !15
18566 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
18567 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
18568 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
18569 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
18570 // CHECK17:       omp.body.continue:
18571 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18572 // CHECK17:       omp.inner.for.inc:
18573 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
18574 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
18575 // CHECK17-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
18576 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
18577 // CHECK17:       omp.inner.for.end:
18578 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
18579 // CHECK17:       omp.dispatch.inc:
18580 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
18581 // CHECK17:       omp.dispatch.end:
18582 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18583 // CHECK17:       omp.precond.end:
18584 // CHECK17-NEXT:    ret void
18585 //
18586 //
18587 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
18588 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18589 // CHECK17-NEXT:  entry:
18590 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18591 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18592 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18593 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18594 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
18595 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18596 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18597 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18598 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18599 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18600 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18601 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18602 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18603 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18604 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18605 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
18606 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
18607 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
18608 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
18609 // CHECK17-NEXT:    [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18610 // CHECK17-NEXT:    store i32 [[TMP4]], i32* [[CONV3]], align 4
18611 // CHECK17-NEXT:    [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18612 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
18613 // CHECK17-NEXT:    ret void
18614 //
18615 //
18616 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11
18617 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18618 // CHECK17-NEXT:  entry:
18619 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18620 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18621 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18622 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18623 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18624 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18625 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18626 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18627 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
18628 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
18629 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18630 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18631 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18632 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18633 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18634 // CHECK17-NEXT:    [[I5:%.*]] = alloca i32, align 4
18635 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
18636 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18637 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18638 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18639 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18640 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18641 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18642 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18643 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18644 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18645 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18646 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18647 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18648 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
18649 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18650 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
18651 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18652 // CHECK17-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
18653 // CHECK17-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
18654 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18655 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18656 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
18657 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18658 // CHECK17:       omp.precond.then:
18659 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18660 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
18661 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
18662 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18663 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18664 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18665 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
18666 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18667 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18668 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
18669 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
18670 // CHECK17-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18671 // CHECK17:       cond.true:
18672 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
18673 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18674 // CHECK17:       cond.false:
18675 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18676 // CHECK17-NEXT:    br label [[COND_END]]
18677 // CHECK17:       cond.end:
18678 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
18679 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18680 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18681 // CHECK17-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
18682 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18683 // CHECK17:       omp.inner.for.cond:
18684 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18685 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18686 // CHECK17-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
18687 // CHECK17-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18688 // CHECK17:       omp.inner.for.body:
18689 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18690 // CHECK17-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
18691 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18692 // CHECK17-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
18693 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
18694 // CHECK17-NEXT:    [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
18695 // CHECK17-NEXT:    store i32 [[TMP19]], i32* [[CONV8]], align 4
18696 // CHECK17-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
18697 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[CONV1]], align 8
18698 // CHECK17-NEXT:    [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18699 // CHECK17-NEXT:    store i32 [[TMP21]], i32* [[CONV9]], align 4
18700 // CHECK17-NEXT:    [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18701 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP22]])
18702 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18703 // CHECK17:       omp.inner.for.inc:
18704 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18705 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18706 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
18707 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
18708 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18709 // CHECK17:       omp.inner.for.end:
18710 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18711 // CHECK17:       omp.loop.exit:
18712 // CHECK17-NEXT:    [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18713 // CHECK17-NEXT:    [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
18714 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
18715 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18716 // CHECK17:       omp.precond.end:
18717 // CHECK17-NEXT:    ret void
18718 //
18719 //
18720 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..12
18721 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18722 // CHECK17-NEXT:  entry:
18723 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18724 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18725 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18726 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18727 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18728 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18729 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18730 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18731 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18732 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18733 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
18734 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
18735 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18736 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
18737 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
18738 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18739 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18740 // CHECK17-NEXT:    [[I7:%.*]] = alloca i32, align 4
18741 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18742 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18743 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18744 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18745 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18746 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18747 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18748 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18749 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18750 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18751 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18752 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18753 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18754 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
18755 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18756 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
18757 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18758 // CHECK17-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
18759 // CHECK17-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
18760 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18761 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18762 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
18763 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18764 // CHECK17:       omp.precond.then:
18765 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
18766 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
18767 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
18768 // CHECK17-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18769 // CHECK17-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
18770 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18771 // CHECK17-NEXT:    [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
18772 // CHECK17-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
18773 // CHECK17-NEXT:    store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
18774 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18775 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18776 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[CONV1]], align 8
18777 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18778 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18779 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18780 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
18781 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
18782 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
18783 // CHECK17:       omp.dispatch.cond:
18784 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18785 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
18786 // CHECK17-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
18787 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
18788 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
18789 // CHECK17:       omp.dispatch.body:
18790 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18791 // CHECK17-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
18792 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18793 // CHECK17:       omp.inner.for.cond:
18794 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
18795 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
18796 // CHECK17-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
18797 // CHECK17-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18798 // CHECK17:       omp.inner.for.body:
18799 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
18800 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
18801 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18802 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I7]], align 4, !llvm.access.group !18
18803 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !18
18804 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
18805 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
18806 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
18807 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
18808 // CHECK17:       omp.body.continue:
18809 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18810 // CHECK17:       omp.inner.for.inc:
18811 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
18812 // CHECK17-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
18813 // CHECK17-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
18814 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
18815 // CHECK17:       omp.inner.for.end:
18816 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
18817 // CHECK17:       omp.dispatch.inc:
18818 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
18819 // CHECK17:       omp.dispatch.end:
18820 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18821 // CHECK17:       omp.precond.end:
18822 // CHECK17-NEXT:    ret void
18823 //
18824 //
18825 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
18826 // CHECK17-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
18827 // CHECK17-NEXT:  entry:
18828 // CHECK17-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
18829 // CHECK17-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
18830 // CHECK17-NEXT:    [[M:%.*]] = alloca i32, align 4
18831 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
18832 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
18833 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
18834 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18835 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
18836 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
18837 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
18838 // CHECK17-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
18839 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18840 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18841 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
18842 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
18843 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
18844 // CHECK17-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
18845 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
18846 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
18847 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
18848 // CHECK17-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
18849 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
18850 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i64, align 8
18851 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [2 x i8*], align 8
18852 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS23:%.*]] = alloca [2 x i8*], align 8
18853 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [2 x i8*], align 8
18854 // CHECK17-NEXT:    [[_TMP25:%.*]] = alloca i32, align 4
18855 // CHECK17-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
18856 // CHECK17-NEXT:    store i32 10, i32* [[M]], align 4
18857 // CHECK17-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
18858 // CHECK17-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
18859 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
18860 // CHECK17-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
18861 // CHECK17-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
18862 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
18863 // CHECK17-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
18864 // CHECK17-NEXT:    store i8* null, i8** [[TMP4]], align 8
18865 // CHECK17-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
18866 // CHECK17-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
18867 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18868 // CHECK17-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18869 // CHECK17-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
18870 // CHECK17-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
18871 // CHECK17:       omp_offload.failed:
18872 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
18873 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
18874 // CHECK17:       omp_offload.cont:
18875 // CHECK17-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
18876 // CHECK17-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
18877 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
18878 // CHECK17-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
18879 // CHECK17-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
18880 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
18881 // CHECK17-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
18882 // CHECK17-NEXT:    store i8* null, i8** [[TMP13]], align 8
18883 // CHECK17-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
18884 // CHECK17-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
18885 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18886 // CHECK17-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18887 // CHECK17-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
18888 // CHECK17-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
18889 // CHECK17:       omp_offload.failed5:
18890 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
18891 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
18892 // CHECK17:       omp_offload.cont6:
18893 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
18894 // CHECK17-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR_]], align 4
18895 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18896 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18897 // CHECK17-NEXT:    store i32 [[TMP19]], i32* [[CONV]], align 4
18898 // CHECK17-NEXT:    [[TMP20:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18899 // CHECK17-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
18900 // CHECK17-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [10 x i32]**
18901 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP22]], align 8
18902 // CHECK17-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
18903 // CHECK17-NEXT:    [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [10 x i32]**
18904 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP24]], align 8
18905 // CHECK17-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
18906 // CHECK17-NEXT:    store i8* null, i8** [[TMP25]], align 8
18907 // CHECK17-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
18908 // CHECK17-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
18909 // CHECK17-NEXT:    store i64 [[TMP20]], i64* [[TMP27]], align 8
18910 // CHECK17-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
18911 // CHECK17-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
18912 // CHECK17-NEXT:    store i64 [[TMP20]], i64* [[TMP29]], align 8
18913 // CHECK17-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
18914 // CHECK17-NEXT:    store i8* null, i8** [[TMP30]], align 8
18915 // CHECK17-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
18916 // CHECK17-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
18917 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18918 // CHECK17-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, i32 2, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18919 // CHECK17-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
18920 // CHECK17-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
18921 // CHECK17:       omp_offload.failed11:
18922 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i64 [[TMP20]]) #[[ATTR3]]
18923 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
18924 // CHECK17:       omp_offload.cont12:
18925 // CHECK17-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
18926 // CHECK17-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to [10 x i32]**
18927 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP36]], align 8
18928 // CHECK17-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
18929 // CHECK17-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to [10 x i32]**
18930 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP38]], align 8
18931 // CHECK17-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
18932 // CHECK17-NEXT:    store i8* null, i8** [[TMP39]], align 8
18933 // CHECK17-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
18934 // CHECK17-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
18935 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18936 // CHECK17-NEXT:    [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, i32 1, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18937 // CHECK17-NEXT:    [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
18938 // CHECK17-NEXT:    br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
18939 // CHECK17:       omp_offload.failed17:
18940 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
18941 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
18942 // CHECK17:       omp_offload.cont18:
18943 // CHECK17-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M]], align 4
18944 // CHECK17-NEXT:    store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_19]], align 4
18945 // CHECK17-NEXT:    [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
18946 // CHECK17-NEXT:    [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED20]] to i32*
18947 // CHECK17-NEXT:    store i32 [[TMP45]], i32* [[CONV21]], align 4
18948 // CHECK17-NEXT:    [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED20]], align 8
18949 // CHECK17-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
18950 // CHECK17-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to [10 x i32]**
18951 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP48]], align 8
18952 // CHECK17-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
18953 // CHECK17-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to [10 x i32]**
18954 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP50]], align 8
18955 // CHECK17-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
18956 // CHECK17-NEXT:    store i8* null, i8** [[TMP51]], align 8
18957 // CHECK17-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
18958 // CHECK17-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
18959 // CHECK17-NEXT:    store i64 [[TMP46]], i64* [[TMP53]], align 8
18960 // CHECK17-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
18961 // CHECK17-NEXT:    [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i64*
18962 // CHECK17-NEXT:    store i64 [[TMP46]], i64* [[TMP55]], align 8
18963 // CHECK17-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
18964 // CHECK17-NEXT:    store i8* null, i8** [[TMP56]], align 8
18965 // CHECK17-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
18966 // CHECK17-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
18967 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18968 // CHECK17-NEXT:    [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, i32 2, i8** [[TMP57]], i8** [[TMP58]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18969 // CHECK17-NEXT:    [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0
18970 // CHECK17-NEXT:    br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED26:%.*]], label [[OMP_OFFLOAD_CONT27:%.*]]
18971 // CHECK17:       omp_offload.failed26:
18972 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i64 [[TMP46]]) #[[ATTR3]]
18973 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT27]]
18974 // CHECK17:       omp_offload.cont27:
18975 // CHECK17-NEXT:    ret i32 0
18976 //
18977 //
18978 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
18979 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18980 // CHECK17-NEXT:  entry:
18981 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18982 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18983 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18984 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
18985 // CHECK17-NEXT:    ret void
18986 //
18987 //
18988 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..14
18989 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18990 // CHECK17-NEXT:  entry:
18991 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18992 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18993 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18994 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18995 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18996 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18997 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18998 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18999 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19000 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19001 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19002 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19003 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19004 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19005 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19006 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19007 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19008 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19009 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19010 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19011 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19012 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19013 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19014 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19015 // CHECK17:       cond.true:
19016 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19017 // CHECK17:       cond.false:
19018 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19019 // CHECK17-NEXT:    br label [[COND_END]]
19020 // CHECK17:       cond.end:
19021 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19022 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19023 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19024 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19025 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19026 // CHECK17:       omp.inner.for.cond:
19027 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19028 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19029 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19030 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19031 // CHECK17:       omp.inner.for.body:
19032 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19033 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19034 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19035 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19036 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
19037 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19038 // CHECK17:       omp.inner.for.inc:
19039 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19040 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19041 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
19042 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
19043 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19044 // CHECK17:       omp.inner.for.end:
19045 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19046 // CHECK17:       omp.loop.exit:
19047 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19048 // CHECK17-NEXT:    ret void
19049 //
19050 //
19051 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..15
19052 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19053 // CHECK17-NEXT:  entry:
19054 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19055 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19056 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19057 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19058 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19059 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19060 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19061 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19062 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19063 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19064 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19065 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19066 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19067 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19068 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19069 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19070 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19071 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19072 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19073 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
19074 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19075 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
19076 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19077 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
19078 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
19079 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
19080 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19081 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19082 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19083 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
19084 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19085 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19086 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
19087 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19088 // CHECK17:       cond.true:
19089 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19090 // CHECK17:       cond.false:
19091 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19092 // CHECK17-NEXT:    br label [[COND_END]]
19093 // CHECK17:       cond.end:
19094 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
19095 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19096 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19097 // CHECK17-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
19098 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19099 // CHECK17:       omp.inner.for.cond:
19100 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19101 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19102 // CHECK17-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
19103 // CHECK17-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19104 // CHECK17:       omp.inner.for.body:
19105 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19106 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
19107 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19108 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
19109 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
19110 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
19111 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19112 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
19113 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19114 // CHECK17:       omp.body.continue:
19115 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19116 // CHECK17:       omp.inner.for.inc:
19117 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19118 // CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
19119 // CHECK17-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
19120 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19121 // CHECK17:       omp.inner.for.end:
19122 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19123 // CHECK17:       omp.loop.exit:
19124 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
19125 // CHECK17-NEXT:    ret void
19126 //
19127 //
19128 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
19129 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19130 // CHECK17-NEXT:  entry:
19131 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19132 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19133 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19134 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
19135 // CHECK17-NEXT:    ret void
19136 //
19137 //
19138 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..17
19139 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19140 // CHECK17-NEXT:  entry:
19141 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19142 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19143 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19144 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19145 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19146 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19147 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19148 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19149 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19150 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19151 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19152 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19153 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19154 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19155 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19156 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19157 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19158 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19159 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19160 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19161 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19162 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19163 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19164 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19165 // CHECK17:       cond.true:
19166 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19167 // CHECK17:       cond.false:
19168 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19169 // CHECK17-NEXT:    br label [[COND_END]]
19170 // CHECK17:       cond.end:
19171 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19172 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19173 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19174 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19175 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19176 // CHECK17:       omp.inner.for.cond:
19177 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19178 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19179 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19180 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19181 // CHECK17:       omp.inner.for.body:
19182 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19183 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19184 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19185 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19186 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
19187 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19188 // CHECK17:       omp.inner.for.inc:
19189 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19190 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19191 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
19192 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
19193 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19194 // CHECK17:       omp.inner.for.end:
19195 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19196 // CHECK17:       omp.loop.exit:
19197 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19198 // CHECK17-NEXT:    ret void
19199 //
19200 //
19201 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..18
19202 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19203 // CHECK17-NEXT:  entry:
19204 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19205 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19206 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19207 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19208 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19209 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19210 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19211 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19212 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19213 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19214 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19215 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19216 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19217 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19218 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19219 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19220 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19221 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19222 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19223 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
19224 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19225 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
19226 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19227 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
19228 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
19229 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
19230 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19231 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19232 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19233 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
19234 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19235 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19236 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
19237 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19238 // CHECK17:       cond.true:
19239 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19240 // CHECK17:       cond.false:
19241 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19242 // CHECK17-NEXT:    br label [[COND_END]]
19243 // CHECK17:       cond.end:
19244 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
19245 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19246 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19247 // CHECK17-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
19248 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19249 // CHECK17:       omp.inner.for.cond:
19250 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19251 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19252 // CHECK17-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
19253 // CHECK17-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19254 // CHECK17:       omp.inner.for.body:
19255 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19256 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
19257 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19258 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
19259 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
19260 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
19261 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19262 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
19263 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19264 // CHECK17:       omp.body.continue:
19265 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19266 // CHECK17:       omp.inner.for.inc:
19267 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19268 // CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
19269 // CHECK17-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
19270 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19271 // CHECK17:       omp.inner.for.end:
19272 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19273 // CHECK17:       omp.loop.exit:
19274 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
19275 // CHECK17-NEXT:    ret void
19276 //
19277 //
19278 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
19279 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19280 // CHECK17-NEXT:  entry:
19281 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19282 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19283 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19284 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19285 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19286 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19287 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19288 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
19289 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19290 // CHECK17-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
19291 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19292 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
19293 // CHECK17-NEXT:    ret void
19294 //
19295 //
19296 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..21
19297 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19298 // CHECK17-NEXT:  entry:
19299 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19300 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19301 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19302 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19303 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19304 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19305 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19306 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19307 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19308 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19309 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19310 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19311 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19312 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19313 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19314 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19315 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19316 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19317 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19318 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19319 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19320 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19321 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19322 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19323 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19324 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19325 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19326 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19327 // CHECK17:       cond.true:
19328 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19329 // CHECK17:       cond.false:
19330 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19331 // CHECK17-NEXT:    br label [[COND_END]]
19332 // CHECK17:       cond.end:
19333 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19334 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19335 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19336 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19337 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19338 // CHECK17:       omp.inner.for.cond:
19339 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19340 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19341 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19342 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19343 // CHECK17:       omp.inner.for.body:
19344 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19345 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19346 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19347 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19348 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
19349 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19350 // CHECK17-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
19351 // CHECK17-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19352 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
19353 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19354 // CHECK17:       omp.inner.for.inc:
19355 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19356 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19357 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
19358 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
19359 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19360 // CHECK17:       omp.inner.for.end:
19361 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19362 // CHECK17:       omp.loop.exit:
19363 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19364 // CHECK17-NEXT:    ret void
19365 //
19366 //
19367 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..22
19368 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19369 // CHECK17-NEXT:  entry:
19370 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19371 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19372 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19373 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19374 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19375 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19376 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19377 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19378 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19379 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19380 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19381 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19382 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19383 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19384 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19385 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19386 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19387 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19388 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19389 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19390 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19391 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19392 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
19393 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19394 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
19395 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19396 // CHECK17-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
19397 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
19398 // CHECK17-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
19399 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19400 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19401 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
19402 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19403 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
19404 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
19405 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
19406 // CHECK17:       omp.dispatch.cond:
19407 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19408 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19409 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
19410 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
19411 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19412 // CHECK17:       cond.true:
19413 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19414 // CHECK17-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
19415 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19416 // CHECK17:       cond.false:
19417 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19418 // CHECK17-NEXT:    br label [[COND_END]]
19419 // CHECK17:       cond.end:
19420 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
19421 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19422 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19423 // CHECK17-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
19424 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19425 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19426 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
19427 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19428 // CHECK17:       omp.dispatch.body:
19429 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19430 // CHECK17:       omp.inner.for.cond:
19431 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19432 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19433 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
19434 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19435 // CHECK17:       omp.inner.for.body:
19436 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19437 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
19438 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19439 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
19440 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
19441 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
19442 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19443 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
19444 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19445 // CHECK17:       omp.body.continue:
19446 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19447 // CHECK17:       omp.inner.for.inc:
19448 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19449 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
19450 // CHECK17-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
19451 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19452 // CHECK17:       omp.inner.for.end:
19453 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
19454 // CHECK17:       omp.dispatch.inc:
19455 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19456 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19457 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
19458 // CHECK17-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
19459 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19460 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19461 // CHECK17-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
19462 // CHECK17-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
19463 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
19464 // CHECK17:       omp.dispatch.end:
19465 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
19466 // CHECK17-NEXT:    ret void
19467 //
19468 //
19469 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
19470 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19471 // CHECK17-NEXT:  entry:
19472 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19473 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19474 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19475 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
19476 // CHECK17-NEXT:    ret void
19477 //
19478 //
19479 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..25
19480 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19481 // CHECK17-NEXT:  entry:
19482 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19483 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19484 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19485 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19486 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19487 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19488 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19489 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19490 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19491 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19492 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19493 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19494 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19495 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19496 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19497 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19498 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19499 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19500 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19501 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19502 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19503 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19504 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19505 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19506 // CHECK17:       cond.true:
19507 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19508 // CHECK17:       cond.false:
19509 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19510 // CHECK17-NEXT:    br label [[COND_END]]
19511 // CHECK17:       cond.end:
19512 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19513 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19514 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19515 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19516 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19517 // CHECK17:       omp.inner.for.cond:
19518 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19519 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19520 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19521 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19522 // CHECK17:       omp.inner.for.body:
19523 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19524 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19525 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19526 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19527 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
19528 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19529 // CHECK17:       omp.inner.for.inc:
19530 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19531 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19532 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
19533 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
19534 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19535 // CHECK17:       omp.inner.for.end:
19536 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19537 // CHECK17:       omp.loop.exit:
19538 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19539 // CHECK17-NEXT:    ret void
19540 //
19541 //
19542 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..26
19543 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19544 // CHECK17-NEXT:  entry:
19545 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19546 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19547 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19548 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19549 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19550 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19551 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19552 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19553 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19554 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19555 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19556 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19557 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19558 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19559 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19560 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19561 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19562 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19563 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19564 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
19565 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19566 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
19567 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19568 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
19569 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
19570 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
19571 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19572 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19573 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19574 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19575 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19576 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
19577 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
19578 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
19579 // CHECK17:       omp.dispatch.cond:
19580 // CHECK17-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
19581 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
19582 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19583 // CHECK17:       omp.dispatch.body:
19584 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19585 // CHECK17-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
19586 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19587 // CHECK17:       omp.inner.for.cond:
19588 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
19589 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
19590 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
19591 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19592 // CHECK17:       omp.inner.for.body:
19593 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
19594 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
19595 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19596 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
19597 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
19598 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
19599 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19600 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
19601 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19602 // CHECK17:       omp.body.continue:
19603 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19604 // CHECK17:       omp.inner.for.inc:
19605 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
19606 // CHECK17-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
19607 // CHECK17-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
19608 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
19609 // CHECK17:       omp.inner.for.end:
19610 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
19611 // CHECK17:       omp.dispatch.inc:
19612 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
19613 // CHECK17:       omp.dispatch.end:
19614 // CHECK17-NEXT:    ret void
19615 //
19616 //
19617 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
19618 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19619 // CHECK17-NEXT:  entry:
19620 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19621 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19622 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19623 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19624 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19625 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19626 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19627 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
19628 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19629 // CHECK17-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
19630 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19631 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
19632 // CHECK17-NEXT:    ret void
19633 //
19634 //
19635 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..29
19636 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19637 // CHECK17-NEXT:  entry:
19638 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19639 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19640 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19641 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19642 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19643 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19644 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19645 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19646 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19647 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19648 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19649 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19650 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19651 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19652 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19653 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19654 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19655 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19656 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19657 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19658 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19659 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19660 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19661 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19662 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19663 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19664 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19665 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19666 // CHECK17:       cond.true:
19667 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19668 // CHECK17:       cond.false:
19669 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19670 // CHECK17-NEXT:    br label [[COND_END]]
19671 // CHECK17:       cond.end:
19672 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19673 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19674 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19675 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19676 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19677 // CHECK17:       omp.inner.for.cond:
19678 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19679 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19680 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19681 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19682 // CHECK17:       omp.inner.for.body:
19683 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19684 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19685 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19686 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19687 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
19688 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19689 // CHECK17-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
19690 // CHECK17-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19691 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
19692 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19693 // CHECK17:       omp.inner.for.inc:
19694 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19695 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19696 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
19697 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
19698 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19699 // CHECK17:       omp.inner.for.end:
19700 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19701 // CHECK17:       omp.loop.exit:
19702 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19703 // CHECK17-NEXT:    ret void
19704 //
19705 //
19706 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..30
19707 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19708 // CHECK17-NEXT:  entry:
19709 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19710 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19711 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19712 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19713 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19714 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19715 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19716 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19717 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19718 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19719 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19720 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19721 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19722 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19723 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19724 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19725 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19726 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19727 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19728 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19729 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19730 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19731 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
19732 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19733 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
19734 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19735 // CHECK17-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
19736 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
19737 // CHECK17-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
19738 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19739 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19740 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
19741 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19742 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19743 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19744 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
19745 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
19746 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
19747 // CHECK17:       omp.dispatch.cond:
19748 // CHECK17-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
19749 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
19750 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19751 // CHECK17:       omp.dispatch.body:
19752 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19753 // CHECK17-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
19754 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19755 // CHECK17:       omp.inner.for.cond:
19756 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
19757 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
19758 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
19759 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19760 // CHECK17:       omp.inner.for.body:
19761 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
19762 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
19763 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19764 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
19765 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
19766 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
19767 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19768 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
19769 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19770 // CHECK17:       omp.body.continue:
19771 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19772 // CHECK17:       omp.inner.for.inc:
19773 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
19774 // CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
19775 // CHECK17-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
19776 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
19777 // CHECK17:       omp.inner.for.end:
19778 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
19779 // CHECK17:       omp.dispatch.inc:
19780 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
19781 // CHECK17:       omp.dispatch.end:
19782 // CHECK17-NEXT:    ret void
19783 //
19784 //
19785 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
19786 // CHECK17-SAME: () #[[ATTR5:[0-9]+]] {
19787 // CHECK17-NEXT:  entry:
19788 // CHECK17-NEXT:    call void @__tgt_register_requires(i64 1)
19789 // CHECK17-NEXT:    ret void
19790 //
19791 //
19792 // CHECK18-LABEL: define {{[^@]+}}@main
19793 // CHECK18-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
19794 // CHECK18-NEXT:  entry:
19795 // CHECK18-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
19796 // CHECK18-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
19797 // CHECK18-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
19798 // CHECK18-NEXT:    [[N:%.*]] = alloca i32, align 4
19799 // CHECK18-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
19800 // CHECK18-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
19801 // CHECK18-NEXT:    [[M:%.*]] = alloca i32, align 4
19802 // CHECK18-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
19803 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
19804 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
19805 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
19806 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
19807 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19808 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
19809 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
19810 // CHECK18-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
19811 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
19812 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
19813 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
19814 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
19815 // CHECK18-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
19816 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
19817 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
19818 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
19819 // CHECK18-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
19820 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19821 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8
19822 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8
19823 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8
19824 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8
19825 // CHECK18-NEXT:    [[_TMP26:%.*]] = alloca i32, align 4
19826 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
19827 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
19828 // CHECK18-NEXT:    [[N_CASTED35:%.*]] = alloca i64, align 8
19829 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS37:%.*]] = alloca [3 x i8*], align 8
19830 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS38:%.*]] = alloca [3 x i8*], align 8
19831 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS39:%.*]] = alloca [3 x i8*], align 8
19832 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES40:%.*]] = alloca [3 x i64], align 8
19833 // CHECK18-NEXT:    [[_TMP41:%.*]] = alloca i32, align 4
19834 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
19835 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_43:%.*]] = alloca i32, align 4
19836 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_50:%.*]] = alloca i32, align 4
19837 // CHECK18-NEXT:    [[N_CASTED51:%.*]] = alloca i64, align 8
19838 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED53:%.*]] = alloca i64, align 8
19839 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS55:%.*]] = alloca [4 x i8*], align 8
19840 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS56:%.*]] = alloca [4 x i8*], align 8
19841 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS57:%.*]] = alloca [4 x i8*], align 8
19842 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES58:%.*]] = alloca [4 x i64], align 8
19843 // CHECK18-NEXT:    [[_TMP59:%.*]] = alloca i32, align 4
19844 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_60:%.*]] = alloca i32, align 4
19845 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_61:%.*]] = alloca i32, align 4
19846 // CHECK18-NEXT:    store i32 0, i32* [[RETVAL]], align 4
19847 // CHECK18-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
19848 // CHECK18-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
19849 // CHECK18-NEXT:    store i32 100, i32* [[N]], align 4
19850 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
19851 // CHECK18-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
19852 // CHECK18-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
19853 // CHECK18-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
19854 // CHECK18-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
19855 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
19856 // CHECK18-NEXT:    store i32 10, i32* [[M]], align 4
19857 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
19858 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
19859 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
19860 // CHECK18-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
19861 // CHECK18-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
19862 // CHECK18-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
19863 // CHECK18-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
19864 // CHECK18-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
19865 // CHECK18-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
19866 // CHECK18-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
19867 // CHECK18-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
19868 // CHECK18-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
19869 // CHECK18-NEXT:    store i64 4, i64* [[TMP10]], align 8
19870 // CHECK18-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
19871 // CHECK18-NEXT:    store i8* null, i8** [[TMP11]], align 8
19872 // CHECK18-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
19873 // CHECK18-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
19874 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
19875 // CHECK18-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
19876 // CHECK18-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
19877 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
19878 // CHECK18-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
19879 // CHECK18-NEXT:    store i64 8, i64* [[TMP16]], align 8
19880 // CHECK18-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
19881 // CHECK18-NEXT:    store i8* null, i8** [[TMP17]], align 8
19882 // CHECK18-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
19883 // CHECK18-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
19884 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
19885 // CHECK18-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
19886 // CHECK18-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
19887 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
19888 // CHECK18-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
19889 // CHECK18-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
19890 // CHECK18-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
19891 // CHECK18-NEXT:    store i8* null, i8** [[TMP23]], align 8
19892 // CHECK18-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
19893 // CHECK18-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
19894 // CHECK18-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
19895 // CHECK18-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
19896 // CHECK18-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
19897 // CHECK18-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19898 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
19899 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
19900 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
19901 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
19902 // CHECK18-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
19903 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
19904 // CHECK18-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
19905 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
19906 // CHECK18-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19907 // CHECK18-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
19908 // CHECK18-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
19909 // CHECK18:       omp_offload.failed:
19910 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
19911 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT]]
19912 // CHECK18:       omp_offload.cont:
19913 // CHECK18-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
19914 // CHECK18-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
19915 // CHECK18-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
19916 // CHECK18-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
19917 // CHECK18-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
19918 // CHECK18-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
19919 // CHECK18-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
19920 // CHECK18-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
19921 // CHECK18-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
19922 // CHECK18-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
19923 // CHECK18-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
19924 // CHECK18-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
19925 // CHECK18-NEXT:    store i64 4, i64* [[TMP40]], align 8
19926 // CHECK18-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
19927 // CHECK18-NEXT:    store i8* null, i8** [[TMP41]], align 8
19928 // CHECK18-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
19929 // CHECK18-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
19930 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
19931 // CHECK18-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
19932 // CHECK18-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
19933 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
19934 // CHECK18-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
19935 // CHECK18-NEXT:    store i64 8, i64* [[TMP46]], align 8
19936 // CHECK18-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
19937 // CHECK18-NEXT:    store i8* null, i8** [[TMP47]], align 8
19938 // CHECK18-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
19939 // CHECK18-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
19940 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
19941 // CHECK18-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
19942 // CHECK18-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
19943 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
19944 // CHECK18-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
19945 // CHECK18-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
19946 // CHECK18-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
19947 // CHECK18-NEXT:    store i8* null, i8** [[TMP53]], align 8
19948 // CHECK18-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
19949 // CHECK18-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
19950 // CHECK18-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
19951 // CHECK18-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
19952 // CHECK18-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
19953 // CHECK18-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
19954 // CHECK18-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
19955 // CHECK18-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
19956 // CHECK18-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
19957 // CHECK18-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
19958 // CHECK18-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
19959 // CHECK18-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
19960 // CHECK18-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
19961 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
19962 // CHECK18-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19963 // CHECK18-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
19964 // CHECK18-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
19965 // CHECK18:       omp_offload.failed16:
19966 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
19967 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
19968 // CHECK18:       omp_offload.cont17:
19969 // CHECK18-NEXT:    [[TMP63:%.*]] = load i32, i32* [[M]], align 4
19970 // CHECK18-NEXT:    store i32 [[TMP63]], i32* [[DOTCAPTURE_EXPR_18]], align 4
19971 // CHECK18-NEXT:    [[TMP64:%.*]] = load i32, i32* [[N]], align 4
19972 // CHECK18-NEXT:    [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
19973 // CHECK18-NEXT:    store i32 [[TMP64]], i32* [[CONV20]], align 4
19974 // CHECK18-NEXT:    [[TMP65:%.*]] = load i64, i64* [[N_CASTED19]], align 8
19975 // CHECK18-NEXT:    [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
19976 // CHECK18-NEXT:    [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19977 // CHECK18-NEXT:    store i32 [[TMP66]], i32* [[CONV21]], align 4
19978 // CHECK18-NEXT:    [[TMP67:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19979 // CHECK18-NEXT:    [[TMP68:%.*]] = mul nuw i64 [[TMP1]], 4
19980 // CHECK18-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
19981 // CHECK18-NEXT:    [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64*
19982 // CHECK18-NEXT:    store i64 [[TMP65]], i64* [[TMP70]], align 8
19983 // CHECK18-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
19984 // CHECK18-NEXT:    [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i64*
19985 // CHECK18-NEXT:    store i64 [[TMP65]], i64* [[TMP72]], align 8
19986 // CHECK18-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
19987 // CHECK18-NEXT:    store i64 4, i64* [[TMP73]], align 8
19988 // CHECK18-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
19989 // CHECK18-NEXT:    store i8* null, i8** [[TMP74]], align 8
19990 // CHECK18-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
19991 // CHECK18-NEXT:    [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64*
19992 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP76]], align 8
19993 // CHECK18-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
19994 // CHECK18-NEXT:    [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64*
19995 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP78]], align 8
19996 // CHECK18-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 1
19997 // CHECK18-NEXT:    store i64 8, i64* [[TMP79]], align 8
19998 // CHECK18-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
19999 // CHECK18-NEXT:    store i8* null, i8** [[TMP80]], align 8
20000 // CHECK18-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2
20001 // CHECK18-NEXT:    [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32**
20002 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP82]], align 8
20003 // CHECK18-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2
20004 // CHECK18-NEXT:    [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
20005 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP84]], align 8
20006 // CHECK18-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2
20007 // CHECK18-NEXT:    store i64 [[TMP68]], i64* [[TMP85]], align 8
20008 // CHECK18-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2
20009 // CHECK18-NEXT:    store i8* null, i8** [[TMP86]], align 8
20010 // CHECK18-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3
20011 // CHECK18-NEXT:    [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64*
20012 // CHECK18-NEXT:    store i64 [[TMP67]], i64* [[TMP88]], align 8
20013 // CHECK18-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3
20014 // CHECK18-NEXT:    [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i64*
20015 // CHECK18-NEXT:    store i64 [[TMP67]], i64* [[TMP90]], align 8
20016 // CHECK18-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 3
20017 // CHECK18-NEXT:    store i64 4, i64* [[TMP91]], align 8
20018 // CHECK18-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3
20019 // CHECK18-NEXT:    store i8* null, i8** [[TMP92]], align 8
20020 // CHECK18-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
20021 // CHECK18-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
20022 // CHECK18-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
20023 // CHECK18-NEXT:    [[TMP96:%.*]] = load i32, i32* [[N]], align 4
20024 // CHECK18-NEXT:    store i32 [[TMP96]], i32* [[DOTCAPTURE_EXPR_27]], align 4
20025 // CHECK18-NEXT:    [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
20026 // CHECK18-NEXT:    [[SUB29:%.*]] = sub nsw i32 [[TMP97]], 0
20027 // CHECK18-NEXT:    [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
20028 // CHECK18-NEXT:    [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1
20029 // CHECK18-NEXT:    store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4
20030 // CHECK18-NEXT:    [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
20031 // CHECK18-NEXT:    [[ADD32:%.*]] = add nsw i32 [[TMP98]], 1
20032 // CHECK18-NEXT:    [[TMP99:%.*]] = zext i32 [[ADD32]] to i64
20033 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP99]])
20034 // CHECK18-NEXT:    [[TMP100:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, i32 4, i8** [[TMP93]], i8** [[TMP94]], i64* [[TMP95]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
20035 // CHECK18-NEXT:    [[TMP101:%.*]] = icmp ne i32 [[TMP100]], 0
20036 // CHECK18-NEXT:    br i1 [[TMP101]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]]
20037 // CHECK18:       omp_offload.failed33:
20038 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP65]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP67]]) #[[ATTR3]]
20039 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT34]]
20040 // CHECK18:       omp_offload.cont34:
20041 // CHECK18-NEXT:    [[TMP102:%.*]] = load i32, i32* [[N]], align 4
20042 // CHECK18-NEXT:    [[CONV36:%.*]] = bitcast i64* [[N_CASTED35]] to i32*
20043 // CHECK18-NEXT:    store i32 [[TMP102]], i32* [[CONV36]], align 4
20044 // CHECK18-NEXT:    [[TMP103:%.*]] = load i64, i64* [[N_CASTED35]], align 8
20045 // CHECK18-NEXT:    [[TMP104:%.*]] = mul nuw i64 [[TMP1]], 4
20046 // CHECK18-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 0
20047 // CHECK18-NEXT:    [[TMP106:%.*]] = bitcast i8** [[TMP105]] to i64*
20048 // CHECK18-NEXT:    store i64 [[TMP103]], i64* [[TMP106]], align 8
20049 // CHECK18-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 0
20050 // CHECK18-NEXT:    [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i64*
20051 // CHECK18-NEXT:    store i64 [[TMP103]], i64* [[TMP108]], align 8
20052 // CHECK18-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 0
20053 // CHECK18-NEXT:    store i64 4, i64* [[TMP109]], align 8
20054 // CHECK18-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS39]], i64 0, i64 0
20055 // CHECK18-NEXT:    store i8* null, i8** [[TMP110]], align 8
20056 // CHECK18-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 1
20057 // CHECK18-NEXT:    [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64*
20058 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP112]], align 8
20059 // CHECK18-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 1
20060 // CHECK18-NEXT:    [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i64*
20061 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP114]], align 8
20062 // CHECK18-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 1
20063 // CHECK18-NEXT:    store i64 8, i64* [[TMP115]], align 8
20064 // CHECK18-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS39]], i64 0, i64 1
20065 // CHECK18-NEXT:    store i8* null, i8** [[TMP116]], align 8
20066 // CHECK18-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 2
20067 // CHECK18-NEXT:    [[TMP118:%.*]] = bitcast i8** [[TMP117]] to i32**
20068 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP118]], align 8
20069 // CHECK18-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 2
20070 // CHECK18-NEXT:    [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
20071 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP120]], align 8
20072 // CHECK18-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 2
20073 // CHECK18-NEXT:    store i64 [[TMP104]], i64* [[TMP121]], align 8
20074 // CHECK18-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS39]], i64 0, i64 2
20075 // CHECK18-NEXT:    store i8* null, i8** [[TMP122]], align 8
20076 // CHECK18-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS37]], i32 0, i32 0
20077 // CHECK18-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS38]], i32 0, i32 0
20078 // CHECK18-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES40]], i32 0, i32 0
20079 // CHECK18-NEXT:    [[TMP126:%.*]] = load i32, i32* [[N]], align 4
20080 // CHECK18-NEXT:    store i32 [[TMP126]], i32* [[DOTCAPTURE_EXPR_42]], align 4
20081 // CHECK18-NEXT:    [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
20082 // CHECK18-NEXT:    [[SUB44:%.*]] = sub nsw i32 [[TMP127]], 0
20083 // CHECK18-NEXT:    [[DIV45:%.*]] = sdiv i32 [[SUB44]], 1
20084 // CHECK18-NEXT:    [[SUB46:%.*]] = sub nsw i32 [[DIV45]], 1
20085 // CHECK18-NEXT:    store i32 [[SUB46]], i32* [[DOTCAPTURE_EXPR_43]], align 4
20086 // CHECK18-NEXT:    [[TMP128:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_43]], align 4
20087 // CHECK18-NEXT:    [[ADD47:%.*]] = add nsw i32 [[TMP128]], 1
20088 // CHECK18-NEXT:    [[TMP129:%.*]] = zext i32 [[ADD47]] to i64
20089 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP129]])
20090 // CHECK18-NEXT:    [[TMP130:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, i32 3, i8** [[TMP123]], i8** [[TMP124]], i64* [[TMP125]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
20091 // CHECK18-NEXT:    [[TMP131:%.*]] = icmp ne i32 [[TMP130]], 0
20092 // CHECK18-NEXT:    br i1 [[TMP131]], label [[OMP_OFFLOAD_FAILED48:%.*]], label [[OMP_OFFLOAD_CONT49:%.*]]
20093 // CHECK18:       omp_offload.failed48:
20094 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP103]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
20095 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT49]]
20096 // CHECK18:       omp_offload.cont49:
20097 // CHECK18-NEXT:    [[TMP132:%.*]] = load i32, i32* [[M]], align 4
20098 // CHECK18-NEXT:    store i32 [[TMP132]], i32* [[DOTCAPTURE_EXPR_50]], align 4
20099 // CHECK18-NEXT:    [[TMP133:%.*]] = load i32, i32* [[N]], align 4
20100 // CHECK18-NEXT:    [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
20101 // CHECK18-NEXT:    store i32 [[TMP133]], i32* [[CONV52]], align 4
20102 // CHECK18-NEXT:    [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
20103 // CHECK18-NEXT:    [[TMP135:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_50]], align 4
20104 // CHECK18-NEXT:    [[CONV54:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED53]] to i32*
20105 // CHECK18-NEXT:    store i32 [[TMP135]], i32* [[CONV54]], align 4
20106 // CHECK18-NEXT:    [[TMP136:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED53]], align 8
20107 // CHECK18-NEXT:    [[TMP137:%.*]] = mul nuw i64 [[TMP1]], 4
20108 // CHECK18-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 0
20109 // CHECK18-NEXT:    [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
20110 // CHECK18-NEXT:    store i64 [[TMP134]], i64* [[TMP139]], align 8
20111 // CHECK18-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 0
20112 // CHECK18-NEXT:    [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i64*
20113 // CHECK18-NEXT:    store i64 [[TMP134]], i64* [[TMP141]], align 8
20114 // CHECK18-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 0
20115 // CHECK18-NEXT:    store i64 4, i64* [[TMP142]], align 8
20116 // CHECK18-NEXT:    [[TMP143:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 0
20117 // CHECK18-NEXT:    store i8* null, i8** [[TMP143]], align 8
20118 // CHECK18-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 1
20119 // CHECK18-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
20120 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP145]], align 8
20121 // CHECK18-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 1
20122 // CHECK18-NEXT:    [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i64*
20123 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP147]], align 8
20124 // CHECK18-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 1
20125 // CHECK18-NEXT:    store i64 8, i64* [[TMP148]], align 8
20126 // CHECK18-NEXT:    [[TMP149:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 1
20127 // CHECK18-NEXT:    store i8* null, i8** [[TMP149]], align 8
20128 // CHECK18-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 2
20129 // CHECK18-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i32**
20130 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP151]], align 8
20131 // CHECK18-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 2
20132 // CHECK18-NEXT:    [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32**
20133 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP153]], align 8
20134 // CHECK18-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 2
20135 // CHECK18-NEXT:    store i64 [[TMP137]], i64* [[TMP154]], align 8
20136 // CHECK18-NEXT:    [[TMP155:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 2
20137 // CHECK18-NEXT:    store i8* null, i8** [[TMP155]], align 8
20138 // CHECK18-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 3
20139 // CHECK18-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i64*
20140 // CHECK18-NEXT:    store i64 [[TMP136]], i64* [[TMP157]], align 8
20141 // CHECK18-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 3
20142 // CHECK18-NEXT:    [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i64*
20143 // CHECK18-NEXT:    store i64 [[TMP136]], i64* [[TMP159]], align 8
20144 // CHECK18-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 3
20145 // CHECK18-NEXT:    store i64 4, i64* [[TMP160]], align 8
20146 // CHECK18-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS57]], i64 0, i64 3
20147 // CHECK18-NEXT:    store i8* null, i8** [[TMP161]], align 8
20148 // CHECK18-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS55]], i32 0, i32 0
20149 // CHECK18-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS56]], i32 0, i32 0
20150 // CHECK18-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES58]], i32 0, i32 0
20151 // CHECK18-NEXT:    [[TMP165:%.*]] = load i32, i32* [[N]], align 4
20152 // CHECK18-NEXT:    store i32 [[TMP165]], i32* [[DOTCAPTURE_EXPR_60]], align 4
20153 // CHECK18-NEXT:    [[TMP166:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_60]], align 4
20154 // CHECK18-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[TMP166]], 0
20155 // CHECK18-NEXT:    [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1
20156 // CHECK18-NEXT:    [[SUB64:%.*]] = sub nsw i32 [[DIV63]], 1
20157 // CHECK18-NEXT:    store i32 [[SUB64]], i32* [[DOTCAPTURE_EXPR_61]], align 4
20158 // CHECK18-NEXT:    [[TMP167:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_61]], align 4
20159 // CHECK18-NEXT:    [[ADD65:%.*]] = add nsw i32 [[TMP167]], 1
20160 // CHECK18-NEXT:    [[TMP168:%.*]] = zext i32 [[ADD65]] to i64
20161 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP168]])
20162 // CHECK18-NEXT:    [[TMP169:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, i32 4, i8** [[TMP162]], i8** [[TMP163]], i64* [[TMP164]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
20163 // CHECK18-NEXT:    [[TMP170:%.*]] = icmp ne i32 [[TMP169]], 0
20164 // CHECK18-NEXT:    br i1 [[TMP170]], label [[OMP_OFFLOAD_FAILED66:%.*]], label [[OMP_OFFLOAD_CONT67:%.*]]
20165 // CHECK18:       omp_offload.failed66:
20166 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP136]]) #[[ATTR3]]
20167 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT67]]
20168 // CHECK18:       omp_offload.cont67:
20169 // CHECK18-NEXT:    [[TMP171:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
20170 // CHECK18-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP171]])
20171 // CHECK18-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
20172 // CHECK18-NEXT:    [[TMP172:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
20173 // CHECK18-NEXT:    call void @llvm.stackrestore(i8* [[TMP172]])
20174 // CHECK18-NEXT:    [[TMP173:%.*]] = load i32, i32* [[RETVAL]], align 4
20175 // CHECK18-NEXT:    ret i32 [[TMP173]]
20176 //
20177 //
20178 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
20179 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
20180 // CHECK18-NEXT:  entry:
20181 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20182 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20183 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20184 // CHECK18-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
20185 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20186 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20187 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20188 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20189 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20190 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20191 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20192 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
20193 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
20194 // CHECK18-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
20195 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
20196 // CHECK18-NEXT:    ret void
20197 //
20198 //
20199 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined.
20200 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20201 // CHECK18-NEXT:  entry:
20202 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20203 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20204 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20205 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20206 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20207 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20208 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20209 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20210 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20211 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20212 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20213 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20214 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20215 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20216 // CHECK18-NEXT:    [[I3:%.*]] = alloca i32, align 4
20217 // CHECK18-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
20218 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20219 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20220 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20221 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20222 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20223 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20224 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20225 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20226 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20227 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
20228 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20229 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
20230 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20231 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20232 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20233 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20234 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20235 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
20236 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20237 // CHECK18:       omp.precond.then:
20238 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20239 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20240 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
20241 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20242 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20243 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20244 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
20245 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20246 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20247 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20248 // CHECK18-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
20249 // CHECK18-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20250 // CHECK18:       cond.true:
20251 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20252 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20253 // CHECK18:       cond.false:
20254 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20255 // CHECK18-NEXT:    br label [[COND_END]]
20256 // CHECK18:       cond.end:
20257 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
20258 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20259 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20260 // CHECK18-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
20261 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20262 // CHECK18:       omp.inner.for.cond:
20263 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20264 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20265 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
20266 // CHECK18-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20267 // CHECK18:       omp.inner.for.body:
20268 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20269 // CHECK18-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
20270 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20271 // CHECK18-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
20272 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
20273 // CHECK18-NEXT:    [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
20274 // CHECK18-NEXT:    store i32 [[TMP19]], i32* [[CONV6]], align 4
20275 // CHECK18-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
20276 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
20277 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20278 // CHECK18:       omp.inner.for.inc:
20279 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20280 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20281 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
20282 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
20283 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20284 // CHECK18:       omp.inner.for.end:
20285 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20286 // CHECK18:       omp.loop.exit:
20287 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20288 // CHECK18-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
20289 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
20290 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20291 // CHECK18:       omp.precond.end:
20292 // CHECK18-NEXT:    ret void
20293 //
20294 //
20295 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..1
20296 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20297 // CHECK18-NEXT:  entry:
20298 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20299 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20300 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
20301 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
20302 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20303 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20304 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20305 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20306 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20307 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20308 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20309 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20310 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
20311 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
20312 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20313 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20314 // CHECK18-NEXT:    [[I5:%.*]] = alloca i32, align 4
20315 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20316 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20317 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20318 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20319 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20320 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20321 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20322 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20323 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20324 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20325 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20326 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
20327 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20328 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
20329 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20330 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20331 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20332 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20333 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20334 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
20335 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20336 // CHECK18:       omp.precond.then:
20337 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
20338 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20339 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
20340 // CHECK18-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20341 // CHECK18-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
20342 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20343 // CHECK18-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
20344 // CHECK18-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
20345 // CHECK18-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
20346 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20347 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20348 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20349 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
20350 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20351 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20352 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20353 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
20354 // CHECK18-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20355 // CHECK18:       cond.true:
20356 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20357 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20358 // CHECK18:       cond.false:
20359 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20360 // CHECK18-NEXT:    br label [[COND_END]]
20361 // CHECK18:       cond.end:
20362 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
20363 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20364 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20365 // CHECK18-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
20366 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20367 // CHECK18:       omp.inner.for.cond:
20368 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20369 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20370 // CHECK18-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
20371 // CHECK18-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20372 // CHECK18:       omp.inner.for.body:
20373 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20374 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
20375 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20376 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I5]], align 4
20377 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
20378 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
20379 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
20380 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
20381 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
20382 // CHECK18:       omp.body.continue:
20383 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20384 // CHECK18:       omp.inner.for.inc:
20385 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20386 // CHECK18-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
20387 // CHECK18-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
20388 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20389 // CHECK18:       omp.inner.for.end:
20390 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20391 // CHECK18:       omp.loop.exit:
20392 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20393 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
20394 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
20395 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20396 // CHECK18:       omp.precond.end:
20397 // CHECK18-NEXT:    ret void
20398 //
20399 //
20400 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
20401 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20402 // CHECK18-NEXT:  entry:
20403 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20404 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20405 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20406 // CHECK18-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
20407 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20408 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20409 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20410 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20411 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20412 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20413 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20414 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
20415 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
20416 // CHECK18-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
20417 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
20418 // CHECK18-NEXT:    ret void
20419 //
20420 //
20421 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..2
20422 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20423 // CHECK18-NEXT:  entry:
20424 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20425 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20426 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20427 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20428 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20429 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20430 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20431 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20432 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20433 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20434 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20435 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20436 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20437 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20438 // CHECK18-NEXT:    [[I3:%.*]] = alloca i32, align 4
20439 // CHECK18-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
20440 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20441 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20442 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20443 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20444 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20445 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20446 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20447 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20448 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20449 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
20450 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20451 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
20452 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20453 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20454 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20455 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20456 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20457 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
20458 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20459 // CHECK18:       omp.precond.then:
20460 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20461 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20462 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
20463 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20464 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20465 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20466 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
20467 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20468 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20469 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20470 // CHECK18-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
20471 // CHECK18-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20472 // CHECK18:       cond.true:
20473 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20474 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20475 // CHECK18:       cond.false:
20476 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20477 // CHECK18-NEXT:    br label [[COND_END]]
20478 // CHECK18:       cond.end:
20479 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
20480 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20481 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20482 // CHECK18-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
20483 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20484 // CHECK18:       omp.inner.for.cond:
20485 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20486 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20487 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
20488 // CHECK18-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20489 // CHECK18:       omp.inner.for.body:
20490 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20491 // CHECK18-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
20492 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20493 // CHECK18-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
20494 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
20495 // CHECK18-NEXT:    [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
20496 // CHECK18-NEXT:    store i32 [[TMP19]], i32* [[CONV6]], align 4
20497 // CHECK18-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
20498 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
20499 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20500 // CHECK18:       omp.inner.for.inc:
20501 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20502 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20503 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
20504 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
20505 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20506 // CHECK18:       omp.inner.for.end:
20507 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20508 // CHECK18:       omp.loop.exit:
20509 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20510 // CHECK18-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
20511 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
20512 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20513 // CHECK18:       omp.precond.end:
20514 // CHECK18-NEXT:    ret void
20515 //
20516 //
20517 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..3
20518 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20519 // CHECK18-NEXT:  entry:
20520 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20521 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20522 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
20523 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
20524 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20525 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20526 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20527 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20528 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20529 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20530 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20531 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20532 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
20533 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
20534 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20535 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20536 // CHECK18-NEXT:    [[I5:%.*]] = alloca i32, align 4
20537 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20538 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20539 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20540 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20541 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20542 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20543 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20544 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20545 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20546 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20547 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20548 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
20549 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20550 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
20551 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20552 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20553 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20554 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20555 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20556 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
20557 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20558 // CHECK18:       omp.precond.then:
20559 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
20560 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20561 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
20562 // CHECK18-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20563 // CHECK18-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
20564 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20565 // CHECK18-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
20566 // CHECK18-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
20567 // CHECK18-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
20568 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20569 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20570 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20571 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
20572 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20573 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20574 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20575 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
20576 // CHECK18-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20577 // CHECK18:       cond.true:
20578 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20579 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20580 // CHECK18:       cond.false:
20581 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20582 // CHECK18-NEXT:    br label [[COND_END]]
20583 // CHECK18:       cond.end:
20584 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
20585 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20586 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20587 // CHECK18-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
20588 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20589 // CHECK18:       omp.inner.for.cond:
20590 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20591 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20592 // CHECK18-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
20593 // CHECK18-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20594 // CHECK18:       omp.inner.for.body:
20595 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20596 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
20597 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20598 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I5]], align 4
20599 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
20600 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
20601 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
20602 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
20603 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
20604 // CHECK18:       omp.body.continue:
20605 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20606 // CHECK18:       omp.inner.for.inc:
20607 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20608 // CHECK18-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
20609 // CHECK18-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
20610 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20611 // CHECK18:       omp.inner.for.end:
20612 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20613 // CHECK18:       omp.loop.exit:
20614 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20615 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
20616 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
20617 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20618 // CHECK18:       omp.precond.end:
20619 // CHECK18-NEXT:    ret void
20620 //
20621 //
20622 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
20623 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
20624 // CHECK18-NEXT:  entry:
20625 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20626 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20627 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20628 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
20629 // CHECK18-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
20630 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
20631 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20632 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20633 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20634 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
20635 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20636 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20637 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20638 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
20639 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20640 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
20641 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
20642 // CHECK18-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
20643 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
20644 // CHECK18-NEXT:    [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
20645 // CHECK18-NEXT:    store i32 [[TMP4]], i32* [[CONV3]], align 4
20646 // CHECK18-NEXT:    [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
20647 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
20648 // CHECK18-NEXT:    ret void
20649 //
20650 //
20651 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..5
20652 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
20653 // CHECK18-NEXT:  entry:
20654 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20655 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20656 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20657 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20658 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20659 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
20660 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20661 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20662 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
20663 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
20664 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20665 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20666 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20667 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20668 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20669 // CHECK18-NEXT:    [[I5:%.*]] = alloca i32, align 4
20670 // CHECK18-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
20671 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
20672 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20673 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20674 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20675 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20676 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20677 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
20678 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20679 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20680 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20681 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
20682 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20683 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
20684 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20685 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
20686 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20687 // CHECK18-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
20688 // CHECK18-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
20689 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20690 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20691 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
20692 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20693 // CHECK18:       omp.precond.then:
20694 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20695 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
20696 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
20697 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20698 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20699 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
20700 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20701 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
20702 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
20703 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20704 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
20705 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
20706 // CHECK18-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20707 // CHECK18:       cond.true:
20708 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
20709 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20710 // CHECK18:       cond.false:
20711 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20712 // CHECK18-NEXT:    br label [[COND_END]]
20713 // CHECK18:       cond.end:
20714 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
20715 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20716 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20717 // CHECK18-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
20718 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20719 // CHECK18:       omp.inner.for.cond:
20720 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20721 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
20722 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
20723 // CHECK18-NEXT:    [[CMP7:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
20724 // CHECK18-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20725 // CHECK18:       omp.inner.for.body:
20726 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20727 // CHECK18-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
20728 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20729 // CHECK18-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
20730 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
20731 // CHECK18-NEXT:    [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
20732 // CHECK18-NEXT:    store i32 [[TMP20]], i32* [[CONV8]], align 4
20733 // CHECK18-NEXT:    [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
20734 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[CONV1]], align 8
20735 // CHECK18-NEXT:    [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
20736 // CHECK18-NEXT:    store i32 [[TMP22]], i32* [[CONV9]], align 4
20737 // CHECK18-NEXT:    [[TMP23:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
20738 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP23]])
20739 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20740 // CHECK18:       omp.inner.for.inc:
20741 // CHECK18-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20742 // CHECK18-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20743 // CHECK18-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
20744 // CHECK18-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
20745 // CHECK18-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20746 // CHECK18-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20747 // CHECK18-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
20748 // CHECK18-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
20749 // CHECK18-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20750 // CHECK18-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20751 // CHECK18-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
20752 // CHECK18-NEXT:    store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
20753 // CHECK18-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20754 // CHECK18-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
20755 // CHECK18-NEXT:    [[CMP13:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]]
20756 // CHECK18-NEXT:    br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
20757 // CHECK18:       cond.true14:
20758 // CHECK18-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
20759 // CHECK18-NEXT:    br label [[COND_END16:%.*]]
20760 // CHECK18:       cond.false15:
20761 // CHECK18-NEXT:    [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20762 // CHECK18-NEXT:    br label [[COND_END16]]
20763 // CHECK18:       cond.end16:
20764 // CHECK18-NEXT:    [[COND17:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE14]] ], [ [[TMP33]], [[COND_FALSE15]] ]
20765 // CHECK18-NEXT:    store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
20766 // CHECK18-NEXT:    [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20767 // CHECK18-NEXT:    store i32 [[TMP34]], i32* [[DOTOMP_IV]], align 4
20768 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20769 // CHECK18:       omp.inner.for.end:
20770 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20771 // CHECK18:       omp.loop.exit:
20772 // CHECK18-NEXT:    [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20773 // CHECK18-NEXT:    [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
20774 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]])
20775 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20776 // CHECK18:       omp.precond.end:
20777 // CHECK18-NEXT:    ret void
20778 //
20779 //
20780 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..6
20781 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
20782 // CHECK18-NEXT:  entry:
20783 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20784 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20785 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
20786 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
20787 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20788 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20789 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20790 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
20791 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20792 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20793 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
20794 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
20795 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20796 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
20797 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
20798 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20799 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20800 // CHECK18-NEXT:    [[I7:%.*]] = alloca i32, align 4
20801 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20802 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20803 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20804 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20805 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20806 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20807 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20808 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
20809 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20810 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20811 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20812 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
20813 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20814 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
20815 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20816 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
20817 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20818 // CHECK18-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
20819 // CHECK18-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
20820 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20821 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20822 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
20823 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20824 // CHECK18:       omp.precond.then:
20825 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
20826 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
20827 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
20828 // CHECK18-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20829 // CHECK18-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
20830 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20831 // CHECK18-NEXT:    [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
20832 // CHECK18-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
20833 // CHECK18-NEXT:    store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
20834 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20835 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20836 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20837 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
20838 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20839 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20840 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
20841 // CHECK18-NEXT:    [[CMP8:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
20842 // CHECK18-NEXT:    br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20843 // CHECK18:       cond.true:
20844 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
20845 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20846 // CHECK18:       cond.false:
20847 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20848 // CHECK18-NEXT:    br label [[COND_END]]
20849 // CHECK18:       cond.end:
20850 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
20851 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20852 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20853 // CHECK18-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
20854 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20855 // CHECK18:       omp.inner.for.cond:
20856 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20857 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20858 // CHECK18-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
20859 // CHECK18-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20860 // CHECK18:       omp.inner.for.body:
20861 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20862 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
20863 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20864 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I7]], align 4
20865 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I7]], align 4
20866 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
20867 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
20868 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
20869 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
20870 // CHECK18:       omp.body.continue:
20871 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20872 // CHECK18:       omp.inner.for.inc:
20873 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20874 // CHECK18-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1
20875 // CHECK18-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
20876 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20877 // CHECK18:       omp.inner.for.end:
20878 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20879 // CHECK18:       omp.loop.exit:
20880 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20881 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
20882 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
20883 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20884 // CHECK18:       omp.precond.end:
20885 // CHECK18-NEXT:    ret void
20886 //
20887 //
20888 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
20889 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20890 // CHECK18-NEXT:  entry:
20891 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20892 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20893 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20894 // CHECK18-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
20895 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20896 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20897 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20898 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20899 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20900 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20901 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20902 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
20903 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
20904 // CHECK18-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
20905 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
20906 // CHECK18-NEXT:    ret void
20907 //
20908 //
20909 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..8
20910 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20911 // CHECK18-NEXT:  entry:
20912 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20913 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20914 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20915 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20916 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20917 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20918 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20919 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20920 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20921 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20922 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20923 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20924 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20925 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20926 // CHECK18-NEXT:    [[I3:%.*]] = alloca i32, align 4
20927 // CHECK18-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
20928 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20929 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20930 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20931 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20932 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20933 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20934 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20935 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20936 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20937 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
20938 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20939 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
20940 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20941 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20942 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20943 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20944 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20945 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
20946 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20947 // CHECK18:       omp.precond.then:
20948 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20949 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20950 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
20951 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20952 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20953 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20954 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
20955 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20956 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20957 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20958 // CHECK18-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
20959 // CHECK18-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20960 // CHECK18:       cond.true:
20961 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20962 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20963 // CHECK18:       cond.false:
20964 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20965 // CHECK18-NEXT:    br label [[COND_END]]
20966 // CHECK18:       cond.end:
20967 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
20968 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20969 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20970 // CHECK18-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
20971 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20972 // CHECK18:       omp.inner.for.cond:
20973 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20974 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20975 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
20976 // CHECK18-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20977 // CHECK18:       omp.inner.for.body:
20978 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20979 // CHECK18-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
20980 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20981 // CHECK18-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
20982 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
20983 // CHECK18-NEXT:    [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
20984 // CHECK18-NEXT:    store i32 [[TMP19]], i32* [[CONV6]], align 4
20985 // CHECK18-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
20986 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
20987 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20988 // CHECK18:       omp.inner.for.inc:
20989 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20990 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20991 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
20992 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
20993 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20994 // CHECK18:       omp.inner.for.end:
20995 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20996 // CHECK18:       omp.loop.exit:
20997 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20998 // CHECK18-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
20999 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
21000 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
21001 // CHECK18:       omp.precond.end:
21002 // CHECK18-NEXT:    ret void
21003 //
21004 //
21005 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..9
21006 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
21007 // CHECK18-NEXT:  entry:
21008 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21009 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21010 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21011 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21012 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
21013 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
21014 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
21015 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21016 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21017 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
21018 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
21019 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21020 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21021 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21022 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21023 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21024 // CHECK18-NEXT:    [[I5:%.*]] = alloca i32, align 4
21025 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21026 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21027 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21028 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21029 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
21030 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
21031 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
21032 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
21033 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
21034 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
21035 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
21036 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
21037 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
21038 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
21039 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
21040 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
21041 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
21042 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
21043 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
21044 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
21045 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
21046 // CHECK18:       omp.precond.then:
21047 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21048 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
21049 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
21050 // CHECK18-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21051 // CHECK18-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
21052 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21053 // CHECK18-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
21054 // CHECK18-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
21055 // CHECK18-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
21056 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21057 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21058 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21059 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21060 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21061 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
21062 // CHECK18-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
21063 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
21064 // CHECK18:       omp.dispatch.cond:
21065 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21066 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
21067 // CHECK18-NEXT:    [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
21068 // CHECK18-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
21069 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21070 // CHECK18:       omp.dispatch.body:
21071 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21072 // CHECK18-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
21073 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21074 // CHECK18:       omp.inner.for.cond:
21075 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
21076 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
21077 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
21078 // CHECK18-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21079 // CHECK18:       omp.inner.for.body:
21080 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
21081 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
21082 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21083 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !15
21084 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !15
21085 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
21086 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
21087 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
21088 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21089 // CHECK18:       omp.body.continue:
21090 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21091 // CHECK18:       omp.inner.for.inc:
21092 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
21093 // CHECK18-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
21094 // CHECK18-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
21095 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
21096 // CHECK18:       omp.inner.for.end:
21097 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
21098 // CHECK18:       omp.dispatch.inc:
21099 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
21100 // CHECK18:       omp.dispatch.end:
21101 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
21102 // CHECK18:       omp.precond.end:
21103 // CHECK18-NEXT:    ret void
21104 //
21105 //
21106 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
21107 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21108 // CHECK18-NEXT:  entry:
21109 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
21110 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
21111 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
21112 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21113 // CHECK18-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
21114 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
21115 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
21116 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
21117 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
21118 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
21119 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
21120 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
21121 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
21122 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
21123 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
21124 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
21125 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[CONV2]], align 4
21126 // CHECK18-NEXT:    [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
21127 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
21128 // CHECK18-NEXT:    [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
21129 // CHECK18-NEXT:    store i32 [[TMP4]], i32* [[CONV3]], align 4
21130 // CHECK18-NEXT:    [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
21131 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
21132 // CHECK18-NEXT:    ret void
21133 //
21134 //
21135 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..11
21136 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21137 // CHECK18-NEXT:  entry:
21138 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21139 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21140 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
21141 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
21142 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
21143 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21144 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21145 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21146 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
21147 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
21148 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21149 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21150 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21151 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21152 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21153 // CHECK18-NEXT:    [[I5:%.*]] = alloca i32, align 4
21154 // CHECK18-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
21155 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
21156 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21157 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21158 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
21159 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
21160 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
21161 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
21162 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
21163 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
21164 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
21165 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
21166 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
21167 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
21168 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21169 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
21170 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
21171 // CHECK18-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
21172 // CHECK18-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
21173 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
21174 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21175 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
21176 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
21177 // CHECK18:       omp.precond.then:
21178 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21179 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
21180 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
21181 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21182 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21183 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21184 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
21185 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21186 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21187 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
21188 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
21189 // CHECK18-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21190 // CHECK18:       cond.true:
21191 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
21192 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21193 // CHECK18:       cond.false:
21194 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21195 // CHECK18-NEXT:    br label [[COND_END]]
21196 // CHECK18:       cond.end:
21197 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
21198 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21199 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21200 // CHECK18-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
21201 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21202 // CHECK18:       omp.inner.for.cond:
21203 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21204 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21205 // CHECK18-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
21206 // CHECK18-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21207 // CHECK18:       omp.inner.for.body:
21208 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21209 // CHECK18-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
21210 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21211 // CHECK18-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
21212 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8
21213 // CHECK18-NEXT:    [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
21214 // CHECK18-NEXT:    store i32 [[TMP19]], i32* [[CONV8]], align 4
21215 // CHECK18-NEXT:    [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
21216 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[CONV1]], align 8
21217 // CHECK18-NEXT:    [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
21218 // CHECK18-NEXT:    store i32 [[TMP21]], i32* [[CONV9]], align 4
21219 // CHECK18-NEXT:    [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
21220 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP22]])
21221 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21222 // CHECK18:       omp.inner.for.inc:
21223 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21224 // CHECK18-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21225 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
21226 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
21227 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21228 // CHECK18:       omp.inner.for.end:
21229 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21230 // CHECK18:       omp.loop.exit:
21231 // CHECK18-NEXT:    [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21232 // CHECK18-NEXT:    [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
21233 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
21234 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
21235 // CHECK18:       omp.precond.end:
21236 // CHECK18-NEXT:    ret void
21237 //
21238 //
21239 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..12
21240 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21241 // CHECK18-NEXT:  entry:
21242 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21243 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21244 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21245 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21246 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
21247 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
21248 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
21249 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21250 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21251 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21252 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
21253 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
21254 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21255 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21256 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21257 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21258 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21259 // CHECK18-NEXT:    [[I7:%.*]] = alloca i32, align 4
21260 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21261 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21262 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21263 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21264 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
21265 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
21266 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
21267 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
21268 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
21269 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
21270 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
21271 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
21272 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
21273 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
21274 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21275 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
21276 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
21277 // CHECK18-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
21278 // CHECK18-NEXT:    store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
21279 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
21280 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21281 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
21282 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
21283 // CHECK18:       omp.precond.then:
21284 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21285 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
21286 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
21287 // CHECK18-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21288 // CHECK18-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
21289 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21290 // CHECK18-NEXT:    [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
21291 // CHECK18-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
21292 // CHECK18-NEXT:    store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
21293 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21294 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21295 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[CONV1]], align 8
21296 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21297 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21298 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21299 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
21300 // CHECK18-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
21301 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
21302 // CHECK18:       omp.dispatch.cond:
21303 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21304 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
21305 // CHECK18-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
21306 // CHECK18-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
21307 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21308 // CHECK18:       omp.dispatch.body:
21309 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21310 // CHECK18-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
21311 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21312 // CHECK18:       omp.inner.for.cond:
21313 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
21314 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
21315 // CHECK18-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
21316 // CHECK18-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21317 // CHECK18:       omp.inner.for.body:
21318 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
21319 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
21320 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21321 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I7]], align 4, !llvm.access.group !18
21322 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !18
21323 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
21324 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
21325 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
21326 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21327 // CHECK18:       omp.body.continue:
21328 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21329 // CHECK18:       omp.inner.for.inc:
21330 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
21331 // CHECK18-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
21332 // CHECK18-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
21333 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
21334 // CHECK18:       omp.inner.for.end:
21335 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
21336 // CHECK18:       omp.dispatch.inc:
21337 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
21338 // CHECK18:       omp.dispatch.end:
21339 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
21340 // CHECK18:       omp.precond.end:
21341 // CHECK18-NEXT:    ret void
21342 //
21343 //
21344 // CHECK18-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
21345 // CHECK18-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
21346 // CHECK18-NEXT:  entry:
21347 // CHECK18-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
21348 // CHECK18-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
21349 // CHECK18-NEXT:    [[M:%.*]] = alloca i32, align 4
21350 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
21351 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
21352 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
21353 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21354 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
21355 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
21356 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
21357 // CHECK18-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
21358 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
21359 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
21360 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
21361 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
21362 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
21363 // CHECK18-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
21364 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
21365 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
21366 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
21367 // CHECK18-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
21368 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
21369 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i64, align 8
21370 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [2 x i8*], align 8
21371 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS23:%.*]] = alloca [2 x i8*], align 8
21372 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [2 x i8*], align 8
21373 // CHECK18-NEXT:    [[_TMP25:%.*]] = alloca i32, align 4
21374 // CHECK18-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
21375 // CHECK18-NEXT:    store i32 10, i32* [[M]], align 4
21376 // CHECK18-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
21377 // CHECK18-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
21378 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
21379 // CHECK18-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
21380 // CHECK18-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
21381 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
21382 // CHECK18-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
21383 // CHECK18-NEXT:    store i8* null, i8** [[TMP4]], align 8
21384 // CHECK18-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
21385 // CHECK18-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
21386 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21387 // CHECK18-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21388 // CHECK18-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
21389 // CHECK18-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
21390 // CHECK18:       omp_offload.failed:
21391 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
21392 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT]]
21393 // CHECK18:       omp_offload.cont:
21394 // CHECK18-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
21395 // CHECK18-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
21396 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
21397 // CHECK18-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
21398 // CHECK18-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
21399 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
21400 // CHECK18-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
21401 // CHECK18-NEXT:    store i8* null, i8** [[TMP13]], align 8
21402 // CHECK18-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
21403 // CHECK18-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
21404 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21405 // CHECK18-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21406 // CHECK18-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
21407 // CHECK18-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
21408 // CHECK18:       omp_offload.failed5:
21409 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
21410 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
21411 // CHECK18:       omp_offload.cont6:
21412 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
21413 // CHECK18-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR_]], align 4
21414 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
21415 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
21416 // CHECK18-NEXT:    store i32 [[TMP19]], i32* [[CONV]], align 4
21417 // CHECK18-NEXT:    [[TMP20:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
21418 // CHECK18-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
21419 // CHECK18-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [10 x i32]**
21420 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP22]], align 8
21421 // CHECK18-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
21422 // CHECK18-NEXT:    [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [10 x i32]**
21423 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP24]], align 8
21424 // CHECK18-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
21425 // CHECK18-NEXT:    store i8* null, i8** [[TMP25]], align 8
21426 // CHECK18-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
21427 // CHECK18-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
21428 // CHECK18-NEXT:    store i64 [[TMP20]], i64* [[TMP27]], align 8
21429 // CHECK18-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
21430 // CHECK18-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
21431 // CHECK18-NEXT:    store i64 [[TMP20]], i64* [[TMP29]], align 8
21432 // CHECK18-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
21433 // CHECK18-NEXT:    store i8* null, i8** [[TMP30]], align 8
21434 // CHECK18-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
21435 // CHECK18-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
21436 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21437 // CHECK18-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, i32 2, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21438 // CHECK18-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
21439 // CHECK18-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
21440 // CHECK18:       omp_offload.failed11:
21441 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i64 [[TMP20]]) #[[ATTR3]]
21442 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
21443 // CHECK18:       omp_offload.cont12:
21444 // CHECK18-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
21445 // CHECK18-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to [10 x i32]**
21446 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP36]], align 8
21447 // CHECK18-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
21448 // CHECK18-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to [10 x i32]**
21449 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP38]], align 8
21450 // CHECK18-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
21451 // CHECK18-NEXT:    store i8* null, i8** [[TMP39]], align 8
21452 // CHECK18-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
21453 // CHECK18-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
21454 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21455 // CHECK18-NEXT:    [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, i32 1, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21456 // CHECK18-NEXT:    [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
21457 // CHECK18-NEXT:    br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
21458 // CHECK18:       omp_offload.failed17:
21459 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
21460 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
21461 // CHECK18:       omp_offload.cont18:
21462 // CHECK18-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M]], align 4
21463 // CHECK18-NEXT:    store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_19]], align 4
21464 // CHECK18-NEXT:    [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
21465 // CHECK18-NEXT:    [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED20]] to i32*
21466 // CHECK18-NEXT:    store i32 [[TMP45]], i32* [[CONV21]], align 4
21467 // CHECK18-NEXT:    [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED20]], align 8
21468 // CHECK18-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
21469 // CHECK18-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to [10 x i32]**
21470 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP48]], align 8
21471 // CHECK18-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
21472 // CHECK18-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to [10 x i32]**
21473 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP50]], align 8
21474 // CHECK18-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
21475 // CHECK18-NEXT:    store i8* null, i8** [[TMP51]], align 8
21476 // CHECK18-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
21477 // CHECK18-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
21478 // CHECK18-NEXT:    store i64 [[TMP46]], i64* [[TMP53]], align 8
21479 // CHECK18-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
21480 // CHECK18-NEXT:    [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i64*
21481 // CHECK18-NEXT:    store i64 [[TMP46]], i64* [[TMP55]], align 8
21482 // CHECK18-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
21483 // CHECK18-NEXT:    store i8* null, i8** [[TMP56]], align 8
21484 // CHECK18-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
21485 // CHECK18-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
21486 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21487 // CHECK18-NEXT:    [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, i32 2, i8** [[TMP57]], i8** [[TMP58]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21488 // CHECK18-NEXT:    [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0
21489 // CHECK18-NEXT:    br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED26:%.*]], label [[OMP_OFFLOAD_CONT27:%.*]]
21490 // CHECK18:       omp_offload.failed26:
21491 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i64 [[TMP46]]) #[[ATTR3]]
21492 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT27]]
21493 // CHECK18:       omp_offload.cont27:
21494 // CHECK18-NEXT:    ret i32 0
21495 //
21496 //
21497 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
21498 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21499 // CHECK18-NEXT:  entry:
21500 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21501 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21502 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21503 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
21504 // CHECK18-NEXT:    ret void
21505 //
21506 //
21507 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..14
21508 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21509 // CHECK18-NEXT:  entry:
21510 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21511 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21512 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21513 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21514 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21515 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21516 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21517 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21518 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21519 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21520 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21521 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21522 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21523 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21524 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21525 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21526 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21527 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21528 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21529 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21530 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21531 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21532 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21533 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21534 // CHECK18:       cond.true:
21535 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21536 // CHECK18:       cond.false:
21537 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21538 // CHECK18-NEXT:    br label [[COND_END]]
21539 // CHECK18:       cond.end:
21540 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21541 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21542 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21543 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21544 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21545 // CHECK18:       omp.inner.for.cond:
21546 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21547 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21548 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21549 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21550 // CHECK18:       omp.inner.for.body:
21551 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21552 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
21553 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21554 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
21555 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
21556 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21557 // CHECK18:       omp.inner.for.inc:
21558 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21559 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21560 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
21561 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
21562 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21563 // CHECK18:       omp.inner.for.end:
21564 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21565 // CHECK18:       omp.loop.exit:
21566 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21567 // CHECK18-NEXT:    ret void
21568 //
21569 //
21570 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..15
21571 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21572 // CHECK18-NEXT:  entry:
21573 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21574 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21575 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21576 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21577 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21578 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21579 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21580 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21581 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21582 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21583 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21584 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21585 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21586 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21587 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21588 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21589 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21590 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21591 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21592 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
21593 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21594 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
21595 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21596 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
21597 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
21598 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
21599 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21600 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21601 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21602 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
21603 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21604 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21605 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
21606 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21607 // CHECK18:       cond.true:
21608 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21609 // CHECK18:       cond.false:
21610 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21611 // CHECK18-NEXT:    br label [[COND_END]]
21612 // CHECK18:       cond.end:
21613 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
21614 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
21615 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21616 // CHECK18-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
21617 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21618 // CHECK18:       omp.inner.for.cond:
21619 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21620 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21621 // CHECK18-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
21622 // CHECK18-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21623 // CHECK18:       omp.inner.for.body:
21624 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21625 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
21626 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21627 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
21628 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
21629 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
21630 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
21631 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
21632 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21633 // CHECK18:       omp.body.continue:
21634 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21635 // CHECK18:       omp.inner.for.inc:
21636 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21637 // CHECK18-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
21638 // CHECK18-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
21639 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21640 // CHECK18:       omp.inner.for.end:
21641 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21642 // CHECK18:       omp.loop.exit:
21643 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
21644 // CHECK18-NEXT:    ret void
21645 //
21646 //
21647 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
21648 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21649 // CHECK18-NEXT:  entry:
21650 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21651 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21652 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21653 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
21654 // CHECK18-NEXT:    ret void
21655 //
21656 //
21657 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..17
21658 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21659 // CHECK18-NEXT:  entry:
21660 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21661 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21662 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21663 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21664 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21665 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21666 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21667 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21668 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21669 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21670 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21671 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21672 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21673 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21674 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21675 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21676 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21677 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21678 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21679 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21680 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21681 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21682 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21683 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21684 // CHECK18:       cond.true:
21685 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21686 // CHECK18:       cond.false:
21687 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21688 // CHECK18-NEXT:    br label [[COND_END]]
21689 // CHECK18:       cond.end:
21690 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21691 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21692 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21693 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21694 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21695 // CHECK18:       omp.inner.for.cond:
21696 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21697 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21698 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21699 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21700 // CHECK18:       omp.inner.for.body:
21701 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21702 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
21703 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21704 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
21705 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
21706 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21707 // CHECK18:       omp.inner.for.inc:
21708 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21709 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21710 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
21711 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
21712 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21713 // CHECK18:       omp.inner.for.end:
21714 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21715 // CHECK18:       omp.loop.exit:
21716 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21717 // CHECK18-NEXT:    ret void
21718 //
21719 //
21720 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..18
21721 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21722 // CHECK18-NEXT:  entry:
21723 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21724 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21725 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21726 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21727 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21728 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21729 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21730 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21731 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21732 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21733 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21734 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21735 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21736 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21737 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21738 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21739 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21740 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21741 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21742 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
21743 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21744 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
21745 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21746 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
21747 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
21748 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
21749 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21750 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21751 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21752 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
21753 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21754 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21755 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
21756 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21757 // CHECK18:       cond.true:
21758 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21759 // CHECK18:       cond.false:
21760 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21761 // CHECK18-NEXT:    br label [[COND_END]]
21762 // CHECK18:       cond.end:
21763 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
21764 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
21765 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21766 // CHECK18-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
21767 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21768 // CHECK18:       omp.inner.for.cond:
21769 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21770 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21771 // CHECK18-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
21772 // CHECK18-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21773 // CHECK18:       omp.inner.for.body:
21774 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21775 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
21776 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21777 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
21778 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
21779 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
21780 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
21781 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
21782 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21783 // CHECK18:       omp.body.continue:
21784 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21785 // CHECK18:       omp.inner.for.inc:
21786 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21787 // CHECK18-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
21788 // CHECK18-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
21789 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21790 // CHECK18:       omp.inner.for.end:
21791 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21792 // CHECK18:       omp.loop.exit:
21793 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
21794 // CHECK18-NEXT:    ret void
21795 //
21796 //
21797 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
21798 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21799 // CHECK18-NEXT:  entry:
21800 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21801 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21802 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
21803 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21804 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
21805 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21806 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
21807 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
21808 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
21809 // CHECK18-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
21810 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
21811 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
21812 // CHECK18-NEXT:    ret void
21813 //
21814 //
21815 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..21
21816 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21817 // CHECK18-NEXT:  entry:
21818 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21819 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21820 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21821 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21822 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21823 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21824 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21825 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21826 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21827 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21828 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21829 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
21830 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21831 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21832 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21833 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
21834 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21835 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
21836 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21837 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21838 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21839 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21840 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21841 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21842 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21843 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21844 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21845 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21846 // CHECK18:       cond.true:
21847 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21848 // CHECK18:       cond.false:
21849 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21850 // CHECK18-NEXT:    br label [[COND_END]]
21851 // CHECK18:       cond.end:
21852 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21853 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21854 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21855 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21856 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21857 // CHECK18:       omp.inner.for.cond:
21858 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21859 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21860 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21861 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21862 // CHECK18:       omp.inner.for.body:
21863 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21864 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
21865 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21866 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
21867 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
21868 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
21869 // CHECK18-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
21870 // CHECK18-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
21871 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
21872 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21873 // CHECK18:       omp.inner.for.inc:
21874 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21875 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21876 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
21877 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
21878 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21879 // CHECK18:       omp.inner.for.end:
21880 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21881 // CHECK18:       omp.loop.exit:
21882 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21883 // CHECK18-NEXT:    ret void
21884 //
21885 //
21886 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..22
21887 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21888 // CHECK18-NEXT:  entry:
21889 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21890 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21891 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21892 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21893 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21894 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21895 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21896 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21897 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21898 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21899 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21900 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21901 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21902 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21903 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21904 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21905 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21906 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21907 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
21908 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21909 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
21910 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21911 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
21912 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21913 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
21914 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21915 // CHECK18-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
21916 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
21917 // CHECK18-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
21918 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21919 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21920 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
21921 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21922 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
21923 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
21924 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
21925 // CHECK18:       omp.dispatch.cond:
21926 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21927 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21928 // CHECK18-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
21929 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
21930 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21931 // CHECK18:       cond.true:
21932 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21933 // CHECK18-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
21934 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21935 // CHECK18:       cond.false:
21936 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21937 // CHECK18-NEXT:    br label [[COND_END]]
21938 // CHECK18:       cond.end:
21939 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
21940 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
21941 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21942 // CHECK18-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
21943 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21944 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21945 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
21946 // CHECK18-NEXT:    br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21947 // CHECK18:       omp.dispatch.body:
21948 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21949 // CHECK18:       omp.inner.for.cond:
21950 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21951 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21952 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
21953 // CHECK18-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21954 // CHECK18:       omp.inner.for.body:
21955 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21956 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
21957 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21958 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
21959 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
21960 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
21961 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
21962 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
21963 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21964 // CHECK18:       omp.body.continue:
21965 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21966 // CHECK18:       omp.inner.for.inc:
21967 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21968 // CHECK18-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
21969 // CHECK18-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
21970 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21971 // CHECK18:       omp.inner.for.end:
21972 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
21973 // CHECK18:       omp.dispatch.inc:
21974 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21975 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21976 // CHECK18-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
21977 // CHECK18-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
21978 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21979 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21980 // CHECK18-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
21981 // CHECK18-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
21982 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
21983 // CHECK18:       omp.dispatch.end:
21984 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
21985 // CHECK18-NEXT:    ret void
21986 //
21987 //
21988 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
21989 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21990 // CHECK18-NEXT:  entry:
21991 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21992 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21993 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21994 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
21995 // CHECK18-NEXT:    ret void
21996 //
21997 //
21998 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..25
21999 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
22000 // CHECK18-NEXT:  entry:
22001 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
22002 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
22003 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22004 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22005 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22006 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22007 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22008 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22009 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22010 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
22011 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
22012 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
22013 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22014 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22015 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22016 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
22017 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22018 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22019 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
22020 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
22021 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22022 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22023 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
22024 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22025 // CHECK18:       cond.true:
22026 // CHECK18-NEXT:    br label [[COND_END:%.*]]
22027 // CHECK18:       cond.false:
22028 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22029 // CHECK18-NEXT:    br label [[COND_END]]
22030 // CHECK18:       cond.end:
22031 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
22032 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22033 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22034 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
22035 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22036 // CHECK18:       omp.inner.for.cond:
22037 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22038 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22039 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
22040 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22041 // CHECK18:       omp.inner.for.body:
22042 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22043 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
22044 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22045 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
22046 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
22047 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22048 // CHECK18:       omp.inner.for.inc:
22049 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22050 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
22051 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
22052 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
22053 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
22054 // CHECK18:       omp.inner.for.end:
22055 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
22056 // CHECK18:       omp.loop.exit:
22057 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
22058 // CHECK18-NEXT:    ret void
22059 //
22060 //
22061 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..26
22062 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
22063 // CHECK18-NEXT:  entry:
22064 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
22065 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
22066 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
22067 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
22068 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22069 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22070 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22071 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
22072 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
22073 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22074 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22075 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
22076 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
22077 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
22078 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
22079 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
22080 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22081 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22082 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
22083 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
22084 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
22085 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
22086 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
22087 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
22088 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
22089 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
22090 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22091 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22092 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22093 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22094 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
22095 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
22096 // CHECK18-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
22097 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
22098 // CHECK18:       omp.dispatch.cond:
22099 // CHECK18-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
22100 // CHECK18-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
22101 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
22102 // CHECK18:       omp.dispatch.body:
22103 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22104 // CHECK18-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
22105 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22106 // CHECK18:       omp.inner.for.cond:
22107 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
22108 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
22109 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
22110 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22111 // CHECK18:       omp.inner.for.body:
22112 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
22113 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
22114 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22115 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
22116 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
22117 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
22118 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
22119 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
22120 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
22121 // CHECK18:       omp.body.continue:
22122 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22123 // CHECK18:       omp.inner.for.inc:
22124 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
22125 // CHECK18-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
22126 // CHECK18-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
22127 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
22128 // CHECK18:       omp.inner.for.end:
22129 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
22130 // CHECK18:       omp.dispatch.inc:
22131 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
22132 // CHECK18:       omp.dispatch.end:
22133 // CHECK18-NEXT:    ret void
22134 //
22135 //
22136 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
22137 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
22138 // CHECK18-NEXT:  entry:
22139 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22140 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
22141 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
22142 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22143 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
22144 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22145 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
22146 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
22147 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
22148 // CHECK18-NEXT:    store i32 [[TMP1]], i32* [[CONV1]], align 4
22149 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
22150 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
22151 // CHECK18-NEXT:    ret void
22152 //
22153 //
22154 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..29
22155 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
22156 // CHECK18-NEXT:  entry:
22157 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
22158 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
22159 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22160 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
22161 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22162 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22163 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22164 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22165 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22166 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22167 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
22168 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
22169 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
22170 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
22171 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22172 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
22173 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22174 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
22175 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22176 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
22177 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22178 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22179 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
22180 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
22181 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22182 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22183 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
22184 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22185 // CHECK18:       cond.true:
22186 // CHECK18-NEXT:    br label [[COND_END:%.*]]
22187 // CHECK18:       cond.false:
22188 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22189 // CHECK18-NEXT:    br label [[COND_END]]
22190 // CHECK18:       cond.end:
22191 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
22192 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22193 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22194 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
22195 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22196 // CHECK18:       omp.inner.for.cond:
22197 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22198 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22199 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
22200 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22201 // CHECK18:       omp.inner.for.body:
22202 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22203 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
22204 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22205 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
22206 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
22207 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
22208 // CHECK18-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
22209 // CHECK18-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
22210 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
22211 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22212 // CHECK18:       omp.inner.for.inc:
22213 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22214 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
22215 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
22216 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
22217 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
22218 // CHECK18:       omp.inner.for.end:
22219 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
22220 // CHECK18:       omp.loop.exit:
22221 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
22222 // CHECK18-NEXT:    ret void
22223 //
22224 //
22225 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..30
22226 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
22227 // CHECK18-NEXT:  entry:
22228 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
22229 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
22230 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
22231 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
22232 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22233 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
22234 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22235 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22236 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
22237 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
22238 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22239 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22240 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
22241 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
22242 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
22243 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
22244 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
22245 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22246 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
22247 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22248 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
22249 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
22250 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
22251 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
22252 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
22253 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
22254 // CHECK18-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
22255 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
22256 // CHECK18-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
22257 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22258 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22259 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
22260 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22261 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22262 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
22263 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
22264 // CHECK18-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
22265 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
22266 // CHECK18:       omp.dispatch.cond:
22267 // CHECK18-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
22268 // CHECK18-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
22269 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
22270 // CHECK18:       omp.dispatch.body:
22271 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22272 // CHECK18-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
22273 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22274 // CHECK18:       omp.inner.for.cond:
22275 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
22276 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
22277 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
22278 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22279 // CHECK18:       omp.inner.for.body:
22280 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
22281 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
22282 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22283 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
22284 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
22285 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
22286 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
22287 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
22288 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
22289 // CHECK18:       omp.body.continue:
22290 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22291 // CHECK18:       omp.inner.for.inc:
22292 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
22293 // CHECK18-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
22294 // CHECK18-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
22295 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
22296 // CHECK18:       omp.inner.for.end:
22297 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
22298 // CHECK18:       omp.dispatch.inc:
22299 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
22300 // CHECK18:       omp.dispatch.end:
22301 // CHECK18-NEXT:    ret void
22302 //
22303 //
22304 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
22305 // CHECK18-SAME: () #[[ATTR5:[0-9]+]] {
22306 // CHECK18-NEXT:  entry:
22307 // CHECK18-NEXT:    call void @__tgt_register_requires(i64 1)
22308 // CHECK18-NEXT:    ret void
22309 //
22310 //
22311 // CHECK19-LABEL: define {{[^@]+}}@main
22312 // CHECK19-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
22313 // CHECK19-NEXT:  entry:
22314 // CHECK19-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
22315 // CHECK19-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
22316 // CHECK19-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
22317 // CHECK19-NEXT:    [[N:%.*]] = alloca i32, align 4
22318 // CHECK19-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
22319 // CHECK19-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
22320 // CHECK19-NEXT:    [[M:%.*]] = alloca i32, align 4
22321 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
22322 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
22323 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
22324 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
22325 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
22326 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22327 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22328 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22329 // CHECK19-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
22330 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
22331 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
22332 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
22333 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
22334 // CHECK19-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
22335 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
22336 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
22337 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
22338 // CHECK19-NEXT:    [[N_CASTED18:%.*]] = alloca i32, align 4
22339 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
22340 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4
22341 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4
22342 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4
22343 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4
22344 // CHECK19-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
22345 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
22346 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
22347 // CHECK19-NEXT:    [[N_CASTED32:%.*]] = alloca i32, align 4
22348 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS33:%.*]] = alloca [3 x i8*], align 4
22349 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS34:%.*]] = alloca [3 x i8*], align 4
22350 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS35:%.*]] = alloca [3 x i8*], align 4
22351 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES36:%.*]] = alloca [3 x i64], align 4
22352 // CHECK19-NEXT:    [[_TMP37:%.*]] = alloca i32, align 4
22353 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
22354 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
22355 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_46:%.*]] = alloca i32, align 4
22356 // CHECK19-NEXT:    [[N_CASTED47:%.*]] = alloca i32, align 4
22357 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED48:%.*]] = alloca i32, align 4
22358 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS49:%.*]] = alloca [4 x i8*], align 4
22359 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS50:%.*]] = alloca [4 x i8*], align 4
22360 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS51:%.*]] = alloca [4 x i8*], align 4
22361 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES52:%.*]] = alloca [4 x i64], align 4
22362 // CHECK19-NEXT:    [[_TMP53:%.*]] = alloca i32, align 4
22363 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_54:%.*]] = alloca i32, align 4
22364 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4
22365 // CHECK19-NEXT:    store i32 0, i32* [[RETVAL]], align 4
22366 // CHECK19-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
22367 // CHECK19-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
22368 // CHECK19-NEXT:    store i32 100, i32* [[N]], align 4
22369 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
22370 // CHECK19-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
22371 // CHECK19-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
22372 // CHECK19-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
22373 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
22374 // CHECK19-NEXT:    store i32 10, i32* [[M]], align 4
22375 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
22376 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
22377 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
22378 // CHECK19-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
22379 // CHECK19-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
22380 // CHECK19-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
22381 // CHECK19-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
22382 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
22383 // CHECK19-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
22384 // CHECK19-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
22385 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
22386 // CHECK19-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
22387 // CHECK19-NEXT:    store i64 4, i64* [[TMP10]], align 4
22388 // CHECK19-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
22389 // CHECK19-NEXT:    store i8* null, i8** [[TMP11]], align 4
22390 // CHECK19-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
22391 // CHECK19-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
22392 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
22393 // CHECK19-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
22394 // CHECK19-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
22395 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
22396 // CHECK19-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
22397 // CHECK19-NEXT:    store i64 4, i64* [[TMP16]], align 4
22398 // CHECK19-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
22399 // CHECK19-NEXT:    store i8* null, i8** [[TMP17]], align 4
22400 // CHECK19-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
22401 // CHECK19-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
22402 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
22403 // CHECK19-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
22404 // CHECK19-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
22405 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
22406 // CHECK19-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
22407 // CHECK19-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
22408 // CHECK19-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
22409 // CHECK19-NEXT:    store i8* null, i8** [[TMP23]], align 4
22410 // CHECK19-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
22411 // CHECK19-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
22412 // CHECK19-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
22413 // CHECK19-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
22414 // CHECK19-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
22415 // CHECK19-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22416 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
22417 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22418 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22419 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22420 // CHECK19-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22421 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
22422 // CHECK19-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
22423 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
22424 // CHECK19-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22425 // CHECK19-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
22426 // CHECK19-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
22427 // CHECK19:       omp_offload.failed:
22428 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
22429 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
22430 // CHECK19:       omp_offload.cont:
22431 // CHECK19-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
22432 // CHECK19-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
22433 // CHECK19-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
22434 // CHECK19-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
22435 // CHECK19-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
22436 // CHECK19-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
22437 // CHECK19-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
22438 // CHECK19-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
22439 // CHECK19-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
22440 // CHECK19-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
22441 // CHECK19-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
22442 // CHECK19-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
22443 // CHECK19-NEXT:    store i64 4, i64* [[TMP41]], align 4
22444 // CHECK19-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
22445 // CHECK19-NEXT:    store i8* null, i8** [[TMP42]], align 4
22446 // CHECK19-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
22447 // CHECK19-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
22448 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
22449 // CHECK19-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
22450 // CHECK19-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
22451 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
22452 // CHECK19-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
22453 // CHECK19-NEXT:    store i64 4, i64* [[TMP47]], align 4
22454 // CHECK19-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
22455 // CHECK19-NEXT:    store i8* null, i8** [[TMP48]], align 4
22456 // CHECK19-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
22457 // CHECK19-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
22458 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
22459 // CHECK19-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
22460 // CHECK19-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
22461 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
22462 // CHECK19-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
22463 // CHECK19-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
22464 // CHECK19-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
22465 // CHECK19-NEXT:    store i8* null, i8** [[TMP54]], align 4
22466 // CHECK19-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
22467 // CHECK19-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
22468 // CHECK19-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
22469 // CHECK19-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
22470 // CHECK19-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
22471 // CHECK19-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
22472 // CHECK19-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
22473 // CHECK19-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
22474 // CHECK19-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
22475 // CHECK19-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
22476 // CHECK19-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
22477 // CHECK19-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
22478 // CHECK19-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
22479 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
22480 // CHECK19-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22481 // CHECK19-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
22482 // CHECK19-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
22483 // CHECK19:       omp_offload.failed15:
22484 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22485 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
22486 // CHECK19:       omp_offload.cont16:
22487 // CHECK19-NEXT:    [[TMP64:%.*]] = load i32, i32* [[M]], align 4
22488 // CHECK19-NEXT:    store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_17]], align 4
22489 // CHECK19-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N]], align 4
22490 // CHECK19-NEXT:    store i32 [[TMP65]], i32* [[N_CASTED18]], align 4
22491 // CHECK19-NEXT:    [[TMP66:%.*]] = load i32, i32* [[N_CASTED18]], align 4
22492 // CHECK19-NEXT:    [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
22493 // CHECK19-NEXT:    store i32 [[TMP67]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
22494 // CHECK19-NEXT:    [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
22495 // CHECK19-NEXT:    [[TMP69:%.*]] = mul nuw i32 [[TMP0]], 4
22496 // CHECK19-NEXT:    [[TMP70:%.*]] = sext i32 [[TMP69]] to i64
22497 // CHECK19-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
22498 // CHECK19-NEXT:    [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32*
22499 // CHECK19-NEXT:    store i32 [[TMP66]], i32* [[TMP72]], align 4
22500 // CHECK19-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
22501 // CHECK19-NEXT:    [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32*
22502 // CHECK19-NEXT:    store i32 [[TMP66]], i32* [[TMP74]], align 4
22503 // CHECK19-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
22504 // CHECK19-NEXT:    store i64 4, i64* [[TMP75]], align 4
22505 // CHECK19-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
22506 // CHECK19-NEXT:    store i8* null, i8** [[TMP76]], align 4
22507 // CHECK19-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
22508 // CHECK19-NEXT:    [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32*
22509 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP78]], align 4
22510 // CHECK19-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
22511 // CHECK19-NEXT:    [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32*
22512 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP80]], align 4
22513 // CHECK19-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 1
22514 // CHECK19-NEXT:    store i64 4, i64* [[TMP81]], align 4
22515 // CHECK19-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1
22516 // CHECK19-NEXT:    store i8* null, i8** [[TMP82]], align 4
22517 // CHECK19-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
22518 // CHECK19-NEXT:    [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
22519 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP84]], align 4
22520 // CHECK19-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
22521 // CHECK19-NEXT:    [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32**
22522 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP86]], align 4
22523 // CHECK19-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2
22524 // CHECK19-NEXT:    store i64 [[TMP70]], i64* [[TMP87]], align 4
22525 // CHECK19-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2
22526 // CHECK19-NEXT:    store i8* null, i8** [[TMP88]], align 4
22527 // CHECK19-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
22528 // CHECK19-NEXT:    [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i32*
22529 // CHECK19-NEXT:    store i32 [[TMP68]], i32* [[TMP90]], align 4
22530 // CHECK19-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
22531 // CHECK19-NEXT:    [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i32*
22532 // CHECK19-NEXT:    store i32 [[TMP68]], i32* [[TMP92]], align 4
22533 // CHECK19-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
22534 // CHECK19-NEXT:    store i64 4, i64* [[TMP93]], align 4
22535 // CHECK19-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3
22536 // CHECK19-NEXT:    store i8* null, i8** [[TMP94]], align 4
22537 // CHECK19-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
22538 // CHECK19-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
22539 // CHECK19-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
22540 // CHECK19-NEXT:    [[TMP98:%.*]] = load i32, i32* [[N]], align 4
22541 // CHECK19-NEXT:    store i32 [[TMP98]], i32* [[DOTCAPTURE_EXPR_24]], align 4
22542 // CHECK19-NEXT:    [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
22543 // CHECK19-NEXT:    [[SUB26:%.*]] = sub nsw i32 [[TMP99]], 0
22544 // CHECK19-NEXT:    [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
22545 // CHECK19-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
22546 // CHECK19-NEXT:    store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4
22547 // CHECK19-NEXT:    [[TMP100:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
22548 // CHECK19-NEXT:    [[ADD29:%.*]] = add nsw i32 [[TMP100]], 1
22549 // CHECK19-NEXT:    [[TMP101:%.*]] = zext i32 [[ADD29]] to i64
22550 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP101]])
22551 // CHECK19-NEXT:    [[TMP102:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, i32 4, i8** [[TMP95]], i8** [[TMP96]], i64* [[TMP97]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22552 // CHECK19-NEXT:    [[TMP103:%.*]] = icmp ne i32 [[TMP102]], 0
22553 // CHECK19-NEXT:    br i1 [[TMP103]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]]
22554 // CHECK19:       omp_offload.failed30:
22555 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP66]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP68]]) #[[ATTR3]]
22556 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT31]]
22557 // CHECK19:       omp_offload.cont31:
22558 // CHECK19-NEXT:    [[TMP104:%.*]] = load i32, i32* [[N]], align 4
22559 // CHECK19-NEXT:    store i32 [[TMP104]], i32* [[N_CASTED32]], align 4
22560 // CHECK19-NEXT:    [[TMP105:%.*]] = load i32, i32* [[N_CASTED32]], align 4
22561 // CHECK19-NEXT:    [[TMP106:%.*]] = mul nuw i32 [[TMP0]], 4
22562 // CHECK19-NEXT:    [[TMP107:%.*]] = sext i32 [[TMP106]] to i64
22563 // CHECK19-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 0
22564 // CHECK19-NEXT:    [[TMP109:%.*]] = bitcast i8** [[TMP108]] to i32*
22565 // CHECK19-NEXT:    store i32 [[TMP105]], i32* [[TMP109]], align 4
22566 // CHECK19-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 0
22567 // CHECK19-NEXT:    [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i32*
22568 // CHECK19-NEXT:    store i32 [[TMP105]], i32* [[TMP111]], align 4
22569 // CHECK19-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 0
22570 // CHECK19-NEXT:    store i64 4, i64* [[TMP112]], align 4
22571 // CHECK19-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 0
22572 // CHECK19-NEXT:    store i8* null, i8** [[TMP113]], align 4
22573 // CHECK19-NEXT:    [[TMP114:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 1
22574 // CHECK19-NEXT:    [[TMP115:%.*]] = bitcast i8** [[TMP114]] to i32*
22575 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP115]], align 4
22576 // CHECK19-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 1
22577 // CHECK19-NEXT:    [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32*
22578 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP117]], align 4
22579 // CHECK19-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 1
22580 // CHECK19-NEXT:    store i64 4, i64* [[TMP118]], align 4
22581 // CHECK19-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 1
22582 // CHECK19-NEXT:    store i8* null, i8** [[TMP119]], align 4
22583 // CHECK19-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 2
22584 // CHECK19-NEXT:    [[TMP121:%.*]] = bitcast i8** [[TMP120]] to i32**
22585 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP121]], align 4
22586 // CHECK19-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 2
22587 // CHECK19-NEXT:    [[TMP123:%.*]] = bitcast i8** [[TMP122]] to i32**
22588 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP123]], align 4
22589 // CHECK19-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 2
22590 // CHECK19-NEXT:    store i64 [[TMP107]], i64* [[TMP124]], align 4
22591 // CHECK19-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 2
22592 // CHECK19-NEXT:    store i8* null, i8** [[TMP125]], align 4
22593 // CHECK19-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 0
22594 // CHECK19-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 0
22595 // CHECK19-NEXT:    [[TMP128:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 0
22596 // CHECK19-NEXT:    [[TMP129:%.*]] = load i32, i32* [[N]], align 4
22597 // CHECK19-NEXT:    store i32 [[TMP129]], i32* [[DOTCAPTURE_EXPR_38]], align 4
22598 // CHECK19-NEXT:    [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
22599 // CHECK19-NEXT:    [[SUB40:%.*]] = sub nsw i32 [[TMP130]], 0
22600 // CHECK19-NEXT:    [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
22601 // CHECK19-NEXT:    [[SUB42:%.*]] = sub nsw i32 [[DIV41]], 1
22602 // CHECK19-NEXT:    store i32 [[SUB42]], i32* [[DOTCAPTURE_EXPR_39]], align 4
22603 // CHECK19-NEXT:    [[TMP131:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_39]], align 4
22604 // CHECK19-NEXT:    [[ADD43:%.*]] = add nsw i32 [[TMP131]], 1
22605 // CHECK19-NEXT:    [[TMP132:%.*]] = zext i32 [[ADD43]] to i64
22606 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP132]])
22607 // CHECK19-NEXT:    [[TMP133:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, i32 3, i8** [[TMP126]], i8** [[TMP127]], i64* [[TMP128]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22608 // CHECK19-NEXT:    [[TMP134:%.*]] = icmp ne i32 [[TMP133]], 0
22609 // CHECK19-NEXT:    br i1 [[TMP134]], label [[OMP_OFFLOAD_FAILED44:%.*]], label [[OMP_OFFLOAD_CONT45:%.*]]
22610 // CHECK19:       omp_offload.failed44:
22611 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP105]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22612 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT45]]
22613 // CHECK19:       omp_offload.cont45:
22614 // CHECK19-NEXT:    [[TMP135:%.*]] = load i32, i32* [[M]], align 4
22615 // CHECK19-NEXT:    store i32 [[TMP135]], i32* [[DOTCAPTURE_EXPR_46]], align 4
22616 // CHECK19-NEXT:    [[TMP136:%.*]] = load i32, i32* [[N]], align 4
22617 // CHECK19-NEXT:    store i32 [[TMP136]], i32* [[N_CASTED47]], align 4
22618 // CHECK19-NEXT:    [[TMP137:%.*]] = load i32, i32* [[N_CASTED47]], align 4
22619 // CHECK19-NEXT:    [[TMP138:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_46]], align 4
22620 // CHECK19-NEXT:    store i32 [[TMP138]], i32* [[DOTCAPTURE_EXPR__CASTED48]], align 4
22621 // CHECK19-NEXT:    [[TMP139:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED48]], align 4
22622 // CHECK19-NEXT:    [[TMP140:%.*]] = mul nuw i32 [[TMP0]], 4
22623 // CHECK19-NEXT:    [[TMP141:%.*]] = sext i32 [[TMP140]] to i64
22624 // CHECK19-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 0
22625 // CHECK19-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
22626 // CHECK19-NEXT:    store i32 [[TMP137]], i32* [[TMP143]], align 4
22627 // CHECK19-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 0
22628 // CHECK19-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i32*
22629 // CHECK19-NEXT:    store i32 [[TMP137]], i32* [[TMP145]], align 4
22630 // CHECK19-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 0
22631 // CHECK19-NEXT:    store i64 4, i64* [[TMP146]], align 4
22632 // CHECK19-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 0
22633 // CHECK19-NEXT:    store i8* null, i8** [[TMP147]], align 4
22634 // CHECK19-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 1
22635 // CHECK19-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
22636 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP149]], align 4
22637 // CHECK19-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 1
22638 // CHECK19-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i32*
22639 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP151]], align 4
22640 // CHECK19-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 1
22641 // CHECK19-NEXT:    store i64 4, i64* [[TMP152]], align 4
22642 // CHECK19-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 1
22643 // CHECK19-NEXT:    store i8* null, i8** [[TMP153]], align 4
22644 // CHECK19-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 2
22645 // CHECK19-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
22646 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP155]], align 4
22647 // CHECK19-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 2
22648 // CHECK19-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
22649 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP157]], align 4
22650 // CHECK19-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 2
22651 // CHECK19-NEXT:    store i64 [[TMP141]], i64* [[TMP158]], align 4
22652 // CHECK19-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 2
22653 // CHECK19-NEXT:    store i8* null, i8** [[TMP159]], align 4
22654 // CHECK19-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 3
22655 // CHECK19-NEXT:    [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32*
22656 // CHECK19-NEXT:    store i32 [[TMP139]], i32* [[TMP161]], align 4
22657 // CHECK19-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 3
22658 // CHECK19-NEXT:    [[TMP163:%.*]] = bitcast i8** [[TMP162]] to i32*
22659 // CHECK19-NEXT:    store i32 [[TMP139]], i32* [[TMP163]], align 4
22660 // CHECK19-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 3
22661 // CHECK19-NEXT:    store i64 4, i64* [[TMP164]], align 4
22662 // CHECK19-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 3
22663 // CHECK19-NEXT:    store i8* null, i8** [[TMP165]], align 4
22664 // CHECK19-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 0
22665 // CHECK19-NEXT:    [[TMP167:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 0
22666 // CHECK19-NEXT:    [[TMP168:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 0
22667 // CHECK19-NEXT:    [[TMP169:%.*]] = load i32, i32* [[N]], align 4
22668 // CHECK19-NEXT:    store i32 [[TMP169]], i32* [[DOTCAPTURE_EXPR_54]], align 4
22669 // CHECK19-NEXT:    [[TMP170:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_54]], align 4
22670 // CHECK19-NEXT:    [[SUB56:%.*]] = sub nsw i32 [[TMP170]], 0
22671 // CHECK19-NEXT:    [[DIV57:%.*]] = sdiv i32 [[SUB56]], 1
22672 // CHECK19-NEXT:    [[SUB58:%.*]] = sub nsw i32 [[DIV57]], 1
22673 // CHECK19-NEXT:    store i32 [[SUB58]], i32* [[DOTCAPTURE_EXPR_55]], align 4
22674 // CHECK19-NEXT:    [[TMP171:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_55]], align 4
22675 // CHECK19-NEXT:    [[ADD59:%.*]] = add nsw i32 [[TMP171]], 1
22676 // CHECK19-NEXT:    [[TMP172:%.*]] = zext i32 [[ADD59]] to i64
22677 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP172]])
22678 // CHECK19-NEXT:    [[TMP173:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, i32 4, i8** [[TMP166]], i8** [[TMP167]], i64* [[TMP168]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22679 // CHECK19-NEXT:    [[TMP174:%.*]] = icmp ne i32 [[TMP173]], 0
22680 // CHECK19-NEXT:    br i1 [[TMP174]], label [[OMP_OFFLOAD_FAILED60:%.*]], label [[OMP_OFFLOAD_CONT61:%.*]]
22681 // CHECK19:       omp_offload.failed60:
22682 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP139]]) #[[ATTR3]]
22683 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT61]]
22684 // CHECK19:       omp_offload.cont61:
22685 // CHECK19-NEXT:    [[TMP175:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
22686 // CHECK19-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP175]])
22687 // CHECK19-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
22688 // CHECK19-NEXT:    [[TMP176:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
22689 // CHECK19-NEXT:    call void @llvm.stackrestore(i8* [[TMP176]])
22690 // CHECK19-NEXT:    [[TMP177:%.*]] = load i32, i32* [[RETVAL]], align 4
22691 // CHECK19-NEXT:    ret i32 [[TMP177]]
22692 //
22693 //
22694 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
22695 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
22696 // CHECK19-NEXT:  entry:
22697 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
22698 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22699 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22700 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
22701 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
22702 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22703 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22704 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22705 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22706 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
22707 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
22708 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
22709 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
22710 // CHECK19-NEXT:    ret void
22711 //
22712 //
22713 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.
22714 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22715 // CHECK19-NEXT:  entry:
22716 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22717 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22718 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
22719 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22720 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22721 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22722 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22723 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22724 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22725 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
22726 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22727 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22728 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22729 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22730 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
22731 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
22732 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22733 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22734 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
22735 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22736 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22737 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22738 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22739 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
22740 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
22741 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22742 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
22743 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22744 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22745 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22746 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
22747 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22748 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
22749 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22750 // CHECK19:       omp.precond.then:
22751 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22752 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22753 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
22754 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22755 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22756 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22757 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
22758 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22759 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22760 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22761 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
22762 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22763 // CHECK19:       cond.true:
22764 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22765 // CHECK19-NEXT:    br label [[COND_END:%.*]]
22766 // CHECK19:       cond.false:
22767 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22768 // CHECK19-NEXT:    br label [[COND_END]]
22769 // CHECK19:       cond.end:
22770 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
22771 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22772 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22773 // CHECK19-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
22774 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22775 // CHECK19:       omp.inner.for.cond:
22776 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22777 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22778 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
22779 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22780 // CHECK19:       omp.inner.for.body:
22781 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22782 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22783 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
22784 // CHECK19-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
22785 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
22786 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
22787 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22788 // CHECK19:       omp.inner.for.inc:
22789 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22790 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
22791 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
22792 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
22793 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
22794 // CHECK19:       omp.inner.for.end:
22795 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
22796 // CHECK19:       omp.loop.exit:
22797 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22798 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
22799 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
22800 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
22801 // CHECK19:       omp.precond.end:
22802 // CHECK19-NEXT:    ret void
22803 //
22804 //
22805 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1
22806 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22807 // CHECK19-NEXT:  entry:
22808 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22809 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22810 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
22811 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
22812 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
22813 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22814 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22815 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22816 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22817 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22818 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22819 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
22820 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
22821 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
22822 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22823 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22824 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
22825 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22826 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22827 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
22828 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
22829 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
22830 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22831 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22832 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22833 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22834 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
22835 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
22836 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22837 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
22838 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22839 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22840 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22841 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
22842 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22843 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
22844 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22845 // CHECK19:       omp.precond.then:
22846 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
22847 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22848 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
22849 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
22850 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
22851 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
22852 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
22853 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22854 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22855 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22856 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
22857 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22858 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22859 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22860 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
22861 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22862 // CHECK19:       cond.true:
22863 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22864 // CHECK19-NEXT:    br label [[COND_END:%.*]]
22865 // CHECK19:       cond.false:
22866 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22867 // CHECK19-NEXT:    br label [[COND_END]]
22868 // CHECK19:       cond.end:
22869 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
22870 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
22871 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22872 // CHECK19-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
22873 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22874 // CHECK19:       omp.inner.for.cond:
22875 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22876 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22877 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
22878 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22879 // CHECK19:       omp.inner.for.body:
22880 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22881 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
22882 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22883 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
22884 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
22885 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
22886 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
22887 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
22888 // CHECK19:       omp.body.continue:
22889 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22890 // CHECK19:       omp.inner.for.inc:
22891 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22892 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
22893 // CHECK19-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
22894 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
22895 // CHECK19:       omp.inner.for.end:
22896 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
22897 // CHECK19:       omp.loop.exit:
22898 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22899 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
22900 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
22901 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
22902 // CHECK19:       omp.precond.end:
22903 // CHECK19-NEXT:    ret void
22904 //
22905 //
22906 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
22907 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22908 // CHECK19-NEXT:  entry:
22909 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
22910 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22911 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22912 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
22913 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
22914 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22915 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22916 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22917 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22918 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
22919 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
22920 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
22921 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
22922 // CHECK19-NEXT:    ret void
22923 //
22924 //
22925 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2
22926 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22927 // CHECK19-NEXT:  entry:
22928 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22929 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22930 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
22931 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22932 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22933 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22934 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22935 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22936 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22937 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
22938 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22939 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22940 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22941 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22942 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
22943 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
22944 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22945 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22946 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
22947 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22948 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22949 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22950 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22951 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
22952 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
22953 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22954 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
22955 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22956 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22957 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22958 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
22959 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22960 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
22961 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22962 // CHECK19:       omp.precond.then:
22963 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22964 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22965 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
22966 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22967 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22968 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22969 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
22970 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22971 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22972 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22973 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
22974 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22975 // CHECK19:       cond.true:
22976 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22977 // CHECK19-NEXT:    br label [[COND_END:%.*]]
22978 // CHECK19:       cond.false:
22979 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22980 // CHECK19-NEXT:    br label [[COND_END]]
22981 // CHECK19:       cond.end:
22982 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
22983 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22984 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22985 // CHECK19-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
22986 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22987 // CHECK19:       omp.inner.for.cond:
22988 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22989 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22990 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
22991 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22992 // CHECK19:       omp.inner.for.body:
22993 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22994 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22995 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
22996 // CHECK19-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
22997 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
22998 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
22999 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23000 // CHECK19:       omp.inner.for.inc:
23001 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23002 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23003 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
23004 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
23005 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23006 // CHECK19:       omp.inner.for.end:
23007 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23008 // CHECK19:       omp.loop.exit:
23009 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23010 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
23011 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
23012 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23013 // CHECK19:       omp.precond.end:
23014 // CHECK19-NEXT:    ret void
23015 //
23016 //
23017 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3
23018 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23019 // CHECK19-NEXT:  entry:
23020 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23021 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23022 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23023 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23024 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23025 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23026 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23027 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23028 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23029 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23030 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23031 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23032 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23033 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23034 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23035 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23036 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
23037 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23038 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23039 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23040 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23041 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23042 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23043 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23044 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23045 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23046 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
23047 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
23048 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23049 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
23050 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23051 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
23052 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23053 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23054 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23055 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
23056 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23057 // CHECK19:       omp.precond.then:
23058 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23059 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23060 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
23061 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23062 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23063 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
23064 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
23065 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23066 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23067 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23068 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
23069 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23070 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23071 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23072 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
23073 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23074 // CHECK19:       cond.true:
23075 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23076 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23077 // CHECK19:       cond.false:
23078 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23079 // CHECK19-NEXT:    br label [[COND_END]]
23080 // CHECK19:       cond.end:
23081 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
23082 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
23083 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23084 // CHECK19-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
23085 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23086 // CHECK19:       omp.inner.for.cond:
23087 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23088 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23089 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
23090 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23091 // CHECK19:       omp.inner.for.body:
23092 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23093 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
23094 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23095 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
23096 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
23097 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
23098 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
23099 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23100 // CHECK19:       omp.body.continue:
23101 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23102 // CHECK19:       omp.inner.for.inc:
23103 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23104 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
23105 // CHECK19-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
23106 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23107 // CHECK19:       omp.inner.for.end:
23108 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23109 // CHECK19:       omp.loop.exit:
23110 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23111 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
23112 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
23113 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23114 // CHECK19:       omp.precond.end:
23115 // CHECK19-NEXT:    ret void
23116 //
23117 //
23118 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
23119 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23120 // CHECK19-NEXT:  entry:
23121 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23122 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23123 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23124 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23125 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
23126 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23127 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23128 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23129 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23130 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23131 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23132 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23133 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
23134 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
23135 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
23136 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23137 // CHECK19-NEXT:    store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23138 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23139 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
23140 // CHECK19-NEXT:    ret void
23141 //
23142 //
23143 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..5
23144 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23145 // CHECK19-NEXT:  entry:
23146 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23147 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23148 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23149 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23150 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23151 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23152 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23153 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23154 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23155 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
23156 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23157 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23158 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23159 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23160 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23161 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
23162 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
23163 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23164 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23165 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23166 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23167 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23168 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23169 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23170 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23171 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23172 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
23173 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23174 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23175 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
23176 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23177 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
23178 // CHECK19-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23179 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23180 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23181 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
23182 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23183 // CHECK19:       omp.precond.then:
23184 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23185 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23186 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
23187 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23188 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23189 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23190 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23191 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
23192 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
23193 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23194 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23195 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
23196 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23197 // CHECK19:       cond.true:
23198 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23199 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23200 // CHECK19:       cond.false:
23201 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23202 // CHECK19-NEXT:    br label [[COND_END]]
23203 // CHECK19:       cond.end:
23204 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
23205 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23206 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23207 // CHECK19-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
23208 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23209 // CHECK19:       omp.inner.for.cond:
23210 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23211 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23212 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
23213 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
23214 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23215 // CHECK19:       omp.inner.for.body:
23216 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23217 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23218 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
23219 // CHECK19-NEXT:    store i32 [[TMP18]], i32* [[N_CASTED]], align 4
23220 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
23221 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23222 // CHECK19-NEXT:    store i32 [[TMP20]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23223 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23224 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP21]])
23225 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23226 // CHECK19:       omp.inner.for.inc:
23227 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23228 // CHECK19-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23229 // CHECK19-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
23230 // CHECK19-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
23231 // CHECK19-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23232 // CHECK19-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23233 // CHECK19-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
23234 // CHECK19-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
23235 // CHECK19-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23236 // CHECK19-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23237 // CHECK19-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
23238 // CHECK19-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
23239 // CHECK19-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23240 // CHECK19-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23241 // CHECK19-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]]
23242 // CHECK19-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
23243 // CHECK19:       cond.true11:
23244 // CHECK19-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23245 // CHECK19-NEXT:    br label [[COND_END13:%.*]]
23246 // CHECK19:       cond.false12:
23247 // CHECK19-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23248 // CHECK19-NEXT:    br label [[COND_END13]]
23249 // CHECK19:       cond.end13:
23250 // CHECK19-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ]
23251 // CHECK19-NEXT:    store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
23252 // CHECK19-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23253 // CHECK19-NEXT:    store i32 [[TMP32]], i32* [[DOTOMP_IV]], align 4
23254 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23255 // CHECK19:       omp.inner.for.end:
23256 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23257 // CHECK19:       omp.loop.exit:
23258 // CHECK19-NEXT:    [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23259 // CHECK19-NEXT:    [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
23260 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
23261 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23262 // CHECK19:       omp.precond.end:
23263 // CHECK19-NEXT:    ret void
23264 //
23265 //
23266 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..6
23267 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23268 // CHECK19-NEXT:  entry:
23269 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23270 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23271 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23272 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23273 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23274 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23275 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23276 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23277 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23278 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23279 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23280 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
23281 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23282 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23283 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23284 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23285 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23286 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
23287 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23288 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23289 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23290 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23291 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23292 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23293 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23294 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23295 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23296 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23297 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
23298 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23299 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23300 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
23301 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23302 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
23303 // CHECK19-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23304 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23305 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23306 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
23307 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23308 // CHECK19:       omp.precond.then:
23309 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23310 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23311 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
23312 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23313 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23314 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
23315 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
23316 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23317 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23318 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23319 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
23320 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23321 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23322 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23323 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
23324 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23325 // CHECK19:       cond.true:
23326 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23327 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23328 // CHECK19:       cond.false:
23329 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23330 // CHECK19-NEXT:    br label [[COND_END]]
23331 // CHECK19:       cond.end:
23332 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
23333 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
23334 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23335 // CHECK19-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
23336 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23337 // CHECK19:       omp.inner.for.cond:
23338 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23339 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23340 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
23341 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23342 // CHECK19:       omp.inner.for.body:
23343 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23344 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
23345 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23346 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
23347 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I4]], align 4
23348 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
23349 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
23350 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23351 // CHECK19:       omp.body.continue:
23352 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23353 // CHECK19:       omp.inner.for.inc:
23354 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23355 // CHECK19-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
23356 // CHECK19-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
23357 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23358 // CHECK19:       omp.inner.for.end:
23359 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23360 // CHECK19:       omp.loop.exit:
23361 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23362 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
23363 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
23364 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23365 // CHECK19:       omp.precond.end:
23366 // CHECK19-NEXT:    ret void
23367 //
23368 //
23369 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
23370 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23371 // CHECK19-NEXT:  entry:
23372 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23373 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23374 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23375 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
23376 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23377 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23378 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23379 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23380 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23381 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
23382 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
23383 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
23384 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
23385 // CHECK19-NEXT:    ret void
23386 //
23387 //
23388 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..8
23389 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23390 // CHECK19-NEXT:  entry:
23391 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23392 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23393 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23394 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23395 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23396 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23397 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23398 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23399 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23400 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23401 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23402 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23403 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23404 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23405 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
23406 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
23407 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23408 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23409 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23410 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23411 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23412 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23413 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23414 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
23415 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
23416 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23417 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
23418 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23419 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
23420 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23421 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23422 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23423 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
23424 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23425 // CHECK19:       omp.precond.then:
23426 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23427 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23428 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
23429 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23430 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23431 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23432 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
23433 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23434 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23435 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23436 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
23437 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23438 // CHECK19:       cond.true:
23439 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23440 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23441 // CHECK19:       cond.false:
23442 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23443 // CHECK19-NEXT:    br label [[COND_END]]
23444 // CHECK19:       cond.end:
23445 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
23446 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23447 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23448 // CHECK19-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
23449 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23450 // CHECK19:       omp.inner.for.cond:
23451 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23452 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23453 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
23454 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23455 // CHECK19:       omp.inner.for.body:
23456 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23457 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23458 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
23459 // CHECK19-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
23460 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
23461 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
23462 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23463 // CHECK19:       omp.inner.for.inc:
23464 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23465 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23466 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
23467 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
23468 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23469 // CHECK19:       omp.inner.for.end:
23470 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23471 // CHECK19:       omp.loop.exit:
23472 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23473 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
23474 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
23475 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23476 // CHECK19:       omp.precond.end:
23477 // CHECK19-NEXT:    ret void
23478 //
23479 //
23480 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..9
23481 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23482 // CHECK19-NEXT:  entry:
23483 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23484 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23485 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23486 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23487 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23488 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23489 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23490 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23491 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23492 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23493 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23494 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23495 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23496 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23497 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23498 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23499 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
23500 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23501 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23502 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23503 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23504 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23505 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23506 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23507 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23508 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23509 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
23510 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
23511 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23512 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
23513 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23514 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
23515 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23516 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23517 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23518 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
23519 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23520 // CHECK19:       omp.precond.then:
23521 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23522 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23523 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
23524 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23525 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23526 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
23527 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
23528 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23529 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23530 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23531 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23532 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23533 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
23534 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
23535 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
23536 // CHECK19:       omp.dispatch.cond:
23537 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23538 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
23539 // CHECK19-NEXT:    [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
23540 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
23541 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
23542 // CHECK19:       omp.dispatch.body:
23543 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23544 // CHECK19-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
23545 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23546 // CHECK19:       omp.inner.for.cond:
23547 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
23548 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
23549 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
23550 // CHECK19-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23551 // CHECK19:       omp.inner.for.body:
23552 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
23553 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
23554 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23555 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
23556 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
23557 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
23558 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
23559 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23560 // CHECK19:       omp.body.continue:
23561 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23562 // CHECK19:       omp.inner.for.inc:
23563 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
23564 // CHECK19-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1
23565 // CHECK19-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
23566 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
23567 // CHECK19:       omp.inner.for.end:
23568 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
23569 // CHECK19:       omp.dispatch.inc:
23570 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
23571 // CHECK19:       omp.dispatch.end:
23572 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23573 // CHECK19:       omp.precond.end:
23574 // CHECK19-NEXT:    ret void
23575 //
23576 //
23577 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
23578 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23579 // CHECK19-NEXT:  entry:
23580 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23581 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23582 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23583 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23584 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
23585 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23586 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23587 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23588 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23589 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23590 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23591 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23592 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
23593 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
23594 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
23595 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23596 // CHECK19-NEXT:    store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23597 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23598 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
23599 // CHECK19-NEXT:    ret void
23600 //
23601 //
23602 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11
23603 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23604 // CHECK19-NEXT:  entry:
23605 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23606 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23607 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23608 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23609 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23610 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23611 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23612 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23613 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23614 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
23615 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23616 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23617 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23618 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23619 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23620 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
23621 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
23622 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23623 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23624 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23625 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23626 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23627 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23628 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23629 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23630 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23631 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
23632 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23633 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23634 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
23635 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23636 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
23637 // CHECK19-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23638 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23639 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23640 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
23641 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23642 // CHECK19:       omp.precond.then:
23643 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23644 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23645 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
23646 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23647 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23648 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23649 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
23650 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23651 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23652 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23653 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
23654 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23655 // CHECK19:       cond.true:
23656 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23657 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23658 // CHECK19:       cond.false:
23659 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23660 // CHECK19-NEXT:    br label [[COND_END]]
23661 // CHECK19:       cond.end:
23662 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
23663 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23664 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23665 // CHECK19-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
23666 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23667 // CHECK19:       omp.inner.for.cond:
23668 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23669 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23670 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
23671 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23672 // CHECK19:       omp.inner.for.body:
23673 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23674 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23675 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
23676 // CHECK19-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
23677 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
23678 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23679 // CHECK19-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23680 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23681 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP20]])
23682 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23683 // CHECK19:       omp.inner.for.inc:
23684 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23685 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23686 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
23687 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
23688 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23689 // CHECK19:       omp.inner.for.end:
23690 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23691 // CHECK19:       omp.loop.exit:
23692 // CHECK19-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23693 // CHECK19-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
23694 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
23695 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23696 // CHECK19:       omp.precond.end:
23697 // CHECK19-NEXT:    ret void
23698 //
23699 //
23700 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..12
23701 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23702 // CHECK19-NEXT:  entry:
23703 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23704 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23705 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23706 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23707 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23708 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23709 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23710 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23711 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23712 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23713 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23714 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
23715 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23716 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23717 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23718 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23719 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23720 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
23721 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23722 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23723 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23724 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23725 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23726 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23727 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23728 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23729 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23730 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23731 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
23732 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23733 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23734 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
23735 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23736 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
23737 // CHECK19-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23738 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23739 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23740 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
23741 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23742 // CHECK19:       omp.precond.then:
23743 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23744 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23745 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
23746 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23747 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23748 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
23749 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
23750 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23751 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23752 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23753 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23754 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23755 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23756 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
23757 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
23758 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
23759 // CHECK19:       omp.dispatch.cond:
23760 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23761 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
23762 // CHECK19-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
23763 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
23764 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
23765 // CHECK19:       omp.dispatch.body:
23766 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23767 // CHECK19-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
23768 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23769 // CHECK19:       omp.inner.for.cond:
23770 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
23771 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
23772 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
23773 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23774 // CHECK19:       omp.inner.for.body:
23775 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
23776 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
23777 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23778 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
23779 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
23780 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP20]]
23781 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
23782 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23783 // CHECK19:       omp.body.continue:
23784 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23785 // CHECK19:       omp.inner.for.inc:
23786 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
23787 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
23788 // CHECK19-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
23789 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
23790 // CHECK19:       omp.inner.for.end:
23791 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
23792 // CHECK19:       omp.dispatch.inc:
23793 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
23794 // CHECK19:       omp.dispatch.end:
23795 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23796 // CHECK19:       omp.precond.end:
23797 // CHECK19-NEXT:    ret void
23798 //
23799 //
23800 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
23801 // CHECK19-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
23802 // CHECK19-NEXT:  entry:
23803 // CHECK19-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
23804 // CHECK19-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
23805 // CHECK19-NEXT:    [[M:%.*]] = alloca i32, align 4
23806 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
23807 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
23808 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
23809 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23810 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
23811 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
23812 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
23813 // CHECK19-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
23814 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23815 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23816 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
23817 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
23818 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
23819 // CHECK19-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
23820 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
23821 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
23822 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
23823 // CHECK19-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
23824 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
23825 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i32, align 4
23826 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 4
23827 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 4
23828 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 4
23829 // CHECK19-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
23830 // CHECK19-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
23831 // CHECK19-NEXT:    store i32 10, i32* [[M]], align 4
23832 // CHECK19-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
23833 // CHECK19-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
23834 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
23835 // CHECK19-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
23836 // CHECK19-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
23837 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
23838 // CHECK19-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
23839 // CHECK19-NEXT:    store i8* null, i8** [[TMP4]], align 4
23840 // CHECK19-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
23841 // CHECK19-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
23842 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23843 // CHECK19-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23844 // CHECK19-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
23845 // CHECK19-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
23846 // CHECK19:       omp_offload.failed:
23847 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
23848 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
23849 // CHECK19:       omp_offload.cont:
23850 // CHECK19-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
23851 // CHECK19-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
23852 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
23853 // CHECK19-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
23854 // CHECK19-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
23855 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
23856 // CHECK19-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
23857 // CHECK19-NEXT:    store i8* null, i8** [[TMP13]], align 4
23858 // CHECK19-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
23859 // CHECK19-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
23860 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23861 // CHECK19-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23862 // CHECK19-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
23863 // CHECK19-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
23864 // CHECK19:       omp_offload.failed5:
23865 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
23866 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
23867 // CHECK19:       omp_offload.cont6:
23868 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
23869 // CHECK19-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR_]], align 4
23870 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23871 // CHECK19-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23872 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23873 // CHECK19-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
23874 // CHECK19-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [10 x i32]**
23875 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP22]], align 4
23876 // CHECK19-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
23877 // CHECK19-NEXT:    [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [10 x i32]**
23878 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP24]], align 4
23879 // CHECK19-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
23880 // CHECK19-NEXT:    store i8* null, i8** [[TMP25]], align 4
23881 // CHECK19-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
23882 // CHECK19-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
23883 // CHECK19-NEXT:    store i32 [[TMP20]], i32* [[TMP27]], align 4
23884 // CHECK19-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
23885 // CHECK19-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
23886 // CHECK19-NEXT:    store i32 [[TMP20]], i32* [[TMP29]], align 4
23887 // CHECK19-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
23888 // CHECK19-NEXT:    store i8* null, i8** [[TMP30]], align 4
23889 // CHECK19-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
23890 // CHECK19-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
23891 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23892 // CHECK19-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, i32 2, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23893 // CHECK19-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
23894 // CHECK19-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
23895 // CHECK19:       omp_offload.failed11:
23896 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i32 [[TMP20]]) #[[ATTR3]]
23897 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
23898 // CHECK19:       omp_offload.cont12:
23899 // CHECK19-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
23900 // CHECK19-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to [10 x i32]**
23901 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP36]], align 4
23902 // CHECK19-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
23903 // CHECK19-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to [10 x i32]**
23904 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP38]], align 4
23905 // CHECK19-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
23906 // CHECK19-NEXT:    store i8* null, i8** [[TMP39]], align 4
23907 // CHECK19-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
23908 // CHECK19-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
23909 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23910 // CHECK19-NEXT:    [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, i32 1, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23911 // CHECK19-NEXT:    [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
23912 // CHECK19-NEXT:    br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
23913 // CHECK19:       omp_offload.failed17:
23914 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
23915 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
23916 // CHECK19:       omp_offload.cont18:
23917 // CHECK19-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M]], align 4
23918 // CHECK19-NEXT:    store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_19]], align 4
23919 // CHECK19-NEXT:    [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
23920 // CHECK19-NEXT:    store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
23921 // CHECK19-NEXT:    [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
23922 // CHECK19-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
23923 // CHECK19-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to [10 x i32]**
23924 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP48]], align 4
23925 // CHECK19-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
23926 // CHECK19-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to [10 x i32]**
23927 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP50]], align 4
23928 // CHECK19-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i32 0, i32 0
23929 // CHECK19-NEXT:    store i8* null, i8** [[TMP51]], align 4
23930 // CHECK19-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
23931 // CHECK19-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i32*
23932 // CHECK19-NEXT:    store i32 [[TMP46]], i32* [[TMP53]], align 4
23933 // CHECK19-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
23934 // CHECK19-NEXT:    [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i32*
23935 // CHECK19-NEXT:    store i32 [[TMP46]], i32* [[TMP55]], align 4
23936 // CHECK19-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i32 0, i32 1
23937 // CHECK19-NEXT:    store i8* null, i8** [[TMP56]], align 4
23938 // CHECK19-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
23939 // CHECK19-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
23940 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23941 // CHECK19-NEXT:    [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, i32 2, i8** [[TMP57]], i8** [[TMP58]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23942 // CHECK19-NEXT:    [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0
23943 // CHECK19-NEXT:    br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
23944 // CHECK19:       omp_offload.failed25:
23945 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i32 [[TMP46]]) #[[ATTR3]]
23946 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT26]]
23947 // CHECK19:       omp_offload.cont26:
23948 // CHECK19-NEXT:    ret i32 0
23949 //
23950 //
23951 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
23952 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23953 // CHECK19-NEXT:  entry:
23954 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23955 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23956 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23957 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
23958 // CHECK19-NEXT:    ret void
23959 //
23960 //
23961 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..14
23962 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23963 // CHECK19-NEXT:  entry:
23964 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23965 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23966 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23967 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23968 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23969 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23970 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23971 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23972 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23973 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23974 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23975 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23976 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23977 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23978 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23979 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
23980 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23981 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23982 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23983 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
23984 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23985 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23986 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
23987 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23988 // CHECK19:       cond.true:
23989 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23990 // CHECK19:       cond.false:
23991 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23992 // CHECK19-NEXT:    br label [[COND_END]]
23993 // CHECK19:       cond.end:
23994 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
23995 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23996 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23997 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
23998 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23999 // CHECK19:       omp.inner.for.cond:
24000 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24001 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24002 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24003 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24004 // CHECK19:       omp.inner.for.body:
24005 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24006 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24007 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
24008 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24009 // CHECK19:       omp.inner.for.inc:
24010 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24011 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24012 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
24013 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24014 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24015 // CHECK19:       omp.inner.for.end:
24016 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24017 // CHECK19:       omp.loop.exit:
24018 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24019 // CHECK19-NEXT:    ret void
24020 //
24021 //
24022 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..15
24023 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24024 // CHECK19-NEXT:  entry:
24025 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24026 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24027 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24028 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24029 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24030 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24031 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24032 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24033 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24034 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24035 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24036 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24037 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24038 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24039 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24040 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24041 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24042 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24043 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24044 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
24045 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24046 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24047 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24048 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24049 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24050 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24051 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24052 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
24053 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24054 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24055 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
24056 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24057 // CHECK19:       cond.true:
24058 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24059 // CHECK19:       cond.false:
24060 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24061 // CHECK19-NEXT:    br label [[COND_END]]
24062 // CHECK19:       cond.end:
24063 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
24064 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
24065 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24066 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
24067 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24068 // CHECK19:       omp.inner.for.cond:
24069 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24070 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24071 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
24072 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24073 // CHECK19:       omp.inner.for.body:
24074 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24075 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
24076 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24077 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
24078 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
24079 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
24080 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
24081 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
24082 // CHECK19:       omp.body.continue:
24083 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24084 // CHECK19:       omp.inner.for.inc:
24085 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24086 // CHECK19-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
24087 // CHECK19-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
24088 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24089 // CHECK19:       omp.inner.for.end:
24090 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24091 // CHECK19:       omp.loop.exit:
24092 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
24093 // CHECK19-NEXT:    ret void
24094 //
24095 //
24096 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
24097 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24098 // CHECK19-NEXT:  entry:
24099 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24100 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24101 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24102 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
24103 // CHECK19-NEXT:    ret void
24104 //
24105 //
24106 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..17
24107 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24108 // CHECK19-NEXT:  entry:
24109 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24110 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24111 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24112 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24113 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24114 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24115 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24116 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24117 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24118 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24119 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24120 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24121 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24122 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24123 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24124 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24125 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24126 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24127 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24128 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24129 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24130 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24131 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24132 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24133 // CHECK19:       cond.true:
24134 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24135 // CHECK19:       cond.false:
24136 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24137 // CHECK19-NEXT:    br label [[COND_END]]
24138 // CHECK19:       cond.end:
24139 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24140 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24141 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24142 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24143 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24144 // CHECK19:       omp.inner.for.cond:
24145 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24146 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24147 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24148 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24149 // CHECK19:       omp.inner.for.body:
24150 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24151 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24152 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
24153 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24154 // CHECK19:       omp.inner.for.inc:
24155 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24156 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24157 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
24158 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24159 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24160 // CHECK19:       omp.inner.for.end:
24161 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24162 // CHECK19:       omp.loop.exit:
24163 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24164 // CHECK19-NEXT:    ret void
24165 //
24166 //
24167 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..18
24168 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24169 // CHECK19-NEXT:  entry:
24170 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24171 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24172 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24173 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24174 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24175 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24176 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24177 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24178 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24179 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24180 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24181 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24182 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24183 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24184 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24185 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24186 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24187 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24188 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24189 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
24190 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24191 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24192 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24193 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24194 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24195 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24196 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24197 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
24198 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24199 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24200 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
24201 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24202 // CHECK19:       cond.true:
24203 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24204 // CHECK19:       cond.false:
24205 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24206 // CHECK19-NEXT:    br label [[COND_END]]
24207 // CHECK19:       cond.end:
24208 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
24209 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
24210 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24211 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
24212 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24213 // CHECK19:       omp.inner.for.cond:
24214 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24215 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24216 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
24217 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24218 // CHECK19:       omp.inner.for.body:
24219 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24220 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
24221 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24222 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
24223 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
24224 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
24225 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
24226 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
24227 // CHECK19:       omp.body.continue:
24228 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24229 // CHECK19:       omp.inner.for.inc:
24230 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24231 // CHECK19-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
24232 // CHECK19-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
24233 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24234 // CHECK19:       omp.inner.for.end:
24235 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24236 // CHECK19:       omp.loop.exit:
24237 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
24238 // CHECK19-NEXT:    ret void
24239 //
24240 //
24241 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
24242 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24243 // CHECK19-NEXT:  entry:
24244 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24245 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24246 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24247 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24248 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24249 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24250 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24251 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24252 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24253 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
24254 // CHECK19-NEXT:    ret void
24255 //
24256 //
24257 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..21
24258 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24259 // CHECK19-NEXT:  entry:
24260 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24261 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24262 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24263 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24264 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24265 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24266 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24267 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24268 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24269 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24270 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24271 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24272 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24273 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24274 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24275 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24276 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24277 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24278 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24279 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24280 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24281 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24282 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24283 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24284 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24285 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24286 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24287 // CHECK19:       cond.true:
24288 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24289 // CHECK19:       cond.false:
24290 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24291 // CHECK19-NEXT:    br label [[COND_END]]
24292 // CHECK19:       cond.end:
24293 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24294 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24295 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24296 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24297 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24298 // CHECK19:       omp.inner.for.cond:
24299 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24300 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24301 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24302 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24303 // CHECK19:       omp.inner.for.body:
24304 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24305 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24306 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24307 // CHECK19-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24308 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24309 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
24310 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24311 // CHECK19:       omp.inner.for.inc:
24312 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24313 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24314 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
24315 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24316 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24317 // CHECK19:       omp.inner.for.end:
24318 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24319 // CHECK19:       omp.loop.exit:
24320 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24321 // CHECK19-NEXT:    ret void
24322 //
24323 //
24324 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..22
24325 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24326 // CHECK19-NEXT:  entry:
24327 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24328 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24329 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24330 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24331 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24332 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24333 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24334 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24335 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24336 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24337 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24338 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24339 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24340 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24341 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24342 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24343 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24344 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24345 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24346 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24347 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24348 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
24349 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24350 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24351 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24352 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24353 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24354 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24355 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24356 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24357 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
24358 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
24359 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
24360 // CHECK19:       omp.dispatch.cond:
24361 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24362 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24363 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
24364 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24365 // CHECK19:       cond.true:
24366 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24367 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24368 // CHECK19:       cond.false:
24369 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24370 // CHECK19-NEXT:    br label [[COND_END]]
24371 // CHECK19:       cond.end:
24372 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
24373 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
24374 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24375 // CHECK19-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
24376 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24377 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24378 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
24379 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24380 // CHECK19:       omp.dispatch.body:
24381 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24382 // CHECK19:       omp.inner.for.cond:
24383 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24384 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24385 // CHECK19-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
24386 // CHECK19-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24387 // CHECK19:       omp.inner.for.body:
24388 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24389 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
24390 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24391 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
24392 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
24393 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
24394 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
24395 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
24396 // CHECK19:       omp.body.continue:
24397 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24398 // CHECK19:       omp.inner.for.inc:
24399 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24400 // CHECK19-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
24401 // CHECK19-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
24402 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24403 // CHECK19:       omp.inner.for.end:
24404 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
24405 // CHECK19:       omp.dispatch.inc:
24406 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24407 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24408 // CHECK19-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
24409 // CHECK19-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
24410 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24411 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24412 // CHECK19-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
24413 // CHECK19-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
24414 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
24415 // CHECK19:       omp.dispatch.end:
24416 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
24417 // CHECK19-NEXT:    ret void
24418 //
24419 //
24420 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
24421 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24422 // CHECK19-NEXT:  entry:
24423 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24424 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24425 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24426 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
24427 // CHECK19-NEXT:    ret void
24428 //
24429 //
24430 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..25
24431 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24432 // CHECK19-NEXT:  entry:
24433 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24434 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24435 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24436 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24437 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24438 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24439 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24440 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24441 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24442 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24443 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24444 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24445 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24446 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24447 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24448 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24449 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24450 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24451 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24452 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24453 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24454 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24455 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24456 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24457 // CHECK19:       cond.true:
24458 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24459 // CHECK19:       cond.false:
24460 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24461 // CHECK19-NEXT:    br label [[COND_END]]
24462 // CHECK19:       cond.end:
24463 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24464 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24465 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24466 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24467 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24468 // CHECK19:       omp.inner.for.cond:
24469 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24470 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24471 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24472 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24473 // CHECK19:       omp.inner.for.body:
24474 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24475 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24476 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
24477 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24478 // CHECK19:       omp.inner.for.inc:
24479 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24480 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24481 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
24482 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24483 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24484 // CHECK19:       omp.inner.for.end:
24485 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24486 // CHECK19:       omp.loop.exit:
24487 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24488 // CHECK19-NEXT:    ret void
24489 //
24490 //
24491 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..26
24492 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24493 // CHECK19-NEXT:  entry:
24494 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24495 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24496 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24497 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24498 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24499 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24500 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24501 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24502 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24503 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24504 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24505 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24506 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24507 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24508 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24509 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24510 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24511 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24512 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24513 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
24514 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24515 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24516 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24517 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24518 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24519 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24520 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24521 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24522 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24523 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
24524 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
24525 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
24526 // CHECK19:       omp.dispatch.cond:
24527 // CHECK19-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
24528 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
24529 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24530 // CHECK19:       omp.dispatch.body:
24531 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24532 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
24533 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24534 // CHECK19:       omp.inner.for.cond:
24535 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
24536 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
24537 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
24538 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24539 // CHECK19:       omp.inner.for.body:
24540 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
24541 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
24542 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24543 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
24544 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
24545 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
24546 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
24547 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
24548 // CHECK19:       omp.body.continue:
24549 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24550 // CHECK19:       omp.inner.for.inc:
24551 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
24552 // CHECK19-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
24553 // CHECK19-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
24554 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
24555 // CHECK19:       omp.inner.for.end:
24556 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
24557 // CHECK19:       omp.dispatch.inc:
24558 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
24559 // CHECK19:       omp.dispatch.end:
24560 // CHECK19-NEXT:    ret void
24561 //
24562 //
24563 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
24564 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24565 // CHECK19-NEXT:  entry:
24566 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24567 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24568 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24569 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24570 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24571 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24572 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24573 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24574 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24575 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
24576 // CHECK19-NEXT:    ret void
24577 //
24578 //
24579 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..29
24580 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24581 // CHECK19-NEXT:  entry:
24582 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24583 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24584 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24585 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24586 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24587 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24588 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24589 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24590 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24591 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24592 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24593 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24594 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24595 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24596 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24597 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24598 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24599 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24600 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24601 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24602 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24603 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24604 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24605 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24606 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24607 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24608 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24609 // CHECK19:       cond.true:
24610 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24611 // CHECK19:       cond.false:
24612 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24613 // CHECK19-NEXT:    br label [[COND_END]]
24614 // CHECK19:       cond.end:
24615 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24616 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24617 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24618 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24619 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24620 // CHECK19:       omp.inner.for.cond:
24621 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24622 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24623 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24624 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24625 // CHECK19:       omp.inner.for.body:
24626 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24627 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24628 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24629 // CHECK19-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24630 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24631 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
24632 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24633 // CHECK19:       omp.inner.for.inc:
24634 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24635 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24636 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
24637 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24638 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24639 // CHECK19:       omp.inner.for.end:
24640 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24641 // CHECK19:       omp.loop.exit:
24642 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24643 // CHECK19-NEXT:    ret void
24644 //
24645 //
24646 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..30
24647 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24648 // CHECK19-NEXT:  entry:
24649 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24650 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24651 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24652 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24653 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24654 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24655 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24656 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24657 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24658 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24659 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24660 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24661 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24662 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24663 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24664 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24665 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24666 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24667 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24668 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24669 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24670 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
24671 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24672 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24673 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24674 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24675 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24676 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24677 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24678 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24679 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24680 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24681 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
24682 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
24683 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
24684 // CHECK19:       omp.dispatch.cond:
24685 // CHECK19-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
24686 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
24687 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24688 // CHECK19:       omp.dispatch.body:
24689 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24690 // CHECK19-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
24691 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24692 // CHECK19:       omp.inner.for.cond:
24693 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
24694 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
24695 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
24696 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24697 // CHECK19:       omp.inner.for.body:
24698 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
24699 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
24700 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24701 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
24702 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
24703 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
24704 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
24705 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
24706 // CHECK19:       omp.body.continue:
24707 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24708 // CHECK19:       omp.inner.for.inc:
24709 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
24710 // CHECK19-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
24711 // CHECK19-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
24712 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
24713 // CHECK19:       omp.inner.for.end:
24714 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
24715 // CHECK19:       omp.dispatch.inc:
24716 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
24717 // CHECK19:       omp.dispatch.end:
24718 // CHECK19-NEXT:    ret void
24719 //
24720 //
24721 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
24722 // CHECK19-SAME: () #[[ATTR5:[0-9]+]] {
24723 // CHECK19-NEXT:  entry:
24724 // CHECK19-NEXT:    call void @__tgt_register_requires(i64 1)
24725 // CHECK19-NEXT:    ret void
24726 //
24727 //
24728 // CHECK20-LABEL: define {{[^@]+}}@main
24729 // CHECK20-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
24730 // CHECK20-NEXT:  entry:
24731 // CHECK20-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
24732 // CHECK20-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
24733 // CHECK20-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
24734 // CHECK20-NEXT:    [[N:%.*]] = alloca i32, align 4
24735 // CHECK20-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
24736 // CHECK20-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
24737 // CHECK20-NEXT:    [[M:%.*]] = alloca i32, align 4
24738 // CHECK20-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
24739 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
24740 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
24741 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
24742 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
24743 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24744 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
24745 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
24746 // CHECK20-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
24747 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
24748 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
24749 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
24750 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
24751 // CHECK20-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
24752 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
24753 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
24754 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
24755 // CHECK20-NEXT:    [[N_CASTED18:%.*]] = alloca i32, align 4
24756 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24757 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4
24758 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4
24759 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4
24760 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4
24761 // CHECK20-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
24762 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
24763 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
24764 // CHECK20-NEXT:    [[N_CASTED32:%.*]] = alloca i32, align 4
24765 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS33:%.*]] = alloca [3 x i8*], align 4
24766 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS34:%.*]] = alloca [3 x i8*], align 4
24767 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS35:%.*]] = alloca [3 x i8*], align 4
24768 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES36:%.*]] = alloca [3 x i64], align 4
24769 // CHECK20-NEXT:    [[_TMP37:%.*]] = alloca i32, align 4
24770 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
24771 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
24772 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_46:%.*]] = alloca i32, align 4
24773 // CHECK20-NEXT:    [[N_CASTED47:%.*]] = alloca i32, align 4
24774 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED48:%.*]] = alloca i32, align 4
24775 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS49:%.*]] = alloca [4 x i8*], align 4
24776 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS50:%.*]] = alloca [4 x i8*], align 4
24777 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS51:%.*]] = alloca [4 x i8*], align 4
24778 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES52:%.*]] = alloca [4 x i64], align 4
24779 // CHECK20-NEXT:    [[_TMP53:%.*]] = alloca i32, align 4
24780 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_54:%.*]] = alloca i32, align 4
24781 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4
24782 // CHECK20-NEXT:    store i32 0, i32* [[RETVAL]], align 4
24783 // CHECK20-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
24784 // CHECK20-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
24785 // CHECK20-NEXT:    store i32 100, i32* [[N]], align 4
24786 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
24787 // CHECK20-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
24788 // CHECK20-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
24789 // CHECK20-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
24790 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
24791 // CHECK20-NEXT:    store i32 10, i32* [[M]], align 4
24792 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
24793 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
24794 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
24795 // CHECK20-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
24796 // CHECK20-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
24797 // CHECK20-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
24798 // CHECK20-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
24799 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
24800 // CHECK20-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
24801 // CHECK20-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
24802 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
24803 // CHECK20-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
24804 // CHECK20-NEXT:    store i64 4, i64* [[TMP10]], align 4
24805 // CHECK20-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
24806 // CHECK20-NEXT:    store i8* null, i8** [[TMP11]], align 4
24807 // CHECK20-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
24808 // CHECK20-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
24809 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
24810 // CHECK20-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
24811 // CHECK20-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
24812 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
24813 // CHECK20-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
24814 // CHECK20-NEXT:    store i64 4, i64* [[TMP16]], align 4
24815 // CHECK20-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
24816 // CHECK20-NEXT:    store i8* null, i8** [[TMP17]], align 4
24817 // CHECK20-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
24818 // CHECK20-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
24819 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
24820 // CHECK20-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
24821 // CHECK20-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
24822 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
24823 // CHECK20-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
24824 // CHECK20-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
24825 // CHECK20-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
24826 // CHECK20-NEXT:    store i8* null, i8** [[TMP23]], align 4
24827 // CHECK20-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
24828 // CHECK20-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
24829 // CHECK20-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
24830 // CHECK20-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
24831 // CHECK20-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
24832 // CHECK20-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24833 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
24834 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
24835 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
24836 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
24837 // CHECK20-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
24838 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
24839 // CHECK20-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
24840 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
24841 // CHECK20-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24842 // CHECK20-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
24843 // CHECK20-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
24844 // CHECK20:       omp_offload.failed:
24845 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
24846 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT]]
24847 // CHECK20:       omp_offload.cont:
24848 // CHECK20-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
24849 // CHECK20-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
24850 // CHECK20-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
24851 // CHECK20-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
24852 // CHECK20-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
24853 // CHECK20-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
24854 // CHECK20-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
24855 // CHECK20-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
24856 // CHECK20-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
24857 // CHECK20-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
24858 // CHECK20-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
24859 // CHECK20-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
24860 // CHECK20-NEXT:    store i64 4, i64* [[TMP41]], align 4
24861 // CHECK20-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
24862 // CHECK20-NEXT:    store i8* null, i8** [[TMP42]], align 4
24863 // CHECK20-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
24864 // CHECK20-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
24865 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
24866 // CHECK20-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
24867 // CHECK20-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
24868 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
24869 // CHECK20-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
24870 // CHECK20-NEXT:    store i64 4, i64* [[TMP47]], align 4
24871 // CHECK20-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
24872 // CHECK20-NEXT:    store i8* null, i8** [[TMP48]], align 4
24873 // CHECK20-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
24874 // CHECK20-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
24875 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
24876 // CHECK20-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
24877 // CHECK20-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
24878 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
24879 // CHECK20-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
24880 // CHECK20-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
24881 // CHECK20-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
24882 // CHECK20-NEXT:    store i8* null, i8** [[TMP54]], align 4
24883 // CHECK20-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
24884 // CHECK20-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
24885 // CHECK20-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
24886 // CHECK20-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
24887 // CHECK20-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
24888 // CHECK20-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
24889 // CHECK20-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
24890 // CHECK20-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
24891 // CHECK20-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
24892 // CHECK20-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
24893 // CHECK20-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
24894 // CHECK20-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
24895 // CHECK20-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
24896 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
24897 // CHECK20-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24898 // CHECK20-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
24899 // CHECK20-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
24900 // CHECK20:       omp_offload.failed15:
24901 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
24902 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
24903 // CHECK20:       omp_offload.cont16:
24904 // CHECK20-NEXT:    [[TMP64:%.*]] = load i32, i32* [[M]], align 4
24905 // CHECK20-NEXT:    store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_17]], align 4
24906 // CHECK20-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N]], align 4
24907 // CHECK20-NEXT:    store i32 [[TMP65]], i32* [[N_CASTED18]], align 4
24908 // CHECK20-NEXT:    [[TMP66:%.*]] = load i32, i32* [[N_CASTED18]], align 4
24909 // CHECK20-NEXT:    [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
24910 // CHECK20-NEXT:    store i32 [[TMP67]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24911 // CHECK20-NEXT:    [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24912 // CHECK20-NEXT:    [[TMP69:%.*]] = mul nuw i32 [[TMP0]], 4
24913 // CHECK20-NEXT:    [[TMP70:%.*]] = sext i32 [[TMP69]] to i64
24914 // CHECK20-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
24915 // CHECK20-NEXT:    [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32*
24916 // CHECK20-NEXT:    store i32 [[TMP66]], i32* [[TMP72]], align 4
24917 // CHECK20-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
24918 // CHECK20-NEXT:    [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32*
24919 // CHECK20-NEXT:    store i32 [[TMP66]], i32* [[TMP74]], align 4
24920 // CHECK20-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
24921 // CHECK20-NEXT:    store i64 4, i64* [[TMP75]], align 4
24922 // CHECK20-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
24923 // CHECK20-NEXT:    store i8* null, i8** [[TMP76]], align 4
24924 // CHECK20-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
24925 // CHECK20-NEXT:    [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32*
24926 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP78]], align 4
24927 // CHECK20-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
24928 // CHECK20-NEXT:    [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32*
24929 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP80]], align 4
24930 // CHECK20-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 1
24931 // CHECK20-NEXT:    store i64 4, i64* [[TMP81]], align 4
24932 // CHECK20-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1
24933 // CHECK20-NEXT:    store i8* null, i8** [[TMP82]], align 4
24934 // CHECK20-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
24935 // CHECK20-NEXT:    [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
24936 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP84]], align 4
24937 // CHECK20-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
24938 // CHECK20-NEXT:    [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32**
24939 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP86]], align 4
24940 // CHECK20-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2
24941 // CHECK20-NEXT:    store i64 [[TMP70]], i64* [[TMP87]], align 4
24942 // CHECK20-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2
24943 // CHECK20-NEXT:    store i8* null, i8** [[TMP88]], align 4
24944 // CHECK20-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
24945 // CHECK20-NEXT:    [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i32*
24946 // CHECK20-NEXT:    store i32 [[TMP68]], i32* [[TMP90]], align 4
24947 // CHECK20-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
24948 // CHECK20-NEXT:    [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i32*
24949 // CHECK20-NEXT:    store i32 [[TMP68]], i32* [[TMP92]], align 4
24950 // CHECK20-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
24951 // CHECK20-NEXT:    store i64 4, i64* [[TMP93]], align 4
24952 // CHECK20-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3
24953 // CHECK20-NEXT:    store i8* null, i8** [[TMP94]], align 4
24954 // CHECK20-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
24955 // CHECK20-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
24956 // CHECK20-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
24957 // CHECK20-NEXT:    [[TMP98:%.*]] = load i32, i32* [[N]], align 4
24958 // CHECK20-NEXT:    store i32 [[TMP98]], i32* [[DOTCAPTURE_EXPR_24]], align 4
24959 // CHECK20-NEXT:    [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
24960 // CHECK20-NEXT:    [[SUB26:%.*]] = sub nsw i32 [[TMP99]], 0
24961 // CHECK20-NEXT:    [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
24962 // CHECK20-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
24963 // CHECK20-NEXT:    store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4
24964 // CHECK20-NEXT:    [[TMP100:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
24965 // CHECK20-NEXT:    [[ADD29:%.*]] = add nsw i32 [[TMP100]], 1
24966 // CHECK20-NEXT:    [[TMP101:%.*]] = zext i32 [[ADD29]] to i64
24967 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP101]])
24968 // CHECK20-NEXT:    [[TMP102:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, i32 4, i8** [[TMP95]], i8** [[TMP96]], i64* [[TMP97]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24969 // CHECK20-NEXT:    [[TMP103:%.*]] = icmp ne i32 [[TMP102]], 0
24970 // CHECK20-NEXT:    br i1 [[TMP103]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]]
24971 // CHECK20:       omp_offload.failed30:
24972 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP66]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP68]]) #[[ATTR3]]
24973 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT31]]
24974 // CHECK20:       omp_offload.cont31:
24975 // CHECK20-NEXT:    [[TMP104:%.*]] = load i32, i32* [[N]], align 4
24976 // CHECK20-NEXT:    store i32 [[TMP104]], i32* [[N_CASTED32]], align 4
24977 // CHECK20-NEXT:    [[TMP105:%.*]] = load i32, i32* [[N_CASTED32]], align 4
24978 // CHECK20-NEXT:    [[TMP106:%.*]] = mul nuw i32 [[TMP0]], 4
24979 // CHECK20-NEXT:    [[TMP107:%.*]] = sext i32 [[TMP106]] to i64
24980 // CHECK20-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 0
24981 // CHECK20-NEXT:    [[TMP109:%.*]] = bitcast i8** [[TMP108]] to i32*
24982 // CHECK20-NEXT:    store i32 [[TMP105]], i32* [[TMP109]], align 4
24983 // CHECK20-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 0
24984 // CHECK20-NEXT:    [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i32*
24985 // CHECK20-NEXT:    store i32 [[TMP105]], i32* [[TMP111]], align 4
24986 // CHECK20-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 0
24987 // CHECK20-NEXT:    store i64 4, i64* [[TMP112]], align 4
24988 // CHECK20-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 0
24989 // CHECK20-NEXT:    store i8* null, i8** [[TMP113]], align 4
24990 // CHECK20-NEXT:    [[TMP114:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 1
24991 // CHECK20-NEXT:    [[TMP115:%.*]] = bitcast i8** [[TMP114]] to i32*
24992 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP115]], align 4
24993 // CHECK20-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 1
24994 // CHECK20-NEXT:    [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32*
24995 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP117]], align 4
24996 // CHECK20-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 1
24997 // CHECK20-NEXT:    store i64 4, i64* [[TMP118]], align 4
24998 // CHECK20-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 1
24999 // CHECK20-NEXT:    store i8* null, i8** [[TMP119]], align 4
25000 // CHECK20-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 2
25001 // CHECK20-NEXT:    [[TMP121:%.*]] = bitcast i8** [[TMP120]] to i32**
25002 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP121]], align 4
25003 // CHECK20-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 2
25004 // CHECK20-NEXT:    [[TMP123:%.*]] = bitcast i8** [[TMP122]] to i32**
25005 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP123]], align 4
25006 // CHECK20-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 2
25007 // CHECK20-NEXT:    store i64 [[TMP107]], i64* [[TMP124]], align 4
25008 // CHECK20-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 2
25009 // CHECK20-NEXT:    store i8* null, i8** [[TMP125]], align 4
25010 // CHECK20-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 0
25011 // CHECK20-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 0
25012 // CHECK20-NEXT:    [[TMP128:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES36]], i32 0, i32 0
25013 // CHECK20-NEXT:    [[TMP129:%.*]] = load i32, i32* [[N]], align 4
25014 // CHECK20-NEXT:    store i32 [[TMP129]], i32* [[DOTCAPTURE_EXPR_38]], align 4
25015 // CHECK20-NEXT:    [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
25016 // CHECK20-NEXT:    [[SUB40:%.*]] = sub nsw i32 [[TMP130]], 0
25017 // CHECK20-NEXT:    [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
25018 // CHECK20-NEXT:    [[SUB42:%.*]] = sub nsw i32 [[DIV41]], 1
25019 // CHECK20-NEXT:    store i32 [[SUB42]], i32* [[DOTCAPTURE_EXPR_39]], align 4
25020 // CHECK20-NEXT:    [[TMP131:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_39]], align 4
25021 // CHECK20-NEXT:    [[ADD43:%.*]] = add nsw i32 [[TMP131]], 1
25022 // CHECK20-NEXT:    [[TMP132:%.*]] = zext i32 [[ADD43]] to i64
25023 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP132]])
25024 // CHECK20-NEXT:    [[TMP133:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, i32 3, i8** [[TMP126]], i8** [[TMP127]], i64* [[TMP128]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
25025 // CHECK20-NEXT:    [[TMP134:%.*]] = icmp ne i32 [[TMP133]], 0
25026 // CHECK20-NEXT:    br i1 [[TMP134]], label [[OMP_OFFLOAD_FAILED44:%.*]], label [[OMP_OFFLOAD_CONT45:%.*]]
25027 // CHECK20:       omp_offload.failed44:
25028 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP105]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
25029 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT45]]
25030 // CHECK20:       omp_offload.cont45:
25031 // CHECK20-NEXT:    [[TMP135:%.*]] = load i32, i32* [[M]], align 4
25032 // CHECK20-NEXT:    store i32 [[TMP135]], i32* [[DOTCAPTURE_EXPR_46]], align 4
25033 // CHECK20-NEXT:    [[TMP136:%.*]] = load i32, i32* [[N]], align 4
25034 // CHECK20-NEXT:    store i32 [[TMP136]], i32* [[N_CASTED47]], align 4
25035 // CHECK20-NEXT:    [[TMP137:%.*]] = load i32, i32* [[N_CASTED47]], align 4
25036 // CHECK20-NEXT:    [[TMP138:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_46]], align 4
25037 // CHECK20-NEXT:    store i32 [[TMP138]], i32* [[DOTCAPTURE_EXPR__CASTED48]], align 4
25038 // CHECK20-NEXT:    [[TMP139:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED48]], align 4
25039 // CHECK20-NEXT:    [[TMP140:%.*]] = mul nuw i32 [[TMP0]], 4
25040 // CHECK20-NEXT:    [[TMP141:%.*]] = sext i32 [[TMP140]] to i64
25041 // CHECK20-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 0
25042 // CHECK20-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
25043 // CHECK20-NEXT:    store i32 [[TMP137]], i32* [[TMP143]], align 4
25044 // CHECK20-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 0
25045 // CHECK20-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i32*
25046 // CHECK20-NEXT:    store i32 [[TMP137]], i32* [[TMP145]], align 4
25047 // CHECK20-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 0
25048 // CHECK20-NEXT:    store i64 4, i64* [[TMP146]], align 4
25049 // CHECK20-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 0
25050 // CHECK20-NEXT:    store i8* null, i8** [[TMP147]], align 4
25051 // CHECK20-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 1
25052 // CHECK20-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
25053 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP149]], align 4
25054 // CHECK20-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 1
25055 // CHECK20-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i32*
25056 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP151]], align 4
25057 // CHECK20-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 1
25058 // CHECK20-NEXT:    store i64 4, i64* [[TMP152]], align 4
25059 // CHECK20-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 1
25060 // CHECK20-NEXT:    store i8* null, i8** [[TMP153]], align 4
25061 // CHECK20-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 2
25062 // CHECK20-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
25063 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP155]], align 4
25064 // CHECK20-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 2
25065 // CHECK20-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
25066 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP157]], align 4
25067 // CHECK20-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 2
25068 // CHECK20-NEXT:    store i64 [[TMP141]], i64* [[TMP158]], align 4
25069 // CHECK20-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 2
25070 // CHECK20-NEXT:    store i8* null, i8** [[TMP159]], align 4
25071 // CHECK20-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 3
25072 // CHECK20-NEXT:    [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32*
25073 // CHECK20-NEXT:    store i32 [[TMP139]], i32* [[TMP161]], align 4
25074 // CHECK20-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 3
25075 // CHECK20-NEXT:    [[TMP163:%.*]] = bitcast i8** [[TMP162]] to i32*
25076 // CHECK20-NEXT:    store i32 [[TMP139]], i32* [[TMP163]], align 4
25077 // CHECK20-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 3
25078 // CHECK20-NEXT:    store i64 4, i64* [[TMP164]], align 4
25079 // CHECK20-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS51]], i32 0, i32 3
25080 // CHECK20-NEXT:    store i8* null, i8** [[TMP165]], align 4
25081 // CHECK20-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS49]], i32 0, i32 0
25082 // CHECK20-NEXT:    [[TMP167:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS50]], i32 0, i32 0
25083 // CHECK20-NEXT:    [[TMP168:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES52]], i32 0, i32 0
25084 // CHECK20-NEXT:    [[TMP169:%.*]] = load i32, i32* [[N]], align 4
25085 // CHECK20-NEXT:    store i32 [[TMP169]], i32* [[DOTCAPTURE_EXPR_54]], align 4
25086 // CHECK20-NEXT:    [[TMP170:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_54]], align 4
25087 // CHECK20-NEXT:    [[SUB56:%.*]] = sub nsw i32 [[TMP170]], 0
25088 // CHECK20-NEXT:    [[DIV57:%.*]] = sdiv i32 [[SUB56]], 1
25089 // CHECK20-NEXT:    [[SUB58:%.*]] = sub nsw i32 [[DIV57]], 1
25090 // CHECK20-NEXT:    store i32 [[SUB58]], i32* [[DOTCAPTURE_EXPR_55]], align 4
25091 // CHECK20-NEXT:    [[TMP171:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_55]], align 4
25092 // CHECK20-NEXT:    [[ADD59:%.*]] = add nsw i32 [[TMP171]], 1
25093 // CHECK20-NEXT:    [[TMP172:%.*]] = zext i32 [[ADD59]] to i64
25094 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP172]])
25095 // CHECK20-NEXT:    [[TMP173:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, i32 4, i8** [[TMP166]], i8** [[TMP167]], i64* [[TMP168]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
25096 // CHECK20-NEXT:    [[TMP174:%.*]] = icmp ne i32 [[TMP173]], 0
25097 // CHECK20-NEXT:    br i1 [[TMP174]], label [[OMP_OFFLOAD_FAILED60:%.*]], label [[OMP_OFFLOAD_CONT61:%.*]]
25098 // CHECK20:       omp_offload.failed60:
25099 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP139]]) #[[ATTR3]]
25100 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT61]]
25101 // CHECK20:       omp_offload.cont61:
25102 // CHECK20-NEXT:    [[TMP175:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
25103 // CHECK20-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP175]])
25104 // CHECK20-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
25105 // CHECK20-NEXT:    [[TMP176:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
25106 // CHECK20-NEXT:    call void @llvm.stackrestore(i8* [[TMP176]])
25107 // CHECK20-NEXT:    [[TMP177:%.*]] = load i32, i32* [[RETVAL]], align 4
25108 // CHECK20-NEXT:    ret i32 [[TMP177]]
25109 //
25110 //
25111 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
25112 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
25113 // CHECK20-NEXT:  entry:
25114 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25115 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25116 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25117 // CHECK20-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
25118 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25119 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25120 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25121 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25122 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25123 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
25124 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
25125 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
25126 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
25127 // CHECK20-NEXT:    ret void
25128 //
25129 //
25130 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined.
25131 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25132 // CHECK20-NEXT:  entry:
25133 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25134 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25135 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25136 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25137 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25138 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25139 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25140 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25141 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25142 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25143 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25144 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25145 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25146 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25147 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25148 // CHECK20-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
25149 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25150 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25151 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25152 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25153 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25154 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25155 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25156 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
25157 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
25158 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25159 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
25160 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25161 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25162 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25163 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25164 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25165 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
25166 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25167 // CHECK20:       omp.precond.then:
25168 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25169 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25170 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
25171 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25172 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25173 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25174 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
25175 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25176 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25177 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25178 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
25179 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25180 // CHECK20:       cond.true:
25181 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25182 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25183 // CHECK20:       cond.false:
25184 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25185 // CHECK20-NEXT:    br label [[COND_END]]
25186 // CHECK20:       cond.end:
25187 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
25188 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25189 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25190 // CHECK20-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
25191 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25192 // CHECK20:       omp.inner.for.cond:
25193 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25194 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25195 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
25196 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25197 // CHECK20:       omp.inner.for.body:
25198 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25199 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25200 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
25201 // CHECK20-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
25202 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
25203 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
25204 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25205 // CHECK20:       omp.inner.for.inc:
25206 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25207 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25208 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
25209 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
25210 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25211 // CHECK20:       omp.inner.for.end:
25212 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25213 // CHECK20:       omp.loop.exit:
25214 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25215 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
25216 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
25217 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25218 // CHECK20:       omp.precond.end:
25219 // CHECK20-NEXT:    ret void
25220 //
25221 //
25222 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..1
25223 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25224 // CHECK20-NEXT:  entry:
25225 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25226 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25227 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25228 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25229 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25230 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25231 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25232 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25233 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25234 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25235 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25236 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25237 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
25238 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
25239 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25240 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25241 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25242 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25243 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25244 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25245 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25246 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25247 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25248 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25249 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25250 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25251 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
25252 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
25253 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25254 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
25255 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25256 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25257 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25258 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25259 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25260 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
25261 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25262 // CHECK20:       omp.precond.then:
25263 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
25264 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25265 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
25266 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25267 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25268 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
25269 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
25270 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25271 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25272 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25273 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
25274 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25275 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25276 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25277 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
25278 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25279 // CHECK20:       cond.true:
25280 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25281 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25282 // CHECK20:       cond.false:
25283 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25284 // CHECK20-NEXT:    br label [[COND_END]]
25285 // CHECK20:       cond.end:
25286 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
25287 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
25288 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25289 // CHECK20-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
25290 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25291 // CHECK20:       omp.inner.for.cond:
25292 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25293 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25294 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
25295 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25296 // CHECK20:       omp.inner.for.body:
25297 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25298 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
25299 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25300 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
25301 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
25302 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
25303 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
25304 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
25305 // CHECK20:       omp.body.continue:
25306 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25307 // CHECK20:       omp.inner.for.inc:
25308 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25309 // CHECK20-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
25310 // CHECK20-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
25311 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25312 // CHECK20:       omp.inner.for.end:
25313 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25314 // CHECK20:       omp.loop.exit:
25315 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25316 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
25317 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
25318 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25319 // CHECK20:       omp.precond.end:
25320 // CHECK20-NEXT:    ret void
25321 //
25322 //
25323 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
25324 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25325 // CHECK20-NEXT:  entry:
25326 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25327 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25328 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25329 // CHECK20-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
25330 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25331 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25332 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25333 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25334 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25335 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
25336 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
25337 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
25338 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
25339 // CHECK20-NEXT:    ret void
25340 //
25341 //
25342 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..2
25343 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25344 // CHECK20-NEXT:  entry:
25345 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25346 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25347 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25348 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25349 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25350 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25351 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25352 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25353 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25354 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25355 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25356 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25357 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25358 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25359 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25360 // CHECK20-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
25361 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25362 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25363 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25364 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25365 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25366 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25367 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25368 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
25369 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
25370 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25371 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
25372 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25373 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25374 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25375 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25376 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25377 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
25378 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25379 // CHECK20:       omp.precond.then:
25380 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25381 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25382 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
25383 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25384 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25385 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25386 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
25387 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25388 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25389 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25390 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
25391 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25392 // CHECK20:       cond.true:
25393 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25394 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25395 // CHECK20:       cond.false:
25396 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25397 // CHECK20-NEXT:    br label [[COND_END]]
25398 // CHECK20:       cond.end:
25399 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
25400 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25401 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25402 // CHECK20-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
25403 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25404 // CHECK20:       omp.inner.for.cond:
25405 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25406 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25407 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
25408 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25409 // CHECK20:       omp.inner.for.body:
25410 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25411 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25412 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
25413 // CHECK20-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
25414 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
25415 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
25416 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25417 // CHECK20:       omp.inner.for.inc:
25418 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25419 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25420 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
25421 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
25422 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25423 // CHECK20:       omp.inner.for.end:
25424 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25425 // CHECK20:       omp.loop.exit:
25426 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25427 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
25428 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
25429 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25430 // CHECK20:       omp.precond.end:
25431 // CHECK20-NEXT:    ret void
25432 //
25433 //
25434 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..3
25435 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25436 // CHECK20-NEXT:  entry:
25437 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25438 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25439 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25440 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25441 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25442 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25443 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25444 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25445 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25446 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25447 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25448 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25449 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
25450 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
25451 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25452 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25453 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25454 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25455 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25456 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25457 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25458 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25459 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25460 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25461 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25462 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25463 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
25464 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
25465 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25466 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
25467 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25468 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25469 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25470 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25471 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25472 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
25473 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25474 // CHECK20:       omp.precond.then:
25475 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
25476 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25477 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
25478 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25479 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25480 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
25481 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
25482 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25483 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25484 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25485 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
25486 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25487 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25488 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25489 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
25490 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25491 // CHECK20:       cond.true:
25492 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25493 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25494 // CHECK20:       cond.false:
25495 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25496 // CHECK20-NEXT:    br label [[COND_END]]
25497 // CHECK20:       cond.end:
25498 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
25499 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
25500 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25501 // CHECK20-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
25502 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25503 // CHECK20:       omp.inner.for.cond:
25504 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25505 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25506 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
25507 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25508 // CHECK20:       omp.inner.for.body:
25509 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25510 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
25511 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25512 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
25513 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
25514 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
25515 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
25516 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
25517 // CHECK20:       omp.body.continue:
25518 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25519 // CHECK20:       omp.inner.for.inc:
25520 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25521 // CHECK20-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
25522 // CHECK20-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
25523 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25524 // CHECK20:       omp.inner.for.end:
25525 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25526 // CHECK20:       omp.loop.exit:
25527 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25528 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
25529 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
25530 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25531 // CHECK20:       omp.precond.end:
25532 // CHECK20-NEXT:    ret void
25533 //
25534 //
25535 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
25536 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
25537 // CHECK20-NEXT:  entry:
25538 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25539 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25540 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25541 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
25542 // CHECK20-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
25543 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
25544 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25545 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25546 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25547 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25548 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25549 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25550 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
25551 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
25552 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
25553 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25554 // CHECK20-NEXT:    store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25555 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25556 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
25557 // CHECK20-NEXT:    ret void
25558 //
25559 //
25560 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..5
25561 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
25562 // CHECK20-NEXT:  entry:
25563 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25564 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25565 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25566 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25567 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25568 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
25569 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25570 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25571 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25572 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
25573 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25574 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25575 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25576 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25577 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25578 // CHECK20-NEXT:    [[I4:%.*]] = alloca i32, align 4
25579 // CHECK20-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
25580 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
25581 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25582 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25583 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25584 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25585 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25586 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25587 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25588 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25589 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
25590 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25591 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25592 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
25593 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25594 // CHECK20-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
25595 // CHECK20-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
25596 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25597 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25598 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
25599 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25600 // CHECK20:       omp.precond.then:
25601 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25602 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25603 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
25604 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25605 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25606 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25607 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25608 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
25609 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
25610 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25611 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25612 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
25613 // CHECK20-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25614 // CHECK20:       cond.true:
25615 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25616 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25617 // CHECK20:       cond.false:
25618 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25619 // CHECK20-NEXT:    br label [[COND_END]]
25620 // CHECK20:       cond.end:
25621 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
25622 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25623 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25624 // CHECK20-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
25625 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25626 // CHECK20:       omp.inner.for.cond:
25627 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25628 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25629 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
25630 // CHECK20-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
25631 // CHECK20-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25632 // CHECK20:       omp.inner.for.body:
25633 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25634 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25635 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
25636 // CHECK20-NEXT:    store i32 [[TMP18]], i32* [[N_CASTED]], align 4
25637 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
25638 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25639 // CHECK20-NEXT:    store i32 [[TMP20]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25640 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25641 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP21]])
25642 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25643 // CHECK20:       omp.inner.for.inc:
25644 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25645 // CHECK20-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25646 // CHECK20-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
25647 // CHECK20-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
25648 // CHECK20-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25649 // CHECK20-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25650 // CHECK20-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
25651 // CHECK20-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
25652 // CHECK20-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25653 // CHECK20-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25654 // CHECK20-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
25655 // CHECK20-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
25656 // CHECK20-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25657 // CHECK20-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25658 // CHECK20-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]]
25659 // CHECK20-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
25660 // CHECK20:       cond.true11:
25661 // CHECK20-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25662 // CHECK20-NEXT:    br label [[COND_END13:%.*]]
25663 // CHECK20:       cond.false12:
25664 // CHECK20-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25665 // CHECK20-NEXT:    br label [[COND_END13]]
25666 // CHECK20:       cond.end13:
25667 // CHECK20-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ]
25668 // CHECK20-NEXT:    store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
25669 // CHECK20-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25670 // CHECK20-NEXT:    store i32 [[TMP32]], i32* [[DOTOMP_IV]], align 4
25671 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25672 // CHECK20:       omp.inner.for.end:
25673 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25674 // CHECK20:       omp.loop.exit:
25675 // CHECK20-NEXT:    [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25676 // CHECK20-NEXT:    [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
25677 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
25678 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25679 // CHECK20:       omp.precond.end:
25680 // CHECK20-NEXT:    ret void
25681 //
25682 //
25683 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..6
25684 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
25685 // CHECK20-NEXT:  entry:
25686 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25687 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25688 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25689 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25690 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25691 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25692 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25693 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
25694 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25695 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25696 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25697 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
25698 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25699 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
25700 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
25701 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25702 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25703 // CHECK20-NEXT:    [[I4:%.*]] = alloca i32, align 4
25704 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25705 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25706 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25707 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25708 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25709 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25710 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25711 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25712 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25713 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25714 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
25715 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25716 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25717 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
25718 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25719 // CHECK20-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
25720 // CHECK20-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
25721 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25722 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25723 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
25724 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25725 // CHECK20:       omp.precond.then:
25726 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
25727 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25728 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
25729 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25730 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25731 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
25732 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
25733 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25734 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25735 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25736 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
25737 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25738 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25739 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25740 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
25741 // CHECK20-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25742 // CHECK20:       cond.true:
25743 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25744 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25745 // CHECK20:       cond.false:
25746 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25747 // CHECK20-NEXT:    br label [[COND_END]]
25748 // CHECK20:       cond.end:
25749 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
25750 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
25751 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25752 // CHECK20-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
25753 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25754 // CHECK20:       omp.inner.for.cond:
25755 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25756 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25757 // CHECK20-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
25758 // CHECK20-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25759 // CHECK20:       omp.inner.for.body:
25760 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25761 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
25762 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25763 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
25764 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I4]], align 4
25765 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
25766 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
25767 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
25768 // CHECK20:       omp.body.continue:
25769 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25770 // CHECK20:       omp.inner.for.inc:
25771 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25772 // CHECK20-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
25773 // CHECK20-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
25774 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25775 // CHECK20:       omp.inner.for.end:
25776 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25777 // CHECK20:       omp.loop.exit:
25778 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25779 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
25780 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
25781 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25782 // CHECK20:       omp.precond.end:
25783 // CHECK20-NEXT:    ret void
25784 //
25785 //
25786 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
25787 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25788 // CHECK20-NEXT:  entry:
25789 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25790 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25791 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25792 // CHECK20-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
25793 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25794 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25795 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25796 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25797 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25798 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
25799 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
25800 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
25801 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
25802 // CHECK20-NEXT:    ret void
25803 //
25804 //
25805 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..8
25806 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25807 // CHECK20-NEXT:  entry:
25808 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25809 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25810 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25811 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25812 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25813 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25814 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25815 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25816 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25817 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25818 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25819 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25820 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25821 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25822 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25823 // CHECK20-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
25824 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25825 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25826 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25827 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25828 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25829 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25830 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25831 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
25832 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
25833 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25834 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
25835 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25836 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25837 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25838 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25839 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25840 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
25841 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25842 // CHECK20:       omp.precond.then:
25843 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25844 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25845 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
25846 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25847 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25848 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25849 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
25850 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25851 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25852 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25853 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
25854 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25855 // CHECK20:       cond.true:
25856 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25857 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25858 // CHECK20:       cond.false:
25859 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25860 // CHECK20-NEXT:    br label [[COND_END]]
25861 // CHECK20:       cond.end:
25862 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
25863 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25864 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25865 // CHECK20-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
25866 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25867 // CHECK20:       omp.inner.for.cond:
25868 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25869 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25870 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
25871 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25872 // CHECK20:       omp.inner.for.body:
25873 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25874 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25875 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
25876 // CHECK20-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
25877 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
25878 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
25879 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25880 // CHECK20:       omp.inner.for.inc:
25881 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25882 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25883 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
25884 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
25885 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25886 // CHECK20:       omp.inner.for.end:
25887 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25888 // CHECK20:       omp.loop.exit:
25889 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25890 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
25891 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
25892 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25893 // CHECK20:       omp.precond.end:
25894 // CHECK20-NEXT:    ret void
25895 //
25896 //
25897 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..9
25898 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25899 // CHECK20-NEXT:  entry:
25900 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25901 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25902 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25903 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25904 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25905 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25906 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25907 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25908 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25909 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25910 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25911 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25912 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
25913 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
25914 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25915 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25916 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25917 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25918 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25919 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25920 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25921 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25922 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25923 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25924 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25925 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25926 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
25927 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
25928 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25929 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
25930 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25931 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25932 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25933 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25934 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25935 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
25936 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25937 // CHECK20:       omp.precond.then:
25938 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
25939 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25940 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
25941 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25942 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25943 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
25944 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
25945 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25946 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25947 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25948 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25949 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25950 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
25951 // CHECK20-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
25952 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
25953 // CHECK20:       omp.dispatch.cond:
25954 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25955 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
25956 // CHECK20-NEXT:    [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
25957 // CHECK20-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
25958 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
25959 // CHECK20:       omp.dispatch.body:
25960 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25961 // CHECK20-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
25962 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25963 // CHECK20:       omp.inner.for.cond:
25964 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
25965 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
25966 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
25967 // CHECK20-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25968 // CHECK20:       omp.inner.for.body:
25969 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
25970 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
25971 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25972 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
25973 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
25974 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
25975 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
25976 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
25977 // CHECK20:       omp.body.continue:
25978 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25979 // CHECK20:       omp.inner.for.inc:
25980 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
25981 // CHECK20-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1
25982 // CHECK20-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
25983 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
25984 // CHECK20:       omp.inner.for.end:
25985 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
25986 // CHECK20:       omp.dispatch.inc:
25987 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
25988 // CHECK20:       omp.dispatch.end:
25989 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25990 // CHECK20:       omp.precond.end:
25991 // CHECK20-NEXT:    ret void
25992 //
25993 //
25994 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
25995 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
25996 // CHECK20-NEXT:  entry:
25997 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25998 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25999 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
26000 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26001 // CHECK20-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
26002 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26003 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
26004 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
26005 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
26006 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26007 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
26008 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
26009 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
26010 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
26011 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
26012 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26013 // CHECK20-NEXT:    store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26014 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26015 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
26016 // CHECK20-NEXT:    ret void
26017 //
26018 //
26019 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..11
26020 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26021 // CHECK20-NEXT:  entry:
26022 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26023 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26024 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
26025 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
26026 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
26027 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26028 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26029 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26030 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
26031 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
26032 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26033 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26034 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26035 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26036 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26037 // CHECK20-NEXT:    [[I4:%.*]] = alloca i32, align 4
26038 // CHECK20-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
26039 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26040 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26041 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26042 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
26043 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
26044 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
26045 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26046 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
26047 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
26048 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
26049 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
26050 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26051 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
26052 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
26053 // CHECK20-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
26054 // CHECK20-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
26055 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
26056 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26057 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
26058 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
26059 // CHECK20:       omp.precond.then:
26060 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26061 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
26062 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
26063 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26064 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26065 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26066 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
26067 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26068 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26069 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
26070 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
26071 // CHECK20-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26072 // CHECK20:       cond.true:
26073 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
26074 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26075 // CHECK20:       cond.false:
26076 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26077 // CHECK20-NEXT:    br label [[COND_END]]
26078 // CHECK20:       cond.end:
26079 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
26080 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26081 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26082 // CHECK20-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
26083 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26084 // CHECK20:       omp.inner.for.cond:
26085 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26086 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26087 // CHECK20-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
26088 // CHECK20-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26089 // CHECK20:       omp.inner.for.body:
26090 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26091 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26092 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
26093 // CHECK20-NEXT:    store i32 [[TMP17]], i32* [[N_CASTED]], align 4
26094 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
26095 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26096 // CHECK20-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26097 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26098 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP20]])
26099 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26100 // CHECK20:       omp.inner.for.inc:
26101 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26102 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26103 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
26104 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26105 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26106 // CHECK20:       omp.inner.for.end:
26107 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26108 // CHECK20:       omp.loop.exit:
26109 // CHECK20-NEXT:    [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26110 // CHECK20-NEXT:    [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
26111 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
26112 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
26113 // CHECK20:       omp.precond.end:
26114 // CHECK20-NEXT:    ret void
26115 //
26116 //
26117 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..12
26118 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26119 // CHECK20-NEXT:  entry:
26120 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26121 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26122 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26123 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26124 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
26125 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
26126 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
26127 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26128 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26129 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26130 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
26131 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
26132 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26133 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26134 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26135 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26136 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26137 // CHECK20-NEXT:    [[I4:%.*]] = alloca i32, align 4
26138 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26139 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26140 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26141 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26142 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
26143 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
26144 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
26145 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26146 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
26147 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
26148 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
26149 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
26150 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26151 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
26152 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
26153 // CHECK20-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
26154 // CHECK20-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
26155 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
26156 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26157 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
26158 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
26159 // CHECK20:       omp.precond.then:
26160 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26161 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
26162 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
26163 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26164 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26165 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
26166 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
26167 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26168 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26169 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26170 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26171 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26172 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26173 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
26174 // CHECK20-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
26175 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
26176 // CHECK20:       omp.dispatch.cond:
26177 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26178 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
26179 // CHECK20-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
26180 // CHECK20-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
26181 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26182 // CHECK20:       omp.dispatch.body:
26183 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26184 // CHECK20-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
26185 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26186 // CHECK20:       omp.inner.for.cond:
26187 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
26188 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
26189 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
26190 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26191 // CHECK20:       omp.inner.for.body:
26192 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
26193 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
26194 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26195 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
26196 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
26197 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP20]]
26198 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
26199 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26200 // CHECK20:       omp.body.continue:
26201 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26202 // CHECK20:       omp.inner.for.inc:
26203 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
26204 // CHECK20-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
26205 // CHECK20-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
26206 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
26207 // CHECK20:       omp.inner.for.end:
26208 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
26209 // CHECK20:       omp.dispatch.inc:
26210 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
26211 // CHECK20:       omp.dispatch.end:
26212 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
26213 // CHECK20:       omp.precond.end:
26214 // CHECK20-NEXT:    ret void
26215 //
26216 //
26217 // CHECK20-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
26218 // CHECK20-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
26219 // CHECK20-NEXT:  entry:
26220 // CHECK20-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
26221 // CHECK20-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
26222 // CHECK20-NEXT:    [[M:%.*]] = alloca i32, align 4
26223 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
26224 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
26225 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
26226 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26227 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
26228 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
26229 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
26230 // CHECK20-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
26231 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
26232 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26233 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
26234 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
26235 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
26236 // CHECK20-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
26237 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
26238 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
26239 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
26240 // CHECK20-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
26241 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
26242 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i32, align 4
26243 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 4
26244 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 4
26245 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 4
26246 // CHECK20-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
26247 // CHECK20-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
26248 // CHECK20-NEXT:    store i32 10, i32* [[M]], align 4
26249 // CHECK20-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
26250 // CHECK20-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
26251 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
26252 // CHECK20-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
26253 // CHECK20-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
26254 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
26255 // CHECK20-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
26256 // CHECK20-NEXT:    store i8* null, i8** [[TMP4]], align 4
26257 // CHECK20-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
26258 // CHECK20-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
26259 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26260 // CHECK20-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26261 // CHECK20-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
26262 // CHECK20-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
26263 // CHECK20:       omp_offload.failed:
26264 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
26265 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT]]
26266 // CHECK20:       omp_offload.cont:
26267 // CHECK20-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
26268 // CHECK20-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
26269 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
26270 // CHECK20-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
26271 // CHECK20-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
26272 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
26273 // CHECK20-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
26274 // CHECK20-NEXT:    store i8* null, i8** [[TMP13]], align 4
26275 // CHECK20-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
26276 // CHECK20-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
26277 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26278 // CHECK20-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26279 // CHECK20-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
26280 // CHECK20-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
26281 // CHECK20:       omp_offload.failed5:
26282 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
26283 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
26284 // CHECK20:       omp_offload.cont6:
26285 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
26286 // CHECK20-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR_]], align 4
26287 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
26288 // CHECK20-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26289 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26290 // CHECK20-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
26291 // CHECK20-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [10 x i32]**
26292 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP22]], align 4
26293 // CHECK20-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
26294 // CHECK20-NEXT:    [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [10 x i32]**
26295 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP24]], align 4
26296 // CHECK20-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
26297 // CHECK20-NEXT:    store i8* null, i8** [[TMP25]], align 4
26298 // CHECK20-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
26299 // CHECK20-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
26300 // CHECK20-NEXT:    store i32 [[TMP20]], i32* [[TMP27]], align 4
26301 // CHECK20-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
26302 // CHECK20-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
26303 // CHECK20-NEXT:    store i32 [[TMP20]], i32* [[TMP29]], align 4
26304 // CHECK20-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
26305 // CHECK20-NEXT:    store i8* null, i8** [[TMP30]], align 4
26306 // CHECK20-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
26307 // CHECK20-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
26308 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26309 // CHECK20-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, i32 2, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26310 // CHECK20-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
26311 // CHECK20-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
26312 // CHECK20:       omp_offload.failed11:
26313 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i32 [[TMP20]]) #[[ATTR3]]
26314 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
26315 // CHECK20:       omp_offload.cont12:
26316 // CHECK20-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
26317 // CHECK20-NEXT:    [[TMP36:%.*]] = bitcast i8** [[TMP35]] to [10 x i32]**
26318 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP36]], align 4
26319 // CHECK20-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
26320 // CHECK20-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to [10 x i32]**
26321 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP38]], align 4
26322 // CHECK20-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
26323 // CHECK20-NEXT:    store i8* null, i8** [[TMP39]], align 4
26324 // CHECK20-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
26325 // CHECK20-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
26326 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26327 // CHECK20-NEXT:    [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, i32 1, i8** [[TMP40]], i8** [[TMP41]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26328 // CHECK20-NEXT:    [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
26329 // CHECK20-NEXT:    br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
26330 // CHECK20:       omp_offload.failed17:
26331 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
26332 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
26333 // CHECK20:       omp_offload.cont18:
26334 // CHECK20-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M]], align 4
26335 // CHECK20-NEXT:    store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_19]], align 4
26336 // CHECK20-NEXT:    [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
26337 // CHECK20-NEXT:    store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
26338 // CHECK20-NEXT:    [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
26339 // CHECK20-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
26340 // CHECK20-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to [10 x i32]**
26341 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP48]], align 4
26342 // CHECK20-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
26343 // CHECK20-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to [10 x i32]**
26344 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP50]], align 4
26345 // CHECK20-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i32 0, i32 0
26346 // CHECK20-NEXT:    store i8* null, i8** [[TMP51]], align 4
26347 // CHECK20-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
26348 // CHECK20-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i32*
26349 // CHECK20-NEXT:    store i32 [[TMP46]], i32* [[TMP53]], align 4
26350 // CHECK20-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
26351 // CHECK20-NEXT:    [[TMP55:%.*]] = bitcast i8** [[TMP54]] to i32*
26352 // CHECK20-NEXT:    store i32 [[TMP46]], i32* [[TMP55]], align 4
26353 // CHECK20-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i32 0, i32 1
26354 // CHECK20-NEXT:    store i8* null, i8** [[TMP56]], align 4
26355 // CHECK20-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
26356 // CHECK20-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
26357 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26358 // CHECK20-NEXT:    [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, i32 2, i8** [[TMP57]], i8** [[TMP58]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26359 // CHECK20-NEXT:    [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0
26360 // CHECK20-NEXT:    br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
26361 // CHECK20:       omp_offload.failed25:
26362 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i32 [[TMP46]]) #[[ATTR3]]
26363 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT26]]
26364 // CHECK20:       omp_offload.cont26:
26365 // CHECK20-NEXT:    ret i32 0
26366 //
26367 //
26368 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
26369 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26370 // CHECK20-NEXT:  entry:
26371 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26372 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26373 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26374 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
26375 // CHECK20-NEXT:    ret void
26376 //
26377 //
26378 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..14
26379 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26380 // CHECK20-NEXT:  entry:
26381 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26382 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26383 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26384 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26385 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26386 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26387 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26388 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26389 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26390 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26391 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26392 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26393 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26394 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26395 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26396 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26397 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26398 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26399 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26400 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26401 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26402 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26403 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26404 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26405 // CHECK20:       cond.true:
26406 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26407 // CHECK20:       cond.false:
26408 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26409 // CHECK20-NEXT:    br label [[COND_END]]
26410 // CHECK20:       cond.end:
26411 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26412 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26413 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26414 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26415 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26416 // CHECK20:       omp.inner.for.cond:
26417 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26418 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26419 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26420 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26421 // CHECK20:       omp.inner.for.body:
26422 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26423 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26424 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
26425 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26426 // CHECK20:       omp.inner.for.inc:
26427 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26428 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26429 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
26430 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26431 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26432 // CHECK20:       omp.inner.for.end:
26433 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26434 // CHECK20:       omp.loop.exit:
26435 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26436 // CHECK20-NEXT:    ret void
26437 //
26438 //
26439 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..15
26440 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26441 // CHECK20-NEXT:  entry:
26442 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26443 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26444 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26445 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26446 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26447 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26448 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26449 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26450 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26451 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26452 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26453 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26454 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26455 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26456 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26457 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26458 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26459 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26460 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26461 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
26462 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26463 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26464 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26465 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26466 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26467 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26468 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26469 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
26470 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26471 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26472 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
26473 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26474 // CHECK20:       cond.true:
26475 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26476 // CHECK20:       cond.false:
26477 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26478 // CHECK20-NEXT:    br label [[COND_END]]
26479 // CHECK20:       cond.end:
26480 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
26481 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
26482 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26483 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
26484 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26485 // CHECK20:       omp.inner.for.cond:
26486 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26487 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26488 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
26489 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26490 // CHECK20:       omp.inner.for.body:
26491 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26492 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
26493 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26494 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
26495 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
26496 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
26497 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
26498 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26499 // CHECK20:       omp.body.continue:
26500 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26501 // CHECK20:       omp.inner.for.inc:
26502 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26503 // CHECK20-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
26504 // CHECK20-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
26505 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26506 // CHECK20:       omp.inner.for.end:
26507 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26508 // CHECK20:       omp.loop.exit:
26509 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
26510 // CHECK20-NEXT:    ret void
26511 //
26512 //
26513 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
26514 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26515 // CHECK20-NEXT:  entry:
26516 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26517 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26518 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26519 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
26520 // CHECK20-NEXT:    ret void
26521 //
26522 //
26523 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..17
26524 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26525 // CHECK20-NEXT:  entry:
26526 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26527 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26528 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26529 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26530 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26531 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26532 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26533 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26534 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26535 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26536 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26537 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26538 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26539 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26540 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26541 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26542 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26543 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26544 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26545 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26546 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26547 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26548 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26549 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26550 // CHECK20:       cond.true:
26551 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26552 // CHECK20:       cond.false:
26553 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26554 // CHECK20-NEXT:    br label [[COND_END]]
26555 // CHECK20:       cond.end:
26556 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26557 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26558 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26559 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26560 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26561 // CHECK20:       omp.inner.for.cond:
26562 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26563 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26564 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26565 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26566 // CHECK20:       omp.inner.for.body:
26567 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26568 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26569 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
26570 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26571 // CHECK20:       omp.inner.for.inc:
26572 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26573 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26574 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
26575 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26576 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26577 // CHECK20:       omp.inner.for.end:
26578 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26579 // CHECK20:       omp.loop.exit:
26580 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26581 // CHECK20-NEXT:    ret void
26582 //
26583 //
26584 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..18
26585 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26586 // CHECK20-NEXT:  entry:
26587 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26588 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26589 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26590 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26591 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26592 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26593 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26594 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26595 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26596 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26597 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26598 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26599 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26600 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26601 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26602 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26603 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26604 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26605 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26606 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
26607 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26608 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26609 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26610 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26611 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26612 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26613 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26614 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
26615 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26616 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26617 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
26618 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26619 // CHECK20:       cond.true:
26620 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26621 // CHECK20:       cond.false:
26622 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26623 // CHECK20-NEXT:    br label [[COND_END]]
26624 // CHECK20:       cond.end:
26625 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
26626 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
26627 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26628 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
26629 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26630 // CHECK20:       omp.inner.for.cond:
26631 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26632 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26633 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
26634 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26635 // CHECK20:       omp.inner.for.body:
26636 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26637 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
26638 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26639 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
26640 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
26641 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
26642 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
26643 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26644 // CHECK20:       omp.body.continue:
26645 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26646 // CHECK20:       omp.inner.for.inc:
26647 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26648 // CHECK20-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
26649 // CHECK20-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
26650 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26651 // CHECK20:       omp.inner.for.end:
26652 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26653 // CHECK20:       omp.loop.exit:
26654 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
26655 // CHECK20-NEXT:    ret void
26656 //
26657 //
26658 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
26659 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26660 // CHECK20-NEXT:  entry:
26661 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26662 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26663 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26664 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26665 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26666 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26667 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26668 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26669 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26670 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
26671 // CHECK20-NEXT:    ret void
26672 //
26673 //
26674 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..21
26675 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26676 // CHECK20-NEXT:  entry:
26677 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26678 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26679 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26680 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26681 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26682 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26683 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26684 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26685 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26686 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26687 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26688 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26689 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26690 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26691 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26692 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26693 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26694 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26695 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26696 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26697 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26698 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26699 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26700 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26701 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26702 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26703 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26704 // CHECK20:       cond.true:
26705 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26706 // CHECK20:       cond.false:
26707 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26708 // CHECK20-NEXT:    br label [[COND_END]]
26709 // CHECK20:       cond.end:
26710 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26711 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26712 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26713 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26714 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26715 // CHECK20:       omp.inner.for.cond:
26716 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26717 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26718 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26719 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26720 // CHECK20:       omp.inner.for.body:
26721 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26722 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26723 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26724 // CHECK20-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26725 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26726 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
26727 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26728 // CHECK20:       omp.inner.for.inc:
26729 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26730 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26731 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
26732 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26733 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26734 // CHECK20:       omp.inner.for.end:
26735 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26736 // CHECK20:       omp.loop.exit:
26737 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26738 // CHECK20-NEXT:    ret void
26739 //
26740 //
26741 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..22
26742 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26743 // CHECK20-NEXT:  entry:
26744 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26745 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26746 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26747 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26748 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26749 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26750 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26751 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26752 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26753 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26754 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26755 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26756 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26757 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26758 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26759 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26760 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26761 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26762 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26763 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26764 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26765 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
26766 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26767 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26768 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26769 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26770 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26771 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26772 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26773 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26774 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
26775 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
26776 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
26777 // CHECK20:       omp.dispatch.cond:
26778 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26779 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26780 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
26781 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26782 // CHECK20:       cond.true:
26783 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26784 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26785 // CHECK20:       cond.false:
26786 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26787 // CHECK20-NEXT:    br label [[COND_END]]
26788 // CHECK20:       cond.end:
26789 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
26790 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
26791 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26792 // CHECK20-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
26793 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26794 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26795 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
26796 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26797 // CHECK20:       omp.dispatch.body:
26798 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26799 // CHECK20:       omp.inner.for.cond:
26800 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26801 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26802 // CHECK20-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
26803 // CHECK20-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26804 // CHECK20:       omp.inner.for.body:
26805 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26806 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
26807 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26808 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
26809 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
26810 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
26811 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
26812 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26813 // CHECK20:       omp.body.continue:
26814 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26815 // CHECK20:       omp.inner.for.inc:
26816 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26817 // CHECK20-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
26818 // CHECK20-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
26819 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26820 // CHECK20:       omp.inner.for.end:
26821 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
26822 // CHECK20:       omp.dispatch.inc:
26823 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26824 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26825 // CHECK20-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
26826 // CHECK20-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
26827 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26828 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26829 // CHECK20-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
26830 // CHECK20-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
26831 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
26832 // CHECK20:       omp.dispatch.end:
26833 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
26834 // CHECK20-NEXT:    ret void
26835 //
26836 //
26837 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
26838 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26839 // CHECK20-NEXT:  entry:
26840 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26841 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26842 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26843 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
26844 // CHECK20-NEXT:    ret void
26845 //
26846 //
26847 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..25
26848 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26849 // CHECK20-NEXT:  entry:
26850 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26851 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26852 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26853 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26854 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26855 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26856 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26857 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26858 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26859 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26860 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26861 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26862 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26863 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26864 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26865 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26866 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26867 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26868 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26869 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26870 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26871 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26872 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26873 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26874 // CHECK20:       cond.true:
26875 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26876 // CHECK20:       cond.false:
26877 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26878 // CHECK20-NEXT:    br label [[COND_END]]
26879 // CHECK20:       cond.end:
26880 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26881 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26882 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26883 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26884 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26885 // CHECK20:       omp.inner.for.cond:
26886 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26887 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26888 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26889 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26890 // CHECK20:       omp.inner.for.body:
26891 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26892 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26893 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
26894 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26895 // CHECK20:       omp.inner.for.inc:
26896 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26897 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26898 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
26899 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26900 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26901 // CHECK20:       omp.inner.for.end:
26902 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26903 // CHECK20:       omp.loop.exit:
26904 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26905 // CHECK20-NEXT:    ret void
26906 //
26907 //
26908 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..26
26909 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26910 // CHECK20-NEXT:  entry:
26911 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26912 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26913 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26914 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26915 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26916 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26917 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26918 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26919 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26920 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26921 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26922 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26923 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26924 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26925 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26926 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26927 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26928 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26929 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26930 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
26931 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26932 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26933 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26934 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26935 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26936 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26937 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26938 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26939 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26940 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
26941 // CHECK20-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
26942 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
26943 // CHECK20:       omp.dispatch.cond:
26944 // CHECK20-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
26945 // CHECK20-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
26946 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26947 // CHECK20:       omp.dispatch.body:
26948 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26949 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
26950 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26951 // CHECK20:       omp.inner.for.cond:
26952 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
26953 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
26954 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
26955 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26956 // CHECK20:       omp.inner.for.body:
26957 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
26958 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
26959 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26960 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
26961 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
26962 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
26963 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
26964 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26965 // CHECK20:       omp.body.continue:
26966 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26967 // CHECK20:       omp.inner.for.inc:
26968 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
26969 // CHECK20-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
26970 // CHECK20-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
26971 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
26972 // CHECK20:       omp.inner.for.end:
26973 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
26974 // CHECK20:       omp.dispatch.inc:
26975 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
26976 // CHECK20:       omp.dispatch.end:
26977 // CHECK20-NEXT:    ret void
26978 //
26979 //
26980 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
26981 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26982 // CHECK20-NEXT:  entry:
26983 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26984 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26985 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26986 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26987 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26988 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26989 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26990 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26991 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26992 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
26993 // CHECK20-NEXT:    ret void
26994 //
26995 //
26996 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..29
26997 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26998 // CHECK20-NEXT:  entry:
26999 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
27000 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
27001 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
27002 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
27003 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
27004 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
27005 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
27006 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
27007 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
27008 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
27009 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
27010 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
27011 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
27012 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
27013 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
27014 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
27015 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
27016 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
27017 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
27018 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
27019 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
27020 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27021 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
27022 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
27023 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27024 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
27025 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
27026 // CHECK20:       cond.true:
27027 // CHECK20-NEXT:    br label [[COND_END:%.*]]
27028 // CHECK20:       cond.false:
27029 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27030 // CHECK20-NEXT:    br label [[COND_END]]
27031 // CHECK20:       cond.end:
27032 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
27033 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
27034 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
27035 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
27036 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
27037 // CHECK20:       omp.inner.for.cond:
27038 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
27039 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27040 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
27041 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
27042 // CHECK20:       omp.inner.for.body:
27043 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
27044 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27045 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
27046 // CHECK20-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
27047 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
27048 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
27049 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
27050 // CHECK20:       omp.inner.for.inc:
27051 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
27052 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
27053 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
27054 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
27055 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
27056 // CHECK20:       omp.inner.for.end:
27057 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
27058 // CHECK20:       omp.loop.exit:
27059 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
27060 // CHECK20-NEXT:    ret void
27061 //
27062 //
27063 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..30
27064 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
27065 // CHECK20-NEXT:  entry:
27066 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
27067 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
27068 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
27069 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
27070 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
27071 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
27072 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
27073 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
27074 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
27075 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
27076 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
27077 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
27078 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
27079 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
27080 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
27081 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
27082 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
27083 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
27084 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
27085 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
27086 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
27087 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
27088 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
27089 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
27090 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
27091 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
27092 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
27093 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
27094 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
27095 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
27096 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
27097 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27098 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
27099 // CHECK20-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
27100 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
27101 // CHECK20:       omp.dispatch.cond:
27102 // CHECK20-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
27103 // CHECK20-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
27104 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
27105 // CHECK20:       omp.dispatch.body:
27106 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
27107 // CHECK20-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
27108 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
27109 // CHECK20:       omp.inner.for.cond:
27110 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
27111 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
27112 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
27113 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
27114 // CHECK20:       omp.inner.for.body:
27115 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
27116 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
27117 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
27118 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
27119 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
27120 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
27121 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
27122 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
27123 // CHECK20:       omp.body.continue:
27124 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
27125 // CHECK20:       omp.inner.for.inc:
27126 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
27127 // CHECK20-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
27128 // CHECK20-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
27129 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
27130 // CHECK20:       omp.inner.for.end:
27131 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
27132 // CHECK20:       omp.dispatch.inc:
27133 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
27134 // CHECK20:       omp.dispatch.end:
27135 // CHECK20-NEXT:    ret void
27136 //
27137 //
27138 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
27139 // CHECK20-SAME: () #[[ATTR5:[0-9]+]] {
27140 // CHECK20-NEXT:  entry:
27141 // CHECK20-NEXT:    call void @__tgt_register_requires(i64 1)
27142 // CHECK20-NEXT:    ret void
27143 //
27144