1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
8
9 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
10 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
12 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
13 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
15
16 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
18 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
19 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
21 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
22
23 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
24 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
25 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14
26 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
27 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
28 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16
29
30 // expected-no-diagnostics
31 #ifndef HEADER
32 #define HEADER
33
34 void fn1();
35 void fn2();
36 void fn3();
37 void fn4();
38 void fn5();
39 void fn6();
40
41 int Arg;
42
gtid_test()43 void gtid_test() {
44 #ifdef OMP5
45 #pragma omp target teams distribute parallel for simd if(simd: true) nontemporal(Arg)
46 #else
47 #pragma omp target teams distribute parallel for simd
48 #endif // OMP5
49 for (int i = 0; i < 100; i++) {
50 Arg = 0;
51 }
52
53 #pragma omp target teams distribute parallel for simd if (parallel: false)
54 for(int i = 0 ; i < 100; i++) {
55 gtid_test();
56 }
57 }
58
59
60 template <typename T>
tmain(T Arg)61 int tmain(T Arg) {
62 #pragma omp target teams distribute parallel for simd if (true)
63 for(int i = 0 ; i < 100; i++) {
64 fn1();
65 }
66 #pragma omp target teams distribute parallel for simd if (false)
67 for(int i = 0 ; i < 100; i++) {
68 fn2();
69 }
70 #pragma omp target teams distribute parallel for simd if (parallel: Arg)
71 for(int i = 0 ; i < 100; i++) {
72 fn3();
73 }
74 return 0;
75 }
76
main()77 int main() {
78 #pragma omp target teams distribute parallel for simd if (true)
79 for(int i = 0 ; i < 100; i++) {
80
81
82 fn4();
83 }
84
85 #pragma omp target teams distribute parallel for simd if (false)
86 for(int i = 0 ; i < 100; i++) {
87
88
89 fn5();
90 }
91
92 #pragma omp target teams distribute parallel for simd if (Arg)
93 for(int i = 0 ; i < 100; i++) {
94
95
96 fn6();
97 }
98
99 return tmain(Arg);
100 }
101
102
103
104
105
106
107 // call void [[T_OUTLINE_FUN_3:@.+]](
108
109 #endif
110
111 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv
112 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
113 // CHECK1-NEXT: entry:
114 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
115 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
116 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
117 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
118 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
119 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
120 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* @Arg, align 4
121 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
122 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
123 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
124 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
125 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
126 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
127 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
128 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
129 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
130 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
131 // CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8
132 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
133 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
134 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
135 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
136 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
137 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
138 // CHECK1: omp_offload.failed:
139 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
140 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
141 // CHECK1: omp_offload.cont:
142 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
143 // CHECK1-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
144 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
145 // CHECK1-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
146 // CHECK1: omp_offload.failed2:
147 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]]
148 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]]
149 // CHECK1: omp_offload.cont3:
150 // CHECK1-NEXT: ret void
151 //
152 //
153 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
154 // CHECK1-SAME: (i64 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
155 // CHECK1-NEXT: entry:
156 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
157 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
158 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
159 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
160 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
161 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
162 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
163 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
164 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]])
165 // CHECK1-NEXT: ret void
166 //
167 //
168 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
169 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
170 // CHECK1-NEXT: entry:
171 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
172 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
173 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
174 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
175 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
176 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
177 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
178 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
179 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
180 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
181 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
182 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
183 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
184 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
185 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
186 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
187 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
188 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
189 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
190 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
191 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
192 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
193 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
194 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
195 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
196 // CHECK1: cond.true:
197 // CHECK1-NEXT: br label [[COND_END:%.*]]
198 // CHECK1: cond.false:
199 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
200 // CHECK1-NEXT: br label [[COND_END]]
201 // CHECK1: cond.end:
202 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
203 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
204 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
205 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
206 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
207 // CHECK1: omp.inner.for.cond:
208 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
209 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
210 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
211 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
212 // CHECK1: omp.inner.for.body:
213 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
214 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
215 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
216 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
217 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !9
218 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
219 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[CONV2]], align 4, !llvm.access.group !9
220 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[ARG_CASTED]], align 8, !llvm.access.group !9
221 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group !9
222 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
223 // CHECK1: omp.inner.for.inc:
224 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
225 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
226 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
227 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
228 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
229 // CHECK1: omp.inner.for.end:
230 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
231 // CHECK1: omp.loop.exit:
232 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
233 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
234 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
235 // CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
236 // CHECK1: .omp.final.then:
237 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
238 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
239 // CHECK1: .omp.final.done:
240 // CHECK1-NEXT: ret void
241 //
242 //
243 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
244 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
245 // CHECK1-NEXT: entry:
246 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
247 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
248 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
249 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
250 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
251 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
252 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
253 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
254 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
255 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
256 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
257 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
258 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
259 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
260 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
261 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
262 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
263 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
264 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
265 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
266 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
267 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
268 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
269 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
270 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
271 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
272 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
273 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
274 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
275 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
276 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
277 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
278 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
279 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
280 // CHECK1: cond.true:
281 // CHECK1-NEXT: br label [[COND_END:%.*]]
282 // CHECK1: cond.false:
283 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
284 // CHECK1-NEXT: br label [[COND_END]]
285 // CHECK1: cond.end:
286 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
287 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
288 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
289 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
290 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
291 // CHECK1: omp.inner.for.cond:
292 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
293 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
294 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
295 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
296 // CHECK1: omp.inner.for.body:
297 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
298 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
299 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
300 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
301 // CHECK1-NEXT: store i32 0, i32* [[CONV]], align 8, !llvm.access.group !13
302 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
303 // CHECK1: omp.body.continue:
304 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
305 // CHECK1: omp.inner.for.inc:
306 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
307 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
308 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
309 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
310 // CHECK1: omp.inner.for.end:
311 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
312 // CHECK1: omp.loop.exit:
313 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
314 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
315 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
316 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
317 // CHECK1: .omp.final.then:
318 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
319 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
320 // CHECK1: .omp.final.done:
321 // CHECK1-NEXT: ret void
322 //
323 //
324 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53
325 // CHECK1-SAME: () #[[ATTR1]] {
326 // CHECK1-NEXT: entry:
327 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
328 // CHECK1-NEXT: ret void
329 //
330 //
331 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
332 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
333 // CHECK1-NEXT: entry:
334 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
335 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
336 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
337 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
338 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
339 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
340 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
341 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
342 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
343 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
344 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
345 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
346 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
347 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
348 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
349 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
350 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
351 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
352 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
353 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
354 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
355 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
356 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
357 // CHECK1: cond.true:
358 // CHECK1-NEXT: br label [[COND_END:%.*]]
359 // CHECK1: cond.false:
360 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
361 // CHECK1-NEXT: br label [[COND_END]]
362 // CHECK1: cond.end:
363 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
364 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
365 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
366 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
367 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
368 // CHECK1: omp.inner.for.cond:
369 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
370 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
371 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
372 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
373 // CHECK1: omp.inner.for.body:
374 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18
375 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
376 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
377 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
378 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !18
379 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !18
380 // CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !18
381 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !18
382 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
383 // CHECK1: omp.inner.for.inc:
384 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
385 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18
386 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
387 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
388 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
389 // CHECK1: omp.inner.for.end:
390 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
391 // CHECK1: omp.loop.exit:
392 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
393 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
394 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
395 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
396 // CHECK1: .omp.final.then:
397 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
398 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
399 // CHECK1: .omp.final.done:
400 // CHECK1-NEXT: ret void
401 //
402 //
403 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
404 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
405 // CHECK1-NEXT: entry:
406 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
407 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
408 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
409 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
410 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
411 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
412 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
413 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
414 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
415 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
416 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
417 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
418 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
419 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
420 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
421 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
422 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
423 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
424 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
425 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
426 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
427 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
428 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
429 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
430 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
431 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
432 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
433 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
434 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
435 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
436 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
437 // CHECK1: cond.true:
438 // CHECK1-NEXT: br label [[COND_END:%.*]]
439 // CHECK1: cond.false:
440 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
441 // CHECK1-NEXT: br label [[COND_END]]
442 // CHECK1: cond.end:
443 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
444 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
445 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
446 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
447 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
448 // CHECK1: omp.inner.for.cond:
449 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
450 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
451 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
452 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
453 // CHECK1: omp.inner.for.body:
454 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
455 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
456 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
457 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
458 // CHECK1-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !21
459 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
460 // CHECK1: omp.body.continue:
461 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
462 // CHECK1: omp.inner.for.inc:
463 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
464 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
465 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
466 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
467 // CHECK1: omp.inner.for.end:
468 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
469 // CHECK1: omp.loop.exit:
470 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
471 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
472 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
473 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
474 // CHECK1: .omp.final.then:
475 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
476 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
477 // CHECK1: .omp.final.done:
478 // CHECK1-NEXT: ret void
479 //
480 //
481 // CHECK1-LABEL: define {{[^@]+}}@main
482 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
483 // CHECK1-NEXT: entry:
484 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
485 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
486 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
487 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
488 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
489 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
490 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
491 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
492 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
493 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
494 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
495 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
496 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
497 // CHECK1: omp_offload.failed:
498 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]]
499 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
500 // CHECK1: omp_offload.cont:
501 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]]
502 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* @Arg, align 4
503 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
504 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
505 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
506 // CHECK1-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
507 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
508 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
509 // CHECK1-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
510 // CHECK1-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
511 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
512 // CHECK1-NEXT: [[TMP5:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
513 // CHECK1-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP5]] to i1
514 // CHECK1-NEXT: br i1 [[TOBOOL3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
515 // CHECK1: omp_if.then:
516 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
517 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
518 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
519 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
520 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
521 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
522 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
523 // CHECK1-NEXT: store i8* null, i8** [[TMP10]], align 8
524 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
525 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
526 // CHECK1-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
527 // CHECK1-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP13]] to i1
528 // CHECK1-NEXT: [[TMP14:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
529 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
530 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.10, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.11, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP14]])
531 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
532 // CHECK1-NEXT: br i1 [[TMP16]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
533 // CHECK1: omp_offload.failed6:
534 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
535 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]]
536 // CHECK1: omp_offload.cont7:
537 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
538 // CHECK1: omp_if.else:
539 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
540 // CHECK1-NEXT: br label [[OMP_IF_END]]
541 // CHECK1: omp_if.end:
542 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* @Arg, align 4
543 // CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP17]])
544 // CHECK1-NEXT: ret i32 [[CALL]]
545 //
546 //
547 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78
548 // CHECK1-SAME: () #[[ATTR1]] {
549 // CHECK1-NEXT: entry:
550 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
551 // CHECK1-NEXT: ret void
552 //
553 //
554 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
555 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
556 // CHECK1-NEXT: entry:
557 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
558 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
559 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
560 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
561 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
562 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
563 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
564 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
565 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
566 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
567 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
568 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
569 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
570 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
571 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
572 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
573 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
574 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
575 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
576 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
577 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
578 // CHECK1: cond.true:
579 // CHECK1-NEXT: br label [[COND_END:%.*]]
580 // CHECK1: cond.false:
581 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
582 // CHECK1-NEXT: br label [[COND_END]]
583 // CHECK1: cond.end:
584 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
585 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
586 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
587 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
588 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
589 // CHECK1: omp.inner.for.cond:
590 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
591 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
592 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
593 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
594 // CHECK1: omp.inner.for.body:
595 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24
596 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
597 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
598 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
599 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !24
600 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
601 // CHECK1: omp.inner.for.inc:
602 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
603 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24
604 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
605 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
606 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
607 // CHECK1: omp.inner.for.end:
608 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
609 // CHECK1: omp.loop.exit:
610 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
611 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
612 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
613 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
614 // CHECK1: .omp.final.then:
615 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
616 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
617 // CHECK1: .omp.final.done:
618 // CHECK1-NEXT: ret void
619 //
620 //
621 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
622 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
623 // CHECK1-NEXT: entry:
624 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
625 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
626 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
627 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
628 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
629 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
630 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
631 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
632 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
633 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
634 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
635 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
636 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
637 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
638 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
639 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
640 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
641 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
642 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
643 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
644 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
645 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
646 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
647 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
648 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
649 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
650 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
651 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
652 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
653 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
654 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
655 // CHECK1: cond.true:
656 // CHECK1-NEXT: br label [[COND_END:%.*]]
657 // CHECK1: cond.false:
658 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
659 // CHECK1-NEXT: br label [[COND_END]]
660 // CHECK1: cond.end:
661 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
662 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
663 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
664 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
665 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
666 // CHECK1: omp.inner.for.cond:
667 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
668 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
669 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
670 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
671 // CHECK1: omp.inner.for.body:
672 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
673 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
674 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
675 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
676 // CHECK1-NEXT: call void @_Z3fn4v(), !llvm.access.group !27
677 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
678 // CHECK1: omp.body.continue:
679 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
680 // CHECK1: omp.inner.for.inc:
681 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
682 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
683 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
684 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
685 // CHECK1: omp.inner.for.end:
686 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
687 // CHECK1: omp.loop.exit:
688 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
689 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
690 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
691 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
692 // CHECK1: .omp.final.then:
693 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
694 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
695 // CHECK1: .omp.final.done:
696 // CHECK1-NEXT: ret void
697 //
698 //
699 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85
700 // CHECK1-SAME: () #[[ATTR1]] {
701 // CHECK1-NEXT: entry:
702 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
703 // CHECK1-NEXT: ret void
704 //
705 //
706 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
707 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
708 // CHECK1-NEXT: entry:
709 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
710 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
711 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
712 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
713 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
714 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
715 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
716 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
717 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
718 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
719 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
720 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
721 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
722 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
723 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
724 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
725 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
726 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
727 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
728 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
729 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
730 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
731 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
732 // CHECK1: cond.true:
733 // CHECK1-NEXT: br label [[COND_END:%.*]]
734 // CHECK1: cond.false:
735 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
736 // CHECK1-NEXT: br label [[COND_END]]
737 // CHECK1: cond.end:
738 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
739 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
740 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
741 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
742 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
743 // CHECK1: omp.inner.for.cond:
744 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
745 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
746 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
747 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
748 // CHECK1: omp.inner.for.body:
749 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30
750 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
751 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
752 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
753 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !30
754 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !30
755 // CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !30
756 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !30
757 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
758 // CHECK1: omp.inner.for.inc:
759 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
760 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30
761 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
762 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
763 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
764 // CHECK1: omp.inner.for.end:
765 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
766 // CHECK1: omp.loop.exit:
767 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
768 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
769 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
770 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
771 // CHECK1: .omp.final.then:
772 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
773 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
774 // CHECK1: .omp.final.done:
775 // CHECK1-NEXT: ret void
776 //
777 //
778 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
779 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
780 // CHECK1-NEXT: entry:
781 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
782 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
783 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
784 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
785 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
786 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
787 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
788 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
789 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
790 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
791 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
792 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
793 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
794 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
795 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
796 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
797 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
798 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
799 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
800 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
801 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
802 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
803 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
804 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
805 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
806 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
807 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
808 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
809 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
810 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
811 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
812 // CHECK1: cond.true:
813 // CHECK1-NEXT: br label [[COND_END:%.*]]
814 // CHECK1: cond.false:
815 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
816 // CHECK1-NEXT: br label [[COND_END]]
817 // CHECK1: cond.end:
818 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
819 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
820 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
821 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
822 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
823 // CHECK1: omp.inner.for.cond:
824 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
825 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33
826 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
827 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
828 // CHECK1: omp.inner.for.body:
829 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
830 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
831 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
832 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33
833 // CHECK1-NEXT: call void @_Z3fn5v(), !llvm.access.group !33
834 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
835 // CHECK1: omp.body.continue:
836 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
837 // CHECK1: omp.inner.for.inc:
838 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
839 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
840 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
841 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
842 // CHECK1: omp.inner.for.end:
843 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
844 // CHECK1: omp.loop.exit:
845 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
846 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
847 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
848 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
849 // CHECK1: .omp.final.then:
850 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
851 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
852 // CHECK1: .omp.final.done:
853 // CHECK1-NEXT: ret void
854 //
855 //
856 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
857 // CHECK1-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
858 // CHECK1-NEXT: entry:
859 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
860 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
861 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
862 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
863 // CHECK1-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
864 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
865 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
866 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
867 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
868 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
869 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP1]])
870 // CHECK1-NEXT: ret void
871 //
872 //
873 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
874 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
875 // CHECK1-NEXT: entry:
876 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
877 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
878 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
879 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
880 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
881 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
882 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
883 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
884 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
885 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
886 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
887 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
888 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
889 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
890 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
891 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
892 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
893 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
894 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
895 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
896 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
897 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
898 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
899 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
900 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
901 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
902 // CHECK1: cond.true:
903 // CHECK1-NEXT: br label [[COND_END:%.*]]
904 // CHECK1: cond.false:
905 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
906 // CHECK1-NEXT: br label [[COND_END]]
907 // CHECK1: cond.end:
908 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
909 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
910 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
911 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
912 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
913 // CHECK1: omp.inner.for.cond:
914 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
915 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
916 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
917 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
918 // CHECK1: omp.inner.for.body:
919 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36
920 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
921 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
922 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
923 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !36
924 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
925 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
926 // CHECK1: omp_if.then:
927 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !36
928 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
929 // CHECK1: omp_if.else:
930 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !36
931 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !36
932 // CHECK1-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !36
933 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !36
934 // CHECK1-NEXT: br label [[OMP_IF_END]]
935 // CHECK1: omp_if.end:
936 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
937 // CHECK1: omp.inner.for.inc:
938 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
939 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36
940 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
941 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
942 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
943 // CHECK1: omp.inner.for.end:
944 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
945 // CHECK1: omp.loop.exit:
946 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
947 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
948 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
949 // CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
950 // CHECK1: .omp.final.then:
951 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
952 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
953 // CHECK1: .omp.final.done:
954 // CHECK1-NEXT: ret void
955 //
956 //
957 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9
958 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
959 // CHECK1-NEXT: entry:
960 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
961 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
962 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
963 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
964 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
965 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
966 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
967 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
968 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
969 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
970 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
971 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
972 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
973 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
974 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
975 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
976 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
977 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
978 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
979 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
980 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
981 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
982 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
983 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
984 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
985 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
986 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
987 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
988 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
989 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
990 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
991 // CHECK1: cond.true:
992 // CHECK1-NEXT: br label [[COND_END:%.*]]
993 // CHECK1: cond.false:
994 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
995 // CHECK1-NEXT: br label [[COND_END]]
996 // CHECK1: cond.end:
997 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
998 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
999 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1000 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1001 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1002 // CHECK1: omp.inner.for.cond:
1003 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
1004 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39
1005 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1006 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1007 // CHECK1: omp.inner.for.body:
1008 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
1009 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1010 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1011 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39
1012 // CHECK1-NEXT: call void @_Z3fn6v(), !llvm.access.group !39
1013 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1014 // CHECK1: omp.body.continue:
1015 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1016 // CHECK1: omp.inner.for.inc:
1017 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
1018 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1019 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
1020 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
1021 // CHECK1: omp.inner.for.end:
1022 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1023 // CHECK1: omp.loop.exit:
1024 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1025 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1026 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1027 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1028 // CHECK1: .omp.final.then:
1029 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1030 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1031 // CHECK1: .omp.final.done:
1032 // CHECK1-NEXT: ret void
1033 //
1034 //
1035 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
1036 // CHECK1-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
1037 // CHECK1-NEXT: entry:
1038 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
1039 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1040 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1041 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1042 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1043 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1044 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1045 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1046 // CHECK1-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
1047 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1048 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
1049 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1050 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1051 // CHECK1: omp_offload.failed:
1052 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
1053 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
1054 // CHECK1: omp_offload.cont:
1055 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]]
1056 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
1057 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
1058 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1059 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1060 // CHECK1-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1061 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
1062 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1063 // CHECK1-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
1064 // CHECK1-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
1065 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1066 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1067 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
1068 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP6]], align 8
1069 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1070 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1071 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
1072 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1073 // CHECK1-NEXT: store i8* null, i8** [[TMP9]], align 8
1074 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1075 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1076 // CHECK1-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1077 // CHECK1-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP12]] to i1
1078 // CHECK1-NEXT: [[TMP13:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
1079 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1080 // CHECK1-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, i32 1, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.18, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.19, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP13]])
1081 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1082 // CHECK1-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
1083 // CHECK1: omp_offload.failed5:
1084 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP4]]) #[[ATTR2]]
1085 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT6]]
1086 // CHECK1: omp_offload.cont6:
1087 // CHECK1-NEXT: ret i32 0
1088 //
1089 //
1090 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
1091 // CHECK1-SAME: () #[[ATTR1]] {
1092 // CHECK1-NEXT: entry:
1093 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
1094 // CHECK1-NEXT: ret void
1095 //
1096 //
1097 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12
1098 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1099 // CHECK1-NEXT: entry:
1100 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1101 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1102 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1103 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1104 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1105 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1106 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1107 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1108 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1109 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1110 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1111 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1112 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1113 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1114 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1115 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1116 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1117 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1118 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1119 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1120 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1121 // CHECK1: cond.true:
1122 // CHECK1-NEXT: br label [[COND_END:%.*]]
1123 // CHECK1: cond.false:
1124 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1125 // CHECK1-NEXT: br label [[COND_END]]
1126 // CHECK1: cond.end:
1127 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1128 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1129 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1130 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1131 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1132 // CHECK1: omp.inner.for.cond:
1133 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
1134 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !42
1135 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1136 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1137 // CHECK1: omp.inner.for.body:
1138 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !42
1139 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1140 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !42
1141 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1142 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !42
1143 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1144 // CHECK1: omp.inner.for.inc:
1145 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
1146 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !42
1147 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1148 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
1149 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
1150 // CHECK1: omp.inner.for.end:
1151 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1152 // CHECK1: omp.loop.exit:
1153 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1154 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1155 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1156 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1157 // CHECK1: .omp.final.then:
1158 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1159 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1160 // CHECK1: .omp.final.done:
1161 // CHECK1-NEXT: ret void
1162 //
1163 //
1164 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13
1165 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1166 // CHECK1-NEXT: entry:
1167 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1168 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1169 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1170 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1171 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1172 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1173 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1174 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1175 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1176 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1177 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1178 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1179 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1180 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1181 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1182 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1183 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1184 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1185 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1186 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1187 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1188 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1189 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1190 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1191 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1192 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1193 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1194 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1195 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1196 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1197 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1198 // CHECK1: cond.true:
1199 // CHECK1-NEXT: br label [[COND_END:%.*]]
1200 // CHECK1: cond.false:
1201 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1202 // CHECK1-NEXT: br label [[COND_END]]
1203 // CHECK1: cond.end:
1204 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1205 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1206 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1207 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1208 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1209 // CHECK1: omp.inner.for.cond:
1210 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
1211 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !45
1212 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1213 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1214 // CHECK1: omp.inner.for.body:
1215 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
1216 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1217 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1218 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !45
1219 // CHECK1-NEXT: call void @_Z3fn1v(), !llvm.access.group !45
1220 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1221 // CHECK1: omp.body.continue:
1222 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1223 // CHECK1: omp.inner.for.inc:
1224 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
1225 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1226 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
1227 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
1228 // CHECK1: omp.inner.for.end:
1229 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1230 // CHECK1: omp.loop.exit:
1231 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1232 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1233 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1234 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1235 // CHECK1: .omp.final.then:
1236 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1237 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1238 // CHECK1: .omp.final.done:
1239 // CHECK1-NEXT: ret void
1240 //
1241 //
1242 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66
1243 // CHECK1-SAME: () #[[ATTR1]] {
1244 // CHECK1-NEXT: entry:
1245 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*))
1246 // CHECK1-NEXT: ret void
1247 //
1248 //
1249 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
1250 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1251 // CHECK1-NEXT: entry:
1252 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1253 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1254 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1255 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1256 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1257 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1258 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1259 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1260 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1261 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1262 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1263 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1264 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1265 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1266 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1267 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1268 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1269 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1270 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1271 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1272 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1273 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1274 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1275 // CHECK1: cond.true:
1276 // CHECK1-NEXT: br label [[COND_END:%.*]]
1277 // CHECK1: cond.false:
1278 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1279 // CHECK1-NEXT: br label [[COND_END]]
1280 // CHECK1: cond.end:
1281 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1282 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1283 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1284 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1285 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1286 // CHECK1: omp.inner.for.cond:
1287 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !48
1288 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !48
1289 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1290 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1291 // CHECK1: omp.inner.for.body:
1292 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !48
1293 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1294 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !48
1295 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1296 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !48
1297 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !48
1298 // CHECK1-NEXT: call void @.omp_outlined..15(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !48
1299 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !48
1300 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1301 // CHECK1: omp.inner.for.inc:
1302 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !48
1303 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !48
1304 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1305 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !48
1306 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP49:![0-9]+]]
1307 // CHECK1: omp.inner.for.end:
1308 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1309 // CHECK1: omp.loop.exit:
1310 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1311 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1312 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1313 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1314 // CHECK1: .omp.final.then:
1315 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1316 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1317 // CHECK1: .omp.final.done:
1318 // CHECK1-NEXT: ret void
1319 //
1320 //
1321 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1322 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1323 // CHECK1-NEXT: entry:
1324 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1325 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1326 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1327 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1328 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1329 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1330 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1331 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1332 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1333 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1334 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1335 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1336 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1337 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1338 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1339 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1340 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1341 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1342 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1343 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1344 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1345 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1346 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1347 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1348 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1349 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1350 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1351 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1352 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1353 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1354 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1355 // CHECK1: cond.true:
1356 // CHECK1-NEXT: br label [[COND_END:%.*]]
1357 // CHECK1: cond.false:
1358 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1359 // CHECK1-NEXT: br label [[COND_END]]
1360 // CHECK1: cond.end:
1361 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1362 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1363 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1364 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1365 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1366 // CHECK1: omp.inner.for.cond:
1367 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !51
1368 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !51
1369 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1370 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1371 // CHECK1: omp.inner.for.body:
1372 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !51
1373 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1374 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1375 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !51
1376 // CHECK1-NEXT: call void @_Z3fn2v(), !llvm.access.group !51
1377 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1378 // CHECK1: omp.body.continue:
1379 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1380 // CHECK1: omp.inner.for.inc:
1381 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !51
1382 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1383 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !51
1384 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
1385 // CHECK1: omp.inner.for.end:
1386 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1387 // CHECK1: omp.loop.exit:
1388 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1389 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1390 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1391 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1392 // CHECK1: .omp.final.then:
1393 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1394 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1395 // CHECK1: .omp.final.done:
1396 // CHECK1-NEXT: ret void
1397 //
1398 //
1399 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70
1400 // CHECK1-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1401 // CHECK1-NEXT: entry:
1402 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1403 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1404 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1405 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1406 // CHECK1-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
1407 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
1408 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1409 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1410 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
1411 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1412 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP1]])
1413 // CHECK1-NEXT: ret void
1414 //
1415 //
1416 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..16
1417 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1418 // CHECK1-NEXT: entry:
1419 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1420 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1421 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1422 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1423 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1424 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1425 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1426 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1427 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1428 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1429 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1430 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1431 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1432 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1433 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1434 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1435 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1436 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1437 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1438 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1439 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1440 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1441 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1442 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1443 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1444 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1445 // CHECK1: cond.true:
1446 // CHECK1-NEXT: br label [[COND_END:%.*]]
1447 // CHECK1: cond.false:
1448 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1449 // CHECK1-NEXT: br label [[COND_END]]
1450 // CHECK1: cond.end:
1451 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1452 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1453 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1454 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1455 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1456 // CHECK1: omp.inner.for.cond:
1457 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !54
1458 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !54
1459 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1460 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1461 // CHECK1: omp.inner.for.body:
1462 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !54
1463 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1464 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !54
1465 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1466 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !54
1467 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
1468 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1469 // CHECK1: omp_if.then:
1470 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..17 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !54
1471 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
1472 // CHECK1: omp_if.else:
1473 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !54
1474 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !54
1475 // CHECK1-NEXT: call void @.omp_outlined..17(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !54
1476 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !54
1477 // CHECK1-NEXT: br label [[OMP_IF_END]]
1478 // CHECK1: omp_if.end:
1479 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1480 // CHECK1: omp.inner.for.inc:
1481 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !54
1482 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !54
1483 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1484 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !54
1485 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
1486 // CHECK1: omp.inner.for.end:
1487 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1488 // CHECK1: omp.loop.exit:
1489 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1490 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1491 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
1492 // CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1493 // CHECK1: .omp.final.then:
1494 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1495 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1496 // CHECK1: .omp.final.done:
1497 // CHECK1-NEXT: ret void
1498 //
1499 //
1500 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..17
1501 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1502 // CHECK1-NEXT: entry:
1503 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1504 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1505 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1506 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1507 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1508 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1509 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1510 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1511 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1512 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1513 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1514 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1515 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1516 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1517 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1518 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1519 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1520 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1521 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1522 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1523 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1524 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1525 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1526 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1527 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1528 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1529 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1530 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1531 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1532 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1533 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1534 // CHECK1: cond.true:
1535 // CHECK1-NEXT: br label [[COND_END:%.*]]
1536 // CHECK1: cond.false:
1537 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1538 // CHECK1-NEXT: br label [[COND_END]]
1539 // CHECK1: cond.end:
1540 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1541 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1542 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1543 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1544 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1545 // CHECK1: omp.inner.for.cond:
1546 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
1547 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !57
1548 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1549 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1550 // CHECK1: omp.inner.for.body:
1551 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
1552 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1553 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1554 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !57
1555 // CHECK1-NEXT: call void @_Z3fn3v(), !llvm.access.group !57
1556 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1557 // CHECK1: omp.body.continue:
1558 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1559 // CHECK1: omp.inner.for.inc:
1560 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
1561 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1562 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
1563 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
1564 // CHECK1: omp.inner.for.end:
1565 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1566 // CHECK1: omp.loop.exit:
1567 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1568 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1569 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1570 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1571 // CHECK1: .omp.final.then:
1572 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1573 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1574 // CHECK1: .omp.final.done:
1575 // CHECK1-NEXT: ret void
1576 //
1577 //
1578 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1579 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] {
1580 // CHECK1-NEXT: entry:
1581 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
1582 // CHECK1-NEXT: ret void
1583 //
1584 //
1585 // CHECK2-LABEL: define {{[^@]+}}@_Z9gtid_testv
1586 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
1587 // CHECK2-NEXT: entry:
1588 // CHECK2-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
1589 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1590 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1591 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1592 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1593 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1594 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* @Arg, align 4
1595 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
1596 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
1597 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
1598 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1599 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
1600 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
1601 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1602 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
1603 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
1604 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1605 // CHECK2-NEXT: store i8* null, i8** [[TMP6]], align 8
1606 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1607 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1608 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
1609 // CHECK2-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1610 // CHECK2-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1611 // CHECK2-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1612 // CHECK2: omp_offload.failed:
1613 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
1614 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
1615 // CHECK2: omp_offload.cont:
1616 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1617 // CHECK2-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
1618 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1619 // CHECK2-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
1620 // CHECK2: omp_offload.failed2:
1621 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]]
1622 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT3]]
1623 // CHECK2: omp_offload.cont3:
1624 // CHECK2-NEXT: ret void
1625 //
1626 //
1627 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
1628 // CHECK2-SAME: (i64 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
1629 // CHECK2-NEXT: entry:
1630 // CHECK2-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
1631 // CHECK2-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
1632 // CHECK2-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
1633 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
1634 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
1635 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
1636 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
1637 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
1638 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]])
1639 // CHECK2-NEXT: ret void
1640 //
1641 //
1642 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
1643 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
1644 // CHECK2-NEXT: entry:
1645 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1646 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1647 // CHECK2-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
1648 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1649 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1650 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1651 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1652 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1653 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1654 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1655 // CHECK2-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
1656 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1657 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1658 // CHECK2-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
1659 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
1660 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1661 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1662 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1663 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1664 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1665 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1666 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1667 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1668 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1669 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1670 // CHECK2: cond.true:
1671 // CHECK2-NEXT: br label [[COND_END:%.*]]
1672 // CHECK2: cond.false:
1673 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1674 // CHECK2-NEXT: br label [[COND_END]]
1675 // CHECK2: cond.end:
1676 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1677 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1678 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1679 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1680 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1681 // CHECK2: omp.inner.for.cond:
1682 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1683 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
1684 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1685 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1686 // CHECK2: omp.inner.for.body:
1687 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
1688 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1689 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
1690 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1691 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !9
1692 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
1693 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[CONV2]], align 4, !llvm.access.group !9
1694 // CHECK2-NEXT: [[TMP12:%.*]] = load i64, i64* [[ARG_CASTED]], align 8, !llvm.access.group !9
1695 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group !9
1696 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1697 // CHECK2: omp.inner.for.inc:
1698 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1699 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
1700 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1701 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1702 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1703 // CHECK2: omp.inner.for.end:
1704 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1705 // CHECK2: omp.loop.exit:
1706 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1707 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1708 // CHECK2-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
1709 // CHECK2-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1710 // CHECK2: .omp.final.then:
1711 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
1712 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1713 // CHECK2: .omp.final.done:
1714 // CHECK2-NEXT: ret void
1715 //
1716 //
1717 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
1718 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
1719 // CHECK2-NEXT: entry:
1720 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1721 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1722 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1723 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1724 // CHECK2-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
1725 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1726 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1727 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1728 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1729 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1730 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1731 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1732 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1733 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1734 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1735 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1736 // CHECK2-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
1737 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
1738 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1739 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1740 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1741 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
1742 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1743 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
1744 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
1745 // CHECK2-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
1746 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1747 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1748 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1749 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1750 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1751 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1752 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1753 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1754 // CHECK2: cond.true:
1755 // CHECK2-NEXT: br label [[COND_END:%.*]]
1756 // CHECK2: cond.false:
1757 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1758 // CHECK2-NEXT: br label [[COND_END]]
1759 // CHECK2: cond.end:
1760 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1761 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1762 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1763 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1764 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1765 // CHECK2: omp.inner.for.cond:
1766 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1767 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
1768 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1769 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1770 // CHECK2: omp.inner.for.body:
1771 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1772 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1773 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1774 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
1775 // CHECK2-NEXT: store i32 0, i32* [[CONV]], align 8, !llvm.access.group !13
1776 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1777 // CHECK2: omp.body.continue:
1778 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1779 // CHECK2: omp.inner.for.inc:
1780 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1781 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
1782 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1783 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1784 // CHECK2: omp.inner.for.end:
1785 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1786 // CHECK2: omp.loop.exit:
1787 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1788 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1789 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1790 // CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1791 // CHECK2: .omp.final.then:
1792 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
1793 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1794 // CHECK2: .omp.final.done:
1795 // CHECK2-NEXT: ret void
1796 //
1797 //
1798 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53
1799 // CHECK2-SAME: () #[[ATTR1]] {
1800 // CHECK2-NEXT: entry:
1801 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
1802 // CHECK2-NEXT: ret void
1803 //
1804 //
1805 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
1806 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1807 // CHECK2-NEXT: entry:
1808 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1809 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1810 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1811 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1812 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1813 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1814 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1815 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1816 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1817 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1818 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1819 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1820 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1821 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1822 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1823 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1824 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1825 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1826 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1827 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1828 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1829 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1830 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1831 // CHECK2: cond.true:
1832 // CHECK2-NEXT: br label [[COND_END:%.*]]
1833 // CHECK2: cond.false:
1834 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1835 // CHECK2-NEXT: br label [[COND_END]]
1836 // CHECK2: cond.end:
1837 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1838 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1839 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1840 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1841 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1842 // CHECK2: omp.inner.for.cond:
1843 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1844 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
1845 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1846 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1847 // CHECK2: omp.inner.for.body:
1848 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18
1849 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1850 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
1851 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1852 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !18
1853 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !18
1854 // CHECK2-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !18
1855 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !18
1856 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1857 // CHECK2: omp.inner.for.inc:
1858 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1859 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18
1860 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1861 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1862 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
1863 // CHECK2: omp.inner.for.end:
1864 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1865 // CHECK2: omp.loop.exit:
1866 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1867 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1868 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1869 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1870 // CHECK2: .omp.final.then:
1871 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
1872 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1873 // CHECK2: .omp.final.done:
1874 // CHECK2-NEXT: ret void
1875 //
1876 //
1877 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1878 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1879 // CHECK2-NEXT: entry:
1880 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1881 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1882 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1883 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1884 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1885 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1886 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1887 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1888 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1889 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1890 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1891 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1892 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1893 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1894 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1895 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1896 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1897 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1898 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1899 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1900 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1901 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1902 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1903 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1904 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1905 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1906 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1907 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1908 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1909 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1910 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1911 // CHECK2: cond.true:
1912 // CHECK2-NEXT: br label [[COND_END:%.*]]
1913 // CHECK2: cond.false:
1914 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1915 // CHECK2-NEXT: br label [[COND_END]]
1916 // CHECK2: cond.end:
1917 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1918 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1919 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1920 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1921 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1922 // CHECK2: omp.inner.for.cond:
1923 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
1924 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
1925 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1926 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1927 // CHECK2: omp.inner.for.body:
1928 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
1929 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1930 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1931 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
1932 // CHECK2-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !21
1933 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1934 // CHECK2: omp.body.continue:
1935 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1936 // CHECK2: omp.inner.for.inc:
1937 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
1938 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1939 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
1940 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
1941 // CHECK2: omp.inner.for.end:
1942 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1943 // CHECK2: omp.loop.exit:
1944 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1945 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1946 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1947 // CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1948 // CHECK2: .omp.final.then:
1949 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
1950 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1951 // CHECK2: .omp.final.done:
1952 // CHECK2-NEXT: ret void
1953 //
1954 //
1955 // CHECK2-LABEL: define {{[^@]+}}@main
1956 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
1957 // CHECK2-NEXT: entry:
1958 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1959 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1960 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1961 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1962 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1963 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1964 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1965 // CHECK2-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
1966 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4
1967 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1968 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
1969 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1970 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1971 // CHECK2: omp_offload.failed:
1972 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]]
1973 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
1974 // CHECK2: omp_offload.cont:
1975 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]]
1976 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* @Arg, align 4
1977 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
1978 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1979 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1980 // CHECK2-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1981 // CHECK2-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
1982 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1983 // CHECK2-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
1984 // CHECK2-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
1985 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1986 // CHECK2-NEXT: [[TMP5:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1987 // CHECK2-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP5]] to i1
1988 // CHECK2-NEXT: br i1 [[TOBOOL3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1989 // CHECK2: omp_if.then:
1990 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1991 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
1992 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
1993 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1994 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
1995 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
1996 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1997 // CHECK2-NEXT: store i8* null, i8** [[TMP10]], align 8
1998 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1999 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2000 // CHECK2-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2001 // CHECK2-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP13]] to i1
2002 // CHECK2-NEXT: [[TMP14:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
2003 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2004 // CHECK2-NEXT: [[TMP15:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.10, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.11, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP14]])
2005 // CHECK2-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
2006 // CHECK2-NEXT: br i1 [[TMP16]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
2007 // CHECK2: omp_offload.failed6:
2008 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
2009 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT7]]
2010 // CHECK2: omp_offload.cont7:
2011 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]]
2012 // CHECK2: omp_if.else:
2013 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
2014 // CHECK2-NEXT: br label [[OMP_IF_END]]
2015 // CHECK2: omp_if.end:
2016 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* @Arg, align 4
2017 // CHECK2-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP17]])
2018 // CHECK2-NEXT: ret i32 [[CALL]]
2019 //
2020 //
2021 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78
2022 // CHECK2-SAME: () #[[ATTR1]] {
2023 // CHECK2-NEXT: entry:
2024 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
2025 // CHECK2-NEXT: ret void
2026 //
2027 //
2028 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4
2029 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2030 // CHECK2-NEXT: entry:
2031 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2032 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2033 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2034 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2035 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2036 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2037 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2038 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2039 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2040 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2041 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2042 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2043 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2044 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2045 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2046 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2047 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2048 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2049 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2050 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2051 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2052 // CHECK2: cond.true:
2053 // CHECK2-NEXT: br label [[COND_END:%.*]]
2054 // CHECK2: cond.false:
2055 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2056 // CHECK2-NEXT: br label [[COND_END]]
2057 // CHECK2: cond.end:
2058 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2059 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2060 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2061 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2062 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2063 // CHECK2: omp.inner.for.cond:
2064 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
2065 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
2066 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2067 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2068 // CHECK2: omp.inner.for.body:
2069 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24
2070 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2071 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
2072 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2073 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !24
2074 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2075 // CHECK2: omp.inner.for.inc:
2076 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
2077 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24
2078 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2079 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
2080 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
2081 // CHECK2: omp.inner.for.end:
2082 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2083 // CHECK2: omp.loop.exit:
2084 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2085 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2086 // CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2087 // CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2088 // CHECK2: .omp.final.then:
2089 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
2090 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2091 // CHECK2: .omp.final.done:
2092 // CHECK2-NEXT: ret void
2093 //
2094 //
2095 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..5
2096 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2097 // CHECK2-NEXT: entry:
2098 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2099 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2100 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2101 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2102 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2103 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2104 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2105 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2106 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2107 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2108 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2109 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2110 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2111 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2112 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2113 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2114 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2115 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2116 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2117 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2118 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2119 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2120 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2121 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2122 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2123 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2124 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2125 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2126 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2127 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2128 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2129 // CHECK2: cond.true:
2130 // CHECK2-NEXT: br label [[COND_END:%.*]]
2131 // CHECK2: cond.false:
2132 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2133 // CHECK2-NEXT: br label [[COND_END]]
2134 // CHECK2: cond.end:
2135 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2136 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2137 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2138 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2139 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2140 // CHECK2: omp.inner.for.cond:
2141 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
2142 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
2143 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2144 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2145 // CHECK2: omp.inner.for.body:
2146 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
2147 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2148 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2149 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
2150 // CHECK2-NEXT: call void @_Z3fn4v(), !llvm.access.group !27
2151 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2152 // CHECK2: omp.body.continue:
2153 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2154 // CHECK2: omp.inner.for.inc:
2155 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
2156 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2157 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
2158 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
2159 // CHECK2: omp.inner.for.end:
2160 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2161 // CHECK2: omp.loop.exit:
2162 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2163 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2164 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2165 // CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2166 // CHECK2: .omp.final.then:
2167 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
2168 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2169 // CHECK2: .omp.final.done:
2170 // CHECK2-NEXT: ret void
2171 //
2172 //
2173 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85
2174 // CHECK2-SAME: () #[[ATTR1]] {
2175 // CHECK2-NEXT: entry:
2176 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
2177 // CHECK2-NEXT: ret void
2178 //
2179 //
2180 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6
2181 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2182 // CHECK2-NEXT: entry:
2183 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2184 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2185 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2186 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2187 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2188 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2189 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2190 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2191 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2192 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2193 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2194 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2195 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2196 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2197 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2198 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2199 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2200 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2201 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2202 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2203 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2204 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2205 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2206 // CHECK2: cond.true:
2207 // CHECK2-NEXT: br label [[COND_END:%.*]]
2208 // CHECK2: cond.false:
2209 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2210 // CHECK2-NEXT: br label [[COND_END]]
2211 // CHECK2: cond.end:
2212 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2213 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2214 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2215 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2216 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2217 // CHECK2: omp.inner.for.cond:
2218 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
2219 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
2220 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2221 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2222 // CHECK2: omp.inner.for.body:
2223 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30
2224 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2225 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
2226 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2227 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !30
2228 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !30
2229 // CHECK2-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !30
2230 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !30
2231 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2232 // CHECK2: omp.inner.for.inc:
2233 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
2234 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30
2235 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2236 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
2237 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
2238 // CHECK2: omp.inner.for.end:
2239 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2240 // CHECK2: omp.loop.exit:
2241 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2242 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2243 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2244 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2245 // CHECK2: .omp.final.then:
2246 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
2247 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2248 // CHECK2: .omp.final.done:
2249 // CHECK2-NEXT: ret void
2250 //
2251 //
2252 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7
2253 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2254 // CHECK2-NEXT: entry:
2255 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2256 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2257 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2258 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2259 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2260 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2261 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2262 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2263 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2264 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2265 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2266 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2267 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2268 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2269 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2270 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2271 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2272 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2273 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2274 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2275 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2276 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2277 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2278 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2279 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2280 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2281 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2282 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2283 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2284 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2285 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2286 // CHECK2: cond.true:
2287 // CHECK2-NEXT: br label [[COND_END:%.*]]
2288 // CHECK2: cond.false:
2289 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2290 // CHECK2-NEXT: br label [[COND_END]]
2291 // CHECK2: cond.end:
2292 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2293 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2294 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2295 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2296 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2297 // CHECK2: omp.inner.for.cond:
2298 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
2299 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33
2300 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2301 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2302 // CHECK2: omp.inner.for.body:
2303 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
2304 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2305 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2306 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33
2307 // CHECK2-NEXT: call void @_Z3fn5v(), !llvm.access.group !33
2308 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2309 // CHECK2: omp.body.continue:
2310 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2311 // CHECK2: omp.inner.for.inc:
2312 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
2313 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2314 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
2315 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
2316 // CHECK2: omp.inner.for.end:
2317 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2318 // CHECK2: omp.loop.exit:
2319 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2320 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2321 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2322 // CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2323 // CHECK2: .omp.final.then:
2324 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
2325 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2326 // CHECK2: .omp.final.done:
2327 // CHECK2-NEXT: ret void
2328 //
2329 //
2330 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
2331 // CHECK2-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2332 // CHECK2-NEXT: entry:
2333 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2334 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2335 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2336 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2337 // CHECK2-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
2338 // CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
2339 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2340 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2341 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
2342 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2343 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP1]])
2344 // CHECK2-NEXT: ret void
2345 //
2346 //
2347 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8
2348 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2349 // CHECK2-NEXT: entry:
2350 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2351 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2352 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2353 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2354 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2355 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2356 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2357 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2358 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2359 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2360 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2361 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2362 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2363 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2364 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2365 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2366 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2367 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2368 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2369 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2370 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2371 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2372 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2373 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2374 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2375 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2376 // CHECK2: cond.true:
2377 // CHECK2-NEXT: br label [[COND_END:%.*]]
2378 // CHECK2: cond.false:
2379 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2380 // CHECK2-NEXT: br label [[COND_END]]
2381 // CHECK2: cond.end:
2382 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2383 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2384 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2385 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2386 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2387 // CHECK2: omp.inner.for.cond:
2388 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
2389 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
2390 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2391 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2392 // CHECK2: omp.inner.for.body:
2393 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36
2394 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2395 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
2396 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2397 // CHECK2-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !36
2398 // CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
2399 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2400 // CHECK2: omp_if.then:
2401 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !36
2402 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]]
2403 // CHECK2: omp_if.else:
2404 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !36
2405 // CHECK2-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !36
2406 // CHECK2-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !36
2407 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !36
2408 // CHECK2-NEXT: br label [[OMP_IF_END]]
2409 // CHECK2: omp_if.end:
2410 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2411 // CHECK2: omp.inner.for.inc:
2412 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
2413 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36
2414 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2415 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
2416 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
2417 // CHECK2: omp.inner.for.end:
2418 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2419 // CHECK2: omp.loop.exit:
2420 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2421 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2422 // CHECK2-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
2423 // CHECK2-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2424 // CHECK2: .omp.final.then:
2425 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
2426 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2427 // CHECK2: .omp.final.done:
2428 // CHECK2-NEXT: ret void
2429 //
2430 //
2431 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..9
2432 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2433 // CHECK2-NEXT: entry:
2434 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2435 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2436 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2437 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2438 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2439 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2440 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2441 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2442 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2443 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2444 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2445 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2446 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2447 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2448 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2449 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2450 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2451 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2452 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2453 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2454 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2455 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2456 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2457 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2458 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2459 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2460 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2461 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2462 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2463 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2464 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2465 // CHECK2: cond.true:
2466 // CHECK2-NEXT: br label [[COND_END:%.*]]
2467 // CHECK2: cond.false:
2468 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2469 // CHECK2-NEXT: br label [[COND_END]]
2470 // CHECK2: cond.end:
2471 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2472 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2473 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2474 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2475 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2476 // CHECK2: omp.inner.for.cond:
2477 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
2478 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39
2479 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2480 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2481 // CHECK2: omp.inner.for.body:
2482 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
2483 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2484 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2485 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39
2486 // CHECK2-NEXT: call void @_Z3fn6v(), !llvm.access.group !39
2487 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2488 // CHECK2: omp.body.continue:
2489 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2490 // CHECK2: omp.inner.for.inc:
2491 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
2492 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2493 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
2494 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
2495 // CHECK2: omp.inner.for.end:
2496 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2497 // CHECK2: omp.loop.exit:
2498 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2499 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2500 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2501 // CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2502 // CHECK2: .omp.final.then:
2503 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
2504 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2505 // CHECK2: .omp.final.done:
2506 // CHECK2-NEXT: ret void
2507 //
2508 //
2509 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
2510 // CHECK2-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
2511 // CHECK2-NEXT: entry:
2512 // CHECK2-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
2513 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2514 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2515 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2516 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2517 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2518 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2519 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
2520 // CHECK2-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
2521 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2522 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
2523 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
2524 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2525 // CHECK2: omp_offload.failed:
2526 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
2527 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
2528 // CHECK2: omp_offload.cont:
2529 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]]
2530 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
2531 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
2532 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2533 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2534 // CHECK2-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2535 // CHECK2-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
2536 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2537 // CHECK2-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
2538 // CHECK2-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
2539 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2540 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2541 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
2542 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP6]], align 8
2543 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2544 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
2545 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
2546 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2547 // CHECK2-NEXT: store i8* null, i8** [[TMP9]], align 8
2548 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2549 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2550 // CHECK2-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2551 // CHECK2-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP12]] to i1
2552 // CHECK2-NEXT: [[TMP13:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
2553 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2554 // CHECK2-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, i32 1, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.18, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.19, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP13]])
2555 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2556 // CHECK2-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
2557 // CHECK2: omp_offload.failed5:
2558 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP4]]) #[[ATTR2]]
2559 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT6]]
2560 // CHECK2: omp_offload.cont6:
2561 // CHECK2-NEXT: ret i32 0
2562 //
2563 //
2564 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
2565 // CHECK2-SAME: () #[[ATTR1]] {
2566 // CHECK2-NEXT: entry:
2567 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
2568 // CHECK2-NEXT: ret void
2569 //
2570 //
2571 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..12
2572 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2573 // CHECK2-NEXT: entry:
2574 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2575 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2576 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2577 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2578 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2579 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2580 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2581 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2582 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2583 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2584 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2585 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2586 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2587 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2588 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2589 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2590 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2591 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2592 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2593 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2594 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2595 // CHECK2: cond.true:
2596 // CHECK2-NEXT: br label [[COND_END:%.*]]
2597 // CHECK2: cond.false:
2598 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2599 // CHECK2-NEXT: br label [[COND_END]]
2600 // CHECK2: cond.end:
2601 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2602 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2603 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2604 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2605 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2606 // CHECK2: omp.inner.for.cond:
2607 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
2608 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !42
2609 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2610 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2611 // CHECK2: omp.inner.for.body:
2612 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !42
2613 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2614 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !42
2615 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2616 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !42
2617 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2618 // CHECK2: omp.inner.for.inc:
2619 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
2620 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !42
2621 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2622 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
2623 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
2624 // CHECK2: omp.inner.for.end:
2625 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2626 // CHECK2: omp.loop.exit:
2627 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2628 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2629 // CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2630 // CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2631 // CHECK2: .omp.final.then:
2632 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
2633 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2634 // CHECK2: .omp.final.done:
2635 // CHECK2-NEXT: ret void
2636 //
2637 //
2638 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..13
2639 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2640 // CHECK2-NEXT: entry:
2641 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2642 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2643 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2644 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2645 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2646 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2647 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2648 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2649 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2650 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2651 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2652 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2653 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2654 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2655 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2656 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2657 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2658 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2659 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2660 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2661 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2662 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2663 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2664 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2665 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2666 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2667 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2668 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2669 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2670 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2671 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2672 // CHECK2: cond.true:
2673 // CHECK2-NEXT: br label [[COND_END:%.*]]
2674 // CHECK2: cond.false:
2675 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2676 // CHECK2-NEXT: br label [[COND_END]]
2677 // CHECK2: cond.end:
2678 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2679 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2680 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2681 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2682 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2683 // CHECK2: omp.inner.for.cond:
2684 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
2685 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !45
2686 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2687 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2688 // CHECK2: omp.inner.for.body:
2689 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
2690 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2691 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2692 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !45
2693 // CHECK2-NEXT: call void @_Z3fn1v(), !llvm.access.group !45
2694 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2695 // CHECK2: omp.body.continue:
2696 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2697 // CHECK2: omp.inner.for.inc:
2698 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
2699 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2700 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !45
2701 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
2702 // CHECK2: omp.inner.for.end:
2703 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2704 // CHECK2: omp.loop.exit:
2705 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2706 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2707 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2708 // CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2709 // CHECK2: .omp.final.then:
2710 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
2711 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2712 // CHECK2: .omp.final.done:
2713 // CHECK2-NEXT: ret void
2714 //
2715 //
2716 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66
2717 // CHECK2-SAME: () #[[ATTR1]] {
2718 // CHECK2-NEXT: entry:
2719 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*))
2720 // CHECK2-NEXT: ret void
2721 //
2722 //
2723 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14
2724 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2725 // CHECK2-NEXT: entry:
2726 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2727 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2728 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2729 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2730 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2731 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2732 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2733 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2734 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2735 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2736 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2737 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2738 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2739 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2740 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2741 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2742 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2743 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2744 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2745 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2746 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2747 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2748 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2749 // CHECK2: cond.true:
2750 // CHECK2-NEXT: br label [[COND_END:%.*]]
2751 // CHECK2: cond.false:
2752 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2753 // CHECK2-NEXT: br label [[COND_END]]
2754 // CHECK2: cond.end:
2755 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2756 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2757 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2758 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2759 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2760 // CHECK2: omp.inner.for.cond:
2761 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !48
2762 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !48
2763 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2764 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2765 // CHECK2: omp.inner.for.body:
2766 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !48
2767 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2768 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !48
2769 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2770 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !48
2771 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !48
2772 // CHECK2-NEXT: call void @.omp_outlined..15(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !48
2773 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !48
2774 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2775 // CHECK2: omp.inner.for.inc:
2776 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !48
2777 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !48
2778 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2779 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !48
2780 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP49:![0-9]+]]
2781 // CHECK2: omp.inner.for.end:
2782 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2783 // CHECK2: omp.loop.exit:
2784 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2785 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2786 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2787 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2788 // CHECK2: .omp.final.then:
2789 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
2790 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2791 // CHECK2: .omp.final.done:
2792 // CHECK2-NEXT: ret void
2793 //
2794 //
2795 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..15
2796 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2797 // CHECK2-NEXT: entry:
2798 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2799 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2800 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2801 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2802 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2803 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2804 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2805 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2806 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2807 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2808 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2809 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2810 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2811 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2812 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2813 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2814 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2815 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2816 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2817 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2818 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2819 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2820 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2821 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2822 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2823 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2824 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2825 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2826 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2827 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2828 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2829 // CHECK2: cond.true:
2830 // CHECK2-NEXT: br label [[COND_END:%.*]]
2831 // CHECK2: cond.false:
2832 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2833 // CHECK2-NEXT: br label [[COND_END]]
2834 // CHECK2: cond.end:
2835 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2836 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2837 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2838 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2839 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2840 // CHECK2: omp.inner.for.cond:
2841 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !51
2842 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !51
2843 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2844 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2845 // CHECK2: omp.inner.for.body:
2846 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !51
2847 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2848 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2849 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !51
2850 // CHECK2-NEXT: call void @_Z3fn2v(), !llvm.access.group !51
2851 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2852 // CHECK2: omp.body.continue:
2853 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2854 // CHECK2: omp.inner.for.inc:
2855 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !51
2856 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2857 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !51
2858 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
2859 // CHECK2: omp.inner.for.end:
2860 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2861 // CHECK2: omp.loop.exit:
2862 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2863 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2864 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2865 // CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2866 // CHECK2: .omp.final.then:
2867 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
2868 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2869 // CHECK2: .omp.final.done:
2870 // CHECK2-NEXT: ret void
2871 //
2872 //
2873 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70
2874 // CHECK2-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2875 // CHECK2-NEXT: entry:
2876 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2877 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2878 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2879 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2880 // CHECK2-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
2881 // CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
2882 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2883 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2884 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
2885 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2886 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP1]])
2887 // CHECK2-NEXT: ret void
2888 //
2889 //
2890 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..16
2891 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2892 // CHECK2-NEXT: entry:
2893 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2894 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2895 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2896 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2897 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2898 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2899 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2900 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2901 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2902 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2903 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2904 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2905 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2906 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2907 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2908 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2909 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2910 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2911 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2912 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2913 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2914 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2915 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2916 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2917 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2918 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2919 // CHECK2: cond.true:
2920 // CHECK2-NEXT: br label [[COND_END:%.*]]
2921 // CHECK2: cond.false:
2922 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2923 // CHECK2-NEXT: br label [[COND_END]]
2924 // CHECK2: cond.end:
2925 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2926 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2927 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2928 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2929 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2930 // CHECK2: omp.inner.for.cond:
2931 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !54
2932 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !54
2933 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2934 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2935 // CHECK2: omp.inner.for.body:
2936 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !54
2937 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2938 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !54
2939 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2940 // CHECK2-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !54
2941 // CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
2942 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2943 // CHECK2: omp_if.then:
2944 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..17 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !54
2945 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]]
2946 // CHECK2: omp_if.else:
2947 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !54
2948 // CHECK2-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !54
2949 // CHECK2-NEXT: call void @.omp_outlined..17(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !54
2950 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !54
2951 // CHECK2-NEXT: br label [[OMP_IF_END]]
2952 // CHECK2: omp_if.end:
2953 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2954 // CHECK2: omp.inner.for.inc:
2955 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !54
2956 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !54
2957 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2958 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !54
2959 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
2960 // CHECK2: omp.inner.for.end:
2961 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2962 // CHECK2: omp.loop.exit:
2963 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2964 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2965 // CHECK2-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
2966 // CHECK2-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2967 // CHECK2: .omp.final.then:
2968 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
2969 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2970 // CHECK2: .omp.final.done:
2971 // CHECK2-NEXT: ret void
2972 //
2973 //
2974 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..17
2975 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2976 // CHECK2-NEXT: entry:
2977 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2978 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2979 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2980 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2981 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2982 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2983 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2984 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2985 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2986 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2987 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2988 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2989 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2990 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2991 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2992 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2993 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2994 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2995 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2996 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2997 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2998 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2999 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3000 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3001 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3002 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3003 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3004 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3005 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3006 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3007 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3008 // CHECK2: cond.true:
3009 // CHECK2-NEXT: br label [[COND_END:%.*]]
3010 // CHECK2: cond.false:
3011 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3012 // CHECK2-NEXT: br label [[COND_END]]
3013 // CHECK2: cond.end:
3014 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3015 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3016 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3017 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3018 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3019 // CHECK2: omp.inner.for.cond:
3020 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
3021 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !57
3022 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3023 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3024 // CHECK2: omp.inner.for.body:
3025 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
3026 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3027 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3028 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !57
3029 // CHECK2-NEXT: call void @_Z3fn3v(), !llvm.access.group !57
3030 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3031 // CHECK2: omp.body.continue:
3032 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3033 // CHECK2: omp.inner.for.inc:
3034 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
3035 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3036 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
3037 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
3038 // CHECK2: omp.inner.for.end:
3039 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3040 // CHECK2: omp.loop.exit:
3041 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3042 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3043 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3044 // CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3045 // CHECK2: .omp.final.then:
3046 // CHECK2-NEXT: store i32 100, i32* [[I]], align 4
3047 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
3048 // CHECK2: .omp.final.done:
3049 // CHECK2-NEXT: ret void
3050 //
3051 //
3052 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3053 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] {
3054 // CHECK2-NEXT: entry:
3055 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
3056 // CHECK2-NEXT: ret void
3057 //
3058 //
3059 // CHECK3-LABEL: define {{[^@]+}}@_Z9gtid_testv
3060 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
3061 // CHECK3-NEXT: entry:
3062 // CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
3063 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3064 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3065 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3066 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3067 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3068 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* @Arg, align 4
3069 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
3070 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
3071 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
3072 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3073 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
3074 // CHECK3-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
3075 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3076 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
3077 // CHECK3-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
3078 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3079 // CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 8
3080 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3081 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3082 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
3083 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3084 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
3085 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3086 // CHECK3: omp_offload.failed:
3087 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
3088 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
3089 // CHECK3: omp_offload.cont:
3090 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3091 // CHECK3-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
3092 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3093 // CHECK3-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
3094 // CHECK3: omp_offload.failed2:
3095 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]]
3096 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT3]]
3097 // CHECK3: omp_offload.cont3:
3098 // CHECK3-NEXT: ret void
3099 //
3100 //
3101 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45
3102 // CHECK3-SAME: (i64 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
3103 // CHECK3-NEXT: entry:
3104 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
3105 // CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
3106 // CHECK3-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
3107 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
3108 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
3109 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
3110 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
3111 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
3112 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]])
3113 // CHECK3-NEXT: ret void
3114 //
3115 //
3116 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
3117 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
3118 // CHECK3-NEXT: entry:
3119 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3120 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3121 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
3122 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3123 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3124 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3125 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3126 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3127 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3128 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3129 // CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
3130 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3131 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3132 // CHECK3-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
3133 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
3134 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3135 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3136 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3137 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3138 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3139 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3140 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3141 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3142 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3143 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3144 // CHECK3: cond.true:
3145 // CHECK3-NEXT: br label [[COND_END:%.*]]
3146 // CHECK3: cond.false:
3147 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3148 // CHECK3-NEXT: br label [[COND_END]]
3149 // CHECK3: cond.end:
3150 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3151 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3152 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3153 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3154 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3155 // CHECK3: omp.inner.for.cond:
3156 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3157 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
3158 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3159 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3160 // CHECK3: omp.inner.for.body:
3161 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
3162 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3163 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
3164 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3165 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8, !nontemporal !10, !llvm.access.group !9
3166 // CHECK3-NEXT: [[CONV2:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
3167 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[CONV2]], align 4, !llvm.access.group !9
3168 // CHECK3-NEXT: [[TMP12:%.*]] = load i64, i64* [[ARG_CASTED]], align 8, !llvm.access.group !9
3169 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group !9
3170 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3171 // CHECK3: omp.inner.for.inc:
3172 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3173 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
3174 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3175 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3176 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
3177 // CHECK3: omp.inner.for.end:
3178 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3179 // CHECK3: omp.loop.exit:
3180 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3181 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3182 // CHECK3-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
3183 // CHECK3-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3184 // CHECK3: .omp.final.then:
3185 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3186 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3187 // CHECK3: .omp.final.done:
3188 // CHECK3-NEXT: ret void
3189 //
3190 //
3191 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
3192 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
3193 // CHECK3-NEXT: entry:
3194 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3195 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3196 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3197 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3198 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
3199 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3200 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3201 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3202 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3203 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3204 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3205 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3206 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3207 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3208 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3209 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3210 // CHECK3-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
3211 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
3212 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3213 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3214 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3215 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
3216 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3217 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
3218 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
3219 // CHECK3-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
3220 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3221 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3222 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3223 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3224 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3225 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3226 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3227 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3228 // CHECK3: cond.true:
3229 // CHECK3-NEXT: br label [[COND_END:%.*]]
3230 // CHECK3: cond.false:
3231 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3232 // CHECK3-NEXT: br label [[COND_END]]
3233 // CHECK3: cond.end:
3234 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3235 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3236 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3237 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3238 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3239 // CHECK3: omp.inner.for.cond:
3240 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3241 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
3242 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3243 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3244 // CHECK3: omp.inner.for.body:
3245 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3246 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3247 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3248 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
3249 // CHECK3-NEXT: store i32 0, i32* [[CONV]], align 8, !nontemporal !10, !llvm.access.group !14
3250 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3251 // CHECK3: omp.body.continue:
3252 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3253 // CHECK3: omp.inner.for.inc:
3254 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3255 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
3256 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3257 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
3258 // CHECK3: omp.inner.for.end:
3259 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3260 // CHECK3: omp.loop.exit:
3261 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3262 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3263 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3264 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3265 // CHECK3: .omp.final.then:
3266 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3267 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3268 // CHECK3: .omp.final.done:
3269 // CHECK3-NEXT: ret void
3270 //
3271 //
3272 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53
3273 // CHECK3-SAME: () #[[ATTR1]] {
3274 // CHECK3-NEXT: entry:
3275 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
3276 // CHECK3-NEXT: ret void
3277 //
3278 //
3279 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
3280 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3281 // CHECK3-NEXT: entry:
3282 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3283 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3284 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3285 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3286 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3287 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3288 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3289 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3290 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3291 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3292 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3293 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3294 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3295 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3296 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3297 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3298 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3299 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3300 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3301 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3302 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3303 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3304 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3305 // CHECK3: cond.true:
3306 // CHECK3-NEXT: br label [[COND_END:%.*]]
3307 // CHECK3: cond.false:
3308 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3309 // CHECK3-NEXT: br label [[COND_END]]
3310 // CHECK3: cond.end:
3311 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3312 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3313 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3314 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3315 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3316 // CHECK3: omp.inner.for.cond:
3317 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
3318 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
3319 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3320 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3321 // CHECK3: omp.inner.for.body:
3322 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
3323 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3324 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
3325 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3326 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !19
3327 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !19
3328 // CHECK3-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !19
3329 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !19
3330 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3331 // CHECK3: omp.inner.for.inc:
3332 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
3333 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !19
3334 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3335 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
3336 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
3337 // CHECK3: omp.inner.for.end:
3338 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3339 // CHECK3: omp.loop.exit:
3340 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3341 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3342 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3343 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3344 // CHECK3: .omp.final.then:
3345 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3346 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3347 // CHECK3: .omp.final.done:
3348 // CHECK3-NEXT: ret void
3349 //
3350 //
3351 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
3352 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3353 // CHECK3-NEXT: entry:
3354 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3355 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3356 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3357 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3358 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3359 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3360 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3361 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3362 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3363 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3364 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3365 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3366 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3367 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3368 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3369 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3370 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3371 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3372 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3373 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3374 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3375 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3376 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3377 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3378 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3379 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3380 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3381 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3382 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3383 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3384 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3385 // CHECK3: cond.true:
3386 // CHECK3-NEXT: br label [[COND_END:%.*]]
3387 // CHECK3: cond.false:
3388 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3389 // CHECK3-NEXT: br label [[COND_END]]
3390 // CHECK3: cond.end:
3391 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3392 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3393 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3394 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3395 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3396 // CHECK3: omp.inner.for.cond:
3397 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
3398 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
3399 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3400 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3401 // CHECK3: omp.inner.for.body:
3402 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
3403 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3404 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3405 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
3406 // CHECK3-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !22
3407 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3408 // CHECK3: omp.body.continue:
3409 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3410 // CHECK3: omp.inner.for.inc:
3411 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
3412 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3413 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
3414 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
3415 // CHECK3: omp.inner.for.end:
3416 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3417 // CHECK3: omp.loop.exit:
3418 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3419 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3420 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3421 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3422 // CHECK3: .omp.final.then:
3423 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3424 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3425 // CHECK3: .omp.final.done:
3426 // CHECK3-NEXT: ret void
3427 //
3428 //
3429 // CHECK3-LABEL: define {{[^@]+}}@main
3430 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
3431 // CHECK3-NEXT: entry:
3432 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3433 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3434 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3435 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3436 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3437 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3438 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3439 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
3440 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
3441 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3442 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
3443 // CHECK3-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3444 // CHECK3-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3445 // CHECK3: omp_offload.failed:
3446 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]]
3447 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
3448 // CHECK3: omp_offload.cont:
3449 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]]
3450 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* @Arg, align 4
3451 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
3452 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3453 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3454 // CHECK3-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3455 // CHECK3-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
3456 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3457 // CHECK3-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
3458 // CHECK3-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
3459 // CHECK3-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3460 // CHECK3-NEXT: [[TMP5:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3461 // CHECK3-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP5]] to i1
3462 // CHECK3-NEXT: br i1 [[TOBOOL3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3463 // CHECK3: omp_if.then:
3464 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3465 // CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
3466 // CHECK3-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
3467 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3468 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
3469 // CHECK3-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
3470 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3471 // CHECK3-NEXT: store i8* null, i8** [[TMP10]], align 8
3472 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3473 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3474 // CHECK3-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3475 // CHECK3-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP13]] to i1
3476 // CHECK3-NEXT: [[TMP14:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
3477 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3478 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP14]])
3479 // CHECK3-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
3480 // CHECK3-NEXT: br i1 [[TMP16]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
3481 // CHECK3: omp_offload.failed6:
3482 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
3483 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT7]]
3484 // CHECK3: omp_offload.cont7:
3485 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
3486 // CHECK3: omp_if.else:
3487 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
3488 // CHECK3-NEXT: br label [[OMP_IF_END]]
3489 // CHECK3: omp_if.end:
3490 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* @Arg, align 4
3491 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP17]])
3492 // CHECK3-NEXT: ret i32 [[CALL]]
3493 //
3494 //
3495 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78
3496 // CHECK3-SAME: () #[[ATTR1]] {
3497 // CHECK3-NEXT: entry:
3498 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
3499 // CHECK3-NEXT: ret void
3500 //
3501 //
3502 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
3503 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3504 // CHECK3-NEXT: entry:
3505 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3506 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3507 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3508 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3509 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3510 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3511 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3512 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3513 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3514 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3515 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3516 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3517 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3518 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3519 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3520 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3521 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3522 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3523 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3524 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3525 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3526 // CHECK3: cond.true:
3527 // CHECK3-NEXT: br label [[COND_END:%.*]]
3528 // CHECK3: cond.false:
3529 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3530 // CHECK3-NEXT: br label [[COND_END]]
3531 // CHECK3: cond.end:
3532 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3533 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3534 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3535 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3536 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3537 // CHECK3: omp.inner.for.cond:
3538 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
3539 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
3540 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3541 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3542 // CHECK3: omp.inner.for.body:
3543 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
3544 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3545 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
3546 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3547 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !25
3548 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3549 // CHECK3: omp.inner.for.inc:
3550 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
3551 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !25
3552 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3553 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
3554 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
3555 // CHECK3: omp.inner.for.end:
3556 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3557 // CHECK3: omp.loop.exit:
3558 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3559 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3560 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3561 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3562 // CHECK3: .omp.final.then:
3563 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3564 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3565 // CHECK3: .omp.final.done:
3566 // CHECK3-NEXT: ret void
3567 //
3568 //
3569 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..5
3570 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3571 // CHECK3-NEXT: entry:
3572 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3573 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3574 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3575 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3576 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3577 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3578 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3579 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3580 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3581 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3582 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3583 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3584 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3585 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3586 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3587 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3588 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3589 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3590 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3591 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3592 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3593 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3594 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3595 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3596 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3597 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3598 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3599 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3600 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3601 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3602 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3603 // CHECK3: cond.true:
3604 // CHECK3-NEXT: br label [[COND_END:%.*]]
3605 // CHECK3: cond.false:
3606 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3607 // CHECK3-NEXT: br label [[COND_END]]
3608 // CHECK3: cond.end:
3609 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3610 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3611 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3612 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3613 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3614 // CHECK3: omp.inner.for.cond:
3615 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
3616 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !28
3617 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3618 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3619 // CHECK3: omp.inner.for.body:
3620 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
3621 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3622 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3623 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !28
3624 // CHECK3-NEXT: call void @_Z3fn4v(), !llvm.access.group !28
3625 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3626 // CHECK3: omp.body.continue:
3627 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3628 // CHECK3: omp.inner.for.inc:
3629 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
3630 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3631 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
3632 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
3633 // CHECK3: omp.inner.for.end:
3634 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3635 // CHECK3: omp.loop.exit:
3636 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3637 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3638 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3639 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3640 // CHECK3: .omp.final.then:
3641 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3642 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3643 // CHECK3: .omp.final.done:
3644 // CHECK3-NEXT: ret void
3645 //
3646 //
3647 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85
3648 // CHECK3-SAME: () #[[ATTR1]] {
3649 // CHECK3-NEXT: entry:
3650 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
3651 // CHECK3-NEXT: ret void
3652 //
3653 //
3654 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6
3655 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3656 // CHECK3-NEXT: entry:
3657 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3658 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3659 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3660 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3661 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3662 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3663 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3664 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3665 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3666 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3667 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3668 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3669 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3670 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3671 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3672 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3673 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3674 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3675 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3676 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3677 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3678 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3679 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3680 // CHECK3: cond.true:
3681 // CHECK3-NEXT: br label [[COND_END:%.*]]
3682 // CHECK3: cond.false:
3683 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3684 // CHECK3-NEXT: br label [[COND_END]]
3685 // CHECK3: cond.end:
3686 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3687 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3688 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3689 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3690 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3691 // CHECK3: omp.inner.for.cond:
3692 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3693 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3694 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3695 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3696 // CHECK3: omp.inner.for.body:
3697 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3698 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3699 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3700 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3701 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3702 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3703 // CHECK3-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
3704 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3705 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3706 // CHECK3: omp.inner.for.inc:
3707 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3708 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3709 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3710 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3711 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
3712 // CHECK3: omp.inner.for.end:
3713 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3714 // CHECK3: omp.loop.exit:
3715 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3716 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3717 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3718 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3719 // CHECK3: .omp.final.then:
3720 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3721 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3722 // CHECK3: .omp.final.done:
3723 // CHECK3-NEXT: ret void
3724 //
3725 //
3726 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
3727 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3728 // CHECK3-NEXT: entry:
3729 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3730 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3731 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3732 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3733 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3734 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3735 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3736 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3737 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3738 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3739 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3740 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3741 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3742 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3743 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3744 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3745 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3746 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3747 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3748 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3749 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3750 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3751 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3752 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3753 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3754 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3755 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3756 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3757 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3758 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3759 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3760 // CHECK3: cond.true:
3761 // CHECK3-NEXT: br label [[COND_END:%.*]]
3762 // CHECK3: cond.false:
3763 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3764 // CHECK3-NEXT: br label [[COND_END]]
3765 // CHECK3: cond.end:
3766 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3767 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3768 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3769 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3770 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3771 // CHECK3: omp.inner.for.cond:
3772 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3773 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3774 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3775 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3776 // CHECK3: omp.inner.for.body:
3777 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3778 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3779 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3780 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3781 // CHECK3-NEXT: call void @_Z3fn5v()
3782 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3783 // CHECK3: omp.body.continue:
3784 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3785 // CHECK3: omp.inner.for.inc:
3786 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3787 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3788 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3789 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
3790 // CHECK3: omp.inner.for.end:
3791 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3792 // CHECK3: omp.loop.exit:
3793 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3794 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3795 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3796 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3797 // CHECK3: .omp.final.then:
3798 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3799 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3800 // CHECK3: .omp.final.done:
3801 // CHECK3-NEXT: ret void
3802 //
3803 //
3804 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
3805 // CHECK3-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3806 // CHECK3-NEXT: entry:
3807 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3808 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3809 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3810 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3811 // CHECK3-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
3812 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
3813 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3814 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3815 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
3816 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3817 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP1]])
3818 // CHECK3-NEXT: ret void
3819 //
3820 //
3821 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..8
3822 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3823 // CHECK3-NEXT: entry:
3824 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3825 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3826 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3827 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3828 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3829 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3830 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3831 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3832 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3833 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3834 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3835 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3836 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED11:%.*]] = alloca i64, align 8
3837 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR17:%.*]] = alloca i32, align 4
3838 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR17]], align 4
3839 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3840 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3841 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3842 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3843 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3844 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3845 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3846 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3847 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3848 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3849 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3850 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3851 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3852 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3853 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3854 // CHECK3: cond.true:
3855 // CHECK3-NEXT: br label [[COND_END:%.*]]
3856 // CHECK3: cond.false:
3857 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3858 // CHECK3-NEXT: br label [[COND_END]]
3859 // CHECK3: cond.end:
3860 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3861 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3862 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3863 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3864 // CHECK3-NEXT: [[TMP5:%.*]] = load i8, i8* [[CONV]], align 8
3865 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1
3866 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]
3867 // CHECK3: omp_if.then:
3868 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3869 // CHECK3: omp.inner.for.cond:
3870 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
3871 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
3872 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3873 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3874 // CHECK3: omp.inner.for.body:
3875 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
3876 // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3877 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
3878 // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3879 // CHECK3-NEXT: [[TMP12:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !34
3880 // CHECK3-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP12]] to i1
3881 // CHECK3-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3882 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8
3883 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[CONV3]], align 1, !llvm.access.group !34
3884 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !34
3885 // CHECK3-NEXT: [[TMP14:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !34
3886 // CHECK3-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
3887 // CHECK3-NEXT: br i1 [[TOBOOL4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]
3888 // CHECK3: omp_if.then5:
3889 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group !34
3890 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
3891 // CHECK3: omp_if.else:
3892 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !34
3893 // CHECK3-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !34
3894 // CHECK3-NEXT: call void @.omp_outlined..9(i32* [[TMP15]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]) #[[ATTR2]], !llvm.access.group !34
3895 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !34
3896 // CHECK3-NEXT: br label [[OMP_IF_END]]
3897 // CHECK3: omp_if.end:
3898 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3899 // CHECK3: omp.inner.for.inc:
3900 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
3901 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
3902 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
3903 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
3904 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
3905 // CHECK3: omp.inner.for.end:
3906 // CHECK3-NEXT: br label [[OMP_IF_END22:%.*]]
3907 // CHECK3: omp_if.else6:
3908 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3909 // CHECK3: omp.inner.for.cond7:
3910 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3911 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3912 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
3913 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END21:%.*]]
3914 // CHECK3: omp.inner.for.body9:
3915 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3916 // CHECK3-NEXT: [[TMP21:%.*]] = zext i32 [[TMP20]] to i64
3917 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3918 // CHECK3-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
3919 // CHECK3-NEXT: [[TMP24:%.*]] = load i8, i8* [[CONV]], align 8
3920 // CHECK3-NEXT: [[TOBOOL10:%.*]] = trunc i8 [[TMP24]] to i1
3921 // CHECK3-NEXT: [[CONV12:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED11]] to i8*
3922 // CHECK3-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[TOBOOL10]] to i8
3923 // CHECK3-NEXT: store i8 [[FROMBOOL13]], i8* [[CONV12]], align 1
3924 // CHECK3-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED11]], align 8
3925 // CHECK3-NEXT: [[TMP26:%.*]] = load i8, i8* [[CONV]], align 8
3926 // CHECK3-NEXT: [[TOBOOL14:%.*]] = trunc i8 [[TMP26]] to i1
3927 // CHECK3-NEXT: br i1 [[TOBOOL14]], label [[OMP_IF_THEN15:%.*]], label [[OMP_IF_ELSE16:%.*]]
3928 // CHECK3: omp_if.then15:
3929 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
3930 // CHECK3-NEXT: br label [[OMP_IF_END18:%.*]]
3931 // CHECK3: omp_if.else16:
3932 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3933 // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3934 // CHECK3-NEXT: call void @.omp_outlined..10(i32* [[TMP27]], i32* [[DOTBOUND_ZERO_ADDR17]], i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) #[[ATTR2]]
3935 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3936 // CHECK3-NEXT: br label [[OMP_IF_END18]]
3937 // CHECK3: omp_if.end18:
3938 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
3939 // CHECK3: omp.inner.for.inc19:
3940 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3941 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3942 // CHECK3-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
3943 // CHECK3-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4
3944 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP37:![0-9]+]]
3945 // CHECK3: omp.inner.for.end21:
3946 // CHECK3-NEXT: br label [[OMP_IF_END22]]
3947 // CHECK3: omp_if.end22:
3948 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3949 // CHECK3: omp.loop.exit:
3950 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3951 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3952 // CHECK3-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
3953 // CHECK3-NEXT: br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3954 // CHECK3: .omp.final.then:
3955 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3956 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3957 // CHECK3: .omp.final.done:
3958 // CHECK3-NEXT: ret void
3959 //
3960 //
3961 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..9
3962 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3963 // CHECK3-NEXT: entry:
3964 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3965 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3966 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3967 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3968 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3969 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3970 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3971 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3972 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3973 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3974 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3975 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3976 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3977 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3978 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3979 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3980 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3981 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3982 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3983 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3984 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3985 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
3986 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3987 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
3988 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
3989 // CHECK3-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
3990 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3991 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3992 // CHECK3-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
3993 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
3994 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3995 // CHECK3: omp_if.then:
3996 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3997 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3998 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3999 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4000 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
4001 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4002 // CHECK3: cond.true:
4003 // CHECK3-NEXT: br label [[COND_END:%.*]]
4004 // CHECK3: cond.false:
4005 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4006 // CHECK3-NEXT: br label [[COND_END]]
4007 // CHECK3: cond.end:
4008 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4009 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4010 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4011 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4012 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4013 // CHECK3: omp.inner.for.cond:
4014 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
4015 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
4016 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4017 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4018 // CHECK3: omp.inner.for.body:
4019 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
4020 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4021 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4022 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !38
4023 // CHECK3-NEXT: call void @_Z3fn6v(), !llvm.access.group !38
4024 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4025 // CHECK3: omp.body.continue:
4026 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4027 // CHECK3: omp.inner.for.inc:
4028 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
4029 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
4030 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
4031 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
4032 // CHECK3: omp.inner.for.end:
4033 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
4034 // CHECK3: omp_if.else:
4035 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4036 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
4037 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4038 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4039 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
4040 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
4041 // CHECK3: cond.true6:
4042 // CHECK3-NEXT: br label [[COND_END8:%.*]]
4043 // CHECK3: cond.false7:
4044 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4045 // CHECK3-NEXT: br label [[COND_END8]]
4046 // CHECK3: cond.end8:
4047 // CHECK3-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
4048 // CHECK3-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
4049 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4050 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
4051 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
4052 // CHECK3: omp.inner.for.cond10:
4053 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4054 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4055 // CHECK3-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
4056 // CHECK3-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
4057 // CHECK3: omp.inner.for.body12:
4058 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4059 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
4060 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
4061 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
4062 // CHECK3-NEXT: call void @_Z3fn6v()
4063 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
4064 // CHECK3: omp.body.continue15:
4065 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
4066 // CHECK3: omp.inner.for.inc16:
4067 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4068 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
4069 // CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
4070 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP41:![0-9]+]]
4071 // CHECK3: omp.inner.for.end18:
4072 // CHECK3-NEXT: br label [[OMP_IF_END]]
4073 // CHECK3: omp_if.end:
4074 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4075 // CHECK3: omp.loop.exit:
4076 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4077 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
4078 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
4079 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4080 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
4081 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4082 // CHECK3: .omp.final.then:
4083 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
4084 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
4085 // CHECK3: .omp.final.done:
4086 // CHECK3-NEXT: ret void
4087 //
4088 //
4089 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10
4090 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4091 // CHECK3-NEXT: entry:
4092 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4093 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4094 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4095 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4096 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4097 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4098 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4099 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4100 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4101 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4102 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4103 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4104 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4105 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4106 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4107 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4108 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4109 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4110 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4111 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4112 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4113 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
4114 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4115 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
4116 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
4117 // CHECK3-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
4118 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4119 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4120 // CHECK3-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
4121 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
4122 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4123 // CHECK3: omp_if.then:
4124 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4125 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4126 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4127 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4128 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
4129 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4130 // CHECK3: cond.true:
4131 // CHECK3-NEXT: br label [[COND_END:%.*]]
4132 // CHECK3: cond.false:
4133 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4134 // CHECK3-NEXT: br label [[COND_END]]
4135 // CHECK3: cond.end:
4136 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4137 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4138 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4139 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4140 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4141 // CHECK3: omp.inner.for.cond:
4142 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
4143 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !42
4144 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4145 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4146 // CHECK3: omp.inner.for.body:
4147 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
4148 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4149 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4150 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !42
4151 // CHECK3-NEXT: call void @_Z3fn6v(), !llvm.access.group !42
4152 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4153 // CHECK3: omp.body.continue:
4154 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4155 // CHECK3: omp.inner.for.inc:
4156 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
4157 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
4158 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
4159 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
4160 // CHECK3: omp.inner.for.end:
4161 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
4162 // CHECK3: omp_if.else:
4163 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4164 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
4165 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4166 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4167 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
4168 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
4169 // CHECK3: cond.true6:
4170 // CHECK3-NEXT: br label [[COND_END8:%.*]]
4171 // CHECK3: cond.false7:
4172 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4173 // CHECK3-NEXT: br label [[COND_END8]]
4174 // CHECK3: cond.end8:
4175 // CHECK3-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
4176 // CHECK3-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
4177 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4178 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
4179 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
4180 // CHECK3: omp.inner.for.cond10:
4181 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4182 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4183 // CHECK3-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
4184 // CHECK3-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
4185 // CHECK3: omp.inner.for.body12:
4186 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4187 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
4188 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
4189 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
4190 // CHECK3-NEXT: call void @_Z3fn6v()
4191 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
4192 // CHECK3: omp.body.continue15:
4193 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
4194 // CHECK3: omp.inner.for.inc16:
4195 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4196 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
4197 // CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
4198 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP45:![0-9]+]]
4199 // CHECK3: omp.inner.for.end18:
4200 // CHECK3-NEXT: br label [[OMP_IF_END]]
4201 // CHECK3: omp_if.end:
4202 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4203 // CHECK3: omp.loop.exit:
4204 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4205 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
4206 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
4207 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4208 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
4209 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4210 // CHECK3: .omp.final.then:
4211 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
4212 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
4213 // CHECK3: .omp.final.done:
4214 // CHECK3-NEXT: ret void
4215 //
4216 //
4217 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
4218 // CHECK3-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
4219 // CHECK3-NEXT: entry:
4220 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
4221 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4222 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4223 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
4224 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4225 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4226 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4227 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
4228 // CHECK3-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
4229 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4230 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
4231 // CHECK3-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
4232 // CHECK3-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4233 // CHECK3: omp_offload.failed:
4234 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
4235 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
4236 // CHECK3: omp_offload.cont:
4237 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]]
4238 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
4239 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
4240 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4241 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4242 // CHECK3-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4243 // CHECK3-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
4244 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4245 // CHECK3-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
4246 // CHECK3-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
4247 // CHECK3-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
4248 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4249 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
4250 // CHECK3-NEXT: store i64 [[TMP4]], i64* [[TMP6]], align 8
4251 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4252 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
4253 // CHECK3-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
4254 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4255 // CHECK3-NEXT: store i8* null, i8** [[TMP9]], align 8
4256 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4257 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4258 // CHECK3-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4259 // CHECK3-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP12]] to i1
4260 // CHECK3-NEXT: [[TMP13:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
4261 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4262 // CHECK3-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, i32 1, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP13]])
4263 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4264 // CHECK3-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
4265 // CHECK3: omp_offload.failed5:
4266 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP4]]) #[[ATTR2]]
4267 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT6]]
4268 // CHECK3: omp_offload.cont6:
4269 // CHECK3-NEXT: ret i32 0
4270 //
4271 //
4272 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
4273 // CHECK3-SAME: () #[[ATTR1]] {
4274 // CHECK3-NEXT: entry:
4275 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..13 to void (i32*, i32*, ...)*))
4276 // CHECK3-NEXT: ret void
4277 //
4278 //
4279 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..13
4280 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4281 // CHECK3-NEXT: entry:
4282 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4283 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4284 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4285 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4286 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4287 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4288 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4289 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4290 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4291 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4292 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4293 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4294 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4295 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4296 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4297 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4298 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4299 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4300 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4301 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4302 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4303 // CHECK3: cond.true:
4304 // CHECK3-NEXT: br label [[COND_END:%.*]]
4305 // CHECK3: cond.false:
4306 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4307 // CHECK3-NEXT: br label [[COND_END]]
4308 // CHECK3: cond.end:
4309 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4310 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4311 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4312 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4313 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4314 // CHECK3: omp.inner.for.cond:
4315 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
4316 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
4317 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4318 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4319 // CHECK3: omp.inner.for.body:
4320 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
4321 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4322 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
4323 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4324 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !46
4325 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4326 // CHECK3: omp.inner.for.inc:
4327 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
4328 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
4329 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4330 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
4331 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
4332 // CHECK3: omp.inner.for.end:
4333 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4334 // CHECK3: omp.loop.exit:
4335 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4336 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4337 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4338 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4339 // CHECK3: .omp.final.then:
4340 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
4341 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
4342 // CHECK3: .omp.final.done:
4343 // CHECK3-NEXT: ret void
4344 //
4345 //
4346 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14
4347 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4348 // CHECK3-NEXT: entry:
4349 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4350 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4351 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4352 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4353 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4354 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4355 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4356 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4357 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4358 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4359 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4360 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4361 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4362 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4363 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4364 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4365 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4366 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4367 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4368 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4369 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4370 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4371 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4372 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4373 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4374 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4375 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4376 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4377 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4378 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4379 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4380 // CHECK3: cond.true:
4381 // CHECK3-NEXT: br label [[COND_END:%.*]]
4382 // CHECK3: cond.false:
4383 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4384 // CHECK3-NEXT: br label [[COND_END]]
4385 // CHECK3: cond.end:
4386 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4387 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4388 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4389 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4390 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4391 // CHECK3: omp.inner.for.cond:
4392 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
4393 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
4394 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4395 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4396 // CHECK3: omp.inner.for.body:
4397 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
4398 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4399 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4400 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
4401 // CHECK3-NEXT: call void @_Z3fn1v(), !llvm.access.group !49
4402 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4403 // CHECK3: omp.body.continue:
4404 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4405 // CHECK3: omp.inner.for.inc:
4406 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
4407 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4408 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
4409 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
4410 // CHECK3: omp.inner.for.end:
4411 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4412 // CHECK3: omp.loop.exit:
4413 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4414 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4415 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4416 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4417 // CHECK3: .omp.final.then:
4418 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
4419 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
4420 // CHECK3: .omp.final.done:
4421 // CHECK3-NEXT: ret void
4422 //
4423 //
4424 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66
4425 // CHECK3-SAME: () #[[ATTR1]] {
4426 // CHECK3-NEXT: entry:
4427 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..15 to void (i32*, i32*, ...)*))
4428 // CHECK3-NEXT: ret void
4429 //
4430 //
4431 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15
4432 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4433 // CHECK3-NEXT: entry:
4434 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4435 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4436 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4437 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4438 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4439 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4440 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4441 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4442 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4443 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4444 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4445 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4446 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4447 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4448 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4449 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4450 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4451 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4452 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4453 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4454 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4455 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4456 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4457 // CHECK3: cond.true:
4458 // CHECK3-NEXT: br label [[COND_END:%.*]]
4459 // CHECK3: cond.false:
4460 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4461 // CHECK3-NEXT: br label [[COND_END]]
4462 // CHECK3: cond.end:
4463 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4464 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4465 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4466 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4467 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4468 // CHECK3: omp.inner.for.cond:
4469 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4470 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4471 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4472 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4473 // CHECK3: omp.inner.for.body:
4474 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4475 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4476 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4477 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4478 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4479 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4480 // CHECK3-NEXT: call void @.omp_outlined..16(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
4481 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4482 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4483 // CHECK3: omp.inner.for.inc:
4484 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4485 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4486 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4487 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4488 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
4489 // CHECK3: omp.inner.for.end:
4490 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4491 // CHECK3: omp.loop.exit:
4492 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4493 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4494 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4495 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4496 // CHECK3: .omp.final.then:
4497 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
4498 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
4499 // CHECK3: .omp.final.done:
4500 // CHECK3-NEXT: ret void
4501 //
4502 //
4503 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..16
4504 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4505 // CHECK3-NEXT: entry:
4506 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4507 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4508 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4509 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4510 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4511 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4512 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4513 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4514 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4515 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4516 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4517 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4518 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4519 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4520 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4521 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4522 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4523 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4524 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4525 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4526 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4527 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4528 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4529 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4530 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4531 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4532 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4533 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4534 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4535 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4536 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4537 // CHECK3: cond.true:
4538 // CHECK3-NEXT: br label [[COND_END:%.*]]
4539 // CHECK3: cond.false:
4540 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4541 // CHECK3-NEXT: br label [[COND_END]]
4542 // CHECK3: cond.end:
4543 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4544 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4545 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4546 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4547 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4548 // CHECK3: omp.inner.for.cond:
4549 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4550 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4551 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4552 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4553 // CHECK3: omp.inner.for.body:
4554 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4555 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4556 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4557 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4558 // CHECK3-NEXT: call void @_Z3fn2v()
4559 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4560 // CHECK3: omp.body.continue:
4561 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4562 // CHECK3: omp.inner.for.inc:
4563 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4564 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4565 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4566 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
4567 // CHECK3: omp.inner.for.end:
4568 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4569 // CHECK3: omp.loop.exit:
4570 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4571 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4572 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4573 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4574 // CHECK3: .omp.final.then:
4575 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
4576 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
4577 // CHECK3: .omp.final.done:
4578 // CHECK3-NEXT: ret void
4579 //
4580 //
4581 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70
4582 // CHECK3-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4583 // CHECK3-NEXT: entry:
4584 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4585 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
4586 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4587 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4588 // CHECK3-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
4589 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
4590 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4591 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4592 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
4593 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
4594 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..17 to void (i32*, i32*, ...)*), i64 [[TMP1]])
4595 // CHECK3-NEXT: ret void
4596 //
4597 //
4598 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..17
4599 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4600 // CHECK3-NEXT: entry:
4601 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4602 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4603 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4604 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4605 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4606 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4607 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4608 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4609 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4610 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4611 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4612 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4613 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4614 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4615 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4616 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4617 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4618 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4619 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4620 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4621 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4622 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4623 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4624 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4625 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4626 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4627 // CHECK3: cond.true:
4628 // CHECK3-NEXT: br label [[COND_END:%.*]]
4629 // CHECK3: cond.false:
4630 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4631 // CHECK3-NEXT: br label [[COND_END]]
4632 // CHECK3: cond.end:
4633 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4634 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4635 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4636 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4637 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4638 // CHECK3: omp.inner.for.cond:
4639 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !54
4640 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !54
4641 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4642 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4643 // CHECK3: omp.inner.for.body:
4644 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !54
4645 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4646 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !54
4647 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4648 // CHECK3-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !54
4649 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
4650 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4651 // CHECK3: omp_if.then:
4652 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !54
4653 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
4654 // CHECK3: omp_if.else:
4655 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !54
4656 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !54
4657 // CHECK3-NEXT: call void @.omp_outlined..18(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !54
4658 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !54
4659 // CHECK3-NEXT: br label [[OMP_IF_END]]
4660 // CHECK3: omp_if.end:
4661 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4662 // CHECK3: omp.inner.for.inc:
4663 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !54
4664 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !54
4665 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
4666 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !54
4667 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
4668 // CHECK3: omp.inner.for.end:
4669 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4670 // CHECK3: omp.loop.exit:
4671 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4672 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4673 // CHECK3-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
4674 // CHECK3-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4675 // CHECK3: .omp.final.then:
4676 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
4677 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
4678 // CHECK3: .omp.final.done:
4679 // CHECK3-NEXT: ret void
4680 //
4681 //
4682 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..18
4683 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4684 // CHECK3-NEXT: entry:
4685 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4686 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4687 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4688 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4689 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4690 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4691 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4692 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4693 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4694 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4695 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4696 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4697 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4698 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4699 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4700 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4701 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4702 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4703 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4704 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4705 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4706 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4707 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4708 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4709 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4710 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4711 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4712 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4713 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4714 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4715 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4716 // CHECK3: cond.true:
4717 // CHECK3-NEXT: br label [[COND_END:%.*]]
4718 // CHECK3: cond.false:
4719 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4720 // CHECK3-NEXT: br label [[COND_END]]
4721 // CHECK3: cond.end:
4722 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4723 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4724 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4725 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4726 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4727 // CHECK3: omp.inner.for.cond:
4728 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
4729 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !57
4730 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4731 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4732 // CHECK3: omp.inner.for.body:
4733 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
4734 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4735 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4736 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !57
4737 // CHECK3-NEXT: call void @_Z3fn3v(), !llvm.access.group !57
4738 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4739 // CHECK3: omp.body.continue:
4740 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4741 // CHECK3: omp.inner.for.inc:
4742 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
4743 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4744 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
4745 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
4746 // CHECK3: omp.inner.for.end:
4747 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4748 // CHECK3: omp.loop.exit:
4749 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4750 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4751 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4752 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4753 // CHECK3: .omp.final.then:
4754 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
4755 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
4756 // CHECK3: .omp.final.done:
4757 // CHECK3-NEXT: ret void
4758 //
4759 //
4760 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4761 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] {
4762 // CHECK3-NEXT: entry:
4763 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
4764 // CHECK3-NEXT: ret void
4765 //
4766 //
4767 // CHECK4-LABEL: define {{[^@]+}}@_Z9gtid_testv
4768 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
4769 // CHECK4-NEXT: entry:
4770 // CHECK4-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
4771 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4772 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4773 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4774 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
4775 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4776 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* @Arg, align 4
4777 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
4778 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
4779 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
4780 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4781 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
4782 // CHECK4-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
4783 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4784 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
4785 // CHECK4-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
4786 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4787 // CHECK4-NEXT: store i8* null, i8** [[TMP6]], align 8
4788 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4789 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4790 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
4791 // CHECK4-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4792 // CHECK4-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
4793 // CHECK4-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4794 // CHECK4: omp_offload.failed:
4795 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
4796 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
4797 // CHECK4: omp_offload.cont:
4798 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4799 // CHECK4-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
4800 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4801 // CHECK4-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
4802 // CHECK4: omp_offload.failed2:
4803 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]]
4804 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT3]]
4805 // CHECK4: omp_offload.cont3:
4806 // CHECK4-NEXT: ret void
4807 //
4808 //
4809 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45
4810 // CHECK4-SAME: (i64 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
4811 // CHECK4-NEXT: entry:
4812 // CHECK4-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
4813 // CHECK4-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
4814 // CHECK4-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
4815 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
4816 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
4817 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
4818 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
4819 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
4820 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]])
4821 // CHECK4-NEXT: ret void
4822 //
4823 //
4824 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
4825 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
4826 // CHECK4-NEXT: entry:
4827 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4828 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4829 // CHECK4-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
4830 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4831 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
4832 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4833 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4834 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4835 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4836 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
4837 // CHECK4-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
4838 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4839 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4840 // CHECK4-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
4841 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
4842 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4843 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4844 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4845 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4846 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4847 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4848 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4849 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4850 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4851 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4852 // CHECK4: cond.true:
4853 // CHECK4-NEXT: br label [[COND_END:%.*]]
4854 // CHECK4: cond.false:
4855 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4856 // CHECK4-NEXT: br label [[COND_END]]
4857 // CHECK4: cond.end:
4858 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4859 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4860 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4861 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4862 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4863 // CHECK4: omp.inner.for.cond:
4864 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
4865 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
4866 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4867 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4868 // CHECK4: omp.inner.for.body:
4869 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
4870 // CHECK4-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4871 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
4872 // CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4873 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8, !nontemporal !10, !llvm.access.group !9
4874 // CHECK4-NEXT: [[CONV2:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
4875 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[CONV2]], align 4, !llvm.access.group !9
4876 // CHECK4-NEXT: [[TMP12:%.*]] = load i64, i64* [[ARG_CASTED]], align 8, !llvm.access.group !9
4877 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group !9
4878 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4879 // CHECK4: omp.inner.for.inc:
4880 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
4881 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
4882 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
4883 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
4884 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
4885 // CHECK4: omp.inner.for.end:
4886 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4887 // CHECK4: omp.loop.exit:
4888 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4889 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4890 // CHECK4-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
4891 // CHECK4-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4892 // CHECK4: .omp.final.then:
4893 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
4894 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
4895 // CHECK4: .omp.final.done:
4896 // CHECK4-NEXT: ret void
4897 //
4898 //
4899 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
4900 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
4901 // CHECK4-NEXT: entry:
4902 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4903 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4904 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4905 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4906 // CHECK4-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
4907 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4908 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
4909 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4910 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4911 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4912 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4913 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
4914 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4915 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4916 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4917 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4918 // CHECK4-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
4919 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
4920 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4921 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4922 // CHECK4-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4923 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
4924 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4925 // CHECK4-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
4926 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
4927 // CHECK4-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
4928 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4929 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4930 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4931 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4932 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4933 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4934 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4935 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4936 // CHECK4: cond.true:
4937 // CHECK4-NEXT: br label [[COND_END:%.*]]
4938 // CHECK4: cond.false:
4939 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4940 // CHECK4-NEXT: br label [[COND_END]]
4941 // CHECK4: cond.end:
4942 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4943 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4944 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4945 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4946 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4947 // CHECK4: omp.inner.for.cond:
4948 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4949 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
4950 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4951 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4952 // CHECK4: omp.inner.for.body:
4953 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4954 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4955 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4956 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
4957 // CHECK4-NEXT: store i32 0, i32* [[CONV]], align 8, !nontemporal !10, !llvm.access.group !14
4958 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4959 // CHECK4: omp.body.continue:
4960 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4961 // CHECK4: omp.inner.for.inc:
4962 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4963 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
4964 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4965 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
4966 // CHECK4: omp.inner.for.end:
4967 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4968 // CHECK4: omp.loop.exit:
4969 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4970 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4971 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4972 // CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4973 // CHECK4: .omp.final.then:
4974 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
4975 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
4976 // CHECK4: .omp.final.done:
4977 // CHECK4-NEXT: ret void
4978 //
4979 //
4980 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53
4981 // CHECK4-SAME: () #[[ATTR1]] {
4982 // CHECK4-NEXT: entry:
4983 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
4984 // CHECK4-NEXT: ret void
4985 //
4986 //
4987 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2
4988 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4989 // CHECK4-NEXT: entry:
4990 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4991 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4992 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4993 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
4994 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4995 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4996 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4997 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4998 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
4999 // CHECK4-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5000 // CHECK4-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5001 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5002 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5003 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5004 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5005 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5006 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5007 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5008 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5009 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5010 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5011 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5012 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5013 // CHECK4: cond.true:
5014 // CHECK4-NEXT: br label [[COND_END:%.*]]
5015 // CHECK4: cond.false:
5016 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5017 // CHECK4-NEXT: br label [[COND_END]]
5018 // CHECK4: cond.end:
5019 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5020 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5021 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5022 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5023 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5024 // CHECK4: omp.inner.for.cond:
5025 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
5026 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
5027 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5028 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5029 // CHECK4: omp.inner.for.body:
5030 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !19
5031 // CHECK4-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5032 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !19
5033 // CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5034 // CHECK4-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !19
5035 // CHECK4-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !19
5036 // CHECK4-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !19
5037 // CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !19
5038 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5039 // CHECK4: omp.inner.for.inc:
5040 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
5041 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !19
5042 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5043 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
5044 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
5045 // CHECK4: omp.inner.for.end:
5046 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5047 // CHECK4: omp.loop.exit:
5048 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5049 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5050 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5051 // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5052 // CHECK4: .omp.final.then:
5053 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
5054 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
5055 // CHECK4: .omp.final.done:
5056 // CHECK4-NEXT: ret void
5057 //
5058 //
5059 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3
5060 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5061 // CHECK4-NEXT: entry:
5062 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5063 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5064 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5065 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5066 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5067 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5068 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5069 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5070 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5071 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5072 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
5073 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5074 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5075 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5076 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5077 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5078 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5079 // CHECK4-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5080 // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5081 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5082 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5083 // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5084 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5085 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5086 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5087 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5088 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5089 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5090 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5091 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5092 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5093 // CHECK4: cond.true:
5094 // CHECK4-NEXT: br label [[COND_END:%.*]]
5095 // CHECK4: cond.false:
5096 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5097 // CHECK4-NEXT: br label [[COND_END]]
5098 // CHECK4: cond.end:
5099 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5100 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5101 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5102 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5103 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5104 // CHECK4: omp.inner.for.cond:
5105 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
5106 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
5107 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5108 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5109 // CHECK4: omp.inner.for.body:
5110 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
5111 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5112 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5113 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
5114 // CHECK4-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !22
5115 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5116 // CHECK4: omp.body.continue:
5117 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5118 // CHECK4: omp.inner.for.inc:
5119 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
5120 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5121 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
5122 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
5123 // CHECK4: omp.inner.for.end:
5124 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5125 // CHECK4: omp.loop.exit:
5126 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5127 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5128 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5129 // CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5130 // CHECK4: .omp.final.then:
5131 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
5132 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
5133 // CHECK4: .omp.final.done:
5134 // CHECK4-NEXT: ret void
5135 //
5136 //
5137 // CHECK4-LABEL: define {{[^@]+}}@main
5138 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] {
5139 // CHECK4-NEXT: entry:
5140 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
5141 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5142 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5143 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5144 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
5145 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
5146 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
5147 // CHECK4-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
5148 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4
5149 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
5150 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
5151 // CHECK4-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
5152 // CHECK4-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5153 // CHECK4: omp_offload.failed:
5154 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]]
5155 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
5156 // CHECK4: omp_offload.cont:
5157 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]]
5158 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* @Arg, align 4
5159 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
5160 // CHECK4-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5161 // CHECK4-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5162 // CHECK4-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5163 // CHECK4-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
5164 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
5165 // CHECK4-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
5166 // CHECK4-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
5167 // CHECK4-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5168 // CHECK4-NEXT: [[TMP5:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5169 // CHECK4-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP5]] to i1
5170 // CHECK4-NEXT: br i1 [[TOBOOL3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5171 // CHECK4: omp_if.then:
5172 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5173 // CHECK4-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
5174 // CHECK4-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
5175 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5176 // CHECK4-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
5177 // CHECK4-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
5178 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5179 // CHECK4-NEXT: store i8* null, i8** [[TMP10]], align 8
5180 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5181 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5182 // CHECK4-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5183 // CHECK4-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP13]] to i1
5184 // CHECK4-NEXT: [[TMP14:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
5185 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
5186 // CHECK4-NEXT: [[TMP15:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP14]])
5187 // CHECK4-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5188 // CHECK4-NEXT: br i1 [[TMP16]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
5189 // CHECK4: omp_offload.failed6:
5190 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
5191 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT7]]
5192 // CHECK4: omp_offload.cont7:
5193 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]]
5194 // CHECK4: omp_if.else:
5195 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
5196 // CHECK4-NEXT: br label [[OMP_IF_END]]
5197 // CHECK4: omp_if.end:
5198 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* @Arg, align 4
5199 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP17]])
5200 // CHECK4-NEXT: ret i32 [[CALL]]
5201 //
5202 //
5203 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78
5204 // CHECK4-SAME: () #[[ATTR1]] {
5205 // CHECK4-NEXT: entry:
5206 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
5207 // CHECK4-NEXT: ret void
5208 //
5209 //
5210 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4
5211 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5212 // CHECK4-NEXT: entry:
5213 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5214 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5215 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5216 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5217 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5218 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5219 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5220 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5221 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
5222 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5223 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5224 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5225 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5226 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5227 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5228 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5229 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5230 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5231 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5232 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5233 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5234 // CHECK4: cond.true:
5235 // CHECK4-NEXT: br label [[COND_END:%.*]]
5236 // CHECK4: cond.false:
5237 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5238 // CHECK4-NEXT: br label [[COND_END]]
5239 // CHECK4: cond.end:
5240 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5241 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5242 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5243 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5244 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5245 // CHECK4: omp.inner.for.cond:
5246 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
5247 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
5248 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5249 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5250 // CHECK4: omp.inner.for.body:
5251 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !25
5252 // CHECK4-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5253 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !25
5254 // CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5255 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !25
5256 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5257 // CHECK4: omp.inner.for.inc:
5258 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
5259 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !25
5260 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5261 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
5262 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
5263 // CHECK4: omp.inner.for.end:
5264 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5265 // CHECK4: omp.loop.exit:
5266 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5267 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5268 // CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5269 // CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5270 // CHECK4: .omp.final.then:
5271 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
5272 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
5273 // CHECK4: .omp.final.done:
5274 // CHECK4-NEXT: ret void
5275 //
5276 //
5277 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..5
5278 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5279 // CHECK4-NEXT: entry:
5280 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5281 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5282 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5283 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5284 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5285 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5286 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5287 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5288 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5289 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5290 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
5291 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5292 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5293 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5294 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5295 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5296 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5297 // CHECK4-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5298 // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5299 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5300 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5301 // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5302 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5303 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5304 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5305 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5306 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5307 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5308 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5309 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5310 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5311 // CHECK4: cond.true:
5312 // CHECK4-NEXT: br label [[COND_END:%.*]]
5313 // CHECK4: cond.false:
5314 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5315 // CHECK4-NEXT: br label [[COND_END]]
5316 // CHECK4: cond.end:
5317 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5318 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5319 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5320 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5321 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5322 // CHECK4: omp.inner.for.cond:
5323 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
5324 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !28
5325 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5326 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5327 // CHECK4: omp.inner.for.body:
5328 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
5329 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5330 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5331 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !28
5332 // CHECK4-NEXT: call void @_Z3fn4v(), !llvm.access.group !28
5333 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5334 // CHECK4: omp.body.continue:
5335 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5336 // CHECK4: omp.inner.for.inc:
5337 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
5338 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5339 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
5340 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
5341 // CHECK4: omp.inner.for.end:
5342 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5343 // CHECK4: omp.loop.exit:
5344 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5345 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5346 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5347 // CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5348 // CHECK4: .omp.final.then:
5349 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
5350 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
5351 // CHECK4: .omp.final.done:
5352 // CHECK4-NEXT: ret void
5353 //
5354 //
5355 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85
5356 // CHECK4-SAME: () #[[ATTR1]] {
5357 // CHECK4-NEXT: entry:
5358 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
5359 // CHECK4-NEXT: ret void
5360 //
5361 //
5362 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..6
5363 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5364 // CHECK4-NEXT: entry:
5365 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5366 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5367 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5368 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5369 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5370 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5371 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5372 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5373 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
5374 // CHECK4-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5375 // CHECK4-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5376 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5377 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5378 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5379 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5380 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5381 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5382 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5383 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5384 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5385 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5386 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5387 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5388 // CHECK4: cond.true:
5389 // CHECK4-NEXT: br label [[COND_END:%.*]]
5390 // CHECK4: cond.false:
5391 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5392 // CHECK4-NEXT: br label [[COND_END]]
5393 // CHECK4: cond.end:
5394 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5395 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5396 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5397 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5398 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5399 // CHECK4: omp.inner.for.cond:
5400 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5401 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5402 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5403 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5404 // CHECK4: omp.inner.for.body:
5405 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5406 // CHECK4-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5407 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5408 // CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5409 // CHECK4-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5410 // CHECK4-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5411 // CHECK4-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
5412 // CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5413 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5414 // CHECK4: omp.inner.for.inc:
5415 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5416 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5417 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5418 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5419 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
5420 // CHECK4: omp.inner.for.end:
5421 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5422 // CHECK4: omp.loop.exit:
5423 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5424 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5425 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5426 // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5427 // CHECK4: .omp.final.then:
5428 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
5429 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
5430 // CHECK4: .omp.final.done:
5431 // CHECK4-NEXT: ret void
5432 //
5433 //
5434 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..7
5435 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5436 // CHECK4-NEXT: entry:
5437 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5438 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5439 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5440 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5441 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5442 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5443 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5444 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5445 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5446 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5447 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
5448 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5449 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5450 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5451 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5452 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5453 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5454 // CHECK4-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5455 // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5456 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5457 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5458 // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5459 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5460 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5461 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5462 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5463 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5464 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5465 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5466 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5467 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5468 // CHECK4: cond.true:
5469 // CHECK4-NEXT: br label [[COND_END:%.*]]
5470 // CHECK4: cond.false:
5471 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5472 // CHECK4-NEXT: br label [[COND_END]]
5473 // CHECK4: cond.end:
5474 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5475 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5476 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5477 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5478 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5479 // CHECK4: omp.inner.for.cond:
5480 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5481 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5482 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5483 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5484 // CHECK4: omp.inner.for.body:
5485 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5486 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5487 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5488 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5489 // CHECK4-NEXT: call void @_Z3fn5v()
5490 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5491 // CHECK4: omp.body.continue:
5492 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5493 // CHECK4: omp.inner.for.inc:
5494 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5495 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5496 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5497 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
5498 // CHECK4: omp.inner.for.end:
5499 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5500 // CHECK4: omp.loop.exit:
5501 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5502 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5503 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5504 // CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5505 // CHECK4: .omp.final.then:
5506 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
5507 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
5508 // CHECK4: .omp.final.done:
5509 // CHECK4-NEXT: ret void
5510 //
5511 //
5512 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
5513 // CHECK4-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5514 // CHECK4-NEXT: entry:
5515 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5516 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5517 // CHECK4-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5518 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5519 // CHECK4-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
5520 // CHECK4-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
5521 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
5522 // CHECK4-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5523 // CHECK4-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
5524 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5525 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP1]])
5526 // CHECK4-NEXT: ret void
5527 //
5528 //
5529 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..8
5530 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5531 // CHECK4-NEXT: entry:
5532 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5533 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5534 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5535 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5536 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5537 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5538 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5539 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5540 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5541 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
5542 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5543 // CHECK4-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5544 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED11:%.*]] = alloca i64, align 8
5545 // CHECK4-NEXT: [[DOTBOUND_ZERO_ADDR17:%.*]] = alloca i32, align 4
5546 // CHECK4-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR17]], align 4
5547 // CHECK4-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5548 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5549 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5550 // CHECK4-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5551 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5552 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5553 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5554 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5555 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5556 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5557 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5558 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5559 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5560 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5561 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5562 // CHECK4: cond.true:
5563 // CHECK4-NEXT: br label [[COND_END:%.*]]
5564 // CHECK4: cond.false:
5565 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5566 // CHECK4-NEXT: br label [[COND_END]]
5567 // CHECK4: cond.end:
5568 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5569 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5570 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5571 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5572 // CHECK4-NEXT: [[TMP5:%.*]] = load i8, i8* [[CONV]], align 8
5573 // CHECK4-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1
5574 // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]
5575 // CHECK4: omp_if.then:
5576 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5577 // CHECK4: omp.inner.for.cond:
5578 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
5579 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
5580 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5581 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5582 // CHECK4: omp.inner.for.body:
5583 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
5584 // CHECK4-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5585 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
5586 // CHECK4-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5587 // CHECK4-NEXT: [[TMP12:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !34
5588 // CHECK4-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP12]] to i1
5589 // CHECK4-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
5590 // CHECK4-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8
5591 // CHECK4-NEXT: store i8 [[FROMBOOL]], i8* [[CONV3]], align 1, !llvm.access.group !34
5592 // CHECK4-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !34
5593 // CHECK4-NEXT: [[TMP14:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !34
5594 // CHECK4-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
5595 // CHECK4-NEXT: br i1 [[TOBOOL4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]
5596 // CHECK4: omp_if.then5:
5597 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group !34
5598 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]]
5599 // CHECK4: omp_if.else:
5600 // CHECK4-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !34
5601 // CHECK4-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !34
5602 // CHECK4-NEXT: call void @.omp_outlined..9(i32* [[TMP15]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]) #[[ATTR2]], !llvm.access.group !34
5603 // CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !34
5604 // CHECK4-NEXT: br label [[OMP_IF_END]]
5605 // CHECK4: omp_if.end:
5606 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5607 // CHECK4: omp.inner.for.inc:
5608 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
5609 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
5610 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
5611 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
5612 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
5613 // CHECK4: omp.inner.for.end:
5614 // CHECK4-NEXT: br label [[OMP_IF_END22:%.*]]
5615 // CHECK4: omp_if.else6:
5616 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
5617 // CHECK4: omp.inner.for.cond7:
5618 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5619 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5620 // CHECK4-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
5621 // CHECK4-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END21:%.*]]
5622 // CHECK4: omp.inner.for.body9:
5623 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5624 // CHECK4-NEXT: [[TMP21:%.*]] = zext i32 [[TMP20]] to i64
5625 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5626 // CHECK4-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
5627 // CHECK4-NEXT: [[TMP24:%.*]] = load i8, i8* [[CONV]], align 8
5628 // CHECK4-NEXT: [[TOBOOL10:%.*]] = trunc i8 [[TMP24]] to i1
5629 // CHECK4-NEXT: [[CONV12:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED11]] to i8*
5630 // CHECK4-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[TOBOOL10]] to i8
5631 // CHECK4-NEXT: store i8 [[FROMBOOL13]], i8* [[CONV12]], align 1
5632 // CHECK4-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED11]], align 8
5633 // CHECK4-NEXT: [[TMP26:%.*]] = load i8, i8* [[CONV]], align 8
5634 // CHECK4-NEXT: [[TOBOOL14:%.*]] = trunc i8 [[TMP26]] to i1
5635 // CHECK4-NEXT: br i1 [[TOBOOL14]], label [[OMP_IF_THEN15:%.*]], label [[OMP_IF_ELSE16:%.*]]
5636 // CHECK4: omp_if.then15:
5637 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
5638 // CHECK4-NEXT: br label [[OMP_IF_END18:%.*]]
5639 // CHECK4: omp_if.else16:
5640 // CHECK4-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5641 // CHECK4-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5642 // CHECK4-NEXT: call void @.omp_outlined..10(i32* [[TMP27]], i32* [[DOTBOUND_ZERO_ADDR17]], i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) #[[ATTR2]]
5643 // CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5644 // CHECK4-NEXT: br label [[OMP_IF_END18]]
5645 // CHECK4: omp_if.end18:
5646 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
5647 // CHECK4: omp.inner.for.inc19:
5648 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5649 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5650 // CHECK4-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
5651 // CHECK4-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4
5652 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP37:![0-9]+]]
5653 // CHECK4: omp.inner.for.end21:
5654 // CHECK4-NEXT: br label [[OMP_IF_END22]]
5655 // CHECK4: omp_if.end22:
5656 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5657 // CHECK4: omp.loop.exit:
5658 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5659 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5660 // CHECK4-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
5661 // CHECK4-NEXT: br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5662 // CHECK4: .omp.final.then:
5663 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
5664 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
5665 // CHECK4: .omp.final.done:
5666 // CHECK4-NEXT: ret void
5667 //
5668 //
5669 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..9
5670 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5671 // CHECK4-NEXT: entry:
5672 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5673 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5674 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5675 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5676 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5677 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5678 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5679 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5680 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5681 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5682 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5683 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
5684 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5685 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5686 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5687 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5688 // CHECK4-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5689 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5690 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5691 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5692 // CHECK4-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5693 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
5694 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5695 // CHECK4-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
5696 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
5697 // CHECK4-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
5698 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5699 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5700 // CHECK4-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
5701 // CHECK4-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
5702 // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5703 // CHECK4: omp_if.then:
5704 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5705 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5706 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5707 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5708 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
5709 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5710 // CHECK4: cond.true:
5711 // CHECK4-NEXT: br label [[COND_END:%.*]]
5712 // CHECK4: cond.false:
5713 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5714 // CHECK4-NEXT: br label [[COND_END]]
5715 // CHECK4: cond.end:
5716 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
5717 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5718 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5719 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5720 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5721 // CHECK4: omp.inner.for.cond:
5722 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
5723 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
5724 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5725 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5726 // CHECK4: omp.inner.for.body:
5727 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
5728 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5729 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5730 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !38
5731 // CHECK4-NEXT: call void @_Z3fn6v(), !llvm.access.group !38
5732 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5733 // CHECK4: omp.body.continue:
5734 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5735 // CHECK4: omp.inner.for.inc:
5736 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
5737 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
5738 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
5739 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
5740 // CHECK4: omp.inner.for.end:
5741 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]]
5742 // CHECK4: omp_if.else:
5743 // CHECK4-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5744 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
5745 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5746 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5747 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
5748 // CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
5749 // CHECK4: cond.true6:
5750 // CHECK4-NEXT: br label [[COND_END8:%.*]]
5751 // CHECK4: cond.false7:
5752 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5753 // CHECK4-NEXT: br label [[COND_END8]]
5754 // CHECK4: cond.end8:
5755 // CHECK4-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
5756 // CHECK4-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
5757 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5758 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
5759 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
5760 // CHECK4: omp.inner.for.cond10:
5761 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5762 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5763 // CHECK4-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
5764 // CHECK4-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
5765 // CHECK4: omp.inner.for.body12:
5766 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5767 // CHECK4-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
5768 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
5769 // CHECK4-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
5770 // CHECK4-NEXT: call void @_Z3fn6v()
5771 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
5772 // CHECK4: omp.body.continue15:
5773 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
5774 // CHECK4: omp.inner.for.inc16:
5775 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5776 // CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
5777 // CHECK4-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
5778 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP41:![0-9]+]]
5779 // CHECK4: omp.inner.for.end18:
5780 // CHECK4-NEXT: br label [[OMP_IF_END]]
5781 // CHECK4: omp_if.end:
5782 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5783 // CHECK4: omp.loop.exit:
5784 // CHECK4-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5785 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
5786 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
5787 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5788 // CHECK4-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
5789 // CHECK4-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5790 // CHECK4: .omp.final.then:
5791 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
5792 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
5793 // CHECK4: .omp.final.done:
5794 // CHECK4-NEXT: ret void
5795 //
5796 //
5797 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..10
5798 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5799 // CHECK4-NEXT: entry:
5800 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5801 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5802 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5803 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5804 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5805 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5806 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5807 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5808 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5809 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5810 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5811 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
5812 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5813 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5814 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5815 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5816 // CHECK4-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5817 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5818 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5819 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5820 // CHECK4-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5821 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
5822 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5823 // CHECK4-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
5824 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
5825 // CHECK4-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
5826 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5827 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5828 // CHECK4-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
5829 // CHECK4-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
5830 // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5831 // CHECK4: omp_if.then:
5832 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5833 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5834 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5835 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5836 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
5837 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5838 // CHECK4: cond.true:
5839 // CHECK4-NEXT: br label [[COND_END:%.*]]
5840 // CHECK4: cond.false:
5841 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5842 // CHECK4-NEXT: br label [[COND_END]]
5843 // CHECK4: cond.end:
5844 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
5845 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5846 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5847 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5848 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5849 // CHECK4: omp.inner.for.cond:
5850 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
5851 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !42
5852 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5853 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5854 // CHECK4: omp.inner.for.body:
5855 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
5856 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5857 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5858 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !42
5859 // CHECK4-NEXT: call void @_Z3fn6v(), !llvm.access.group !42
5860 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5861 // CHECK4: omp.body.continue:
5862 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5863 // CHECK4: omp.inner.for.inc:
5864 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
5865 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
5866 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
5867 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
5868 // CHECK4: omp.inner.for.end:
5869 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]]
5870 // CHECK4: omp_if.else:
5871 // CHECK4-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5872 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
5873 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5874 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5875 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
5876 // CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
5877 // CHECK4: cond.true6:
5878 // CHECK4-NEXT: br label [[COND_END8:%.*]]
5879 // CHECK4: cond.false7:
5880 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5881 // CHECK4-NEXT: br label [[COND_END8]]
5882 // CHECK4: cond.end8:
5883 // CHECK4-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
5884 // CHECK4-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
5885 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5886 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
5887 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
5888 // CHECK4: omp.inner.for.cond10:
5889 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5890 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5891 // CHECK4-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
5892 // CHECK4-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
5893 // CHECK4: omp.inner.for.body12:
5894 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5895 // CHECK4-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
5896 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
5897 // CHECK4-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
5898 // CHECK4-NEXT: call void @_Z3fn6v()
5899 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
5900 // CHECK4: omp.body.continue15:
5901 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
5902 // CHECK4: omp.inner.for.inc16:
5903 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5904 // CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
5905 // CHECK4-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
5906 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP45:![0-9]+]]
5907 // CHECK4: omp.inner.for.end18:
5908 // CHECK4-NEXT: br label [[OMP_IF_END]]
5909 // CHECK4: omp_if.end:
5910 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5911 // CHECK4: omp.loop.exit:
5912 // CHECK4-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5913 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
5914 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
5915 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5916 // CHECK4-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
5917 // CHECK4-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5918 // CHECK4: .omp.final.then:
5919 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
5920 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
5921 // CHECK4: .omp.final.done:
5922 // CHECK4-NEXT: ret void
5923 //
5924 //
5925 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
5926 // CHECK4-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
5927 // CHECK4-NEXT: entry:
5928 // CHECK4-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
5929 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5930 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5931 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5932 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
5933 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
5934 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
5935 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
5936 // CHECK4-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
5937 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
5938 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
5939 // CHECK4-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
5940 // CHECK4-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5941 // CHECK4: omp_offload.failed:
5942 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
5943 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
5944 // CHECK4: omp_offload.cont:
5945 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]]
5946 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
5947 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
5948 // CHECK4-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5949 // CHECK4-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5950 // CHECK4-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5951 // CHECK4-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
5952 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
5953 // CHECK4-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
5954 // CHECK4-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
5955 // CHECK4-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5956 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5957 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
5958 // CHECK4-NEXT: store i64 [[TMP4]], i64* [[TMP6]], align 8
5959 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5960 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
5961 // CHECK4-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
5962 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5963 // CHECK4-NEXT: store i8* null, i8** [[TMP9]], align 8
5964 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5965 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5966 // CHECK4-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5967 // CHECK4-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP12]] to i1
5968 // CHECK4-NEXT: [[TMP13:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
5969 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
5970 // CHECK4-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, i32 1, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP13]])
5971 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5972 // CHECK4-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
5973 // CHECK4: omp_offload.failed5:
5974 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP4]]) #[[ATTR2]]
5975 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT6]]
5976 // CHECK4: omp_offload.cont6:
5977 // CHECK4-NEXT: ret i32 0
5978 //
5979 //
5980 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
5981 // CHECK4-SAME: () #[[ATTR1]] {
5982 // CHECK4-NEXT: entry:
5983 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..13 to void (i32*, i32*, ...)*))
5984 // CHECK4-NEXT: ret void
5985 //
5986 //
5987 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..13
5988 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5989 // CHECK4-NEXT: entry:
5990 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5991 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5992 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5993 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5994 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5995 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5996 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5997 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5998 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
5999 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6000 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6001 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6002 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6003 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6004 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6005 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6006 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6007 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6008 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6009 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6010 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6011 // CHECK4: cond.true:
6012 // CHECK4-NEXT: br label [[COND_END:%.*]]
6013 // CHECK4: cond.false:
6014 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6015 // CHECK4-NEXT: br label [[COND_END]]
6016 // CHECK4: cond.end:
6017 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6018 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6019 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6020 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6021 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6022 // CHECK4: omp.inner.for.cond:
6023 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
6024 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
6025 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6026 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6027 // CHECK4: omp.inner.for.body:
6028 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
6029 // CHECK4-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6030 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
6031 // CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6032 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !46
6033 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6034 // CHECK4: omp.inner.for.inc:
6035 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
6036 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
6037 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6038 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
6039 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
6040 // CHECK4: omp.inner.for.end:
6041 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6042 // CHECK4: omp.loop.exit:
6043 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6044 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6045 // CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6046 // CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6047 // CHECK4: .omp.final.then:
6048 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
6049 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
6050 // CHECK4: .omp.final.done:
6051 // CHECK4-NEXT: ret void
6052 //
6053 //
6054 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..14
6055 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6056 // CHECK4-NEXT: entry:
6057 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6058 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6059 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6060 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6061 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6062 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
6063 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6064 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6065 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6066 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6067 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
6068 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6069 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6070 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6071 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6072 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6073 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6074 // CHECK4-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6075 // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6076 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6077 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6078 // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6079 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6080 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6081 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6082 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6083 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6084 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6085 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6086 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6087 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6088 // CHECK4: cond.true:
6089 // CHECK4-NEXT: br label [[COND_END:%.*]]
6090 // CHECK4: cond.false:
6091 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6092 // CHECK4-NEXT: br label [[COND_END]]
6093 // CHECK4: cond.end:
6094 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6095 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6096 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6097 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6098 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6099 // CHECK4: omp.inner.for.cond:
6100 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
6101 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
6102 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6103 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6104 // CHECK4: omp.inner.for.body:
6105 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
6106 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6107 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6108 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
6109 // CHECK4-NEXT: call void @_Z3fn1v(), !llvm.access.group !49
6110 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6111 // CHECK4: omp.body.continue:
6112 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6113 // CHECK4: omp.inner.for.inc:
6114 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
6115 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6116 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
6117 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
6118 // CHECK4: omp.inner.for.end:
6119 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6120 // CHECK4: omp.loop.exit:
6121 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6122 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6123 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6124 // CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6125 // CHECK4: .omp.final.then:
6126 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
6127 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
6128 // CHECK4: .omp.final.done:
6129 // CHECK4-NEXT: ret void
6130 //
6131 //
6132 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66
6133 // CHECK4-SAME: () #[[ATTR1]] {
6134 // CHECK4-NEXT: entry:
6135 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..15 to void (i32*, i32*, ...)*))
6136 // CHECK4-NEXT: ret void
6137 //
6138 //
6139 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..15
6140 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6141 // CHECK4-NEXT: entry:
6142 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6143 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6144 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6145 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
6146 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6147 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6148 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6149 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6150 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
6151 // CHECK4-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6152 // CHECK4-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6153 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6154 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6155 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6156 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6157 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6158 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6159 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6160 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6161 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6162 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6163 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6164 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6165 // CHECK4: cond.true:
6166 // CHECK4-NEXT: br label [[COND_END:%.*]]
6167 // CHECK4: cond.false:
6168 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6169 // CHECK4-NEXT: br label [[COND_END]]
6170 // CHECK4: cond.end:
6171 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6172 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6173 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6174 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6175 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6176 // CHECK4: omp.inner.for.cond:
6177 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6178 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6179 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6180 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6181 // CHECK4: omp.inner.for.body:
6182 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6183 // CHECK4-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6184 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6185 // CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6186 // CHECK4-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6187 // CHECK4-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6188 // CHECK4-NEXT: call void @.omp_outlined..16(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
6189 // CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6190 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6191 // CHECK4: omp.inner.for.inc:
6192 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6193 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6194 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6195 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6196 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
6197 // CHECK4: omp.inner.for.end:
6198 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6199 // CHECK4: omp.loop.exit:
6200 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6201 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6202 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6203 // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6204 // CHECK4: .omp.final.then:
6205 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
6206 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
6207 // CHECK4: .omp.final.done:
6208 // CHECK4-NEXT: ret void
6209 //
6210 //
6211 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..16
6212 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6213 // CHECK4-NEXT: entry:
6214 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6215 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6216 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6217 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6218 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6219 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
6220 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6221 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6222 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6223 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6224 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
6225 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6226 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6227 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6228 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6229 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6230 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6231 // CHECK4-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6232 // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6233 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6234 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6235 // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6236 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6237 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6238 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6239 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6240 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6241 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6242 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6243 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6244 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6245 // CHECK4: cond.true:
6246 // CHECK4-NEXT: br label [[COND_END:%.*]]
6247 // CHECK4: cond.false:
6248 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6249 // CHECK4-NEXT: br label [[COND_END]]
6250 // CHECK4: cond.end:
6251 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6252 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6253 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6254 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6255 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6256 // CHECK4: omp.inner.for.cond:
6257 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6258 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6259 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6260 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6261 // CHECK4: omp.inner.for.body:
6262 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6263 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6264 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6265 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6266 // CHECK4-NEXT: call void @_Z3fn2v()
6267 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6268 // CHECK4: omp.body.continue:
6269 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6270 // CHECK4: omp.inner.for.inc:
6271 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6272 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6273 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6274 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
6275 // CHECK4: omp.inner.for.end:
6276 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6277 // CHECK4: omp.loop.exit:
6278 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6279 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6280 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6281 // CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6282 // CHECK4: .omp.final.then:
6283 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
6284 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
6285 // CHECK4: .omp.final.done:
6286 // CHECK4-NEXT: ret void
6287 //
6288 //
6289 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70
6290 // CHECK4-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6291 // CHECK4-NEXT: entry:
6292 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6293 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6294 // CHECK4-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6295 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6296 // CHECK4-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
6297 // CHECK4-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
6298 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
6299 // CHECK4-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6300 // CHECK4-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
6301 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6302 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..17 to void (i32*, i32*, ...)*), i64 [[TMP1]])
6303 // CHECK4-NEXT: ret void
6304 //
6305 //
6306 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..17
6307 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6308 // CHECK4-NEXT: entry:
6309 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6310 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6311 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6312 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6313 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
6314 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6315 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6316 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6317 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6318 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
6319 // CHECK4-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6320 // CHECK4-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6321 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6322 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6323 // CHECK4-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6324 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6325 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6326 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6327 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6328 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6329 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6330 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6331 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6332 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6333 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6334 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6335 // CHECK4: cond.true:
6336 // CHECK4-NEXT: br label [[COND_END:%.*]]
6337 // CHECK4: cond.false:
6338 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6339 // CHECK4-NEXT: br label [[COND_END]]
6340 // CHECK4: cond.end:
6341 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6342 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6343 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6344 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6345 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6346 // CHECK4: omp.inner.for.cond:
6347 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !54
6348 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !54
6349 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6350 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6351 // CHECK4: omp.inner.for.body:
6352 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !54
6353 // CHECK4-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6354 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !54
6355 // CHECK4-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6356 // CHECK4-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !54
6357 // CHECK4-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
6358 // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6359 // CHECK4: omp_if.then:
6360 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !54
6361 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]]
6362 // CHECK4: omp_if.else:
6363 // CHECK4-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !54
6364 // CHECK4-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !54
6365 // CHECK4-NEXT: call void @.omp_outlined..18(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !54
6366 // CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !54
6367 // CHECK4-NEXT: br label [[OMP_IF_END]]
6368 // CHECK4: omp_if.end:
6369 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6370 // CHECK4: omp.inner.for.inc:
6371 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !54
6372 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !54
6373 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
6374 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !54
6375 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
6376 // CHECK4: omp.inner.for.end:
6377 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6378 // CHECK4: omp.loop.exit:
6379 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6380 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6381 // CHECK4-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
6382 // CHECK4-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6383 // CHECK4: .omp.final.then:
6384 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
6385 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
6386 // CHECK4: .omp.final.done:
6387 // CHECK4-NEXT: ret void
6388 //
6389 //
6390 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..18
6391 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6392 // CHECK4-NEXT: entry:
6393 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6394 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6395 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6396 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6397 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6398 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
6399 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6400 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6401 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6402 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6403 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
6404 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6405 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6406 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6407 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6408 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6409 // CHECK4-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6410 // CHECK4-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6411 // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6412 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6413 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6414 // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6415 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6416 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6417 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6418 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6419 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6420 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6421 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6422 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6423 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6424 // CHECK4: cond.true:
6425 // CHECK4-NEXT: br label [[COND_END:%.*]]
6426 // CHECK4: cond.false:
6427 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6428 // CHECK4-NEXT: br label [[COND_END]]
6429 // CHECK4: cond.end:
6430 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6431 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6432 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6433 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6434 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6435 // CHECK4: omp.inner.for.cond:
6436 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
6437 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !57
6438 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6439 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6440 // CHECK4: omp.inner.for.body:
6441 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
6442 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6443 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6444 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !57
6445 // CHECK4-NEXT: call void @_Z3fn3v(), !llvm.access.group !57
6446 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6447 // CHECK4: omp.body.continue:
6448 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6449 // CHECK4: omp.inner.for.inc:
6450 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
6451 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6452 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !57
6453 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
6454 // CHECK4: omp.inner.for.end:
6455 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6456 // CHECK4: omp.loop.exit:
6457 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6458 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6459 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6460 // CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6461 // CHECK4: .omp.final.then:
6462 // CHECK4-NEXT: store i32 100, i32* [[I]], align 4
6463 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
6464 // CHECK4: .omp.final.done:
6465 // CHECK4-NEXT: ret void
6466 //
6467 //
6468 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6469 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] {
6470 // CHECK4-NEXT: entry:
6471 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
6472 // CHECK4-NEXT: ret void
6473 //
6474 //
6475 // CHECK5-LABEL: define {{[^@]+}}@_Z9gtid_testv
6476 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
6477 // CHECK5-NEXT: entry:
6478 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
6479 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6480 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6481 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6482 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
6483 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
6484 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
6485 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
6486 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
6487 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
6488 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6489 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6490 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6491 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6492 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6493 // CHECK5: omp.inner.for.cond:
6494 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6495 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
6496 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
6497 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6498 // CHECK5: omp.inner.for.body:
6499 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6500 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
6501 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6502 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
6503 // CHECK5-NEXT: store i32 0, i32* @Arg, align 4, !llvm.access.group !2
6504 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6505 // CHECK5: omp.body.continue:
6506 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6507 // CHECK5: omp.inner.for.inc:
6508 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6509 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
6510 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6511 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
6512 // CHECK5: omp.inner.for.end:
6513 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
6514 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
6515 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
6516 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
6517 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
6518 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
6519 // CHECK5: omp.inner.for.cond7:
6520 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6
6521 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !6
6522 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6523 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
6524 // CHECK5: omp.inner.for.body9:
6525 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6
6526 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
6527 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
6528 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !6
6529 // CHECK5-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !6
6530 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
6531 // CHECK5: omp.body.continue12:
6532 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
6533 // CHECK5: omp.inner.for.inc13:
6534 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6
6535 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
6536 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6
6537 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
6538 // CHECK5: omp.inner.for.end15:
6539 // CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
6540 // CHECK5-NEXT: ret void
6541 //
6542 //
6543 // CHECK5-LABEL: define {{[^@]+}}@main
6544 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] {
6545 // CHECK5-NEXT: entry:
6546 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6547 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
6548 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6549 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6550 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6551 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
6552 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
6553 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
6554 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
6555 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
6556 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
6557 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6558 // CHECK5-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
6559 // CHECK5-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
6560 // CHECK5-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
6561 // CHECK5-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
6562 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4
6563 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
6564 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6565 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6566 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6567 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6568 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6569 // CHECK5: omp.inner.for.cond:
6570 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6571 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
6572 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
6573 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6574 // CHECK5: omp.inner.for.body:
6575 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6576 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
6577 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6578 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
6579 // CHECK5-NEXT: call void @_Z3fn4v(), !llvm.access.group !9
6580 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6581 // CHECK5: omp.body.continue:
6582 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6583 // CHECK5: omp.inner.for.inc:
6584 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6585 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
6586 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6587 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
6588 // CHECK5: omp.inner.for.end:
6589 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
6590 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
6591 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
6592 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
6593 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
6594 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
6595 // CHECK5: omp.inner.for.cond7:
6596 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
6597 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !12
6598 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6599 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
6600 // CHECK5: omp.inner.for.body9:
6601 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
6602 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
6603 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
6604 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !12
6605 // CHECK5-NEXT: call void @_Z3fn5v(), !llvm.access.group !12
6606 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
6607 // CHECK5: omp.body.continue12:
6608 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
6609 // CHECK5: omp.inner.for.inc13:
6610 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
6611 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
6612 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
6613 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
6614 // CHECK5: omp.inner.for.end15:
6615 // CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
6616 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
6617 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
6618 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6619 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6620 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
6621 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
6622 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
6623 // CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
6624 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
6625 // CHECK5: omp.inner.for.cond21:
6626 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
6627 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !15
6628 // CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
6629 // CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
6630 // CHECK5: omp.inner.for.body23:
6631 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
6632 // CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
6633 // CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
6634 // CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !15
6635 // CHECK5-NEXT: call void @_Z3fn6v(), !llvm.access.group !15
6636 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
6637 // CHECK5: omp.body.continue26:
6638 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
6639 // CHECK5: omp.inner.for.inc27:
6640 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
6641 // CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
6642 // CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
6643 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
6644 // CHECK5: omp.inner.for.end29:
6645 // CHECK5-NEXT: store i32 100, i32* [[I20]], align 4
6646 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* @Arg, align 4
6647 // CHECK5-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP16]])
6648 // CHECK5-NEXT: ret i32 [[CALL]]
6649 //
6650 //
6651 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
6652 // CHECK5-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
6653 // CHECK5-NEXT: entry:
6654 // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
6655 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
6656 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6657 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6658 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6659 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
6660 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
6661 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
6662 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
6663 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
6664 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
6665 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6666 // CHECK5-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
6667 // CHECK5-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
6668 // CHECK5-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
6669 // CHECK5-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
6670 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4
6671 // CHECK5-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
6672 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6673 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6674 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6675 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6676 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6677 // CHECK5: omp.inner.for.cond:
6678 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
6679 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
6680 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
6681 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6682 // CHECK5: omp.inner.for.body:
6683 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
6684 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
6685 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6686 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18
6687 // CHECK5-NEXT: call void @_Z3fn1v(), !llvm.access.group !18
6688 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6689 // CHECK5: omp.body.continue:
6690 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6691 // CHECK5: omp.inner.for.inc:
6692 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
6693 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
6694 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
6695 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
6696 // CHECK5: omp.inner.for.end:
6697 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
6698 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
6699 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
6700 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
6701 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
6702 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
6703 // CHECK5: omp.inner.for.cond7:
6704 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
6705 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !21
6706 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6707 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
6708 // CHECK5: omp.inner.for.body9:
6709 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
6710 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
6711 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
6712 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !21
6713 // CHECK5-NEXT: call void @_Z3fn2v(), !llvm.access.group !21
6714 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
6715 // CHECK5: omp.body.continue12:
6716 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
6717 // CHECK5: omp.inner.for.inc13:
6718 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
6719 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
6720 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
6721 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
6722 // CHECK5: omp.inner.for.end15:
6723 // CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
6724 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
6725 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
6726 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6727 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6728 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
6729 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
6730 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
6731 // CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
6732 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
6733 // CHECK5: omp.inner.for.cond21:
6734 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !24
6735 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !24
6736 // CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
6737 // CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
6738 // CHECK5: omp.inner.for.body23:
6739 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !24
6740 // CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
6741 // CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
6742 // CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !24
6743 // CHECK5-NEXT: call void @_Z3fn3v(), !llvm.access.group !24
6744 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
6745 // CHECK5: omp.body.continue26:
6746 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
6747 // CHECK5: omp.inner.for.inc27:
6748 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !24
6749 // CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
6750 // CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !24
6751 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
6752 // CHECK5: omp.inner.for.end29:
6753 // CHECK5-NEXT: store i32 100, i32* [[I20]], align 4
6754 // CHECK5-NEXT: ret i32 0
6755 //
6756 //
6757 // CHECK6-LABEL: define {{[^@]+}}@_Z9gtid_testv
6758 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
6759 // CHECK6-NEXT: entry:
6760 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
6761 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6762 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6763 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6764 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
6765 // CHECK6-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
6766 // CHECK6-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
6767 // CHECK6-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
6768 // CHECK6-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
6769 // CHECK6-NEXT: [[I6:%.*]] = alloca i32, align 4
6770 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6771 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6772 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6773 // CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6774 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6775 // CHECK6: omp.inner.for.cond:
6776 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6777 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
6778 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
6779 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6780 // CHECK6: omp.inner.for.body:
6781 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6782 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
6783 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6784 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
6785 // CHECK6-NEXT: store i32 0, i32* @Arg, align 4, !llvm.access.group !2
6786 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6787 // CHECK6: omp.body.continue:
6788 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6789 // CHECK6: omp.inner.for.inc:
6790 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6791 // CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
6792 // CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6793 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
6794 // CHECK6: omp.inner.for.end:
6795 // CHECK6-NEXT: store i32 100, i32* [[I]], align 4
6796 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
6797 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
6798 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
6799 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
6800 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
6801 // CHECK6: omp.inner.for.cond7:
6802 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6
6803 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !6
6804 // CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6805 // CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
6806 // CHECK6: omp.inner.for.body9:
6807 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6
6808 // CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
6809 // CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
6810 // CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !6
6811 // CHECK6-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !6
6812 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
6813 // CHECK6: omp.body.continue12:
6814 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
6815 // CHECK6: omp.inner.for.inc13:
6816 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6
6817 // CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
6818 // CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6
6819 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
6820 // CHECK6: omp.inner.for.end15:
6821 // CHECK6-NEXT: store i32 100, i32* [[I6]], align 4
6822 // CHECK6-NEXT: ret void
6823 //
6824 //
6825 // CHECK6-LABEL: define {{[^@]+}}@main
6826 // CHECK6-SAME: () #[[ATTR1:[0-9]+]] {
6827 // CHECK6-NEXT: entry:
6828 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6829 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
6830 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6831 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6832 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6833 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
6834 // CHECK6-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
6835 // CHECK6-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
6836 // CHECK6-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
6837 // CHECK6-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
6838 // CHECK6-NEXT: [[I6:%.*]] = alloca i32, align 4
6839 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6840 // CHECK6-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
6841 // CHECK6-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
6842 // CHECK6-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
6843 // CHECK6-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
6844 // CHECK6-NEXT: [[I20:%.*]] = alloca i32, align 4
6845 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4
6846 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6847 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6848 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6849 // CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6850 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6851 // CHECK6: omp.inner.for.cond:
6852 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6853 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
6854 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
6855 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6856 // CHECK6: omp.inner.for.body:
6857 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6858 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
6859 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6860 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
6861 // CHECK6-NEXT: call void @_Z3fn4v(), !llvm.access.group !9
6862 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6863 // CHECK6: omp.body.continue:
6864 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6865 // CHECK6: omp.inner.for.inc:
6866 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6867 // CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
6868 // CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6869 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
6870 // CHECK6: omp.inner.for.end:
6871 // CHECK6-NEXT: store i32 100, i32* [[I]], align 4
6872 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
6873 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
6874 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
6875 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
6876 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
6877 // CHECK6: omp.inner.for.cond7:
6878 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
6879 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !12
6880 // CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6881 // CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
6882 // CHECK6: omp.inner.for.body9:
6883 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
6884 // CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
6885 // CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
6886 // CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !12
6887 // CHECK6-NEXT: call void @_Z3fn5v(), !llvm.access.group !12
6888 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
6889 // CHECK6: omp.body.continue12:
6890 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
6891 // CHECK6: omp.inner.for.inc13:
6892 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
6893 // CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
6894 // CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !12
6895 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
6896 // CHECK6: omp.inner.for.end15:
6897 // CHECK6-NEXT: store i32 100, i32* [[I6]], align 4
6898 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
6899 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
6900 // CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6901 // CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6902 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
6903 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
6904 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
6905 // CHECK6-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
6906 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
6907 // CHECK6: omp.inner.for.cond21:
6908 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
6909 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !15
6910 // CHECK6-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
6911 // CHECK6-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
6912 // CHECK6: omp.inner.for.body23:
6913 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
6914 // CHECK6-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
6915 // CHECK6-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
6916 // CHECK6-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !15
6917 // CHECK6-NEXT: call void @_Z3fn6v(), !llvm.access.group !15
6918 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
6919 // CHECK6: omp.body.continue26:
6920 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
6921 // CHECK6: omp.inner.for.inc27:
6922 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
6923 // CHECK6-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
6924 // CHECK6-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
6925 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
6926 // CHECK6: omp.inner.for.end29:
6927 // CHECK6-NEXT: store i32 100, i32* [[I20]], align 4
6928 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* @Arg, align 4
6929 // CHECK6-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP16]])
6930 // CHECK6-NEXT: ret i32 [[CALL]]
6931 //
6932 //
6933 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
6934 // CHECK6-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
6935 // CHECK6-NEXT: entry:
6936 // CHECK6-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
6937 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
6938 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6939 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6940 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6941 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
6942 // CHECK6-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
6943 // CHECK6-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
6944 // CHECK6-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
6945 // CHECK6-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
6946 // CHECK6-NEXT: [[I6:%.*]] = alloca i32, align 4
6947 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6948 // CHECK6-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
6949 // CHECK6-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
6950 // CHECK6-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
6951 // CHECK6-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
6952 // CHECK6-NEXT: [[I20:%.*]] = alloca i32, align 4
6953 // CHECK6-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
6954 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6955 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6956 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6957 // CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6958 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6959 // CHECK6: omp.inner.for.cond:
6960 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
6961 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
6962 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
6963 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6964 // CHECK6: omp.inner.for.body:
6965 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
6966 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
6967 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6968 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18
6969 // CHECK6-NEXT: call void @_Z3fn1v(), !llvm.access.group !18
6970 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6971 // CHECK6: omp.body.continue:
6972 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6973 // CHECK6: omp.inner.for.inc:
6974 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
6975 // CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
6976 // CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
6977 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
6978 // CHECK6: omp.inner.for.end:
6979 // CHECK6-NEXT: store i32 100, i32* [[I]], align 4
6980 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
6981 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
6982 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
6983 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
6984 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
6985 // CHECK6: omp.inner.for.cond7:
6986 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
6987 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !21
6988 // CHECK6-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6989 // CHECK6-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
6990 // CHECK6: omp.inner.for.body9:
6991 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
6992 // CHECK6-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
6993 // CHECK6-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
6994 // CHECK6-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !21
6995 // CHECK6-NEXT: call void @_Z3fn2v(), !llvm.access.group !21
6996 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
6997 // CHECK6: omp.body.continue12:
6998 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
6999 // CHECK6: omp.inner.for.inc13:
7000 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
7001 // CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7002 // CHECK6-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
7003 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
7004 // CHECK6: omp.inner.for.end15:
7005 // CHECK6-NEXT: store i32 100, i32* [[I6]], align 4
7006 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
7007 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7008 // CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7009 // CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7010 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7011 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7012 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7013 // CHECK6-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
7014 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
7015 // CHECK6: omp.inner.for.cond21:
7016 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !24
7017 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !24
7018 // CHECK6-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
7019 // CHECK6-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7020 // CHECK6: omp.inner.for.body23:
7021 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !24
7022 // CHECK6-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
7023 // CHECK6-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7024 // CHECK6-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !24
7025 // CHECK6-NEXT: call void @_Z3fn3v(), !llvm.access.group !24
7026 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
7027 // CHECK6: omp.body.continue26:
7028 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
7029 // CHECK6: omp.inner.for.inc27:
7030 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !24
7031 // CHECK6-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
7032 // CHECK6-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !24
7033 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
7034 // CHECK6: omp.inner.for.end29:
7035 // CHECK6-NEXT: store i32 100, i32* [[I20]], align 4
7036 // CHECK6-NEXT: ret i32 0
7037 //
7038 //
7039 // CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv
7040 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
7041 // CHECK7-NEXT: entry:
7042 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
7043 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7044 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7045 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7046 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
7047 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7048 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7049 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7050 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7051 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
7052 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7053 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7054 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7055 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7056 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7057 // CHECK7: omp.inner.for.cond:
7058 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
7059 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
7060 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7061 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7062 // CHECK7: omp.inner.for.body:
7063 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
7064 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7065 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7066 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
7067 // CHECK7-NEXT: store i32 0, i32* @Arg, align 4, !nontemporal !3, !llvm.access.group !2
7068 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7069 // CHECK7: omp.body.continue:
7070 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7071 // CHECK7: omp.inner.for.inc:
7072 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
7073 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7074 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
7075 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
7076 // CHECK7: omp.inner.for.end:
7077 // CHECK7-NEXT: store i32 100, i32* [[I]], align 4
7078 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7079 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7080 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7081 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7082 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7083 // CHECK7: omp.inner.for.cond7:
7084 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !7
7085 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !7
7086 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7087 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7088 // CHECK7: omp.inner.for.body9:
7089 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !7
7090 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7091 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7092 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !7
7093 // CHECK7-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !7
7094 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7095 // CHECK7: omp.body.continue12:
7096 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7097 // CHECK7: omp.inner.for.inc13:
7098 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !7
7099 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7100 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !7
7101 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP8:![0-9]+]]
7102 // CHECK7: omp.inner.for.end15:
7103 // CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
7104 // CHECK7-NEXT: ret void
7105 //
7106 //
7107 // CHECK7-LABEL: define {{[^@]+}}@main
7108 // CHECK7-SAME: () #[[ATTR1:[0-9]+]] {
7109 // CHECK7-NEXT: entry:
7110 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
7111 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
7112 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7113 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7114 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7115 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
7116 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7117 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7118 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7119 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7120 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
7121 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7122 // CHECK7-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7123 // CHECK7-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7124 // CHECK7-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7125 // CHECK7-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7126 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4
7127 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4
7128 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7129 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7130 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7131 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7132 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7133 // CHECK7: omp.inner.for.cond:
7134 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
7135 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
7136 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7137 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7138 // CHECK7: omp.inner.for.body:
7139 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
7140 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7141 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7142 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
7143 // CHECK7-NEXT: call void @_Z3fn4v(), !llvm.access.group !10
7144 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7145 // CHECK7: omp.body.continue:
7146 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7147 // CHECK7: omp.inner.for.inc:
7148 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
7149 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7150 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
7151 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
7152 // CHECK7: omp.inner.for.end:
7153 // CHECK7-NEXT: store i32 100, i32* [[I]], align 4
7154 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7155 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7156 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7157 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7158 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7159 // CHECK7: omp.inner.for.cond7:
7160 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7161 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
7162 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7163 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7164 // CHECK7: omp.inner.for.body9:
7165 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7166 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7167 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7168 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
7169 // CHECK7-NEXT: call void @_Z3fn5v()
7170 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7171 // CHECK7: omp.body.continue12:
7172 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7173 // CHECK7: omp.inner.for.inc13:
7174 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7175 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7176 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
7177 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
7178 // CHECK7: omp.inner.for.end15:
7179 // CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
7180 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
7181 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7182 // CHECK7-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7183 // CHECK7-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7184 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7185 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7186 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7187 // CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
7188 // CHECK7-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7189 // CHECK7-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
7190 // CHECK7-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7191 // CHECK7: omp_if.then:
7192 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
7193 // CHECK7: omp.inner.for.cond22:
7194 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
7195 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !15
7196 // CHECK7-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
7197 // CHECK7-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END30:%.*]]
7198 // CHECK7: omp.inner.for.body24:
7199 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
7200 // CHECK7-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
7201 // CHECK7-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
7202 // CHECK7-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group !15
7203 // CHECK7-NEXT: call void @_Z3fn6v(), !llvm.access.group !15
7204 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
7205 // CHECK7: omp.body.continue27:
7206 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
7207 // CHECK7: omp.inner.for.inc28:
7208 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
7209 // CHECK7-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
7210 // CHECK7-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
7211 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP16:![0-9]+]]
7212 // CHECK7: omp.inner.for.end30:
7213 // CHECK7-NEXT: br label [[OMP_IF_END:%.*]]
7214 // CHECK7: omp_if.else:
7215 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
7216 // CHECK7: omp.inner.for.cond31:
7217 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
7218 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4
7219 // CHECK7-NEXT: [[CMP32:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
7220 // CHECK7-NEXT: br i1 [[CMP32]], label [[OMP_INNER_FOR_BODY33:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
7221 // CHECK7: omp.inner.for.body33:
7222 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
7223 // CHECK7-NEXT: [[MUL34:%.*]] = mul nsw i32 [[TMP19]], 1
7224 // CHECK7-NEXT: [[ADD35:%.*]] = add nsw i32 0, [[MUL34]]
7225 // CHECK7-NEXT: store i32 [[ADD35]], i32* [[I20]], align 4
7226 // CHECK7-NEXT: call void @_Z3fn6v()
7227 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
7228 // CHECK7: omp.body.continue36:
7229 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
7230 // CHECK7: omp.inner.for.inc37:
7231 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
7232 // CHECK7-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP20]], 1
7233 // CHECK7-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV19]], align 4
7234 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND31]], !llvm.loop [[LOOP18:![0-9]+]]
7235 // CHECK7: omp.inner.for.end39:
7236 // CHECK7-NEXT: br label [[OMP_IF_END]]
7237 // CHECK7: omp_if.end:
7238 // CHECK7-NEXT: store i32 100, i32* [[I20]], align 4
7239 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* @Arg, align 4
7240 // CHECK7-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP21]])
7241 // CHECK7-NEXT: ret i32 [[CALL]]
7242 //
7243 //
7244 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
7245 // CHECK7-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
7246 // CHECK7-NEXT: entry:
7247 // CHECK7-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
7248 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
7249 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7250 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7251 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7252 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
7253 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7254 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7255 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7256 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7257 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
7258 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7259 // CHECK7-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7260 // CHECK7-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7261 // CHECK7-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7262 // CHECK7-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7263 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4
7264 // CHECK7-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
7265 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7266 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7267 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7268 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7269 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7270 // CHECK7: omp.inner.for.cond:
7271 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
7272 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
7273 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7274 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7275 // CHECK7: omp.inner.for.body:
7276 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
7277 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7278 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7279 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !19
7280 // CHECK7-NEXT: call void @_Z3fn1v(), !llvm.access.group !19
7281 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7282 // CHECK7: omp.body.continue:
7283 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7284 // CHECK7: omp.inner.for.inc:
7285 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
7286 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7287 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
7288 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
7289 // CHECK7: omp.inner.for.end:
7290 // CHECK7-NEXT: store i32 100, i32* [[I]], align 4
7291 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7292 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7293 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7294 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7295 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7296 // CHECK7: omp.inner.for.cond7:
7297 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7298 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
7299 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7300 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7301 // CHECK7: omp.inner.for.body9:
7302 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7303 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7304 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7305 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
7306 // CHECK7-NEXT: call void @_Z3fn2v()
7307 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7308 // CHECK7: omp.body.continue12:
7309 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7310 // CHECK7: omp.inner.for.inc13:
7311 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7312 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7313 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
7314 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
7315 // CHECK7: omp.inner.for.end15:
7316 // CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
7317 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
7318 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7319 // CHECK7-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7320 // CHECK7-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7321 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7322 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7323 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7324 // CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
7325 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
7326 // CHECK7: omp.inner.for.cond21:
7327 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !23
7328 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !23
7329 // CHECK7-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
7330 // CHECK7-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7331 // CHECK7: omp.inner.for.body23:
7332 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !23
7333 // CHECK7-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
7334 // CHECK7-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7335 // CHECK7-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !23
7336 // CHECK7-NEXT: call void @_Z3fn3v(), !llvm.access.group !23
7337 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
7338 // CHECK7: omp.body.continue26:
7339 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
7340 // CHECK7: omp.inner.for.inc27:
7341 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !23
7342 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
7343 // CHECK7-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !23
7344 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP24:![0-9]+]]
7345 // CHECK7: omp.inner.for.end29:
7346 // CHECK7-NEXT: store i32 100, i32* [[I20]], align 4
7347 // CHECK7-NEXT: ret i32 0
7348 //
7349 //
7350 // CHECK8-LABEL: define {{[^@]+}}@_Z9gtid_testv
7351 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
7352 // CHECK8-NEXT: entry:
7353 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7354 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7355 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7356 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7357 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
7358 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7359 // CHECK8-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7360 // CHECK8-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7361 // CHECK8-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7362 // CHECK8-NEXT: [[I6:%.*]] = alloca i32, align 4
7363 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7364 // CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7365 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7366 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7367 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7368 // CHECK8: omp.inner.for.cond:
7369 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
7370 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
7371 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7372 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7373 // CHECK8: omp.inner.for.body:
7374 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
7375 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7376 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7377 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
7378 // CHECK8-NEXT: store i32 0, i32* @Arg, align 4, !nontemporal !3, !llvm.access.group !2
7379 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7380 // CHECK8: omp.body.continue:
7381 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7382 // CHECK8: omp.inner.for.inc:
7383 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
7384 // CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7385 // CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
7386 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
7387 // CHECK8: omp.inner.for.end:
7388 // CHECK8-NEXT: store i32 100, i32* [[I]], align 4
7389 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7390 // CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7391 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7392 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7393 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7394 // CHECK8: omp.inner.for.cond7:
7395 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !7
7396 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !7
7397 // CHECK8-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7398 // CHECK8-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7399 // CHECK8: omp.inner.for.body9:
7400 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !7
7401 // CHECK8-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7402 // CHECK8-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7403 // CHECK8-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !7
7404 // CHECK8-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !7
7405 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7406 // CHECK8: omp.body.continue12:
7407 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7408 // CHECK8: omp.inner.for.inc13:
7409 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !7
7410 // CHECK8-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7411 // CHECK8-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !7
7412 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP8:![0-9]+]]
7413 // CHECK8: omp.inner.for.end15:
7414 // CHECK8-NEXT: store i32 100, i32* [[I6]], align 4
7415 // CHECK8-NEXT: ret void
7416 //
7417 //
7418 // CHECK8-LABEL: define {{[^@]+}}@main
7419 // CHECK8-SAME: () #[[ATTR1:[0-9]+]] {
7420 // CHECK8-NEXT: entry:
7421 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
7422 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7423 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7424 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7425 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7426 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
7427 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7428 // CHECK8-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7429 // CHECK8-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7430 // CHECK8-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7431 // CHECK8-NEXT: [[I6:%.*]] = alloca i32, align 4
7432 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7433 // CHECK8-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7434 // CHECK8-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7435 // CHECK8-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7436 // CHECK8-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7437 // CHECK8-NEXT: [[I20:%.*]] = alloca i32, align 4
7438 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4
7439 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7440 // CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7441 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7442 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7443 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7444 // CHECK8: omp.inner.for.cond:
7445 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
7446 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
7447 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7448 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7449 // CHECK8: omp.inner.for.body:
7450 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
7451 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7452 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7453 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
7454 // CHECK8-NEXT: call void @_Z3fn4v(), !llvm.access.group !10
7455 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7456 // CHECK8: omp.body.continue:
7457 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7458 // CHECK8: omp.inner.for.inc:
7459 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
7460 // CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7461 // CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
7462 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
7463 // CHECK8: omp.inner.for.end:
7464 // CHECK8-NEXT: store i32 100, i32* [[I]], align 4
7465 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7466 // CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7467 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7468 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7469 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7470 // CHECK8: omp.inner.for.cond7:
7471 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7472 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
7473 // CHECK8-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7474 // CHECK8-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7475 // CHECK8: omp.inner.for.body9:
7476 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7477 // CHECK8-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7478 // CHECK8-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7479 // CHECK8-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
7480 // CHECK8-NEXT: call void @_Z3fn5v()
7481 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7482 // CHECK8: omp.body.continue12:
7483 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7484 // CHECK8: omp.inner.for.inc13:
7485 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7486 // CHECK8-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7487 // CHECK8-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
7488 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
7489 // CHECK8: omp.inner.for.end15:
7490 // CHECK8-NEXT: store i32 100, i32* [[I6]], align 4
7491 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
7492 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7493 // CHECK8-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7494 // CHECK8-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7495 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7496 // CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7497 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7498 // CHECK8-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
7499 // CHECK8-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7500 // CHECK8-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
7501 // CHECK8-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7502 // CHECK8: omp_if.then:
7503 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
7504 // CHECK8: omp.inner.for.cond22:
7505 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
7506 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !15
7507 // CHECK8-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
7508 // CHECK8-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END30:%.*]]
7509 // CHECK8: omp.inner.for.body24:
7510 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
7511 // CHECK8-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
7512 // CHECK8-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
7513 // CHECK8-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group !15
7514 // CHECK8-NEXT: call void @_Z3fn6v(), !llvm.access.group !15
7515 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
7516 // CHECK8: omp.body.continue27:
7517 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
7518 // CHECK8: omp.inner.for.inc28:
7519 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
7520 // CHECK8-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
7521 // CHECK8-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !15
7522 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP16:![0-9]+]]
7523 // CHECK8: omp.inner.for.end30:
7524 // CHECK8-NEXT: br label [[OMP_IF_END:%.*]]
7525 // CHECK8: omp_if.else:
7526 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
7527 // CHECK8: omp.inner.for.cond31:
7528 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
7529 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4
7530 // CHECK8-NEXT: [[CMP32:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
7531 // CHECK8-NEXT: br i1 [[CMP32]], label [[OMP_INNER_FOR_BODY33:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
7532 // CHECK8: omp.inner.for.body33:
7533 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
7534 // CHECK8-NEXT: [[MUL34:%.*]] = mul nsw i32 [[TMP19]], 1
7535 // CHECK8-NEXT: [[ADD35:%.*]] = add nsw i32 0, [[MUL34]]
7536 // CHECK8-NEXT: store i32 [[ADD35]], i32* [[I20]], align 4
7537 // CHECK8-NEXT: call void @_Z3fn6v()
7538 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
7539 // CHECK8: omp.body.continue36:
7540 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
7541 // CHECK8: omp.inner.for.inc37:
7542 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
7543 // CHECK8-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP20]], 1
7544 // CHECK8-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV19]], align 4
7545 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND31]], !llvm.loop [[LOOP18:![0-9]+]]
7546 // CHECK8: omp.inner.for.end39:
7547 // CHECK8-NEXT: br label [[OMP_IF_END]]
7548 // CHECK8: omp_if.end:
7549 // CHECK8-NEXT: store i32 100, i32* [[I20]], align 4
7550 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* @Arg, align 4
7551 // CHECK8-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP21]])
7552 // CHECK8-NEXT: ret i32 [[CALL]]
7553 //
7554 //
7555 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
7556 // CHECK8-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
7557 // CHECK8-NEXT: entry:
7558 // CHECK8-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
7559 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7560 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7561 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7562 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7563 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
7564 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7565 // CHECK8-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7566 // CHECK8-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7567 // CHECK8-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7568 // CHECK8-NEXT: [[I6:%.*]] = alloca i32, align 4
7569 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7570 // CHECK8-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7571 // CHECK8-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7572 // CHECK8-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7573 // CHECK8-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7574 // CHECK8-NEXT: [[I20:%.*]] = alloca i32, align 4
7575 // CHECK8-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
7576 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7577 // CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7578 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7579 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7580 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7581 // CHECK8: omp.inner.for.cond:
7582 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
7583 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
7584 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7585 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7586 // CHECK8: omp.inner.for.body:
7587 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
7588 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7589 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7590 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !19
7591 // CHECK8-NEXT: call void @_Z3fn1v(), !llvm.access.group !19
7592 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7593 // CHECK8: omp.body.continue:
7594 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7595 // CHECK8: omp.inner.for.inc:
7596 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
7597 // CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7598 // CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
7599 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
7600 // CHECK8: omp.inner.for.end:
7601 // CHECK8-NEXT: store i32 100, i32* [[I]], align 4
7602 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7603 // CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7604 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7605 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7606 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7607 // CHECK8: omp.inner.for.cond7:
7608 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7609 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
7610 // CHECK8-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7611 // CHECK8-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7612 // CHECK8: omp.inner.for.body9:
7613 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7614 // CHECK8-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7615 // CHECK8-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7616 // CHECK8-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
7617 // CHECK8-NEXT: call void @_Z3fn2v()
7618 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7619 // CHECK8: omp.body.continue12:
7620 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7621 // CHECK8: omp.inner.for.inc13:
7622 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7623 // CHECK8-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7624 // CHECK8-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
7625 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
7626 // CHECK8: omp.inner.for.end15:
7627 // CHECK8-NEXT: store i32 100, i32* [[I6]], align 4
7628 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
7629 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7630 // CHECK8-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7631 // CHECK8-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7632 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7633 // CHECK8-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7634 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7635 // CHECK8-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
7636 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
7637 // CHECK8: omp.inner.for.cond21:
7638 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !23
7639 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !23
7640 // CHECK8-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
7641 // CHECK8-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7642 // CHECK8: omp.inner.for.body23:
7643 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !23
7644 // CHECK8-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
7645 // CHECK8-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7646 // CHECK8-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !23
7647 // CHECK8-NEXT: call void @_Z3fn3v(), !llvm.access.group !23
7648 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
7649 // CHECK8: omp.body.continue26:
7650 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
7651 // CHECK8: omp.inner.for.inc27:
7652 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !23
7653 // CHECK8-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
7654 // CHECK8-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !23
7655 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP24:![0-9]+]]
7656 // CHECK8: omp.inner.for.end29:
7657 // CHECK8-NEXT: store i32 100, i32* [[I20]], align 4
7658 // CHECK8-NEXT: ret i32 0
7659 //
7660 //
7661 // CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv
7662 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
7663 // CHECK9-NEXT: entry:
7664 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
7665 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
7666 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
7667 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
7668 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
7669 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
7670 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* @Arg, align 4
7671 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
7672 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
7673 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
7674 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7675 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
7676 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
7677 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7678 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
7679 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
7680 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7681 // CHECK9-NEXT: store i8* null, i8** [[TMP6]], align 8
7682 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7683 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7684 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
7685 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7686 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
7687 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7688 // CHECK9: omp_offload.failed:
7689 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
7690 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
7691 // CHECK9: omp_offload.cont:
7692 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7693 // CHECK9-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
7694 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7695 // CHECK9-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
7696 // CHECK9: omp_offload.failed2:
7697 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]]
7698 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]]
7699 // CHECK9: omp_offload.cont3:
7700 // CHECK9-NEXT: ret void
7701 //
7702 //
7703 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
7704 // CHECK9-SAME: (i64 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
7705 // CHECK9-NEXT: entry:
7706 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
7707 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
7708 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
7709 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
7710 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
7711 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
7712 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
7713 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
7714 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]])
7715 // CHECK9-NEXT: ret void
7716 //
7717 //
7718 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
7719 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
7720 // CHECK9-NEXT: entry:
7721 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7722 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7723 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
7724 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7725 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
7726 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7727 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7728 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7729 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7730 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
7731 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
7732 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7733 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7734 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
7735 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
7736 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7737 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7738 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7739 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7740 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7741 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7742 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7743 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7744 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7745 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7746 // CHECK9: cond.true:
7747 // CHECK9-NEXT: br label [[COND_END:%.*]]
7748 // CHECK9: cond.false:
7749 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7750 // CHECK9-NEXT: br label [[COND_END]]
7751 // CHECK9: cond.end:
7752 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7753 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7754 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7755 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7756 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7757 // CHECK9: omp.inner.for.cond:
7758 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7759 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
7760 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7761 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7762 // CHECK9: omp.inner.for.body:
7763 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
7764 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7765 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
7766 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7767 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !13
7768 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
7769 // CHECK9-NEXT: store i32 [[TMP11]], i32* [[CONV2]], align 4, !llvm.access.group !13
7770 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[ARG_CASTED]], align 8, !llvm.access.group !13
7771 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group !13
7772 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7773 // CHECK9: omp.inner.for.inc:
7774 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7775 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
7776 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
7777 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7778 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
7779 // CHECK9: omp.inner.for.end:
7780 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7781 // CHECK9: omp.loop.exit:
7782 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7783 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7784 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
7785 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7786 // CHECK9: .omp.final.then:
7787 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
7788 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
7789 // CHECK9: .omp.final.done:
7790 // CHECK9-NEXT: ret void
7791 //
7792 //
7793 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
7794 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
7795 // CHECK9-NEXT: entry:
7796 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7797 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7798 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7799 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7800 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
7801 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7802 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
7803 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7804 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7805 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7806 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7807 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
7808 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7809 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7810 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7811 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7812 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
7813 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
7814 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7815 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7816 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7817 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
7818 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7819 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
7820 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
7821 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
7822 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7823 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7824 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7825 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7826 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7827 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7828 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7829 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7830 // CHECK9: cond.true:
7831 // CHECK9-NEXT: br label [[COND_END:%.*]]
7832 // CHECK9: cond.false:
7833 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7834 // CHECK9-NEXT: br label [[COND_END]]
7835 // CHECK9: cond.end:
7836 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7837 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7838 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7839 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7840 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7841 // CHECK9: omp.inner.for.cond:
7842 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
7843 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
7844 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7845 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7846 // CHECK9: omp.inner.for.body:
7847 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
7848 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7849 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7850 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17
7851 // CHECK9-NEXT: store i32 0, i32* [[CONV]], align 8, !llvm.access.group !17
7852 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7853 // CHECK9: omp.body.continue:
7854 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7855 // CHECK9: omp.inner.for.inc:
7856 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
7857 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
7858 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
7859 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
7860 // CHECK9: omp.inner.for.end:
7861 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7862 // CHECK9: omp.loop.exit:
7863 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7864 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7865 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7866 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7867 // CHECK9: .omp.final.then:
7868 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
7869 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
7870 // CHECK9: .omp.final.done:
7871 // CHECK9-NEXT: ret void
7872 //
7873 //
7874 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53
7875 // CHECK9-SAME: () #[[ATTR1]] {
7876 // CHECK9-NEXT: entry:
7877 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
7878 // CHECK9-NEXT: ret void
7879 //
7880 //
7881 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
7882 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7883 // CHECK9-NEXT: entry:
7884 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7885 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7886 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7887 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
7888 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7889 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7890 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7891 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7892 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
7893 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7894 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
7895 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7896 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7897 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7898 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7899 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7900 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7901 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7902 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7903 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7904 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7905 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7906 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7907 // CHECK9: cond.true:
7908 // CHECK9-NEXT: br label [[COND_END:%.*]]
7909 // CHECK9: cond.false:
7910 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7911 // CHECK9-NEXT: br label [[COND_END]]
7912 // CHECK9: cond.end:
7913 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7914 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7915 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7916 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7917 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7918 // CHECK9: omp.inner.for.cond:
7919 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
7920 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
7921 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7922 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7923 // CHECK9: omp.inner.for.body:
7924 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22
7925 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7926 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
7927 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7928 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !22
7929 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !22
7930 // CHECK9-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !22
7931 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !22
7932 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7933 // CHECK9: omp.inner.for.inc:
7934 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
7935 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
7936 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7937 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
7938 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
7939 // CHECK9: omp.inner.for.end:
7940 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7941 // CHECK9: omp.loop.exit:
7942 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7943 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7944 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7945 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7946 // CHECK9: .omp.final.then:
7947 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
7948 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
7949 // CHECK9: .omp.final.done:
7950 // CHECK9-NEXT: ret void
7951 //
7952 //
7953 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
7954 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7955 // CHECK9-NEXT: entry:
7956 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7957 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7958 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7959 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7960 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7961 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
7962 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7963 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7964 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7965 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7966 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
7967 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7968 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7969 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7970 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7971 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7972 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7973 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7974 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7975 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7976 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7977 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7978 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7979 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7980 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7981 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7982 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7983 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7984 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7985 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7986 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7987 // CHECK9: cond.true:
7988 // CHECK9-NEXT: br label [[COND_END:%.*]]
7989 // CHECK9: cond.false:
7990 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7991 // CHECK9-NEXT: br label [[COND_END]]
7992 // CHECK9: cond.end:
7993 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7994 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7995 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7996 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7997 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7998 // CHECK9: omp.inner.for.cond:
7999 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
8000 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
8001 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8002 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8003 // CHECK9: omp.inner.for.body:
8004 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
8005 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8006 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8007 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
8008 // CHECK9-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !25
8009 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8010 // CHECK9: omp.body.continue:
8011 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8012 // CHECK9: omp.inner.for.inc:
8013 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
8014 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8015 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
8016 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
8017 // CHECK9: omp.inner.for.end:
8018 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8019 // CHECK9: omp.loop.exit:
8020 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8021 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8022 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
8023 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8024 // CHECK9: .omp.final.then:
8025 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
8026 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
8027 // CHECK9: .omp.final.done:
8028 // CHECK9-NEXT: ret void
8029 //
8030 //
8031 // CHECK9-LABEL: define {{[^@]+}}@main
8032 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
8033 // CHECK9-NEXT: entry:
8034 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
8035 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
8036 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8037 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8038 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
8039 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
8040 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
8041 // CHECK9-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
8042 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
8043 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
8044 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
8045 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
8046 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8047 // CHECK9: omp_offload.failed:
8048 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]]
8049 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
8050 // CHECK9: omp_offload.cont:
8051 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]]
8052 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* @Arg, align 4
8053 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
8054 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8055 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
8056 // CHECK9-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
8057 // CHECK9-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
8058 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
8059 // CHECK9-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
8060 // CHECK9-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
8061 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8062 // CHECK9-NEXT: [[TMP5:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
8063 // CHECK9-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP5]] to i1
8064 // CHECK9-NEXT: br i1 [[TOBOOL3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
8065 // CHECK9: omp_if.then:
8066 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8067 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
8068 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
8069 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8070 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
8071 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
8072 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
8073 // CHECK9-NEXT: store i8* null, i8** [[TMP10]], align 8
8074 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8075 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8076 // CHECK9-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
8077 // CHECK9-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP13]] to i1
8078 // CHECK9-NEXT: [[TMP14:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
8079 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
8080 // CHECK9-NEXT: [[TMP15:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.10, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.11, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP14]])
8081 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
8082 // CHECK9-NEXT: br i1 [[TMP16]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
8083 // CHECK9: omp_offload.failed6:
8084 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
8085 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT7]]
8086 // CHECK9: omp_offload.cont7:
8087 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]]
8088 // CHECK9: omp_if.else:
8089 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
8090 // CHECK9-NEXT: br label [[OMP_IF_END]]
8091 // CHECK9: omp_if.end:
8092 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* @Arg, align 4
8093 // CHECK9-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP17]])
8094 // CHECK9-NEXT: ret i32 [[CALL]]
8095 //
8096 //
8097 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78
8098 // CHECK9-SAME: () #[[ATTR1]] {
8099 // CHECK9-NEXT: entry:
8100 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
8101 // CHECK9-NEXT: ret void
8102 //
8103 //
8104 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
8105 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8106 // CHECK9-NEXT: entry:
8107 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8108 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8109 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8110 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
8111 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8112 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8113 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8114 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8115 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
8116 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8117 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8118 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8119 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8120 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8121 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8122 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8123 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8124 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8125 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8126 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8127 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8128 // CHECK9: cond.true:
8129 // CHECK9-NEXT: br label [[COND_END:%.*]]
8130 // CHECK9: cond.false:
8131 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8132 // CHECK9-NEXT: br label [[COND_END]]
8133 // CHECK9: cond.end:
8134 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8135 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8136 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8137 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8138 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8139 // CHECK9: omp.inner.for.cond:
8140 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
8141 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
8142 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8143 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8144 // CHECK9: omp.inner.for.body:
8145 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
8146 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8147 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
8148 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8149 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !28
8150 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8151 // CHECK9: omp.inner.for.inc:
8152 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
8153 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
8154 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
8155 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
8156 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
8157 // CHECK9: omp.inner.for.end:
8158 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8159 // CHECK9: omp.loop.exit:
8160 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8161 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8162 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
8163 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8164 // CHECK9: .omp.final.then:
8165 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
8166 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
8167 // CHECK9: .omp.final.done:
8168 // CHECK9-NEXT: ret void
8169 //
8170 //
8171 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
8172 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8173 // CHECK9-NEXT: entry:
8174 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8175 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8176 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8177 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8178 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8179 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
8180 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8181 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8182 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8183 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8184 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
8185 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8186 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8187 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8188 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8189 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8190 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8191 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8192 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8193 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8194 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8195 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8196 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8197 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8198 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8199 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8200 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8201 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8202 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8203 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8204 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8205 // CHECK9: cond.true:
8206 // CHECK9-NEXT: br label [[COND_END:%.*]]
8207 // CHECK9: cond.false:
8208 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8209 // CHECK9-NEXT: br label [[COND_END]]
8210 // CHECK9: cond.end:
8211 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8212 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8213 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8214 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8215 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8216 // CHECK9: omp.inner.for.cond:
8217 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
8218 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31
8219 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8220 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8221 // CHECK9: omp.inner.for.body:
8222 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
8223 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8224 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8225 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !31
8226 // CHECK9-NEXT: call void @_Z3fn4v(), !llvm.access.group !31
8227 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8228 // CHECK9: omp.body.continue:
8229 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8230 // CHECK9: omp.inner.for.inc:
8231 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
8232 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8233 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
8234 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
8235 // CHECK9: omp.inner.for.end:
8236 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8237 // CHECK9: omp.loop.exit:
8238 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8239 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8240 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
8241 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8242 // CHECK9: .omp.final.then:
8243 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
8244 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
8245 // CHECK9: .omp.final.done:
8246 // CHECK9-NEXT: ret void
8247 //
8248 //
8249 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85
8250 // CHECK9-SAME: () #[[ATTR1]] {
8251 // CHECK9-NEXT: entry:
8252 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
8253 // CHECK9-NEXT: ret void
8254 //
8255 //
8256 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6
8257 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8258 // CHECK9-NEXT: entry:
8259 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8260 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8261 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8262 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
8263 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8264 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8265 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8266 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8267 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
8268 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
8269 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
8270 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8271 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8272 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8273 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8274 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8275 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8276 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8277 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8278 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8279 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8280 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8281 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8282 // CHECK9: cond.true:
8283 // CHECK9-NEXT: br label [[COND_END:%.*]]
8284 // CHECK9: cond.false:
8285 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8286 // CHECK9-NEXT: br label [[COND_END]]
8287 // CHECK9: cond.end:
8288 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8289 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8290 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8291 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8292 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8293 // CHECK9: omp.inner.for.cond:
8294 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
8295 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
8296 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8297 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8298 // CHECK9: omp.inner.for.body:
8299 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
8300 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8301 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
8302 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8303 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !34
8304 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !34
8305 // CHECK9-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !34
8306 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !34
8307 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8308 // CHECK9: omp.inner.for.inc:
8309 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
8310 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
8311 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
8312 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
8313 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
8314 // CHECK9: omp.inner.for.end:
8315 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8316 // CHECK9: omp.loop.exit:
8317 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8318 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8319 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
8320 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8321 // CHECK9: .omp.final.then:
8322 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
8323 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
8324 // CHECK9: .omp.final.done:
8325 // CHECK9-NEXT: ret void
8326 //
8327 //
8328 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
8329 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8330 // CHECK9-NEXT: entry:
8331 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8332 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8333 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8334 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8335 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8336 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
8337 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8338 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8339 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8340 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8341 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
8342 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8343 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8344 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8345 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8346 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8347 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8348 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8349 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8350 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8351 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8352 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8353 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8354 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8355 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8356 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8357 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8358 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8359 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8360 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8361 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8362 // CHECK9: cond.true:
8363 // CHECK9-NEXT: br label [[COND_END:%.*]]
8364 // CHECK9: cond.false:
8365 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8366 // CHECK9-NEXT: br label [[COND_END]]
8367 // CHECK9: cond.end:
8368 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8369 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8370 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8371 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8372 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8373 // CHECK9: omp.inner.for.cond:
8374 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
8375 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37
8376 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8377 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8378 // CHECK9: omp.inner.for.body:
8379 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
8380 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8381 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8382 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !37
8383 // CHECK9-NEXT: call void @_Z3fn5v(), !llvm.access.group !37
8384 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8385 // CHECK9: omp.body.continue:
8386 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8387 // CHECK9: omp.inner.for.inc:
8388 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
8389 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8390 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
8391 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
8392 // CHECK9: omp.inner.for.end:
8393 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8394 // CHECK9: omp.loop.exit:
8395 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8396 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8397 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
8398 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8399 // CHECK9: .omp.final.then:
8400 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
8401 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
8402 // CHECK9: .omp.final.done:
8403 // CHECK9-NEXT: ret void
8404 //
8405 //
8406 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
8407 // CHECK9-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
8408 // CHECK9-NEXT: entry:
8409 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8410 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8411 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8412 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
8413 // CHECK9-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
8414 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
8415 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
8416 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8417 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
8418 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8419 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP1]])
8420 // CHECK9-NEXT: ret void
8421 //
8422 //
8423 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8
8424 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
8425 // CHECK9-NEXT: entry:
8426 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8427 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8428 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8429 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8430 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
8431 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8432 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8433 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8434 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8435 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
8436 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
8437 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
8438 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8439 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8440 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8441 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
8442 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8443 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8444 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8445 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8446 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8447 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8448 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8449 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8450 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8451 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8452 // CHECK9: cond.true:
8453 // CHECK9-NEXT: br label [[COND_END:%.*]]
8454 // CHECK9: cond.false:
8455 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8456 // CHECK9-NEXT: br label [[COND_END]]
8457 // CHECK9: cond.end:
8458 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8459 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8460 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8461 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8462 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8463 // CHECK9: omp.inner.for.cond:
8464 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
8465 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
8466 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8467 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8468 // CHECK9: omp.inner.for.body:
8469 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40
8470 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8471 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
8472 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8473 // CHECK9-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !40
8474 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
8475 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
8476 // CHECK9: omp_if.then:
8477 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !40
8478 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]]
8479 // CHECK9: omp_if.else:
8480 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !40
8481 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !40
8482 // CHECK9-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !40
8483 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !40
8484 // CHECK9-NEXT: br label [[OMP_IF_END]]
8485 // CHECK9: omp_if.end:
8486 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8487 // CHECK9: omp.inner.for.inc:
8488 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
8489 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40
8490 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
8491 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
8492 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]]
8493 // CHECK9: omp.inner.for.end:
8494 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8495 // CHECK9: omp.loop.exit:
8496 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8497 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8498 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
8499 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8500 // CHECK9: .omp.final.then:
8501 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
8502 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
8503 // CHECK9: .omp.final.done:
8504 // CHECK9-NEXT: ret void
8505 //
8506 //
8507 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9
8508 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8509 // CHECK9-NEXT: entry:
8510 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8511 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8512 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8513 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8514 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8515 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
8516 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8517 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8518 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8519 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8520 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
8521 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8522 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8523 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8524 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8525 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8526 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8527 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8528 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8529 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8530 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8531 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8532 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8533 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8534 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8535 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8536 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8537 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8538 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8539 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8540 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8541 // CHECK9: cond.true:
8542 // CHECK9-NEXT: br label [[COND_END:%.*]]
8543 // CHECK9: cond.false:
8544 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8545 // CHECK9-NEXT: br label [[COND_END]]
8546 // CHECK9: cond.end:
8547 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8548 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8549 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8550 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8551 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8552 // CHECK9: omp.inner.for.cond:
8553 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
8554 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43
8555 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8556 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8557 // CHECK9: omp.inner.for.body:
8558 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
8559 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8560 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8561 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !43
8562 // CHECK9-NEXT: call void @_Z3fn6v(), !llvm.access.group !43
8563 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8564 // CHECK9: omp.body.continue:
8565 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8566 // CHECK9: omp.inner.for.inc:
8567 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
8568 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8569 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
8570 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
8571 // CHECK9: omp.inner.for.end:
8572 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8573 // CHECK9: omp.loop.exit:
8574 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8575 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8576 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
8577 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8578 // CHECK9: .omp.final.then:
8579 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
8580 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
8581 // CHECK9: .omp.final.done:
8582 // CHECK9-NEXT: ret void
8583 //
8584 //
8585 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
8586 // CHECK9-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
8587 // CHECK9-NEXT: entry:
8588 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
8589 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
8590 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8591 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8592 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
8593 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
8594 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
8595 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
8596 // CHECK9-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
8597 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
8598 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
8599 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
8600 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8601 // CHECK9: omp_offload.failed:
8602 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
8603 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
8604 // CHECK9: omp_offload.cont:
8605 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]]
8606 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
8607 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
8608 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8609 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
8610 // CHECK9-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
8611 // CHECK9-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
8612 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
8613 // CHECK9-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
8614 // CHECK9-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
8615 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8616 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8617 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
8618 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP6]], align 8
8619 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8620 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
8621 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
8622 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
8623 // CHECK9-NEXT: store i8* null, i8** [[TMP9]], align 8
8624 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8625 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8626 // CHECK9-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
8627 // CHECK9-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP12]] to i1
8628 // CHECK9-NEXT: [[TMP13:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
8629 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
8630 // CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, i32 1, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.18, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.19, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP13]])
8631 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
8632 // CHECK9-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
8633 // CHECK9: omp_offload.failed5:
8634 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP4]]) #[[ATTR2]]
8635 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]]
8636 // CHECK9: omp_offload.cont6:
8637 // CHECK9-NEXT: ret i32 0
8638 //
8639 //
8640 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
8641 // CHECK9-SAME: () #[[ATTR1]] {
8642 // CHECK9-NEXT: entry:
8643 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
8644 // CHECK9-NEXT: ret void
8645 //
8646 //
8647 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..12
8648 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8649 // CHECK9-NEXT: entry:
8650 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8651 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8652 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8653 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
8654 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8655 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8656 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8657 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8658 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
8659 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8660 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8661 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8662 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8663 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8664 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8665 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8666 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8667 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8668 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8669 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8670 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8671 // CHECK9: cond.true:
8672 // CHECK9-NEXT: br label [[COND_END:%.*]]
8673 // CHECK9: cond.false:
8674 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8675 // CHECK9-NEXT: br label [[COND_END]]
8676 // CHECK9: cond.end:
8677 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8678 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8679 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8680 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8681 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8682 // CHECK9: omp.inner.for.cond:
8683 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
8684 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
8685 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8686 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8687 // CHECK9: omp.inner.for.body:
8688 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
8689 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8690 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
8691 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8692 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !46
8693 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8694 // CHECK9: omp.inner.for.inc:
8695 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
8696 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
8697 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
8698 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
8699 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
8700 // CHECK9: omp.inner.for.end:
8701 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8702 // CHECK9: omp.loop.exit:
8703 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8704 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8705 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
8706 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8707 // CHECK9: .omp.final.then:
8708 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
8709 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
8710 // CHECK9: .omp.final.done:
8711 // CHECK9-NEXT: ret void
8712 //
8713 //
8714 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13
8715 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8716 // CHECK9-NEXT: entry:
8717 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8718 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8719 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8720 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8721 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8722 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
8723 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8724 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8725 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8726 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8727 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
8728 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8729 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8730 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8731 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8732 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8733 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8734 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8735 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8736 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8737 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8738 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8739 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8740 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8741 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8742 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8743 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8744 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8745 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8746 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8747 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8748 // CHECK9: cond.true:
8749 // CHECK9-NEXT: br label [[COND_END:%.*]]
8750 // CHECK9: cond.false:
8751 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8752 // CHECK9-NEXT: br label [[COND_END]]
8753 // CHECK9: cond.end:
8754 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8755 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8756 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8757 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8758 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8759 // CHECK9: omp.inner.for.cond:
8760 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
8761 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
8762 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8763 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8764 // CHECK9: omp.inner.for.body:
8765 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
8766 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8767 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8768 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
8769 // CHECK9-NEXT: call void @_Z3fn1v(), !llvm.access.group !49
8770 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8771 // CHECK9: omp.body.continue:
8772 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8773 // CHECK9: omp.inner.for.inc:
8774 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
8775 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8776 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
8777 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
8778 // CHECK9: omp.inner.for.end:
8779 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8780 // CHECK9: omp.loop.exit:
8781 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8782 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8783 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
8784 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8785 // CHECK9: .omp.final.then:
8786 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
8787 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
8788 // CHECK9: .omp.final.done:
8789 // CHECK9-NEXT: ret void
8790 //
8791 //
8792 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66
8793 // CHECK9-SAME: () #[[ATTR1]] {
8794 // CHECK9-NEXT: entry:
8795 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*))
8796 // CHECK9-NEXT: ret void
8797 //
8798 //
8799 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..14
8800 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8801 // CHECK9-NEXT: entry:
8802 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8803 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8804 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8805 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
8806 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8807 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8808 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8809 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8810 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
8811 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
8812 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
8813 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8814 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8815 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8816 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8817 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8818 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8819 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8820 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8821 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8822 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8823 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8824 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8825 // CHECK9: cond.true:
8826 // CHECK9-NEXT: br label [[COND_END:%.*]]
8827 // CHECK9: cond.false:
8828 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8829 // CHECK9-NEXT: br label [[COND_END]]
8830 // CHECK9: cond.end:
8831 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8832 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8833 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8834 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8835 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8836 // CHECK9: omp.inner.for.cond:
8837 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
8838 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
8839 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8840 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8841 // CHECK9: omp.inner.for.body:
8842 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !52
8843 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8844 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
8845 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8846 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !52
8847 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !52
8848 // CHECK9-NEXT: call void @.omp_outlined..15(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !52
8849 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !52
8850 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8851 // CHECK9: omp.inner.for.inc:
8852 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
8853 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !52
8854 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
8855 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
8856 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
8857 // CHECK9: omp.inner.for.end:
8858 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8859 // CHECK9: omp.loop.exit:
8860 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8861 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8862 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
8863 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8864 // CHECK9: .omp.final.then:
8865 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
8866 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
8867 // CHECK9: .omp.final.done:
8868 // CHECK9-NEXT: ret void
8869 //
8870 //
8871 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..15
8872 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8873 // CHECK9-NEXT: entry:
8874 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8875 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8876 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8877 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8878 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8879 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
8880 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8881 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8882 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8883 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8884 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
8885 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8886 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8887 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8888 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8889 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8890 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8891 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8892 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8893 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8894 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8895 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8896 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8897 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8898 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8899 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8900 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8901 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8902 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8903 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8904 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8905 // CHECK9: cond.true:
8906 // CHECK9-NEXT: br label [[COND_END:%.*]]
8907 // CHECK9: cond.false:
8908 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8909 // CHECK9-NEXT: br label [[COND_END]]
8910 // CHECK9: cond.end:
8911 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8912 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8913 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8914 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8915 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8916 // CHECK9: omp.inner.for.cond:
8917 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
8918 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !55
8919 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8920 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8921 // CHECK9: omp.inner.for.body:
8922 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
8923 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8924 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8925 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !55
8926 // CHECK9-NEXT: call void @_Z3fn2v(), !llvm.access.group !55
8927 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8928 // CHECK9: omp.body.continue:
8929 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8930 // CHECK9: omp.inner.for.inc:
8931 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
8932 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8933 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
8934 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
8935 // CHECK9: omp.inner.for.end:
8936 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8937 // CHECK9: omp.loop.exit:
8938 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8939 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8940 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
8941 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8942 // CHECK9: .omp.final.then:
8943 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
8944 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
8945 // CHECK9: .omp.final.done:
8946 // CHECK9-NEXT: ret void
8947 //
8948 //
8949 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70
8950 // CHECK9-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
8951 // CHECK9-NEXT: entry:
8952 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8953 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8954 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8955 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
8956 // CHECK9-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
8957 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
8958 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
8959 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8960 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
8961 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8962 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP1]])
8963 // CHECK9-NEXT: ret void
8964 //
8965 //
8966 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..16
8967 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
8968 // CHECK9-NEXT: entry:
8969 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8970 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8971 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8972 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8973 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
8974 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8975 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8976 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8977 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8978 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
8979 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
8980 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
8981 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8982 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8983 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8984 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
8985 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8986 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8987 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8988 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8989 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8990 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8991 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8992 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8993 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8994 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8995 // CHECK9: cond.true:
8996 // CHECK9-NEXT: br label [[COND_END:%.*]]
8997 // CHECK9: cond.false:
8998 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8999 // CHECK9-NEXT: br label [[COND_END]]
9000 // CHECK9: cond.end:
9001 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9002 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9003 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9004 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9005 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9006 // CHECK9: omp.inner.for.cond:
9007 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
9008 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
9009 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9010 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9011 // CHECK9: omp.inner.for.body:
9012 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !58
9013 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9014 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
9015 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9016 // CHECK9-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !58
9017 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
9018 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
9019 // CHECK9: omp_if.then:
9020 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..17 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !58
9021 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]]
9022 // CHECK9: omp_if.else:
9023 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !58
9024 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !58
9025 // CHECK9-NEXT: call void @.omp_outlined..17(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !58
9026 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !58
9027 // CHECK9-NEXT: br label [[OMP_IF_END]]
9028 // CHECK9: omp_if.end:
9029 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9030 // CHECK9: omp.inner.for.inc:
9031 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
9032 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !58
9033 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
9034 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
9035 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
9036 // CHECK9: omp.inner.for.end:
9037 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9038 // CHECK9: omp.loop.exit:
9039 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9040 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9041 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
9042 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9043 // CHECK9: .omp.final.then:
9044 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
9045 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
9046 // CHECK9: .omp.final.done:
9047 // CHECK9-NEXT: ret void
9048 //
9049 //
9050 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..17
9051 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9052 // CHECK9-NEXT: entry:
9053 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9054 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9055 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9056 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9057 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9058 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
9059 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9060 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9061 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9062 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9063 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
9064 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9065 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9066 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9067 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9068 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9069 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
9070 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9071 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9072 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9073 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9074 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9075 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9076 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9077 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9078 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9079 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9080 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9081 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9082 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9083 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9084 // CHECK9: cond.true:
9085 // CHECK9-NEXT: br label [[COND_END:%.*]]
9086 // CHECK9: cond.false:
9087 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9088 // CHECK9-NEXT: br label [[COND_END]]
9089 // CHECK9: cond.end:
9090 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9091 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9092 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9093 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9094 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9095 // CHECK9: omp.inner.for.cond:
9096 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
9097 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61
9098 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9099 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9100 // CHECK9: omp.inner.for.body:
9101 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
9102 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9103 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9104 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !61
9105 // CHECK9-NEXT: call void @_Z3fn3v(), !llvm.access.group !61
9106 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9107 // CHECK9: omp.body.continue:
9108 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9109 // CHECK9: omp.inner.for.inc:
9110 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
9111 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9112 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
9113 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]]
9114 // CHECK9: omp.inner.for.end:
9115 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9116 // CHECK9: omp.loop.exit:
9117 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9118 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9119 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
9120 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9121 // CHECK9: .omp.final.then:
9122 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
9123 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
9124 // CHECK9: .omp.final.done:
9125 // CHECK9-NEXT: ret void
9126 //
9127 //
9128 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
9129 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] {
9130 // CHECK9-NEXT: entry:
9131 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
9132 // CHECK9-NEXT: ret void
9133 //
9134 //
9135 // CHECK10-LABEL: define {{[^@]+}}@_Z9gtid_testv
9136 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
9137 // CHECK10-NEXT: entry:
9138 // CHECK10-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
9139 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
9140 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
9141 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
9142 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
9143 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
9144 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* @Arg, align 4
9145 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
9146 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
9147 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
9148 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9149 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
9150 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
9151 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9152 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
9153 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
9154 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
9155 // CHECK10-NEXT: store i8* null, i8** [[TMP6]], align 8
9156 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9157 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9158 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
9159 // CHECK10-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9160 // CHECK10-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
9161 // CHECK10-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9162 // CHECK10: omp_offload.failed:
9163 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
9164 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
9165 // CHECK10: omp_offload.cont:
9166 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9167 // CHECK10-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
9168 // CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
9169 // CHECK10-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
9170 // CHECK10: omp_offload.failed2:
9171 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]]
9172 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT3]]
9173 // CHECK10: omp_offload.cont3:
9174 // CHECK10-NEXT: ret void
9175 //
9176 //
9177 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
9178 // CHECK10-SAME: (i64 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
9179 // CHECK10-NEXT: entry:
9180 // CHECK10-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
9181 // CHECK10-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
9182 // CHECK10-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
9183 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
9184 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
9185 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
9186 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
9187 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
9188 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]])
9189 // CHECK10-NEXT: ret void
9190 //
9191 //
9192 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
9193 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
9194 // CHECK10-NEXT: entry:
9195 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9196 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9197 // CHECK10-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
9198 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9199 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
9200 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9201 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9202 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9203 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9204 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
9205 // CHECK10-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
9206 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9207 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9208 // CHECK10-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
9209 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
9210 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9211 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9212 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9213 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9214 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9215 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9216 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9217 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9218 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9219 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9220 // CHECK10: cond.true:
9221 // CHECK10-NEXT: br label [[COND_END:%.*]]
9222 // CHECK10: cond.false:
9223 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9224 // CHECK10-NEXT: br label [[COND_END]]
9225 // CHECK10: cond.end:
9226 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9227 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9228 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9229 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9230 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9231 // CHECK10: omp.inner.for.cond:
9232 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
9233 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
9234 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9235 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9236 // CHECK10: omp.inner.for.body:
9237 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
9238 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9239 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
9240 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9241 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !13
9242 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
9243 // CHECK10-NEXT: store i32 [[TMP11]], i32* [[CONV2]], align 4, !llvm.access.group !13
9244 // CHECK10-NEXT: [[TMP12:%.*]] = load i64, i64* [[ARG_CASTED]], align 8, !llvm.access.group !13
9245 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group !13
9246 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9247 // CHECK10: omp.inner.for.inc:
9248 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
9249 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
9250 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
9251 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
9252 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
9253 // CHECK10: omp.inner.for.end:
9254 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9255 // CHECK10: omp.loop.exit:
9256 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9257 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9258 // CHECK10-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
9259 // CHECK10-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9260 // CHECK10: .omp.final.then:
9261 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
9262 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
9263 // CHECK10: .omp.final.done:
9264 // CHECK10-NEXT: ret void
9265 //
9266 //
9267 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
9268 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
9269 // CHECK10-NEXT: entry:
9270 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9271 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9272 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9273 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9274 // CHECK10-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
9275 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9276 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
9277 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9278 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9279 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9280 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9281 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
9282 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9283 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9284 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9285 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9286 // CHECK10-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
9287 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
9288 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9289 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
9290 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9291 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
9292 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9293 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
9294 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
9295 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
9296 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9297 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9298 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9299 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9300 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9301 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9302 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9303 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9304 // CHECK10: cond.true:
9305 // CHECK10-NEXT: br label [[COND_END:%.*]]
9306 // CHECK10: cond.false:
9307 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9308 // CHECK10-NEXT: br label [[COND_END]]
9309 // CHECK10: cond.end:
9310 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9311 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9312 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9313 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9314 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9315 // CHECK10: omp.inner.for.cond:
9316 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9317 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
9318 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9319 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9320 // CHECK10: omp.inner.for.body:
9321 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9322 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9323 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9324 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17
9325 // CHECK10-NEXT: store i32 0, i32* [[CONV]], align 8, !llvm.access.group !17
9326 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9327 // CHECK10: omp.body.continue:
9328 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9329 // CHECK10: omp.inner.for.inc:
9330 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9331 // CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
9332 // CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9333 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
9334 // CHECK10: omp.inner.for.end:
9335 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9336 // CHECK10: omp.loop.exit:
9337 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9338 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9339 // CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
9340 // CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9341 // CHECK10: .omp.final.then:
9342 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
9343 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
9344 // CHECK10: .omp.final.done:
9345 // CHECK10-NEXT: ret void
9346 //
9347 //
9348 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53
9349 // CHECK10-SAME: () #[[ATTR1]] {
9350 // CHECK10-NEXT: entry:
9351 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
9352 // CHECK10-NEXT: ret void
9353 //
9354 //
9355 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
9356 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9357 // CHECK10-NEXT: entry:
9358 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9359 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9360 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9361 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
9362 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9363 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9364 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9365 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9366 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
9367 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
9368 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
9369 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9370 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9371 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9372 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9373 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9374 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9375 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9376 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9377 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9378 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9379 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9380 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9381 // CHECK10: cond.true:
9382 // CHECK10-NEXT: br label [[COND_END:%.*]]
9383 // CHECK10: cond.false:
9384 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9385 // CHECK10-NEXT: br label [[COND_END]]
9386 // CHECK10: cond.end:
9387 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9388 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9389 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9390 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9391 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9392 // CHECK10: omp.inner.for.cond:
9393 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9394 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
9395 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9396 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9397 // CHECK10: omp.inner.for.body:
9398 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22
9399 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9400 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
9401 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9402 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !22
9403 // CHECK10-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !22
9404 // CHECK10-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !22
9405 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !22
9406 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9407 // CHECK10: omp.inner.for.inc:
9408 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9409 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
9410 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9411 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9412 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
9413 // CHECK10: omp.inner.for.end:
9414 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9415 // CHECK10: omp.loop.exit:
9416 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9417 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9418 // CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
9419 // CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9420 // CHECK10: .omp.final.then:
9421 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
9422 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
9423 // CHECK10: .omp.final.done:
9424 // CHECK10-NEXT: ret void
9425 //
9426 //
9427 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
9428 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9429 // CHECK10-NEXT: entry:
9430 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9431 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9432 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9433 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9434 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9435 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
9436 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9437 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9438 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9439 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9440 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
9441 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9442 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9443 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9444 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9445 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9446 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
9447 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9448 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9449 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9450 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9451 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9452 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9453 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9454 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9455 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9456 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9457 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9458 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9459 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9460 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9461 // CHECK10: cond.true:
9462 // CHECK10-NEXT: br label [[COND_END:%.*]]
9463 // CHECK10: cond.false:
9464 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9465 // CHECK10-NEXT: br label [[COND_END]]
9466 // CHECK10: cond.end:
9467 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9468 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9469 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9470 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9471 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9472 // CHECK10: omp.inner.for.cond:
9473 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9474 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
9475 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9476 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9477 // CHECK10: omp.inner.for.body:
9478 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9479 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9480 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9481 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
9482 // CHECK10-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !25
9483 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9484 // CHECK10: omp.body.continue:
9485 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9486 // CHECK10: omp.inner.for.inc:
9487 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9488 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9489 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9490 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
9491 // CHECK10: omp.inner.for.end:
9492 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9493 // CHECK10: omp.loop.exit:
9494 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9495 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9496 // CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
9497 // CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9498 // CHECK10: .omp.final.then:
9499 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
9500 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
9501 // CHECK10: .omp.final.done:
9502 // CHECK10-NEXT: ret void
9503 //
9504 //
9505 // CHECK10-LABEL: define {{[^@]+}}@main
9506 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] {
9507 // CHECK10-NEXT: entry:
9508 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
9509 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
9510 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
9511 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9512 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
9513 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
9514 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
9515 // CHECK10-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
9516 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
9517 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9518 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
9519 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
9520 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9521 // CHECK10: omp_offload.failed:
9522 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]]
9523 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
9524 // CHECK10: omp_offload.cont:
9525 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]]
9526 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* @Arg, align 4
9527 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
9528 // CHECK10-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9529 // CHECK10-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
9530 // CHECK10-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
9531 // CHECK10-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
9532 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
9533 // CHECK10-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
9534 // CHECK10-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
9535 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9536 // CHECK10-NEXT: [[TMP5:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
9537 // CHECK10-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP5]] to i1
9538 // CHECK10-NEXT: br i1 [[TOBOOL3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
9539 // CHECK10: omp_if.then:
9540 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9541 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
9542 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
9543 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9544 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
9545 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
9546 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
9547 // CHECK10-NEXT: store i8* null, i8** [[TMP10]], align 8
9548 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9549 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9550 // CHECK10-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
9551 // CHECK10-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP13]] to i1
9552 // CHECK10-NEXT: [[TMP14:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
9553 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9554 // CHECK10-NEXT: [[TMP15:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.10, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.11, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP14]])
9555 // CHECK10-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
9556 // CHECK10-NEXT: br i1 [[TMP16]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
9557 // CHECK10: omp_offload.failed6:
9558 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
9559 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT7]]
9560 // CHECK10: omp_offload.cont7:
9561 // CHECK10-NEXT: br label [[OMP_IF_END:%.*]]
9562 // CHECK10: omp_if.else:
9563 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
9564 // CHECK10-NEXT: br label [[OMP_IF_END]]
9565 // CHECK10: omp_if.end:
9566 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* @Arg, align 4
9567 // CHECK10-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP17]])
9568 // CHECK10-NEXT: ret i32 [[CALL]]
9569 //
9570 //
9571 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78
9572 // CHECK10-SAME: () #[[ATTR1]] {
9573 // CHECK10-NEXT: entry:
9574 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
9575 // CHECK10-NEXT: ret void
9576 //
9577 //
9578 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4
9579 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9580 // CHECK10-NEXT: entry:
9581 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9582 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9583 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9584 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
9585 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9586 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9587 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9588 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9589 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
9590 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9591 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9592 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9593 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9594 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9595 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9596 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9597 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9598 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9599 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9600 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9601 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9602 // CHECK10: cond.true:
9603 // CHECK10-NEXT: br label [[COND_END:%.*]]
9604 // CHECK10: cond.false:
9605 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9606 // CHECK10-NEXT: br label [[COND_END]]
9607 // CHECK10: cond.end:
9608 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9609 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9610 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9611 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9612 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9613 // CHECK10: omp.inner.for.cond:
9614 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
9615 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
9616 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9617 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9618 // CHECK10: omp.inner.for.body:
9619 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
9620 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9621 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
9622 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9623 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !28
9624 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9625 // CHECK10: omp.inner.for.inc:
9626 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
9627 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
9628 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
9629 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
9630 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
9631 // CHECK10: omp.inner.for.end:
9632 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9633 // CHECK10: omp.loop.exit:
9634 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9635 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9636 // CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
9637 // CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9638 // CHECK10: .omp.final.then:
9639 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
9640 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
9641 // CHECK10: .omp.final.done:
9642 // CHECK10-NEXT: ret void
9643 //
9644 //
9645 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5
9646 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9647 // CHECK10-NEXT: entry:
9648 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9649 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9650 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9651 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9652 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9653 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
9654 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9655 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9656 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9657 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9658 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
9659 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9660 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9661 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9662 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9663 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9664 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
9665 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9666 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9667 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9668 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9669 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9670 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9671 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9672 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9673 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9674 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9675 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9676 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9677 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9678 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9679 // CHECK10: cond.true:
9680 // CHECK10-NEXT: br label [[COND_END:%.*]]
9681 // CHECK10: cond.false:
9682 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9683 // CHECK10-NEXT: br label [[COND_END]]
9684 // CHECK10: cond.end:
9685 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9686 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9687 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9688 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9689 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9690 // CHECK10: omp.inner.for.cond:
9691 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
9692 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31
9693 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9694 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9695 // CHECK10: omp.inner.for.body:
9696 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
9697 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9698 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9699 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !31
9700 // CHECK10-NEXT: call void @_Z3fn4v(), !llvm.access.group !31
9701 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9702 // CHECK10: omp.body.continue:
9703 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9704 // CHECK10: omp.inner.for.inc:
9705 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
9706 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9707 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
9708 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
9709 // CHECK10: omp.inner.for.end:
9710 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9711 // CHECK10: omp.loop.exit:
9712 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9713 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9714 // CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
9715 // CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9716 // CHECK10: .omp.final.then:
9717 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
9718 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
9719 // CHECK10: .omp.final.done:
9720 // CHECK10-NEXT: ret void
9721 //
9722 //
9723 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85
9724 // CHECK10-SAME: () #[[ATTR1]] {
9725 // CHECK10-NEXT: entry:
9726 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
9727 // CHECK10-NEXT: ret void
9728 //
9729 //
9730 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..6
9731 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9732 // CHECK10-NEXT: entry:
9733 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9734 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9735 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9736 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
9737 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9738 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9739 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9740 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9741 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
9742 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
9743 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
9744 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9745 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9746 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9747 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9748 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9749 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9750 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9751 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9752 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9753 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9754 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9755 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9756 // CHECK10: cond.true:
9757 // CHECK10-NEXT: br label [[COND_END:%.*]]
9758 // CHECK10: cond.false:
9759 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9760 // CHECK10-NEXT: br label [[COND_END]]
9761 // CHECK10: cond.end:
9762 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9763 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9764 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9765 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9766 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9767 // CHECK10: omp.inner.for.cond:
9768 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
9769 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
9770 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9771 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9772 // CHECK10: omp.inner.for.body:
9773 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
9774 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9775 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
9776 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9777 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !34
9778 // CHECK10-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !34
9779 // CHECK10-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !34
9780 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !34
9781 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9782 // CHECK10: omp.inner.for.inc:
9783 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
9784 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
9785 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9786 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
9787 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
9788 // CHECK10: omp.inner.for.end:
9789 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9790 // CHECK10: omp.loop.exit:
9791 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9792 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9793 // CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
9794 // CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9795 // CHECK10: .omp.final.then:
9796 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
9797 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
9798 // CHECK10: .omp.final.done:
9799 // CHECK10-NEXT: ret void
9800 //
9801 //
9802 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7
9803 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9804 // CHECK10-NEXT: entry:
9805 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9806 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9807 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9808 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9809 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9810 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
9811 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9812 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9813 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9814 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9815 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
9816 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9817 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9818 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9819 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9820 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9821 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
9822 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9823 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9824 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9825 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9826 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9827 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9828 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9829 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9830 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9831 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9832 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9833 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9834 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9835 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9836 // CHECK10: cond.true:
9837 // CHECK10-NEXT: br label [[COND_END:%.*]]
9838 // CHECK10: cond.false:
9839 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9840 // CHECK10-NEXT: br label [[COND_END]]
9841 // CHECK10: cond.end:
9842 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9843 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9844 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9845 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9846 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9847 // CHECK10: omp.inner.for.cond:
9848 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
9849 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37
9850 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9851 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9852 // CHECK10: omp.inner.for.body:
9853 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
9854 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9855 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9856 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !37
9857 // CHECK10-NEXT: call void @_Z3fn5v(), !llvm.access.group !37
9858 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9859 // CHECK10: omp.body.continue:
9860 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9861 // CHECK10: omp.inner.for.inc:
9862 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
9863 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9864 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
9865 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
9866 // CHECK10: omp.inner.for.end:
9867 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9868 // CHECK10: omp.loop.exit:
9869 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9870 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9871 // CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
9872 // CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9873 // CHECK10: .omp.final.then:
9874 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
9875 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
9876 // CHECK10: .omp.final.done:
9877 // CHECK10-NEXT: ret void
9878 //
9879 //
9880 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
9881 // CHECK10-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
9882 // CHECK10-NEXT: entry:
9883 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9884 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9885 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9886 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
9887 // CHECK10-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
9888 // CHECK10-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
9889 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
9890 // CHECK10-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9891 // CHECK10-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
9892 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9893 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP1]])
9894 // CHECK10-NEXT: ret void
9895 //
9896 //
9897 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..8
9898 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
9899 // CHECK10-NEXT: entry:
9900 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9901 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9902 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9903 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9904 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
9905 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9906 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9907 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9908 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9909 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
9910 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
9911 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
9912 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9913 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9914 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9915 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
9916 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9917 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9918 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9919 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9920 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9921 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9922 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9923 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9924 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9925 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9926 // CHECK10: cond.true:
9927 // CHECK10-NEXT: br label [[COND_END:%.*]]
9928 // CHECK10: cond.false:
9929 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9930 // CHECK10-NEXT: br label [[COND_END]]
9931 // CHECK10: cond.end:
9932 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9933 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9934 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9935 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9936 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9937 // CHECK10: omp.inner.for.cond:
9938 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
9939 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
9940 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9941 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9942 // CHECK10: omp.inner.for.body:
9943 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40
9944 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9945 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
9946 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9947 // CHECK10-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !40
9948 // CHECK10-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
9949 // CHECK10-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
9950 // CHECK10: omp_if.then:
9951 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !40
9952 // CHECK10-NEXT: br label [[OMP_IF_END:%.*]]
9953 // CHECK10: omp_if.else:
9954 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !40
9955 // CHECK10-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !40
9956 // CHECK10-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !40
9957 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !40
9958 // CHECK10-NEXT: br label [[OMP_IF_END]]
9959 // CHECK10: omp_if.end:
9960 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9961 // CHECK10: omp.inner.for.inc:
9962 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
9963 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40
9964 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
9965 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
9966 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]]
9967 // CHECK10: omp.inner.for.end:
9968 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9969 // CHECK10: omp.loop.exit:
9970 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9971 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9972 // CHECK10-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
9973 // CHECK10-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9974 // CHECK10: .omp.final.then:
9975 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
9976 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
9977 // CHECK10: .omp.final.done:
9978 // CHECK10-NEXT: ret void
9979 //
9980 //
9981 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..9
9982 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9983 // CHECK10-NEXT: entry:
9984 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9985 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9986 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9987 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9988 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9989 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
9990 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9991 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9992 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9993 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9994 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
9995 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9996 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9997 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9998 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9999 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10000 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
10001 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10002 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10003 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10004 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10005 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10006 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10007 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10008 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10009 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10010 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10011 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10012 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10013 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10014 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10015 // CHECK10: cond.true:
10016 // CHECK10-NEXT: br label [[COND_END:%.*]]
10017 // CHECK10: cond.false:
10018 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10019 // CHECK10-NEXT: br label [[COND_END]]
10020 // CHECK10: cond.end:
10021 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10022 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10023 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10024 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10025 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10026 // CHECK10: omp.inner.for.cond:
10027 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
10028 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43
10029 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10030 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10031 // CHECK10: omp.inner.for.body:
10032 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
10033 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10034 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10035 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !43
10036 // CHECK10-NEXT: call void @_Z3fn6v(), !llvm.access.group !43
10037 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10038 // CHECK10: omp.body.continue:
10039 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10040 // CHECK10: omp.inner.for.inc:
10041 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
10042 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10043 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
10044 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
10045 // CHECK10: omp.inner.for.end:
10046 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10047 // CHECK10: omp.loop.exit:
10048 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10049 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10050 // CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
10051 // CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10052 // CHECK10: .omp.final.then:
10053 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
10054 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
10055 // CHECK10: .omp.final.done:
10056 // CHECK10-NEXT: ret void
10057 //
10058 //
10059 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
10060 // CHECK10-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
10061 // CHECK10-NEXT: entry:
10062 // CHECK10-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
10063 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
10064 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
10065 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10066 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
10067 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
10068 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
10069 // CHECK10-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
10070 // CHECK10-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
10071 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
10072 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
10073 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
10074 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
10075 // CHECK10: omp_offload.failed:
10076 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
10077 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
10078 // CHECK10: omp_offload.cont:
10079 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]]
10080 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
10081 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
10082 // CHECK10-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
10083 // CHECK10-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
10084 // CHECK10-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
10085 // CHECK10-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
10086 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
10087 // CHECK10-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
10088 // CHECK10-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
10089 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10090 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10091 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
10092 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP6]], align 8
10093 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10094 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
10095 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
10096 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
10097 // CHECK10-NEXT: store i8* null, i8** [[TMP9]], align 8
10098 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10099 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10100 // CHECK10-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
10101 // CHECK10-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP12]] to i1
10102 // CHECK10-NEXT: [[TMP13:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
10103 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
10104 // CHECK10-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, i32 1, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.18, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.19, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP13]])
10105 // CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
10106 // CHECK10-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
10107 // CHECK10: omp_offload.failed5:
10108 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP4]]) #[[ATTR2]]
10109 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT6]]
10110 // CHECK10: omp_offload.cont6:
10111 // CHECK10-NEXT: ret i32 0
10112 //
10113 //
10114 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
10115 // CHECK10-SAME: () #[[ATTR1]] {
10116 // CHECK10-NEXT: entry:
10117 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
10118 // CHECK10-NEXT: ret void
10119 //
10120 //
10121 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..12
10122 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10123 // CHECK10-NEXT: entry:
10124 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10125 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10126 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10127 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
10128 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10129 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10130 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10131 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10132 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
10133 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10134 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10135 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10136 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10137 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10138 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10139 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10140 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10141 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10142 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10143 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10144 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10145 // CHECK10: cond.true:
10146 // CHECK10-NEXT: br label [[COND_END:%.*]]
10147 // CHECK10: cond.false:
10148 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10149 // CHECK10-NEXT: br label [[COND_END]]
10150 // CHECK10: cond.end:
10151 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10152 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10153 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10154 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10155 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10156 // CHECK10: omp.inner.for.cond:
10157 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
10158 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
10159 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10160 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10161 // CHECK10: omp.inner.for.body:
10162 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
10163 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10164 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
10165 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10166 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !46
10167 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10168 // CHECK10: omp.inner.for.inc:
10169 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
10170 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
10171 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
10172 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
10173 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
10174 // CHECK10: omp.inner.for.end:
10175 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10176 // CHECK10: omp.loop.exit:
10177 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10178 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10179 // CHECK10-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
10180 // CHECK10-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10181 // CHECK10: .omp.final.then:
10182 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
10183 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
10184 // CHECK10: .omp.final.done:
10185 // CHECK10-NEXT: ret void
10186 //
10187 //
10188 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..13
10189 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10190 // CHECK10-NEXT: entry:
10191 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10192 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10193 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10194 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10195 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10196 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
10197 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10198 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10199 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10200 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10201 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
10202 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10203 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10204 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10205 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10206 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10207 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
10208 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10209 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10210 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10211 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10212 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10213 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10214 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10215 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10216 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10217 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10218 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10219 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10220 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10221 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10222 // CHECK10: cond.true:
10223 // CHECK10-NEXT: br label [[COND_END:%.*]]
10224 // CHECK10: cond.false:
10225 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10226 // CHECK10-NEXT: br label [[COND_END]]
10227 // CHECK10: cond.end:
10228 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10229 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10230 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10231 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10232 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10233 // CHECK10: omp.inner.for.cond:
10234 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
10235 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
10236 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10237 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10238 // CHECK10: omp.inner.for.body:
10239 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
10240 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10241 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10242 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
10243 // CHECK10-NEXT: call void @_Z3fn1v(), !llvm.access.group !49
10244 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10245 // CHECK10: omp.body.continue:
10246 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10247 // CHECK10: omp.inner.for.inc:
10248 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
10249 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10250 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
10251 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
10252 // CHECK10: omp.inner.for.end:
10253 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10254 // CHECK10: omp.loop.exit:
10255 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10256 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10257 // CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
10258 // CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10259 // CHECK10: .omp.final.then:
10260 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
10261 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
10262 // CHECK10: .omp.final.done:
10263 // CHECK10-NEXT: ret void
10264 //
10265 //
10266 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66
10267 // CHECK10-SAME: () #[[ATTR1]] {
10268 // CHECK10-NEXT: entry:
10269 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*))
10270 // CHECK10-NEXT: ret void
10271 //
10272 //
10273 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..14
10274 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10275 // CHECK10-NEXT: entry:
10276 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10277 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10278 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10279 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
10280 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10281 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10282 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10283 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10284 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
10285 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
10286 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
10287 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10288 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10289 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10290 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10291 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10292 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10293 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10294 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10295 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10296 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10297 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10298 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10299 // CHECK10: cond.true:
10300 // CHECK10-NEXT: br label [[COND_END:%.*]]
10301 // CHECK10: cond.false:
10302 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10303 // CHECK10-NEXT: br label [[COND_END]]
10304 // CHECK10: cond.end:
10305 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10306 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10307 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10308 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10309 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10310 // CHECK10: omp.inner.for.cond:
10311 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
10312 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
10313 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10314 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10315 // CHECK10: omp.inner.for.body:
10316 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !52
10317 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10318 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
10319 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10320 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !52
10321 // CHECK10-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !52
10322 // CHECK10-NEXT: call void @.omp_outlined..15(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !52
10323 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !52
10324 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10325 // CHECK10: omp.inner.for.inc:
10326 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
10327 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !52
10328 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10329 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
10330 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
10331 // CHECK10: omp.inner.for.end:
10332 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10333 // CHECK10: omp.loop.exit:
10334 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10335 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10336 // CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
10337 // CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10338 // CHECK10: .omp.final.then:
10339 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
10340 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
10341 // CHECK10: .omp.final.done:
10342 // CHECK10-NEXT: ret void
10343 //
10344 //
10345 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..15
10346 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10347 // CHECK10-NEXT: entry:
10348 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10349 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10350 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10351 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10352 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10353 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
10354 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10355 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10356 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10357 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10358 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
10359 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10360 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10361 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10362 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10363 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10364 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
10365 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10366 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10367 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10368 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10369 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10370 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10371 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10372 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10373 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10374 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10375 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10376 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10377 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10378 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10379 // CHECK10: cond.true:
10380 // CHECK10-NEXT: br label [[COND_END:%.*]]
10381 // CHECK10: cond.false:
10382 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10383 // CHECK10-NEXT: br label [[COND_END]]
10384 // CHECK10: cond.end:
10385 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10386 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10387 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10388 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10389 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10390 // CHECK10: omp.inner.for.cond:
10391 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
10392 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !55
10393 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10394 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10395 // CHECK10: omp.inner.for.body:
10396 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
10397 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10398 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10399 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !55
10400 // CHECK10-NEXT: call void @_Z3fn2v(), !llvm.access.group !55
10401 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10402 // CHECK10: omp.body.continue:
10403 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10404 // CHECK10: omp.inner.for.inc:
10405 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
10406 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10407 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
10408 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
10409 // CHECK10: omp.inner.for.end:
10410 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10411 // CHECK10: omp.loop.exit:
10412 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10413 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10414 // CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
10415 // CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10416 // CHECK10: .omp.final.then:
10417 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
10418 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
10419 // CHECK10: .omp.final.done:
10420 // CHECK10-NEXT: ret void
10421 //
10422 //
10423 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70
10424 // CHECK10-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
10425 // CHECK10-NEXT: entry:
10426 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10427 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10428 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10429 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
10430 // CHECK10-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
10431 // CHECK10-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
10432 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
10433 // CHECK10-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
10434 // CHECK10-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
10435 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10436 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP1]])
10437 // CHECK10-NEXT: ret void
10438 //
10439 //
10440 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..16
10441 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
10442 // CHECK10-NEXT: entry:
10443 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10444 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10445 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10446 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10447 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
10448 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10449 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10450 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10451 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10452 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
10453 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
10454 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
10455 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10456 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10457 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10458 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
10459 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10460 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10461 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10462 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10463 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10464 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10465 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10466 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10467 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10468 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10469 // CHECK10: cond.true:
10470 // CHECK10-NEXT: br label [[COND_END:%.*]]
10471 // CHECK10: cond.false:
10472 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10473 // CHECK10-NEXT: br label [[COND_END]]
10474 // CHECK10: cond.end:
10475 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10476 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10477 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10478 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10479 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10480 // CHECK10: omp.inner.for.cond:
10481 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
10482 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
10483 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10484 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10485 // CHECK10: omp.inner.for.body:
10486 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !58
10487 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10488 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
10489 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10490 // CHECK10-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !58
10491 // CHECK10-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
10492 // CHECK10-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
10493 // CHECK10: omp_if.then:
10494 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..17 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !58
10495 // CHECK10-NEXT: br label [[OMP_IF_END:%.*]]
10496 // CHECK10: omp_if.else:
10497 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !58
10498 // CHECK10-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !58
10499 // CHECK10-NEXT: call void @.omp_outlined..17(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !58
10500 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !58
10501 // CHECK10-NEXT: br label [[OMP_IF_END]]
10502 // CHECK10: omp_if.end:
10503 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10504 // CHECK10: omp.inner.for.inc:
10505 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
10506 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !58
10507 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
10508 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
10509 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
10510 // CHECK10: omp.inner.for.end:
10511 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10512 // CHECK10: omp.loop.exit:
10513 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10514 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10515 // CHECK10-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
10516 // CHECK10-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10517 // CHECK10: .omp.final.then:
10518 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
10519 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
10520 // CHECK10: .omp.final.done:
10521 // CHECK10-NEXT: ret void
10522 //
10523 //
10524 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..17
10525 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10526 // CHECK10-NEXT: entry:
10527 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10528 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10529 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10530 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10531 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10532 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
10533 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10534 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10535 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10536 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10537 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
10538 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10539 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10540 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10541 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10542 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10543 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
10544 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10545 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10546 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10547 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10548 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10549 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10550 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10551 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10552 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10553 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10554 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10555 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10556 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10557 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10558 // CHECK10: cond.true:
10559 // CHECK10-NEXT: br label [[COND_END:%.*]]
10560 // CHECK10: cond.false:
10561 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10562 // CHECK10-NEXT: br label [[COND_END]]
10563 // CHECK10: cond.end:
10564 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10565 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10566 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10567 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10568 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10569 // CHECK10: omp.inner.for.cond:
10570 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
10571 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61
10572 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10573 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10574 // CHECK10: omp.inner.for.body:
10575 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
10576 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10577 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10578 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !61
10579 // CHECK10-NEXT: call void @_Z3fn3v(), !llvm.access.group !61
10580 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10581 // CHECK10: omp.body.continue:
10582 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10583 // CHECK10: omp.inner.for.inc:
10584 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
10585 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10586 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
10587 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]]
10588 // CHECK10: omp.inner.for.end:
10589 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10590 // CHECK10: omp.loop.exit:
10591 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10592 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10593 // CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
10594 // CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10595 // CHECK10: .omp.final.then:
10596 // CHECK10-NEXT: store i32 100, i32* [[I]], align 4
10597 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
10598 // CHECK10: .omp.final.done:
10599 // CHECK10-NEXT: ret void
10600 //
10601 //
10602 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
10603 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] {
10604 // CHECK10-NEXT: entry:
10605 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
10606 // CHECK10-NEXT: ret void
10607 //
10608 //
10609 // CHECK11-LABEL: define {{[^@]+}}@_Z9gtid_testv
10610 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
10611 // CHECK11-NEXT: entry:
10612 // CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
10613 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
10614 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
10615 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
10616 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
10617 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
10618 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* @Arg, align 4
10619 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
10620 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
10621 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
10622 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10623 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
10624 // CHECK11-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
10625 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10626 // CHECK11-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
10627 // CHECK11-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
10628 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
10629 // CHECK11-NEXT: store i8* null, i8** [[TMP6]], align 8
10630 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10631 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10632 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
10633 // CHECK11-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10634 // CHECK11-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
10635 // CHECK11-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
10636 // CHECK11: omp_offload.failed:
10637 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
10638 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
10639 // CHECK11: omp_offload.cont:
10640 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
10641 // CHECK11-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
10642 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
10643 // CHECK11-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
10644 // CHECK11: omp_offload.failed2:
10645 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]]
10646 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT3]]
10647 // CHECK11: omp_offload.cont3:
10648 // CHECK11-NEXT: ret void
10649 //
10650 //
10651 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45
10652 // CHECK11-SAME: (i64 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
10653 // CHECK11-NEXT: entry:
10654 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
10655 // CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
10656 // CHECK11-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
10657 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
10658 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
10659 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
10660 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
10661 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
10662 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]])
10663 // CHECK11-NEXT: ret void
10664 //
10665 //
10666 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
10667 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
10668 // CHECK11-NEXT: entry:
10669 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10670 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10671 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
10672 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10673 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
10674 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10675 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10676 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10677 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10678 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
10679 // CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
10680 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10681 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10682 // CHECK11-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
10683 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
10684 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10685 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10686 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10687 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10688 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10689 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10690 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10691 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10692 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10693 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10694 // CHECK11: cond.true:
10695 // CHECK11-NEXT: br label [[COND_END:%.*]]
10696 // CHECK11: cond.false:
10697 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10698 // CHECK11-NEXT: br label [[COND_END]]
10699 // CHECK11: cond.end:
10700 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10701 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10702 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10703 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10704 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10705 // CHECK11: omp.inner.for.cond:
10706 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
10707 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
10708 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10709 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10710 // CHECK11: omp.inner.for.body:
10711 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
10712 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10713 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
10714 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10715 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8, !nontemporal !14, !llvm.access.group !13
10716 // CHECK11-NEXT: [[CONV2:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
10717 // CHECK11-NEXT: store i32 [[TMP11]], i32* [[CONV2]], align 4, !llvm.access.group !13
10718 // CHECK11-NEXT: [[TMP12:%.*]] = load i64, i64* [[ARG_CASTED]], align 8, !llvm.access.group !13
10719 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group !13
10720 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10721 // CHECK11: omp.inner.for.inc:
10722 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
10723 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
10724 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
10725 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
10726 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
10727 // CHECK11: omp.inner.for.end:
10728 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10729 // CHECK11: omp.loop.exit:
10730 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10731 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10732 // CHECK11-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
10733 // CHECK11-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10734 // CHECK11: .omp.final.then:
10735 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
10736 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
10737 // CHECK11: .omp.final.done:
10738 // CHECK11-NEXT: ret void
10739 //
10740 //
10741 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
10742 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
10743 // CHECK11-NEXT: entry:
10744 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10745 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10746 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10747 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10748 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
10749 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10750 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
10751 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10752 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10753 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10754 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10755 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
10756 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10757 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10758 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10759 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10760 // CHECK11-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
10761 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
10762 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10763 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
10764 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10765 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
10766 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10767 // CHECK11-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
10768 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
10769 // CHECK11-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
10770 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10771 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10772 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10773 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10774 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10775 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10776 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10777 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10778 // CHECK11: cond.true:
10779 // CHECK11-NEXT: br label [[COND_END:%.*]]
10780 // CHECK11: cond.false:
10781 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10782 // CHECK11-NEXT: br label [[COND_END]]
10783 // CHECK11: cond.end:
10784 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10785 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10786 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10787 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10788 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10789 // CHECK11: omp.inner.for.cond:
10790 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
10791 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
10792 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10793 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10794 // CHECK11: omp.inner.for.body:
10795 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
10796 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10797 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10798 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18
10799 // CHECK11-NEXT: store i32 0, i32* [[CONV]], align 8, !nontemporal !14, !llvm.access.group !18
10800 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10801 // CHECK11: omp.body.continue:
10802 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10803 // CHECK11: omp.inner.for.inc:
10804 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
10805 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
10806 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
10807 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
10808 // CHECK11: omp.inner.for.end:
10809 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10810 // CHECK11: omp.loop.exit:
10811 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10812 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10813 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
10814 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10815 // CHECK11: .omp.final.then:
10816 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
10817 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
10818 // CHECK11: .omp.final.done:
10819 // CHECK11-NEXT: ret void
10820 //
10821 //
10822 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53
10823 // CHECK11-SAME: () #[[ATTR1]] {
10824 // CHECK11-NEXT: entry:
10825 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
10826 // CHECK11-NEXT: ret void
10827 //
10828 //
10829 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
10830 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10831 // CHECK11-NEXT: entry:
10832 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10833 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10834 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10835 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
10836 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10837 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10838 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10839 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10840 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
10841 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
10842 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
10843 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10844 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10845 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10846 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10847 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10848 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10849 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10850 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10851 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10852 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10853 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10854 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10855 // CHECK11: cond.true:
10856 // CHECK11-NEXT: br label [[COND_END:%.*]]
10857 // CHECK11: cond.false:
10858 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10859 // CHECK11-NEXT: br label [[COND_END]]
10860 // CHECK11: cond.end:
10861 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10862 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10863 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10864 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10865 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10866 // CHECK11: omp.inner.for.cond:
10867 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
10868 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
10869 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10870 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10871 // CHECK11: omp.inner.for.body:
10872 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
10873 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10874 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
10875 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10876 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !23
10877 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !23
10878 // CHECK11-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !23
10879 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !23
10880 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10881 // CHECK11: omp.inner.for.inc:
10882 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
10883 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
10884 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10885 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
10886 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
10887 // CHECK11: omp.inner.for.end:
10888 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10889 // CHECK11: omp.loop.exit:
10890 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10891 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10892 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
10893 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10894 // CHECK11: .omp.final.then:
10895 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
10896 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
10897 // CHECK11: .omp.final.done:
10898 // CHECK11-NEXT: ret void
10899 //
10900 //
10901 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
10902 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10903 // CHECK11-NEXT: entry:
10904 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10905 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10906 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10907 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10908 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10909 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
10910 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10911 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10912 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10913 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10914 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
10915 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10916 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10917 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10918 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10919 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10920 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
10921 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10922 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10923 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10924 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10925 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10926 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10927 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10928 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10929 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10930 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10931 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10932 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10933 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10934 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10935 // CHECK11: cond.true:
10936 // CHECK11-NEXT: br label [[COND_END:%.*]]
10937 // CHECK11: cond.false:
10938 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10939 // CHECK11-NEXT: br label [[COND_END]]
10940 // CHECK11: cond.end:
10941 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10942 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10943 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10944 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10945 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10946 // CHECK11: omp.inner.for.cond:
10947 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
10948 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
10949 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10950 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10951 // CHECK11: omp.inner.for.body:
10952 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
10953 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10954 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10955 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !26
10956 // CHECK11-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !26
10957 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10958 // CHECK11: omp.body.continue:
10959 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10960 // CHECK11: omp.inner.for.inc:
10961 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
10962 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10963 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
10964 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
10965 // CHECK11: omp.inner.for.end:
10966 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10967 // CHECK11: omp.loop.exit:
10968 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10969 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10970 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
10971 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10972 // CHECK11: .omp.final.then:
10973 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
10974 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
10975 // CHECK11: .omp.final.done:
10976 // CHECK11-NEXT: ret void
10977 //
10978 //
10979 // CHECK11-LABEL: define {{[^@]+}}@main
10980 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] {
10981 // CHECK11-NEXT: entry:
10982 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
10983 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
10984 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
10985 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10986 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
10987 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
10988 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
10989 // CHECK11-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
10990 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
10991 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
10992 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
10993 // CHECK11-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
10994 // CHECK11-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
10995 // CHECK11: omp_offload.failed:
10996 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]]
10997 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
10998 // CHECK11: omp_offload.cont:
10999 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]]
11000 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* @Arg, align 4
11001 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
11002 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
11003 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
11004 // CHECK11-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
11005 // CHECK11-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
11006 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
11007 // CHECK11-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
11008 // CHECK11-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
11009 // CHECK11-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11010 // CHECK11-NEXT: [[TMP5:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
11011 // CHECK11-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP5]] to i1
11012 // CHECK11-NEXT: br i1 [[TOBOOL3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
11013 // CHECK11: omp_if.then:
11014 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11015 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
11016 // CHECK11-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
11017 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11018 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
11019 // CHECK11-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
11020 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
11021 // CHECK11-NEXT: store i8* null, i8** [[TMP10]], align 8
11022 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11023 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11024 // CHECK11-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
11025 // CHECK11-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP13]] to i1
11026 // CHECK11-NEXT: [[TMP14:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
11027 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
11028 // CHECK11-NEXT: [[TMP15:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP14]])
11029 // CHECK11-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
11030 // CHECK11-NEXT: br i1 [[TMP16]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
11031 // CHECK11: omp_offload.failed6:
11032 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
11033 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT7]]
11034 // CHECK11: omp_offload.cont7:
11035 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
11036 // CHECK11: omp_if.else:
11037 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
11038 // CHECK11-NEXT: br label [[OMP_IF_END]]
11039 // CHECK11: omp_if.end:
11040 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* @Arg, align 4
11041 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP17]])
11042 // CHECK11-NEXT: ret i32 [[CALL]]
11043 //
11044 //
11045 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78
11046 // CHECK11-SAME: () #[[ATTR1]] {
11047 // CHECK11-NEXT: entry:
11048 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
11049 // CHECK11-NEXT: ret void
11050 //
11051 //
11052 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4
11053 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
11054 // CHECK11-NEXT: entry:
11055 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11056 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11057 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11058 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
11059 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11060 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11061 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11062 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11063 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
11064 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11065 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11066 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11067 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11068 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11069 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11070 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11071 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11072 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11073 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11074 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
11075 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11076 // CHECK11: cond.true:
11077 // CHECK11-NEXT: br label [[COND_END:%.*]]
11078 // CHECK11: cond.false:
11079 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11080 // CHECK11-NEXT: br label [[COND_END]]
11081 // CHECK11: cond.end:
11082 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11083 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11084 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11085 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11086 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11087 // CHECK11: omp.inner.for.cond:
11088 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
11089 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
11090 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11091 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11092 // CHECK11: omp.inner.for.body:
11093 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
11094 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
11095 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
11096 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
11097 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !29
11098 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11099 // CHECK11: omp.inner.for.inc:
11100 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
11101 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
11102 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
11103 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
11104 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
11105 // CHECK11: omp.inner.for.end:
11106 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11107 // CHECK11: omp.loop.exit:
11108 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11109 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11110 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
11111 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11112 // CHECK11: .omp.final.then:
11113 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
11114 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
11115 // CHECK11: .omp.final.done:
11116 // CHECK11-NEXT: ret void
11117 //
11118 //
11119 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5
11120 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11121 // CHECK11-NEXT: entry:
11122 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11123 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11124 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11125 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11126 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11127 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
11128 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11129 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11130 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11131 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11132 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
11133 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11134 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11135 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11136 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11137 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11138 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
11139 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11140 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
11141 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11142 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11143 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11144 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11145 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11146 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11147 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11148 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
11149 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11150 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11151 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
11152 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11153 // CHECK11: cond.true:
11154 // CHECK11-NEXT: br label [[COND_END:%.*]]
11155 // CHECK11: cond.false:
11156 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11157 // CHECK11-NEXT: br label [[COND_END]]
11158 // CHECK11: cond.end:
11159 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
11160 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11161 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11162 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
11163 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11164 // CHECK11: omp.inner.for.cond:
11165 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
11166 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
11167 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
11168 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11169 // CHECK11: omp.inner.for.body:
11170 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
11171 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
11172 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11173 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !32
11174 // CHECK11-NEXT: call void @_Z3fn4v(), !llvm.access.group !32
11175 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11176 // CHECK11: omp.body.continue:
11177 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11178 // CHECK11: omp.inner.for.inc:
11179 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
11180 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
11181 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
11182 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
11183 // CHECK11: omp.inner.for.end:
11184 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11185 // CHECK11: omp.loop.exit:
11186 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
11187 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11188 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
11189 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11190 // CHECK11: .omp.final.then:
11191 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
11192 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
11193 // CHECK11: .omp.final.done:
11194 // CHECK11-NEXT: ret void
11195 //
11196 //
11197 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85
11198 // CHECK11-SAME: () #[[ATTR1]] {
11199 // CHECK11-NEXT: entry:
11200 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
11201 // CHECK11-NEXT: ret void
11202 //
11203 //
11204 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..6
11205 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
11206 // CHECK11-NEXT: entry:
11207 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11208 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11209 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11210 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
11211 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11212 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11213 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11214 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11215 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
11216 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
11217 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
11218 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11219 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11220 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11221 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11222 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11223 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11224 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11225 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11226 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11227 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11228 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
11229 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11230 // CHECK11: cond.true:
11231 // CHECK11-NEXT: br label [[COND_END:%.*]]
11232 // CHECK11: cond.false:
11233 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11234 // CHECK11-NEXT: br label [[COND_END]]
11235 // CHECK11: cond.end:
11236 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11237 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11238 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11239 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11240 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11241 // CHECK11: omp.inner.for.cond:
11242 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11243 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11244 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11245 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11246 // CHECK11: omp.inner.for.body:
11247 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11248 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
11249 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11250 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
11251 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
11252 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11253 // CHECK11-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
11254 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
11255 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11256 // CHECK11: omp.inner.for.inc:
11257 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11258 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11259 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11260 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11261 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
11262 // CHECK11: omp.inner.for.end:
11263 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11264 // CHECK11: omp.loop.exit:
11265 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11266 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11267 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
11268 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11269 // CHECK11: .omp.final.then:
11270 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
11271 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
11272 // CHECK11: .omp.final.done:
11273 // CHECK11-NEXT: ret void
11274 //
11275 //
11276 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7
11277 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11278 // CHECK11-NEXT: entry:
11279 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11280 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11281 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11282 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11283 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11284 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
11285 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11286 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11287 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11288 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11289 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
11290 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11291 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11292 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11293 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11294 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11295 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
11296 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11297 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
11298 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11299 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11300 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11301 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11302 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11303 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11304 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11305 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
11306 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11307 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11308 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
11309 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11310 // CHECK11: cond.true:
11311 // CHECK11-NEXT: br label [[COND_END:%.*]]
11312 // CHECK11: cond.false:
11313 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11314 // CHECK11-NEXT: br label [[COND_END]]
11315 // CHECK11: cond.end:
11316 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
11317 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11318 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11319 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
11320 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11321 // CHECK11: omp.inner.for.cond:
11322 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11323 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11324 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
11325 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11326 // CHECK11: omp.inner.for.body:
11327 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11328 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
11329 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11330 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
11331 // CHECK11-NEXT: call void @_Z3fn5v()
11332 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11333 // CHECK11: omp.body.continue:
11334 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11335 // CHECK11: omp.inner.for.inc:
11336 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11337 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
11338 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11339 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
11340 // CHECK11: omp.inner.for.end:
11341 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11342 // CHECK11: omp.loop.exit:
11343 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
11344 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11345 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
11346 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11347 // CHECK11: .omp.final.then:
11348 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
11349 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
11350 // CHECK11: .omp.final.done:
11351 // CHECK11-NEXT: ret void
11352 //
11353 //
11354 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
11355 // CHECK11-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
11356 // CHECK11-NEXT: entry:
11357 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11358 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11359 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11360 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
11361 // CHECK11-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
11362 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
11363 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
11364 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
11365 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
11366 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11367 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP1]])
11368 // CHECK11-NEXT: ret void
11369 //
11370 //
11371 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..8
11372 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
11373 // CHECK11-NEXT: entry:
11374 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11375 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11376 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11377 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11378 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
11379 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11380 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11381 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11382 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11383 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
11384 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11385 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
11386 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED11:%.*]] = alloca i64, align 8
11387 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR17:%.*]] = alloca i32, align 4
11388 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR17]], align 4
11389 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
11390 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11391 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11392 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11393 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
11394 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11395 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11396 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11397 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11398 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11399 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11400 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11401 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11402 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
11403 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11404 // CHECK11: cond.true:
11405 // CHECK11-NEXT: br label [[COND_END:%.*]]
11406 // CHECK11: cond.false:
11407 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11408 // CHECK11-NEXT: br label [[COND_END]]
11409 // CHECK11: cond.end:
11410 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11411 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11412 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11413 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11414 // CHECK11-NEXT: [[TMP5:%.*]] = load i8, i8* [[CONV]], align 8
11415 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1
11416 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]
11417 // CHECK11: omp_if.then:
11418 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11419 // CHECK11: omp.inner.for.cond:
11420 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
11421 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !38
11422 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11423 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11424 // CHECK11: omp.inner.for.body:
11425 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !38
11426 // CHECK11-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11427 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !38
11428 // CHECK11-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11429 // CHECK11-NEXT: [[TMP12:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !38
11430 // CHECK11-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP12]] to i1
11431 // CHECK11-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
11432 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8
11433 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[CONV3]], align 1, !llvm.access.group !38
11434 // CHECK11-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !38
11435 // CHECK11-NEXT: [[TMP14:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !38
11436 // CHECK11-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
11437 // CHECK11-NEXT: br i1 [[TOBOOL4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]
11438 // CHECK11: omp_if.then5:
11439 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group !38
11440 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
11441 // CHECK11: omp_if.else:
11442 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !38
11443 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !38
11444 // CHECK11-NEXT: call void @.omp_outlined..9(i32* [[TMP15]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]) #[[ATTR2]], !llvm.access.group !38
11445 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !38
11446 // CHECK11-NEXT: br label [[OMP_IF_END]]
11447 // CHECK11: omp_if.end:
11448 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11449 // CHECK11: omp.inner.for.inc:
11450 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
11451 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !38
11452 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
11453 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
11454 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
11455 // CHECK11: omp.inner.for.end:
11456 // CHECK11-NEXT: br label [[OMP_IF_END22:%.*]]
11457 // CHECK11: omp_if.else6:
11458 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
11459 // CHECK11: omp.inner.for.cond7:
11460 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11461 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11462 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
11463 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END21:%.*]]
11464 // CHECK11: omp.inner.for.body9:
11465 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11466 // CHECK11-NEXT: [[TMP21:%.*]] = zext i32 [[TMP20]] to i64
11467 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11468 // CHECK11-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
11469 // CHECK11-NEXT: [[TMP24:%.*]] = load i8, i8* [[CONV]], align 8
11470 // CHECK11-NEXT: [[TOBOOL10:%.*]] = trunc i8 [[TMP24]] to i1
11471 // CHECK11-NEXT: [[CONV12:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED11]] to i8*
11472 // CHECK11-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[TOBOOL10]] to i8
11473 // CHECK11-NEXT: store i8 [[FROMBOOL13]], i8* [[CONV12]], align 1
11474 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED11]], align 8
11475 // CHECK11-NEXT: [[TMP26:%.*]] = load i8, i8* [[CONV]], align 8
11476 // CHECK11-NEXT: [[TOBOOL14:%.*]] = trunc i8 [[TMP26]] to i1
11477 // CHECK11-NEXT: br i1 [[TOBOOL14]], label [[OMP_IF_THEN15:%.*]], label [[OMP_IF_ELSE16:%.*]]
11478 // CHECK11: omp_if.then15:
11479 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
11480 // CHECK11-NEXT: br label [[OMP_IF_END18:%.*]]
11481 // CHECK11: omp_if.else16:
11482 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
11483 // CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11484 // CHECK11-NEXT: call void @.omp_outlined..10(i32* [[TMP27]], i32* [[DOTBOUND_ZERO_ADDR17]], i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) #[[ATTR2]]
11485 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
11486 // CHECK11-NEXT: br label [[OMP_IF_END18]]
11487 // CHECK11: omp_if.end18:
11488 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
11489 // CHECK11: omp.inner.for.inc19:
11490 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11491 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11492 // CHECK11-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
11493 // CHECK11-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4
11494 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP41:![0-9]+]]
11495 // CHECK11: omp.inner.for.end21:
11496 // CHECK11-NEXT: br label [[OMP_IF_END22]]
11497 // CHECK11: omp_if.end22:
11498 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11499 // CHECK11: omp.loop.exit:
11500 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11501 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11502 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
11503 // CHECK11-NEXT: br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11504 // CHECK11: .omp.final.then:
11505 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
11506 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
11507 // CHECK11: .omp.final.done:
11508 // CHECK11-NEXT: ret void
11509 //
11510 //
11511 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..9
11512 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
11513 // CHECK11-NEXT: entry:
11514 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11515 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11516 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11517 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11518 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11519 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11520 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
11521 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11522 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11523 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11524 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11525 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
11526 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11527 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11528 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11529 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11530 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11531 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
11532 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11533 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
11534 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11535 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
11536 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11537 // CHECK11-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
11538 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
11539 // CHECK11-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
11540 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11541 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11542 // CHECK11-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
11543 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
11544 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
11545 // CHECK11: omp_if.then:
11546 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11547 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
11548 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11549 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11550 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
11551 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11552 // CHECK11: cond.true:
11553 // CHECK11-NEXT: br label [[COND_END:%.*]]
11554 // CHECK11: cond.false:
11555 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11556 // CHECK11-NEXT: br label [[COND_END]]
11557 // CHECK11: cond.end:
11558 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11559 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11560 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11561 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
11562 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11563 // CHECK11: omp.inner.for.cond:
11564 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
11565 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !42
11566 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11567 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11568 // CHECK11: omp.inner.for.body:
11569 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
11570 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11571 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11572 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !42
11573 // CHECK11-NEXT: call void @_Z3fn6v(), !llvm.access.group !42
11574 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11575 // CHECK11: omp.body.continue:
11576 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11577 // CHECK11: omp.inner.for.inc:
11578 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
11579 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
11580 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
11581 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
11582 // CHECK11: omp.inner.for.end:
11583 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
11584 // CHECK11: omp_if.else:
11585 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11586 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
11587 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11588 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11589 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
11590 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
11591 // CHECK11: cond.true6:
11592 // CHECK11-NEXT: br label [[COND_END8:%.*]]
11593 // CHECK11: cond.false7:
11594 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11595 // CHECK11-NEXT: br label [[COND_END8]]
11596 // CHECK11: cond.end8:
11597 // CHECK11-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
11598 // CHECK11-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
11599 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11600 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
11601 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
11602 // CHECK11: omp.inner.for.cond10:
11603 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11604 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11605 // CHECK11-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
11606 // CHECK11-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
11607 // CHECK11: omp.inner.for.body12:
11608 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11609 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
11610 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
11611 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
11612 // CHECK11-NEXT: call void @_Z3fn6v()
11613 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
11614 // CHECK11: omp.body.continue15:
11615 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
11616 // CHECK11: omp.inner.for.inc16:
11617 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11618 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
11619 // CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
11620 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP45:![0-9]+]]
11621 // CHECK11: omp.inner.for.end18:
11622 // CHECK11-NEXT: br label [[OMP_IF_END]]
11623 // CHECK11: omp_if.end:
11624 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11625 // CHECK11: omp.loop.exit:
11626 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11627 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
11628 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
11629 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11630 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
11631 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11632 // CHECK11: .omp.final.then:
11633 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
11634 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
11635 // CHECK11: .omp.final.done:
11636 // CHECK11-NEXT: ret void
11637 //
11638 //
11639 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10
11640 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
11641 // CHECK11-NEXT: entry:
11642 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11643 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11644 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11645 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11646 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11647 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11648 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
11649 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11650 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11651 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11652 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11653 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
11654 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11655 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11656 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11657 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11658 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11659 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
11660 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11661 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
11662 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11663 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
11664 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11665 // CHECK11-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
11666 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
11667 // CHECK11-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
11668 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11669 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11670 // CHECK11-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
11671 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
11672 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
11673 // CHECK11: omp_if.then:
11674 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11675 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
11676 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11677 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11678 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
11679 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11680 // CHECK11: cond.true:
11681 // CHECK11-NEXT: br label [[COND_END:%.*]]
11682 // CHECK11: cond.false:
11683 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11684 // CHECK11-NEXT: br label [[COND_END]]
11685 // CHECK11: cond.end:
11686 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11687 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11688 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11689 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
11690 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11691 // CHECK11: omp.inner.for.cond:
11692 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
11693 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !46
11694 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11695 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11696 // CHECK11: omp.inner.for.body:
11697 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
11698 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11699 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11700 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !46
11701 // CHECK11-NEXT: call void @_Z3fn6v(), !llvm.access.group !46
11702 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11703 // CHECK11: omp.body.continue:
11704 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11705 // CHECK11: omp.inner.for.inc:
11706 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
11707 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
11708 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
11709 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
11710 // CHECK11: omp.inner.for.end:
11711 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
11712 // CHECK11: omp_if.else:
11713 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11714 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
11715 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11716 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11717 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
11718 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
11719 // CHECK11: cond.true6:
11720 // CHECK11-NEXT: br label [[COND_END8:%.*]]
11721 // CHECK11: cond.false7:
11722 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11723 // CHECK11-NEXT: br label [[COND_END8]]
11724 // CHECK11: cond.end8:
11725 // CHECK11-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
11726 // CHECK11-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
11727 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11728 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
11729 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
11730 // CHECK11: omp.inner.for.cond10:
11731 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11732 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11733 // CHECK11-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
11734 // CHECK11-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
11735 // CHECK11: omp.inner.for.body12:
11736 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11737 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
11738 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
11739 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
11740 // CHECK11-NEXT: call void @_Z3fn6v()
11741 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
11742 // CHECK11: omp.body.continue15:
11743 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
11744 // CHECK11: omp.inner.for.inc16:
11745 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11746 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
11747 // CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
11748 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP49:![0-9]+]]
11749 // CHECK11: omp.inner.for.end18:
11750 // CHECK11-NEXT: br label [[OMP_IF_END]]
11751 // CHECK11: omp_if.end:
11752 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11753 // CHECK11: omp.loop.exit:
11754 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11755 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
11756 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
11757 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11758 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
11759 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11760 // CHECK11: .omp.final.then:
11761 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
11762 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
11763 // CHECK11: .omp.final.done:
11764 // CHECK11-NEXT: ret void
11765 //
11766 //
11767 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
11768 // CHECK11-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
11769 // CHECK11-NEXT: entry:
11770 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
11771 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
11772 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
11773 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11774 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
11775 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
11776 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
11777 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
11778 // CHECK11-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
11779 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
11780 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
11781 // CHECK11-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
11782 // CHECK11-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11783 // CHECK11: omp_offload.failed:
11784 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
11785 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
11786 // CHECK11: omp_offload.cont:
11787 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]]
11788 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
11789 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
11790 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
11791 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
11792 // CHECK11-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
11793 // CHECK11-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
11794 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
11795 // CHECK11-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
11796 // CHECK11-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
11797 // CHECK11-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11798 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11799 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
11800 // CHECK11-NEXT: store i64 [[TMP4]], i64* [[TMP6]], align 8
11801 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11802 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
11803 // CHECK11-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
11804 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
11805 // CHECK11-NEXT: store i8* null, i8** [[TMP9]], align 8
11806 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11807 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11808 // CHECK11-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
11809 // CHECK11-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP12]] to i1
11810 // CHECK11-NEXT: [[TMP13:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
11811 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
11812 // CHECK11-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, i32 1, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP13]])
11813 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
11814 // CHECK11-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
11815 // CHECK11: omp_offload.failed5:
11816 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP4]]) #[[ATTR2]]
11817 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT6]]
11818 // CHECK11: omp_offload.cont6:
11819 // CHECK11-NEXT: ret i32 0
11820 //
11821 //
11822 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
11823 // CHECK11-SAME: () #[[ATTR1]] {
11824 // CHECK11-NEXT: entry:
11825 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..13 to void (i32*, i32*, ...)*))
11826 // CHECK11-NEXT: ret void
11827 //
11828 //
11829 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13
11830 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
11831 // CHECK11-NEXT: entry:
11832 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11833 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11834 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11835 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
11836 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11837 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11838 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11839 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11840 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
11841 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11842 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11843 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11844 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11845 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11846 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11847 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11848 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11849 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11850 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11851 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
11852 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11853 // CHECK11: cond.true:
11854 // CHECK11-NEXT: br label [[COND_END:%.*]]
11855 // CHECK11: cond.false:
11856 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11857 // CHECK11-NEXT: br label [[COND_END]]
11858 // CHECK11: cond.end:
11859 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11860 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11861 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11862 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11863 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11864 // CHECK11: omp.inner.for.cond:
11865 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
11866 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !50
11867 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11868 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11869 // CHECK11: omp.inner.for.body:
11870 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !50
11871 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
11872 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !50
11873 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
11874 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !50
11875 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11876 // CHECK11: omp.inner.for.inc:
11877 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
11878 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !50
11879 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
11880 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
11881 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
11882 // CHECK11: omp.inner.for.end:
11883 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11884 // CHECK11: omp.loop.exit:
11885 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11886 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11887 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
11888 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11889 // CHECK11: .omp.final.then:
11890 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
11891 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
11892 // CHECK11: .omp.final.done:
11893 // CHECK11-NEXT: ret void
11894 //
11895 //
11896 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..14
11897 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
11898 // CHECK11-NEXT: entry:
11899 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11900 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11901 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11902 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11903 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11904 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
11905 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11906 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11907 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11908 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11909 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
11910 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11911 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11912 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11913 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11914 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11915 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
11916 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11917 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
11918 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11919 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11920 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11921 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11922 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11923 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11924 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11925 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
11926 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11927 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11928 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
11929 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11930 // CHECK11: cond.true:
11931 // CHECK11-NEXT: br label [[COND_END:%.*]]
11932 // CHECK11: cond.false:
11933 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11934 // CHECK11-NEXT: br label [[COND_END]]
11935 // CHECK11: cond.end:
11936 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
11937 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11938 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11939 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
11940 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11941 // CHECK11: omp.inner.for.cond:
11942 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
11943 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !53
11944 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
11945 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11946 // CHECK11: omp.inner.for.body:
11947 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
11948 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
11949 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11950 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !53
11951 // CHECK11-NEXT: call void @_Z3fn1v(), !llvm.access.group !53
11952 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11953 // CHECK11: omp.body.continue:
11954 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11955 // CHECK11: omp.inner.for.inc:
11956 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
11957 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
11958 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
11959 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
11960 // CHECK11: omp.inner.for.end:
11961 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11962 // CHECK11: omp.loop.exit:
11963 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
11964 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11965 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
11966 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11967 // CHECK11: .omp.final.then:
11968 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
11969 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
11970 // CHECK11: .omp.final.done:
11971 // CHECK11-NEXT: ret void
11972 //
11973 //
11974 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66
11975 // CHECK11-SAME: () #[[ATTR1]] {
11976 // CHECK11-NEXT: entry:
11977 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..15 to void (i32*, i32*, ...)*))
11978 // CHECK11-NEXT: ret void
11979 //
11980 //
11981 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..15
11982 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
11983 // CHECK11-NEXT: entry:
11984 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11985 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11986 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11987 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
11988 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11989 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11990 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11991 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11992 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
11993 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
11994 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
11995 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11996 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11997 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11998 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
11999 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12000 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12001 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12002 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
12003 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12004 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12005 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
12006 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12007 // CHECK11: cond.true:
12008 // CHECK11-NEXT: br label [[COND_END:%.*]]
12009 // CHECK11: cond.false:
12010 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12011 // CHECK11-NEXT: br label [[COND_END]]
12012 // CHECK11: cond.end:
12013 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12014 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12015 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12016 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
12017 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12018 // CHECK11: omp.inner.for.cond:
12019 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12020 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12021 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
12022 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12023 // CHECK11: omp.inner.for.body:
12024 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12025 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
12026 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12027 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
12028 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
12029 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12030 // CHECK11-NEXT: call void @.omp_outlined..16(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
12031 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
12032 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12033 // CHECK11: omp.inner.for.inc:
12034 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12035 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12036 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12037 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12038 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
12039 // CHECK11: omp.inner.for.end:
12040 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12041 // CHECK11: omp.loop.exit:
12042 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
12043 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12044 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
12045 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12046 // CHECK11: .omp.final.then:
12047 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
12048 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
12049 // CHECK11: .omp.final.done:
12050 // CHECK11-NEXT: ret void
12051 //
12052 //
12053 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..16
12054 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
12055 // CHECK11-NEXT: entry:
12056 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12057 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12058 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12059 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12060 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12061 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
12062 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12063 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12064 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12065 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12066 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
12067 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12068 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12069 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12070 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12071 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12072 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
12073 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12074 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
12075 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12076 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
12077 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
12078 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
12079 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12080 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12081 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12082 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
12083 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12084 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12085 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
12086 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12087 // CHECK11: cond.true:
12088 // CHECK11-NEXT: br label [[COND_END:%.*]]
12089 // CHECK11: cond.false:
12090 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12091 // CHECK11-NEXT: br label [[COND_END]]
12092 // CHECK11: cond.end:
12093 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
12094 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12095 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12096 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
12097 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12098 // CHECK11: omp.inner.for.cond:
12099 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12100 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12101 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
12102 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12103 // CHECK11: omp.inner.for.body:
12104 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12105 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
12106 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12107 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
12108 // CHECK11-NEXT: call void @_Z3fn2v()
12109 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12110 // CHECK11: omp.body.continue:
12111 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12112 // CHECK11: omp.inner.for.inc:
12113 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12114 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
12115 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
12116 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
12117 // CHECK11: omp.inner.for.end:
12118 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12119 // CHECK11: omp.loop.exit:
12120 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
12121 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12122 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
12123 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12124 // CHECK11: .omp.final.then:
12125 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
12126 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
12127 // CHECK11: .omp.final.done:
12128 // CHECK11-NEXT: ret void
12129 //
12130 //
12131 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70
12132 // CHECK11-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
12133 // CHECK11-NEXT: entry:
12134 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12135 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12136 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12137 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
12138 // CHECK11-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
12139 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
12140 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
12141 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
12142 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
12143 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12144 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..17 to void (i32*, i32*, ...)*), i64 [[TMP1]])
12145 // CHECK11-NEXT: ret void
12146 //
12147 //
12148 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..17
12149 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
12150 // CHECK11-NEXT: entry:
12151 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12152 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12153 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12154 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12155 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
12156 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12157 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12158 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12159 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12160 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
12161 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
12162 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
12163 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12164 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12165 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12166 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
12167 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12168 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
12169 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12170 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12171 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12172 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
12173 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12174 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12175 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
12176 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12177 // CHECK11: cond.true:
12178 // CHECK11-NEXT: br label [[COND_END:%.*]]
12179 // CHECK11: cond.false:
12180 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12181 // CHECK11-NEXT: br label [[COND_END]]
12182 // CHECK11: cond.end:
12183 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12184 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12185 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12186 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
12187 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12188 // CHECK11: omp.inner.for.cond:
12189 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
12190 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
12191 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
12192 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12193 // CHECK11: omp.inner.for.body:
12194 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !58
12195 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
12196 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
12197 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
12198 // CHECK11-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !58
12199 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
12200 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
12201 // CHECK11: omp_if.then:
12202 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !58
12203 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
12204 // CHECK11: omp_if.else:
12205 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !58
12206 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !58
12207 // CHECK11-NEXT: call void @.omp_outlined..18(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !58
12208 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !58
12209 // CHECK11-NEXT: br label [[OMP_IF_END]]
12210 // CHECK11: omp_if.end:
12211 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12212 // CHECK11: omp.inner.for.inc:
12213 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
12214 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !58
12215 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
12216 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
12217 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
12218 // CHECK11: omp.inner.for.end:
12219 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12220 // CHECK11: omp.loop.exit:
12221 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
12222 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12223 // CHECK11-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
12224 // CHECK11-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12225 // CHECK11: .omp.final.then:
12226 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
12227 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
12228 // CHECK11: .omp.final.done:
12229 // CHECK11-NEXT: ret void
12230 //
12231 //
12232 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..18
12233 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
12234 // CHECK11-NEXT: entry:
12235 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12236 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12237 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12238 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12239 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12240 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
12241 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12242 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12243 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12244 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12245 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
12246 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12247 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12248 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12249 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12250 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12251 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
12252 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12253 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
12254 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12255 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
12256 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
12257 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
12258 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12259 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12260 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12261 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
12262 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12263 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12264 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
12265 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12266 // CHECK11: cond.true:
12267 // CHECK11-NEXT: br label [[COND_END:%.*]]
12268 // CHECK11: cond.false:
12269 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12270 // CHECK11-NEXT: br label [[COND_END]]
12271 // CHECK11: cond.end:
12272 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
12273 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12274 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12275 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
12276 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12277 // CHECK11: omp.inner.for.cond:
12278 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
12279 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61
12280 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
12281 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12282 // CHECK11: omp.inner.for.body:
12283 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
12284 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
12285 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12286 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !61
12287 // CHECK11-NEXT: call void @_Z3fn3v(), !llvm.access.group !61
12288 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12289 // CHECK11: omp.body.continue:
12290 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12291 // CHECK11: omp.inner.for.inc:
12292 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
12293 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
12294 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
12295 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]]
12296 // CHECK11: omp.inner.for.end:
12297 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12298 // CHECK11: omp.loop.exit:
12299 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
12300 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12301 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
12302 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12303 // CHECK11: .omp.final.then:
12304 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
12305 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
12306 // CHECK11: .omp.final.done:
12307 // CHECK11-NEXT: ret void
12308 //
12309 //
12310 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
12311 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] {
12312 // CHECK11-NEXT: entry:
12313 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
12314 // CHECK11-NEXT: ret void
12315 //
12316 //
12317 // CHECK12-LABEL: define {{[^@]+}}@_Z9gtid_testv
12318 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
12319 // CHECK12-NEXT: entry:
12320 // CHECK12-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
12321 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
12322 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
12323 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
12324 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
12325 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
12326 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* @Arg, align 4
12327 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
12328 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
12329 // CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
12330 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12331 // CHECK12-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
12332 // CHECK12-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
12333 // CHECK12-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12334 // CHECK12-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
12335 // CHECK12-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
12336 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
12337 // CHECK12-NEXT: store i8* null, i8** [[TMP6]], align 8
12338 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12339 // CHECK12-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12340 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
12341 // CHECK12-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12342 // CHECK12-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
12343 // CHECK12-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
12344 // CHECK12: omp_offload.failed:
12345 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
12346 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
12347 // CHECK12: omp_offload.cont:
12348 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
12349 // CHECK12-NEXT: [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
12350 // CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
12351 // CHECK12-NEXT: br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
12352 // CHECK12: omp_offload.failed2:
12353 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]]
12354 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT3]]
12355 // CHECK12: omp_offload.cont3:
12356 // CHECK12-NEXT: ret void
12357 //
12358 //
12359 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45
12360 // CHECK12-SAME: (i64 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
12361 // CHECK12-NEXT: entry:
12362 // CHECK12-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
12363 // CHECK12-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
12364 // CHECK12-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
12365 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
12366 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
12367 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
12368 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
12369 // CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
12370 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]])
12371 // CHECK12-NEXT: ret void
12372 //
12373 //
12374 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
12375 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
12376 // CHECK12-NEXT: entry:
12377 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12378 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12379 // CHECK12-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
12380 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12381 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
12382 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12383 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12384 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12385 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12386 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
12387 // CHECK12-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
12388 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12389 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12390 // CHECK12-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
12391 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
12392 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12393 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
12394 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12395 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12396 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12397 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
12398 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12399 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12400 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
12401 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12402 // CHECK12: cond.true:
12403 // CHECK12-NEXT: br label [[COND_END:%.*]]
12404 // CHECK12: cond.false:
12405 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12406 // CHECK12-NEXT: br label [[COND_END]]
12407 // CHECK12: cond.end:
12408 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12409 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12410 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12411 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
12412 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12413 // CHECK12: omp.inner.for.cond:
12414 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
12415 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
12416 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
12417 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12418 // CHECK12: omp.inner.for.body:
12419 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
12420 // CHECK12-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
12421 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
12422 // CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
12423 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8, !nontemporal !14, !llvm.access.group !13
12424 // CHECK12-NEXT: [[CONV2:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
12425 // CHECK12-NEXT: store i32 [[TMP11]], i32* [[CONV2]], align 4, !llvm.access.group !13
12426 // CHECK12-NEXT: [[TMP12:%.*]] = load i64, i64* [[ARG_CASTED]], align 8, !llvm.access.group !13
12427 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group !13
12428 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12429 // CHECK12: omp.inner.for.inc:
12430 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
12431 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
12432 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
12433 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
12434 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
12435 // CHECK12: omp.inner.for.end:
12436 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12437 // CHECK12: omp.loop.exit:
12438 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
12439 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12440 // CHECK12-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
12441 // CHECK12-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12442 // CHECK12: .omp.final.then:
12443 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
12444 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
12445 // CHECK12: .omp.final.done:
12446 // CHECK12-NEXT: ret void
12447 //
12448 //
12449 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
12450 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[ARG:%.*]]) #[[ATTR1]] {
12451 // CHECK12-NEXT: entry:
12452 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12453 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12454 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12455 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12456 // CHECK12-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
12457 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12458 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
12459 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12460 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12461 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12462 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12463 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
12464 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12465 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12466 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12467 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12468 // CHECK12-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
12469 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
12470 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12471 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
12472 // CHECK12-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12473 // CHECK12-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
12474 // CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12475 // CHECK12-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
12476 // CHECK12-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
12477 // CHECK12-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
12478 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12479 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12480 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12481 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
12482 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12483 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12484 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
12485 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12486 // CHECK12: cond.true:
12487 // CHECK12-NEXT: br label [[COND_END:%.*]]
12488 // CHECK12: cond.false:
12489 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12490 // CHECK12-NEXT: br label [[COND_END]]
12491 // CHECK12: cond.end:
12492 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
12493 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12494 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12495 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
12496 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12497 // CHECK12: omp.inner.for.cond:
12498 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
12499 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
12500 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
12501 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12502 // CHECK12: omp.inner.for.body:
12503 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
12504 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
12505 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12506 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18
12507 // CHECK12-NEXT: store i32 0, i32* [[CONV]], align 8, !nontemporal !14, !llvm.access.group !18
12508 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12509 // CHECK12: omp.body.continue:
12510 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12511 // CHECK12: omp.inner.for.inc:
12512 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
12513 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
12514 // CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
12515 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
12516 // CHECK12: omp.inner.for.end:
12517 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12518 // CHECK12: omp.loop.exit:
12519 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
12520 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12521 // CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
12522 // CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12523 // CHECK12: .omp.final.then:
12524 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
12525 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
12526 // CHECK12: .omp.final.done:
12527 // CHECK12-NEXT: ret void
12528 //
12529 //
12530 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53
12531 // CHECK12-SAME: () #[[ATTR1]] {
12532 // CHECK12-NEXT: entry:
12533 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
12534 // CHECK12-NEXT: ret void
12535 //
12536 //
12537 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2
12538 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
12539 // CHECK12-NEXT: entry:
12540 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12541 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12542 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12543 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
12544 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12545 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12546 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12547 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12548 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
12549 // CHECK12-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
12550 // CHECK12-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
12551 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12552 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12553 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12554 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
12555 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12556 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12557 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12558 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
12559 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12560 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12561 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
12562 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12563 // CHECK12: cond.true:
12564 // CHECK12-NEXT: br label [[COND_END:%.*]]
12565 // CHECK12: cond.false:
12566 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12567 // CHECK12-NEXT: br label [[COND_END]]
12568 // CHECK12: cond.end:
12569 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12570 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12571 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12572 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
12573 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12574 // CHECK12: omp.inner.for.cond:
12575 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
12576 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
12577 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
12578 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12579 // CHECK12: omp.inner.for.body:
12580 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
12581 // CHECK12-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
12582 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
12583 // CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
12584 // CHECK12-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !23
12585 // CHECK12-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !23
12586 // CHECK12-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !23
12587 // CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !23
12588 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12589 // CHECK12: omp.inner.for.inc:
12590 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
12591 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
12592 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12593 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
12594 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
12595 // CHECK12: omp.inner.for.end:
12596 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12597 // CHECK12: omp.loop.exit:
12598 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
12599 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12600 // CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
12601 // CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12602 // CHECK12: .omp.final.then:
12603 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
12604 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
12605 // CHECK12: .omp.final.done:
12606 // CHECK12-NEXT: ret void
12607 //
12608 //
12609 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3
12610 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
12611 // CHECK12-NEXT: entry:
12612 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12613 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12614 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12615 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12616 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12617 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
12618 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12619 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12620 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12621 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12622 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
12623 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12624 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12625 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12626 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12627 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12628 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
12629 // CHECK12-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12630 // CHECK12-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
12631 // CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12632 // CHECK12-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
12633 // CHECK12-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
12634 // CHECK12-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
12635 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12636 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12637 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12638 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
12639 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12640 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12641 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
12642 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12643 // CHECK12: cond.true:
12644 // CHECK12-NEXT: br label [[COND_END:%.*]]
12645 // CHECK12: cond.false:
12646 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12647 // CHECK12-NEXT: br label [[COND_END]]
12648 // CHECK12: cond.end:
12649 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
12650 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12651 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12652 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
12653 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12654 // CHECK12: omp.inner.for.cond:
12655 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
12656 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
12657 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
12658 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12659 // CHECK12: omp.inner.for.body:
12660 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
12661 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
12662 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12663 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !26
12664 // CHECK12-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !26
12665 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12666 // CHECK12: omp.body.continue:
12667 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12668 // CHECK12: omp.inner.for.inc:
12669 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
12670 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
12671 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
12672 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
12673 // CHECK12: omp.inner.for.end:
12674 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12675 // CHECK12: omp.loop.exit:
12676 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
12677 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12678 // CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
12679 // CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12680 // CHECK12: .omp.final.then:
12681 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
12682 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
12683 // CHECK12: .omp.final.done:
12684 // CHECK12-NEXT: ret void
12685 //
12686 //
12687 // CHECK12-LABEL: define {{[^@]+}}@main
12688 // CHECK12-SAME: () #[[ATTR3:[0-9]+]] {
12689 // CHECK12-NEXT: entry:
12690 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
12691 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
12692 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
12693 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12694 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
12695 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
12696 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
12697 // CHECK12-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
12698 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
12699 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
12700 // CHECK12-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
12701 // CHECK12-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
12702 // CHECK12-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
12703 // CHECK12: omp_offload.failed:
12704 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]]
12705 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
12706 // CHECK12: omp_offload.cont:
12707 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]]
12708 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* @Arg, align 4
12709 // CHECK12-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
12710 // CHECK12-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
12711 // CHECK12-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
12712 // CHECK12-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
12713 // CHECK12-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
12714 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
12715 // CHECK12-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
12716 // CHECK12-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
12717 // CHECK12-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12718 // CHECK12-NEXT: [[TMP5:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
12719 // CHECK12-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP5]] to i1
12720 // CHECK12-NEXT: br i1 [[TOBOOL3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
12721 // CHECK12: omp_if.then:
12722 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12723 // CHECK12-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
12724 // CHECK12-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
12725 // CHECK12-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12726 // CHECK12-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
12727 // CHECK12-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
12728 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
12729 // CHECK12-NEXT: store i8* null, i8** [[TMP10]], align 8
12730 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12731 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12732 // CHECK12-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
12733 // CHECK12-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP13]] to i1
12734 // CHECK12-NEXT: [[TMP14:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
12735 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
12736 // CHECK12-NEXT: [[TMP15:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP14]])
12737 // CHECK12-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
12738 // CHECK12-NEXT: br i1 [[TMP16]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
12739 // CHECK12: omp_offload.failed6:
12740 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
12741 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT7]]
12742 // CHECK12: omp_offload.cont7:
12743 // CHECK12-NEXT: br label [[OMP_IF_END:%.*]]
12744 // CHECK12: omp_if.else:
12745 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP4]]) #[[ATTR2]]
12746 // CHECK12-NEXT: br label [[OMP_IF_END]]
12747 // CHECK12: omp_if.end:
12748 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* @Arg, align 4
12749 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP17]])
12750 // CHECK12-NEXT: ret i32 [[CALL]]
12751 //
12752 //
12753 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78
12754 // CHECK12-SAME: () #[[ATTR1]] {
12755 // CHECK12-NEXT: entry:
12756 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
12757 // CHECK12-NEXT: ret void
12758 //
12759 //
12760 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..4
12761 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
12762 // CHECK12-NEXT: entry:
12763 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12764 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12765 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12766 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
12767 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12768 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12769 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12770 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12771 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
12772 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12773 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12774 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12775 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
12776 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12777 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12778 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12779 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
12780 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12781 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12782 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
12783 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12784 // CHECK12: cond.true:
12785 // CHECK12-NEXT: br label [[COND_END:%.*]]
12786 // CHECK12: cond.false:
12787 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12788 // CHECK12-NEXT: br label [[COND_END]]
12789 // CHECK12: cond.end:
12790 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12791 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12792 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12793 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
12794 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12795 // CHECK12: omp.inner.for.cond:
12796 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
12797 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
12798 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
12799 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12800 // CHECK12: omp.inner.for.body:
12801 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
12802 // CHECK12-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
12803 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
12804 // CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
12805 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !29
12806 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12807 // CHECK12: omp.inner.for.inc:
12808 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
12809 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
12810 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
12811 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
12812 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
12813 // CHECK12: omp.inner.for.end:
12814 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12815 // CHECK12: omp.loop.exit:
12816 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
12817 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12818 // CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
12819 // CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12820 // CHECK12: .omp.final.then:
12821 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
12822 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
12823 // CHECK12: .omp.final.done:
12824 // CHECK12-NEXT: ret void
12825 //
12826 //
12827 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..5
12828 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
12829 // CHECK12-NEXT: entry:
12830 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12831 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12832 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12833 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12834 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12835 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
12836 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12837 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12838 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12839 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12840 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
12841 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12842 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12843 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12844 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12845 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12846 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
12847 // CHECK12-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12848 // CHECK12-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
12849 // CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12850 // CHECK12-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
12851 // CHECK12-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
12852 // CHECK12-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
12853 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12854 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12855 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12856 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
12857 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12858 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12859 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
12860 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12861 // CHECK12: cond.true:
12862 // CHECK12-NEXT: br label [[COND_END:%.*]]
12863 // CHECK12: cond.false:
12864 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12865 // CHECK12-NEXT: br label [[COND_END]]
12866 // CHECK12: cond.end:
12867 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
12868 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12869 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12870 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
12871 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12872 // CHECK12: omp.inner.for.cond:
12873 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
12874 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
12875 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
12876 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12877 // CHECK12: omp.inner.for.body:
12878 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
12879 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
12880 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12881 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !32
12882 // CHECK12-NEXT: call void @_Z3fn4v(), !llvm.access.group !32
12883 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12884 // CHECK12: omp.body.continue:
12885 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12886 // CHECK12: omp.inner.for.inc:
12887 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
12888 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
12889 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
12890 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
12891 // CHECK12: omp.inner.for.end:
12892 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12893 // CHECK12: omp.loop.exit:
12894 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
12895 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12896 // CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
12897 // CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12898 // CHECK12: .omp.final.then:
12899 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
12900 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
12901 // CHECK12: .omp.final.done:
12902 // CHECK12-NEXT: ret void
12903 //
12904 //
12905 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85
12906 // CHECK12-SAME: () #[[ATTR1]] {
12907 // CHECK12-NEXT: entry:
12908 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
12909 // CHECK12-NEXT: ret void
12910 //
12911 //
12912 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..6
12913 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
12914 // CHECK12-NEXT: entry:
12915 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12916 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12917 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12918 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
12919 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12920 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12921 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12922 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12923 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
12924 // CHECK12-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
12925 // CHECK12-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
12926 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12927 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12928 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12929 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
12930 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12931 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12932 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12933 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
12934 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12935 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12936 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
12937 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12938 // CHECK12: cond.true:
12939 // CHECK12-NEXT: br label [[COND_END:%.*]]
12940 // CHECK12: cond.false:
12941 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12942 // CHECK12-NEXT: br label [[COND_END]]
12943 // CHECK12: cond.end:
12944 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12945 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12946 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12947 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
12948 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12949 // CHECK12: omp.inner.for.cond:
12950 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12951 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12952 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
12953 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12954 // CHECK12: omp.inner.for.body:
12955 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12956 // CHECK12-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
12957 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12958 // CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
12959 // CHECK12-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
12960 // CHECK12-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12961 // CHECK12-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
12962 // CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
12963 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12964 // CHECK12: omp.inner.for.inc:
12965 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12966 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12967 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12968 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12969 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
12970 // CHECK12: omp.inner.for.end:
12971 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12972 // CHECK12: omp.loop.exit:
12973 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
12974 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12975 // CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
12976 // CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12977 // CHECK12: .omp.final.then:
12978 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
12979 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
12980 // CHECK12: .omp.final.done:
12981 // CHECK12-NEXT: ret void
12982 //
12983 //
12984 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..7
12985 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
12986 // CHECK12-NEXT: entry:
12987 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12988 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12989 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12990 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12991 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12992 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
12993 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12994 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12995 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12996 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12997 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
12998 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12999 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13000 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13001 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13002 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13003 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
13004 // CHECK12-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13005 // CHECK12-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
13006 // CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13007 // CHECK12-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
13008 // CHECK12-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
13009 // CHECK12-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
13010 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13011 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13012 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13013 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
13014 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13015 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13016 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
13017 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13018 // CHECK12: cond.true:
13019 // CHECK12-NEXT: br label [[COND_END:%.*]]
13020 // CHECK12: cond.false:
13021 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13022 // CHECK12-NEXT: br label [[COND_END]]
13023 // CHECK12: cond.end:
13024 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
13025 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13026 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13027 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
13028 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13029 // CHECK12: omp.inner.for.cond:
13030 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13031 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13032 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
13033 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13034 // CHECK12: omp.inner.for.body:
13035 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13036 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
13037 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13038 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
13039 // CHECK12-NEXT: call void @_Z3fn5v()
13040 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13041 // CHECK12: omp.body.continue:
13042 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13043 // CHECK12: omp.inner.for.inc:
13044 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13045 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
13046 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
13047 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
13048 // CHECK12: omp.inner.for.end:
13049 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13050 // CHECK12: omp.loop.exit:
13051 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
13052 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13053 // CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
13054 // CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13055 // CHECK12: .omp.final.then:
13056 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
13057 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
13058 // CHECK12: .omp.final.done:
13059 // CHECK12-NEXT: ret void
13060 //
13061 //
13062 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
13063 // CHECK12-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
13064 // CHECK12-NEXT: entry:
13065 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13066 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
13067 // CHECK12-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
13068 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
13069 // CHECK12-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
13070 // CHECK12-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
13071 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
13072 // CHECK12-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
13073 // CHECK12-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
13074 // CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
13075 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP1]])
13076 // CHECK12-NEXT: ret void
13077 //
13078 //
13079 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..8
13080 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
13081 // CHECK12-NEXT: entry:
13082 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13083 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13084 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13085 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13086 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
13087 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13088 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13089 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13090 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13091 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
13092 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
13093 // CHECK12-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
13094 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED11:%.*]] = alloca i64, align 8
13095 // CHECK12-NEXT: [[DOTBOUND_ZERO_ADDR17:%.*]] = alloca i32, align 4
13096 // CHECK12-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR17]], align 4
13097 // CHECK12-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
13098 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13099 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13100 // CHECK12-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
13101 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
13102 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13103 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
13104 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13105 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13106 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13107 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
13108 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13109 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13110 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
13111 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13112 // CHECK12: cond.true:
13113 // CHECK12-NEXT: br label [[COND_END:%.*]]
13114 // CHECK12: cond.false:
13115 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13116 // CHECK12-NEXT: br label [[COND_END]]
13117 // CHECK12: cond.end:
13118 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
13119 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13120 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13121 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
13122 // CHECK12-NEXT: [[TMP5:%.*]] = load i8, i8* [[CONV]], align 8
13123 // CHECK12-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1
13124 // CHECK12-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]
13125 // CHECK12: omp_if.then:
13126 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13127 // CHECK12: omp.inner.for.cond:
13128 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
13129 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !38
13130 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
13131 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13132 // CHECK12: omp.inner.for.body:
13133 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !38
13134 // CHECK12-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
13135 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !38
13136 // CHECK12-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
13137 // CHECK12-NEXT: [[TMP12:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !38
13138 // CHECK12-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP12]] to i1
13139 // CHECK12-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
13140 // CHECK12-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8
13141 // CHECK12-NEXT: store i8 [[FROMBOOL]], i8* [[CONV3]], align 1, !llvm.access.group !38
13142 // CHECK12-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !38
13143 // CHECK12-NEXT: [[TMP14:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !38
13144 // CHECK12-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
13145 // CHECK12-NEXT: br i1 [[TOBOOL4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]
13146 // CHECK12: omp_if.then5:
13147 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group !38
13148 // CHECK12-NEXT: br label [[OMP_IF_END:%.*]]
13149 // CHECK12: omp_if.else:
13150 // CHECK12-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !38
13151 // CHECK12-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !38
13152 // CHECK12-NEXT: call void @.omp_outlined..9(i32* [[TMP15]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]) #[[ATTR2]], !llvm.access.group !38
13153 // CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !38
13154 // CHECK12-NEXT: br label [[OMP_IF_END]]
13155 // CHECK12: omp_if.end:
13156 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13157 // CHECK12: omp.inner.for.inc:
13158 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
13159 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !38
13160 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
13161 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
13162 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
13163 // CHECK12: omp.inner.for.end:
13164 // CHECK12-NEXT: br label [[OMP_IF_END22:%.*]]
13165 // CHECK12: omp_if.else6:
13166 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
13167 // CHECK12: omp.inner.for.cond7:
13168 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13169 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13170 // CHECK12-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
13171 // CHECK12-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END21:%.*]]
13172 // CHECK12: omp.inner.for.body9:
13173 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13174 // CHECK12-NEXT: [[TMP21:%.*]] = zext i32 [[TMP20]] to i64
13175 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13176 // CHECK12-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
13177 // CHECK12-NEXT: [[TMP24:%.*]] = load i8, i8* [[CONV]], align 8
13178 // CHECK12-NEXT: [[TOBOOL10:%.*]] = trunc i8 [[TMP24]] to i1
13179 // CHECK12-NEXT: [[CONV12:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED11]] to i8*
13180 // CHECK12-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[TOBOOL10]] to i8
13181 // CHECK12-NEXT: store i8 [[FROMBOOL13]], i8* [[CONV12]], align 1
13182 // CHECK12-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED11]], align 8
13183 // CHECK12-NEXT: [[TMP26:%.*]] = load i8, i8* [[CONV]], align 8
13184 // CHECK12-NEXT: [[TOBOOL14:%.*]] = trunc i8 [[TMP26]] to i1
13185 // CHECK12-NEXT: br i1 [[TOBOOL14]], label [[OMP_IF_THEN15:%.*]], label [[OMP_IF_ELSE16:%.*]]
13186 // CHECK12: omp_if.then15:
13187 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
13188 // CHECK12-NEXT: br label [[OMP_IF_END18:%.*]]
13189 // CHECK12: omp_if.else16:
13190 // CHECK12-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
13191 // CHECK12-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13192 // CHECK12-NEXT: call void @.omp_outlined..10(i32* [[TMP27]], i32* [[DOTBOUND_ZERO_ADDR17]], i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) #[[ATTR2]]
13193 // CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
13194 // CHECK12-NEXT: br label [[OMP_IF_END18]]
13195 // CHECK12: omp_if.end18:
13196 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
13197 // CHECK12: omp.inner.for.inc19:
13198 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13199 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13200 // CHECK12-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
13201 // CHECK12-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4
13202 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP41:![0-9]+]]
13203 // CHECK12: omp.inner.for.end21:
13204 // CHECK12-NEXT: br label [[OMP_IF_END22]]
13205 // CHECK12: omp_if.end22:
13206 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13207 // CHECK12: omp.loop.exit:
13208 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
13209 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13210 // CHECK12-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
13211 // CHECK12-NEXT: br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13212 // CHECK12: .omp.final.then:
13213 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
13214 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
13215 // CHECK12: .omp.final.done:
13216 // CHECK12-NEXT: ret void
13217 //
13218 //
13219 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..9
13220 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
13221 // CHECK12-NEXT: entry:
13222 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13223 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13224 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
13225 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
13226 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13227 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13228 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
13229 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13230 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13231 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13232 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13233 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
13234 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13235 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13236 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13237 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13238 // CHECK12-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
13239 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
13240 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13241 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
13242 // CHECK12-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13243 // CHECK12-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
13244 // CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13245 // CHECK12-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
13246 // CHECK12-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
13247 // CHECK12-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
13248 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13249 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13250 // CHECK12-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
13251 // CHECK12-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
13252 // CHECK12-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
13253 // CHECK12: omp_if.then:
13254 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13255 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
13256 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13257 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13258 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
13259 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13260 // CHECK12: cond.true:
13261 // CHECK12-NEXT: br label [[COND_END:%.*]]
13262 // CHECK12: cond.false:
13263 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13264 // CHECK12-NEXT: br label [[COND_END]]
13265 // CHECK12: cond.end:
13266 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
13267 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13268 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13269 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
13270 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13271 // CHECK12: omp.inner.for.cond:
13272 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
13273 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !42
13274 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
13275 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13276 // CHECK12: omp.inner.for.body:
13277 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
13278 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
13279 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13280 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !42
13281 // CHECK12-NEXT: call void @_Z3fn6v(), !llvm.access.group !42
13282 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13283 // CHECK12: omp.body.continue:
13284 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13285 // CHECK12: omp.inner.for.inc:
13286 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
13287 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
13288 // CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !42
13289 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
13290 // CHECK12: omp.inner.for.end:
13291 // CHECK12-NEXT: br label [[OMP_IF_END:%.*]]
13292 // CHECK12: omp_if.else:
13293 // CHECK12-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13294 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
13295 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13296 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13297 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
13298 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
13299 // CHECK12: cond.true6:
13300 // CHECK12-NEXT: br label [[COND_END8:%.*]]
13301 // CHECK12: cond.false7:
13302 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13303 // CHECK12-NEXT: br label [[COND_END8]]
13304 // CHECK12: cond.end8:
13305 // CHECK12-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
13306 // CHECK12-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
13307 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13308 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
13309 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
13310 // CHECK12: omp.inner.for.cond10:
13311 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13312 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13313 // CHECK12-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
13314 // CHECK12-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
13315 // CHECK12: omp.inner.for.body12:
13316 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13317 // CHECK12-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
13318 // CHECK12-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
13319 // CHECK12-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
13320 // CHECK12-NEXT: call void @_Z3fn6v()
13321 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
13322 // CHECK12: omp.body.continue15:
13323 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
13324 // CHECK12: omp.inner.for.inc16:
13325 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13326 // CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
13327 // CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
13328 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP45:![0-9]+]]
13329 // CHECK12: omp.inner.for.end18:
13330 // CHECK12-NEXT: br label [[OMP_IF_END]]
13331 // CHECK12: omp_if.end:
13332 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13333 // CHECK12: omp.loop.exit:
13334 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13335 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
13336 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
13337 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13338 // CHECK12-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
13339 // CHECK12-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13340 // CHECK12: .omp.final.then:
13341 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
13342 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
13343 // CHECK12: .omp.final.done:
13344 // CHECK12-NEXT: ret void
13345 //
13346 //
13347 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..10
13348 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
13349 // CHECK12-NEXT: entry:
13350 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13351 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13352 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
13353 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
13354 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13355 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13356 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
13357 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13358 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13359 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13360 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13361 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
13362 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13363 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13364 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13365 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13366 // CHECK12-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
13367 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
13368 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13369 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
13370 // CHECK12-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13371 // CHECK12-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
13372 // CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13373 // CHECK12-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
13374 // CHECK12-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
13375 // CHECK12-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
13376 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13377 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13378 // CHECK12-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 8
13379 // CHECK12-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
13380 // CHECK12-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
13381 // CHECK12: omp_if.then:
13382 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13383 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
13384 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13385 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13386 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
13387 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13388 // CHECK12: cond.true:
13389 // CHECK12-NEXT: br label [[COND_END:%.*]]
13390 // CHECK12: cond.false:
13391 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13392 // CHECK12-NEXT: br label [[COND_END]]
13393 // CHECK12: cond.end:
13394 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
13395 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13396 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13397 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
13398 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13399 // CHECK12: omp.inner.for.cond:
13400 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
13401 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !46
13402 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
13403 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13404 // CHECK12: omp.inner.for.body:
13405 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
13406 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
13407 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13408 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !46
13409 // CHECK12-NEXT: call void @_Z3fn6v(), !llvm.access.group !46
13410 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13411 // CHECK12: omp.body.continue:
13412 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13413 // CHECK12: omp.inner.for.inc:
13414 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
13415 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
13416 // CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
13417 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
13418 // CHECK12: omp.inner.for.end:
13419 // CHECK12-NEXT: br label [[OMP_IF_END:%.*]]
13420 // CHECK12: omp_if.else:
13421 // CHECK12-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13422 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
13423 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13424 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13425 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
13426 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
13427 // CHECK12: cond.true6:
13428 // CHECK12-NEXT: br label [[COND_END8:%.*]]
13429 // CHECK12: cond.false7:
13430 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13431 // CHECK12-NEXT: br label [[COND_END8]]
13432 // CHECK12: cond.end8:
13433 // CHECK12-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
13434 // CHECK12-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
13435 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13436 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
13437 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
13438 // CHECK12: omp.inner.for.cond10:
13439 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13440 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13441 // CHECK12-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
13442 // CHECK12-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
13443 // CHECK12: omp.inner.for.body12:
13444 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13445 // CHECK12-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
13446 // CHECK12-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
13447 // CHECK12-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
13448 // CHECK12-NEXT: call void @_Z3fn6v()
13449 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
13450 // CHECK12: omp.body.continue15:
13451 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
13452 // CHECK12: omp.inner.for.inc16:
13453 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13454 // CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
13455 // CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
13456 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP49:![0-9]+]]
13457 // CHECK12: omp.inner.for.end18:
13458 // CHECK12-NEXT: br label [[OMP_IF_END]]
13459 // CHECK12: omp_if.end:
13460 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13461 // CHECK12: omp.loop.exit:
13462 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13463 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
13464 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
13465 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13466 // CHECK12-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
13467 // CHECK12-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13468 // CHECK12: .omp.final.then:
13469 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
13470 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
13471 // CHECK12: .omp.final.done:
13472 // CHECK12-NEXT: ret void
13473 //
13474 //
13475 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
13476 // CHECK12-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
13477 // CHECK12-NEXT: entry:
13478 // CHECK12-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
13479 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
13480 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
13481 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
13482 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
13483 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
13484 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
13485 // CHECK12-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
13486 // CHECK12-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
13487 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
13488 // CHECK12-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
13489 // CHECK12-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
13490 // CHECK12-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
13491 // CHECK12: omp_offload.failed:
13492 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
13493 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
13494 // CHECK12: omp_offload.cont:
13495 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]]
13496 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
13497 // CHECK12-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
13498 // CHECK12-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
13499 // CHECK12-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
13500 // CHECK12-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
13501 // CHECK12-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
13502 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
13503 // CHECK12-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
13504 // CHECK12-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
13505 // CHECK12-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
13506 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13507 // CHECK12-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
13508 // CHECK12-NEXT: store i64 [[TMP4]], i64* [[TMP6]], align 8
13509 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13510 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
13511 // CHECK12-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
13512 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
13513 // CHECK12-NEXT: store i8* null, i8** [[TMP9]], align 8
13514 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13515 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13516 // CHECK12-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
13517 // CHECK12-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP12]] to i1
13518 // CHECK12-NEXT: [[TMP13:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
13519 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
13520 // CHECK12-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, i32 1, i8** [[TMP10]], i8** [[TMP11]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP13]])
13521 // CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
13522 // CHECK12-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
13523 // CHECK12: omp_offload.failed5:
13524 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP4]]) #[[ATTR2]]
13525 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT6]]
13526 // CHECK12: omp_offload.cont6:
13527 // CHECK12-NEXT: ret i32 0
13528 //
13529 //
13530 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
13531 // CHECK12-SAME: () #[[ATTR1]] {
13532 // CHECK12-NEXT: entry:
13533 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..13 to void (i32*, i32*, ...)*))
13534 // CHECK12-NEXT: ret void
13535 //
13536 //
13537 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..13
13538 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
13539 // CHECK12-NEXT: entry:
13540 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13541 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13542 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13543 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
13544 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13545 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13546 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13547 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13548 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
13549 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13550 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13551 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13552 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
13553 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13554 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13555 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13556 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
13557 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13558 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13559 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
13560 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13561 // CHECK12: cond.true:
13562 // CHECK12-NEXT: br label [[COND_END:%.*]]
13563 // CHECK12: cond.false:
13564 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13565 // CHECK12-NEXT: br label [[COND_END]]
13566 // CHECK12: cond.end:
13567 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
13568 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13569 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13570 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
13571 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13572 // CHECK12: omp.inner.for.cond:
13573 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
13574 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !50
13575 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
13576 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13577 // CHECK12: omp.inner.for.body:
13578 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !50
13579 // CHECK12-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
13580 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !50
13581 // CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
13582 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !50
13583 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13584 // CHECK12: omp.inner.for.inc:
13585 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
13586 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !50
13587 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
13588 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
13589 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
13590 // CHECK12: omp.inner.for.end:
13591 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13592 // CHECK12: omp.loop.exit:
13593 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
13594 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13595 // CHECK12-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
13596 // CHECK12-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13597 // CHECK12: .omp.final.then:
13598 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
13599 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
13600 // CHECK12: .omp.final.done:
13601 // CHECK12-NEXT: ret void
13602 //
13603 //
13604 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..14
13605 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
13606 // CHECK12-NEXT: entry:
13607 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13608 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13609 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
13610 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
13611 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13612 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
13613 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13614 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13615 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13616 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13617 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
13618 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13619 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13620 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13621 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13622 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13623 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
13624 // CHECK12-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13625 // CHECK12-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
13626 // CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13627 // CHECK12-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
13628 // CHECK12-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
13629 // CHECK12-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
13630 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13631 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13632 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13633 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
13634 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13635 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13636 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
13637 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13638 // CHECK12: cond.true:
13639 // CHECK12-NEXT: br label [[COND_END:%.*]]
13640 // CHECK12: cond.false:
13641 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13642 // CHECK12-NEXT: br label [[COND_END]]
13643 // CHECK12: cond.end:
13644 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
13645 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13646 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13647 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
13648 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13649 // CHECK12: omp.inner.for.cond:
13650 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
13651 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !53
13652 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
13653 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13654 // CHECK12: omp.inner.for.body:
13655 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
13656 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
13657 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13658 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !53
13659 // CHECK12-NEXT: call void @_Z3fn1v(), !llvm.access.group !53
13660 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13661 // CHECK12: omp.body.continue:
13662 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13663 // CHECK12: omp.inner.for.inc:
13664 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
13665 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
13666 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
13667 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
13668 // CHECK12: omp.inner.for.end:
13669 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13670 // CHECK12: omp.loop.exit:
13671 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
13672 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13673 // CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
13674 // CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13675 // CHECK12: .omp.final.then:
13676 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
13677 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
13678 // CHECK12: .omp.final.done:
13679 // CHECK12-NEXT: ret void
13680 //
13681 //
13682 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66
13683 // CHECK12-SAME: () #[[ATTR1]] {
13684 // CHECK12-NEXT: entry:
13685 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..15 to void (i32*, i32*, ...)*))
13686 // CHECK12-NEXT: ret void
13687 //
13688 //
13689 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..15
13690 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
13691 // CHECK12-NEXT: entry:
13692 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13693 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13694 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13695 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
13696 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13697 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13698 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13699 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13700 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
13701 // CHECK12-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
13702 // CHECK12-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
13703 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13704 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13705 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13706 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
13707 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13708 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13709 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13710 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
13711 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13712 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13713 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
13714 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13715 // CHECK12: cond.true:
13716 // CHECK12-NEXT: br label [[COND_END:%.*]]
13717 // CHECK12: cond.false:
13718 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13719 // CHECK12-NEXT: br label [[COND_END]]
13720 // CHECK12: cond.end:
13721 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
13722 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13723 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13724 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
13725 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13726 // CHECK12: omp.inner.for.cond:
13727 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13728 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13729 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
13730 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13731 // CHECK12: omp.inner.for.body:
13732 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13733 // CHECK12-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
13734 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13735 // CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
13736 // CHECK12-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
13737 // CHECK12-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13738 // CHECK12-NEXT: call void @.omp_outlined..16(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
13739 // CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
13740 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13741 // CHECK12: omp.inner.for.inc:
13742 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13743 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13744 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
13745 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13746 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
13747 // CHECK12: omp.inner.for.end:
13748 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13749 // CHECK12: omp.loop.exit:
13750 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
13751 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13752 // CHECK12-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
13753 // CHECK12-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13754 // CHECK12: .omp.final.then:
13755 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
13756 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
13757 // CHECK12: .omp.final.done:
13758 // CHECK12-NEXT: ret void
13759 //
13760 //
13761 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..16
13762 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
13763 // CHECK12-NEXT: entry:
13764 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13765 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13766 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
13767 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
13768 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13769 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
13770 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13771 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13772 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13773 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13774 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
13775 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13776 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13777 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13778 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13779 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13780 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
13781 // CHECK12-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13782 // CHECK12-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
13783 // CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13784 // CHECK12-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
13785 // CHECK12-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
13786 // CHECK12-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
13787 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13788 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13789 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13790 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
13791 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13792 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13793 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
13794 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13795 // CHECK12: cond.true:
13796 // CHECK12-NEXT: br label [[COND_END:%.*]]
13797 // CHECK12: cond.false:
13798 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13799 // CHECK12-NEXT: br label [[COND_END]]
13800 // CHECK12: cond.end:
13801 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
13802 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13803 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13804 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
13805 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13806 // CHECK12: omp.inner.for.cond:
13807 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13808 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13809 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
13810 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13811 // CHECK12: omp.inner.for.body:
13812 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13813 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
13814 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13815 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
13816 // CHECK12-NEXT: call void @_Z3fn2v()
13817 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13818 // CHECK12: omp.body.continue:
13819 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13820 // CHECK12: omp.inner.for.inc:
13821 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13822 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
13823 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
13824 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
13825 // CHECK12: omp.inner.for.end:
13826 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13827 // CHECK12: omp.loop.exit:
13828 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
13829 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13830 // CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
13831 // CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13832 // CHECK12: .omp.final.then:
13833 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
13834 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
13835 // CHECK12: .omp.final.done:
13836 // CHECK12-NEXT: ret void
13837 //
13838 //
13839 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70
13840 // CHECK12-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
13841 // CHECK12-NEXT: entry:
13842 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13843 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
13844 // CHECK12-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
13845 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
13846 // CHECK12-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 8
13847 // CHECK12-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
13848 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
13849 // CHECK12-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
13850 // CHECK12-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
13851 // CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
13852 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..17 to void (i32*, i32*, ...)*), i64 [[TMP1]])
13853 // CHECK12-NEXT: ret void
13854 //
13855 //
13856 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..17
13857 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
13858 // CHECK12-NEXT: entry:
13859 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13860 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13861 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13862 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13863 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
13864 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13865 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13866 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13867 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13868 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
13869 // CHECK12-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
13870 // CHECK12-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
13871 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13872 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13873 // CHECK12-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
13874 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
13875 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13876 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
13877 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13878 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13879 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13880 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
13881 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13882 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13883 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
13884 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13885 // CHECK12: cond.true:
13886 // CHECK12-NEXT: br label [[COND_END:%.*]]
13887 // CHECK12: cond.false:
13888 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13889 // CHECK12-NEXT: br label [[COND_END]]
13890 // CHECK12: cond.end:
13891 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
13892 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13893 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13894 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
13895 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13896 // CHECK12: omp.inner.for.cond:
13897 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
13898 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
13899 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
13900 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13901 // CHECK12: omp.inner.for.body:
13902 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !58
13903 // CHECK12-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
13904 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
13905 // CHECK12-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
13906 // CHECK12-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8, !llvm.access.group !58
13907 // CHECK12-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
13908 // CHECK12-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
13909 // CHECK12: omp_if.then:
13910 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !58
13911 // CHECK12-NEXT: br label [[OMP_IF_END:%.*]]
13912 // CHECK12: omp_if.else:
13913 // CHECK12-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !58
13914 // CHECK12-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group !58
13915 // CHECK12-NEXT: call void @.omp_outlined..18(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group !58
13916 // CHECK12-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group !58
13917 // CHECK12-NEXT: br label [[OMP_IF_END]]
13918 // CHECK12: omp_if.end:
13919 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13920 // CHECK12: omp.inner.for.inc:
13921 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
13922 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !58
13923 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
13924 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
13925 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
13926 // CHECK12: omp.inner.for.end:
13927 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13928 // CHECK12: omp.loop.exit:
13929 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
13930 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13931 // CHECK12-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
13932 // CHECK12-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13933 // CHECK12: .omp.final.then:
13934 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
13935 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
13936 // CHECK12: .omp.final.done:
13937 // CHECK12-NEXT: ret void
13938 //
13939 //
13940 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..18
13941 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
13942 // CHECK12-NEXT: entry:
13943 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13944 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13945 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
13946 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
13947 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13948 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
13949 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13950 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13951 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13952 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13953 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
13954 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13955 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13956 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13957 // CHECK12-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13958 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13959 // CHECK12-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
13960 // CHECK12-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13961 // CHECK12-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
13962 // CHECK12-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13963 // CHECK12-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
13964 // CHECK12-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
13965 // CHECK12-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
13966 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13967 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13968 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13969 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
13970 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13971 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13972 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
13973 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13974 // CHECK12: cond.true:
13975 // CHECK12-NEXT: br label [[COND_END:%.*]]
13976 // CHECK12: cond.false:
13977 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13978 // CHECK12-NEXT: br label [[COND_END]]
13979 // CHECK12: cond.end:
13980 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
13981 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13982 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13983 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
13984 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13985 // CHECK12: omp.inner.for.cond:
13986 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
13987 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61
13988 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
13989 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13990 // CHECK12: omp.inner.for.body:
13991 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
13992 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
13993 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13994 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !61
13995 // CHECK12-NEXT: call void @_Z3fn3v(), !llvm.access.group !61
13996 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13997 // CHECK12: omp.body.continue:
13998 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13999 // CHECK12: omp.inner.for.inc:
14000 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
14001 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
14002 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
14003 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]]
14004 // CHECK12: omp.inner.for.end:
14005 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14006 // CHECK12: omp.loop.exit:
14007 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
14008 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14009 // CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
14010 // CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14011 // CHECK12: .omp.final.then:
14012 // CHECK12-NEXT: store i32 100, i32* [[I]], align 4
14013 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
14014 // CHECK12: .omp.final.done:
14015 // CHECK12-NEXT: ret void
14016 //
14017 //
14018 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
14019 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] {
14020 // CHECK12-NEXT: entry:
14021 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1)
14022 // CHECK12-NEXT: ret void
14023 //
14024 //
14025 // CHECK13-LABEL: define {{[^@]+}}@_Z9gtid_testv
14026 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
14027 // CHECK13-NEXT: entry:
14028 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
14029 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14030 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14031 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14032 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
14033 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
14034 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
14035 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
14036 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
14037 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
14038 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14039 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
14040 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14041 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
14042 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14043 // CHECK13: omp.inner.for.cond:
14044 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14045 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
14046 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
14047 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14048 // CHECK13: omp.inner.for.body:
14049 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14050 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
14051 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14052 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
14053 // CHECK13-NEXT: store i32 0, i32* @Arg, align 4, !llvm.access.group !6
14054 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14055 // CHECK13: omp.body.continue:
14056 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14057 // CHECK13: omp.inner.for.inc:
14058 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14059 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
14060 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14061 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
14062 // CHECK13: omp.inner.for.end:
14063 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
14064 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
14065 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
14066 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
14067 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
14068 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
14069 // CHECK13: omp.inner.for.cond7:
14070 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10
14071 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !10
14072 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14073 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
14074 // CHECK13: omp.inner.for.body9:
14075 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10
14076 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
14077 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
14078 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !10
14079 // CHECK13-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !10
14080 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
14081 // CHECK13: omp.body.continue12:
14082 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
14083 // CHECK13: omp.inner.for.inc13:
14084 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10
14085 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
14086 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10
14087 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]
14088 // CHECK13: omp.inner.for.end15:
14089 // CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
14090 // CHECK13-NEXT: ret void
14091 //
14092 //
14093 // CHECK13-LABEL: define {{[^@]+}}@main
14094 // CHECK13-SAME: () #[[ATTR1:[0-9]+]] {
14095 // CHECK13-NEXT: entry:
14096 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
14097 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
14098 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14099 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14100 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14101 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
14102 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
14103 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
14104 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
14105 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
14106 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
14107 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
14108 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
14109 // CHECK13-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
14110 // CHECK13-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
14111 // CHECK13-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
14112 // CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4
14113 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
14114 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14115 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
14116 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14117 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
14118 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14119 // CHECK13: omp.inner.for.cond:
14120 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
14121 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
14122 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
14123 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14124 // CHECK13: omp.inner.for.body:
14125 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
14126 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
14127 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14128 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
14129 // CHECK13-NEXT: call void @_Z3fn4v(), !llvm.access.group !13
14130 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14131 // CHECK13: omp.body.continue:
14132 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14133 // CHECK13: omp.inner.for.inc:
14134 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
14135 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
14136 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
14137 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
14138 // CHECK13: omp.inner.for.end:
14139 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
14140 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
14141 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
14142 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
14143 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
14144 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
14145 // CHECK13: omp.inner.for.cond7:
14146 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
14147 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16
14148 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14149 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
14150 // CHECK13: omp.inner.for.body9:
14151 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
14152 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
14153 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
14154 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16
14155 // CHECK13-NEXT: call void @_Z3fn5v(), !llvm.access.group !16
14156 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
14157 // CHECK13: omp.body.continue12:
14158 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
14159 // CHECK13: omp.inner.for.inc13:
14160 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
14161 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
14162 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
14163 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
14164 // CHECK13: omp.inner.for.end15:
14165 // CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
14166 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
14167 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
14168 // CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
14169 // CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
14170 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
14171 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
14172 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
14173 // CHECK13-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
14174 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
14175 // CHECK13: omp.inner.for.cond21:
14176 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
14177 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !19
14178 // CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
14179 // CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
14180 // CHECK13: omp.inner.for.body23:
14181 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
14182 // CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
14183 // CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
14184 // CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !19
14185 // CHECK13-NEXT: call void @_Z3fn6v(), !llvm.access.group !19
14186 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
14187 // CHECK13: omp.body.continue26:
14188 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
14189 // CHECK13: omp.inner.for.inc27:
14190 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
14191 // CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
14192 // CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
14193 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP20:![0-9]+]]
14194 // CHECK13: omp.inner.for.end29:
14195 // CHECK13-NEXT: store i32 100, i32* [[I20]], align 4
14196 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* @Arg, align 4
14197 // CHECK13-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP16]])
14198 // CHECK13-NEXT: ret i32 [[CALL]]
14199 //
14200 //
14201 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
14202 // CHECK13-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
14203 // CHECK13-NEXT: entry:
14204 // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
14205 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
14206 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14207 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14208 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14209 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
14210 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
14211 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
14212 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
14213 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
14214 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
14215 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
14216 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
14217 // CHECK13-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
14218 // CHECK13-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
14219 // CHECK13-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
14220 // CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4
14221 // CHECK13-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
14222 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14223 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
14224 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14225 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
14226 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14227 // CHECK13: omp.inner.for.cond:
14228 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14229 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
14230 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
14231 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14232 // CHECK13: omp.inner.for.body:
14233 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14234 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
14235 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14236 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
14237 // CHECK13-NEXT: call void @_Z3fn1v(), !llvm.access.group !22
14238 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14239 // CHECK13: omp.body.continue:
14240 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14241 // CHECK13: omp.inner.for.inc:
14242 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14243 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
14244 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14245 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
14246 // CHECK13: omp.inner.for.end:
14247 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
14248 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
14249 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
14250 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
14251 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
14252 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
14253 // CHECK13: omp.inner.for.cond7:
14254 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !25
14255 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !25
14256 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14257 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
14258 // CHECK13: omp.inner.for.body9:
14259 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !25
14260 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
14261 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
14262 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !25
14263 // CHECK13-NEXT: call void @_Z3fn2v(), !llvm.access.group !25
14264 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
14265 // CHECK13: omp.body.continue12:
14266 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
14267 // CHECK13: omp.inner.for.inc13:
14268 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !25
14269 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
14270 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !25
14271 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP26:![0-9]+]]
14272 // CHECK13: omp.inner.for.end15:
14273 // CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
14274 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
14275 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
14276 // CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
14277 // CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
14278 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
14279 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
14280 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
14281 // CHECK13-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
14282 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
14283 // CHECK13: omp.inner.for.cond21:
14284 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !28
14285 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !28
14286 // CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
14287 // CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
14288 // CHECK13: omp.inner.for.body23:
14289 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !28
14290 // CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
14291 // CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
14292 // CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !28
14293 // CHECK13-NEXT: call void @_Z3fn3v(), !llvm.access.group !28
14294 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
14295 // CHECK13: omp.body.continue26:
14296 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
14297 // CHECK13: omp.inner.for.inc27:
14298 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !28
14299 // CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
14300 // CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !28
14301 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP29:![0-9]+]]
14302 // CHECK13: omp.inner.for.end29:
14303 // CHECK13-NEXT: store i32 100, i32* [[I20]], align 4
14304 // CHECK13-NEXT: ret i32 0
14305 //
14306 //
14307 // CHECK14-LABEL: define {{[^@]+}}@_Z9gtid_testv
14308 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] {
14309 // CHECK14-NEXT: entry:
14310 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
14311 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14312 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14313 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14314 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
14315 // CHECK14-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
14316 // CHECK14-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
14317 // CHECK14-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
14318 // CHECK14-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
14319 // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4
14320 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14321 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
14322 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14323 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
14324 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14325 // CHECK14: omp.inner.for.cond:
14326 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14327 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
14328 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
14329 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14330 // CHECK14: omp.inner.for.body:
14331 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14332 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
14333 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14334 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
14335 // CHECK14-NEXT: store i32 0, i32* @Arg, align 4, !llvm.access.group !6
14336 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14337 // CHECK14: omp.body.continue:
14338 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14339 // CHECK14: omp.inner.for.inc:
14340 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14341 // CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
14342 // CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14343 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
14344 // CHECK14: omp.inner.for.end:
14345 // CHECK14-NEXT: store i32 100, i32* [[I]], align 4
14346 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
14347 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
14348 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
14349 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
14350 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
14351 // CHECK14: omp.inner.for.cond7:
14352 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10
14353 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !10
14354 // CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14355 // CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
14356 // CHECK14: omp.inner.for.body9:
14357 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10
14358 // CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
14359 // CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
14360 // CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !10
14361 // CHECK14-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !10
14362 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
14363 // CHECK14: omp.body.continue12:
14364 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
14365 // CHECK14: omp.inner.for.inc13:
14366 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10
14367 // CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
14368 // CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !10
14369 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP11:![0-9]+]]
14370 // CHECK14: omp.inner.for.end15:
14371 // CHECK14-NEXT: store i32 100, i32* [[I6]], align 4
14372 // CHECK14-NEXT: ret void
14373 //
14374 //
14375 // CHECK14-LABEL: define {{[^@]+}}@main
14376 // CHECK14-SAME: () #[[ATTR1:[0-9]+]] {
14377 // CHECK14-NEXT: entry:
14378 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
14379 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
14380 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14381 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14382 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14383 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
14384 // CHECK14-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
14385 // CHECK14-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
14386 // CHECK14-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
14387 // CHECK14-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
14388 // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4
14389 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
14390 // CHECK14-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
14391 // CHECK14-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
14392 // CHECK14-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
14393 // CHECK14-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
14394 // CHECK14-NEXT: [[I20:%.*]] = alloca i32, align 4
14395 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4
14396 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14397 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
14398 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14399 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
14400 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14401 // CHECK14: omp.inner.for.cond:
14402 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
14403 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
14404 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
14405 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14406 // CHECK14: omp.inner.for.body:
14407 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
14408 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
14409 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14410 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
14411 // CHECK14-NEXT: call void @_Z3fn4v(), !llvm.access.group !13
14412 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14413 // CHECK14: omp.body.continue:
14414 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14415 // CHECK14: omp.inner.for.inc:
14416 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
14417 // CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
14418 // CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
14419 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
14420 // CHECK14: omp.inner.for.end:
14421 // CHECK14-NEXT: store i32 100, i32* [[I]], align 4
14422 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
14423 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
14424 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
14425 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
14426 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
14427 // CHECK14: omp.inner.for.cond7:
14428 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
14429 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16
14430 // CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14431 // CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
14432 // CHECK14: omp.inner.for.body9:
14433 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
14434 // CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
14435 // CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
14436 // CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16
14437 // CHECK14-NEXT: call void @_Z3fn5v(), !llvm.access.group !16
14438 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
14439 // CHECK14: omp.body.continue12:
14440 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
14441 // CHECK14: omp.inner.for.inc13:
14442 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
14443 // CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
14444 // CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
14445 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
14446 // CHECK14: omp.inner.for.end15:
14447 // CHECK14-NEXT: store i32 100, i32* [[I6]], align 4
14448 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
14449 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
14450 // CHECK14-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
14451 // CHECK14-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
14452 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
14453 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
14454 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
14455 // CHECK14-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
14456 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
14457 // CHECK14: omp.inner.for.cond21:
14458 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
14459 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !19
14460 // CHECK14-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
14461 // CHECK14-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
14462 // CHECK14: omp.inner.for.body23:
14463 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
14464 // CHECK14-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
14465 // CHECK14-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
14466 // CHECK14-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !19
14467 // CHECK14-NEXT: call void @_Z3fn6v(), !llvm.access.group !19
14468 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
14469 // CHECK14: omp.body.continue26:
14470 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
14471 // CHECK14: omp.inner.for.inc27:
14472 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
14473 // CHECK14-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
14474 // CHECK14-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
14475 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP20:![0-9]+]]
14476 // CHECK14: omp.inner.for.end29:
14477 // CHECK14-NEXT: store i32 100, i32* [[I20]], align 4
14478 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* @Arg, align 4
14479 // CHECK14-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP16]])
14480 // CHECK14-NEXT: ret i32 [[CALL]]
14481 //
14482 //
14483 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
14484 // CHECK14-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
14485 // CHECK14-NEXT: entry:
14486 // CHECK14-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
14487 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
14488 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14489 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14490 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14491 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
14492 // CHECK14-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
14493 // CHECK14-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
14494 // CHECK14-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
14495 // CHECK14-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
14496 // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4
14497 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
14498 // CHECK14-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
14499 // CHECK14-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
14500 // CHECK14-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
14501 // CHECK14-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
14502 // CHECK14-NEXT: [[I20:%.*]] = alloca i32, align 4
14503 // CHECK14-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
14504 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14505 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
14506 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14507 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
14508 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14509 // CHECK14: omp.inner.for.cond:
14510 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14511 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
14512 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
14513 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14514 // CHECK14: omp.inner.for.body:
14515 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14516 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
14517 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14518 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
14519 // CHECK14-NEXT: call void @_Z3fn1v(), !llvm.access.group !22
14520 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14521 // CHECK14: omp.body.continue:
14522 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14523 // CHECK14: omp.inner.for.inc:
14524 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14525 // CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
14526 // CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14527 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
14528 // CHECK14: omp.inner.for.end:
14529 // CHECK14-NEXT: store i32 100, i32* [[I]], align 4
14530 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
14531 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
14532 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
14533 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
14534 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
14535 // CHECK14: omp.inner.for.cond7:
14536 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !25
14537 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !25
14538 // CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14539 // CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
14540 // CHECK14: omp.inner.for.body9:
14541 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !25
14542 // CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
14543 // CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
14544 // CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !25
14545 // CHECK14-NEXT: call void @_Z3fn2v(), !llvm.access.group !25
14546 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
14547 // CHECK14: omp.body.continue12:
14548 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
14549 // CHECK14: omp.inner.for.inc13:
14550 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !25
14551 // CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
14552 // CHECK14-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !25
14553 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP26:![0-9]+]]
14554 // CHECK14: omp.inner.for.end15:
14555 // CHECK14-NEXT: store i32 100, i32* [[I6]], align 4
14556 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
14557 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
14558 // CHECK14-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
14559 // CHECK14-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
14560 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
14561 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
14562 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
14563 // CHECK14-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
14564 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
14565 // CHECK14: omp.inner.for.cond21:
14566 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !28
14567 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !28
14568 // CHECK14-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
14569 // CHECK14-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
14570 // CHECK14: omp.inner.for.body23:
14571 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !28
14572 // CHECK14-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
14573 // CHECK14-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
14574 // CHECK14-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !28
14575 // CHECK14-NEXT: call void @_Z3fn3v(), !llvm.access.group !28
14576 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
14577 // CHECK14: omp.body.continue26:
14578 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
14579 // CHECK14: omp.inner.for.inc27:
14580 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !28
14581 // CHECK14-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
14582 // CHECK14-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !28
14583 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP29:![0-9]+]]
14584 // CHECK14: omp.inner.for.end29:
14585 // CHECK14-NEXT: store i32 100, i32* [[I20]], align 4
14586 // CHECK14-NEXT: ret i32 0
14587 //
14588 //
14589 // CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv
14590 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
14591 // CHECK15-NEXT: entry:
14592 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
14593 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14594 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14595 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14596 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
14597 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
14598 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
14599 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
14600 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
14601 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
14602 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14603 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
14604 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14605 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
14606 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14607 // CHECK15: omp.inner.for.cond:
14608 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14609 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
14610 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
14611 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14612 // CHECK15: omp.inner.for.body:
14613 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14614 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
14615 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14616 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
14617 // CHECK15-NEXT: store i32 0, i32* @Arg, align 4, !nontemporal !7, !llvm.access.group !6
14618 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14619 // CHECK15: omp.body.continue:
14620 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14621 // CHECK15: omp.inner.for.inc:
14622 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14623 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
14624 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14625 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
14626 // CHECK15: omp.inner.for.end:
14627 // CHECK15-NEXT: store i32 100, i32* [[I]], align 4
14628 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
14629 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
14630 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
14631 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
14632 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
14633 // CHECK15: omp.inner.for.cond7:
14634 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !11
14635 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !11
14636 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14637 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
14638 // CHECK15: omp.inner.for.body9:
14639 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !11
14640 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
14641 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
14642 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !11
14643 // CHECK15-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !11
14644 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
14645 // CHECK15: omp.body.continue12:
14646 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
14647 // CHECK15: omp.inner.for.inc13:
14648 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !11
14649 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
14650 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !11
14651 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP12:![0-9]+]]
14652 // CHECK15: omp.inner.for.end15:
14653 // CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
14654 // CHECK15-NEXT: ret void
14655 //
14656 //
14657 // CHECK15-LABEL: define {{[^@]+}}@main
14658 // CHECK15-SAME: () #[[ATTR1:[0-9]+]] {
14659 // CHECK15-NEXT: entry:
14660 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
14661 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
14662 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14663 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14664 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14665 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
14666 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
14667 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
14668 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
14669 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
14670 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
14671 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
14672 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
14673 // CHECK15-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
14674 // CHECK15-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
14675 // CHECK15-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
14676 // CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4
14677 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
14678 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14679 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
14680 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14681 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
14682 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14683 // CHECK15: omp.inner.for.cond:
14684 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
14685 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
14686 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
14687 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14688 // CHECK15: omp.inner.for.body:
14689 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
14690 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
14691 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14692 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
14693 // CHECK15-NEXT: call void @_Z3fn4v(), !llvm.access.group !14
14694 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14695 // CHECK15: omp.body.continue:
14696 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14697 // CHECK15: omp.inner.for.inc:
14698 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
14699 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
14700 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
14701 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
14702 // CHECK15: omp.inner.for.end:
14703 // CHECK15-NEXT: store i32 100, i32* [[I]], align 4
14704 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
14705 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
14706 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
14707 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
14708 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
14709 // CHECK15: omp.inner.for.cond7:
14710 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
14711 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
14712 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14713 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
14714 // CHECK15: omp.inner.for.body9:
14715 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
14716 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
14717 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
14718 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
14719 // CHECK15-NEXT: call void @_Z3fn5v()
14720 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
14721 // CHECK15: omp.body.continue12:
14722 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
14723 // CHECK15: omp.inner.for.inc13:
14724 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
14725 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
14726 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
14727 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
14728 // CHECK15: omp.inner.for.end15:
14729 // CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
14730 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
14731 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
14732 // CHECK15-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
14733 // CHECK15-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
14734 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
14735 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
14736 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
14737 // CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
14738 // CHECK15-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
14739 // CHECK15-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
14740 // CHECK15-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
14741 // CHECK15: omp_if.then:
14742 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
14743 // CHECK15: omp.inner.for.cond22:
14744 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
14745 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !19
14746 // CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
14747 // CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END30:%.*]]
14748 // CHECK15: omp.inner.for.body24:
14749 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
14750 // CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
14751 // CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
14752 // CHECK15-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group !19
14753 // CHECK15-NEXT: call void @_Z3fn6v(), !llvm.access.group !19
14754 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
14755 // CHECK15: omp.body.continue27:
14756 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
14757 // CHECK15: omp.inner.for.inc28:
14758 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
14759 // CHECK15-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
14760 // CHECK15-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
14761 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]]
14762 // CHECK15: omp.inner.for.end30:
14763 // CHECK15-NEXT: br label [[OMP_IF_END:%.*]]
14764 // CHECK15: omp_if.else:
14765 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
14766 // CHECK15: omp.inner.for.cond31:
14767 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
14768 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4
14769 // CHECK15-NEXT: [[CMP32:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
14770 // CHECK15-NEXT: br i1 [[CMP32]], label [[OMP_INNER_FOR_BODY33:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
14771 // CHECK15: omp.inner.for.body33:
14772 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
14773 // CHECK15-NEXT: [[MUL34:%.*]] = mul nsw i32 [[TMP19]], 1
14774 // CHECK15-NEXT: [[ADD35:%.*]] = add nsw i32 0, [[MUL34]]
14775 // CHECK15-NEXT: store i32 [[ADD35]], i32* [[I20]], align 4
14776 // CHECK15-NEXT: call void @_Z3fn6v()
14777 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
14778 // CHECK15: omp.body.continue36:
14779 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
14780 // CHECK15: omp.inner.for.inc37:
14781 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
14782 // CHECK15-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP20]], 1
14783 // CHECK15-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV19]], align 4
14784 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND31]], !llvm.loop [[LOOP22:![0-9]+]]
14785 // CHECK15: omp.inner.for.end39:
14786 // CHECK15-NEXT: br label [[OMP_IF_END]]
14787 // CHECK15: omp_if.end:
14788 // CHECK15-NEXT: store i32 100, i32* [[I20]], align 4
14789 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* @Arg, align 4
14790 // CHECK15-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP21]])
14791 // CHECK15-NEXT: ret i32 [[CALL]]
14792 //
14793 //
14794 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
14795 // CHECK15-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
14796 // CHECK15-NEXT: entry:
14797 // CHECK15-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
14798 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
14799 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14800 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14801 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14802 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
14803 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
14804 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
14805 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
14806 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
14807 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
14808 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
14809 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
14810 // CHECK15-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
14811 // CHECK15-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
14812 // CHECK15-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
14813 // CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4
14814 // CHECK15-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
14815 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14816 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
14817 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14818 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
14819 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14820 // CHECK15: omp.inner.for.cond:
14821 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
14822 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23
14823 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
14824 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14825 // CHECK15: omp.inner.for.body:
14826 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
14827 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
14828 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14829 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23
14830 // CHECK15-NEXT: call void @_Z3fn1v(), !llvm.access.group !23
14831 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14832 // CHECK15: omp.body.continue:
14833 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14834 // CHECK15: omp.inner.for.inc:
14835 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
14836 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
14837 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
14838 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
14839 // CHECK15: omp.inner.for.end:
14840 // CHECK15-NEXT: store i32 100, i32* [[I]], align 4
14841 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
14842 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
14843 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
14844 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
14845 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
14846 // CHECK15: omp.inner.for.cond7:
14847 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
14848 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
14849 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14850 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
14851 // CHECK15: omp.inner.for.body9:
14852 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
14853 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
14854 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
14855 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
14856 // CHECK15-NEXT: call void @_Z3fn2v()
14857 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
14858 // CHECK15: omp.body.continue12:
14859 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
14860 // CHECK15: omp.inner.for.inc13:
14861 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
14862 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
14863 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
14864 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP26:![0-9]+]]
14865 // CHECK15: omp.inner.for.end15:
14866 // CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
14867 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
14868 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
14869 // CHECK15-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
14870 // CHECK15-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
14871 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
14872 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
14873 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
14874 // CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
14875 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
14876 // CHECK15: omp.inner.for.cond21:
14877 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !27
14878 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !27
14879 // CHECK15-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
14880 // CHECK15-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
14881 // CHECK15: omp.inner.for.body23:
14882 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !27
14883 // CHECK15-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
14884 // CHECK15-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
14885 // CHECK15-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !27
14886 // CHECK15-NEXT: call void @_Z3fn3v(), !llvm.access.group !27
14887 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
14888 // CHECK15: omp.body.continue26:
14889 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
14890 // CHECK15: omp.inner.for.inc27:
14891 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !27
14892 // CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
14893 // CHECK15-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !27
14894 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP28:![0-9]+]]
14895 // CHECK15: omp.inner.for.end29:
14896 // CHECK15-NEXT: store i32 100, i32* [[I20]], align 4
14897 // CHECK15-NEXT: ret i32 0
14898 //
14899 //
14900 // CHECK16-LABEL: define {{[^@]+}}@_Z9gtid_testv
14901 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] {
14902 // CHECK16-NEXT: entry:
14903 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
14904 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14905 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14906 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14907 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
14908 // CHECK16-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
14909 // CHECK16-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
14910 // CHECK16-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
14911 // CHECK16-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
14912 // CHECK16-NEXT: [[I6:%.*]] = alloca i32, align 4
14913 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14914 // CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
14915 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14916 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
14917 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14918 // CHECK16: omp.inner.for.cond:
14919 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14920 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
14921 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
14922 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14923 // CHECK16: omp.inner.for.body:
14924 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14925 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
14926 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14927 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
14928 // CHECK16-NEXT: store i32 0, i32* @Arg, align 4, !nontemporal !7, !llvm.access.group !6
14929 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14930 // CHECK16: omp.body.continue:
14931 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14932 // CHECK16: omp.inner.for.inc:
14933 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14934 // CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
14935 // CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
14936 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
14937 // CHECK16: omp.inner.for.end:
14938 // CHECK16-NEXT: store i32 100, i32* [[I]], align 4
14939 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
14940 // CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
14941 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
14942 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
14943 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
14944 // CHECK16: omp.inner.for.cond7:
14945 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !11
14946 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !11
14947 // CHECK16-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14948 // CHECK16-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
14949 // CHECK16: omp.inner.for.body9:
14950 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !11
14951 // CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
14952 // CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
14953 // CHECK16-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !11
14954 // CHECK16-NEXT: call void @_Z9gtid_testv(), !llvm.access.group !11
14955 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
14956 // CHECK16: omp.body.continue12:
14957 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
14958 // CHECK16: omp.inner.for.inc13:
14959 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !11
14960 // CHECK16-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
14961 // CHECK16-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !11
14962 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP12:![0-9]+]]
14963 // CHECK16: omp.inner.for.end15:
14964 // CHECK16-NEXT: store i32 100, i32* [[I6]], align 4
14965 // CHECK16-NEXT: ret void
14966 //
14967 //
14968 // CHECK16-LABEL: define {{[^@]+}}@main
14969 // CHECK16-SAME: () #[[ATTR1:[0-9]+]] {
14970 // CHECK16-NEXT: entry:
14971 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
14972 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
14973 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14974 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14975 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14976 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
14977 // CHECK16-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
14978 // CHECK16-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
14979 // CHECK16-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
14980 // CHECK16-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
14981 // CHECK16-NEXT: [[I6:%.*]] = alloca i32, align 4
14982 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
14983 // CHECK16-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
14984 // CHECK16-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
14985 // CHECK16-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
14986 // CHECK16-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
14987 // CHECK16-NEXT: [[I20:%.*]] = alloca i32, align 4
14988 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4
14989 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14990 // CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
14991 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14992 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
14993 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14994 // CHECK16: omp.inner.for.cond:
14995 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
14996 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
14997 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
14998 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14999 // CHECK16: omp.inner.for.body:
15000 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
15001 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
15002 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15003 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
15004 // CHECK16-NEXT: call void @_Z3fn4v(), !llvm.access.group !14
15005 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15006 // CHECK16: omp.body.continue:
15007 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15008 // CHECK16: omp.inner.for.inc:
15009 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
15010 // CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
15011 // CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
15012 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
15013 // CHECK16: omp.inner.for.end:
15014 // CHECK16-NEXT: store i32 100, i32* [[I]], align 4
15015 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
15016 // CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
15017 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
15018 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
15019 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
15020 // CHECK16: omp.inner.for.cond7:
15021 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
15022 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
15023 // CHECK16-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
15024 // CHECK16-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
15025 // CHECK16: omp.inner.for.body9:
15026 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
15027 // CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
15028 // CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
15029 // CHECK16-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
15030 // CHECK16-NEXT: call void @_Z3fn5v()
15031 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
15032 // CHECK16: omp.body.continue12:
15033 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
15034 // CHECK16: omp.inner.for.inc13:
15035 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
15036 // CHECK16-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
15037 // CHECK16-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
15038 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
15039 // CHECK16: omp.inner.for.end15:
15040 // CHECK16-NEXT: store i32 100, i32* [[I6]], align 4
15041 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
15042 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
15043 // CHECK16-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
15044 // CHECK16-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
15045 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
15046 // CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
15047 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
15048 // CHECK16-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
15049 // CHECK16-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
15050 // CHECK16-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
15051 // CHECK16-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
15052 // CHECK16: omp_if.then:
15053 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
15054 // CHECK16: omp.inner.for.cond22:
15055 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
15056 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !19
15057 // CHECK16-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
15058 // CHECK16-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END30:%.*]]
15059 // CHECK16: omp.inner.for.body24:
15060 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
15061 // CHECK16-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
15062 // CHECK16-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
15063 // CHECK16-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group !19
15064 // CHECK16-NEXT: call void @_Z3fn6v(), !llvm.access.group !19
15065 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
15066 // CHECK16: omp.body.continue27:
15067 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
15068 // CHECK16: omp.inner.for.inc28:
15069 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
15070 // CHECK16-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
15071 // CHECK16-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !19
15072 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]]
15073 // CHECK16: omp.inner.for.end30:
15074 // CHECK16-NEXT: br label [[OMP_IF_END:%.*]]
15075 // CHECK16: omp_if.else:
15076 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
15077 // CHECK16: omp.inner.for.cond31:
15078 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
15079 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4
15080 // CHECK16-NEXT: [[CMP32:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
15081 // CHECK16-NEXT: br i1 [[CMP32]], label [[OMP_INNER_FOR_BODY33:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
15082 // CHECK16: omp.inner.for.body33:
15083 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
15084 // CHECK16-NEXT: [[MUL34:%.*]] = mul nsw i32 [[TMP19]], 1
15085 // CHECK16-NEXT: [[ADD35:%.*]] = add nsw i32 0, [[MUL34]]
15086 // CHECK16-NEXT: store i32 [[ADD35]], i32* [[I20]], align 4
15087 // CHECK16-NEXT: call void @_Z3fn6v()
15088 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
15089 // CHECK16: omp.body.continue36:
15090 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
15091 // CHECK16: omp.inner.for.inc37:
15092 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
15093 // CHECK16-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP20]], 1
15094 // CHECK16-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV19]], align 4
15095 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND31]], !llvm.loop [[LOOP22:![0-9]+]]
15096 // CHECK16: omp.inner.for.end39:
15097 // CHECK16-NEXT: br label [[OMP_IF_END]]
15098 // CHECK16: omp_if.end:
15099 // CHECK16-NEXT: store i32 100, i32* [[I20]], align 4
15100 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* @Arg, align 4
15101 // CHECK16-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP21]])
15102 // CHECK16-NEXT: ret i32 [[CALL]]
15103 //
15104 //
15105 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
15106 // CHECK16-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
15107 // CHECK16-NEXT: entry:
15108 // CHECK16-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
15109 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
15110 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15111 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15112 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15113 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
15114 // CHECK16-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
15115 // CHECK16-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
15116 // CHECK16-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
15117 // CHECK16-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
15118 // CHECK16-NEXT: [[I6:%.*]] = alloca i32, align 4
15119 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
15120 // CHECK16-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
15121 // CHECK16-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
15122 // CHECK16-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
15123 // CHECK16-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
15124 // CHECK16-NEXT: [[I20:%.*]] = alloca i32, align 4
15125 // CHECK16-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
15126 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
15127 // CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
15128 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15129 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
15130 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15131 // CHECK16: omp.inner.for.cond:
15132 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
15133 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23
15134 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
15135 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15136 // CHECK16: omp.inner.for.body:
15137 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
15138 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
15139 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15140 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23
15141 // CHECK16-NEXT: call void @_Z3fn1v(), !llvm.access.group !23
15142 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15143 // CHECK16: omp.body.continue:
15144 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15145 // CHECK16: omp.inner.for.inc:
15146 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
15147 // CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
15148 // CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
15149 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
15150 // CHECK16: omp.inner.for.end:
15151 // CHECK16-NEXT: store i32 100, i32* [[I]], align 4
15152 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
15153 // CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
15154 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
15155 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
15156 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
15157 // CHECK16: omp.inner.for.cond7:
15158 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
15159 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
15160 // CHECK16-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
15161 // CHECK16-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
15162 // CHECK16: omp.inner.for.body9:
15163 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
15164 // CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
15165 // CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
15166 // CHECK16-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
15167 // CHECK16-NEXT: call void @_Z3fn2v()
15168 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
15169 // CHECK16: omp.body.continue12:
15170 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
15171 // CHECK16: omp.inner.for.inc13:
15172 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
15173 // CHECK16-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
15174 // CHECK16-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
15175 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP26:![0-9]+]]
15176 // CHECK16: omp.inner.for.end15:
15177 // CHECK16-NEXT: store i32 100, i32* [[I6]], align 4
15178 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
15179 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
15180 // CHECK16-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
15181 // CHECK16-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
15182 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
15183 // CHECK16-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
15184 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
15185 // CHECK16-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
15186 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
15187 // CHECK16: omp.inner.for.cond21:
15188 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !27
15189 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group !27
15190 // CHECK16-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
15191 // CHECK16-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
15192 // CHECK16: omp.inner.for.body23:
15193 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !27
15194 // CHECK16-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
15195 // CHECK16-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
15196 // CHECK16-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group !27
15197 // CHECK16-NEXT: call void @_Z3fn3v(), !llvm.access.group !27
15198 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
15199 // CHECK16: omp.body.continue26:
15200 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
15201 // CHECK16: omp.inner.for.inc27:
15202 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !27
15203 // CHECK16-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
15204 // CHECK16-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group !27
15205 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP28:![0-9]+]]
15206 // CHECK16: omp.inner.for.end29:
15207 // CHECK16-NEXT: store i32 100, i32* [[I20]], align 4
15208 // CHECK16-NEXT: ret i32 0
15209 //
15210