1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
10 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
13
14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
17 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
20 #ifdef CK1
21
22 template <typename T, int X, long long Y>
23 struct SS{
24 T a[X];
25 float b;
fooSS26 int foo(void) {
27
28 #pragma omp target teams distribute simd
29 for(int i = 0; i < X; i++) {
30 a[i] = (T)0;
31 }
32 #pragma omp target teams distribute simd dist_schedule(static)
33 for(int i = 0; i < X; i++) {
34 a[i] = (T)0;
35 }
36 #pragma omp target teams distribute simd dist_schedule(static, X/2)
37 for(int i = 0; i < X; i++) {
38 a[i] = (T)0;
39 }
40
41
42
43
44
45
46 return a[0];
47 }
48 };
49
teams_template_struct(void)50 int teams_template_struct(void) {
51 SS<int, 123, 456> V;
52 return V.foo();
53
54 }
55 #endif // CK1
56
57 // Test host codegen.
58 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
59 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
60 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
61 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
62 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
63 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
64
65 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
66 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
67 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14
68 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
69 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
70 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16
71 #ifdef CK2
72
73 template <typename T, int n>
tmain(T argc)74 int tmain(T argc) {
75 T a[n];
76 #pragma omp target teams distribute simd
77 for(int i = 0; i < n; i++) {
78 a[i] = (T)0;
79 }
80 #pragma omp target teams distribute simd dist_schedule(static)
81 for(int i = 0; i < n; i++) {
82 a[i] = (T)0;
83 }
84 #pragma omp target teams distribute simd dist_schedule(static, n)
85 for(int i = 0; i < n; i++) {
86 a[i] = (T)0;
87 }
88 return 0;
89 }
90
main(int argc,char ** argv)91 int main (int argc, char **argv) {
92 int n = 100;
93 int a[n];
94 #pragma omp target teams distribute simd
95 for(int i = 0; i < n; i++) {
96 a[i] = 0;
97 }
98 #pragma omp target teams distribute simd dist_schedule(static)
99 for(int i = 0; i < n; i++) {
100 a[i] = 0;
101 }
102 #pragma omp target teams distribute simd dist_schedule(static, n)
103 for(int i = 0; i < n; i++) {
104 a[i] = 0;
105 }
106 return tmain<int, 10>(argc);
107 }
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123 #endif // CK2
124 #endif // #ifndef HEADER
125 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
126 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
127 // CHECK1-NEXT: entry:
128 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
129 // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
130 // CHECK1-NEXT: ret i32 [[CALL]]
131 //
132 //
133 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
134 // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
135 // CHECK1-NEXT: entry:
136 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
137 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
138 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
139 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
140 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
141 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
142 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
143 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
144 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
145 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
146 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
147 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
148 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
149 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
150 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
151 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
152 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
153 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
154 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
155 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
156 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
157 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
158 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
159 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
160 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
161 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
162 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
163 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
164 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
165 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
166 // CHECK1: omp_offload.failed:
167 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR3:[0-9]+]]
168 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
169 // CHECK1: omp_offload.cont:
170 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
171 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
172 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
173 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
174 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
175 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
176 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
177 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
178 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8
179 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
180 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
181 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
182 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
183 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
184 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
185 // CHECK1: omp_offload.failed7:
186 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR3]]
187 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]]
188 // CHECK1: omp_offload.cont8:
189 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
190 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
191 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
192 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
193 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
194 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
195 // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
196 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
197 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8
198 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
199 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
200 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
201 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
202 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
203 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
204 // CHECK1: omp_offload.failed14:
205 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR3]]
206 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]]
207 // CHECK1: omp_offload.cont15:
208 // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
209 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0
210 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
211 // CHECK1-NEXT: ret i32 [[TMP27]]
212 //
213 //
214 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
215 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
216 // CHECK1-NEXT: entry:
217 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
218 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
219 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
220 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
221 // CHECK1-NEXT: ret void
222 //
223 //
224 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
225 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
226 // CHECK1-NEXT: entry:
227 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
228 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
229 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
230 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
231 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
232 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
233 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
234 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
235 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
236 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
237 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
238 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
239 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
240 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
241 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
242 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
243 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
244 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
245 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
246 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
247 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
248 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
249 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
250 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
251 // CHECK1: cond.true:
252 // CHECK1-NEXT: br label [[COND_END:%.*]]
253 // CHECK1: cond.false:
254 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
255 // CHECK1-NEXT: br label [[COND_END]]
256 // CHECK1: cond.end:
257 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
258 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
259 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
260 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
261 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
262 // CHECK1: omp.inner.for.cond:
263 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
264 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
265 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
266 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
267 // CHECK1: omp.inner.for.body:
268 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
269 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
270 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
271 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
272 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
273 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
274 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
275 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
276 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
277 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
278 // CHECK1: omp.body.continue:
279 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
280 // CHECK1: omp.inner.for.inc:
281 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
282 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
283 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
284 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
285 // CHECK1: omp.inner.for.end:
286 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
287 // CHECK1: omp.loop.exit:
288 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
289 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
290 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
291 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
292 // CHECK1: .omp.final.then:
293 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
294 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
295 // CHECK1: .omp.final.done:
296 // CHECK1-NEXT: ret void
297 //
298 //
299 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
300 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
301 // CHECK1-NEXT: entry:
302 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
303 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
304 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
305 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
306 // CHECK1-NEXT: ret void
307 //
308 //
309 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
310 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2]] {
311 // CHECK1-NEXT: entry:
312 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
313 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
314 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
315 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
316 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
317 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
318 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
319 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
320 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
321 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
322 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
323 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
324 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
325 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
326 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
327 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
328 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
329 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
330 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
331 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
332 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
333 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
334 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
335 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
336 // CHECK1: cond.true:
337 // CHECK1-NEXT: br label [[COND_END:%.*]]
338 // CHECK1: cond.false:
339 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
340 // CHECK1-NEXT: br label [[COND_END]]
341 // CHECK1: cond.end:
342 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
343 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
344 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
345 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
346 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
347 // CHECK1: omp.inner.for.cond:
348 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
349 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
350 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
351 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
352 // CHECK1: omp.inner.for.body:
353 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
354 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
355 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
356 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
357 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
358 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
359 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
360 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
361 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
362 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
363 // CHECK1: omp.body.continue:
364 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
365 // CHECK1: omp.inner.for.inc:
366 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
367 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
368 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
369 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
370 // CHECK1: omp.inner.for.end:
371 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
372 // CHECK1: omp.loop.exit:
373 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
374 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
375 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
376 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
377 // CHECK1: .omp.final.then:
378 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
379 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
380 // CHECK1: .omp.final.done:
381 // CHECK1-NEXT: ret void
382 //
383 //
384 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
385 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
386 // CHECK1-NEXT: entry:
387 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
388 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
389 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
390 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
391 // CHECK1-NEXT: ret void
392 //
393 //
394 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
395 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2]] {
396 // CHECK1-NEXT: entry:
397 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
398 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
399 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
400 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
401 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
402 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
403 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
404 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
405 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
406 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
407 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
408 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
409 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
410 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
411 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
412 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
413 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
414 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
415 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
416 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
417 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
418 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
419 // CHECK1: omp.dispatch.cond:
420 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
421 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
422 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
423 // CHECK1: cond.true:
424 // CHECK1-NEXT: br label [[COND_END:%.*]]
425 // CHECK1: cond.false:
426 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
427 // CHECK1-NEXT: br label [[COND_END]]
428 // CHECK1: cond.end:
429 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
430 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
431 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
432 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
433 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
434 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
435 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
436 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
437 // CHECK1: omp.dispatch.body:
438 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
439 // CHECK1: omp.inner.for.cond:
440 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
441 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
442 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
443 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
444 // CHECK1: omp.inner.for.body:
445 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
446 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
447 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
448 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15
449 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
450 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15
451 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
452 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
453 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
454 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
455 // CHECK1: omp.body.continue:
456 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
457 // CHECK1: omp.inner.for.inc:
458 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
459 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
460 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
461 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
462 // CHECK1: omp.inner.for.end:
463 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
464 // CHECK1: omp.dispatch.inc:
465 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
466 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
467 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
468 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
469 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
470 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
471 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
472 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
473 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
474 // CHECK1: omp.dispatch.end:
475 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
476 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
477 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
478 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
479 // CHECK1: .omp.final.then:
480 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
481 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
482 // CHECK1: .omp.final.done:
483 // CHECK1-NEXT: ret void
484 //
485 //
486 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
487 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
488 // CHECK1-NEXT: entry:
489 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
490 // CHECK1-NEXT: ret void
491 //
492 //
493 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv
494 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
495 // CHECK2-NEXT: entry:
496 // CHECK2-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
497 // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
498 // CHECK2-NEXT: ret i32 [[CALL]]
499 //
500 //
501 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
502 // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
503 // CHECK2-NEXT: entry:
504 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
505 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
506 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
507 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
508 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
509 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
510 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
511 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
512 // CHECK2-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
513 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
514 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
515 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
516 // CHECK2-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
517 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
518 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
519 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
520 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
521 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
522 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
523 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
524 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
525 // CHECK2-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
526 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
527 // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8
528 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
529 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
530 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
531 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
532 // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
533 // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
534 // CHECK2: omp_offload.failed:
535 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR3:[0-9]+]]
536 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
537 // CHECK2: omp_offload.cont:
538 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
539 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
540 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
541 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
542 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
543 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
544 // CHECK2-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
545 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
546 // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8
547 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
548 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
549 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
550 // CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
551 // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
552 // CHECK2-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
553 // CHECK2: omp_offload.failed7:
554 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR3]]
555 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT8]]
556 // CHECK2: omp_offload.cont8:
557 // CHECK2-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
558 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
559 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
560 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
561 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
562 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
563 // CHECK2-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
564 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
565 // CHECK2-NEXT: store i8* null, i8** [[TMP22]], align 8
566 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
567 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
568 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
569 // CHECK2-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
570 // CHECK2-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
571 // CHECK2-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
572 // CHECK2: omp_offload.failed14:
573 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR3]]
574 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT15]]
575 // CHECK2: omp_offload.cont15:
576 // CHECK2-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
577 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0
578 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
579 // CHECK2-NEXT: ret i32 [[TMP27]]
580 //
581 //
582 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
583 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
584 // CHECK2-NEXT: entry:
585 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
586 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
587 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
588 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
589 // CHECK2-NEXT: ret void
590 //
591 //
592 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
593 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
594 // CHECK2-NEXT: entry:
595 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
596 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
597 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
598 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
599 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
600 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
601 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
602 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
603 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
604 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
605 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
606 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
607 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
608 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
609 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
610 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
611 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
612 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
613 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
614 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
615 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
616 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
617 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
618 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
619 // CHECK2: cond.true:
620 // CHECK2-NEXT: br label [[COND_END:%.*]]
621 // CHECK2: cond.false:
622 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
623 // CHECK2-NEXT: br label [[COND_END]]
624 // CHECK2: cond.end:
625 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
626 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
627 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
628 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
629 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
630 // CHECK2: omp.inner.for.cond:
631 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
632 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
633 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
634 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
635 // CHECK2: omp.inner.for.body:
636 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
637 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
638 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
639 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
640 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
641 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
642 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
643 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
644 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
645 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
646 // CHECK2: omp.body.continue:
647 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
648 // CHECK2: omp.inner.for.inc:
649 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
650 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
651 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
652 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
653 // CHECK2: omp.inner.for.end:
654 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
655 // CHECK2: omp.loop.exit:
656 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
657 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
658 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
659 // CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
660 // CHECK2: .omp.final.then:
661 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
662 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
663 // CHECK2: .omp.final.done:
664 // CHECK2-NEXT: ret void
665 //
666 //
667 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
668 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
669 // CHECK2-NEXT: entry:
670 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
671 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
672 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
673 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
674 // CHECK2-NEXT: ret void
675 //
676 //
677 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
678 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2]] {
679 // CHECK2-NEXT: entry:
680 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
681 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
682 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
683 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
684 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
685 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
686 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
687 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
688 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
689 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
690 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
691 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
692 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
693 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
694 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
695 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
696 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
697 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
698 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
699 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
700 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
701 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
702 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
703 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
704 // CHECK2: cond.true:
705 // CHECK2-NEXT: br label [[COND_END:%.*]]
706 // CHECK2: cond.false:
707 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
708 // CHECK2-NEXT: br label [[COND_END]]
709 // CHECK2: cond.end:
710 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
711 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
712 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
713 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
714 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
715 // CHECK2: omp.inner.for.cond:
716 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
717 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
718 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
719 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
720 // CHECK2: omp.inner.for.body:
721 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
722 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
723 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
724 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
725 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
726 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
727 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
728 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
729 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
730 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
731 // CHECK2: omp.body.continue:
732 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
733 // CHECK2: omp.inner.for.inc:
734 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
735 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
736 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
737 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
738 // CHECK2: omp.inner.for.end:
739 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
740 // CHECK2: omp.loop.exit:
741 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
742 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
743 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
744 // CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
745 // CHECK2: .omp.final.then:
746 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
747 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
748 // CHECK2: .omp.final.done:
749 // CHECK2-NEXT: ret void
750 //
751 //
752 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
753 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
754 // CHECK2-NEXT: entry:
755 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
756 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
757 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
758 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
759 // CHECK2-NEXT: ret void
760 //
761 //
762 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4
763 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2]] {
764 // CHECK2-NEXT: entry:
765 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
766 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
767 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
768 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
769 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
770 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
771 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
772 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
773 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
774 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
775 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
776 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
777 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
778 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
779 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
780 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
781 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
782 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
783 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
784 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
785 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
786 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
787 // CHECK2: omp.dispatch.cond:
788 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
789 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
790 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
791 // CHECK2: cond.true:
792 // CHECK2-NEXT: br label [[COND_END:%.*]]
793 // CHECK2: cond.false:
794 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
795 // CHECK2-NEXT: br label [[COND_END]]
796 // CHECK2: cond.end:
797 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
798 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
799 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
800 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
801 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
802 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
803 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
804 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
805 // CHECK2: omp.dispatch.body:
806 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
807 // CHECK2: omp.inner.for.cond:
808 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
809 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
810 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
811 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
812 // CHECK2: omp.inner.for.body:
813 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
814 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
815 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
816 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15
817 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
818 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15
819 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
820 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
821 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
822 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
823 // CHECK2: omp.body.continue:
824 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
825 // CHECK2: omp.inner.for.inc:
826 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
827 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
828 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
829 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
830 // CHECK2: omp.inner.for.end:
831 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
832 // CHECK2: omp.dispatch.inc:
833 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
834 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
835 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
836 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
837 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
838 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
839 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
840 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
841 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]]
842 // CHECK2: omp.dispatch.end:
843 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
844 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
845 // CHECK2-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
846 // CHECK2-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
847 // CHECK2: .omp.final.then:
848 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
849 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
850 // CHECK2: .omp.final.done:
851 // CHECK2-NEXT: ret void
852 //
853 //
854 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
855 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] {
856 // CHECK2-NEXT: entry:
857 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
858 // CHECK2-NEXT: ret void
859 //
860 //
861 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
862 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
863 // CHECK3-NEXT: entry:
864 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
865 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
866 // CHECK3-NEXT: ret i32 [[CALL]]
867 //
868 //
869 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
870 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
871 // CHECK3-NEXT: entry:
872 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
873 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
874 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
875 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
876 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
877 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
878 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
879 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
880 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
881 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
882 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
883 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
884 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
885 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
886 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
887 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
888 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
889 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
890 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
891 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
892 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
893 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
894 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
895 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4
896 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
897 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
898 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
899 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
900 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
901 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
902 // CHECK3: omp_offload.failed:
903 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR3:[0-9]+]]
904 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
905 // CHECK3: omp_offload.cont:
906 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
907 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
908 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
909 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
910 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
911 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
912 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
913 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
914 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4
915 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
916 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
917 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
918 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
919 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
920 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
921 // CHECK3: omp_offload.failed7:
922 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR3]]
923 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]]
924 // CHECK3: omp_offload.cont8:
925 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
926 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
927 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
928 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
929 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
930 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
931 // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
932 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
933 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4
934 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
935 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
936 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
937 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
938 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
939 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
940 // CHECK3: omp_offload.failed14:
941 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR3]]
942 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]]
943 // CHECK3: omp_offload.cont15:
944 // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
945 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0
946 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
947 // CHECK3-NEXT: ret i32 [[TMP27]]
948 //
949 //
950 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
951 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
952 // CHECK3-NEXT: entry:
953 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
954 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
955 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
956 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
957 // CHECK3-NEXT: ret void
958 //
959 //
960 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
961 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
962 // CHECK3-NEXT: entry:
963 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
964 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
965 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
966 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
967 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
968 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
969 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
970 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
971 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
972 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
973 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
974 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
975 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
976 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
977 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
978 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
979 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
980 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
981 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
982 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
983 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
984 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
985 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
986 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
987 // CHECK3: cond.true:
988 // CHECK3-NEXT: br label [[COND_END:%.*]]
989 // CHECK3: cond.false:
990 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
991 // CHECK3-NEXT: br label [[COND_END]]
992 // CHECK3: cond.end:
993 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
994 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
995 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
996 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
997 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
998 // CHECK3: omp.inner.for.cond:
999 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
1000 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
1001 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1002 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1003 // CHECK3: omp.inner.for.body:
1004 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
1005 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1006 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1007 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
1008 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1009 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
1010 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
1011 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
1012 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1013 // CHECK3: omp.body.continue:
1014 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1015 // CHECK3: omp.inner.for.inc:
1016 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
1017 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1018 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
1019 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
1020 // CHECK3: omp.inner.for.end:
1021 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1022 // CHECK3: omp.loop.exit:
1023 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1024 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1025 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1026 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1027 // CHECK3: .omp.final.then:
1028 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
1029 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1030 // CHECK3: .omp.final.done:
1031 // CHECK3-NEXT: ret void
1032 //
1033 //
1034 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
1035 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1036 // CHECK3-NEXT: entry:
1037 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1038 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1039 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1040 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1041 // CHECK3-NEXT: ret void
1042 //
1043 //
1044 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1045 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2]] {
1046 // CHECK3-NEXT: entry:
1047 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1048 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1049 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1050 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1051 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1052 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1053 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1054 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1055 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1056 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1057 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1058 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1059 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1060 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1061 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1062 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1063 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1064 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1065 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1066 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1067 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1068 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1069 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1070 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1071 // CHECK3: cond.true:
1072 // CHECK3-NEXT: br label [[COND_END:%.*]]
1073 // CHECK3: cond.false:
1074 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1075 // CHECK3-NEXT: br label [[COND_END]]
1076 // CHECK3: cond.end:
1077 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1078 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1079 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1080 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1081 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1082 // CHECK3: omp.inner.for.cond:
1083 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1084 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
1085 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1086 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1087 // CHECK3: omp.inner.for.body:
1088 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1089 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1090 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1091 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
1092 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1093 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
1094 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
1095 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
1096 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1097 // CHECK3: omp.body.continue:
1098 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1099 // CHECK3: omp.inner.for.inc:
1100 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1101 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1102 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1103 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1104 // CHECK3: omp.inner.for.end:
1105 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1106 // CHECK3: omp.loop.exit:
1107 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1108 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1109 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1110 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1111 // CHECK3: .omp.final.then:
1112 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
1113 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1114 // CHECK3: .omp.final.done:
1115 // CHECK3-NEXT: ret void
1116 //
1117 //
1118 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
1119 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1120 // CHECK3-NEXT: entry:
1121 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1122 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1123 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1124 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1125 // CHECK3-NEXT: ret void
1126 //
1127 //
1128 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
1129 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2]] {
1130 // CHECK3-NEXT: entry:
1131 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1132 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1133 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1134 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1135 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1136 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1137 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1138 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1139 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1140 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1141 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1142 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1143 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1144 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1145 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1146 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1147 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1148 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1149 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1150 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1151 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
1152 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1153 // CHECK3: omp.dispatch.cond:
1154 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1155 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1156 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1157 // CHECK3: cond.true:
1158 // CHECK3-NEXT: br label [[COND_END:%.*]]
1159 // CHECK3: cond.false:
1160 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1161 // CHECK3-NEXT: br label [[COND_END]]
1162 // CHECK3: cond.end:
1163 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1164 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1165 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1166 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1167 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1168 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1169 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1170 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1171 // CHECK3: omp.dispatch.body:
1172 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1173 // CHECK3: omp.inner.for.cond:
1174 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
1175 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
1176 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1177 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1178 // CHECK3: omp.inner.for.body:
1179 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
1180 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1181 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1182 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !16
1183 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1184 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16
1185 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
1186 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
1187 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1188 // CHECK3: omp.body.continue:
1189 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1190 // CHECK3: omp.inner.for.inc:
1191 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
1192 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1193 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
1194 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
1195 // CHECK3: omp.inner.for.end:
1196 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1197 // CHECK3: omp.dispatch.inc:
1198 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1199 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1200 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1201 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
1202 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1203 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1204 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
1205 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
1206 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
1207 // CHECK3: omp.dispatch.end:
1208 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1209 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1210 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
1211 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1212 // CHECK3: .omp.final.then:
1213 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
1214 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1215 // CHECK3: .omp.final.done:
1216 // CHECK3-NEXT: ret void
1217 //
1218 //
1219 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1220 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
1221 // CHECK3-NEXT: entry:
1222 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
1223 // CHECK3-NEXT: ret void
1224 //
1225 //
1226 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1227 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
1228 // CHECK4-NEXT: entry:
1229 // CHECK4-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1230 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1231 // CHECK4-NEXT: ret i32 [[CALL]]
1232 //
1233 //
1234 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1235 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1236 // CHECK4-NEXT: entry:
1237 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1238 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1239 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1240 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1241 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1242 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
1243 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
1244 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
1245 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
1246 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
1247 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
1248 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
1249 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
1250 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1251 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1252 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1253 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1254 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
1255 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
1256 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1257 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
1258 // CHECK4-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
1259 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1260 // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 4
1261 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1262 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1263 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
1264 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
1265 // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
1266 // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1267 // CHECK4: omp_offload.failed:
1268 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR3:[0-9]+]]
1269 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
1270 // CHECK4: omp_offload.cont:
1271 // CHECK4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1272 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1273 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
1274 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
1275 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1276 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
1277 // CHECK4-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
1278 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
1279 // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 4
1280 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1281 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1282 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
1283 // CHECK4-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
1284 // CHECK4-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1285 // CHECK4-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
1286 // CHECK4: omp_offload.failed7:
1287 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR3]]
1288 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT8]]
1289 // CHECK4: omp_offload.cont8:
1290 // CHECK4-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1291 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1292 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
1293 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
1294 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1295 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
1296 // CHECK4-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
1297 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
1298 // CHECK4-NEXT: store i8* null, i8** [[TMP22]], align 4
1299 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1300 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1301 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
1302 // CHECK4-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
1303 // CHECK4-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1304 // CHECK4-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
1305 // CHECK4: omp_offload.failed14:
1306 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR3]]
1307 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT15]]
1308 // CHECK4: omp_offload.cont15:
1309 // CHECK4-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1310 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0
1311 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1312 // CHECK4-NEXT: ret i32 [[TMP27]]
1313 //
1314 //
1315 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
1316 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
1317 // CHECK4-NEXT: entry:
1318 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1319 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1320 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1321 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1322 // CHECK4-NEXT: ret void
1323 //
1324 //
1325 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
1326 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
1327 // CHECK4-NEXT: entry:
1328 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1329 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1330 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1331 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1332 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1333 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1334 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1335 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1336 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1337 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1338 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1339 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1340 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1341 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1342 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1343 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1344 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1345 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1346 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1347 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1348 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1349 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1350 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1351 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1352 // CHECK4: cond.true:
1353 // CHECK4-NEXT: br label [[COND_END:%.*]]
1354 // CHECK4: cond.false:
1355 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1356 // CHECK4-NEXT: br label [[COND_END]]
1357 // CHECK4: cond.end:
1358 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1359 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1360 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1361 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1362 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1363 // CHECK4: omp.inner.for.cond:
1364 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
1365 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
1366 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1367 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1368 // CHECK4: omp.inner.for.body:
1369 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
1370 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1371 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1372 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
1373 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1374 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
1375 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
1376 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
1377 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1378 // CHECK4: omp.body.continue:
1379 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1380 // CHECK4: omp.inner.for.inc:
1381 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
1382 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1383 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
1384 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
1385 // CHECK4: omp.inner.for.end:
1386 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1387 // CHECK4: omp.loop.exit:
1388 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1389 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1390 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1391 // CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1392 // CHECK4: .omp.final.then:
1393 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
1394 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
1395 // CHECK4: .omp.final.done:
1396 // CHECK4-NEXT: ret void
1397 //
1398 //
1399 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
1400 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1401 // CHECK4-NEXT: entry:
1402 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1403 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1404 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1405 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1406 // CHECK4-NEXT: ret void
1407 //
1408 //
1409 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
1410 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2]] {
1411 // CHECK4-NEXT: entry:
1412 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1413 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1414 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1415 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1416 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1417 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1418 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1419 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1420 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1421 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1422 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1423 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1424 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1425 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1426 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1427 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1428 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1429 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1430 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1431 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1432 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1433 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1434 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1435 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1436 // CHECK4: cond.true:
1437 // CHECK4-NEXT: br label [[COND_END:%.*]]
1438 // CHECK4: cond.false:
1439 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1440 // CHECK4-NEXT: br label [[COND_END]]
1441 // CHECK4: cond.end:
1442 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1443 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1444 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1445 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1446 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1447 // CHECK4: omp.inner.for.cond:
1448 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1449 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
1450 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1451 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1452 // CHECK4: omp.inner.for.body:
1453 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1454 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1455 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1456 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
1457 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1458 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
1459 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
1460 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
1461 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1462 // CHECK4: omp.body.continue:
1463 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1464 // CHECK4: omp.inner.for.inc:
1465 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1466 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1467 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1468 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1469 // CHECK4: omp.inner.for.end:
1470 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1471 // CHECK4: omp.loop.exit:
1472 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1473 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1474 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1475 // CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1476 // CHECK4: .omp.final.then:
1477 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
1478 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
1479 // CHECK4: .omp.final.done:
1480 // CHECK4-NEXT: ret void
1481 //
1482 //
1483 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
1484 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1485 // CHECK4-NEXT: entry:
1486 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1487 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1488 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1489 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1490 // CHECK4-NEXT: ret void
1491 //
1492 //
1493 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4
1494 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2]] {
1495 // CHECK4-NEXT: entry:
1496 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1497 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1498 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1499 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1500 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1501 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1502 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1503 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1504 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1505 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1506 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1507 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1508 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1509 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1510 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1511 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1512 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1513 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1514 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1515 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1516 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
1517 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1518 // CHECK4: omp.dispatch.cond:
1519 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1520 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1521 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1522 // CHECK4: cond.true:
1523 // CHECK4-NEXT: br label [[COND_END:%.*]]
1524 // CHECK4: cond.false:
1525 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1526 // CHECK4-NEXT: br label [[COND_END]]
1527 // CHECK4: cond.end:
1528 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1529 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1530 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1531 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1532 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1533 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1534 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1535 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1536 // CHECK4: omp.dispatch.body:
1537 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1538 // CHECK4: omp.inner.for.cond:
1539 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
1540 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
1541 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1542 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1543 // CHECK4: omp.inner.for.body:
1544 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
1545 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1546 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1547 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !16
1548 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1549 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16
1550 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
1551 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
1552 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1553 // CHECK4: omp.body.continue:
1554 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1555 // CHECK4: omp.inner.for.inc:
1556 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
1557 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1558 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
1559 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
1560 // CHECK4: omp.inner.for.end:
1561 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1562 // CHECK4: omp.dispatch.inc:
1563 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1564 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1565 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1566 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
1567 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1568 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1569 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
1570 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
1571 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]]
1572 // CHECK4: omp.dispatch.end:
1573 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1574 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1575 // CHECK4-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
1576 // CHECK4-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1577 // CHECK4: .omp.final.then:
1578 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
1579 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
1580 // CHECK4: .omp.final.done:
1581 // CHECK4-NEXT: ret void
1582 //
1583 //
1584 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1585 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] {
1586 // CHECK4-NEXT: entry:
1587 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
1588 // CHECK4-NEXT: ret void
1589 //
1590 //
1591 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1592 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
1593 // CHECK5-NEXT: entry:
1594 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1595 // CHECK5-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1596 // CHECK5-NEXT: ret i32 [[CALL]]
1597 //
1598 //
1599 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1600 // CHECK5-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1601 // CHECK5-NEXT: entry:
1602 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1603 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1604 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1605 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1606 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1607 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1608 // CHECK5-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1609 // CHECK5-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
1610 // CHECK5-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
1611 // CHECK5-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
1612 // CHECK5-NEXT: [[I7:%.*]] = alloca i32, align 4
1613 // CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
1614 // CHECK5-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
1615 // CHECK5-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
1616 // CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4
1617 // CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 4
1618 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1619 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1620 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1621 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1622 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1623 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1624 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1625 // CHECK5: omp.inner.for.cond:
1626 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1627 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
1628 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1629 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1630 // CHECK5: omp.inner.for.body:
1631 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1632 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
1633 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1634 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
1635 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1636 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
1637 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
1638 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1639 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
1640 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1641 // CHECK5: omp.body.continue:
1642 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1643 // CHECK5: omp.inner.for.inc:
1644 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1645 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
1646 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1647 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
1648 // CHECK5: omp.inner.for.end:
1649 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
1650 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
1651 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4
1652 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
1653 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4
1654 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
1655 // CHECK5: omp.inner.for.cond8:
1656 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
1657 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6
1658 // CHECK5-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1659 // CHECK5-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]]
1660 // CHECK5: omp.inner.for.body10:
1661 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
1662 // CHECK5-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
1663 // CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
1664 // CHECK5-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6
1665 // CHECK5-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1666 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !6
1667 // CHECK5-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64
1668 // CHECK5-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i64 0, i64 [[IDXPROM14]]
1669 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX15]], align 4, !llvm.access.group !6
1670 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]]
1671 // CHECK5: omp.body.continue16:
1672 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]]
1673 // CHECK5: omp.inner.for.inc17:
1674 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
1675 // CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1
1676 // CHECK5-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
1677 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
1678 // CHECK5: omp.inner.for.end19:
1679 // CHECK5-NEXT: store i32 123, i32* [[I7]], align 4
1680 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
1681 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB22]], align 4
1682 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
1683 // CHECK5-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV23]], align 4
1684 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]]
1685 // CHECK5: omp.inner.for.cond25:
1686 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
1687 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !9
1688 // CHECK5-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1689 // CHECK5-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]]
1690 // CHECK5: omp.inner.for.body27:
1691 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
1692 // CHECK5-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1
1693 // CHECK5-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]]
1694 // CHECK5-NEXT: store i32 [[ADD29]], i32* [[I24]], align 4, !llvm.access.group !9
1695 // CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1696 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[I24]], align 4, !llvm.access.group !9
1697 // CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64
1698 // CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 [[IDXPROM31]]
1699 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4, !llvm.access.group !9
1700 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]]
1701 // CHECK5: omp.body.continue33:
1702 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]]
1703 // CHECK5: omp.inner.for.inc34:
1704 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
1705 // CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1
1706 // CHECK5-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
1707 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]]
1708 // CHECK5: omp.inner.for.end36:
1709 // CHECK5-NEXT: store i32 123, i32* [[I24]], align 4
1710 // CHECK5-NEXT: [[A37:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1711 // CHECK5-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A37]], i64 0, i64 0
1712 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX38]], align 4
1713 // CHECK5-NEXT: ret i32 [[TMP18]]
1714 //
1715 //
1716 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1717 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
1718 // CHECK6-NEXT: entry:
1719 // CHECK6-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1720 // CHECK6-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1721 // CHECK6-NEXT: ret i32 [[CALL]]
1722 //
1723 //
1724 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1725 // CHECK6-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1726 // CHECK6-NEXT: entry:
1727 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1728 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
1729 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1730 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1731 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1732 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
1733 // CHECK6-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1734 // CHECK6-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
1735 // CHECK6-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
1736 // CHECK6-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
1737 // CHECK6-NEXT: [[I7:%.*]] = alloca i32, align 4
1738 // CHECK6-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
1739 // CHECK6-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
1740 // CHECK6-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
1741 // CHECK6-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4
1742 // CHECK6-NEXT: [[I24:%.*]] = alloca i32, align 4
1743 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1744 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1745 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1746 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1747 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1748 // CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1749 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1750 // CHECK6: omp.inner.for.cond:
1751 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1752 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
1753 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1754 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1755 // CHECK6: omp.inner.for.body:
1756 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1757 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
1758 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1759 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
1760 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1761 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
1762 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
1763 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1764 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
1765 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1766 // CHECK6: omp.body.continue:
1767 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1768 // CHECK6: omp.inner.for.inc:
1769 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1770 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
1771 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1772 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
1773 // CHECK6: omp.inner.for.end:
1774 // CHECK6-NEXT: store i32 123, i32* [[I]], align 4
1775 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
1776 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4
1777 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
1778 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4
1779 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
1780 // CHECK6: omp.inner.for.cond8:
1781 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
1782 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6
1783 // CHECK6-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1784 // CHECK6-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]]
1785 // CHECK6: omp.inner.for.body10:
1786 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
1787 // CHECK6-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
1788 // CHECK6-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
1789 // CHECK6-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6
1790 // CHECK6-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1791 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !6
1792 // CHECK6-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64
1793 // CHECK6-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i64 0, i64 [[IDXPROM14]]
1794 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX15]], align 4, !llvm.access.group !6
1795 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]]
1796 // CHECK6: omp.body.continue16:
1797 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]]
1798 // CHECK6: omp.inner.for.inc17:
1799 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
1800 // CHECK6-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1
1801 // CHECK6-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
1802 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
1803 // CHECK6: omp.inner.for.end19:
1804 // CHECK6-NEXT: store i32 123, i32* [[I7]], align 4
1805 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
1806 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB22]], align 4
1807 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
1808 // CHECK6-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV23]], align 4
1809 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]]
1810 // CHECK6: omp.inner.for.cond25:
1811 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
1812 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !9
1813 // CHECK6-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1814 // CHECK6-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]]
1815 // CHECK6: omp.inner.for.body27:
1816 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
1817 // CHECK6-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1
1818 // CHECK6-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]]
1819 // CHECK6-NEXT: store i32 [[ADD29]], i32* [[I24]], align 4, !llvm.access.group !9
1820 // CHECK6-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1821 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[I24]], align 4, !llvm.access.group !9
1822 // CHECK6-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64
1823 // CHECK6-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 [[IDXPROM31]]
1824 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4, !llvm.access.group !9
1825 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]]
1826 // CHECK6: omp.body.continue33:
1827 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]]
1828 // CHECK6: omp.inner.for.inc34:
1829 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
1830 // CHECK6-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1
1831 // CHECK6-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
1832 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]]
1833 // CHECK6: omp.inner.for.end36:
1834 // CHECK6-NEXT: store i32 123, i32* [[I24]], align 4
1835 // CHECK6-NEXT: [[A37:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1836 // CHECK6-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A37]], i64 0, i64 0
1837 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX38]], align 4
1838 // CHECK6-NEXT: ret i32 [[TMP18]]
1839 //
1840 //
1841 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1842 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
1843 // CHECK7-NEXT: entry:
1844 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1845 // CHECK7-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1846 // CHECK7-NEXT: ret i32 [[CALL]]
1847 //
1848 //
1849 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1850 // CHECK7-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1851 // CHECK7-NEXT: entry:
1852 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1853 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
1854 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1855 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1856 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1857 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
1858 // CHECK7-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1859 // CHECK7-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
1860 // CHECK7-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
1861 // CHECK7-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
1862 // CHECK7-NEXT: [[I7:%.*]] = alloca i32, align 4
1863 // CHECK7-NEXT: [[_TMP19:%.*]] = alloca i32, align 4
1864 // CHECK7-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4
1865 // CHECK7-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4
1866 // CHECK7-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4
1867 // CHECK7-NEXT: [[I23:%.*]] = alloca i32, align 4
1868 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1869 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1870 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1871 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1872 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1873 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1874 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1875 // CHECK7: omp.inner.for.cond:
1876 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1877 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
1878 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1879 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1880 // CHECK7: omp.inner.for.body:
1881 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1882 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
1883 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1884 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
1885 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1886 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
1887 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP4]]
1888 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
1889 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1890 // CHECK7: omp.body.continue:
1891 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1892 // CHECK7: omp.inner.for.inc:
1893 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1894 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
1895 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1896 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
1897 // CHECK7: omp.inner.for.end:
1898 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
1899 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
1900 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4
1901 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
1902 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4
1903 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
1904 // CHECK7: omp.inner.for.cond8:
1905 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
1906 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !7
1907 // CHECK7-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1908 // CHECK7-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
1909 // CHECK7: omp.inner.for.body10:
1910 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
1911 // CHECK7-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
1912 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
1913 // CHECK7-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !7
1914 // CHECK7-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1915 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !7
1916 // CHECK7-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i32 0, i32 [[TMP10]]
1917 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !7
1918 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
1919 // CHECK7: omp.body.continue15:
1920 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
1921 // CHECK7: omp.inner.for.inc16:
1922 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
1923 // CHECK7-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1
1924 // CHECK7-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
1925 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]]
1926 // CHECK7: omp.inner.for.end18:
1927 // CHECK7-NEXT: store i32 123, i32* [[I7]], align 4
1928 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB20]], align 4
1929 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB21]], align 4
1930 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB20]], align 4
1931 // CHECK7-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV22]], align 4
1932 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]]
1933 // CHECK7: omp.inner.for.cond24:
1934 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
1935 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB21]], align 4, !llvm.access.group !10
1936 // CHECK7-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1937 // CHECK7-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]]
1938 // CHECK7: omp.inner.for.body26:
1939 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
1940 // CHECK7-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1
1941 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]]
1942 // CHECK7-NEXT: store i32 [[ADD28]], i32* [[I23]], align 4, !llvm.access.group !10
1943 // CHECK7-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1944 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[I23]], align 4, !llvm.access.group !10
1945 // CHECK7-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A29]], i32 0, i32 [[TMP16]]
1946 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX30]], align 4, !llvm.access.group !10
1947 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]]
1948 // CHECK7: omp.body.continue31:
1949 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]]
1950 // CHECK7: omp.inner.for.inc32:
1951 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
1952 // CHECK7-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1
1953 // CHECK7-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
1954 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]]
1955 // CHECK7: omp.inner.for.end34:
1956 // CHECK7-NEXT: store i32 123, i32* [[I23]], align 4
1957 // CHECK7-NEXT: [[A35:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1958 // CHECK7-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A35]], i32 0, i32 0
1959 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX36]], align 4
1960 // CHECK7-NEXT: ret i32 [[TMP18]]
1961 //
1962 //
1963 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1964 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
1965 // CHECK8-NEXT: entry:
1966 // CHECK8-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1967 // CHECK8-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1968 // CHECK8-NEXT: ret i32 [[CALL]]
1969 //
1970 //
1971 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1972 // CHECK8-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1973 // CHECK8-NEXT: entry:
1974 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1975 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
1976 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1977 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1978 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1979 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
1980 // CHECK8-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1981 // CHECK8-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
1982 // CHECK8-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
1983 // CHECK8-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
1984 // CHECK8-NEXT: [[I7:%.*]] = alloca i32, align 4
1985 // CHECK8-NEXT: [[_TMP19:%.*]] = alloca i32, align 4
1986 // CHECK8-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4
1987 // CHECK8-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4
1988 // CHECK8-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4
1989 // CHECK8-NEXT: [[I23:%.*]] = alloca i32, align 4
1990 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1991 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1992 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1993 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1994 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1995 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1996 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1997 // CHECK8: omp.inner.for.cond:
1998 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1999 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
2000 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2001 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2002 // CHECK8: omp.inner.for.body:
2003 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2004 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2005 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2006 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
2007 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2008 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
2009 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP4]]
2010 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
2011 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2012 // CHECK8: omp.body.continue:
2013 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2014 // CHECK8: omp.inner.for.inc:
2015 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2016 // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
2017 // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2018 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
2019 // CHECK8: omp.inner.for.end:
2020 // CHECK8-NEXT: store i32 123, i32* [[I]], align 4
2021 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
2022 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4
2023 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
2024 // CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4
2025 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
2026 // CHECK8: omp.inner.for.cond8:
2027 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
2028 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !7
2029 // CHECK8-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2030 // CHECK8-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
2031 // CHECK8: omp.inner.for.body10:
2032 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
2033 // CHECK8-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
2034 // CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
2035 // CHECK8-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !7
2036 // CHECK8-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2037 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !7
2038 // CHECK8-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i32 0, i32 [[TMP10]]
2039 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !7
2040 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
2041 // CHECK8: omp.body.continue15:
2042 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
2043 // CHECK8: omp.inner.for.inc16:
2044 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
2045 // CHECK8-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1
2046 // CHECK8-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
2047 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]]
2048 // CHECK8: omp.inner.for.end18:
2049 // CHECK8-NEXT: store i32 123, i32* [[I7]], align 4
2050 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB20]], align 4
2051 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB21]], align 4
2052 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB20]], align 4
2053 // CHECK8-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV22]], align 4
2054 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]]
2055 // CHECK8: omp.inner.for.cond24:
2056 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
2057 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB21]], align 4, !llvm.access.group !10
2058 // CHECK8-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2059 // CHECK8-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]]
2060 // CHECK8: omp.inner.for.body26:
2061 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
2062 // CHECK8-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1
2063 // CHECK8-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]]
2064 // CHECK8-NEXT: store i32 [[ADD28]], i32* [[I23]], align 4, !llvm.access.group !10
2065 // CHECK8-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2066 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[I23]], align 4, !llvm.access.group !10
2067 // CHECK8-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A29]], i32 0, i32 [[TMP16]]
2068 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX30]], align 4, !llvm.access.group !10
2069 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]]
2070 // CHECK8: omp.body.continue31:
2071 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]]
2072 // CHECK8: omp.inner.for.inc32:
2073 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
2074 // CHECK8-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1
2075 // CHECK8-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
2076 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]]
2077 // CHECK8: omp.inner.for.end34:
2078 // CHECK8-NEXT: store i32 123, i32* [[I23]], align 4
2079 // CHECK8-NEXT: [[A35:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2080 // CHECK8-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A35]], i32 0, i32 0
2081 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX36]], align 4
2082 // CHECK8-NEXT: ret i32 [[TMP18]]
2083 //
2084 //
2085 // CHECK9-LABEL: define {{[^@]+}}@main
2086 // CHECK9-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2087 // CHECK9-NEXT: entry:
2088 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2089 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2090 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
2091 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
2092 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
2093 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
2094 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2095 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
2096 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
2097 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
2098 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
2099 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2100 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2101 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2102 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
2103 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
2104 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
2105 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
2106 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
2107 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
2108 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
2109 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
2110 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
2111 // CHECK9-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8
2112 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2113 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8
2114 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8
2115 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8
2116 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8
2117 // CHECK9-NEXT: [[_TMP26:%.*]] = alloca i32, align 4
2118 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
2119 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
2120 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
2121 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2122 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
2123 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4
2124 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2125 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
2126 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
2127 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
2128 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
2129 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
2130 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
2131 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2132 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
2133 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
2134 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
2135 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2136 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
2137 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
2138 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2139 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
2140 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
2141 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2142 // CHECK9-NEXT: store i64 4, i64* [[TMP10]], align 8
2143 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2144 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8
2145 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2146 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
2147 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
2148 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2149 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
2150 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
2151 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
2152 // CHECK9-NEXT: store i64 8, i64* [[TMP16]], align 8
2153 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2154 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8
2155 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2156 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
2157 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8
2158 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2159 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
2160 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8
2161 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2162 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
2163 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2164 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8
2165 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2166 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2167 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2168 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
2169 // CHECK9-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
2170 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2171 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
2172 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2173 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2174 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2175 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2176 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
2177 // CHECK9-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
2178 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
2179 // CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2180 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
2181 // CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2182 // CHECK9: omp_offload.failed:
2183 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR4:[0-9]+]]
2184 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
2185 // CHECK9: omp_offload.cont:
2186 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
2187 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
2188 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4
2189 // CHECK9-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
2190 // CHECK9-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
2191 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
2192 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
2193 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8
2194 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
2195 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
2196 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8
2197 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
2198 // CHECK9-NEXT: store i64 4, i64* [[TMP40]], align 8
2199 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
2200 // CHECK9-NEXT: store i8* null, i8** [[TMP41]], align 8
2201 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
2202 // CHECK9-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
2203 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8
2204 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
2205 // CHECK9-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
2206 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8
2207 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
2208 // CHECK9-NEXT: store i64 8, i64* [[TMP46]], align 8
2209 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
2210 // CHECK9-NEXT: store i8* null, i8** [[TMP47]], align 8
2211 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
2212 // CHECK9-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
2213 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8
2214 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
2215 // CHECK9-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
2216 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8
2217 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
2218 // CHECK9-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8
2219 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
2220 // CHECK9-NEXT: store i8* null, i8** [[TMP53]], align 8
2221 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
2222 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
2223 // CHECK9-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
2224 // CHECK9-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4
2225 // CHECK9-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
2226 // CHECK9-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
2227 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
2228 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
2229 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
2230 // CHECK9-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
2231 // CHECK9-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
2232 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
2233 // CHECK9-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
2234 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP60]])
2235 // CHECK9-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2236 // CHECK9-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
2237 // CHECK9-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
2238 // CHECK9: omp_offload.failed16:
2239 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR4]]
2240 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT17]]
2241 // CHECK9: omp_offload.cont17:
2242 // CHECK9-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4
2243 // CHECK9-NEXT: store i32 [[TMP63]], i32* [[DOTCAPTURE_EXPR_18]], align 4
2244 // CHECK9-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
2245 // CHECK9-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
2246 // CHECK9-NEXT: store i32 [[TMP64]], i32* [[CONV20]], align 4
2247 // CHECK9-NEXT: [[TMP65:%.*]] = load i64, i64* [[N_CASTED19]], align 8
2248 // CHECK9-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
2249 // CHECK9-NEXT: [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
2250 // CHECK9-NEXT: store i32 [[TMP66]], i32* [[CONV21]], align 4
2251 // CHECK9-NEXT: [[TMP67:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2252 // CHECK9-NEXT: [[TMP68:%.*]] = mul nuw i64 [[TMP1]], 4
2253 // CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
2254 // CHECK9-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64*
2255 // CHECK9-NEXT: store i64 [[TMP65]], i64* [[TMP70]], align 8
2256 // CHECK9-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
2257 // CHECK9-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i64*
2258 // CHECK9-NEXT: store i64 [[TMP65]], i64* [[TMP72]], align 8
2259 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
2260 // CHECK9-NEXT: store i64 4, i64* [[TMP73]], align 8
2261 // CHECK9-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
2262 // CHECK9-NEXT: store i8* null, i8** [[TMP74]], align 8
2263 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
2264 // CHECK9-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64*
2265 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP76]], align 8
2266 // CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
2267 // CHECK9-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64*
2268 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP78]], align 8
2269 // CHECK9-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 1
2270 // CHECK9-NEXT: store i64 8, i64* [[TMP79]], align 8
2271 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
2272 // CHECK9-NEXT: store i8* null, i8** [[TMP80]], align 8
2273 // CHECK9-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2
2274 // CHECK9-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32**
2275 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP82]], align 8
2276 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2
2277 // CHECK9-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
2278 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP84]], align 8
2279 // CHECK9-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2
2280 // CHECK9-NEXT: store i64 [[TMP68]], i64* [[TMP85]], align 8
2281 // CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2
2282 // CHECK9-NEXT: store i8* null, i8** [[TMP86]], align 8
2283 // CHECK9-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3
2284 // CHECK9-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64*
2285 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP88]], align 8
2286 // CHECK9-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3
2287 // CHECK9-NEXT: [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i64*
2288 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8
2289 // CHECK9-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 3
2290 // CHECK9-NEXT: store i64 4, i64* [[TMP91]], align 8
2291 // CHECK9-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3
2292 // CHECK9-NEXT: store i8* null, i8** [[TMP92]], align 8
2293 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
2294 // CHECK9-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
2295 // CHECK9-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
2296 // CHECK9-NEXT: [[TMP96:%.*]] = load i32, i32* [[N]], align 4
2297 // CHECK9-NEXT: store i32 [[TMP96]], i32* [[DOTCAPTURE_EXPR_27]], align 4
2298 // CHECK9-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
2299 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP97]], 0
2300 // CHECK9-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
2301 // CHECK9-NEXT: [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1
2302 // CHECK9-NEXT: store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4
2303 // CHECK9-NEXT: [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
2304 // CHECK9-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP98]], 1
2305 // CHECK9-NEXT: [[TMP99:%.*]] = zext i32 [[ADD32]] to i64
2306 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP99]])
2307 // CHECK9-NEXT: [[TMP100:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP93]], i8** [[TMP94]], i64* [[TMP95]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2308 // CHECK9-NEXT: [[TMP101:%.*]] = icmp ne i32 [[TMP100]], 0
2309 // CHECK9-NEXT: br i1 [[TMP101]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]]
2310 // CHECK9: omp_offload.failed33:
2311 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP65]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP67]]) #[[ATTR4]]
2312 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT34]]
2313 // CHECK9: omp_offload.cont34:
2314 // CHECK9-NEXT: [[TMP102:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
2315 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP102]])
2316 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2317 // CHECK9-NEXT: [[TMP103:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
2318 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP103]])
2319 // CHECK9-NEXT: [[TMP104:%.*]] = load i32, i32* [[RETVAL]], align 4
2320 // CHECK9-NEXT: ret i32 [[TMP104]]
2321 //
2322 //
2323 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
2324 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2325 // CHECK9-NEXT: entry:
2326 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2327 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2328 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2329 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2330 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2331 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2332 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2333 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2334 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2335 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2336 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2337 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2338 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
2339 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
2340 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
2341 // CHECK9-NEXT: ret void
2342 //
2343 //
2344 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
2345 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
2346 // CHECK9-NEXT: entry:
2347 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2348 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2349 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2350 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2351 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2352 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2353 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2354 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2355 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2356 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2357 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2358 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2359 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2360 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2361 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
2362 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2363 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2364 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2365 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2366 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2367 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2368 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2369 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2370 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2371 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
2372 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2373 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2374 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2375 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2376 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2377 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
2378 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2379 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2380 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2381 // CHECK9: omp.precond.then:
2382 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2383 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2384 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2385 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2386 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2387 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2388 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2389 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2390 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2391 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2392 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
2393 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2394 // CHECK9: cond.true:
2395 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2396 // CHECK9-NEXT: br label [[COND_END:%.*]]
2397 // CHECK9: cond.false:
2398 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2399 // CHECK9-NEXT: br label [[COND_END]]
2400 // CHECK9: cond.end:
2401 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2402 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2403 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2404 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
2405 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2406 // CHECK9: omp.inner.for.cond:
2407 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
2408 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
2409 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2410 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2411 // CHECK9: omp.inner.for.body:
2412 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
2413 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2414 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2415 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !9
2416 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !9
2417 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
2418 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
2419 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9
2420 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2421 // CHECK9: omp.body.continue:
2422 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2423 // CHECK9: omp.inner.for.inc:
2424 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
2425 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
2426 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
2427 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
2428 // CHECK9: omp.inner.for.end:
2429 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2430 // CHECK9: omp.loop.exit:
2431 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2432 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
2433 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
2434 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2435 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2436 // CHECK9-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2437 // CHECK9: .omp.final.then:
2438 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2439 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
2440 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2441 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
2442 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
2443 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
2444 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
2445 // CHECK9: .omp.final.done:
2446 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
2447 // CHECK9: omp.precond.end:
2448 // CHECK9-NEXT: ret void
2449 //
2450 //
2451 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
2452 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2453 // CHECK9-NEXT: entry:
2454 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2455 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2456 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2457 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2458 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2459 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2460 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2461 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2462 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2463 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2464 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2465 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2466 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
2467 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
2468 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
2469 // CHECK9-NEXT: ret void
2470 //
2471 //
2472 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
2473 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
2474 // CHECK9-NEXT: entry:
2475 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2476 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2477 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2478 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2479 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2480 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2481 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2482 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2483 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2484 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2485 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2486 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2487 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2488 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2489 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
2490 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2491 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2492 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2493 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2494 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2495 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2496 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2497 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2498 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2499 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
2500 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2501 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2502 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2503 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2504 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2505 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
2506 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2507 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2508 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2509 // CHECK9: omp.precond.then:
2510 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2511 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2512 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2513 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2514 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2515 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2516 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2517 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2518 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2519 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2520 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
2521 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2522 // CHECK9: cond.true:
2523 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2524 // CHECK9-NEXT: br label [[COND_END:%.*]]
2525 // CHECK9: cond.false:
2526 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2527 // CHECK9-NEXT: br label [[COND_END]]
2528 // CHECK9: cond.end:
2529 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2530 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2531 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2532 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
2533 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2534 // CHECK9: omp.inner.for.cond:
2535 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2536 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
2537 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2538 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2539 // CHECK9: omp.inner.for.body:
2540 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2541 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2542 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2543 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15
2544 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15
2545 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
2546 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
2547 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
2548 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2549 // CHECK9: omp.body.continue:
2550 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2551 // CHECK9: omp.inner.for.inc:
2552 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2553 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
2554 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2555 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
2556 // CHECK9: omp.inner.for.end:
2557 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2558 // CHECK9: omp.loop.exit:
2559 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2560 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
2561 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
2562 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2563 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2564 // CHECK9-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2565 // CHECK9: .omp.final.then:
2566 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2567 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
2568 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2569 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
2570 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
2571 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
2572 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
2573 // CHECK9: .omp.final.done:
2574 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
2575 // CHECK9: omp.precond.end:
2576 // CHECK9-NEXT: ret void
2577 //
2578 //
2579 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
2580 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
2581 // CHECK9-NEXT: entry:
2582 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2583 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2584 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2585 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2586 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2587 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2588 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2589 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2590 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2591 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2592 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2593 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2594 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2595 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2596 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2597 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2598 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
2599 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
2600 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
2601 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
2602 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
2603 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2604 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
2605 // CHECK9-NEXT: ret void
2606 //
2607 //
2608 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
2609 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
2610 // CHECK9-NEXT: entry:
2611 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2612 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2613 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2614 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2615 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2616 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2617 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2618 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2619 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2620 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
2621 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2622 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2623 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2624 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2625 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2626 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4
2627 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2628 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2629 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2630 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2631 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2632 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2633 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2634 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2635 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2636 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2637 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2638 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2639 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2640 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2641 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2642 // CHECK9-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
2643 // CHECK9-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
2644 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
2645 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2646 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2647 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2648 // CHECK9: omp.precond.then:
2649 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2650 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2651 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2652 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2653 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2654 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
2655 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2656 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2657 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
2658 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2659 // CHECK9: omp.dispatch.cond:
2660 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2661 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2662 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2663 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2664 // CHECK9: cond.true:
2665 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2666 // CHECK9-NEXT: br label [[COND_END:%.*]]
2667 // CHECK9: cond.false:
2668 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2669 // CHECK9-NEXT: br label [[COND_END]]
2670 // CHECK9: cond.end:
2671 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2672 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2673 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2674 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2675 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2676 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2677 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2678 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2679 // CHECK9: omp.dispatch.body:
2680 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2681 // CHECK9: omp.inner.for.cond:
2682 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2683 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
2684 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
2685 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2686 // CHECK9: omp.inner.for.body:
2687 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2688 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
2689 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2690 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !18
2691 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !18
2692 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
2693 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
2694 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
2695 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2696 // CHECK9: omp.body.continue:
2697 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2698 // CHECK9: omp.inner.for.inc:
2699 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2700 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
2701 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2702 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
2703 // CHECK9: omp.inner.for.end:
2704 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2705 // CHECK9: omp.dispatch.inc:
2706 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2707 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2708 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
2709 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_LB]], align 4
2710 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2711 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2712 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
2713 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_UB]], align 4
2714 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
2715 // CHECK9: omp.dispatch.end:
2716 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2717 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
2718 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
2719 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2720 // CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
2721 // CHECK9-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2722 // CHECK9: .omp.final.then:
2723 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2724 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP29]], 0
2725 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
2726 // CHECK9-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
2727 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
2728 // CHECK9-NEXT: store i32 [[ADD15]], i32* [[I5]], align 4
2729 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
2730 // CHECK9: .omp.final.done:
2731 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
2732 // CHECK9: omp.precond.end:
2733 // CHECK9-NEXT: ret void
2734 //
2735 //
2736 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
2737 // CHECK9-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
2738 // CHECK9-NEXT: entry:
2739 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2740 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
2741 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2742 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2743 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2744 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2745 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
2746 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
2747 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
2748 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
2749 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8
2750 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8
2751 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8
2752 // CHECK9-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
2753 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2754 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2755 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
2756 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
2757 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2758 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
2759 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
2760 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2761 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8
2762 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2763 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2764 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
2765 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2766 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
2767 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2768 // CHECK9: omp_offload.failed:
2769 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR4]]
2770 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
2771 // CHECK9: omp_offload.cont:
2772 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
2773 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
2774 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
2775 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
2776 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
2777 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
2778 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
2779 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8
2780 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
2781 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
2782 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
2783 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2784 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2785 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
2786 // CHECK9: omp_offload.failed5:
2787 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR4]]
2788 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]]
2789 // CHECK9: omp_offload.cont6:
2790 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
2791 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
2792 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
2793 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
2794 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
2795 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
2796 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
2797 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8
2798 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
2799 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
2800 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
2801 // CHECK9-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2802 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2803 // CHECK9-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
2804 // CHECK9: omp_offload.failed11:
2805 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR4]]
2806 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT12]]
2807 // CHECK9: omp_offload.cont12:
2808 // CHECK9-NEXT: ret i32 0
2809 //
2810 //
2811 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
2812 // CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2813 // CHECK9-NEXT: entry:
2814 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2815 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2816 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2817 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2818 // CHECK9-NEXT: ret void
2819 //
2820 //
2821 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
2822 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
2823 // CHECK9-NEXT: entry:
2824 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2825 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2826 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2827 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2828 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2829 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2830 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2831 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2832 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2833 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2834 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2835 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2836 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2837 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2838 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2839 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2840 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2841 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2842 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2843 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2844 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2845 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2846 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2847 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2848 // CHECK9: cond.true:
2849 // CHECK9-NEXT: br label [[COND_END:%.*]]
2850 // CHECK9: cond.false:
2851 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2852 // CHECK9-NEXT: br label [[COND_END]]
2853 // CHECK9: cond.end:
2854 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2855 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2856 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2857 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2858 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2859 // CHECK9: omp.inner.for.cond:
2860 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
2861 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
2862 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2863 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2864 // CHECK9: omp.inner.for.body:
2865 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
2866 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2867 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2868 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
2869 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
2870 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
2871 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2872 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
2873 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2874 // CHECK9: omp.body.continue:
2875 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2876 // CHECK9: omp.inner.for.inc:
2877 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
2878 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2879 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
2880 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
2881 // CHECK9: omp.inner.for.end:
2882 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2883 // CHECK9: omp.loop.exit:
2884 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2885 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2886 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2887 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2888 // CHECK9: .omp.final.then:
2889 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
2890 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
2891 // CHECK9: .omp.final.done:
2892 // CHECK9-NEXT: ret void
2893 //
2894 //
2895 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
2896 // CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2897 // CHECK9-NEXT: entry:
2898 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2899 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2900 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2901 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2902 // CHECK9-NEXT: ret void
2903 //
2904 //
2905 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
2906 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
2907 // CHECK9-NEXT: entry:
2908 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2909 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2910 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2911 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2912 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2913 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2914 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2915 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2916 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2917 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2918 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2919 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2920 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2921 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2922 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2923 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2924 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2925 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2926 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2927 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2928 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2929 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2930 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2931 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2932 // CHECK9: cond.true:
2933 // CHECK9-NEXT: br label [[COND_END:%.*]]
2934 // CHECK9: cond.false:
2935 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2936 // CHECK9-NEXT: br label [[COND_END]]
2937 // CHECK9: cond.end:
2938 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2939 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2940 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2941 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2942 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2943 // CHECK9: omp.inner.for.cond:
2944 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
2945 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
2946 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2947 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2948 // CHECK9: omp.inner.for.body:
2949 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
2950 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2951 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2952 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
2953 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
2954 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
2955 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2956 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
2957 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2958 // CHECK9: omp.body.continue:
2959 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2960 // CHECK9: omp.inner.for.inc:
2961 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
2962 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2963 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
2964 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
2965 // CHECK9: omp.inner.for.end:
2966 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2967 // CHECK9: omp.loop.exit:
2968 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2969 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2970 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2971 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2972 // CHECK9: .omp.final.then:
2973 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
2974 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
2975 // CHECK9: .omp.final.done:
2976 // CHECK9-NEXT: ret void
2977 //
2978 //
2979 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
2980 // CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2981 // CHECK9-NEXT: entry:
2982 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2983 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2984 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2985 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2986 // CHECK9-NEXT: ret void
2987 //
2988 //
2989 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10
2990 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
2991 // CHECK9-NEXT: entry:
2992 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2993 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2994 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2995 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2996 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2997 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2998 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2999 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3000 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3001 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3002 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3003 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3004 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3005 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3006 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3007 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3008 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3009 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3010 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3011 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3012 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
3013 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3014 // CHECK9: omp.dispatch.cond:
3015 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3016 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3017 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3018 // CHECK9: cond.true:
3019 // CHECK9-NEXT: br label [[COND_END:%.*]]
3020 // CHECK9: cond.false:
3021 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3022 // CHECK9-NEXT: br label [[COND_END]]
3023 // CHECK9: cond.end:
3024 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3025 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3026 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3027 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3028 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3029 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3030 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3031 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3032 // CHECK9: omp.dispatch.body:
3033 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3034 // CHECK9: omp.inner.for.cond:
3035 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
3036 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
3037 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3038 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3039 // CHECK9: omp.inner.for.body:
3040 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
3041 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3042 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3043 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
3044 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27
3045 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
3046 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3047 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27
3048 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3049 // CHECK9: omp.body.continue:
3050 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3051 // CHECK9: omp.inner.for.inc:
3052 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
3053 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
3054 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
3055 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
3056 // CHECK9: omp.inner.for.end:
3057 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3058 // CHECK9: omp.dispatch.inc:
3059 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3060 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3061 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3062 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
3063 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3064 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3065 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
3066 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
3067 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
3068 // CHECK9: omp.dispatch.end:
3069 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3070 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3071 // CHECK9-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
3072 // CHECK9-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3073 // CHECK9: .omp.final.then:
3074 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
3075 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3076 // CHECK9: .omp.final.done:
3077 // CHECK9-NEXT: ret void
3078 //
3079 //
3080 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3081 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
3082 // CHECK9-NEXT: entry:
3083 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
3084 // CHECK9-NEXT: ret void
3085 //
3086 //
3087 // CHECK10-LABEL: define {{[^@]+}}@main
3088 // CHECK10-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
3089 // CHECK10-NEXT: entry:
3090 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3091 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
3092 // CHECK10-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
3093 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4
3094 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
3095 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
3096 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3097 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
3098 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
3099 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
3100 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
3101 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3102 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3103 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3104 // CHECK10-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
3105 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
3106 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
3107 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
3108 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
3109 // CHECK10-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
3110 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
3111 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
3112 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
3113 // CHECK10-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8
3114 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3115 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8
3116 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8
3117 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8
3118 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8
3119 // CHECK10-NEXT: [[_TMP26:%.*]] = alloca i32, align 4
3120 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
3121 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
3122 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
3123 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3124 // CHECK10-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
3125 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4
3126 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3127 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
3128 // CHECK10-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
3129 // CHECK10-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
3130 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
3131 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
3132 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
3133 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3134 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
3135 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
3136 // CHECK10-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
3137 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3138 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
3139 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
3140 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3141 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
3142 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
3143 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3144 // CHECK10-NEXT: store i64 4, i64* [[TMP10]], align 8
3145 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3146 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8
3147 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3148 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
3149 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
3150 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3151 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
3152 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
3153 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
3154 // CHECK10-NEXT: store i64 8, i64* [[TMP16]], align 8
3155 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
3156 // CHECK10-NEXT: store i8* null, i8** [[TMP17]], align 8
3157 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3158 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
3159 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8
3160 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3161 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
3162 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8
3163 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
3164 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
3165 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
3166 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8
3167 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3168 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3169 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3170 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
3171 // CHECK10-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
3172 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3173 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
3174 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3175 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3176 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3177 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3178 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
3179 // CHECK10-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
3180 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
3181 // CHECK10-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3182 // CHECK10-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
3183 // CHECK10-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3184 // CHECK10: omp_offload.failed:
3185 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR4:[0-9]+]]
3186 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
3187 // CHECK10: omp_offload.cont:
3188 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
3189 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
3190 // CHECK10-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4
3191 // CHECK10-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
3192 // CHECK10-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
3193 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
3194 // CHECK10-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
3195 // CHECK10-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8
3196 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
3197 // CHECK10-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
3198 // CHECK10-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8
3199 // CHECK10-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
3200 // CHECK10-NEXT: store i64 4, i64* [[TMP40]], align 8
3201 // CHECK10-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
3202 // CHECK10-NEXT: store i8* null, i8** [[TMP41]], align 8
3203 // CHECK10-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
3204 // CHECK10-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
3205 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8
3206 // CHECK10-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
3207 // CHECK10-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
3208 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8
3209 // CHECK10-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
3210 // CHECK10-NEXT: store i64 8, i64* [[TMP46]], align 8
3211 // CHECK10-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
3212 // CHECK10-NEXT: store i8* null, i8** [[TMP47]], align 8
3213 // CHECK10-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
3214 // CHECK10-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
3215 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8
3216 // CHECK10-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
3217 // CHECK10-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
3218 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8
3219 // CHECK10-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
3220 // CHECK10-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8
3221 // CHECK10-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
3222 // CHECK10-NEXT: store i8* null, i8** [[TMP53]], align 8
3223 // CHECK10-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
3224 // CHECK10-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
3225 // CHECK10-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
3226 // CHECK10-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4
3227 // CHECK10-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
3228 // CHECK10-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
3229 // CHECK10-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
3230 // CHECK10-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
3231 // CHECK10-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
3232 // CHECK10-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
3233 // CHECK10-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
3234 // CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
3235 // CHECK10-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
3236 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP60]])
3237 // CHECK10-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3238 // CHECK10-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
3239 // CHECK10-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
3240 // CHECK10: omp_offload.failed16:
3241 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR4]]
3242 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT17]]
3243 // CHECK10: omp_offload.cont17:
3244 // CHECK10-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4
3245 // CHECK10-NEXT: store i32 [[TMP63]], i32* [[DOTCAPTURE_EXPR_18]], align 4
3246 // CHECK10-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
3247 // CHECK10-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
3248 // CHECK10-NEXT: store i32 [[TMP64]], i32* [[CONV20]], align 4
3249 // CHECK10-NEXT: [[TMP65:%.*]] = load i64, i64* [[N_CASTED19]], align 8
3250 // CHECK10-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
3251 // CHECK10-NEXT: [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
3252 // CHECK10-NEXT: store i32 [[TMP66]], i32* [[CONV21]], align 4
3253 // CHECK10-NEXT: [[TMP67:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3254 // CHECK10-NEXT: [[TMP68:%.*]] = mul nuw i64 [[TMP1]], 4
3255 // CHECK10-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
3256 // CHECK10-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64*
3257 // CHECK10-NEXT: store i64 [[TMP65]], i64* [[TMP70]], align 8
3258 // CHECK10-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
3259 // CHECK10-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i64*
3260 // CHECK10-NEXT: store i64 [[TMP65]], i64* [[TMP72]], align 8
3261 // CHECK10-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
3262 // CHECK10-NEXT: store i64 4, i64* [[TMP73]], align 8
3263 // CHECK10-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
3264 // CHECK10-NEXT: store i8* null, i8** [[TMP74]], align 8
3265 // CHECK10-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
3266 // CHECK10-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64*
3267 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP76]], align 8
3268 // CHECK10-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
3269 // CHECK10-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64*
3270 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP78]], align 8
3271 // CHECK10-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 1
3272 // CHECK10-NEXT: store i64 8, i64* [[TMP79]], align 8
3273 // CHECK10-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
3274 // CHECK10-NEXT: store i8* null, i8** [[TMP80]], align 8
3275 // CHECK10-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2
3276 // CHECK10-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32**
3277 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP82]], align 8
3278 // CHECK10-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2
3279 // CHECK10-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
3280 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP84]], align 8
3281 // CHECK10-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2
3282 // CHECK10-NEXT: store i64 [[TMP68]], i64* [[TMP85]], align 8
3283 // CHECK10-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2
3284 // CHECK10-NEXT: store i8* null, i8** [[TMP86]], align 8
3285 // CHECK10-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3
3286 // CHECK10-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64*
3287 // CHECK10-NEXT: store i64 [[TMP67]], i64* [[TMP88]], align 8
3288 // CHECK10-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3
3289 // CHECK10-NEXT: [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i64*
3290 // CHECK10-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8
3291 // CHECK10-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 3
3292 // CHECK10-NEXT: store i64 4, i64* [[TMP91]], align 8
3293 // CHECK10-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3
3294 // CHECK10-NEXT: store i8* null, i8** [[TMP92]], align 8
3295 // CHECK10-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
3296 // CHECK10-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
3297 // CHECK10-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
3298 // CHECK10-NEXT: [[TMP96:%.*]] = load i32, i32* [[N]], align 4
3299 // CHECK10-NEXT: store i32 [[TMP96]], i32* [[DOTCAPTURE_EXPR_27]], align 4
3300 // CHECK10-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
3301 // CHECK10-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP97]], 0
3302 // CHECK10-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
3303 // CHECK10-NEXT: [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1
3304 // CHECK10-NEXT: store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4
3305 // CHECK10-NEXT: [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
3306 // CHECK10-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP98]], 1
3307 // CHECK10-NEXT: [[TMP99:%.*]] = zext i32 [[ADD32]] to i64
3308 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP99]])
3309 // CHECK10-NEXT: [[TMP100:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP93]], i8** [[TMP94]], i64* [[TMP95]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3310 // CHECK10-NEXT: [[TMP101:%.*]] = icmp ne i32 [[TMP100]], 0
3311 // CHECK10-NEXT: br i1 [[TMP101]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]]
3312 // CHECK10: omp_offload.failed33:
3313 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP65]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP67]]) #[[ATTR4]]
3314 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT34]]
3315 // CHECK10: omp_offload.cont34:
3316 // CHECK10-NEXT: [[TMP102:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
3317 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP102]])
3318 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
3319 // CHECK10-NEXT: [[TMP103:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
3320 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP103]])
3321 // CHECK10-NEXT: [[TMP104:%.*]] = load i32, i32* [[RETVAL]], align 4
3322 // CHECK10-NEXT: ret i32 [[TMP104]]
3323 //
3324 //
3325 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
3326 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
3327 // CHECK10-NEXT: entry:
3328 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3329 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3330 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
3331 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3332 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3333 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3334 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
3335 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3336 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3337 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3338 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
3339 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3340 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
3341 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
3342 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
3343 // CHECK10-NEXT: ret void
3344 //
3345 //
3346 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
3347 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
3348 // CHECK10-NEXT: entry:
3349 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3350 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3351 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3352 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3353 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
3354 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3355 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3356 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3357 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3358 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3359 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3360 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3361 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3362 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3363 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
3364 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3365 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3366 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3367 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3368 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
3369 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3370 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3371 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3372 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
3373 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
3374 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3375 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
3376 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3377 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3378 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3379 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
3380 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3381 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
3382 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3383 // CHECK10: omp.precond.then:
3384 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3385 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3386 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
3387 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3388 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3389 // CHECK10-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3390 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
3391 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3392 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3393 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3394 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
3395 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3396 // CHECK10: cond.true:
3397 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3398 // CHECK10-NEXT: br label [[COND_END:%.*]]
3399 // CHECK10: cond.false:
3400 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3401 // CHECK10-NEXT: br label [[COND_END]]
3402 // CHECK10: cond.end:
3403 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
3404 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3405 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3406 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
3407 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3408 // CHECK10: omp.inner.for.cond:
3409 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3410 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
3411 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3412 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3413 // CHECK10: omp.inner.for.body:
3414 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3415 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
3416 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3417 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !9
3418 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !9
3419 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
3420 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
3421 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9
3422 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3423 // CHECK10: omp.body.continue:
3424 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3425 // CHECK10: omp.inner.for.inc:
3426 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3427 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
3428 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3429 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3430 // CHECK10: omp.inner.for.end:
3431 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3432 // CHECK10: omp.loop.exit:
3433 // CHECK10-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3434 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
3435 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
3436 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3437 // CHECK10-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
3438 // CHECK10-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3439 // CHECK10: .omp.final.then:
3440 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3441 // CHECK10-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
3442 // CHECK10-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
3443 // CHECK10-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
3444 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
3445 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
3446 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
3447 // CHECK10: .omp.final.done:
3448 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
3449 // CHECK10: omp.precond.end:
3450 // CHECK10-NEXT: ret void
3451 //
3452 //
3453 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
3454 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3455 // CHECK10-NEXT: entry:
3456 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3457 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3458 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
3459 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3460 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3461 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3462 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
3463 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3464 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3465 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3466 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
3467 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3468 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
3469 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
3470 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
3471 // CHECK10-NEXT: ret void
3472 //
3473 //
3474 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
3475 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
3476 // CHECK10-NEXT: entry:
3477 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3478 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3479 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3480 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3481 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
3482 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3483 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3484 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3485 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3486 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3487 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3488 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3489 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3490 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3491 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
3492 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3493 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3494 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3495 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3496 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
3497 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3498 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3499 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3500 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
3501 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
3502 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3503 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
3504 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3505 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3506 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3507 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
3508 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3509 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
3510 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3511 // CHECK10: omp.precond.then:
3512 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3513 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3514 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
3515 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3516 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3517 // CHECK10-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3518 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
3519 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3520 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3521 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3522 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
3523 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3524 // CHECK10: cond.true:
3525 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3526 // CHECK10-NEXT: br label [[COND_END:%.*]]
3527 // CHECK10: cond.false:
3528 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3529 // CHECK10-NEXT: br label [[COND_END]]
3530 // CHECK10: cond.end:
3531 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
3532 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3533 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3534 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
3535 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3536 // CHECK10: omp.inner.for.cond:
3537 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
3538 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
3539 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3540 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3541 // CHECK10: omp.inner.for.body:
3542 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
3543 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
3544 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3545 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15
3546 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15
3547 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
3548 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
3549 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
3550 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3551 // CHECK10: omp.body.continue:
3552 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3553 // CHECK10: omp.inner.for.inc:
3554 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
3555 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
3556 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
3557 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
3558 // CHECK10: omp.inner.for.end:
3559 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3560 // CHECK10: omp.loop.exit:
3561 // CHECK10-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3562 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
3563 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
3564 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3565 // CHECK10-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
3566 // CHECK10-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3567 // CHECK10: .omp.final.then:
3568 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3569 // CHECK10-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
3570 // CHECK10-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
3571 // CHECK10-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
3572 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
3573 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
3574 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
3575 // CHECK10: .omp.final.done:
3576 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
3577 // CHECK10: omp.precond.end:
3578 // CHECK10-NEXT: ret void
3579 //
3580 //
3581 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
3582 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
3583 // CHECK10-NEXT: entry:
3584 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3585 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3586 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
3587 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3588 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3589 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3590 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3591 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3592 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
3593 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3594 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3595 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3596 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3597 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
3598 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
3599 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3600 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
3601 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
3602 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
3603 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
3604 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
3605 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3606 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
3607 // CHECK10-NEXT: ret void
3608 //
3609 //
3610 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
3611 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
3612 // CHECK10-NEXT: entry:
3613 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3614 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3615 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3616 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3617 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
3618 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3619 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3620 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3621 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3622 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
3623 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3624 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3625 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3626 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3627 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3628 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4
3629 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3630 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3631 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3632 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3633 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
3634 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3635 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3636 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3637 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3638 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
3639 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
3640 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3641 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3642 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
3643 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3644 // CHECK10-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
3645 // CHECK10-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
3646 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
3647 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3648 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
3649 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3650 // CHECK10: omp.precond.then:
3651 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3652 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3653 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
3654 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3655 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3656 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
3657 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3658 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3659 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
3660 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3661 // CHECK10: omp.dispatch.cond:
3662 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3663 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3664 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
3665 // CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3666 // CHECK10: cond.true:
3667 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3668 // CHECK10-NEXT: br label [[COND_END:%.*]]
3669 // CHECK10: cond.false:
3670 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3671 // CHECK10-NEXT: br label [[COND_END]]
3672 // CHECK10: cond.end:
3673 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
3674 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3675 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3676 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
3677 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3678 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3679 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
3680 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3681 // CHECK10: omp.dispatch.body:
3682 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3683 // CHECK10: omp.inner.for.cond:
3684 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
3685 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
3686 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
3687 // CHECK10-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3688 // CHECK10: omp.inner.for.body:
3689 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
3690 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
3691 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3692 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !18
3693 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !18
3694 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
3695 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
3696 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
3697 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3698 // CHECK10: omp.body.continue:
3699 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3700 // CHECK10: omp.inner.for.inc:
3701 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
3702 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
3703 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
3704 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
3705 // CHECK10: omp.inner.for.end:
3706 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3707 // CHECK10: omp.dispatch.inc:
3708 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3709 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3710 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
3711 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_LB]], align 4
3712 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3713 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3714 // CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
3715 // CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_UB]], align 4
3716 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]]
3717 // CHECK10: omp.dispatch.end:
3718 // CHECK10-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3719 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
3720 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
3721 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3722 // CHECK10-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
3723 // CHECK10-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3724 // CHECK10: .omp.final.then:
3725 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3726 // CHECK10-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP29]], 0
3727 // CHECK10-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
3728 // CHECK10-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
3729 // CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
3730 // CHECK10-NEXT: store i32 [[ADD15]], i32* [[I5]], align 4
3731 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
3732 // CHECK10: .omp.final.done:
3733 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
3734 // CHECK10: omp.precond.end:
3735 // CHECK10-NEXT: ret void
3736 //
3737 //
3738 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
3739 // CHECK10-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
3740 // CHECK10-NEXT: entry:
3741 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
3742 // CHECK10-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
3743 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3744 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3745 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3746 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3747 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
3748 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
3749 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
3750 // CHECK10-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
3751 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8
3752 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8
3753 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8
3754 // CHECK10-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
3755 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3756 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3757 // CHECK10-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
3758 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
3759 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3760 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
3761 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
3762 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3763 // CHECK10-NEXT: store i8* null, i8** [[TMP4]], align 8
3764 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3765 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3766 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
3767 // CHECK10-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3768 // CHECK10-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
3769 // CHECK10-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3770 // CHECK10: omp_offload.failed:
3771 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR4]]
3772 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
3773 // CHECK10: omp_offload.cont:
3774 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
3775 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
3776 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
3777 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
3778 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
3779 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
3780 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
3781 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8
3782 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
3783 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
3784 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
3785 // CHECK10-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3786 // CHECK10-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3787 // CHECK10-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
3788 // CHECK10: omp_offload.failed5:
3789 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR4]]
3790 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT6]]
3791 // CHECK10: omp_offload.cont6:
3792 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
3793 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
3794 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
3795 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
3796 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
3797 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
3798 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
3799 // CHECK10-NEXT: store i8* null, i8** [[TMP22]], align 8
3800 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
3801 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
3802 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
3803 // CHECK10-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3804 // CHECK10-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3805 // CHECK10-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
3806 // CHECK10: omp_offload.failed11:
3807 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR4]]
3808 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT12]]
3809 // CHECK10: omp_offload.cont12:
3810 // CHECK10-NEXT: ret i32 0
3811 //
3812 //
3813 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
3814 // CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3815 // CHECK10-NEXT: entry:
3816 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3817 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3818 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3819 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
3820 // CHECK10-NEXT: ret void
3821 //
3822 //
3823 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5
3824 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
3825 // CHECK10-NEXT: entry:
3826 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3827 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3828 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3829 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3830 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3831 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3832 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3833 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3834 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3835 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3836 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3837 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3838 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3839 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3840 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3841 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3842 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3843 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3844 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3845 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3846 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3847 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3848 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3849 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3850 // CHECK10: cond.true:
3851 // CHECK10-NEXT: br label [[COND_END:%.*]]
3852 // CHECK10: cond.false:
3853 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3854 // CHECK10-NEXT: br label [[COND_END]]
3855 // CHECK10: cond.end:
3856 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3857 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3858 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3859 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3860 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3861 // CHECK10: omp.inner.for.cond:
3862 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
3863 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
3864 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3865 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3866 // CHECK10: omp.inner.for.body:
3867 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
3868 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3869 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3870 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
3871 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
3872 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
3873 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3874 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
3875 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3876 // CHECK10: omp.body.continue:
3877 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3878 // CHECK10: omp.inner.for.inc:
3879 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
3880 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
3881 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
3882 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
3883 // CHECK10: omp.inner.for.end:
3884 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3885 // CHECK10: omp.loop.exit:
3886 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3887 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3888 // CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3889 // CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3890 // CHECK10: .omp.final.then:
3891 // CHECK10-NEXT: store i32 10, i32* [[I]], align 4
3892 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
3893 // CHECK10: .omp.final.done:
3894 // CHECK10-NEXT: ret void
3895 //
3896 //
3897 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
3898 // CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3899 // CHECK10-NEXT: entry:
3900 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3901 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3902 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3903 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
3904 // CHECK10-NEXT: ret void
3905 //
3906 //
3907 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7
3908 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
3909 // CHECK10-NEXT: entry:
3910 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3911 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3912 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3913 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3914 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3915 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3916 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3917 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3918 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3919 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3920 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3921 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3922 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3923 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3924 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3925 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3926 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3927 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3928 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3929 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3930 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3931 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3932 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3933 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3934 // CHECK10: cond.true:
3935 // CHECK10-NEXT: br label [[COND_END:%.*]]
3936 // CHECK10: cond.false:
3937 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3938 // CHECK10-NEXT: br label [[COND_END]]
3939 // CHECK10: cond.end:
3940 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3941 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3942 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3943 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3944 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3945 // CHECK10: omp.inner.for.cond:
3946 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
3947 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
3948 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3949 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3950 // CHECK10: omp.inner.for.body:
3951 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
3952 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3953 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3954 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
3955 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
3956 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
3957 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3958 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
3959 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3960 // CHECK10: omp.body.continue:
3961 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3962 // CHECK10: omp.inner.for.inc:
3963 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
3964 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
3965 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
3966 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
3967 // CHECK10: omp.inner.for.end:
3968 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3969 // CHECK10: omp.loop.exit:
3970 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3971 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3972 // CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3973 // CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3974 // CHECK10: .omp.final.then:
3975 // CHECK10-NEXT: store i32 10, i32* [[I]], align 4
3976 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
3977 // CHECK10: .omp.final.done:
3978 // CHECK10-NEXT: ret void
3979 //
3980 //
3981 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
3982 // CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3983 // CHECK10-NEXT: entry:
3984 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3985 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3986 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3987 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
3988 // CHECK10-NEXT: ret void
3989 //
3990 //
3991 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..10
3992 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
3993 // CHECK10-NEXT: entry:
3994 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3995 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3996 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3997 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3998 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3999 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4000 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4001 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4002 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4003 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
4004 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4005 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4006 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
4007 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
4008 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4009 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
4010 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4011 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4012 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4013 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4014 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
4015 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4016 // CHECK10: omp.dispatch.cond:
4017 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4018 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
4019 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4020 // CHECK10: cond.true:
4021 // CHECK10-NEXT: br label [[COND_END:%.*]]
4022 // CHECK10: cond.false:
4023 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4024 // CHECK10-NEXT: br label [[COND_END]]
4025 // CHECK10: cond.end:
4026 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4027 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4028 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4029 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4030 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4031 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4032 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4033 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4034 // CHECK10: omp.dispatch.body:
4035 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4036 // CHECK10: omp.inner.for.cond:
4037 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
4038 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
4039 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4040 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4041 // CHECK10: omp.inner.for.body:
4042 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
4043 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4044 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4045 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
4046 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27
4047 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4048 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
4049 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27
4050 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4051 // CHECK10: omp.body.continue:
4052 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4053 // CHECK10: omp.inner.for.inc:
4054 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
4055 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
4056 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
4057 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
4058 // CHECK10: omp.inner.for.end:
4059 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4060 // CHECK10: omp.dispatch.inc:
4061 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4062 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4063 // CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
4064 // CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
4065 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4066 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4067 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
4068 // CHECK10-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
4069 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]]
4070 // CHECK10: omp.dispatch.end:
4071 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4072 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4073 // CHECK10-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
4074 // CHECK10-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4075 // CHECK10: .omp.final.then:
4076 // CHECK10-NEXT: store i32 10, i32* [[I]], align 4
4077 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
4078 // CHECK10: .omp.final.done:
4079 // CHECK10-NEXT: ret void
4080 //
4081 //
4082 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4083 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
4084 // CHECK10-NEXT: entry:
4085 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
4086 // CHECK10-NEXT: ret void
4087 //
4088 //
4089 // CHECK11-LABEL: define {{[^@]+}}@main
4090 // CHECK11-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
4091 // CHECK11-NEXT: entry:
4092 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4093 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4094 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
4095 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
4096 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
4097 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
4098 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4099 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
4100 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
4101 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
4102 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
4103 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4104 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4105 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4106 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
4107 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
4108 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
4109 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
4110 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
4111 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
4112 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
4113 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
4114 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
4115 // CHECK11-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4
4116 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4117 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4
4118 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4
4119 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4
4120 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4
4121 // CHECK11-NEXT: [[_TMP23:%.*]] = alloca i32, align 4
4122 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
4123 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
4124 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
4125 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4126 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
4127 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4
4128 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4129 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
4130 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
4131 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
4132 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
4133 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
4134 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
4135 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
4136 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
4137 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
4138 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4139 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
4140 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4
4141 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4142 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
4143 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
4144 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4145 // CHECK11-NEXT: store i64 4, i64* [[TMP10]], align 4
4146 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4147 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4
4148 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4149 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
4150 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
4151 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4152 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
4153 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
4154 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
4155 // CHECK11-NEXT: store i64 4, i64* [[TMP16]], align 4
4156 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4157 // CHECK11-NEXT: store i8* null, i8** [[TMP17]], align 4
4158 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4159 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
4160 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4
4161 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4162 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
4163 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4
4164 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4165 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4
4166 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4167 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4
4168 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4169 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4170 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4171 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
4172 // CHECK11-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
4173 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4174 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
4175 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4176 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4177 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4178 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4179 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
4180 // CHECK11-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
4181 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
4182 // CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
4183 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
4184 // CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4185 // CHECK11: omp_offload.failed:
4186 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR4:[0-9]+]]
4187 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
4188 // CHECK11: omp_offload.cont:
4189 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
4190 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
4191 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
4192 // CHECK11-NEXT: [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
4193 // CHECK11-NEXT: [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
4194 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
4195 // CHECK11-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
4196 // CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP38]], align 4
4197 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
4198 // CHECK11-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
4199 // CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP40]], align 4
4200 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
4201 // CHECK11-NEXT: store i64 4, i64* [[TMP41]], align 4
4202 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
4203 // CHECK11-NEXT: store i8* null, i8** [[TMP42]], align 4
4204 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
4205 // CHECK11-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
4206 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP44]], align 4
4207 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
4208 // CHECK11-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
4209 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP46]], align 4
4210 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
4211 // CHECK11-NEXT: store i64 4, i64* [[TMP47]], align 4
4212 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
4213 // CHECK11-NEXT: store i8* null, i8** [[TMP48]], align 4
4214 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
4215 // CHECK11-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
4216 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4
4217 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
4218 // CHECK11-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
4219 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP52]], align 4
4220 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
4221 // CHECK11-NEXT: store i64 [[TMP36]], i64* [[TMP53]], align 4
4222 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
4223 // CHECK11-NEXT: store i8* null, i8** [[TMP54]], align 4
4224 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
4225 // CHECK11-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
4226 // CHECK11-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
4227 // CHECK11-NEXT: [[TMP58:%.*]] = load i32, i32* [[N]], align 4
4228 // CHECK11-NEXT: store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
4229 // CHECK11-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
4230 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
4231 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
4232 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
4233 // CHECK11-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
4234 // CHECK11-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
4235 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
4236 // CHECK11-NEXT: [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
4237 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP61]])
4238 // CHECK11-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
4239 // CHECK11-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
4240 // CHECK11-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
4241 // CHECK11: omp_offload.failed15:
4242 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR4]]
4243 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT16]]
4244 // CHECK11: omp_offload.cont16:
4245 // CHECK11-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
4246 // CHECK11-NEXT: store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_17]], align 4
4247 // CHECK11-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
4248 // CHECK11-NEXT: store i32 [[TMP65]], i32* [[N_CASTED18]], align 4
4249 // CHECK11-NEXT: [[TMP66:%.*]] = load i32, i32* [[N_CASTED18]], align 4
4250 // CHECK11-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
4251 // CHECK11-NEXT: store i32 [[TMP67]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4252 // CHECK11-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4253 // CHECK11-NEXT: [[TMP69:%.*]] = mul nuw i32 [[TMP0]], 4
4254 // CHECK11-NEXT: [[TMP70:%.*]] = sext i32 [[TMP69]] to i64
4255 // CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
4256 // CHECK11-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32*
4257 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[TMP72]], align 4
4258 // CHECK11-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
4259 // CHECK11-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32*
4260 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[TMP74]], align 4
4261 // CHECK11-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
4262 // CHECK11-NEXT: store i64 4, i64* [[TMP75]], align 4
4263 // CHECK11-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
4264 // CHECK11-NEXT: store i8* null, i8** [[TMP76]], align 4
4265 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
4266 // CHECK11-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32*
4267 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP78]], align 4
4268 // CHECK11-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
4269 // CHECK11-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32*
4270 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP80]], align 4
4271 // CHECK11-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 1
4272 // CHECK11-NEXT: store i64 4, i64* [[TMP81]], align 4
4273 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1
4274 // CHECK11-NEXT: store i8* null, i8** [[TMP82]], align 4
4275 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
4276 // CHECK11-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
4277 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP84]], align 4
4278 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
4279 // CHECK11-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32**
4280 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP86]], align 4
4281 // CHECK11-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2
4282 // CHECK11-NEXT: store i64 [[TMP70]], i64* [[TMP87]], align 4
4283 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2
4284 // CHECK11-NEXT: store i8* null, i8** [[TMP88]], align 4
4285 // CHECK11-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
4286 // CHECK11-NEXT: [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i32*
4287 // CHECK11-NEXT: store i32 [[TMP68]], i32* [[TMP90]], align 4
4288 // CHECK11-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
4289 // CHECK11-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i32*
4290 // CHECK11-NEXT: store i32 [[TMP68]], i32* [[TMP92]], align 4
4291 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
4292 // CHECK11-NEXT: store i64 4, i64* [[TMP93]], align 4
4293 // CHECK11-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3
4294 // CHECK11-NEXT: store i8* null, i8** [[TMP94]], align 4
4295 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
4296 // CHECK11-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
4297 // CHECK11-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
4298 // CHECK11-NEXT: [[TMP98:%.*]] = load i32, i32* [[N]], align 4
4299 // CHECK11-NEXT: store i32 [[TMP98]], i32* [[DOTCAPTURE_EXPR_24]], align 4
4300 // CHECK11-NEXT: [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
4301 // CHECK11-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP99]], 0
4302 // CHECK11-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
4303 // CHECK11-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
4304 // CHECK11-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4
4305 // CHECK11-NEXT: [[TMP100:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
4306 // CHECK11-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP100]], 1
4307 // CHECK11-NEXT: [[TMP101:%.*]] = zext i32 [[ADD29]] to i64
4308 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP101]])
4309 // CHECK11-NEXT: [[TMP102:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP95]], i8** [[TMP96]], i64* [[TMP97]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
4310 // CHECK11-NEXT: [[TMP103:%.*]] = icmp ne i32 [[TMP102]], 0
4311 // CHECK11-NEXT: br i1 [[TMP103]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]]
4312 // CHECK11: omp_offload.failed30:
4313 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP66]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP68]]) #[[ATTR4]]
4314 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT31]]
4315 // CHECK11: omp_offload.cont31:
4316 // CHECK11-NEXT: [[TMP104:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
4317 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP104]])
4318 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
4319 // CHECK11-NEXT: [[TMP105:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
4320 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP105]])
4321 // CHECK11-NEXT: [[TMP106:%.*]] = load i32, i32* [[RETVAL]], align 4
4322 // CHECK11-NEXT: ret i32 [[TMP106]]
4323 //
4324 //
4325 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
4326 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
4327 // CHECK11-NEXT: entry:
4328 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4329 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4330 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4331 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4332 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4333 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4334 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4335 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4336 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4337 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4338 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
4339 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
4340 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
4341 // CHECK11-NEXT: ret void
4342 //
4343 //
4344 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
4345 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
4346 // CHECK11-NEXT: entry:
4347 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4348 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4349 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4350 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4351 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4352 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4353 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4354 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4355 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4356 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4357 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4358 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4359 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4360 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4361 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
4362 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4363 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4364 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4365 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4366 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4367 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4368 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4369 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4370 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
4371 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4372 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4373 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4374 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4375 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4376 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
4377 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4378 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
4379 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4380 // CHECK11: omp.precond.then:
4381 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4382 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4383 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
4384 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4385 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4386 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4387 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
4388 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4389 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4390 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4391 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
4392 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4393 // CHECK11: cond.true:
4394 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4395 // CHECK11-NEXT: br label [[COND_END:%.*]]
4396 // CHECK11: cond.false:
4397 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4398 // CHECK11-NEXT: br label [[COND_END]]
4399 // CHECK11: cond.end:
4400 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
4401 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4402 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4403 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
4404 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4405 // CHECK11: omp.inner.for.cond:
4406 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
4407 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
4408 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4409 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4410 // CHECK11: omp.inner.for.body:
4411 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
4412 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
4413 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4414 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !10
4415 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !10
4416 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]]
4417 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
4418 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4419 // CHECK11: omp.body.continue:
4420 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4421 // CHECK11: omp.inner.for.inc:
4422 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
4423 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
4424 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
4425 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
4426 // CHECK11: omp.inner.for.end:
4427 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4428 // CHECK11: omp.loop.exit:
4429 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4430 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
4431 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
4432 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4433 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
4434 // CHECK11-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4435 // CHECK11: .omp.final.then:
4436 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4437 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
4438 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
4439 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
4440 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
4441 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
4442 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
4443 // CHECK11: .omp.final.done:
4444 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
4445 // CHECK11: omp.precond.end:
4446 // CHECK11-NEXT: ret void
4447 //
4448 //
4449 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
4450 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4451 // CHECK11-NEXT: entry:
4452 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4453 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4454 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4455 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4456 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4457 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4458 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4459 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4460 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4461 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4462 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
4463 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
4464 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
4465 // CHECK11-NEXT: ret void
4466 //
4467 //
4468 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
4469 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
4470 // CHECK11-NEXT: entry:
4471 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4472 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4473 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4474 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4475 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4476 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4477 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4478 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4479 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4480 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4481 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4482 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4483 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4484 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4485 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
4486 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4487 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4488 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4489 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4490 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4491 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4492 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4493 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4494 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
4495 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4496 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4497 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4498 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4499 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4500 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
4501 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4502 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
4503 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4504 // CHECK11: omp.precond.then:
4505 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4506 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4507 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
4508 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4509 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4510 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4511 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
4512 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4513 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4514 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4515 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
4516 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4517 // CHECK11: cond.true:
4518 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4519 // CHECK11-NEXT: br label [[COND_END:%.*]]
4520 // CHECK11: cond.false:
4521 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4522 // CHECK11-NEXT: br label [[COND_END]]
4523 // CHECK11: cond.end:
4524 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
4525 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4526 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4527 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
4528 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4529 // CHECK11: omp.inner.for.cond:
4530 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
4531 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
4532 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4533 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4534 // CHECK11: omp.inner.for.body:
4535 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
4536 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
4537 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4538 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
4539 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
4540 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]]
4541 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
4542 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4543 // CHECK11: omp.body.continue:
4544 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4545 // CHECK11: omp.inner.for.inc:
4546 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
4547 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
4548 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
4549 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
4550 // CHECK11: omp.inner.for.end:
4551 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4552 // CHECK11: omp.loop.exit:
4553 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4554 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
4555 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
4556 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4557 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
4558 // CHECK11-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4559 // CHECK11: .omp.final.then:
4560 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4561 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
4562 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
4563 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
4564 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
4565 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
4566 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
4567 // CHECK11: .omp.final.done:
4568 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
4569 // CHECK11: omp.precond.end:
4570 // CHECK11-NEXT: ret void
4571 //
4572 //
4573 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
4574 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
4575 // CHECK11-NEXT: entry:
4576 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4577 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4578 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4579 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4580 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4581 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4582 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4583 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4584 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4585 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4586 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4587 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4588 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4589 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
4590 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
4591 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4592 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4593 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4594 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
4595 // CHECK11-NEXT: ret void
4596 //
4597 //
4598 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
4599 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
4600 // CHECK11-NEXT: entry:
4601 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4602 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4603 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4604 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4605 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4606 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4607 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4608 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4609 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4610 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
4611 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4612 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4613 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4614 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4615 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4616 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4
4617 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4618 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4619 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4620 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4621 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4622 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4623 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4624 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4625 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4626 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4627 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4628 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4629 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4630 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
4631 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
4632 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
4633 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4634 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
4635 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4636 // CHECK11: omp.precond.then:
4637 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4638 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4639 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
4640 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4641 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4642 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4643 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4644 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4645 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
4646 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4647 // CHECK11: omp.dispatch.cond:
4648 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4649 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4650 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
4651 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4652 // CHECK11: cond.true:
4653 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4654 // CHECK11-NEXT: br label [[COND_END:%.*]]
4655 // CHECK11: cond.false:
4656 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4657 // CHECK11-NEXT: br label [[COND_END]]
4658 // CHECK11: cond.end:
4659 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
4660 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4661 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4662 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
4663 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4664 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4665 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
4666 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4667 // CHECK11: omp.dispatch.body:
4668 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4669 // CHECK11: omp.inner.for.cond:
4670 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
4671 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
4672 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
4673 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4674 // CHECK11: omp.inner.for.body:
4675 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
4676 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
4677 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4678 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
4679 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
4680 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
4681 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
4682 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4683 // CHECK11: omp.body.continue:
4684 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4685 // CHECK11: omp.inner.for.inc:
4686 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
4687 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
4688 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
4689 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
4690 // CHECK11: omp.inner.for.end:
4691 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4692 // CHECK11: omp.dispatch.inc:
4693 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4694 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4695 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
4696 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
4697 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4698 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4699 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
4700 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
4701 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
4702 // CHECK11: omp.dispatch.end:
4703 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4704 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
4705 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
4706 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4707 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
4708 // CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4709 // CHECK11: .omp.final.then:
4710 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4711 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP29]], 0
4712 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
4713 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
4714 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
4715 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I4]], align 4
4716 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
4717 // CHECK11: .omp.final.done:
4718 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
4719 // CHECK11: omp.precond.end:
4720 // CHECK11-NEXT: ret void
4721 //
4722 //
4723 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
4724 // CHECK11-SAME: (i32 [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
4725 // CHECK11-NEXT: entry:
4726 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4727 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
4728 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
4729 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
4730 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
4731 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4732 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
4733 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
4734 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
4735 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
4736 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4
4737 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4
4738 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4
4739 // CHECK11-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
4740 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4741 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4742 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
4743 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
4744 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4745 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
4746 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
4747 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4748 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4
4749 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4750 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4751 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4752 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
4753 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
4754 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4755 // CHECK11: omp_offload.failed:
4756 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR4]]
4757 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
4758 // CHECK11: omp_offload.cont:
4759 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
4760 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
4761 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
4762 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
4763 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
4764 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
4765 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
4766 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4
4767 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
4768 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
4769 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4770 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
4771 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4772 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
4773 // CHECK11: omp_offload.failed5:
4774 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR4]]
4775 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT6]]
4776 // CHECK11: omp_offload.cont6:
4777 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
4778 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
4779 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
4780 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
4781 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
4782 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
4783 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
4784 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4
4785 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
4786 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
4787 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4788 // CHECK11-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
4789 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
4790 // CHECK11-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
4791 // CHECK11: omp_offload.failed11:
4792 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR4]]
4793 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT12]]
4794 // CHECK11: omp_offload.cont12:
4795 // CHECK11-NEXT: ret i32 0
4796 //
4797 //
4798 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
4799 // CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4800 // CHECK11-NEXT: entry:
4801 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4802 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4803 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4804 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
4805 // CHECK11-NEXT: ret void
4806 //
4807 //
4808 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5
4809 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
4810 // CHECK11-NEXT: entry:
4811 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4812 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4813 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4814 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4815 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4816 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4817 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4818 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4819 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4820 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4821 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4822 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4823 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4824 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4825 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4826 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
4827 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4828 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4829 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4830 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4831 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4832 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4833 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
4834 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4835 // CHECK11: cond.true:
4836 // CHECK11-NEXT: br label [[COND_END:%.*]]
4837 // CHECK11: cond.false:
4838 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4839 // CHECK11-NEXT: br label [[COND_END]]
4840 // CHECK11: cond.end:
4841 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4842 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4843 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4844 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4845 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4846 // CHECK11: omp.inner.for.cond:
4847 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
4848 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
4849 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4850 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4851 // CHECK11: omp.inner.for.body:
4852 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
4853 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
4854 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4855 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
4856 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
4857 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
4858 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
4859 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4860 // CHECK11: omp.body.continue:
4861 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4862 // CHECK11: omp.inner.for.inc:
4863 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
4864 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
4865 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
4866 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
4867 // CHECK11: omp.inner.for.end:
4868 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4869 // CHECK11: omp.loop.exit:
4870 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4871 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4872 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4873 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4874 // CHECK11: .omp.final.then:
4875 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
4876 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
4877 // CHECK11: .omp.final.done:
4878 // CHECK11-NEXT: ret void
4879 //
4880 //
4881 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
4882 // CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4883 // CHECK11-NEXT: entry:
4884 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4885 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4886 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4887 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
4888 // CHECK11-NEXT: ret void
4889 //
4890 //
4891 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7
4892 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
4893 // CHECK11-NEXT: entry:
4894 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4895 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4896 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4897 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4898 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4899 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4900 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4901 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4902 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4903 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4904 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4905 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4906 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4907 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4908 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4909 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
4910 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4911 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4912 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4913 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4914 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4915 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4916 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
4917 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4918 // CHECK11: cond.true:
4919 // CHECK11-NEXT: br label [[COND_END:%.*]]
4920 // CHECK11: cond.false:
4921 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4922 // CHECK11-NEXT: br label [[COND_END]]
4923 // CHECK11: cond.end:
4924 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4925 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4926 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4927 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4928 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4929 // CHECK11: omp.inner.for.cond:
4930 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
4931 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
4932 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4933 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4934 // CHECK11: omp.inner.for.body:
4935 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
4936 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
4937 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4938 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
4939 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
4940 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
4941 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
4942 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4943 // CHECK11: omp.body.continue:
4944 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4945 // CHECK11: omp.inner.for.inc:
4946 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
4947 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
4948 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
4949 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
4950 // CHECK11: omp.inner.for.end:
4951 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4952 // CHECK11: omp.loop.exit:
4953 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4954 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4955 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4956 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4957 // CHECK11: .omp.final.then:
4958 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
4959 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
4960 // CHECK11: .omp.final.done:
4961 // CHECK11-NEXT: ret void
4962 //
4963 //
4964 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
4965 // CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4966 // CHECK11-NEXT: entry:
4967 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4968 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4969 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4970 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
4971 // CHECK11-NEXT: ret void
4972 //
4973 //
4974 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10
4975 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
4976 // CHECK11-NEXT: entry:
4977 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4978 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4979 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4980 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4981 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4982 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4983 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4984 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4985 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4986 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4987 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4988 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4989 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4990 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4991 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4992 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
4993 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4994 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4995 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4996 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4997 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
4998 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4999 // CHECK11: omp.dispatch.cond:
5000 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5001 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
5002 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5003 // CHECK11: cond.true:
5004 // CHECK11-NEXT: br label [[COND_END:%.*]]
5005 // CHECK11: cond.false:
5006 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5007 // CHECK11-NEXT: br label [[COND_END]]
5008 // CHECK11: cond.end:
5009 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5010 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5011 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5012 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5013 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5014 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5015 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5016 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5017 // CHECK11: omp.dispatch.body:
5018 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5019 // CHECK11: omp.inner.for.cond:
5020 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
5021 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !28
5022 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5023 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5024 // CHECK11: omp.inner.for.body:
5025 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
5026 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5027 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5028 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !28
5029 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !28
5030 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
5031 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28
5032 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5033 // CHECK11: omp.body.continue:
5034 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5035 // CHECK11: omp.inner.for.inc:
5036 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
5037 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
5038 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
5039 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
5040 // CHECK11: omp.inner.for.end:
5041 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5042 // CHECK11: omp.dispatch.inc:
5043 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5044 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5045 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5046 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
5047 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5048 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5049 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
5050 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
5051 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
5052 // CHECK11: omp.dispatch.end:
5053 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5054 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5055 // CHECK11-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
5056 // CHECK11-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5057 // CHECK11: .omp.final.then:
5058 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
5059 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
5060 // CHECK11: .omp.final.done:
5061 // CHECK11-NEXT: ret void
5062 //
5063 //
5064 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5065 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
5066 // CHECK11-NEXT: entry:
5067 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
5068 // CHECK11-NEXT: ret void
5069 //
5070 //
5071 // CHECK12-LABEL: define {{[^@]+}}@main
5072 // CHECK12-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
5073 // CHECK12-NEXT: entry:
5074 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
5075 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
5076 // CHECK12-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
5077 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4
5078 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
5079 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
5080 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
5081 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
5082 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
5083 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
5084 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
5085 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5086 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5087 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5088 // CHECK12-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
5089 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
5090 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
5091 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
5092 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
5093 // CHECK12-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
5094 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
5095 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
5096 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
5097 // CHECK12-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4
5098 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
5099 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4
5100 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4
5101 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4
5102 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4
5103 // CHECK12-NEXT: [[_TMP23:%.*]] = alloca i32, align 4
5104 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
5105 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
5106 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
5107 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5108 // CHECK12-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
5109 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4
5110 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
5111 // CHECK12-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
5112 // CHECK12-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
5113 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
5114 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
5115 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
5116 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
5117 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
5118 // CHECK12-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
5119 // CHECK12-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
5120 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5121 // CHECK12-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
5122 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4
5123 // CHECK12-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5124 // CHECK12-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
5125 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
5126 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
5127 // CHECK12-NEXT: store i64 4, i64* [[TMP10]], align 4
5128 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5129 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4
5130 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
5131 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
5132 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
5133 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
5134 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
5135 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
5136 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
5137 // CHECK12-NEXT: store i64 4, i64* [[TMP16]], align 4
5138 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
5139 // CHECK12-NEXT: store i8* null, i8** [[TMP17]], align 4
5140 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
5141 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
5142 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4
5143 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
5144 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
5145 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4
5146 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
5147 // CHECK12-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4
5148 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
5149 // CHECK12-NEXT: store i8* null, i8** [[TMP23]], align 4
5150 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5151 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5152 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
5153 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
5154 // CHECK12-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
5155 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5156 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
5157 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5158 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5159 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5160 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5161 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
5162 // CHECK12-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
5163 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
5164 // CHECK12-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
5165 // CHECK12-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
5166 // CHECK12-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5167 // CHECK12: omp_offload.failed:
5168 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR4:[0-9]+]]
5169 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
5170 // CHECK12: omp_offload.cont:
5171 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
5172 // CHECK12-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
5173 // CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
5174 // CHECK12-NEXT: [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
5175 // CHECK12-NEXT: [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
5176 // CHECK12-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
5177 // CHECK12-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
5178 // CHECK12-NEXT: store i32 [[TMP34]], i32* [[TMP38]], align 4
5179 // CHECK12-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
5180 // CHECK12-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
5181 // CHECK12-NEXT: store i32 [[TMP34]], i32* [[TMP40]], align 4
5182 // CHECK12-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
5183 // CHECK12-NEXT: store i64 4, i64* [[TMP41]], align 4
5184 // CHECK12-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
5185 // CHECK12-NEXT: store i8* null, i8** [[TMP42]], align 4
5186 // CHECK12-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
5187 // CHECK12-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
5188 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP44]], align 4
5189 // CHECK12-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
5190 // CHECK12-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
5191 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP46]], align 4
5192 // CHECK12-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
5193 // CHECK12-NEXT: store i64 4, i64* [[TMP47]], align 4
5194 // CHECK12-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
5195 // CHECK12-NEXT: store i8* null, i8** [[TMP48]], align 4
5196 // CHECK12-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
5197 // CHECK12-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
5198 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4
5199 // CHECK12-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
5200 // CHECK12-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
5201 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP52]], align 4
5202 // CHECK12-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
5203 // CHECK12-NEXT: store i64 [[TMP36]], i64* [[TMP53]], align 4
5204 // CHECK12-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
5205 // CHECK12-NEXT: store i8* null, i8** [[TMP54]], align 4
5206 // CHECK12-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
5207 // CHECK12-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
5208 // CHECK12-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
5209 // CHECK12-NEXT: [[TMP58:%.*]] = load i32, i32* [[N]], align 4
5210 // CHECK12-NEXT: store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
5211 // CHECK12-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
5212 // CHECK12-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
5213 // CHECK12-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
5214 // CHECK12-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
5215 // CHECK12-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
5216 // CHECK12-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
5217 // CHECK12-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
5218 // CHECK12-NEXT: [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
5219 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP61]])
5220 // CHECK12-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
5221 // CHECK12-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
5222 // CHECK12-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
5223 // CHECK12: omp_offload.failed15:
5224 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR4]]
5225 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT16]]
5226 // CHECK12: omp_offload.cont16:
5227 // CHECK12-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
5228 // CHECK12-NEXT: store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_17]], align 4
5229 // CHECK12-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
5230 // CHECK12-NEXT: store i32 [[TMP65]], i32* [[N_CASTED18]], align 4
5231 // CHECK12-NEXT: [[TMP66:%.*]] = load i32, i32* [[N_CASTED18]], align 4
5232 // CHECK12-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
5233 // CHECK12-NEXT: store i32 [[TMP67]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
5234 // CHECK12-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
5235 // CHECK12-NEXT: [[TMP69:%.*]] = mul nuw i32 [[TMP0]], 4
5236 // CHECK12-NEXT: [[TMP70:%.*]] = sext i32 [[TMP69]] to i64
5237 // CHECK12-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
5238 // CHECK12-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32*
5239 // CHECK12-NEXT: store i32 [[TMP66]], i32* [[TMP72]], align 4
5240 // CHECK12-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
5241 // CHECK12-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32*
5242 // CHECK12-NEXT: store i32 [[TMP66]], i32* [[TMP74]], align 4
5243 // CHECK12-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
5244 // CHECK12-NEXT: store i64 4, i64* [[TMP75]], align 4
5245 // CHECK12-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
5246 // CHECK12-NEXT: store i8* null, i8** [[TMP76]], align 4
5247 // CHECK12-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
5248 // CHECK12-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32*
5249 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP78]], align 4
5250 // CHECK12-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
5251 // CHECK12-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32*
5252 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP80]], align 4
5253 // CHECK12-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 1
5254 // CHECK12-NEXT: store i64 4, i64* [[TMP81]], align 4
5255 // CHECK12-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1
5256 // CHECK12-NEXT: store i8* null, i8** [[TMP82]], align 4
5257 // CHECK12-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
5258 // CHECK12-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
5259 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP84]], align 4
5260 // CHECK12-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
5261 // CHECK12-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32**
5262 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP86]], align 4
5263 // CHECK12-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2
5264 // CHECK12-NEXT: store i64 [[TMP70]], i64* [[TMP87]], align 4
5265 // CHECK12-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2
5266 // CHECK12-NEXT: store i8* null, i8** [[TMP88]], align 4
5267 // CHECK12-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
5268 // CHECK12-NEXT: [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i32*
5269 // CHECK12-NEXT: store i32 [[TMP68]], i32* [[TMP90]], align 4
5270 // CHECK12-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
5271 // CHECK12-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i32*
5272 // CHECK12-NEXT: store i32 [[TMP68]], i32* [[TMP92]], align 4
5273 // CHECK12-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
5274 // CHECK12-NEXT: store i64 4, i64* [[TMP93]], align 4
5275 // CHECK12-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3
5276 // CHECK12-NEXT: store i8* null, i8** [[TMP94]], align 4
5277 // CHECK12-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
5278 // CHECK12-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
5279 // CHECK12-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
5280 // CHECK12-NEXT: [[TMP98:%.*]] = load i32, i32* [[N]], align 4
5281 // CHECK12-NEXT: store i32 [[TMP98]], i32* [[DOTCAPTURE_EXPR_24]], align 4
5282 // CHECK12-NEXT: [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
5283 // CHECK12-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP99]], 0
5284 // CHECK12-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
5285 // CHECK12-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
5286 // CHECK12-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4
5287 // CHECK12-NEXT: [[TMP100:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
5288 // CHECK12-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP100]], 1
5289 // CHECK12-NEXT: [[TMP101:%.*]] = zext i32 [[ADD29]] to i64
5290 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP101]])
5291 // CHECK12-NEXT: [[TMP102:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP95]], i8** [[TMP96]], i64* [[TMP97]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
5292 // CHECK12-NEXT: [[TMP103:%.*]] = icmp ne i32 [[TMP102]], 0
5293 // CHECK12-NEXT: br i1 [[TMP103]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]]
5294 // CHECK12: omp_offload.failed30:
5295 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP66]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP68]]) #[[ATTR4]]
5296 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT31]]
5297 // CHECK12: omp_offload.cont31:
5298 // CHECK12-NEXT: [[TMP104:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
5299 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP104]])
5300 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
5301 // CHECK12-NEXT: [[TMP105:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
5302 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP105]])
5303 // CHECK12-NEXT: [[TMP106:%.*]] = load i32, i32* [[RETVAL]], align 4
5304 // CHECK12-NEXT: ret i32 [[TMP106]]
5305 //
5306 //
5307 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
5308 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
5309 // CHECK12-NEXT: entry:
5310 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5311 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
5312 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
5313 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
5314 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5315 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
5316 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
5317 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
5318 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
5319 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
5320 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
5321 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
5322 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
5323 // CHECK12-NEXT: ret void
5324 //
5325 //
5326 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
5327 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
5328 // CHECK12-NEXT: entry:
5329 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5330 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5331 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5332 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
5333 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
5334 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5335 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5336 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5337 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5338 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
5339 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5340 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5341 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5342 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5343 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
5344 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5345 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5346 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5347 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
5348 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
5349 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
5350 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
5351 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
5352 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
5353 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5354 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5355 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5356 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5357 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5358 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
5359 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5360 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5361 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5362 // CHECK12: omp.precond.then:
5363 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5364 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5365 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5366 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5367 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5368 // CHECK12-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5369 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
5370 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5371 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5372 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5373 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
5374 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5375 // CHECK12: cond.true:
5376 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5377 // CHECK12-NEXT: br label [[COND_END:%.*]]
5378 // CHECK12: cond.false:
5379 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5380 // CHECK12-NEXT: br label [[COND_END]]
5381 // CHECK12: cond.end:
5382 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
5383 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5384 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5385 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
5386 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5387 // CHECK12: omp.inner.for.cond:
5388 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
5389 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
5390 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
5391 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5392 // CHECK12: omp.inner.for.body:
5393 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
5394 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
5395 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5396 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !10
5397 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !10
5398 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]]
5399 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
5400 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5401 // CHECK12: omp.body.continue:
5402 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5403 // CHECK12: omp.inner.for.inc:
5404 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
5405 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
5406 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
5407 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
5408 // CHECK12: omp.inner.for.end:
5409 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5410 // CHECK12: omp.loop.exit:
5411 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5412 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
5413 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
5414 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5415 // CHECK12-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
5416 // CHECK12-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5417 // CHECK12: .omp.final.then:
5418 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5419 // CHECK12-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
5420 // CHECK12-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
5421 // CHECK12-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
5422 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
5423 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
5424 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
5425 // CHECK12: .omp.final.done:
5426 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
5427 // CHECK12: omp.precond.end:
5428 // CHECK12-NEXT: ret void
5429 //
5430 //
5431 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
5432 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5433 // CHECK12-NEXT: entry:
5434 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5435 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
5436 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
5437 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
5438 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5439 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
5440 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
5441 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
5442 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
5443 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
5444 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
5445 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
5446 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
5447 // CHECK12-NEXT: ret void
5448 //
5449 //
5450 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
5451 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
5452 // CHECK12-NEXT: entry:
5453 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5454 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5455 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5456 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
5457 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
5458 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5459 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5460 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5461 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5462 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
5463 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5464 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5465 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5466 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5467 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
5468 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5469 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5470 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5471 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
5472 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
5473 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
5474 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
5475 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
5476 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
5477 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5478 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5479 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5480 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5481 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5482 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
5483 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5484 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5485 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5486 // CHECK12: omp.precond.then:
5487 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5488 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5489 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5490 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5491 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5492 // CHECK12-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5493 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
5494 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5495 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5496 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5497 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
5498 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5499 // CHECK12: cond.true:
5500 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5501 // CHECK12-NEXT: br label [[COND_END:%.*]]
5502 // CHECK12: cond.false:
5503 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5504 // CHECK12-NEXT: br label [[COND_END]]
5505 // CHECK12: cond.end:
5506 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
5507 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5508 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5509 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
5510 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5511 // CHECK12: omp.inner.for.cond:
5512 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
5513 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
5514 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
5515 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5516 // CHECK12: omp.inner.for.body:
5517 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
5518 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
5519 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5520 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
5521 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
5522 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]]
5523 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
5524 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5525 // CHECK12: omp.body.continue:
5526 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5527 // CHECK12: omp.inner.for.inc:
5528 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
5529 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
5530 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
5531 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
5532 // CHECK12: omp.inner.for.end:
5533 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5534 // CHECK12: omp.loop.exit:
5535 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5536 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
5537 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
5538 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5539 // CHECK12-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
5540 // CHECK12-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5541 // CHECK12: .omp.final.then:
5542 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5543 // CHECK12-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
5544 // CHECK12-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
5545 // CHECK12-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
5546 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
5547 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
5548 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
5549 // CHECK12: .omp.final.done:
5550 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
5551 // CHECK12: omp.precond.end:
5552 // CHECK12-NEXT: ret void
5553 //
5554 //
5555 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
5556 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5557 // CHECK12-NEXT: entry:
5558 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5559 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
5560 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
5561 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5562 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
5563 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
5564 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5565 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
5566 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
5567 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5568 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
5569 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
5570 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
5571 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
5572 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
5573 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5574 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
5575 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
5576 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
5577 // CHECK12-NEXT: ret void
5578 //
5579 //
5580 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3
5581 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
5582 // CHECK12-NEXT: entry:
5583 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5584 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5585 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5586 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
5587 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
5588 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5589 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5590 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5591 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5592 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5593 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
5594 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5595 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5596 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5597 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5598 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4
5599 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5600 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5601 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5602 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
5603 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
5604 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5605 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
5606 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
5607 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
5608 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5609 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5610 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5611 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5612 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5613 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5614 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
5615 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5616 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5617 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5618 // CHECK12: omp.precond.then:
5619 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5620 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5621 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5622 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5623 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5624 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5625 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5626 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
5627 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
5628 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5629 // CHECK12: omp.dispatch.cond:
5630 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5631 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5632 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
5633 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5634 // CHECK12: cond.true:
5635 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5636 // CHECK12-NEXT: br label [[COND_END:%.*]]
5637 // CHECK12: cond.false:
5638 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5639 // CHECK12-NEXT: br label [[COND_END]]
5640 // CHECK12: cond.end:
5641 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
5642 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5643 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5644 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
5645 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5646 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5647 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
5648 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5649 // CHECK12: omp.dispatch.body:
5650 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5651 // CHECK12: omp.inner.for.cond:
5652 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
5653 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
5654 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
5655 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5656 // CHECK12: omp.inner.for.body:
5657 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
5658 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
5659 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5660 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
5661 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
5662 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
5663 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
5664 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5665 // CHECK12: omp.body.continue:
5666 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5667 // CHECK12: omp.inner.for.inc:
5668 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
5669 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
5670 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
5671 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
5672 // CHECK12: omp.inner.for.end:
5673 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5674 // CHECK12: omp.dispatch.inc:
5675 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5676 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5677 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
5678 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
5679 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5680 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5681 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
5682 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
5683 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]]
5684 // CHECK12: omp.dispatch.end:
5685 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5686 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
5687 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
5688 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5689 // CHECK12-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
5690 // CHECK12-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5691 // CHECK12: .omp.final.then:
5692 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5693 // CHECK12-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP29]], 0
5694 // CHECK12-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
5695 // CHECK12-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
5696 // CHECK12-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
5697 // CHECK12-NEXT: store i32 [[ADD14]], i32* [[I4]], align 4
5698 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
5699 // CHECK12: .omp.final.done:
5700 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
5701 // CHECK12: omp.precond.end:
5702 // CHECK12-NEXT: ret void
5703 //
5704 //
5705 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
5706 // CHECK12-SAME: (i32 [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
5707 // CHECK12-NEXT: entry:
5708 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
5709 // CHECK12-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
5710 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
5711 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
5712 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
5713 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5714 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
5715 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
5716 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
5717 // CHECK12-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
5718 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4
5719 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4
5720 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4
5721 // CHECK12-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
5722 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5723 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5724 // CHECK12-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
5725 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
5726 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5727 // CHECK12-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
5728 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
5729 // CHECK12-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5730 // CHECK12-NEXT: store i8* null, i8** [[TMP4]], align 4
5731 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5732 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5733 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
5734 // CHECK12-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
5735 // CHECK12-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
5736 // CHECK12-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5737 // CHECK12: omp_offload.failed:
5738 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR4]]
5739 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
5740 // CHECK12: omp_offload.cont:
5741 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
5742 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
5743 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
5744 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
5745 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
5746 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
5747 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
5748 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4
5749 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
5750 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
5751 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
5752 // CHECK12-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
5753 // CHECK12-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5754 // CHECK12-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
5755 // CHECK12: omp_offload.failed5:
5756 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR4]]
5757 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT6]]
5758 // CHECK12: omp_offload.cont6:
5759 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
5760 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
5761 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
5762 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
5763 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
5764 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
5765 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
5766 // CHECK12-NEXT: store i8* null, i8** [[TMP22]], align 4
5767 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
5768 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
5769 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
5770 // CHECK12-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
5771 // CHECK12-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
5772 // CHECK12-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
5773 // CHECK12: omp_offload.failed11:
5774 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR4]]
5775 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT12]]
5776 // CHECK12: omp_offload.cont12:
5777 // CHECK12-NEXT: ret i32 0
5778 //
5779 //
5780 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
5781 // CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5782 // CHECK12-NEXT: entry:
5783 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5784 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5785 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5786 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
5787 // CHECK12-NEXT: ret void
5788 //
5789 //
5790 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..5
5791 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
5792 // CHECK12-NEXT: entry:
5793 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5794 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5795 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5796 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5797 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5798 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5799 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5800 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5801 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5802 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
5803 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5804 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5805 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5806 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5807 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5808 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
5809 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5810 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5811 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5812 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5813 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5814 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5815 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
5816 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5817 // CHECK12: cond.true:
5818 // CHECK12-NEXT: br label [[COND_END:%.*]]
5819 // CHECK12: cond.false:
5820 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5821 // CHECK12-NEXT: br label [[COND_END]]
5822 // CHECK12: cond.end:
5823 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5824 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5825 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5826 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5827 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5828 // CHECK12: omp.inner.for.cond:
5829 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
5830 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
5831 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5832 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5833 // CHECK12: omp.inner.for.body:
5834 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
5835 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
5836 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5837 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
5838 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
5839 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
5840 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
5841 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5842 // CHECK12: omp.body.continue:
5843 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5844 // CHECK12: omp.inner.for.inc:
5845 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
5846 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
5847 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
5848 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
5849 // CHECK12: omp.inner.for.end:
5850 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5851 // CHECK12: omp.loop.exit:
5852 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5853 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5854 // CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5855 // CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5856 // CHECK12: .omp.final.then:
5857 // CHECK12-NEXT: store i32 10, i32* [[I]], align 4
5858 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
5859 // CHECK12: .omp.final.done:
5860 // CHECK12-NEXT: ret void
5861 //
5862 //
5863 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
5864 // CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5865 // CHECK12-NEXT: entry:
5866 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5867 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5868 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5869 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
5870 // CHECK12-NEXT: ret void
5871 //
5872 //
5873 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..7
5874 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
5875 // CHECK12-NEXT: entry:
5876 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5877 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5878 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5879 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5880 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5881 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5882 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5883 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5884 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5885 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
5886 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5887 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5888 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5889 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5890 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5891 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
5892 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5893 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5894 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5895 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5896 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5897 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5898 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
5899 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5900 // CHECK12: cond.true:
5901 // CHECK12-NEXT: br label [[COND_END:%.*]]
5902 // CHECK12: cond.false:
5903 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5904 // CHECK12-NEXT: br label [[COND_END]]
5905 // CHECK12: cond.end:
5906 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5907 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5908 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5909 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5910 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5911 // CHECK12: omp.inner.for.cond:
5912 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
5913 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
5914 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5915 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5916 // CHECK12: omp.inner.for.body:
5917 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
5918 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
5919 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5920 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
5921 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
5922 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
5923 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
5924 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5925 // CHECK12: omp.body.continue:
5926 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5927 // CHECK12: omp.inner.for.inc:
5928 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
5929 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
5930 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
5931 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
5932 // CHECK12: omp.inner.for.end:
5933 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5934 // CHECK12: omp.loop.exit:
5935 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5936 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5937 // CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5938 // CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5939 // CHECK12: .omp.final.then:
5940 // CHECK12-NEXT: store i32 10, i32* [[I]], align 4
5941 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
5942 // CHECK12: .omp.final.done:
5943 // CHECK12-NEXT: ret void
5944 //
5945 //
5946 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
5947 // CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5948 // CHECK12-NEXT: entry:
5949 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5950 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5951 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5952 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
5953 // CHECK12-NEXT: ret void
5954 //
5955 //
5956 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..10
5957 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
5958 // CHECK12-NEXT: entry:
5959 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5960 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5961 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5962 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5963 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5964 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5965 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5966 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5967 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5968 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
5969 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5970 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5971 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5972 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5973 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5974 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
5975 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5976 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5977 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5978 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5979 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
5980 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5981 // CHECK12: omp.dispatch.cond:
5982 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5983 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
5984 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5985 // CHECK12: cond.true:
5986 // CHECK12-NEXT: br label [[COND_END:%.*]]
5987 // CHECK12: cond.false:
5988 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5989 // CHECK12-NEXT: br label [[COND_END]]
5990 // CHECK12: cond.end:
5991 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5992 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5993 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5994 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5995 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5996 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5997 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5998 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5999 // CHECK12: omp.dispatch.body:
6000 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6001 // CHECK12: omp.inner.for.cond:
6002 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
6003 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !28
6004 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6005 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6006 // CHECK12: omp.inner.for.body:
6007 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
6008 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6009 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6010 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !28
6011 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !28
6012 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
6013 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28
6014 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6015 // CHECK12: omp.body.continue:
6016 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6017 // CHECK12: omp.inner.for.inc:
6018 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
6019 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
6020 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
6021 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
6022 // CHECK12: omp.inner.for.end:
6023 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6024 // CHECK12: omp.dispatch.inc:
6025 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6026 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6027 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
6028 // CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
6029 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6030 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6031 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
6032 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
6033 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]]
6034 // CHECK12: omp.dispatch.end:
6035 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6036 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6037 // CHECK12-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
6038 // CHECK12-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6039 // CHECK12: .omp.final.then:
6040 // CHECK12-NEXT: store i32 10, i32* [[I]], align 4
6041 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
6042 // CHECK12: .omp.final.done:
6043 // CHECK12-NEXT: ret void
6044 //
6045 //
6046 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6047 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] {
6048 // CHECK12-NEXT: entry:
6049 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1)
6050 // CHECK12-NEXT: ret void
6051 //
6052 //
6053 // CHECK13-LABEL: define {{[^@]+}}@main
6054 // CHECK13-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
6055 // CHECK13-NEXT: entry:
6056 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6057 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6058 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
6059 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4
6060 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
6061 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
6062 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6063 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6064 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6065 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6066 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6067 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6068 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6069 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
6070 // CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
6071 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
6072 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
6073 // CHECK13-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4
6074 // CHECK13-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4
6075 // CHECK13-NEXT: [[I18:%.*]] = alloca i32, align 4
6076 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
6077 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4
6078 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
6079 // CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 4
6080 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
6081 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
6082 // CHECK13-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4
6083 // CHECK13-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4
6084 // CHECK13-NEXT: [[I48:%.*]] = alloca i32, align 4
6085 // CHECK13-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4
6086 // CHECK13-NEXT: [[I52:%.*]] = alloca i32, align 4
6087 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
6088 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6089 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
6090 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4
6091 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
6092 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
6093 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
6094 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
6095 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
6096 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
6097 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
6098 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
6099 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6100 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
6101 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6102 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6103 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6104 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6105 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6106 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
6107 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
6108 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6109 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
6110 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
6111 // CHECK13: simd.if.then:
6112 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6113 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6114 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6115 // CHECK13: omp.inner.for.cond:
6116 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6117 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
6118 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6119 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6120 // CHECK13: omp.inner.for.body:
6121 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6122 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6123 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6124 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2
6125 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2
6126 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6127 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
6128 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
6129 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6130 // CHECK13: omp.body.continue:
6131 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6132 // CHECK13: omp.inner.for.inc:
6133 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6134 // CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1
6135 // CHECK13-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6136 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
6137 // CHECK13: omp.inner.for.end:
6138 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6139 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0
6140 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
6141 // CHECK13-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
6142 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
6143 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
6144 // CHECK13-NEXT: br label [[SIMD_IF_END]]
6145 // CHECK13: simd.if.end:
6146 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[N]], align 4
6147 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
6148 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
6149 // CHECK13-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0
6150 // CHECK13-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
6151 // CHECK13-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
6152 // CHECK13-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4
6153 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4
6154 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
6155 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_UB17]], align 4
6156 // CHECK13-NEXT: store i32 0, i32* [[I18]], align 4
6157 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
6158 // CHECK13-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]]
6159 // CHECK13-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]]
6160 // CHECK13: simd.if.then20:
6161 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4
6162 // CHECK13-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV21]], align 4
6163 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
6164 // CHECK13: omp.inner.for.cond23:
6165 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
6166 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !6
6167 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
6168 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
6169 // CHECK13: omp.inner.for.body25:
6170 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
6171 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1
6172 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
6173 // CHECK13-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !6
6174 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !6
6175 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64
6176 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM28]]
6177 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !6
6178 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]
6179 // CHECK13: omp.body.continue30:
6180 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]
6181 // CHECK13: omp.inner.for.inc31:
6182 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
6183 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1
6184 // CHECK13-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
6185 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]]
6186 // CHECK13: omp.inner.for.end33:
6187 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
6188 // CHECK13-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0
6189 // CHECK13-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1
6190 // CHECK13-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1
6191 // CHECK13-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]]
6192 // CHECK13-NEXT: store i32 [[ADD37]], i32* [[I22]], align 4
6193 // CHECK13-NEXT: br label [[SIMD_IF_END38]]
6194 // CHECK13: simd.if.end38:
6195 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4
6196 // CHECK13-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_39]], align 4
6197 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
6198 // CHECK13-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_41]], align 4
6199 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
6200 // CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0
6201 // CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
6202 // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
6203 // CHECK13-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
6204 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB46]], align 4
6205 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
6206 // CHECK13-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_UB47]], align 4
6207 // CHECK13-NEXT: store i32 0, i32* [[I48]], align 4
6208 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
6209 // CHECK13-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]]
6210 // CHECK13-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]]
6211 // CHECK13: simd.if.then50:
6212 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_LB46]], align 4
6213 // CHECK13-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV51]], align 4
6214 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]]
6215 // CHECK13: omp.inner.for.cond53:
6216 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
6217 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB47]], align 4, !llvm.access.group !9
6218 // CHECK13-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]]
6219 // CHECK13-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]]
6220 // CHECK13: omp.inner.for.body55:
6221 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
6222 // CHECK13-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1
6223 // CHECK13-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]]
6224 // CHECK13-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !9
6225 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !9
6226 // CHECK13-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64
6227 // CHECK13-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM58]]
6228 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX59]], align 4, !llvm.access.group !9
6229 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]]
6230 // CHECK13: omp.body.continue60:
6231 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]]
6232 // CHECK13: omp.inner.for.inc61:
6233 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
6234 // CHECK13-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1
6235 // CHECK13-NEXT: store i32 [[ADD62]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
6236 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]]
6237 // CHECK13: omp.inner.for.end63:
6238 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
6239 // CHECK13-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0
6240 // CHECK13-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1
6241 // CHECK13-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1
6242 // CHECK13-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]]
6243 // CHECK13-NEXT: store i32 [[ADD67]], i32* [[I52]], align 4
6244 // CHECK13-NEXT: br label [[SIMD_IF_END68]]
6245 // CHECK13: simd.if.end68:
6246 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
6247 // CHECK13-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP37]])
6248 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
6249 // CHECK13-NEXT: [[TMP38:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
6250 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP38]])
6251 // CHECK13-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
6252 // CHECK13-NEXT: ret i32 [[TMP39]]
6253 //
6254 //
6255 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
6256 // CHECK13-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
6257 // CHECK13-NEXT: entry:
6258 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6259 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
6260 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6261 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6262 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6263 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6264 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6265 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
6266 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
6267 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
6268 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
6269 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
6270 // CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
6271 // CHECK13-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4
6272 // CHECK13-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4
6273 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
6274 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4
6275 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6276 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6277 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6278 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6279 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6280 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6281 // CHECK13: omp.inner.for.cond:
6282 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
6283 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
6284 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
6285 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6286 // CHECK13: omp.inner.for.body:
6287 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
6288 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
6289 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6290 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
6291 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
6292 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
6293 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
6294 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
6295 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6296 // CHECK13: omp.body.continue:
6297 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6298 // CHECK13: omp.inner.for.inc:
6299 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
6300 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
6301 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
6302 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
6303 // CHECK13: omp.inner.for.end:
6304 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
6305 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
6306 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4
6307 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
6308 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4
6309 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
6310 // CHECK13: omp.inner.for.cond7:
6311 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15
6312 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !15
6313 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6314 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
6315 // CHECK13: omp.inner.for.body9:
6316 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15
6317 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
6318 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
6319 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !15
6320 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15
6321 // CHECK13-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64
6322 // CHECK13-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM12]]
6323 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4, !llvm.access.group !15
6324 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
6325 // CHECK13: omp.body.continue14:
6326 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
6327 // CHECK13: omp.inner.for.inc15:
6328 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15
6329 // CHECK13-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1
6330 // CHECK13-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15
6331 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP16:![0-9]+]]
6332 // CHECK13: omp.inner.for.end17:
6333 // CHECK13-NEXT: store i32 10, i32* [[I6]], align 4
6334 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4
6335 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB20]], align 4
6336 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4
6337 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV21]], align 4
6338 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
6339 // CHECK13: omp.inner.for.cond23:
6340 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18
6341 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4, !llvm.access.group !18
6342 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
6343 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
6344 // CHECK13: omp.inner.for.body25:
6345 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18
6346 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP15]], 1
6347 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
6348 // CHECK13-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !18
6349 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !18
6350 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP16]] to i64
6351 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM28]]
6352 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !18
6353 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]
6354 // CHECK13: omp.body.continue30:
6355 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]
6356 // CHECK13: omp.inner.for.inc31:
6357 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18
6358 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP17]], 1
6359 // CHECK13-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18
6360 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP19:![0-9]+]]
6361 // CHECK13: omp.inner.for.end33:
6362 // CHECK13-NEXT: store i32 10, i32* [[I22]], align 4
6363 // CHECK13-NEXT: ret i32 0
6364 //
6365 //
6366 // CHECK14-LABEL: define {{[^@]+}}@main
6367 // CHECK14-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
6368 // CHECK14-NEXT: entry:
6369 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6370 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6371 // CHECK14-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
6372 // CHECK14-NEXT: [[N:%.*]] = alloca i32, align 4
6373 // CHECK14-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
6374 // CHECK14-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
6375 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
6376 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6377 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6378 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6379 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6380 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
6381 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6382 // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4
6383 // CHECK14-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
6384 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
6385 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
6386 // CHECK14-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4
6387 // CHECK14-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4
6388 // CHECK14-NEXT: [[I18:%.*]] = alloca i32, align 4
6389 // CHECK14-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
6390 // CHECK14-NEXT: [[I22:%.*]] = alloca i32, align 4
6391 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
6392 // CHECK14-NEXT: [[_TMP40:%.*]] = alloca i32, align 4
6393 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
6394 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
6395 // CHECK14-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4
6396 // CHECK14-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4
6397 // CHECK14-NEXT: [[I48:%.*]] = alloca i32, align 4
6398 // CHECK14-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4
6399 // CHECK14-NEXT: [[I52:%.*]] = alloca i32, align 4
6400 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4
6401 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6402 // CHECK14-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
6403 // CHECK14-NEXT: store i32 100, i32* [[N]], align 4
6404 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
6405 // CHECK14-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
6406 // CHECK14-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
6407 // CHECK14-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
6408 // CHECK14-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
6409 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
6410 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
6411 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
6412 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6413 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
6414 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6415 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6416 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6417 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6418 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6419 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
6420 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4
6421 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6422 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
6423 // CHECK14-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
6424 // CHECK14: simd.if.then:
6425 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6426 // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6427 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6428 // CHECK14: omp.inner.for.cond:
6429 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6430 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
6431 // CHECK14-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6432 // CHECK14-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6433 // CHECK14: omp.inner.for.body:
6434 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6435 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6436 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6437 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2
6438 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2
6439 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6440 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
6441 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
6442 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6443 // CHECK14: omp.body.continue:
6444 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6445 // CHECK14: omp.inner.for.inc:
6446 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6447 // CHECK14-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1
6448 // CHECK14-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
6449 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
6450 // CHECK14: omp.inner.for.end:
6451 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6452 // CHECK14-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0
6453 // CHECK14-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
6454 // CHECK14-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
6455 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
6456 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
6457 // CHECK14-NEXT: br label [[SIMD_IF_END]]
6458 // CHECK14: simd.if.end:
6459 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[N]], align 4
6460 // CHECK14-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
6461 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
6462 // CHECK14-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0
6463 // CHECK14-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
6464 // CHECK14-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
6465 // CHECK14-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4
6466 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4
6467 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
6468 // CHECK14-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_UB17]], align 4
6469 // CHECK14-NEXT: store i32 0, i32* [[I18]], align 4
6470 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
6471 // CHECK14-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]]
6472 // CHECK14-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]]
6473 // CHECK14: simd.if.then20:
6474 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4
6475 // CHECK14-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV21]], align 4
6476 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
6477 // CHECK14: omp.inner.for.cond23:
6478 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
6479 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !6
6480 // CHECK14-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
6481 // CHECK14-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
6482 // CHECK14: omp.inner.for.body25:
6483 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
6484 // CHECK14-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1
6485 // CHECK14-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
6486 // CHECK14-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !6
6487 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !6
6488 // CHECK14-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64
6489 // CHECK14-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM28]]
6490 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !6
6491 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]
6492 // CHECK14: omp.body.continue30:
6493 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]
6494 // CHECK14: omp.inner.for.inc31:
6495 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
6496 // CHECK14-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1
6497 // CHECK14-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
6498 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]]
6499 // CHECK14: omp.inner.for.end33:
6500 // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
6501 // CHECK14-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0
6502 // CHECK14-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1
6503 // CHECK14-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1
6504 // CHECK14-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]]
6505 // CHECK14-NEXT: store i32 [[ADD37]], i32* [[I22]], align 4
6506 // CHECK14-NEXT: br label [[SIMD_IF_END38]]
6507 // CHECK14: simd.if.end38:
6508 // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4
6509 // CHECK14-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_39]], align 4
6510 // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
6511 // CHECK14-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_41]], align 4
6512 // CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
6513 // CHECK14-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0
6514 // CHECK14-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
6515 // CHECK14-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
6516 // CHECK14-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
6517 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB46]], align 4
6518 // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
6519 // CHECK14-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_UB47]], align 4
6520 // CHECK14-NEXT: store i32 0, i32* [[I48]], align 4
6521 // CHECK14-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
6522 // CHECK14-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]]
6523 // CHECK14-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]]
6524 // CHECK14: simd.if.then50:
6525 // CHECK14-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_LB46]], align 4
6526 // CHECK14-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV51]], align 4
6527 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]]
6528 // CHECK14: omp.inner.for.cond53:
6529 // CHECK14-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
6530 // CHECK14-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB47]], align 4, !llvm.access.group !9
6531 // CHECK14-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]]
6532 // CHECK14-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]]
6533 // CHECK14: omp.inner.for.body55:
6534 // CHECK14-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
6535 // CHECK14-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1
6536 // CHECK14-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]]
6537 // CHECK14-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !9
6538 // CHECK14-NEXT: [[TMP34:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !9
6539 // CHECK14-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64
6540 // CHECK14-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM58]]
6541 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX59]], align 4, !llvm.access.group !9
6542 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]]
6543 // CHECK14: omp.body.continue60:
6544 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]]
6545 // CHECK14: omp.inner.for.inc61:
6546 // CHECK14-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
6547 // CHECK14-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1
6548 // CHECK14-NEXT: store i32 [[ADD62]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
6549 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]]
6550 // CHECK14: omp.inner.for.end63:
6551 // CHECK14-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
6552 // CHECK14-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0
6553 // CHECK14-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1
6554 // CHECK14-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1
6555 // CHECK14-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]]
6556 // CHECK14-NEXT: store i32 [[ADD67]], i32* [[I52]], align 4
6557 // CHECK14-NEXT: br label [[SIMD_IF_END68]]
6558 // CHECK14: simd.if.end68:
6559 // CHECK14-NEXT: [[TMP37:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
6560 // CHECK14-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP37]])
6561 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
6562 // CHECK14-NEXT: [[TMP38:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
6563 // CHECK14-NEXT: call void @llvm.stackrestore(i8* [[TMP38]])
6564 // CHECK14-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
6565 // CHECK14-NEXT: ret i32 [[TMP39]]
6566 //
6567 //
6568 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
6569 // CHECK14-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
6570 // CHECK14-NEXT: entry:
6571 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6572 // CHECK14-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
6573 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
6574 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6575 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6576 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6577 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
6578 // CHECK14-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
6579 // CHECK14-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
6580 // CHECK14-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
6581 // CHECK14-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
6582 // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4
6583 // CHECK14-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
6584 // CHECK14-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4
6585 // CHECK14-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4
6586 // CHECK14-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
6587 // CHECK14-NEXT: [[I22:%.*]] = alloca i32, align 4
6588 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6589 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6590 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6591 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6592 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6593 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6594 // CHECK14: omp.inner.for.cond:
6595 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
6596 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
6597 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
6598 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6599 // CHECK14: omp.inner.for.body:
6600 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
6601 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
6602 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6603 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
6604 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
6605 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
6606 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
6607 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
6608 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6609 // CHECK14: omp.body.continue:
6610 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6611 // CHECK14: omp.inner.for.inc:
6612 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
6613 // CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
6614 // CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
6615 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
6616 // CHECK14: omp.inner.for.end:
6617 // CHECK14-NEXT: store i32 10, i32* [[I]], align 4
6618 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
6619 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4
6620 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
6621 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4
6622 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
6623 // CHECK14: omp.inner.for.cond7:
6624 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15
6625 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !15
6626 // CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6627 // CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
6628 // CHECK14: omp.inner.for.body9:
6629 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15
6630 // CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
6631 // CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
6632 // CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !15
6633 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15
6634 // CHECK14-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64
6635 // CHECK14-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM12]]
6636 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4, !llvm.access.group !15
6637 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
6638 // CHECK14: omp.body.continue14:
6639 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
6640 // CHECK14: omp.inner.for.inc15:
6641 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15
6642 // CHECK14-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1
6643 // CHECK14-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15
6644 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP16:![0-9]+]]
6645 // CHECK14: omp.inner.for.end17:
6646 // CHECK14-NEXT: store i32 10, i32* [[I6]], align 4
6647 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4
6648 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB20]], align 4
6649 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4
6650 // CHECK14-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV21]], align 4
6651 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
6652 // CHECK14: omp.inner.for.cond23:
6653 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18
6654 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4, !llvm.access.group !18
6655 // CHECK14-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
6656 // CHECK14-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
6657 // CHECK14: omp.inner.for.body25:
6658 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18
6659 // CHECK14-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP15]], 1
6660 // CHECK14-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
6661 // CHECK14-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !18
6662 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !18
6663 // CHECK14-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP16]] to i64
6664 // CHECK14-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM28]]
6665 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !18
6666 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]
6667 // CHECK14: omp.body.continue30:
6668 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]
6669 // CHECK14: omp.inner.for.inc31:
6670 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18
6671 // CHECK14-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP17]], 1
6672 // CHECK14-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18
6673 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP19:![0-9]+]]
6674 // CHECK14: omp.inner.for.end33:
6675 // CHECK14-NEXT: store i32 10, i32* [[I22]], align 4
6676 // CHECK14-NEXT: ret i32 0
6677 //
6678 //
6679 // CHECK15-LABEL: define {{[^@]+}}@main
6680 // CHECK15-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
6681 // CHECK15-NEXT: entry:
6682 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6683 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6684 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
6685 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4
6686 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
6687 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
6688 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
6689 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6690 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6691 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6692 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6693 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
6694 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6695 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
6696 // CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
6697 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
6698 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
6699 // CHECK15-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4
6700 // CHECK15-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4
6701 // CHECK15-NEXT: [[I18:%.*]] = alloca i32, align 4
6702 // CHECK15-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
6703 // CHECK15-NEXT: [[I22:%.*]] = alloca i32, align 4
6704 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
6705 // CHECK15-NEXT: [[_TMP39:%.*]] = alloca i32, align 4
6706 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
6707 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
6708 // CHECK15-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4
6709 // CHECK15-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4
6710 // CHECK15-NEXT: [[I47:%.*]] = alloca i32, align 4
6711 // CHECK15-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4
6712 // CHECK15-NEXT: [[I51:%.*]] = alloca i32, align 4
6713 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
6714 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6715 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
6716 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4
6717 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
6718 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
6719 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
6720 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
6721 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
6722 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
6723 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
6724 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6725 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
6726 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6727 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6728 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6729 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6730 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6731 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
6732 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
6733 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6734 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
6735 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
6736 // CHECK15: simd.if.then:
6737 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6738 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6739 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6740 // CHECK15: omp.inner.for.cond:
6741 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
6742 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
6743 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6744 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6745 // CHECK15: omp.inner.for.body:
6746 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
6747 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6748 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6749 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3
6750 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3
6751 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]]
6752 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
6753 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6754 // CHECK15: omp.body.continue:
6755 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6756 // CHECK15: omp.inner.for.inc:
6757 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
6758 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1
6759 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
6760 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
6761 // CHECK15: omp.inner.for.end:
6762 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6763 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0
6764 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
6765 // CHECK15-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
6766 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
6767 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
6768 // CHECK15-NEXT: br label [[SIMD_IF_END]]
6769 // CHECK15: simd.if.end:
6770 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[N]], align 4
6771 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_11]], align 4
6772 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
6773 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0
6774 // CHECK15-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
6775 // CHECK15-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
6776 // CHECK15-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4
6777 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4
6778 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
6779 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB17]], align 4
6780 // CHECK15-NEXT: store i32 0, i32* [[I18]], align 4
6781 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
6782 // CHECK15-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]]
6783 // CHECK15-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]]
6784 // CHECK15: simd.if.then20:
6785 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4
6786 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV21]], align 4
6787 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
6788 // CHECK15: omp.inner.for.cond23:
6789 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
6790 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !7
6791 // CHECK15-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
6792 // CHECK15-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]]
6793 // CHECK15: omp.inner.for.body25:
6794 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
6795 // CHECK15-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1
6796 // CHECK15-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
6797 // CHECK15-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !7
6798 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !7
6799 // CHECK15-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]]
6800 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX28]], align 4, !llvm.access.group !7
6801 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]]
6802 // CHECK15: omp.body.continue29:
6803 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]]
6804 // CHECK15: omp.inner.for.inc30:
6805 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
6806 // CHECK15-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1
6807 // CHECK15-NEXT: store i32 [[ADD31]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
6808 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]]
6809 // CHECK15: omp.inner.for.end32:
6810 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
6811 // CHECK15-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0
6812 // CHECK15-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1
6813 // CHECK15-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1
6814 // CHECK15-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]]
6815 // CHECK15-NEXT: store i32 [[ADD36]], i32* [[I22]], align 4
6816 // CHECK15-NEXT: br label [[SIMD_IF_END37]]
6817 // CHECK15: simd.if.end37:
6818 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[N]], align 4
6819 // CHECK15-NEXT: store i32 [[TMP24]], i32* [[DOTCAPTURE_EXPR_38]], align 4
6820 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4
6821 // CHECK15-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_40]], align 4
6822 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
6823 // CHECK15-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0
6824 // CHECK15-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
6825 // CHECK15-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
6826 // CHECK15-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4
6827 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB45]], align 4
6828 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
6829 // CHECK15-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_UB46]], align 4
6830 // CHECK15-NEXT: store i32 0, i32* [[I47]], align 4
6831 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
6832 // CHECK15-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]]
6833 // CHECK15-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]]
6834 // CHECK15: simd.if.then49:
6835 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_LB45]], align 4
6836 // CHECK15-NEXT: store i32 [[TMP29]], i32* [[DOTOMP_IV50]], align 4
6837 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]]
6838 // CHECK15: omp.inner.for.cond52:
6839 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
6840 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_UB46]], align 4, !llvm.access.group !10
6841 // CHECK15-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]]
6842 // CHECK15-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]]
6843 // CHECK15: omp.inner.for.body54:
6844 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
6845 // CHECK15-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1
6846 // CHECK15-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]]
6847 // CHECK15-NEXT: store i32 [[ADD56]], i32* [[I51]], align 4, !llvm.access.group !10
6848 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[I51]], align 4, !llvm.access.group !10
6849 // CHECK15-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP33]]
6850 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX57]], align 4, !llvm.access.group !10
6851 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]]
6852 // CHECK15: omp.body.continue58:
6853 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]]
6854 // CHECK15: omp.inner.for.inc59:
6855 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
6856 // CHECK15-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1
6857 // CHECK15-NEXT: store i32 [[ADD60]], i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
6858 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]]
6859 // CHECK15: omp.inner.for.end61:
6860 // CHECK15-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
6861 // CHECK15-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0
6862 // CHECK15-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1
6863 // CHECK15-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1
6864 // CHECK15-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]]
6865 // CHECK15-NEXT: store i32 [[ADD65]], i32* [[I51]], align 4
6866 // CHECK15-NEXT: br label [[SIMD_IF_END66]]
6867 // CHECK15: simd.if.end66:
6868 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
6869 // CHECK15-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP36]])
6870 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
6871 // CHECK15-NEXT: [[TMP37:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
6872 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP37]])
6873 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, i32* [[RETVAL]], align 4
6874 // CHECK15-NEXT: ret i32 [[TMP38]]
6875 //
6876 //
6877 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
6878 // CHECK15-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
6879 // CHECK15-NEXT: entry:
6880 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6881 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
6882 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
6883 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6884 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6885 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6886 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
6887 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
6888 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
6889 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
6890 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
6891 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
6892 // CHECK15-NEXT: [[_TMP17:%.*]] = alloca i32, align 4
6893 // CHECK15-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4
6894 // CHECK15-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4
6895 // CHECK15-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4
6896 // CHECK15-NEXT: [[I21:%.*]] = alloca i32, align 4
6897 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6898 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6899 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6900 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6901 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6902 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6903 // CHECK15: omp.inner.for.cond:
6904 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6905 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
6906 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
6907 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6908 // CHECK15: omp.inner.for.body:
6909 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6910 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
6911 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6912 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
6913 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
6914 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
6915 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
6916 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6917 // CHECK15: omp.body.continue:
6918 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6919 // CHECK15: omp.inner.for.inc:
6920 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6921 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
6922 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6923 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
6924 // CHECK15: omp.inner.for.end:
6925 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
6926 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
6927 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4
6928 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
6929 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4
6930 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
6931 // CHECK15: omp.inner.for.cond7:
6932 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
6933 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16
6934 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6935 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
6936 // CHECK15: omp.inner.for.body9:
6937 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
6938 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
6939 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
6940 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16
6941 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !16
6942 // CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP10]]
6943 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX12]], align 4, !llvm.access.group !16
6944 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]]
6945 // CHECK15: omp.body.continue13:
6946 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]]
6947 // CHECK15: omp.inner.for.inc14:
6948 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
6949 // CHECK15-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1
6950 // CHECK15-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
6951 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
6952 // CHECK15: omp.inner.for.end16:
6953 // CHECK15-NEXT: store i32 10, i32* [[I6]], align 4
6954 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4
6955 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB19]], align 4
6956 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4
6957 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV20]], align 4
6958 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
6959 // CHECK15: omp.inner.for.cond22:
6960 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19
6961 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4, !llvm.access.group !19
6962 // CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
6963 // CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]]
6964 // CHECK15: omp.inner.for.body24:
6965 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19
6966 // CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
6967 // CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
6968 // CHECK15-NEXT: store i32 [[ADD26]], i32* [[I21]], align 4, !llvm.access.group !19
6969 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I21]], align 4, !llvm.access.group !19
6970 // CHECK15-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP16]]
6971 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX27]], align 4, !llvm.access.group !19
6972 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]]
6973 // CHECK15: omp.body.continue28:
6974 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]]
6975 // CHECK15: omp.inner.for.inc29:
6976 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19
6977 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP17]], 1
6978 // CHECK15-NEXT: store i32 [[ADD30]], i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19
6979 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]]
6980 // CHECK15: omp.inner.for.end31:
6981 // CHECK15-NEXT: store i32 10, i32* [[I21]], align 4
6982 // CHECK15-NEXT: ret i32 0
6983 //
6984 //
6985 // CHECK16-LABEL: define {{[^@]+}}@main
6986 // CHECK16-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
6987 // CHECK16-NEXT: entry:
6988 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6989 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6990 // CHECK16-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
6991 // CHECK16-NEXT: [[N:%.*]] = alloca i32, align 4
6992 // CHECK16-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
6993 // CHECK16-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
6994 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
6995 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6996 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6997 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6998 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6999 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
7000 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7001 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4
7002 // CHECK16-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
7003 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
7004 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
7005 // CHECK16-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4
7006 // CHECK16-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4
7007 // CHECK16-NEXT: [[I18:%.*]] = alloca i32, align 4
7008 // CHECK16-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
7009 // CHECK16-NEXT: [[I22:%.*]] = alloca i32, align 4
7010 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
7011 // CHECK16-NEXT: [[_TMP39:%.*]] = alloca i32, align 4
7012 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
7013 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
7014 // CHECK16-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4
7015 // CHECK16-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4
7016 // CHECK16-NEXT: [[I47:%.*]] = alloca i32, align 4
7017 // CHECK16-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4
7018 // CHECK16-NEXT: [[I51:%.*]] = alloca i32, align 4
7019 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4
7020 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7021 // CHECK16-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
7022 // CHECK16-NEXT: store i32 100, i32* [[N]], align 4
7023 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
7024 // CHECK16-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
7025 // CHECK16-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
7026 // CHECK16-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
7027 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
7028 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
7029 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
7030 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7031 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7032 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7033 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7034 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7035 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7036 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7037 // CHECK16-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
7038 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4
7039 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7040 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7041 // CHECK16-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
7042 // CHECK16: simd.if.then:
7043 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7044 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7045 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7046 // CHECK16: omp.inner.for.cond:
7047 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
7048 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
7049 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7050 // CHECK16-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7051 // CHECK16: omp.inner.for.body:
7052 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
7053 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7054 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7055 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3
7056 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3
7057 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]]
7058 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
7059 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7060 // CHECK16: omp.body.continue:
7061 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7062 // CHECK16: omp.inner.for.inc:
7063 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
7064 // CHECK16-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1
7065 // CHECK16-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
7066 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
7067 // CHECK16: omp.inner.for.end:
7068 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7069 // CHECK16-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0
7070 // CHECK16-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
7071 // CHECK16-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
7072 // CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
7073 // CHECK16-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
7074 // CHECK16-NEXT: br label [[SIMD_IF_END]]
7075 // CHECK16: simd.if.end:
7076 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[N]], align 4
7077 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_11]], align 4
7078 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
7079 // CHECK16-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0
7080 // CHECK16-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
7081 // CHECK16-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
7082 // CHECK16-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4
7083 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4
7084 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
7085 // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB17]], align 4
7086 // CHECK16-NEXT: store i32 0, i32* [[I18]], align 4
7087 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
7088 // CHECK16-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]]
7089 // CHECK16-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]]
7090 // CHECK16: simd.if.then20:
7091 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4
7092 // CHECK16-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV21]], align 4
7093 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
7094 // CHECK16: omp.inner.for.cond23:
7095 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
7096 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !7
7097 // CHECK16-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
7098 // CHECK16-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]]
7099 // CHECK16: omp.inner.for.body25:
7100 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
7101 // CHECK16-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1
7102 // CHECK16-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
7103 // CHECK16-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !7
7104 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !7
7105 // CHECK16-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]]
7106 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX28]], align 4, !llvm.access.group !7
7107 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]]
7108 // CHECK16: omp.body.continue29:
7109 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]]
7110 // CHECK16: omp.inner.for.inc30:
7111 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
7112 // CHECK16-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1
7113 // CHECK16-NEXT: store i32 [[ADD31]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
7114 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]]
7115 // CHECK16: omp.inner.for.end32:
7116 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
7117 // CHECK16-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0
7118 // CHECK16-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1
7119 // CHECK16-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1
7120 // CHECK16-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]]
7121 // CHECK16-NEXT: store i32 [[ADD36]], i32* [[I22]], align 4
7122 // CHECK16-NEXT: br label [[SIMD_IF_END37]]
7123 // CHECK16: simd.if.end37:
7124 // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[N]], align 4
7125 // CHECK16-NEXT: store i32 [[TMP24]], i32* [[DOTCAPTURE_EXPR_38]], align 4
7126 // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4
7127 // CHECK16-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_40]], align 4
7128 // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
7129 // CHECK16-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0
7130 // CHECK16-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
7131 // CHECK16-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
7132 // CHECK16-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4
7133 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB45]], align 4
7134 // CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
7135 // CHECK16-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_UB46]], align 4
7136 // CHECK16-NEXT: store i32 0, i32* [[I47]], align 4
7137 // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
7138 // CHECK16-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]]
7139 // CHECK16-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]]
7140 // CHECK16: simd.if.then49:
7141 // CHECK16-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_LB45]], align 4
7142 // CHECK16-NEXT: store i32 [[TMP29]], i32* [[DOTOMP_IV50]], align 4
7143 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]]
7144 // CHECK16: omp.inner.for.cond52:
7145 // CHECK16-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
7146 // CHECK16-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_UB46]], align 4, !llvm.access.group !10
7147 // CHECK16-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]]
7148 // CHECK16-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]]
7149 // CHECK16: omp.inner.for.body54:
7150 // CHECK16-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
7151 // CHECK16-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1
7152 // CHECK16-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]]
7153 // CHECK16-NEXT: store i32 [[ADD56]], i32* [[I51]], align 4, !llvm.access.group !10
7154 // CHECK16-NEXT: [[TMP33:%.*]] = load i32, i32* [[I51]], align 4, !llvm.access.group !10
7155 // CHECK16-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP33]]
7156 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX57]], align 4, !llvm.access.group !10
7157 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]]
7158 // CHECK16: omp.body.continue58:
7159 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]]
7160 // CHECK16: omp.inner.for.inc59:
7161 // CHECK16-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
7162 // CHECK16-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1
7163 // CHECK16-NEXT: store i32 [[ADD60]], i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
7164 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]]
7165 // CHECK16: omp.inner.for.end61:
7166 // CHECK16-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
7167 // CHECK16-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0
7168 // CHECK16-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1
7169 // CHECK16-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1
7170 // CHECK16-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]]
7171 // CHECK16-NEXT: store i32 [[ADD65]], i32* [[I51]], align 4
7172 // CHECK16-NEXT: br label [[SIMD_IF_END66]]
7173 // CHECK16: simd.if.end66:
7174 // CHECK16-NEXT: [[TMP36:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
7175 // CHECK16-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP36]])
7176 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
7177 // CHECK16-NEXT: [[TMP37:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
7178 // CHECK16-NEXT: call void @llvm.stackrestore(i8* [[TMP37]])
7179 // CHECK16-NEXT: [[TMP38:%.*]] = load i32, i32* [[RETVAL]], align 4
7180 // CHECK16-NEXT: ret i32 [[TMP38]]
7181 //
7182 //
7183 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
7184 // CHECK16-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
7185 // CHECK16-NEXT: entry:
7186 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
7187 // CHECK16-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
7188 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
7189 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7190 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7191 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7192 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
7193 // CHECK16-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7194 // CHECK16-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7195 // CHECK16-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7196 // CHECK16-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7197 // CHECK16-NEXT: [[I6:%.*]] = alloca i32, align 4
7198 // CHECK16-NEXT: [[_TMP17:%.*]] = alloca i32, align 4
7199 // CHECK16-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4
7200 // CHECK16-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4
7201 // CHECK16-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4
7202 // CHECK16-NEXT: [[I21:%.*]] = alloca i32, align 4
7203 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7204 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7205 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7206 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7207 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7208 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7209 // CHECK16: omp.inner.for.cond:
7210 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7211 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
7212 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7213 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7214 // CHECK16: omp.inner.for.body:
7215 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7216 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7217 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7218 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
7219 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
7220 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
7221 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
7222 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7223 // CHECK16: omp.body.continue:
7224 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7225 // CHECK16: omp.inner.for.inc:
7226 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7227 // CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
7228 // CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7229 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
7230 // CHECK16: omp.inner.for.end:
7231 // CHECK16-NEXT: store i32 10, i32* [[I]], align 4
7232 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7233 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4
7234 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7235 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4
7236 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7237 // CHECK16: omp.inner.for.cond7:
7238 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
7239 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16
7240 // CHECK16-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7241 // CHECK16-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
7242 // CHECK16: omp.inner.for.body9:
7243 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
7244 // CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
7245 // CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7246 // CHECK16-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16
7247 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !16
7248 // CHECK16-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP10]]
7249 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX12]], align 4, !llvm.access.group !16
7250 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]]
7251 // CHECK16: omp.body.continue13:
7252 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]]
7253 // CHECK16: omp.inner.for.inc14:
7254 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
7255 // CHECK16-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1
7256 // CHECK16-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
7257 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
7258 // CHECK16: omp.inner.for.end16:
7259 // CHECK16-NEXT: store i32 10, i32* [[I6]], align 4
7260 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4
7261 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB19]], align 4
7262 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4
7263 // CHECK16-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV20]], align 4
7264 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
7265 // CHECK16: omp.inner.for.cond22:
7266 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19
7267 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4, !llvm.access.group !19
7268 // CHECK16-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
7269 // CHECK16-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]]
7270 // CHECK16: omp.inner.for.body24:
7271 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19
7272 // CHECK16-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
7273 // CHECK16-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
7274 // CHECK16-NEXT: store i32 [[ADD26]], i32* [[I21]], align 4, !llvm.access.group !19
7275 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[I21]], align 4, !llvm.access.group !19
7276 // CHECK16-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP16]]
7277 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX27]], align 4, !llvm.access.group !19
7278 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]]
7279 // CHECK16: omp.body.continue28:
7280 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]]
7281 // CHECK16: omp.inner.for.inc29:
7282 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19
7283 // CHECK16-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP17]], 1
7284 // CHECK16-NEXT: store i32 [[ADD30]], i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19
7285 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]]
7286 // CHECK16: omp.inner.for.end31:
7287 // CHECK16-NEXT: store i32 10, i32* [[I21]], align 4
7288 // CHECK16-NEXT: ret i32 0
7289 //
7290