1// RUN: llvm-tblgen -gen-dag-isel -I %p/../../include %s | FileCheck %s
2
3include "llvm/Target/Target.td"
4
5def TestTargetInstrInfo : InstrInfo;
6
7def TestTarget : Target {
8  let InstructionSet = TestTargetInstrInfo;
9}
10
11def REG : Register<"REG">;
12def GPR : RegisterClass<"TestTarget", [i32], 32, (add REG)>;
13
14// CHECK-LABEL: OPC_CheckOpcode, TARGET_VAL(ISD::UDIVREM)
15// CHECK: OPC_EmitNode2, TARGET_VAL(::INSTR)
16// CHECK: Results = #2 #3
17// CHECK: OPC_CompleteMatch, 2, 3, 2
18def INSTR : Instruction {
19  let OutOperandList = (outs GPR:$r1, GPR:$r0);
20  let InOperandList = (ins GPR:$t0, GPR:$t1);
21  let Pattern = [(set i32:$r0, i32:$r1, (udivrem i32:$t0, i32:$t1))];
22}
23