1// RUN: mlir-opt -convert-spirv-to-llvm %s | FileCheck %s
2
3//===----------------------------------------------------------------------===//
4// spv.BitCount
5//===----------------------------------------------------------------------===//
6
7// CHECK-LABEL: @bitcount_scalar
8spv.func @bitcount_scalar(%arg0: i16) "None" {
9  // CHECK: "llvm.intr.ctpop"(%{{.*}}) : (i16) -> i16
10  %0 = spv.BitCount %arg0: i16
11  spv.Return
12}
13
14// CHECK-LABEL: @bitcount_vector
15spv.func @bitcount_vector(%arg0: vector<3xi32>) "None" {
16  // CHECK: "llvm.intr.ctpop"(%{{.*}}) : (vector<3xi32>) -> vector<3xi32>
17  %0 = spv.BitCount %arg0: vector<3xi32>
18  spv.Return
19}
20
21//===----------------------------------------------------------------------===//
22// spv.BitReverse
23//===----------------------------------------------------------------------===//
24
25// CHECK-LABEL: @bitreverse_scalar
26spv.func @bitreverse_scalar(%arg0: i64) "None" {
27  // CHECK: "llvm.intr.bitreverse"(%{{.*}}) : (i64) -> i64
28  %0 = spv.BitReverse %arg0: i64
29  spv.Return
30}
31
32// CHECK-LABEL: @bitreverse_vector
33spv.func @bitreverse_vector(%arg0: vector<4xi32>) "None" {
34  // CHECK: "llvm.intr.bitreverse"(%{{.*}}) : (vector<4xi32>) -> vector<4xi32>
35  %0 = spv.BitReverse %arg0: vector<4xi32>
36  spv.Return
37}
38
39//===----------------------------------------------------------------------===//
40// spv.BitFieldInsert
41//===----------------------------------------------------------------------===//
42
43// CHECK-LABEL: @bitfield_insert_scalar_same_bit_width
44//  CHECK-SAME: %[[BASE:.*]]: i32, %[[INSERT:.*]]: i32, %[[OFFSET:.*]]: i32, %[[COUNT:.*]]: i32
45spv.func @bitfield_insert_scalar_same_bit_width(%base: i32, %insert: i32, %offset: i32, %count: i32) "None" {
46  // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(-1 : i32) : i32
47  // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[COUNT]] : i32
48  // CHECK: %[[T1:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : i32
49  // CHECK: %[[T2:.*]] = llvm.shl %[[T1]], %[[OFFSET]] : i32
50  // CHECK: %[[MASK:.*]] = llvm.xor %[[T2]], %[[MINUS_ONE]] : i32
51  // CHECK: %[[NEW_BASE:.*]] = llvm.and %[[BASE]], %[[MASK]] : i32
52  // CHECK: %[[SHIFTED_INSERT:.*]] = llvm.shl %[[INSERT]], %[[OFFSET]] : i32
53  // CHECK: llvm.or %[[NEW_BASE]], %[[SHIFTED_INSERT]] : i32
54  %0 = spv.BitFieldInsert %base, %insert, %offset, %count : i32, i32, i32
55  spv.Return
56}
57
58// CHECK-LABEL: @bitfield_insert_scalar_smaller_bit_width
59//  CHECK-SAME: %[[BASE:.*]]: i64, %[[INSERT:.*]]: i64, %[[OFFSET:.*]]: i8, %[[COUNT:.*]]: i8
60spv.func @bitfield_insert_scalar_smaller_bit_width(%base: i64, %insert: i64, %offset: i8, %count: i8) "None" {
61  // CHECK: %[[EXT_OFFSET:.*]] = llvm.zext %[[OFFSET]] : i8 to i64
62  // CHECK: %[[EXT_COUNT:.*]] = llvm.zext %[[COUNT]] : i8 to i64
63  // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(-1 : i64) : i64
64  // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[EXT_COUNT]] : i64
65  // CHECK: %[[T1:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : i64
66  // CHECK: %[[T2:.*]] = llvm.shl %[[T1]], %[[EXT_OFFSET]] : i64
67  // CHECK: %[[MASK:.*]] = llvm.xor %[[T2]], %[[MINUS_ONE]] : i64
68  // CHECK: %[[NEW_BASE:.*]] = llvm.and %[[BASE]], %[[MASK]] : i64
69  // CHECK: %[[SHIFTED_INSERT:.*]] = llvm.shl %[[INSERT]], %[[EXT_OFFSET]] : i64
70  // CHECK: llvm.or %[[NEW_BASE]], %[[SHIFTED_INSERT]] : i64
71  %0 = spv.BitFieldInsert %base, %insert, %offset, %count : i64, i8, i8
72  spv.Return
73}
74
75// CHECK-LABEL: @bitfield_insert_scalar_greater_bit_width
76//  CHECK-SAME: %[[BASE:.*]]: i16, %[[INSERT:.*]]: i16, %[[OFFSET:.*]]: i32, %[[COUNT:.*]]: i64
77spv.func @bitfield_insert_scalar_greater_bit_width(%base: i16, %insert: i16, %offset: i32, %count: i64) "None" {
78  // CHECK: %[[TRUNC_OFFSET:.*]] = llvm.trunc %[[OFFSET]] : i32 to i16
79  // CHECK: %[[TRUNC_COUNT:.*]] = llvm.trunc %[[COUNT]] : i64 to i16
80  // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(-1 : i16) : i16
81  // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[TRUNC_COUNT]] : i16
82  // CHECK: %[[T1:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : i16
83  // CHECK: %[[T2:.*]] = llvm.shl %[[T1]], %[[TRUNC_OFFSET]] : i16
84  // CHECK: %[[MASK:.*]] = llvm.xor %[[T2]], %[[MINUS_ONE]] : i16
85  // CHECK: %[[NEW_BASE:.*]] = llvm.and %[[BASE]], %[[MASK]] : i16
86  // CHECK: %[[SHIFTED_INSERT:.*]] = llvm.shl %[[INSERT]], %[[TRUNC_OFFSET]] : i16
87  // CHECK: llvm.or %[[NEW_BASE]], %[[SHIFTED_INSERT]] : i16
88  %0 = spv.BitFieldInsert %base, %insert, %offset, %count : i16, i32, i64
89  spv.Return
90}
91
92// CHECK-LABEL: @bitfield_insert_vector
93//  CHECK-SAME: %[[BASE:.*]]: vector<2xi32>, %[[INSERT:.*]]: vector<2xi32>, %[[OFFSET:.*]]: i32, %[[COUNT:.*]]: i32
94spv.func @bitfield_insert_vector(%base: vector<2xi32>, %insert: vector<2xi32>, %offset: i32, %count: i32) "None" {
95  // CHECK: %[[OFFSET_V0:.*]] = llvm.mlir.undef : vector<2xi32>
96  // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32
97  // CHECK: %[[OFFSET_V1:.*]] = llvm.insertelement %[[OFFSET]], %[[OFFSET_V0]][%[[ZERO]] : i32] : vector<2xi32>
98  // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1 : i32) : i32
99  // CHECK: %[[OFFSET_V2:.*]] = llvm.insertelement  %[[OFFSET]], %[[OFFSET_V1]][%[[ONE]] : i32] : vector<2xi32>
100  // CHECK: %[[COUNT_V0:.*]] = llvm.mlir.undef : vector<2xi32>
101  // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32
102  // CHECK: %[[COUNT_V1:.*]] = llvm.insertelement %[[COUNT]], %[[COUNT_V0]][%[[ZERO]] : i32] : vector<2xi32>
103  // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1 : i32) : i32
104  // CHECK: %[[COUNT_V2:.*]] = llvm.insertelement %[[COUNT]], %[[COUNT_V1]][%[[ONE]] : i32] : vector<2xi32>
105  // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(dense<-1> : vector<2xi32>) : vector<2xi32>
106  // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[COUNT_V2]] : vector<2xi32>
107  // CHECK: %[[T1:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : vector<2xi32>
108  // CHECK: %[[T2:.*]] = llvm.shl %[[T1]], %[[OFFSET_V2]] : vector<2xi32>
109  // CHECK: %[[MASK:.*]] = llvm.xor %[[T2]], %[[MINUS_ONE]] : vector<2xi32>
110  // CHECK: %[[NEW_BASE:.*]] = llvm.and %[[BASE]], %[[MASK]] : vector<2xi32>
111  // CHECK: %[[SHIFTED_INSERT:.*]] = llvm.shl %[[INSERT]], %[[OFFSET_V2]] : vector<2xi32>
112  // CHECK: llvm.or %[[NEW_BASE]], %[[SHIFTED_INSERT]] : vector<2xi32>
113  %0 = spv.BitFieldInsert %base, %insert, %offset, %count : vector<2xi32>, i32, i32
114  spv.Return
115}
116
117//===----------------------------------------------------------------------===//
118// spv.BitFieldSExtract
119//===----------------------------------------------------------------------===//
120
121// CHECK-LABEL: @bitfield_sextract_scalar_same_bit_width
122//  CHECK-SAME: %[[BASE:.*]]: i64, %[[OFFSET:.*]]: i64, %[[COUNT:.*]]: i64
123spv.func @bitfield_sextract_scalar_same_bit_width(%base: i64, %offset: i64, %count: i64) "None" {
124  // CHECK: %[[SIZE:.]] = llvm.mlir.constant(64 : i64) : i64
125  // CHECK: %[[T0:.*]] = llvm.add %[[COUNT]], %[[OFFSET]] : i64
126  // CHECK: %[[T1:.*]] = llvm.sub %[[SIZE]], %[[T0]] : i64
127  // CHECK: %[[SHIFTED_LEFT:.*]] = llvm.shl %[[BASE]], %[[T1]] : i64
128  // CHECK: %[[T2:.*]] = llvm.add %[[OFFSET]], %[[T1]] : i64
129  // CHECK: llvm.ashr %[[SHIFTED_LEFT]], %[[T2]] : i64
130  %0 = spv.BitFieldSExtract %base, %offset, %count : i64, i64, i64
131  spv.Return
132}
133
134// CHECK-LABEL: @bitfield_sextract_scalar_smaller_bit_width
135//  CHECK-SAME: %[[BASE:.*]]: i32, %[[OFFSET:.*]]: i8, %[[COUNT:.*]]: i8
136spv.func @bitfield_sextract_scalar_smaller_bit_width(%base: i32, %offset: i8, %count: i8) "None" {
137  // CHECK: %[[EXT_OFFSET:.*]] = llvm.zext %[[OFFSET]] : i8 to i32
138  // CHECK: %[[EXT_COUNT:.*]] = llvm.zext %[[COUNT]] : i8 to i32
139  // CHECK: %[[SIZE:.]] = llvm.mlir.constant(32 : i32) : i32
140  // CHECK: %[[T0:.*]] = llvm.add %[[EXT_COUNT]], %[[EXT_OFFSET]] : i32
141  // CHECK: %[[T1:.*]] = llvm.sub %[[SIZE]], %[[T0]] : i32
142  // CHECK: %[[SHIFTED_LEFT:.*]] = llvm.shl %[[BASE]], %[[T1]] : i32
143  // CHECK: %[[T2:.*]] = llvm.add %[[EXT_OFFSET]], %[[T1]] : i32
144  // CHECK: llvm.ashr %[[SHIFTED_LEFT]], %[[T2]] : i32
145  %0 = spv.BitFieldSExtract %base, %offset, %count : i32, i8, i8
146  spv.Return
147}
148
149// CHECK-LABEL: @bitfield_sextract_scalar_greater_bit_width
150//  CHECK-SAME: %[[BASE:.*]]: i32, %[[OFFSET:.*]]: i64, %[[COUNT:.*]]: i64
151spv.func @bitfield_sextract_scalar_greater_bit_width(%base: i32, %offset: i64, %count: i64) "None" {
152  // CHECK: %[[TRUNC_OFFSET:.*]] = llvm.trunc %[[OFFSET]] : i64 to i32
153  // CHECK: %[[TRUNC_COUNT:.*]] = llvm.trunc %[[COUNT]] : i64 to i32
154  // CHECK: %[[SIZE:.]] = llvm.mlir.constant(32 : i32) : i32
155  // CHECK: %[[T0:.*]] = llvm.add %[[TRUNC_COUNT]], %[[TRUNC_OFFSET]] : i32
156  // CHECK: %[[T1:.*]] = llvm.sub %[[SIZE]], %[[T0]] : i32
157  // CHECK: %[[SHIFTED_LEFT:.*]] = llvm.shl %[[BASE]], %[[T1]] : i32
158  // CHECK: %[[T2:.*]] = llvm.add %[[TRUNC_OFFSET]], %[[T1]] : i32
159  // CHECK: llvm.ashr %[[SHIFTED_LEFT]], %[[T2]] : i32
160  %0 = spv.BitFieldSExtract %base, %offset, %count : i32, i64, i64
161  spv.Return
162}
163
164// CHECK-LABEL: @bitfield_sextract_vector
165//  CHECK-SAME: %[[BASE:.*]]: vector<2xi32>, %[[OFFSET:.*]]: i32, %[[COUNT:.*]]: i32
166spv.func @bitfield_sextract_vector(%base: vector<2xi32>, %offset: i32, %count: i32) "None" {
167  // CHECK: %[[OFFSET_V0:.*]] = llvm.mlir.undef : vector<2xi32>
168  // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32
169  // CHECK: %[[OFFSET_V1:.*]] = llvm.insertelement %[[OFFSET]], %[[OFFSET_V0]][%[[ZERO]] : i32] : vector<2xi32>
170  // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1 : i32) : i32
171  // CHECK: %[[OFFSET_V2:.*]] = llvm.insertelement  %[[OFFSET]], %[[OFFSET_V1]][%[[ONE]] : i32] : vector<2xi32>
172  // CHECK: %[[COUNT_V0:.*]] = llvm.mlir.undef : vector<2xi32>
173  // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32
174  // CHECK: %[[COUNT_V1:.*]] = llvm.insertelement %[[COUNT]], %[[COUNT_V0]][%[[ZERO]] : i32] : vector<2xi32>
175  // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1 : i32) : i32
176  // CHECK: %[[COUNT_V2:.*]] = llvm.insertelement %[[COUNT]], %[[COUNT_V1]][%[[ONE]] : i32] : vector<2xi32>
177  // CHECK: %[[SIZE:.*]] = llvm.mlir.constant(dense<32> : vector<2xi32>) : vector<2xi32>
178  // CHECK: %[[T0:.*]] = llvm.add %[[COUNT_V2]], %[[OFFSET_V2]] : vector<2xi32>
179  // CHECK: %[[T1:.*]] = llvm.sub %[[SIZE]], %[[T0]] : vector<2xi32>
180  // CHECK: %[[SHIFTED_LEFT:.*]] = llvm.shl %[[BASE]], %[[T1]] : vector<2xi32>
181  // CHECK: %[[T2:.*]] = llvm.add %[[OFFSET_V2]], %[[T1]] : vector<2xi32>
182  // CHECK: llvm.ashr %[[SHIFTED_LEFT]], %[[T2]] : vector<2xi32>
183  %0 = spv.BitFieldSExtract %base, %offset, %count : vector<2xi32>, i32, i32
184  spv.Return
185}
186
187//===----------------------------------------------------------------------===//
188// spv.BitFieldUExtract
189//===----------------------------------------------------------------------===//
190
191// CHECK-LABEL: @bitfield_uextract_scalar_same_bit_width
192//  CHECK-SAME: %[[BASE:.*]]: i32, %[[OFFSET:.*]]: i32, %[[COUNT:.*]]: i32
193spv.func @bitfield_uextract_scalar_same_bit_width(%base: i32, %offset: i32, %count: i32) "None" {
194  // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(-1 : i32) : i32
195  // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[COUNT]] : i32
196  // CHECK: %[[MASK:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : i32
197  // CHECK: %[[SHIFTED_BASE:.*]] = llvm.lshr %[[BASE]], %[[OFFSET]] : i32
198  // CHECK: llvm.and %[[SHIFTED_BASE]], %[[MASK]] : i32
199  %0 = spv.BitFieldUExtract %base, %offset, %count : i32, i32, i32
200  spv.Return
201}
202
203// CHECK-LABEL: @bitfield_uextract_scalar_smaller_bit_width
204//  CHECK-SAME: %[[BASE:.*]]: i32, %[[OFFSET:.*]]: i16, %[[COUNT:.*]]: i8
205spv.func @bitfield_uextract_scalar_smaller_bit_width(%base: i32, %offset: i16, %count: i8) "None" {
206  // CHECK: %[[EXT_OFFSET:.*]] = llvm.zext %[[OFFSET]] : i16 to i32
207  // CHECK: %[[EXT_COUNT:.*]] = llvm.zext %[[COUNT]] : i8 to i32
208  // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(-1 : i32) : i32
209  // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[EXT_COUNT]] : i32
210  // CHECK: %[[MASK:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : i32
211  // CHECK: %[[SHIFTED_BASE:.*]] = llvm.lshr %[[BASE]], %[[EXT_OFFSET]] : i32
212  // CHECK: llvm.and %[[SHIFTED_BASE]], %[[MASK]] : i32
213  %0 = spv.BitFieldUExtract %base, %offset, %count : i32, i16, i8
214  spv.Return
215}
216
217// CHECK-LABEL: @bitfield_uextract_scalar_greater_bit_width
218//  CHECK-SAME: %[[BASE:.*]]: i8, %[[OFFSET:.*]]: i16, %[[COUNT:.*]]: i8
219spv.func @bitfield_uextract_scalar_greater_bit_width(%base: i8, %offset: i16, %count: i8) "None" {
220  // CHECK: %[[TRUNC_OFFSET:.*]] = llvm.trunc %[[OFFSET]] : i16 to i8
221  // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(-1 : i8) : i8
222  // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[COUNT]] : i8
223  // CHECK: %[[MASK:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : i8
224  // CHECK: %[[SHIFTED_BASE:.*]] = llvm.lshr %[[BASE]], %[[TRUNC_OFFSET]] : i8
225  // CHECK: llvm.and %[[SHIFTED_BASE]], %[[MASK]] : i8
226  %0 = spv.BitFieldUExtract %base, %offset, %count : i8, i16, i8
227  spv.Return
228}
229
230// CHECK-LABEL: @bitfield_uextract_vector
231//  CHECK-SAME: %[[BASE:.*]]: vector<2xi32>, %[[OFFSET:.*]]: i32, %[[COUNT:.*]]: i32
232spv.func @bitfield_uextract_vector(%base: vector<2xi32>, %offset: i32, %count: i32) "None" {
233  // CHECK: %[[OFFSET_V0:.*]] = llvm.mlir.undef : vector<2xi32>
234  // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32
235  // CHECK: %[[OFFSET_V1:.*]] = llvm.insertelement %[[OFFSET]], %[[OFFSET_V0]][%[[ZERO]] : i32] : vector<2xi32>
236  // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1 : i32) : i32
237  // CHECK: %[[OFFSET_V2:.*]] = llvm.insertelement  %[[OFFSET]], %[[OFFSET_V1]][%[[ONE]] : i32] : vector<2xi32>
238  // CHECK: %[[COUNT_V0:.*]] = llvm.mlir.undef : vector<2xi32>
239  // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32
240  // CHECK: %[[COUNT_V1:.*]] = llvm.insertelement %[[COUNT]], %[[COUNT_V0]][%[[ZERO]] : i32] : vector<2xi32>
241  // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1 : i32) : i32
242  // CHECK: %[[COUNT_V2:.*]] = llvm.insertelement %[[COUNT]], %[[COUNT_V1]][%[[ONE]] : i32] : vector<2xi32>
243  // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(dense<-1> : vector<2xi32>) : vector<2xi32>
244  // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[COUNT_V2]] : vector<2xi32>
245  // CHECK: %[[MASK:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : vector<2xi32>
246  // CHECK: %[[SHIFTED_BASE:.*]] = llvm.lshr %[[BASE]], %[[OFFSET_V2]] : vector<2xi32>
247  // CHECK: llvm.and %[[SHIFTED_BASE]], %[[MASK]] : vector<2xi32>
248  %0 = spv.BitFieldUExtract %base, %offset, %count : vector<2xi32>, i32, i32
249  spv.Return
250}
251
252//===----------------------------------------------------------------------===//
253// spv.BitwiseAnd
254//===----------------------------------------------------------------------===//
255
256// CHECK-LABEL: @bitwise_and_scalar
257spv.func @bitwise_and_scalar(%arg0: i32, %arg1: i32) "None" {
258  // CHECK: llvm.and %{{.*}}, %{{.*}} : i32
259  %0 = spv.BitwiseAnd %arg0, %arg1 : i32
260  spv.Return
261}
262
263// CHECK-LABEL: @bitwise_and_vector
264spv.func @bitwise_and_vector(%arg0: vector<4xi64>, %arg1: vector<4xi64>) "None" {
265  // CHECK: llvm.and %{{.*}}, %{{.*}} : vector<4xi64>
266  %0 = spv.BitwiseAnd %arg0, %arg1 : vector<4xi64>
267  spv.Return
268}
269
270//===----------------------------------------------------------------------===//
271// spv.BitwiseOr
272//===----------------------------------------------------------------------===//
273
274// CHECK-LABEL: @bitwise_or_scalar
275spv.func @bitwise_or_scalar(%arg0: i64, %arg1: i64) "None" {
276  // CHECK: llvm.or %{{.*}}, %{{.*}} : i64
277  %0 = spv.BitwiseOr %arg0, %arg1 : i64
278  spv.Return
279}
280
281// CHECK-LABEL: @bitwise_or_vector
282spv.func @bitwise_or_vector(%arg0: vector<3xi8>, %arg1: vector<3xi8>) "None" {
283  // CHECK: llvm.or %{{.*}}, %{{.*}} : vector<3xi8>
284  %0 = spv.BitwiseOr %arg0, %arg1 : vector<3xi8>
285  spv.Return
286}
287
288//===----------------------------------------------------------------------===//
289// spv.BitwiseXor
290//===----------------------------------------------------------------------===//
291
292// CHECK-LABEL: @bitwise_xor_scalar
293spv.func @bitwise_xor_scalar(%arg0: i32, %arg1: i32) "None" {
294  // CHECK: llvm.xor %{{.*}}, %{{.*}} : i32
295  %0 = spv.BitwiseXor %arg0, %arg1 : i32
296  spv.Return
297}
298
299// CHECK-LABEL: @bitwise_xor_vector
300spv.func @bitwise_xor_vector(%arg0: vector<2xi16>, %arg1: vector<2xi16>) "None" {
301  // CHECK: llvm.xor %{{.*}}, %{{.*}} : vector<2xi16>
302  %0 = spv.BitwiseXor %arg0, %arg1 : vector<2xi16>
303  spv.Return
304}
305
306//===----------------------------------------------------------------------===//
307// spv.Not
308//===----------------------------------------------------------------------===//
309
310// CHECK-LABEL: @not_scalar
311spv.func @not_scalar(%arg0: i32) "None" {
312  // CHECK: %[[CONST:.*]] = llvm.mlir.constant(-1 : i32) : i32
313  // CHECK: llvm.xor %{{.*}}, %[[CONST]] : i32
314  %0 = spv.Not %arg0 : i32
315  spv.Return
316}
317
318// CHECK-LABEL: @not_vector
319spv.func @not_vector(%arg0: vector<2xi16>) "None" {
320  // CHECK: %[[CONST:.*]] = llvm.mlir.constant(dense<-1> : vector<2xi16>) : vector<2xi16>
321  // CHECK: llvm.xor %{{.*}}, %[[CONST]] : vector<2xi16>
322  %0 = spv.Not %arg0 : vector<2xi16>
323  spv.Return
324}
325