1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
6 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null
7 #include <arm_sve.h>
8
9 #ifdef SVE_OVERLOADED_FORMS
10 // A simple used,unused... macro, long enough to represent any SVE builtin.
11 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
12 #else
13 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
14 #endif
15
test_svdivr_s32_z(svbool_t pg,svint32_t op1,svint32_t op2)16 svint32_t test_svdivr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2)
17 {
18 // CHECK-LABEL: test_svdivr_s32_z
19 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
20 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
21 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sdivr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
22 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
23 return SVE_ACLE_FUNC(svdivr,_s32,_z,)(pg, op1, op2);
24 }
25
test_svdivr_s64_z(svbool_t pg,svint64_t op1,svint64_t op2)26 svint64_t test_svdivr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2)
27 {
28 // CHECK-LABEL: test_svdivr_s64_z
29 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
30 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
31 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sdivr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
32 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
33 return SVE_ACLE_FUNC(svdivr,_s64,_z,)(pg, op1, op2);
34 }
35
test_svdivr_u32_z(svbool_t pg,svuint32_t op1,svuint32_t op2)36 svuint32_t test_svdivr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2)
37 {
38 // CHECK-LABEL: test_svdivr_u32_z
39 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
40 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
41 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.udivr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
42 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
43 return SVE_ACLE_FUNC(svdivr,_u32,_z,)(pg, op1, op2);
44 }
45
test_svdivr_u64_z(svbool_t pg,svuint64_t op1,svuint64_t op2)46 svuint64_t test_svdivr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2)
47 {
48 // CHECK-LABEL: test_svdivr_u64_z
49 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
50 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
51 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.udivr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
52 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
53 return SVE_ACLE_FUNC(svdivr,_u64,_z,)(pg, op1, op2);
54 }
55
test_svdivr_s32_m(svbool_t pg,svint32_t op1,svint32_t op2)56 svint32_t test_svdivr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2)
57 {
58 // CHECK-LABEL: test_svdivr_s32_m
59 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
60 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sdivr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
61 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
62 return SVE_ACLE_FUNC(svdivr,_s32,_m,)(pg, op1, op2);
63 }
64
test_svdivr_s64_m(svbool_t pg,svint64_t op1,svint64_t op2)65 svint64_t test_svdivr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2)
66 {
67 // CHECK-LABEL: test_svdivr_s64_m
68 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
69 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sdivr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
70 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
71 return SVE_ACLE_FUNC(svdivr,_s64,_m,)(pg, op1, op2);
72 }
73
test_svdivr_u32_m(svbool_t pg,svuint32_t op1,svuint32_t op2)74 svuint32_t test_svdivr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2)
75 {
76 // CHECK-LABEL: test_svdivr_u32_m
77 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
78 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.udivr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
79 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
80 return SVE_ACLE_FUNC(svdivr,_u32,_m,)(pg, op1, op2);
81 }
82
test_svdivr_u64_m(svbool_t pg,svuint64_t op1,svuint64_t op2)83 svuint64_t test_svdivr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2)
84 {
85 // CHECK-LABEL: test_svdivr_u64_m
86 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
87 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.udivr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
88 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
89 return SVE_ACLE_FUNC(svdivr,_u64,_m,)(pg, op1, op2);
90 }
91
test_svdivr_s32_x(svbool_t pg,svint32_t op1,svint32_t op2)92 svint32_t test_svdivr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2)
93 {
94 // CHECK-LABEL: test_svdivr_s32_x
95 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
96 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sdivr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
97 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
98 return SVE_ACLE_FUNC(svdivr,_s32,_x,)(pg, op1, op2);
99 }
100
test_svdivr_s64_x(svbool_t pg,svint64_t op1,svint64_t op2)101 svint64_t test_svdivr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2)
102 {
103 // CHECK-LABEL: test_svdivr_s64_x
104 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
105 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sdivr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
106 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
107 return SVE_ACLE_FUNC(svdivr,_s64,_x,)(pg, op1, op2);
108 }
109
test_svdivr_u32_x(svbool_t pg,svuint32_t op1,svuint32_t op2)110 svuint32_t test_svdivr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2)
111 {
112 // CHECK-LABEL: test_svdivr_u32_x
113 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
114 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.udivr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
115 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
116 return SVE_ACLE_FUNC(svdivr,_u32,_x,)(pg, op1, op2);
117 }
118
test_svdivr_u64_x(svbool_t pg,svuint64_t op1,svuint64_t op2)119 svuint64_t test_svdivr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2)
120 {
121 // CHECK-LABEL: test_svdivr_u64_x
122 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
123 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.udivr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
124 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
125 return SVE_ACLE_FUNC(svdivr,_u64,_x,)(pg, op1, op2);
126 }
127
test_svdivr_n_s32_z(svbool_t pg,svint32_t op1,int32_t op2)128 svint32_t test_svdivr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2)
129 {
130 // CHECK-LABEL: test_svdivr_n_s32_z
131 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
132 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
133 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
134 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sdivr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
135 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
136 return SVE_ACLE_FUNC(svdivr,_n_s32,_z,)(pg, op1, op2);
137 }
138
test_svdivr_n_s64_z(svbool_t pg,svint64_t op1,int64_t op2)139 svint64_t test_svdivr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2)
140 {
141 // CHECK-LABEL: test_svdivr_n_s64_z
142 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
143 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
144 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
145 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sdivr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
146 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
147 return SVE_ACLE_FUNC(svdivr,_n_s64,_z,)(pg, op1, op2);
148 }
149
test_svdivr_n_u32_z(svbool_t pg,svuint32_t op1,uint32_t op2)150 svuint32_t test_svdivr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2)
151 {
152 // CHECK-LABEL: test_svdivr_n_u32_z
153 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
154 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
155 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
156 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.udivr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
157 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
158 return SVE_ACLE_FUNC(svdivr,_n_u32,_z,)(pg, op1, op2);
159 }
160
test_svdivr_n_u64_z(svbool_t pg,svuint64_t op1,uint64_t op2)161 svuint64_t test_svdivr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2)
162 {
163 // CHECK-LABEL: test_svdivr_n_u64_z
164 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
165 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
166 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
167 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.udivr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
168 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
169 return SVE_ACLE_FUNC(svdivr,_n_u64,_z,)(pg, op1, op2);
170 }
171
test_svdivr_n_s32_m(svbool_t pg,svint32_t op1,int32_t op2)172 svint32_t test_svdivr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2)
173 {
174 // CHECK-LABEL: test_svdivr_n_s32_m
175 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
176 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
177 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sdivr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
178 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
179 return SVE_ACLE_FUNC(svdivr,_n_s32,_m,)(pg, op1, op2);
180 }
181
test_svdivr_n_s64_m(svbool_t pg,svint64_t op1,int64_t op2)182 svint64_t test_svdivr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2)
183 {
184 // CHECK-LABEL: test_svdivr_n_s64_m
185 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
186 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
187 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sdivr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
188 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
189 return SVE_ACLE_FUNC(svdivr,_n_s64,_m,)(pg, op1, op2);
190 }
191
test_svdivr_n_u32_m(svbool_t pg,svuint32_t op1,uint32_t op2)192 svuint32_t test_svdivr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2)
193 {
194 // CHECK-LABEL: test_svdivr_n_u32_m
195 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
196 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
197 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.udivr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
198 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
199 return SVE_ACLE_FUNC(svdivr,_n_u32,_m,)(pg, op1, op2);
200 }
201
test_svdivr_n_u64_m(svbool_t pg,svuint64_t op1,uint64_t op2)202 svuint64_t test_svdivr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2)
203 {
204 // CHECK-LABEL: test_svdivr_n_u64_m
205 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
206 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
207 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.udivr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
208 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
209 return SVE_ACLE_FUNC(svdivr,_n_u64,_m,)(pg, op1, op2);
210 }
211
test_svdivr_n_s32_x(svbool_t pg,svint32_t op1,int32_t op2)212 svint32_t test_svdivr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2)
213 {
214 // CHECK-LABEL: test_svdivr_n_s32_x
215 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
216 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
217 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sdivr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
218 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
219 return SVE_ACLE_FUNC(svdivr,_n_s32,_x,)(pg, op1, op2);
220 }
221
test_svdivr_n_s64_x(svbool_t pg,svint64_t op1,int64_t op2)222 svint64_t test_svdivr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2)
223 {
224 // CHECK-LABEL: test_svdivr_n_s64_x
225 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
226 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
227 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sdivr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
228 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
229 return SVE_ACLE_FUNC(svdivr,_n_s64,_x,)(pg, op1, op2);
230 }
231
test_svdivr_n_u32_x(svbool_t pg,svuint32_t op1,uint32_t op2)232 svuint32_t test_svdivr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2)
233 {
234 // CHECK-LABEL: test_svdivr_n_u32_x
235 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
236 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
237 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.udivr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
238 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
239 return SVE_ACLE_FUNC(svdivr,_n_u32,_x,)(pg, op1, op2);
240 }
241
test_svdivr_n_u64_x(svbool_t pg,svuint64_t op1,uint64_t op2)242 svuint64_t test_svdivr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2)
243 {
244 // CHECK-LABEL: test_svdivr_n_u64_x
245 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
246 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
247 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.udivr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
248 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
249 return SVE_ACLE_FUNC(svdivr,_n_u64,_x,)(pg, op1, op2);
250 }
251
test_svdivr_f16_z(svbool_t pg,svfloat16_t op1,svfloat16_t op2)252 svfloat16_t test_svdivr_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
253 {
254 // CHECK-LABEL: test_svdivr_f16_z
255 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
256 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
257 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
258 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
259 return SVE_ACLE_FUNC(svdivr,_f16,_z,)(pg, op1, op2);
260 }
261
test_svdivr_f32_z(svbool_t pg,svfloat32_t op1,svfloat32_t op2)262 svfloat32_t test_svdivr_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
263 {
264 // CHECK-LABEL: test_svdivr_f32_z
265 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
266 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
267 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
268 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
269 return SVE_ACLE_FUNC(svdivr,_f32,_z,)(pg, op1, op2);
270 }
271
test_svdivr_f64_z(svbool_t pg,svfloat64_t op1,svfloat64_t op2)272 svfloat64_t test_svdivr_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
273 {
274 // CHECK-LABEL: test_svdivr_f64_z
275 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
276 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
277 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
278 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
279 return SVE_ACLE_FUNC(svdivr,_f64,_z,)(pg, op1, op2);
280 }
281
test_svdivr_f16_m(svbool_t pg,svfloat16_t op1,svfloat16_t op2)282 svfloat16_t test_svdivr_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
283 {
284 // CHECK-LABEL: test_svdivr_f16_m
285 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
286 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
287 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
288 return SVE_ACLE_FUNC(svdivr,_f16,_m,)(pg, op1, op2);
289 }
290
test_svdivr_f32_m(svbool_t pg,svfloat32_t op1,svfloat32_t op2)291 svfloat32_t test_svdivr_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
292 {
293 // CHECK-LABEL: test_svdivr_f32_m
294 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
295 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
296 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
297 return SVE_ACLE_FUNC(svdivr,_f32,_m,)(pg, op1, op2);
298 }
299
test_svdivr_f64_m(svbool_t pg,svfloat64_t op1,svfloat64_t op2)300 svfloat64_t test_svdivr_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
301 {
302 // CHECK-LABEL: test_svdivr_f64_m
303 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
304 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
305 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
306 return SVE_ACLE_FUNC(svdivr,_f64,_m,)(pg, op1, op2);
307 }
308
test_svdivr_f16_x(svbool_t pg,svfloat16_t op1,svfloat16_t op2)309 svfloat16_t test_svdivr_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
310 {
311 // CHECK-LABEL: test_svdivr_f16_x
312 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
313 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
314 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
315 return SVE_ACLE_FUNC(svdivr,_f16,_x,)(pg, op1, op2);
316 }
317
test_svdivr_f32_x(svbool_t pg,svfloat32_t op1,svfloat32_t op2)318 svfloat32_t test_svdivr_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
319 {
320 // CHECK-LABEL: test_svdivr_f32_x
321 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
322 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
323 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
324 return SVE_ACLE_FUNC(svdivr,_f32,_x,)(pg, op1, op2);
325 }
326
test_svdivr_f64_x(svbool_t pg,svfloat64_t op1,svfloat64_t op2)327 svfloat64_t test_svdivr_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
328 {
329 // CHECK-LABEL: test_svdivr_f64_x
330 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
331 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
332 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
333 return SVE_ACLE_FUNC(svdivr,_f64,_x,)(pg, op1, op2);
334 }
335
test_svdivr_n_f16_z(svbool_t pg,svfloat16_t op1,float16_t op2)336 svfloat16_t test_svdivr_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
337 {
338 // CHECK-LABEL: test_svdivr_n_f16_z
339 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
340 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
341 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
342 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
343 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
344 return SVE_ACLE_FUNC(svdivr,_n_f16,_z,)(pg, op1, op2);
345 }
346
test_svdivr_n_f32_z(svbool_t pg,svfloat32_t op1,float32_t op2)347 svfloat32_t test_svdivr_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
348 {
349 // CHECK-LABEL: test_svdivr_n_f32_z
350 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
351 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
352 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
353 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
354 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
355 return SVE_ACLE_FUNC(svdivr,_n_f32,_z,)(pg, op1, op2);
356 }
357
test_svdivr_n_f64_z(svbool_t pg,svfloat64_t op1,float64_t op2)358 svfloat64_t test_svdivr_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
359 {
360 // CHECK-LABEL: test_svdivr_n_f64_z
361 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
362 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
363 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
364 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
365 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
366 return SVE_ACLE_FUNC(svdivr,_n_f64,_z,)(pg, op1, op2);
367 }
368
test_svdivr_n_f16_m(svbool_t pg,svfloat16_t op1,float16_t op2)369 svfloat16_t test_svdivr_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
370 {
371 // CHECK-LABEL: test_svdivr_n_f16_m
372 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
373 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
374 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
375 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
376 return SVE_ACLE_FUNC(svdivr,_n_f16,_m,)(pg, op1, op2);
377 }
378
test_svdivr_n_f32_m(svbool_t pg,svfloat32_t op1,float32_t op2)379 svfloat32_t test_svdivr_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
380 {
381 // CHECK-LABEL: test_svdivr_n_f32_m
382 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
383 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
384 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
385 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
386 return SVE_ACLE_FUNC(svdivr,_n_f32,_m,)(pg, op1, op2);
387 }
388
test_svdivr_n_f64_m(svbool_t pg,svfloat64_t op1,float64_t op2)389 svfloat64_t test_svdivr_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
390 {
391 // CHECK-LABEL: test_svdivr_n_f64_m
392 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
393 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
394 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
395 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
396 return SVE_ACLE_FUNC(svdivr,_n_f64,_m,)(pg, op1, op2);
397 }
398
test_svdivr_n_f16_x(svbool_t pg,svfloat16_t op1,float16_t op2)399 svfloat16_t test_svdivr_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
400 {
401 // CHECK-LABEL: test_svdivr_n_f16_x
402 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
403 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
404 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
405 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
406 return SVE_ACLE_FUNC(svdivr,_n_f16,_x,)(pg, op1, op2);
407 }
408
test_svdivr_n_f32_x(svbool_t pg,svfloat32_t op1,float32_t op2)409 svfloat32_t test_svdivr_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
410 {
411 // CHECK-LABEL: test_svdivr_n_f32_x
412 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
413 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
414 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
415 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
416 return SVE_ACLE_FUNC(svdivr,_n_f32,_x,)(pg, op1, op2);
417 }
418
test_svdivr_n_f64_x(svbool_t pg,svfloat64_t op1,float64_t op2)419 svfloat64_t test_svdivr_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
420 {
421 // CHECK-LABEL: test_svdivr_n_f64_x
422 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
423 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
424 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
425 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
426 return SVE_ACLE_FUNC(svdivr,_n_f64,_x,)(pg, op1, op2);
427 }
428