1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
6 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null
7 #include <arm_sve.h>
8
9 #ifdef SVE_OVERLOADED_FORMS
10 // A simple used,unused... macro, long enough to represent any SVE builtin.
11 #define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
12 #else
13 #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
14 #endif
15
test_svldff1uw_s64(svbool_t pg,const uint32_t * base)16 svint64_t test_svldff1uw_s64(svbool_t pg, const uint32_t *base)
17 {
18 // CHECK-LABEL: test_svldff1uw_s64
19 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
20 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base)
21 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
22 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
23 return svldff1uw_s64(pg, base);
24 }
25
test_svldff1uw_u64(svbool_t pg,const uint32_t * base)26 svuint64_t test_svldff1uw_u64(svbool_t pg, const uint32_t *base)
27 {
28 // CHECK-LABEL: test_svldff1uw_u64
29 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
30 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base)
31 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
32 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
33 return svldff1uw_u64(pg, base);
34 }
35
test_svldff1uw_vnum_s64(svbool_t pg,const uint32_t * base,int64_t vnum)36 svint64_t test_svldff1uw_vnum_s64(svbool_t pg, const uint32_t *base, int64_t vnum)
37 {
38 // CHECK-LABEL: test_svldff1uw_vnum_s64
39 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
40 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to <vscale x 2 x i32>*
41 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i32>, <vscale x 2 x i32>* %[[BITCAST]], i64 %vnum, i64 0
42 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %[[GEP]])
43 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
44 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
45 return svldff1uw_vnum_s64(pg, base, vnum);
46 }
47
test_svldff1uw_vnum_u64(svbool_t pg,const uint32_t * base,int64_t vnum)48 svuint64_t test_svldff1uw_vnum_u64(svbool_t pg, const uint32_t *base, int64_t vnum)
49 {
50 // CHECK-LABEL: test_svldff1uw_vnum_u64
51 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
52 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to <vscale x 2 x i32>*
53 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i32>, <vscale x 2 x i32>* %[[BITCAST]], i64 %vnum, i64 0
54 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %[[GEP]])
55 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
56 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
57 return svldff1uw_vnum_u64(pg, base, vnum);
58 }
59
test_svldff1uw_gather_u64base_s64(svbool_t pg,svuint64_t bases)60 svint64_t test_svldff1uw_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
61 // CHECK-LABEL: test_svldff1uw_gather_u64base_s64
62 // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
63 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
64 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
65 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
66 return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _s64, )(pg, bases);
67 }
68
test_svldff1uw_gather_u64base_u64(svbool_t pg,svuint64_t bases)69 svuint64_t test_svldff1uw_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
70 // CHECK-LABEL: test_svldff1uw_gather_u64base_u64
71 // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
72 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
73 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
74 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
75 return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _u64, )(pg, bases);
76 }
77
test_svldff1uw_gather_s64offset_s64(svbool_t pg,const uint32_t * base,svint64_t offsets)78 svint64_t test_svldff1uw_gather_s64offset_s64(svbool_t pg, const uint32_t *base, svint64_t offsets) {
79 // CHECK-LABEL: test_svldff1uw_gather_s64offset_s64
80 // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
81 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
82 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
83 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
84 return SVE_ACLE_FUNC(svldff1uw_gather_, s64, offset_s64, )(pg, base, offsets);
85 }
86
test_svldff1uw_gather_s64offset_u64(svbool_t pg,const uint32_t * base,svint64_t offsets)87 svuint64_t test_svldff1uw_gather_s64offset_u64(svbool_t pg, const uint32_t *base, svint64_t offsets) {
88 // CHECK-LABEL: test_svldff1uw_gather_s64offset_u64
89 // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
90 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
91 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
92 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
93 return SVE_ACLE_FUNC(svldff1uw_gather_, s64, offset_u64, )(pg, base, offsets);
94 }
95
test_svldff1uw_gather_u64offset_s64(svbool_t pg,const uint32_t * base,svuint64_t offsets)96 svint64_t test_svldff1uw_gather_u64offset_s64(svbool_t pg, const uint32_t *base, svuint64_t offsets) {
97 // CHECK-LABEL: test_svldff1uw_gather_u64offset_s64
98 // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
99 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
100 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
101 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
102 return SVE_ACLE_FUNC(svldff1uw_gather_, u64, offset_s64, )(pg, base, offsets);
103 }
104
test_svldff1uw_gather_u64offset_u64(svbool_t pg,const uint32_t * base,svuint64_t offsets)105 svuint64_t test_svldff1uw_gather_u64offset_u64(svbool_t pg, const uint32_t *base, svuint64_t offsets) {
106 // CHECK-LABEL: test_svldff1uw_gather_u64offset_u64
107 // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
108 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
109 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
110 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
111 return SVE_ACLE_FUNC(svldff1uw_gather_, u64, offset_u64, )(pg, base, offsets);
112 }
113
test_svldff1uw_gather_u64base_offset_s64(svbool_t pg,svuint64_t bases,int64_t offset)114 svint64_t test_svldff1uw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
115 // CHECK-LABEL: test_svldff1uw_gather_u64base_offset_s64
116 // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
117 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
118 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
119 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
120 return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _offset_s64, )(pg, bases, offset);
121 }
122
test_svldff1uw_gather_u64base_offset_u64(svbool_t pg,svuint64_t bases,int64_t offset)123 svuint64_t test_svldff1uw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
124 // CHECK-LABEL: test_svldff1uw_gather_u64base_offset_u64
125 // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
126 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
127 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
128 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
129 return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _offset_u64, )(pg, bases, offset);
130 }
131
test_svldff1uw_gather_s64index_s64(svbool_t pg,const uint32_t * base,svint64_t indices)132 svint64_t test_svldff1uw_gather_s64index_s64(svbool_t pg, const uint32_t *base, svint64_t indices) {
133 // CHECK-LABEL: test_svldff1uw_gather_s64index_s64
134 // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
135 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
136 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
137 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
138 return SVE_ACLE_FUNC(svldff1uw_gather_, s64, index_s64, )(pg, base, indices);
139 }
140
test_svldff1uw_gather_s64index_u64(svbool_t pg,const uint32_t * base,svint64_t indices)141 svuint64_t test_svldff1uw_gather_s64index_u64(svbool_t pg, const uint32_t *base, svint64_t indices) {
142 // CHECK-LABEL: test_svldff1uw_gather_s64index_u64
143 // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
144 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
145 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
146 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
147 return SVE_ACLE_FUNC(svldff1uw_gather_, s64, index_u64, )(pg, base, indices);
148 }
149
test_svldff1uw_gather_u64index_s64(svbool_t pg,const uint32_t * base,svuint64_t indices)150 svint64_t test_svldff1uw_gather_u64index_s64(svbool_t pg, const uint32_t *base, svuint64_t indices) {
151 // CHECK-LABEL: test_svldff1uw_gather_u64index_s64
152 // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
153 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
154 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
155 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
156 return SVE_ACLE_FUNC(svldff1uw_gather_, u64, index_s64, )(pg, base, indices);
157 }
158
test_svldff1uw_gather_u64index_u64(svbool_t pg,const uint32_t * base,svuint64_t indices)159 svuint64_t test_svldff1uw_gather_u64index_u64(svbool_t pg, const uint32_t *base, svuint64_t indices) {
160 // CHECK-LABEL: test_svldff1uw_gather_u64index_u64
161 // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
162 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
163 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
164 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
165 return SVE_ACLE_FUNC(svldff1uw_gather_, u64, index_u64, )(pg, base, indices);
166 }
167
test_svldff1uw_gather_u64base_index_s64(svbool_t pg,svuint64_t bases,int64_t index)168 svint64_t test_svldff1uw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
169 // CHECK-LABEL: test_svldff1uw_gather_u64base_index_s64
170 // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
171 // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
172 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
173 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
174 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
175 return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _index_s64, )(pg, bases, index);
176 }
177
test_svldff1uw_gather_u64base_index_u64(svbool_t pg,svuint64_t bases,int64_t index)178 svuint64_t test_svldff1uw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
179 // CHECK-LABEL: test_svldff1uw_gather_u64base_index_u64
180 // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
181 // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
182 // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
183 // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
184 // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
185 return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _index_u64, )(pg, bases, index);
186 }
187