1// REQUIRES: arm
2// RUN: llvm-mc --arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
3// RUN: ld.lld %t -o %t2
4// RUN: llvm-objdump --triple=thumbv7a-none-linux-gnueabi -d %t2 | FileCheck %s
5
6/// Check that the ARM ABI rules for undefined weak symbols are applied.
7/// Branch instructions are resolved to the next instruction. Relative
8/// relocations are resolved to the place.
9
10 .syntax unified
11
12 .weak target
13 .type target, %function
14
15 .text
16 .global _start
17_start:
18/// R_ARM_THM_JUMP19
19 beq.w target
20/// R_ARM_THM_JUMP24
21 b.w target
22/// R_ARM_THM_CALL
23 bl target
24/// R_ARM_THM_CALL with exchange
25 blx target
26/// R_ARM_THM_MOVT_PREL
27 movt r0, :upper16:target - .
28/// R_ARM_THM_MOVW_PREL_NC
29 movw r0, :lower16:target - .
30/// R_ARM_THM_ALU_PREL_11_0
31/// adr r0, target
32 .inst.w 0xf2af0004
33 .reloc 0x18, R_ARM_THM_ALU_PREL_11_0, target
34/// R_ARM_THM_PC12
35/// ldr r0, target
36 .inst.w 0xf85f0004
37 .reloc 0x1c, R_ARM_THM_PC12, target
38// CHECK: Disassembly of section .text:
39// CHECK-EMPTY:
40// CHECK:         200b4: {{.*}} beq.w   0x200b8 <_start+0x4>  @ imm = #0
41// CHECK-NEXT:    200b8: {{.*}} b.w     0x200bc <_start+0x8>  @ imm = #0
42// CHECK-NEXT:    200bc: {{.*}} bl      0x200c0 <_start+0xc>  @ imm = #0
43/// blx is transformed into bl so we don't change state
44// CHECK-NEXT:    200c0: {{.*}} bl      0x200c4 <_start+0x10> @ imm = #0
45// CHECK-NEXT:    200c4: {{.*}} movt    r0, #0
46// CHECK-NEXT:    200c8: {{.*}} movw    r0, #0
47// CHECK-NEXT:    200cc: {{.*}} adr.w   r0, #-4
48// CHECK-NEXT:    200d0: {{.*}} ldr.w   r0, [pc, #-4]
49