1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -o - %s | FileCheck %s --check-prefix=SI
3# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -o - %s | FileCheck %s --check-prefix=VI
4---
5name: test_zextload_flat_i32_i8
6body: |
7  bb.0:
8    liveins: $vgpr0_vgpr1
9
10    ; SI-LABEL: name: test_zextload_flat_i32_i8
11    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
12    ; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
13    ; SI: $vgpr0 = COPY [[ZEXTLOAD]](s32)
14    ; VI-LABEL: name: test_zextload_flat_i32_i8
15    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
16    ; VI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
17    ; VI: $vgpr0 = COPY [[ZEXTLOAD]](s32)
18    %0:_(p0) = COPY $vgpr0_vgpr1
19    %1:_(s32) = G_ZEXTLOAD %0 :: (load (s8), addrspace 0)
20    $vgpr0 = COPY %1
21...
22---
23name: test_zextload_flat_i32_i16
24body: |
25  bb.0:
26    liveins: $vgpr0_vgpr1
27
28    ; SI-LABEL: name: test_zextload_flat_i32_i16
29    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
30    ; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s16))
31    ; SI: $vgpr0 = COPY [[ZEXTLOAD]](s32)
32    ; VI-LABEL: name: test_zextload_flat_i32_i16
33    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
34    ; VI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s16))
35    ; VI: $vgpr0 = COPY [[ZEXTLOAD]](s32)
36     %0:_(p0) = COPY $vgpr0_vgpr1
37    %1:_(s32) = G_ZEXTLOAD %0 :: (load (s16), addrspace 0)
38    $vgpr0 = COPY %1
39...
40---
41name: test_zextload_flat_i31_i8
42body: |
43  bb.0:
44    liveins: $vgpr0_vgpr1
45
46    ; SI-LABEL: name: test_zextload_flat_i31_i8
47    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
48    ; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
49    ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[ZEXTLOAD]](s32)
50    ; SI: $vgpr0 = COPY [[COPY1]](s32)
51    ; VI-LABEL: name: test_zextload_flat_i31_i8
52    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
53    ; VI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
54    ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[ZEXTLOAD]](s32)
55    ; VI: $vgpr0 = COPY [[COPY1]](s32)
56    %0:_(p0) = COPY $vgpr0_vgpr1
57    %1:_(s31) = G_ZEXTLOAD %0 :: (load (s8), addrspace 0)
58    %2:_(s32) = G_ANYEXT %1
59    $vgpr0 = COPY %2
60...
61---
62name: test_zextload_flat_i64_i8
63body: |
64  bb.0:
65    liveins: $vgpr0_vgpr1
66
67    ; SI-LABEL: name: test_zextload_flat_i64_i8
68    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
69    ; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
70    ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ZEXTLOAD]](s32)
71    ; SI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
72    ; VI-LABEL: name: test_zextload_flat_i64_i8
73    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
74    ; VI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
75    ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ZEXTLOAD]](s32)
76    ; VI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
77    %0:_(p0) = COPY $vgpr0_vgpr1
78    %1:_(s64) = G_ZEXTLOAD %0 :: (load (s8), addrspace 0)
79    $vgpr0_vgpr1 = COPY %1
80...
81---
82name: test_zextload_flat_i64_i16
83body: |
84  bb.0:
85    liveins: $vgpr0_vgpr1
86
87    ; SI-LABEL: name: test_zextload_flat_i64_i16
88    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
89    ; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s16))
90    ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ZEXTLOAD]](s32)
91    ; SI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
92    ; VI-LABEL: name: test_zextload_flat_i64_i16
93    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
94    ; VI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s16))
95    ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ZEXTLOAD]](s32)
96    ; VI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
97    %0:_(p0) = COPY $vgpr0_vgpr1
98    %1:_(s64) = G_ZEXTLOAD %0 :: (load (s16), addrspace 0)
99    $vgpr0_vgpr1 = COPY %1
100...
101---
102name: test_zextload_flat_i64_i32
103body: |
104  bb.0:
105    liveins: $vgpr0_vgpr1
106
107    ; SI-LABEL: name: test_zextload_flat_i64_i32
108    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
109    ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s32))
110    ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[LOAD]](s32)
111    ; SI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
112    ; VI-LABEL: name: test_zextload_flat_i64_i32
113    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
114    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s32))
115    ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[LOAD]](s32)
116    ; VI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
117    %0:_(p0) = COPY $vgpr0_vgpr1
118    %1:_(s64) = G_ZEXTLOAD %0 :: (load (s32), addrspace 0)
119    $vgpr0_vgpr1 = COPY %1
120...
121