1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -global-isel -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
3; RUN: llc -global-isel -march=amdgcn -mcpu=gfx1013 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
4; RUN: not --crash llc -global-isel -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s -o /dev/null 2>&1 | FileCheck -check-prefix=ERR %s
5
6; uint4 llvm.amdgcn.image.bvh.intersect.ray.i32.v4f32(uint node_ptr, float ray_extent, float4 ray_origin, float4 ray_dir, float4 ray_inv_dir, uint4 texture_descr)
7; uint4 llvm.amdgcn.image.bvh.intersect.ray.i32.v4f16(uint node_ptr, float ray_extent, float4 ray_origin, half4 ray_dir, half4 ray_inv_dir, uint4 texture_descr)
8; uint4 llvm.amdgcn.image.bvh.intersect.ray.i64.v4f32(ulong node_ptr, float ray_extent, float4 ray_origin, float4 ray_dir, float4 ray_inv_dir, uint4 texture_descr)
9; uint4 llvm.amdgcn.image.bvh.intersect.ray.i64.v4f16(ulong node_ptr, float ray_extent, float4 ray_origin, half4 ray_dir, half4 ray_inv_dir, uint4 texture_descr)
10
11declare <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i32.v4f32(i32, float, <4 x float>, <4 x float>, <4 x float>, <4 x i32>)
12declare <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i32.v4f16(i32, float, <4 x float>, <4 x half>, <4 x half>, <4 x i32>)
13declare <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i64.v4f32(i64, float, <4 x float>, <4 x float>, <4 x float>, <4 x i32>)
14declare <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i64.v4f16(i64, float, <4 x float>, <4 x half>, <4 x half>, <4 x i32>)
15
16define amdgpu_ps <4 x float> @image_bvh_intersect_ray(i32 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x float> %ray_dir, <4 x float> %ray_inv_dir, <4 x i32> inreg %tdescr) {
17; GCN-LABEL: image_bvh_intersect_ray:
18; GCN:       ; %bb.0:
19; GCN-NEXT:    image_bvh_intersect_ray v[0:3], [v0, v1, v2, v3, v4, v6, v7, v8, v10, v11, v12], s[0:3]
20; GCN-NEXT:    s_waitcnt vmcnt(0)
21; GCN-NEXT:    ; return to shader part epilog
22; ERR: in function image_bvh_intersect_ray{{.*}}intrinsic not supported on subtarget
23  %v = call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i32.v4f32(i32 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x float> %ray_dir, <4 x float> %ray_inv_dir, <4 x i32> %tdescr)
24  %r = bitcast <4 x i32> %v to <4 x float>
25  ret <4 x float> %r
26}
27
28define amdgpu_ps <4 x float> @image_bvh_intersect_ray_a16(i32 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x half> %ray_dir, <4 x half> %ray_inv_dir, <4 x i32> inreg %tdescr) {
29; GCN-LABEL: image_bvh_intersect_ray_a16:
30; GCN:       ; %bb.0:
31; GCN-NEXT:    s_mov_b32 s4, 0xffff
32; GCN-NEXT:    v_lshrrev_b32_e32 v5, 16, v6
33; GCN-NEXT:    v_and_b32_e32 v10, s4, v8
34; GCN-NEXT:    v_lshrrev_b32_e32 v8, 16, v8
35; GCN-NEXT:    v_and_b32_e32 v9, s4, v9
36; GCN-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
37; GCN-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
38; GCN-NEXT:    v_and_or_b32 v5, v6, s4, v5
39; GCN-NEXT:    v_and_or_b32 v6, v7, s4, v10
40; GCN-NEXT:    v_lshl_or_b32 v7, v9, 16, v8
41; GCN-NEXT:    image_bvh_intersect_ray v[0:3], v[0:7], s[0:3] a16
42; GCN-NEXT:    s_waitcnt vmcnt(0)
43; GCN-NEXT:    ; return to shader part epilog
44  %v = call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i32.v4f16(i32 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x half> %ray_dir, <4 x half> %ray_inv_dir, <4 x i32> %tdescr)
45  %r = bitcast <4 x i32> %v to <4 x float>
46  ret <4 x float> %r
47}
48
49define amdgpu_ps <4 x float> @image_bvh64_intersect_ray(i64 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x float> %ray_dir, <4 x float> %ray_inv_dir, <4 x i32> inreg %tdescr) {
50; GCN-LABEL: image_bvh64_intersect_ray:
51; GCN:       ; %bb.0:
52; GCN-NEXT:    image_bvh64_intersect_ray v[0:3], [v0, v1, v2, v3, v4, v5, v7, v8, v9, v11, v12, v13], s[0:3]
53; GCN-NEXT:    s_waitcnt vmcnt(0)
54; GCN-NEXT:    ; return to shader part epilog
55  %v = call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i64.v4f32(i64 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x float> %ray_dir, <4 x float> %ray_inv_dir, <4 x i32> %tdescr)
56  %r = bitcast <4 x i32> %v to <4 x float>
57  ret <4 x float> %r
58}
59
60define amdgpu_ps <4 x float> @image_bvh64_intersect_ray_a16(i64 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x half> %ray_dir, <4 x half> %ray_inv_dir, <4 x i32> inreg %tdescr) {
61; GCN-LABEL: image_bvh64_intersect_ray_a16:
62; GCN:       ; %bb.0:
63; GCN-NEXT:    s_mov_b32 s4, 0xffff
64; GCN-NEXT:    v_lshrrev_b32_e32 v6, 16, v7
65; GCN-NEXT:    v_and_b32_e32 v11, s4, v9
66; GCN-NEXT:    v_lshrrev_b32_e32 v9, 16, v9
67; GCN-NEXT:    v_and_b32_e32 v10, s4, v10
68; GCN-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
69; GCN-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
70; GCN-NEXT:    v_and_or_b32 v6, v7, s4, v6
71; GCN-NEXT:    v_and_or_b32 v7, v8, s4, v11
72; GCN-NEXT:    v_lshl_or_b32 v8, v10, 16, v9
73; GCN-NEXT:    image_bvh64_intersect_ray v[0:3], v[0:15], s[0:3] a16
74; GCN-NEXT:    s_waitcnt vmcnt(0)
75; GCN-NEXT:    ; return to shader part epilog
76  %v = call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i64.v4f16(i64 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x half> %ray_dir, <4 x half> %ray_inv_dir, <4 x i32> %tdescr)
77  %r = bitcast <4 x i32> %v to <4 x float>
78  ret <4 x float> %r
79}
80
81define amdgpu_ps <4 x float> @image_bvh_intersect_ray_vgpr_descr(i32 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x float> %ray_dir, <4 x float> %ray_inv_dir, <4 x i32> %tdescr) {
82; GCN-LABEL: image_bvh_intersect_ray_vgpr_descr:
83; GCN:       ; %bb.0:
84; GCN-NEXT:    s_mov_b32 s1, exec_lo
85; GCN-NEXT:  BB4_1: ; =>This Inner Loop Header: Depth=1
86; GCN-NEXT:    v_readfirstlane_b32 s4, v14
87; GCN-NEXT:    v_readfirstlane_b32 s5, v15
88; GCN-NEXT:    v_readfirstlane_b32 s6, v16
89; GCN-NEXT:    v_readfirstlane_b32 s7, v17
90; GCN-NEXT:    v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[14:15]
91; GCN-NEXT:    image_bvh_intersect_ray v[18:21], [v0, v1, v2, v3, v4, v6, v7, v8, v10, v11, v12], s[4:7]
92; GCN-NEXT:    v_cmp_eq_u64_e64 s0, s[6:7], v[16:17]
93; GCN-NEXT:    s_and_b32 s0, s0, vcc_lo
94; GCN-NEXT:    s_and_saveexec_b32 s0, s0
95; GCN-NEXT:    s_xor_b32 exec_lo, exec_lo, s0
96; GCN-NEXT:    s_cbranch_execnz BB4_1
97; GCN-NEXT:  ; %bb.2:
98; GCN-NEXT:    s_mov_b32 exec_lo, s1
99; GCN-NEXT:    s_waitcnt vmcnt(0)
100; GCN-NEXT:    v_mov_b32_e32 v0, v18
101; GCN-NEXT:    v_mov_b32_e32 v1, v19
102; GCN-NEXT:    v_mov_b32_e32 v2, v20
103; GCN-NEXT:    v_mov_b32_e32 v3, v21
104; GCN-NEXT:    ; return to shader part epilog
105  %v = call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i32.v4f32(i32 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x float> %ray_dir, <4 x float> %ray_inv_dir, <4 x i32> %tdescr)
106  %r = bitcast <4 x i32> %v to <4 x float>
107  ret <4 x float> %r
108}
109
110define amdgpu_ps <4 x float> @image_bvh_intersect_ray_a16_vgpr_descr(i32 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x half> %ray_dir, <4 x half> %ray_inv_dir, <4 x i32> %tdescr) {
111; GCN-LABEL: image_bvh_intersect_ray_a16_vgpr_descr:
112; GCN:       ; %bb.0:
113; GCN-NEXT:    s_mov_b32 s0, 0xffff
114; GCN-NEXT:    v_lshrrev_b32_e32 v5, 16, v6
115; GCN-NEXT:    v_and_b32_e32 v14, s0, v8
116; GCN-NEXT:    v_lshrrev_b32_e32 v8, 16, v8
117; GCN-NEXT:    v_and_b32_e32 v15, s0, v9
118; GCN-NEXT:    s_mov_b32 s1, exec_lo
119; GCN-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
120; GCN-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
121; GCN-NEXT:    v_lshl_or_b32 v15, v15, 16, v8
122; GCN-NEXT:    v_and_or_b32 v9, v6, s0, v5
123; GCN-NEXT:    v_and_or_b32 v14, v7, s0, v14
124; GCN-NEXT:  BB5_1: ; =>This Inner Loop Header: Depth=1
125; GCN-NEXT:    v_readfirstlane_b32 s4, v10
126; GCN-NEXT:    v_readfirstlane_b32 s5, v11
127; GCN-NEXT:    v_readfirstlane_b32 s6, v12
128; GCN-NEXT:    v_readfirstlane_b32 s7, v13
129; GCN-NEXT:    v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[10:11]
130; GCN-NEXT:    image_bvh_intersect_ray v[5:8], [v0, v1, v2, v3, v4, v9, v14, v15], s[4:7] a16
131; GCN-NEXT:    v_cmp_eq_u64_e64 s0, s[6:7], v[12:13]
132; GCN-NEXT:    s_and_b32 s0, s0, vcc_lo
133; GCN-NEXT:    s_and_saveexec_b32 s0, s0
134; GCN-NEXT:    s_xor_b32 exec_lo, exec_lo, s0
135; GCN-NEXT:    s_cbranch_execnz BB5_1
136; GCN-NEXT:  ; %bb.2:
137; GCN-NEXT:    s_mov_b32 exec_lo, s1
138; GCN-NEXT:    s_waitcnt vmcnt(0)
139; GCN-NEXT:    v_mov_b32_e32 v0, v5
140; GCN-NEXT:    v_mov_b32_e32 v1, v6
141; GCN-NEXT:    v_mov_b32_e32 v2, v7
142; GCN-NEXT:    v_mov_b32_e32 v3, v8
143; GCN-NEXT:    ; return to shader part epilog
144  %v = call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i32.v4f16(i32 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x half> %ray_dir, <4 x half> %ray_inv_dir, <4 x i32> %tdescr)
145  %r = bitcast <4 x i32> %v to <4 x float>
146  ret <4 x float> %r
147}
148
149define amdgpu_ps <4 x float> @image_bvh64_intersect_ray_vgpr_descr(i64 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x float> %ray_dir, <4 x float> %ray_inv_dir, <4 x i32> %tdescr) {
150; GCN-LABEL: image_bvh64_intersect_ray_vgpr_descr:
151; GCN:       ; %bb.0:
152; GCN-NEXT:    s_mov_b32 s1, exec_lo
153; GCN-NEXT:  BB6_1: ; =>This Inner Loop Header: Depth=1
154; GCN-NEXT:    v_readfirstlane_b32 s4, v15
155; GCN-NEXT:    v_readfirstlane_b32 s5, v16
156; GCN-NEXT:    v_readfirstlane_b32 s6, v17
157; GCN-NEXT:    v_readfirstlane_b32 s7, v18
158; GCN-NEXT:    v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[15:16]
159; GCN-NEXT:    image_bvh64_intersect_ray v[19:22], [v0, v1, v2, v3, v4, v5, v7, v8, v9, v11, v12, v13], s[4:7]
160; GCN-NEXT:    v_cmp_eq_u64_e64 s0, s[6:7], v[17:18]
161; GCN-NEXT:    s_and_b32 s0, s0, vcc_lo
162; GCN-NEXT:    s_and_saveexec_b32 s0, s0
163; GCN-NEXT:    s_xor_b32 exec_lo, exec_lo, s0
164; GCN-NEXT:    s_cbranch_execnz BB6_1
165; GCN-NEXT:  ; %bb.2:
166; GCN-NEXT:    s_mov_b32 exec_lo, s1
167; GCN-NEXT:    s_waitcnt vmcnt(0)
168; GCN-NEXT:    v_mov_b32_e32 v0, v19
169; GCN-NEXT:    v_mov_b32_e32 v1, v20
170; GCN-NEXT:    v_mov_b32_e32 v2, v21
171; GCN-NEXT:    v_mov_b32_e32 v3, v22
172; GCN-NEXT:    ; return to shader part epilog
173  %v = call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i64.v4f32(i64 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x float> %ray_dir, <4 x float> %ray_inv_dir, <4 x i32> %tdescr)
174  %r = bitcast <4 x i32> %v to <4 x float>
175  ret <4 x float> %r
176}
177
178define amdgpu_ps <4 x float> @image_bvh64_intersect_ray_a16_vgpr_descr(i64 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x half> %ray_dir, <4 x half> %ray_inv_dir, <4 x i32> %tdescr) {
179; GCN-LABEL: image_bvh64_intersect_ray_a16_vgpr_descr:
180; GCN:       ; %bb.0:
181; GCN-NEXT:    s_mov_b32 s0, 0xffff
182; GCN-NEXT:    v_lshrrev_b32_e32 v6, 16, v7
183; GCN-NEXT:    v_and_b32_e32 v15, s0, v9
184; GCN-NEXT:    v_lshrrev_b32_e32 v9, 16, v9
185; GCN-NEXT:    v_and_b32_e32 v16, s0, v10
186; GCN-NEXT:    s_mov_b32 s1, exec_lo
187; GCN-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
188; GCN-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
189; GCN-NEXT:    v_lshl_or_b32 v16, v16, 16, v9
190; GCN-NEXT:    v_and_or_b32 v10, v7, s0, v6
191; GCN-NEXT:    v_and_or_b32 v15, v8, s0, v15
192; GCN-NEXT:  BB7_1: ; =>This Inner Loop Header: Depth=1
193; GCN-NEXT:    v_readfirstlane_b32 s4, v11
194; GCN-NEXT:    v_readfirstlane_b32 s5, v12
195; GCN-NEXT:    v_readfirstlane_b32 s6, v13
196; GCN-NEXT:    v_readfirstlane_b32 s7, v14
197; GCN-NEXT:    v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[11:12]
198; GCN-NEXT:    image_bvh64_intersect_ray v[6:9], [v0, v1, v2, v3, v4, v5, v10, v15, v16], s[4:7] a16
199; GCN-NEXT:    v_cmp_eq_u64_e64 s0, s[6:7], v[13:14]
200; GCN-NEXT:    s_and_b32 s0, s0, vcc_lo
201; GCN-NEXT:    s_and_saveexec_b32 s0, s0
202; GCN-NEXT:    s_xor_b32 exec_lo, exec_lo, s0
203; GCN-NEXT:    s_cbranch_execnz BB7_1
204; GCN-NEXT:  ; %bb.2:
205; GCN-NEXT:    s_mov_b32 exec_lo, s1
206; GCN-NEXT:    s_waitcnt vmcnt(0)
207; GCN-NEXT:    v_mov_b32_e32 v0, v6
208; GCN-NEXT:    v_mov_b32_e32 v1, v7
209; GCN-NEXT:    v_mov_b32_e32 v2, v8
210; GCN-NEXT:    v_mov_b32_e32 v3, v9
211; GCN-NEXT:    ; return to shader part epilog
212  %v = call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i64.v4f16(i64 %node_ptr, float %ray_extent, <4 x float> %ray_origin, <4 x half> %ray_dir, <4 x half> %ray_inv_dir, <4 x i32> %tdescr)
213  %r = bitcast <4 x i32> %v to <4 x float>
214  ret <4 x float> %r
215}
216