1; RUN: llc -mtriple armv7a--none-eabi < %s -enable-ipra | FileCheck %s
2
3; A linkone_odr function (the same applies to available_externally, linkonce,
4; weak, common, extern_weak and weak_odr) could be replaced with a
5; differently-compiled version of the same source at link time, which might use
6; different registers, so we can't do IPRA on it.
7define linkonce_odr void @leaf_linkonce_odr() {
8entry:
9  ret void
10}
11define void @test_linkonce_odr() {
12; CHECK-LABEL: test_linkonce_odr:
13entry:
14; CHECK: ASM1: r3
15; CHECK: mov   [[TEMP:r[0-9]+]], r3
16; CHECK: bl    leaf_linkonce_odr
17; CHECK: mov   r3, [[TEMP]]
18; CHECK: ASM2: r3
19  %0 = tail call i32 asm sideeffect "// ASM1: $0", "={r3},0"(i32 undef)
20  tail call void @leaf_linkonce_odr()
21  %1 = tail call i32 asm sideeffect "// ASM2: $0", "={r3},0"(i32 %0)
22  ret void
23}
24
25; This function has external linkage (the same applies to private, internal and
26; appending), so the version we see here is guaranteed to be the version
27; selected by the linker, so we can do IPRA.
28define external void @leaf_external() {
29entry:
30  ret void
31}
32define void @test_external() {
33; CHECK-LABEL: test_external:
34entry:
35; CHECK: ASM1: r3
36; CHECK-NOT:   r3
37; CHECK: bl    leaf_external
38; CHECK-NOT:   r3
39; CHECK: ASM2: r3
40  %0 = tail call i32 asm sideeffect "// ASM1: $0", "={r3},0"(i32 undef)
41  tail call void @leaf_external()
42  %1 = tail call i32 asm sideeffect "// ASM2: $0", "={r3},0"(i32 %0)
43  ret void
44}
45