1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:     -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4; RUN: FileCheck %s --check-prefix=CHECK-P8
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
6; RUN:     -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
7; RUN: FileCheck %s --check-prefix=CHECK-P9
8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
9; RUN:     -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
10; RUN: FileCheck %s --check-prefix=CHECK-BE
11
12define i32 @test2elt(<2 x double> %a) local_unnamed_addr #0 {
13; CHECK-P8-LABEL: test2elt:
14; CHECK-P8:       # %bb.0: # %entry
15; CHECK-P8-NEXT:    xxswapd vs0, v2
16; CHECK-P8-NEXT:    xscvdpsxws f1, v2
17; CHECK-P8-NEXT:    xscvdpsxws f0, f0
18; CHECK-P8-NEXT:    mffprwz r3, f1
19; CHECK-P8-NEXT:    mtvsrd v2, r3
20; CHECK-P8-NEXT:    mffprwz r4, f0
21; CHECK-P8-NEXT:    mtvsrd v3, r4
22; CHECK-P8-NEXT:    vmrghh v2, v2, v3
23; CHECK-P8-NEXT:    xxswapd vs0, v2
24; CHECK-P8-NEXT:    mffprwz r3, f0
25; CHECK-P8-NEXT:    blr
26;
27; CHECK-P9-LABEL: test2elt:
28; CHECK-P9:       # %bb.0: # %entry
29; CHECK-P9-NEXT:    xscvdpsxws f0, v2
30; CHECK-P9-NEXT:    mffprwz r3, f0
31; CHECK-P9-NEXT:    xxswapd vs0, v2
32; CHECK-P9-NEXT:    mtvsrd v3, r3
33; CHECK-P9-NEXT:    xscvdpsxws f0, f0
34; CHECK-P9-NEXT:    mffprwz r3, f0
35; CHECK-P9-NEXT:    mtvsrd v2, r3
36; CHECK-P9-NEXT:    li r3, 0
37; CHECK-P9-NEXT:    vmrghh v2, v3, v2
38; CHECK-P9-NEXT:    vextuwrx r3, r3, v2
39; CHECK-P9-NEXT:    blr
40;
41; CHECK-BE-LABEL: test2elt:
42; CHECK-BE:       # %bb.0: # %entry
43; CHECK-BE-NEXT:    xscvdpsxws f0, v2
44; CHECK-BE-NEXT:    addis r3, r2, .LCPI0_0@toc@ha
45; CHECK-BE-NEXT:    addi r3, r3, .LCPI0_0@toc@l
46; CHECK-BE-NEXT:    lxv v3, 0(r3)
47; CHECK-BE-NEXT:    mffprwz r3, f0
48; CHECK-BE-NEXT:    xxswapd vs0, v2
49; CHECK-BE-NEXT:    mtvsrwz v4, r3
50; CHECK-BE-NEXT:    xscvdpsxws f0, f0
51; CHECK-BE-NEXT:    mffprwz r3, f0
52; CHECK-BE-NEXT:    mtvsrwz v2, r3
53; CHECK-BE-NEXT:    li r3, 0
54; CHECK-BE-NEXT:    vperm v2, v4, v2, v3
55; CHECK-BE-NEXT:    vextuwlx r3, r3, v2
56; CHECK-BE-NEXT:    blr
57entry:
58  %0 = fptoui <2 x double> %a to <2 x i16>
59  %1 = bitcast <2 x i16> %0 to i32
60  ret i32 %1
61}
62
63define i64 @test4elt(<4 x double>* nocapture readonly) local_unnamed_addr #1 {
64; CHECK-P8-LABEL: test4elt:
65; CHECK-P8:       # %bb.0: # %entry
66; CHECK-P8-NEXT:    li r4, 16
67; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
68; CHECK-P8-NEXT:    lxvd2x vs1, r3, r4
69; CHECK-P8-NEXT:    xscvdpsxws f2, f0
70; CHECK-P8-NEXT:    xxswapd vs0, vs0
71; CHECK-P8-NEXT:    xscvdpsxws f3, f1
72; CHECK-P8-NEXT:    xxswapd vs1, vs1
73; CHECK-P8-NEXT:    xscvdpsxws f0, f0
74; CHECK-P8-NEXT:    xscvdpsxws f1, f1
75; CHECK-P8-NEXT:    mffprwz r3, f2
76; CHECK-P8-NEXT:    mffprwz r4, f3
77; CHECK-P8-NEXT:    mtvsrd v2, r3
78; CHECK-P8-NEXT:    mtvsrd v3, r4
79; CHECK-P8-NEXT:    mffprwz r3, f0
80; CHECK-P8-NEXT:    mffprwz r4, f1
81; CHECK-P8-NEXT:    mtvsrd v4, r3
82; CHECK-P8-NEXT:    mtvsrd v5, r4
83; CHECK-P8-NEXT:    vmrghh v2, v4, v2
84; CHECK-P8-NEXT:    vmrghh v3, v5, v3
85; CHECK-P8-NEXT:    vmrglw v2, v3, v2
86; CHECK-P8-NEXT:    xxswapd vs0, v2
87; CHECK-P8-NEXT:    mffprd r3, f0
88; CHECK-P8-NEXT:    blr
89;
90; CHECK-P9-LABEL: test4elt:
91; CHECK-P9:       # %bb.0: # %entry
92; CHECK-P9-NEXT:    lxv vs1, 0(r3)
93; CHECK-P9-NEXT:    lxv vs0, 16(r3)
94; CHECK-P9-NEXT:    xscvdpsxws f2, f1
95; CHECK-P9-NEXT:    xxswapd vs1, vs1
96; CHECK-P9-NEXT:    xscvdpsxws f1, f1
97; CHECK-P9-NEXT:    mffprwz r3, f2
98; CHECK-P9-NEXT:    mtvsrd v2, r3
99; CHECK-P9-NEXT:    mffprwz r3, f1
100; CHECK-P9-NEXT:    xscvdpsxws f1, f0
101; CHECK-P9-NEXT:    xxswapd vs0, vs0
102; CHECK-P9-NEXT:    mtvsrd v3, r3
103; CHECK-P9-NEXT:    xscvdpsxws f0, f0
104; CHECK-P9-NEXT:    vmrghh v2, v2, v3
105; CHECK-P9-NEXT:    mffprwz r3, f1
106; CHECK-P9-NEXT:    mtvsrd v3, r3
107; CHECK-P9-NEXT:    mffprwz r3, f0
108; CHECK-P9-NEXT:    mtvsrd v4, r3
109; CHECK-P9-NEXT:    vmrghh v3, v3, v4
110; CHECK-P9-NEXT:    vmrglw v2, v3, v2
111; CHECK-P9-NEXT:    mfvsrld r3, v2
112; CHECK-P9-NEXT:    blr
113;
114; CHECK-BE-LABEL: test4elt:
115; CHECK-BE:       # %bb.0: # %entry
116; CHECK-BE-NEXT:    lxv vs1, 16(r3)
117; CHECK-BE-NEXT:    lxv vs0, 0(r3)
118; CHECK-BE-NEXT:    addis r3, r2, .LCPI1_0@toc@ha
119; CHECK-BE-NEXT:    addi r3, r3, .LCPI1_0@toc@l
120; CHECK-BE-NEXT:    lxv v2, 0(r3)
121; CHECK-BE-NEXT:    xscvdpsxws f2, f1
122; CHECK-BE-NEXT:    xxswapd vs1, vs1
123; CHECK-BE-NEXT:    xscvdpsxws f1, f1
124; CHECK-BE-NEXT:    mffprwz r3, f2
125; CHECK-BE-NEXT:    mtvsrwz v3, r3
126; CHECK-BE-NEXT:    mffprwz r3, f1
127; CHECK-BE-NEXT:    xscvdpsxws f1, f0
128; CHECK-BE-NEXT:    xxswapd vs0, vs0
129; CHECK-BE-NEXT:    mtvsrwz v4, r3
130; CHECK-BE-NEXT:    xscvdpsxws f0, f0
131; CHECK-BE-NEXT:    vperm v3, v3, v4, v2
132; CHECK-BE-NEXT:    mffprwz r3, f1
133; CHECK-BE-NEXT:    mtvsrwz v4, r3
134; CHECK-BE-NEXT:    mffprwz r3, f0
135; CHECK-BE-NEXT:    mtvsrwz v5, r3
136; CHECK-BE-NEXT:    vperm v2, v4, v5, v2
137; CHECK-BE-NEXT:    vmrghw v2, v2, v3
138; CHECK-BE-NEXT:    mfvsrd r3, v2
139; CHECK-BE-NEXT:    blr
140entry:
141  %a = load <4 x double>, <4 x double>* %0, align 32
142  %1 = fptoui <4 x double> %a to <4 x i16>
143  %2 = bitcast <4 x i16> %1 to i64
144  ret i64 %2
145}
146
147define <8 x i16> @test8elt(<8 x double>* nocapture readonly) local_unnamed_addr #2 {
148; CHECK-P8-LABEL: test8elt:
149; CHECK-P8:       # %bb.0: # %entry
150; CHECK-P8-NEXT:    li r4, 16
151; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
152; CHECK-P8-NEXT:    lxvd2x vs1, r3, r4
153; CHECK-P8-NEXT:    li r4, 32
154; CHECK-P8-NEXT:    lxvd2x vs2, r3, r4
155; CHECK-P8-NEXT:    li r4, 48
156; CHECK-P8-NEXT:    lxvd2x vs3, r3, r4
157; CHECK-P8-NEXT:    xscvdpsxws f4, f0
158; CHECK-P8-NEXT:    xxswapd vs0, vs0
159; CHECK-P8-NEXT:    xscvdpsxws f5, f1
160; CHECK-P8-NEXT:    xxswapd vs1, vs1
161; CHECK-P8-NEXT:    xscvdpsxws f6, f2
162; CHECK-P8-NEXT:    xxswapd vs2, vs2
163; CHECK-P8-NEXT:    xscvdpsxws f7, f3
164; CHECK-P8-NEXT:    xxswapd vs3, vs3
165; CHECK-P8-NEXT:    xscvdpsxws f0, f0
166; CHECK-P8-NEXT:    xscvdpsxws f1, f1
167; CHECK-P8-NEXT:    xscvdpsxws f2, f2
168; CHECK-P8-NEXT:    xscvdpsxws f3, f3
169; CHECK-P8-NEXT:    mffprwz r3, f4
170; CHECK-P8-NEXT:    mffprwz r4, f5
171; CHECK-P8-NEXT:    mtvsrd v2, r3
172; CHECK-P8-NEXT:    mffprwz r3, f6
173; CHECK-P8-NEXT:    mtvsrd v3, r4
174; CHECK-P8-NEXT:    mffprwz r4, f7
175; CHECK-P8-NEXT:    mtvsrd v4, r3
176; CHECK-P8-NEXT:    mtvsrd v5, r4
177; CHECK-P8-NEXT:    mffprwz r3, f0
178; CHECK-P8-NEXT:    mffprwz r4, f1
179; CHECK-P8-NEXT:    mtvsrd v0, r3
180; CHECK-P8-NEXT:    mtvsrd v1, r4
181; CHECK-P8-NEXT:    mffprwz r3, f2
182; CHECK-P8-NEXT:    mffprwz r4, f3
183; CHECK-P8-NEXT:    vmrghh v2, v0, v2
184; CHECK-P8-NEXT:    vmrghh v3, v1, v3
185; CHECK-P8-NEXT:    mtvsrd v0, r3
186; CHECK-P8-NEXT:    mtvsrd v1, r4
187; CHECK-P8-NEXT:    vmrghh v4, v0, v4
188; CHECK-P8-NEXT:    vmrghh v5, v1, v5
189; CHECK-P8-NEXT:    vmrglw v2, v3, v2
190; CHECK-P8-NEXT:    vmrglw v3, v5, v4
191; CHECK-P8-NEXT:    xxmrgld v2, v3, v2
192; CHECK-P8-NEXT:    blr
193;
194; CHECK-P9-LABEL: test8elt:
195; CHECK-P9:       # %bb.0: # %entry
196; CHECK-P9-NEXT:    lxv vs3, 0(r3)
197; CHECK-P9-NEXT:    lxv vs2, 16(r3)
198; CHECK-P9-NEXT:    lxv vs0, 48(r3)
199; CHECK-P9-NEXT:    lxv vs1, 32(r3)
200; CHECK-P9-NEXT:    xscvdpsxws f4, f3
201; CHECK-P9-NEXT:    xxswapd vs3, vs3
202; CHECK-P9-NEXT:    xscvdpsxws f3, f3
203; CHECK-P9-NEXT:    mffprwz r3, f4
204; CHECK-P9-NEXT:    mtvsrd v2, r3
205; CHECK-P9-NEXT:    mffprwz r3, f3
206; CHECK-P9-NEXT:    xscvdpsxws f3, f2
207; CHECK-P9-NEXT:    xxswapd vs2, vs2
208; CHECK-P9-NEXT:    mtvsrd v3, r3
209; CHECK-P9-NEXT:    xscvdpsxws f2, f2
210; CHECK-P9-NEXT:    vmrghh v2, v2, v3
211; CHECK-P9-NEXT:    mffprwz r3, f3
212; CHECK-P9-NEXT:    mtvsrd v3, r3
213; CHECK-P9-NEXT:    mffprwz r3, f2
214; CHECK-P9-NEXT:    xscvdpsxws f2, f1
215; CHECK-P9-NEXT:    xxswapd vs1, vs1
216; CHECK-P9-NEXT:    mtvsrd v4, r3
217; CHECK-P9-NEXT:    xscvdpsxws f1, f1
218; CHECK-P9-NEXT:    vmrghh v3, v3, v4
219; CHECK-P9-NEXT:    mffprwz r3, f2
220; CHECK-P9-NEXT:    vmrglw v2, v3, v2
221; CHECK-P9-NEXT:    mtvsrd v3, r3
222; CHECK-P9-NEXT:    mffprwz r3, f1
223; CHECK-P9-NEXT:    xscvdpsxws f1, f0
224; CHECK-P9-NEXT:    xxswapd vs0, vs0
225; CHECK-P9-NEXT:    mtvsrd v4, r3
226; CHECK-P9-NEXT:    xscvdpsxws f0, f0
227; CHECK-P9-NEXT:    vmrghh v3, v3, v4
228; CHECK-P9-NEXT:    mffprwz r3, f1
229; CHECK-P9-NEXT:    mtvsrd v4, r3
230; CHECK-P9-NEXT:    mffprwz r3, f0
231; CHECK-P9-NEXT:    mtvsrd v5, r3
232; CHECK-P9-NEXT:    vmrghh v4, v4, v5
233; CHECK-P9-NEXT:    vmrglw v3, v4, v3
234; CHECK-P9-NEXT:    xxmrgld v2, v3, v2
235; CHECK-P9-NEXT:    blr
236;
237; CHECK-BE-LABEL: test8elt:
238; CHECK-BE:       # %bb.0: # %entry
239; CHECK-BE-NEXT:    lxv vs3, 48(r3)
240; CHECK-BE-NEXT:    lxv vs0, 0(r3)
241; CHECK-BE-NEXT:    lxv vs1, 16(r3)
242; CHECK-BE-NEXT:    lxv vs2, 32(r3)
243; CHECK-BE-NEXT:    addis r3, r2, .LCPI2_0@toc@ha
244; CHECK-BE-NEXT:    addi r3, r3, .LCPI2_0@toc@l
245; CHECK-BE-NEXT:    lxv v2, 0(r3)
246; CHECK-BE-NEXT:    xscvdpsxws f4, f3
247; CHECK-BE-NEXT:    xxswapd vs3, vs3
248; CHECK-BE-NEXT:    xscvdpsxws f3, f3
249; CHECK-BE-NEXT:    mffprwz r3, f4
250; CHECK-BE-NEXT:    mtvsrwz v3, r3
251; CHECK-BE-NEXT:    mffprwz r3, f3
252; CHECK-BE-NEXT:    xscvdpsxws f3, f2
253; CHECK-BE-NEXT:    xxswapd vs2, vs2
254; CHECK-BE-NEXT:    mtvsrwz v4, r3
255; CHECK-BE-NEXT:    xscvdpsxws f2, f2
256; CHECK-BE-NEXT:    vperm v3, v3, v4, v2
257; CHECK-BE-NEXT:    mffprwz r3, f3
258; CHECK-BE-NEXT:    mtvsrwz v4, r3
259; CHECK-BE-NEXT:    mffprwz r3, f2
260; CHECK-BE-NEXT:    xscvdpsxws f2, f1
261; CHECK-BE-NEXT:    xxswapd vs1, vs1
262; CHECK-BE-NEXT:    mtvsrwz v5, r3
263; CHECK-BE-NEXT:    xscvdpsxws f1, f1
264; CHECK-BE-NEXT:    vperm v4, v4, v5, v2
265; CHECK-BE-NEXT:    mffprwz r3, f2
266; CHECK-BE-NEXT:    vmrghw v3, v4, v3
267; CHECK-BE-NEXT:    mtvsrwz v4, r3
268; CHECK-BE-NEXT:    mffprwz r3, f1
269; CHECK-BE-NEXT:    xscvdpsxws f1, f0
270; CHECK-BE-NEXT:    xxswapd vs0, vs0
271; CHECK-BE-NEXT:    mtvsrwz v5, r3
272; CHECK-BE-NEXT:    xscvdpsxws f0, f0
273; CHECK-BE-NEXT:    vperm v4, v4, v5, v2
274; CHECK-BE-NEXT:    mffprwz r3, f1
275; CHECK-BE-NEXT:    mtvsrwz v5, r3
276; CHECK-BE-NEXT:    mffprwz r3, f0
277; CHECK-BE-NEXT:    mtvsrwz v0, r3
278; CHECK-BE-NEXT:    vperm v2, v5, v0, v2
279; CHECK-BE-NEXT:    vmrghw v2, v2, v4
280; CHECK-BE-NEXT:    xxmrghd v2, v2, v3
281; CHECK-BE-NEXT:    blr
282entry:
283  %a = load <8 x double>, <8 x double>* %0, align 64
284  %1 = fptoui <8 x double> %a to <8 x i16>
285  ret <8 x i16> %1
286}
287
288define void @test16elt(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #3 {
289; CHECK-P8-LABEL: test16elt:
290; CHECK-P8:       # %bb.0: # %entry
291; CHECK-P8-NEXT:    li r5, 16
292; CHECK-P8-NEXT:    lxvd2x vs0, 0, r4
293; CHECK-P8-NEXT:    li r6, 32
294; CHECK-P8-NEXT:    li r7, 48
295; CHECK-P8-NEXT:    lxvd2x vs1, r4, r5
296; CHECK-P8-NEXT:    lxvd2x vs2, r4, r6
297; CHECK-P8-NEXT:    li r6, 64
298; CHECK-P8-NEXT:    lxvd2x vs3, r4, r7
299; CHECK-P8-NEXT:    lxvd2x vs5, r4, r6
300; CHECK-P8-NEXT:    li r7, 80
301; CHECK-P8-NEXT:    li r6, 96
302; CHECK-P8-NEXT:    xscvdpsxws f4, f0
303; CHECK-P8-NEXT:    lxvd2x vs7, r4, r7
304; CHECK-P8-NEXT:    lxvd2x vs10, r4, r6
305; CHECK-P8-NEXT:    li r6, 112
306; CHECK-P8-NEXT:    xxswapd vs0, vs0
307; CHECK-P8-NEXT:    xscvdpsxws f6, f1
308; CHECK-P8-NEXT:    xxswapd vs1, vs1
309; CHECK-P8-NEXT:    xscvdpsxws f8, f2
310; CHECK-P8-NEXT:    xxswapd vs2, vs2
311; CHECK-P8-NEXT:    xscvdpsxws f9, f3
312; CHECK-P8-NEXT:    xxswapd vs3, vs3
313; CHECK-P8-NEXT:    xscvdpsxws f11, f5
314; CHECK-P8-NEXT:    xxswapd vs5, vs5
315; CHECK-P8-NEXT:    xscvdpsxws f12, f7
316; CHECK-P8-NEXT:    xxswapd vs7, vs7
317; CHECK-P8-NEXT:    mffprwz r7, f4
318; CHECK-P8-NEXT:    lxvd2x vs4, r4, r6
319; CHECK-P8-NEXT:    mffprwz r4, f6
320; CHECK-P8-NEXT:    xscvdpsxws f13, f10
321; CHECK-P8-NEXT:    mtvsrd v3, r4
322; CHECK-P8-NEXT:    mffprwz r4, f8
323; CHECK-P8-NEXT:    xscvdpsxws f6, f4
324; CHECK-P8-NEXT:    mtvsrd v4, r4
325; CHECK-P8-NEXT:    mffprwz r4, f9
326; CHECK-P8-NEXT:    xscvdpsxws f0, f0
327; CHECK-P8-NEXT:    mtvsrd v5, r4
328; CHECK-P8-NEXT:    mffprwz r4, f11
329; CHECK-P8-NEXT:    xscvdpsxws f1, f1
330; CHECK-P8-NEXT:    mtvsrd v0, r4
331; CHECK-P8-NEXT:    mffprwz r4, f12
332; CHECK-P8-NEXT:    xscvdpsxws f2, f2
333; CHECK-P8-NEXT:    mtvsrd v1, r4
334; CHECK-P8-NEXT:    mffprwz r4, f13
335; CHECK-P8-NEXT:    xscvdpsxws f3, f3
336; CHECK-P8-NEXT:    mtvsrd v6, r4
337; CHECK-P8-NEXT:    mffprwz r4, f6
338; CHECK-P8-NEXT:    xxswapd vs6, vs10
339; CHECK-P8-NEXT:    xscvdpsxws f5, f5
340; CHECK-P8-NEXT:    mtvsrd v7, r4
341; CHECK-P8-NEXT:    mffprwz r4, f0
342; CHECK-P8-NEXT:    xxswapd vs0, vs4
343; CHECK-P8-NEXT:    mtvsrd v2, r7
344; CHECK-P8-NEXT:    mtvsrd v8, r4
345; CHECK-P8-NEXT:    mffprwz r4, f1
346; CHECK-P8-NEXT:    xscvdpsxws f7, f7
347; CHECK-P8-NEXT:    mtvsrd v9, r4
348; CHECK-P8-NEXT:    mffprwz r4, f2
349; CHECK-P8-NEXT:    xscvdpsxws f4, f6
350; CHECK-P8-NEXT:    vmrghh v2, v8, v2
351; CHECK-P8-NEXT:    mtvsrd v8, r4
352; CHECK-P8-NEXT:    mffprwz r4, f3
353; CHECK-P8-NEXT:    xscvdpsxws f0, f0
354; CHECK-P8-NEXT:    vmrghh v3, v9, v3
355; CHECK-P8-NEXT:    mtvsrd v9, r4
356; CHECK-P8-NEXT:    mffprwz r4, f5
357; CHECK-P8-NEXT:    vmrghh v4, v8, v4
358; CHECK-P8-NEXT:    mtvsrd v8, r4
359; CHECK-P8-NEXT:    mffprwz r4, f7
360; CHECK-P8-NEXT:    vmrghh v5, v9, v5
361; CHECK-P8-NEXT:    mtvsrd v9, r4
362; CHECK-P8-NEXT:    mffprwz r4, f4
363; CHECK-P8-NEXT:    vmrghh v0, v8, v0
364; CHECK-P8-NEXT:    mtvsrd v8, r4
365; CHECK-P8-NEXT:    mffprwz r4, f0
366; CHECK-P8-NEXT:    vmrghh v1, v9, v1
367; CHECK-P8-NEXT:    mtvsrd v9, r4
368; CHECK-P8-NEXT:    vmrghh v6, v8, v6
369; CHECK-P8-NEXT:    vmrghh v7, v9, v7
370; CHECK-P8-NEXT:    vmrglw v2, v3, v2
371; CHECK-P8-NEXT:    vmrglw v3, v5, v4
372; CHECK-P8-NEXT:    vmrglw v4, v1, v0
373; CHECK-P8-NEXT:    vmrglw v5, v7, v6
374; CHECK-P8-NEXT:    xxmrgld v2, v3, v2
375; CHECK-P8-NEXT:    stvx v2, 0, r3
376; CHECK-P8-NEXT:    xxmrgld v3, v5, v4
377; CHECK-P8-NEXT:    stvx v3, r3, r5
378; CHECK-P8-NEXT:    blr
379;
380; CHECK-P9-LABEL: test16elt:
381; CHECK-P9:       # %bb.0: # %entry
382; CHECK-P9-NEXT:    lxv vs3, 0(r4)
383; CHECK-P9-NEXT:    lxv vs2, 16(r4)
384; CHECK-P9-NEXT:    lxv vs1, 32(r4)
385; CHECK-P9-NEXT:    lxv vs0, 48(r4)
386; CHECK-P9-NEXT:    xscvdpsxws f4, f3
387; CHECK-P9-NEXT:    xscvdpsxws f5, f2
388; CHECK-P9-NEXT:    xscvdpsxws f6, f1
389; CHECK-P9-NEXT:    xxswapd vs3, vs3
390; CHECK-P9-NEXT:    xscvdpsxws f7, f0
391; CHECK-P9-NEXT:    xxswapd vs2, vs2
392; CHECK-P9-NEXT:    xxswapd vs1, vs1
393; CHECK-P9-NEXT:    xxswapd vs0, vs0
394; CHECK-P9-NEXT:    xscvdpsxws f3, f3
395; CHECK-P9-NEXT:    xscvdpsxws f2, f2
396; CHECK-P9-NEXT:    xscvdpsxws f1, f1
397; CHECK-P9-NEXT:    xscvdpsxws f0, f0
398; CHECK-P9-NEXT:    mffprwz r5, f4
399; CHECK-P9-NEXT:    mtvsrd v2, r5
400; CHECK-P9-NEXT:    mffprwz r5, f5
401; CHECK-P9-NEXT:    mtvsrd v3, r5
402; CHECK-P9-NEXT:    mffprwz r5, f6
403; CHECK-P9-NEXT:    mtvsrd v4, r5
404; CHECK-P9-NEXT:    mffprwz r5, f7
405; CHECK-P9-NEXT:    mtvsrd v5, r5
406; CHECK-P9-NEXT:    mffprwz r5, f3
407; CHECK-P9-NEXT:    lxv vs3, 64(r4)
408; CHECK-P9-NEXT:    mtvsrd v0, r5
409; CHECK-P9-NEXT:    mffprwz r5, f2
410; CHECK-P9-NEXT:    lxv vs2, 80(r4)
411; CHECK-P9-NEXT:    vmrghh v2, v2, v0
412; CHECK-P9-NEXT:    mtvsrd v0, r5
413; CHECK-P9-NEXT:    mffprwz r5, f1
414; CHECK-P9-NEXT:    lxv vs1, 96(r4)
415; CHECK-P9-NEXT:    xscvdpsxws f4, f3
416; CHECK-P9-NEXT:    xxswapd vs3, vs3
417; CHECK-P9-NEXT:    vmrghh v3, v3, v0
418; CHECK-P9-NEXT:    mtvsrd v0, r5
419; CHECK-P9-NEXT:    mffprwz r5, f0
420; CHECK-P9-NEXT:    lxv vs0, 112(r4)
421; CHECK-P9-NEXT:    xscvdpsxws f3, f3
422; CHECK-P9-NEXT:    vmrghh v4, v4, v0
423; CHECK-P9-NEXT:    mtvsrd v0, r5
424; CHECK-P9-NEXT:    vmrglw v2, v3, v2
425; CHECK-P9-NEXT:    vmrghh v5, v5, v0
426; CHECK-P9-NEXT:    mffprwz r4, f4
427; CHECK-P9-NEXT:    vmrglw v4, v5, v4
428; CHECK-P9-NEXT:    mtvsrd v3, r4
429; CHECK-P9-NEXT:    mffprwz r4, f3
430; CHECK-P9-NEXT:    xscvdpsxws f3, f2
431; CHECK-P9-NEXT:    xxswapd vs2, vs2
432; CHECK-P9-NEXT:    xxmrgld vs4, v4, v2
433; CHECK-P9-NEXT:    mtvsrd v2, r4
434; CHECK-P9-NEXT:    xscvdpsxws f2, f2
435; CHECK-P9-NEXT:    vmrghh v2, v3, v2
436; CHECK-P9-NEXT:    stxv vs4, 0(r3)
437; CHECK-P9-NEXT:    mffprwz r4, f3
438; CHECK-P9-NEXT:    mtvsrd v3, r4
439; CHECK-P9-NEXT:    mffprwz r4, f2
440; CHECK-P9-NEXT:    xscvdpsxws f2, f1
441; CHECK-P9-NEXT:    xxswapd vs1, vs1
442; CHECK-P9-NEXT:    mtvsrd v4, r4
443; CHECK-P9-NEXT:    xscvdpsxws f1, f1
444; CHECK-P9-NEXT:    vmrghh v3, v3, v4
445; CHECK-P9-NEXT:    mffprwz r4, f2
446; CHECK-P9-NEXT:    vmrglw v2, v3, v2
447; CHECK-P9-NEXT:    mtvsrd v3, r4
448; CHECK-P9-NEXT:    mffprwz r4, f1
449; CHECK-P9-NEXT:    xscvdpsxws f1, f0
450; CHECK-P9-NEXT:    xxswapd vs0, vs0
451; CHECK-P9-NEXT:    mtvsrd v4, r4
452; CHECK-P9-NEXT:    xscvdpsxws f0, f0
453; CHECK-P9-NEXT:    vmrghh v3, v3, v4
454; CHECK-P9-NEXT:    mffprwz r4, f1
455; CHECK-P9-NEXT:    mtvsrd v4, r4
456; CHECK-P9-NEXT:    mffprwz r4, f0
457; CHECK-P9-NEXT:    mtvsrd v5, r4
458; CHECK-P9-NEXT:    vmrghh v4, v4, v5
459; CHECK-P9-NEXT:    vmrglw v3, v4, v3
460; CHECK-P9-NEXT:    xxmrgld vs0, v3, v2
461; CHECK-P9-NEXT:    stxv vs0, 16(r3)
462; CHECK-P9-NEXT:    blr
463;
464; CHECK-BE-LABEL: test16elt:
465; CHECK-BE:       # %bb.0: # %entry
466; CHECK-BE-NEXT:    lxv vs3, 48(r4)
467; CHECK-BE-NEXT:    lxv vs2, 32(r4)
468; CHECK-BE-NEXT:    lxv vs1, 16(r4)
469; CHECK-BE-NEXT:    lxv vs0, 0(r4)
470; CHECK-BE-NEXT:    addis r5, r2, .LCPI3_0@toc@ha
471; CHECK-BE-NEXT:    addi r5, r5, .LCPI3_0@toc@l
472; CHECK-BE-NEXT:    lxv v2, 0(r5)
473; CHECK-BE-NEXT:    xscvdpsxws f4, f3
474; CHECK-BE-NEXT:    xscvdpsxws f5, f2
475; CHECK-BE-NEXT:    xscvdpsxws f6, f1
476; CHECK-BE-NEXT:    xxswapd vs3, vs3
477; CHECK-BE-NEXT:    xscvdpsxws f7, f0
478; CHECK-BE-NEXT:    xxswapd vs2, vs2
479; CHECK-BE-NEXT:    xxswapd vs1, vs1
480; CHECK-BE-NEXT:    xxswapd vs0, vs0
481; CHECK-BE-NEXT:    xscvdpsxws f3, f3
482; CHECK-BE-NEXT:    xscvdpsxws f2, f2
483; CHECK-BE-NEXT:    xscvdpsxws f1, f1
484; CHECK-BE-NEXT:    xscvdpsxws f0, f0
485; CHECK-BE-NEXT:    mffprwz r5, f4
486; CHECK-BE-NEXT:    mtvsrwz v3, r5
487; CHECK-BE-NEXT:    mffprwz r5, f5
488; CHECK-BE-NEXT:    mtvsrwz v4, r5
489; CHECK-BE-NEXT:    mffprwz r5, f6
490; CHECK-BE-NEXT:    mtvsrwz v5, r5
491; CHECK-BE-NEXT:    mffprwz r5, f7
492; CHECK-BE-NEXT:    mtvsrwz v0, r5
493; CHECK-BE-NEXT:    mffprwz r5, f3
494; CHECK-BE-NEXT:    lxv vs3, 112(r4)
495; CHECK-BE-NEXT:    mtvsrwz v1, r5
496; CHECK-BE-NEXT:    mffprwz r5, f2
497; CHECK-BE-NEXT:    lxv vs2, 96(r4)
498; CHECK-BE-NEXT:    vperm v3, v3, v1, v2
499; CHECK-BE-NEXT:    mtvsrwz v1, r5
500; CHECK-BE-NEXT:    mffprwz r5, f1
501; CHECK-BE-NEXT:    lxv vs1, 80(r4)
502; CHECK-BE-NEXT:    xscvdpsxws f4, f3
503; CHECK-BE-NEXT:    xxswapd vs3, vs3
504; CHECK-BE-NEXT:    vperm v4, v4, v1, v2
505; CHECK-BE-NEXT:    mtvsrwz v1, r5
506; CHECK-BE-NEXT:    mffprwz r5, f0
507; CHECK-BE-NEXT:    lxv vs0, 64(r4)
508; CHECK-BE-NEXT:    xscvdpsxws f3, f3
509; CHECK-BE-NEXT:    vperm v5, v5, v1, v2
510; CHECK-BE-NEXT:    mtvsrwz v1, r5
511; CHECK-BE-NEXT:    vmrghw v3, v4, v3
512; CHECK-BE-NEXT:    vperm v0, v0, v1, v2
513; CHECK-BE-NEXT:    mffprwz r4, f4
514; CHECK-BE-NEXT:    vmrghw v5, v0, v5
515; CHECK-BE-NEXT:    mtvsrwz v4, r4
516; CHECK-BE-NEXT:    mffprwz r4, f3
517; CHECK-BE-NEXT:    xscvdpsxws f3, f2
518; CHECK-BE-NEXT:    xxswapd vs2, vs2
519; CHECK-BE-NEXT:    xxmrghd vs4, v5, v3
520; CHECK-BE-NEXT:    mtvsrwz v3, r4
521; CHECK-BE-NEXT:    xscvdpsxws f2, f2
522; CHECK-BE-NEXT:    vperm v3, v4, v3, v2
523; CHECK-BE-NEXT:    stxv vs4, 0(r3)
524; CHECK-BE-NEXT:    mffprwz r4, f3
525; CHECK-BE-NEXT:    mtvsrwz v4, r4
526; CHECK-BE-NEXT:    mffprwz r4, f2
527; CHECK-BE-NEXT:    xscvdpsxws f2, f1
528; CHECK-BE-NEXT:    xxswapd vs1, vs1
529; CHECK-BE-NEXT:    mtvsrwz v5, r4
530; CHECK-BE-NEXT:    xscvdpsxws f1, f1
531; CHECK-BE-NEXT:    vperm v4, v4, v5, v2
532; CHECK-BE-NEXT:    mffprwz r4, f2
533; CHECK-BE-NEXT:    vmrghw v3, v4, v3
534; CHECK-BE-NEXT:    mtvsrwz v4, r4
535; CHECK-BE-NEXT:    mffprwz r4, f1
536; CHECK-BE-NEXT:    xscvdpsxws f1, f0
537; CHECK-BE-NEXT:    xxswapd vs0, vs0
538; CHECK-BE-NEXT:    mtvsrwz v5, r4
539; CHECK-BE-NEXT:    xscvdpsxws f0, f0
540; CHECK-BE-NEXT:    vperm v4, v4, v5, v2
541; CHECK-BE-NEXT:    mffprwz r4, f1
542; CHECK-BE-NEXT:    mtvsrwz v5, r4
543; CHECK-BE-NEXT:    mffprwz r4, f0
544; CHECK-BE-NEXT:    mtvsrwz v0, r4
545; CHECK-BE-NEXT:    vperm v2, v5, v0, v2
546; CHECK-BE-NEXT:    vmrghw v2, v2, v4
547; CHECK-BE-NEXT:    xxmrghd vs0, v2, v3
548; CHECK-BE-NEXT:    stxv vs0, 16(r3)
549; CHECK-BE-NEXT:    blr
550entry:
551  %a = load <16 x double>, <16 x double>* %0, align 128
552  %1 = fptoui <16 x double> %a to <16 x i16>
553  store <16 x i16> %1, <16 x i16>* %agg.result, align 32
554  ret void
555}
556
557define i32 @test2elt_signed(<2 x double> %a) local_unnamed_addr #0 {
558; CHECK-P8-LABEL: test2elt_signed:
559; CHECK-P8:       # %bb.0: # %entry
560; CHECK-P8-NEXT:    xxswapd vs0, v2
561; CHECK-P8-NEXT:    xscvdpsxws f1, v2
562; CHECK-P8-NEXT:    xscvdpsxws f0, f0
563; CHECK-P8-NEXT:    mffprwz r3, f1
564; CHECK-P8-NEXT:    mtvsrd v2, r3
565; CHECK-P8-NEXT:    mffprwz r4, f0
566; CHECK-P8-NEXT:    mtvsrd v3, r4
567; CHECK-P8-NEXT:    vmrghh v2, v2, v3
568; CHECK-P8-NEXT:    xxswapd vs0, v2
569; CHECK-P8-NEXT:    mffprwz r3, f0
570; CHECK-P8-NEXT:    blr
571;
572; CHECK-P9-LABEL: test2elt_signed:
573; CHECK-P9:       # %bb.0: # %entry
574; CHECK-P9-NEXT:    xscvdpsxws f0, v2
575; CHECK-P9-NEXT:    mffprwz r3, f0
576; CHECK-P9-NEXT:    xxswapd vs0, v2
577; CHECK-P9-NEXT:    mtvsrd v3, r3
578; CHECK-P9-NEXT:    xscvdpsxws f0, f0
579; CHECK-P9-NEXT:    mffprwz r3, f0
580; CHECK-P9-NEXT:    mtvsrd v2, r3
581; CHECK-P9-NEXT:    li r3, 0
582; CHECK-P9-NEXT:    vmrghh v2, v3, v2
583; CHECK-P9-NEXT:    vextuwrx r3, r3, v2
584; CHECK-P9-NEXT:    blr
585;
586; CHECK-BE-LABEL: test2elt_signed:
587; CHECK-BE:       # %bb.0: # %entry
588; CHECK-BE-NEXT:    xscvdpsxws f0, v2
589; CHECK-BE-NEXT:    addis r3, r2, .LCPI4_0@toc@ha
590; CHECK-BE-NEXT:    addi r3, r3, .LCPI4_0@toc@l
591; CHECK-BE-NEXT:    lxv v3, 0(r3)
592; CHECK-BE-NEXT:    mffprwz r3, f0
593; CHECK-BE-NEXT:    xxswapd vs0, v2
594; CHECK-BE-NEXT:    mtvsrwz v4, r3
595; CHECK-BE-NEXT:    xscvdpsxws f0, f0
596; CHECK-BE-NEXT:    mffprwz r3, f0
597; CHECK-BE-NEXT:    mtvsrwz v2, r3
598; CHECK-BE-NEXT:    li r3, 0
599; CHECK-BE-NEXT:    vperm v2, v4, v2, v3
600; CHECK-BE-NEXT:    vextuwlx r3, r3, v2
601; CHECK-BE-NEXT:    blr
602entry:
603  %0 = fptosi <2 x double> %a to <2 x i16>
604  %1 = bitcast <2 x i16> %0 to i32
605  ret i32 %1
606}
607
608define i64 @test4elt_signed(<4 x double>* nocapture readonly) local_unnamed_addr #1 {
609; CHECK-P8-LABEL: test4elt_signed:
610; CHECK-P8:       # %bb.0: # %entry
611; CHECK-P8-NEXT:    li r4, 16
612; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
613; CHECK-P8-NEXT:    lxvd2x vs1, r3, r4
614; CHECK-P8-NEXT:    xscvdpsxws f2, f0
615; CHECK-P8-NEXT:    xxswapd vs0, vs0
616; CHECK-P8-NEXT:    xscvdpsxws f3, f1
617; CHECK-P8-NEXT:    xxswapd vs1, vs1
618; CHECK-P8-NEXT:    xscvdpsxws f0, f0
619; CHECK-P8-NEXT:    xscvdpsxws f1, f1
620; CHECK-P8-NEXT:    mffprwz r3, f2
621; CHECK-P8-NEXT:    mffprwz r4, f3
622; CHECK-P8-NEXT:    mtvsrd v2, r3
623; CHECK-P8-NEXT:    mtvsrd v3, r4
624; CHECK-P8-NEXT:    mffprwz r3, f0
625; CHECK-P8-NEXT:    mffprwz r4, f1
626; CHECK-P8-NEXT:    mtvsrd v4, r3
627; CHECK-P8-NEXT:    mtvsrd v5, r4
628; CHECK-P8-NEXT:    vmrghh v2, v4, v2
629; CHECK-P8-NEXT:    vmrghh v3, v5, v3
630; CHECK-P8-NEXT:    vmrglw v2, v3, v2
631; CHECK-P8-NEXT:    xxswapd vs0, v2
632; CHECK-P8-NEXT:    mffprd r3, f0
633; CHECK-P8-NEXT:    blr
634;
635; CHECK-P9-LABEL: test4elt_signed:
636; CHECK-P9:       # %bb.0: # %entry
637; CHECK-P9-NEXT:    lxv vs1, 0(r3)
638; CHECK-P9-NEXT:    lxv vs0, 16(r3)
639; CHECK-P9-NEXT:    xscvdpsxws f2, f1
640; CHECK-P9-NEXT:    xxswapd vs1, vs1
641; CHECK-P9-NEXT:    xscvdpsxws f1, f1
642; CHECK-P9-NEXT:    mffprwz r3, f2
643; CHECK-P9-NEXT:    mtvsrd v2, r3
644; CHECK-P9-NEXT:    mffprwz r3, f1
645; CHECK-P9-NEXT:    xscvdpsxws f1, f0
646; CHECK-P9-NEXT:    xxswapd vs0, vs0
647; CHECK-P9-NEXT:    mtvsrd v3, r3
648; CHECK-P9-NEXT:    xscvdpsxws f0, f0
649; CHECK-P9-NEXT:    vmrghh v2, v2, v3
650; CHECK-P9-NEXT:    mffprwz r3, f1
651; CHECK-P9-NEXT:    mtvsrd v3, r3
652; CHECK-P9-NEXT:    mffprwz r3, f0
653; CHECK-P9-NEXT:    mtvsrd v4, r3
654; CHECK-P9-NEXT:    vmrghh v3, v3, v4
655; CHECK-P9-NEXT:    vmrglw v2, v3, v2
656; CHECK-P9-NEXT:    mfvsrld r3, v2
657; CHECK-P9-NEXT:    blr
658;
659; CHECK-BE-LABEL: test4elt_signed:
660; CHECK-BE:       # %bb.0: # %entry
661; CHECK-BE-NEXT:    lxv vs1, 16(r3)
662; CHECK-BE-NEXT:    lxv vs0, 0(r3)
663; CHECK-BE-NEXT:    addis r3, r2, .LCPI5_0@toc@ha
664; CHECK-BE-NEXT:    addi r3, r3, .LCPI5_0@toc@l
665; CHECK-BE-NEXT:    lxv v2, 0(r3)
666; CHECK-BE-NEXT:    xscvdpsxws f2, f1
667; CHECK-BE-NEXT:    xxswapd vs1, vs1
668; CHECK-BE-NEXT:    xscvdpsxws f1, f1
669; CHECK-BE-NEXT:    mffprwz r3, f2
670; CHECK-BE-NEXT:    mtvsrwz v3, r3
671; CHECK-BE-NEXT:    mffprwz r3, f1
672; CHECK-BE-NEXT:    xscvdpsxws f1, f0
673; CHECK-BE-NEXT:    xxswapd vs0, vs0
674; CHECK-BE-NEXT:    mtvsrwz v4, r3
675; CHECK-BE-NEXT:    xscvdpsxws f0, f0
676; CHECK-BE-NEXT:    vperm v3, v3, v4, v2
677; CHECK-BE-NEXT:    mffprwz r3, f1
678; CHECK-BE-NEXT:    mtvsrwz v4, r3
679; CHECK-BE-NEXT:    mffprwz r3, f0
680; CHECK-BE-NEXT:    mtvsrwz v5, r3
681; CHECK-BE-NEXT:    vperm v2, v4, v5, v2
682; CHECK-BE-NEXT:    vmrghw v2, v2, v3
683; CHECK-BE-NEXT:    mfvsrd r3, v2
684; CHECK-BE-NEXT:    blr
685entry:
686  %a = load <4 x double>, <4 x double>* %0, align 32
687  %1 = fptosi <4 x double> %a to <4 x i16>
688  %2 = bitcast <4 x i16> %1 to i64
689  ret i64 %2
690}
691
692define <8 x i16> @test8elt_signed(<8 x double>* nocapture readonly) local_unnamed_addr #2 {
693; CHECK-P8-LABEL: test8elt_signed:
694; CHECK-P8:       # %bb.0: # %entry
695; CHECK-P8-NEXT:    li r4, 16
696; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
697; CHECK-P8-NEXT:    lxvd2x vs1, r3, r4
698; CHECK-P8-NEXT:    li r4, 32
699; CHECK-P8-NEXT:    lxvd2x vs2, r3, r4
700; CHECK-P8-NEXT:    li r4, 48
701; CHECK-P8-NEXT:    lxvd2x vs3, r3, r4
702; CHECK-P8-NEXT:    xscvdpsxws f4, f0
703; CHECK-P8-NEXT:    xxswapd vs0, vs0
704; CHECK-P8-NEXT:    xscvdpsxws f5, f1
705; CHECK-P8-NEXT:    xxswapd vs1, vs1
706; CHECK-P8-NEXT:    xscvdpsxws f6, f2
707; CHECK-P8-NEXT:    xxswapd vs2, vs2
708; CHECK-P8-NEXT:    xscvdpsxws f7, f3
709; CHECK-P8-NEXT:    xxswapd vs3, vs3
710; CHECK-P8-NEXT:    xscvdpsxws f0, f0
711; CHECK-P8-NEXT:    xscvdpsxws f1, f1
712; CHECK-P8-NEXT:    xscvdpsxws f2, f2
713; CHECK-P8-NEXT:    xscvdpsxws f3, f3
714; CHECK-P8-NEXT:    mffprwz r3, f4
715; CHECK-P8-NEXT:    mffprwz r4, f5
716; CHECK-P8-NEXT:    mtvsrd v2, r3
717; CHECK-P8-NEXT:    mffprwz r3, f6
718; CHECK-P8-NEXT:    mtvsrd v3, r4
719; CHECK-P8-NEXT:    mffprwz r4, f7
720; CHECK-P8-NEXT:    mtvsrd v4, r3
721; CHECK-P8-NEXT:    mtvsrd v5, r4
722; CHECK-P8-NEXT:    mffprwz r3, f0
723; CHECK-P8-NEXT:    mffprwz r4, f1
724; CHECK-P8-NEXT:    mtvsrd v0, r3
725; CHECK-P8-NEXT:    mtvsrd v1, r4
726; CHECK-P8-NEXT:    mffprwz r3, f2
727; CHECK-P8-NEXT:    mffprwz r4, f3
728; CHECK-P8-NEXT:    vmrghh v2, v0, v2
729; CHECK-P8-NEXT:    vmrghh v3, v1, v3
730; CHECK-P8-NEXT:    mtvsrd v0, r3
731; CHECK-P8-NEXT:    mtvsrd v1, r4
732; CHECK-P8-NEXT:    vmrghh v4, v0, v4
733; CHECK-P8-NEXT:    vmrghh v5, v1, v5
734; CHECK-P8-NEXT:    vmrglw v2, v3, v2
735; CHECK-P8-NEXT:    vmrglw v3, v5, v4
736; CHECK-P8-NEXT:    xxmrgld v2, v3, v2
737; CHECK-P8-NEXT:    blr
738;
739; CHECK-P9-LABEL: test8elt_signed:
740; CHECK-P9:       # %bb.0: # %entry
741; CHECK-P9-NEXT:    lxv vs3, 0(r3)
742; CHECK-P9-NEXT:    lxv vs2, 16(r3)
743; CHECK-P9-NEXT:    lxv vs0, 48(r3)
744; CHECK-P9-NEXT:    lxv vs1, 32(r3)
745; CHECK-P9-NEXT:    xscvdpsxws f4, f3
746; CHECK-P9-NEXT:    xxswapd vs3, vs3
747; CHECK-P9-NEXT:    xscvdpsxws f3, f3
748; CHECK-P9-NEXT:    mffprwz r3, f4
749; CHECK-P9-NEXT:    mtvsrd v2, r3
750; CHECK-P9-NEXT:    mffprwz r3, f3
751; CHECK-P9-NEXT:    xscvdpsxws f3, f2
752; CHECK-P9-NEXT:    xxswapd vs2, vs2
753; CHECK-P9-NEXT:    mtvsrd v3, r3
754; CHECK-P9-NEXT:    xscvdpsxws f2, f2
755; CHECK-P9-NEXT:    vmrghh v2, v2, v3
756; CHECK-P9-NEXT:    mffprwz r3, f3
757; CHECK-P9-NEXT:    mtvsrd v3, r3
758; CHECK-P9-NEXT:    mffprwz r3, f2
759; CHECK-P9-NEXT:    xscvdpsxws f2, f1
760; CHECK-P9-NEXT:    xxswapd vs1, vs1
761; CHECK-P9-NEXT:    mtvsrd v4, r3
762; CHECK-P9-NEXT:    xscvdpsxws f1, f1
763; CHECK-P9-NEXT:    vmrghh v3, v3, v4
764; CHECK-P9-NEXT:    mffprwz r3, f2
765; CHECK-P9-NEXT:    vmrglw v2, v3, v2
766; CHECK-P9-NEXT:    mtvsrd v3, r3
767; CHECK-P9-NEXT:    mffprwz r3, f1
768; CHECK-P9-NEXT:    xscvdpsxws f1, f0
769; CHECK-P9-NEXT:    xxswapd vs0, vs0
770; CHECK-P9-NEXT:    mtvsrd v4, r3
771; CHECK-P9-NEXT:    xscvdpsxws f0, f0
772; CHECK-P9-NEXT:    vmrghh v3, v3, v4
773; CHECK-P9-NEXT:    mffprwz r3, f1
774; CHECK-P9-NEXT:    mtvsrd v4, r3
775; CHECK-P9-NEXT:    mffprwz r3, f0
776; CHECK-P9-NEXT:    mtvsrd v5, r3
777; CHECK-P9-NEXT:    vmrghh v4, v4, v5
778; CHECK-P9-NEXT:    vmrglw v3, v4, v3
779; CHECK-P9-NEXT:    xxmrgld v2, v3, v2
780; CHECK-P9-NEXT:    blr
781;
782; CHECK-BE-LABEL: test8elt_signed:
783; CHECK-BE:       # %bb.0: # %entry
784; CHECK-BE-NEXT:    lxv vs3, 48(r3)
785; CHECK-BE-NEXT:    lxv vs0, 0(r3)
786; CHECK-BE-NEXT:    lxv vs1, 16(r3)
787; CHECK-BE-NEXT:    lxv vs2, 32(r3)
788; CHECK-BE-NEXT:    addis r3, r2, .LCPI6_0@toc@ha
789; CHECK-BE-NEXT:    addi r3, r3, .LCPI6_0@toc@l
790; CHECK-BE-NEXT:    lxv v2, 0(r3)
791; CHECK-BE-NEXT:    xscvdpsxws f4, f3
792; CHECK-BE-NEXT:    xxswapd vs3, vs3
793; CHECK-BE-NEXT:    xscvdpsxws f3, f3
794; CHECK-BE-NEXT:    mffprwz r3, f4
795; CHECK-BE-NEXT:    mtvsrwz v3, r3
796; CHECK-BE-NEXT:    mffprwz r3, f3
797; CHECK-BE-NEXT:    xscvdpsxws f3, f2
798; CHECK-BE-NEXT:    xxswapd vs2, vs2
799; CHECK-BE-NEXT:    mtvsrwz v4, r3
800; CHECK-BE-NEXT:    xscvdpsxws f2, f2
801; CHECK-BE-NEXT:    vperm v3, v3, v4, v2
802; CHECK-BE-NEXT:    mffprwz r3, f3
803; CHECK-BE-NEXT:    mtvsrwz v4, r3
804; CHECK-BE-NEXT:    mffprwz r3, f2
805; CHECK-BE-NEXT:    xscvdpsxws f2, f1
806; CHECK-BE-NEXT:    xxswapd vs1, vs1
807; CHECK-BE-NEXT:    mtvsrwz v5, r3
808; CHECK-BE-NEXT:    xscvdpsxws f1, f1
809; CHECK-BE-NEXT:    vperm v4, v4, v5, v2
810; CHECK-BE-NEXT:    mffprwz r3, f2
811; CHECK-BE-NEXT:    vmrghw v3, v4, v3
812; CHECK-BE-NEXT:    mtvsrwz v4, r3
813; CHECK-BE-NEXT:    mffprwz r3, f1
814; CHECK-BE-NEXT:    xscvdpsxws f1, f0
815; CHECK-BE-NEXT:    xxswapd vs0, vs0
816; CHECK-BE-NEXT:    mtvsrwz v5, r3
817; CHECK-BE-NEXT:    xscvdpsxws f0, f0
818; CHECK-BE-NEXT:    vperm v4, v4, v5, v2
819; CHECK-BE-NEXT:    mffprwz r3, f1
820; CHECK-BE-NEXT:    mtvsrwz v5, r3
821; CHECK-BE-NEXT:    mffprwz r3, f0
822; CHECK-BE-NEXT:    mtvsrwz v0, r3
823; CHECK-BE-NEXT:    vperm v2, v5, v0, v2
824; CHECK-BE-NEXT:    vmrghw v2, v2, v4
825; CHECK-BE-NEXT:    xxmrghd v2, v2, v3
826; CHECK-BE-NEXT:    blr
827entry:
828  %a = load <8 x double>, <8 x double>* %0, align 64
829  %1 = fptosi <8 x double> %a to <8 x i16>
830  ret <8 x i16> %1
831}
832
833define void @test16elt_signed(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #3 {
834; CHECK-P8-LABEL: test16elt_signed:
835; CHECK-P8:       # %bb.0: # %entry
836; CHECK-P8-NEXT:    li r5, 16
837; CHECK-P8-NEXT:    lxvd2x vs0, 0, r4
838; CHECK-P8-NEXT:    li r6, 32
839; CHECK-P8-NEXT:    li r7, 48
840; CHECK-P8-NEXT:    lxvd2x vs1, r4, r5
841; CHECK-P8-NEXT:    lxvd2x vs2, r4, r6
842; CHECK-P8-NEXT:    li r6, 64
843; CHECK-P8-NEXT:    lxvd2x vs3, r4, r7
844; CHECK-P8-NEXT:    lxvd2x vs5, r4, r6
845; CHECK-P8-NEXT:    li r7, 80
846; CHECK-P8-NEXT:    li r6, 96
847; CHECK-P8-NEXT:    xscvdpsxws f4, f0
848; CHECK-P8-NEXT:    lxvd2x vs7, r4, r7
849; CHECK-P8-NEXT:    lxvd2x vs10, r4, r6
850; CHECK-P8-NEXT:    li r6, 112
851; CHECK-P8-NEXT:    xxswapd vs0, vs0
852; CHECK-P8-NEXT:    xscvdpsxws f6, f1
853; CHECK-P8-NEXT:    xxswapd vs1, vs1
854; CHECK-P8-NEXT:    xscvdpsxws f8, f2
855; CHECK-P8-NEXT:    xxswapd vs2, vs2
856; CHECK-P8-NEXT:    xscvdpsxws f9, f3
857; CHECK-P8-NEXT:    xxswapd vs3, vs3
858; CHECK-P8-NEXT:    xscvdpsxws f11, f5
859; CHECK-P8-NEXT:    xxswapd vs5, vs5
860; CHECK-P8-NEXT:    xscvdpsxws f12, f7
861; CHECK-P8-NEXT:    xxswapd vs7, vs7
862; CHECK-P8-NEXT:    mffprwz r7, f4
863; CHECK-P8-NEXT:    lxvd2x vs4, r4, r6
864; CHECK-P8-NEXT:    mffprwz r4, f6
865; CHECK-P8-NEXT:    xscvdpsxws f13, f10
866; CHECK-P8-NEXT:    mtvsrd v3, r4
867; CHECK-P8-NEXT:    mffprwz r4, f8
868; CHECK-P8-NEXT:    xscvdpsxws f6, f4
869; CHECK-P8-NEXT:    mtvsrd v4, r4
870; CHECK-P8-NEXT:    mffprwz r4, f9
871; CHECK-P8-NEXT:    xscvdpsxws f0, f0
872; CHECK-P8-NEXT:    mtvsrd v5, r4
873; CHECK-P8-NEXT:    mffprwz r4, f11
874; CHECK-P8-NEXT:    xscvdpsxws f1, f1
875; CHECK-P8-NEXT:    mtvsrd v0, r4
876; CHECK-P8-NEXT:    mffprwz r4, f12
877; CHECK-P8-NEXT:    xscvdpsxws f2, f2
878; CHECK-P8-NEXT:    mtvsrd v1, r4
879; CHECK-P8-NEXT:    mffprwz r4, f13
880; CHECK-P8-NEXT:    xscvdpsxws f3, f3
881; CHECK-P8-NEXT:    mtvsrd v6, r4
882; CHECK-P8-NEXT:    mffprwz r4, f6
883; CHECK-P8-NEXT:    xxswapd vs6, vs10
884; CHECK-P8-NEXT:    xscvdpsxws f5, f5
885; CHECK-P8-NEXT:    mtvsrd v7, r4
886; CHECK-P8-NEXT:    mffprwz r4, f0
887; CHECK-P8-NEXT:    xxswapd vs0, vs4
888; CHECK-P8-NEXT:    mtvsrd v2, r7
889; CHECK-P8-NEXT:    mtvsrd v8, r4
890; CHECK-P8-NEXT:    mffprwz r4, f1
891; CHECK-P8-NEXT:    xscvdpsxws f7, f7
892; CHECK-P8-NEXT:    mtvsrd v9, r4
893; CHECK-P8-NEXT:    mffprwz r4, f2
894; CHECK-P8-NEXT:    xscvdpsxws f4, f6
895; CHECK-P8-NEXT:    vmrghh v2, v8, v2
896; CHECK-P8-NEXT:    mtvsrd v8, r4
897; CHECK-P8-NEXT:    mffprwz r4, f3
898; CHECK-P8-NEXT:    xscvdpsxws f0, f0
899; CHECK-P8-NEXT:    vmrghh v3, v9, v3
900; CHECK-P8-NEXT:    mtvsrd v9, r4
901; CHECK-P8-NEXT:    mffprwz r4, f5
902; CHECK-P8-NEXT:    vmrghh v4, v8, v4
903; CHECK-P8-NEXT:    mtvsrd v8, r4
904; CHECK-P8-NEXT:    mffprwz r4, f7
905; CHECK-P8-NEXT:    vmrghh v5, v9, v5
906; CHECK-P8-NEXT:    mtvsrd v9, r4
907; CHECK-P8-NEXT:    mffprwz r4, f4
908; CHECK-P8-NEXT:    vmrghh v0, v8, v0
909; CHECK-P8-NEXT:    mtvsrd v8, r4
910; CHECK-P8-NEXT:    mffprwz r4, f0
911; CHECK-P8-NEXT:    vmrghh v1, v9, v1
912; CHECK-P8-NEXT:    mtvsrd v9, r4
913; CHECK-P8-NEXT:    vmrghh v6, v8, v6
914; CHECK-P8-NEXT:    vmrghh v7, v9, v7
915; CHECK-P8-NEXT:    vmrglw v2, v3, v2
916; CHECK-P8-NEXT:    vmrglw v3, v5, v4
917; CHECK-P8-NEXT:    vmrglw v4, v1, v0
918; CHECK-P8-NEXT:    vmrglw v5, v7, v6
919; CHECK-P8-NEXT:    xxmrgld v2, v3, v2
920; CHECK-P8-NEXT:    stvx v2, 0, r3
921; CHECK-P8-NEXT:    xxmrgld v3, v5, v4
922; CHECK-P8-NEXT:    stvx v3, r3, r5
923; CHECK-P8-NEXT:    blr
924;
925; CHECK-P9-LABEL: test16elt_signed:
926; CHECK-P9:       # %bb.0: # %entry
927; CHECK-P9-NEXT:    lxv vs3, 0(r4)
928; CHECK-P9-NEXT:    lxv vs2, 16(r4)
929; CHECK-P9-NEXT:    lxv vs1, 32(r4)
930; CHECK-P9-NEXT:    lxv vs0, 48(r4)
931; CHECK-P9-NEXT:    xscvdpsxws f4, f3
932; CHECK-P9-NEXT:    xscvdpsxws f5, f2
933; CHECK-P9-NEXT:    xscvdpsxws f6, f1
934; CHECK-P9-NEXT:    xxswapd vs3, vs3
935; CHECK-P9-NEXT:    xscvdpsxws f7, f0
936; CHECK-P9-NEXT:    xxswapd vs2, vs2
937; CHECK-P9-NEXT:    xxswapd vs1, vs1
938; CHECK-P9-NEXT:    xxswapd vs0, vs0
939; CHECK-P9-NEXT:    xscvdpsxws f3, f3
940; CHECK-P9-NEXT:    xscvdpsxws f2, f2
941; CHECK-P9-NEXT:    xscvdpsxws f1, f1
942; CHECK-P9-NEXT:    xscvdpsxws f0, f0
943; CHECK-P9-NEXT:    mffprwz r5, f4
944; CHECK-P9-NEXT:    mtvsrd v2, r5
945; CHECK-P9-NEXT:    mffprwz r5, f5
946; CHECK-P9-NEXT:    mtvsrd v3, r5
947; CHECK-P9-NEXT:    mffprwz r5, f6
948; CHECK-P9-NEXT:    mtvsrd v4, r5
949; CHECK-P9-NEXT:    mffprwz r5, f7
950; CHECK-P9-NEXT:    mtvsrd v5, r5
951; CHECK-P9-NEXT:    mffprwz r5, f3
952; CHECK-P9-NEXT:    lxv vs3, 64(r4)
953; CHECK-P9-NEXT:    mtvsrd v0, r5
954; CHECK-P9-NEXT:    mffprwz r5, f2
955; CHECK-P9-NEXT:    lxv vs2, 80(r4)
956; CHECK-P9-NEXT:    vmrghh v2, v2, v0
957; CHECK-P9-NEXT:    mtvsrd v0, r5
958; CHECK-P9-NEXT:    mffprwz r5, f1
959; CHECK-P9-NEXT:    lxv vs1, 96(r4)
960; CHECK-P9-NEXT:    xscvdpsxws f4, f3
961; CHECK-P9-NEXT:    xxswapd vs3, vs3
962; CHECK-P9-NEXT:    vmrghh v3, v3, v0
963; CHECK-P9-NEXT:    mtvsrd v0, r5
964; CHECK-P9-NEXT:    mffprwz r5, f0
965; CHECK-P9-NEXT:    lxv vs0, 112(r4)
966; CHECK-P9-NEXT:    xscvdpsxws f3, f3
967; CHECK-P9-NEXT:    vmrghh v4, v4, v0
968; CHECK-P9-NEXT:    mtvsrd v0, r5
969; CHECK-P9-NEXT:    vmrglw v2, v3, v2
970; CHECK-P9-NEXT:    vmrghh v5, v5, v0
971; CHECK-P9-NEXT:    mffprwz r4, f4
972; CHECK-P9-NEXT:    vmrglw v4, v5, v4
973; CHECK-P9-NEXT:    mtvsrd v3, r4
974; CHECK-P9-NEXT:    mffprwz r4, f3
975; CHECK-P9-NEXT:    xscvdpsxws f3, f2
976; CHECK-P9-NEXT:    xxswapd vs2, vs2
977; CHECK-P9-NEXT:    xxmrgld vs4, v4, v2
978; CHECK-P9-NEXT:    mtvsrd v2, r4
979; CHECK-P9-NEXT:    xscvdpsxws f2, f2
980; CHECK-P9-NEXT:    vmrghh v2, v3, v2
981; CHECK-P9-NEXT:    stxv vs4, 0(r3)
982; CHECK-P9-NEXT:    mffprwz r4, f3
983; CHECK-P9-NEXT:    mtvsrd v3, r4
984; CHECK-P9-NEXT:    mffprwz r4, f2
985; CHECK-P9-NEXT:    xscvdpsxws f2, f1
986; CHECK-P9-NEXT:    xxswapd vs1, vs1
987; CHECK-P9-NEXT:    mtvsrd v4, r4
988; CHECK-P9-NEXT:    xscvdpsxws f1, f1
989; CHECK-P9-NEXT:    vmrghh v3, v3, v4
990; CHECK-P9-NEXT:    mffprwz r4, f2
991; CHECK-P9-NEXT:    vmrglw v2, v3, v2
992; CHECK-P9-NEXT:    mtvsrd v3, r4
993; CHECK-P9-NEXT:    mffprwz r4, f1
994; CHECK-P9-NEXT:    xscvdpsxws f1, f0
995; CHECK-P9-NEXT:    xxswapd vs0, vs0
996; CHECK-P9-NEXT:    mtvsrd v4, r4
997; CHECK-P9-NEXT:    xscvdpsxws f0, f0
998; CHECK-P9-NEXT:    vmrghh v3, v3, v4
999; CHECK-P9-NEXT:    mffprwz r4, f1
1000; CHECK-P9-NEXT:    mtvsrd v4, r4
1001; CHECK-P9-NEXT:    mffprwz r4, f0
1002; CHECK-P9-NEXT:    mtvsrd v5, r4
1003; CHECK-P9-NEXT:    vmrghh v4, v4, v5
1004; CHECK-P9-NEXT:    vmrglw v3, v4, v3
1005; CHECK-P9-NEXT:    xxmrgld vs0, v3, v2
1006; CHECK-P9-NEXT:    stxv vs0, 16(r3)
1007; CHECK-P9-NEXT:    blr
1008;
1009; CHECK-BE-LABEL: test16elt_signed:
1010; CHECK-BE:       # %bb.0: # %entry
1011; CHECK-BE-NEXT:    lxv vs3, 48(r4)
1012; CHECK-BE-NEXT:    lxv vs2, 32(r4)
1013; CHECK-BE-NEXT:    lxv vs1, 16(r4)
1014; CHECK-BE-NEXT:    lxv vs0, 0(r4)
1015; CHECK-BE-NEXT:    addis r5, r2, .LCPI7_0@toc@ha
1016; CHECK-BE-NEXT:    addi r5, r5, .LCPI7_0@toc@l
1017; CHECK-BE-NEXT:    lxv v2, 0(r5)
1018; CHECK-BE-NEXT:    xscvdpsxws f4, f3
1019; CHECK-BE-NEXT:    xscvdpsxws f5, f2
1020; CHECK-BE-NEXT:    xscvdpsxws f6, f1
1021; CHECK-BE-NEXT:    xxswapd vs3, vs3
1022; CHECK-BE-NEXT:    xscvdpsxws f7, f0
1023; CHECK-BE-NEXT:    xxswapd vs2, vs2
1024; CHECK-BE-NEXT:    xxswapd vs1, vs1
1025; CHECK-BE-NEXT:    xxswapd vs0, vs0
1026; CHECK-BE-NEXT:    xscvdpsxws f3, f3
1027; CHECK-BE-NEXT:    xscvdpsxws f2, f2
1028; CHECK-BE-NEXT:    xscvdpsxws f1, f1
1029; CHECK-BE-NEXT:    xscvdpsxws f0, f0
1030; CHECK-BE-NEXT:    mffprwz r5, f4
1031; CHECK-BE-NEXT:    mtvsrwz v3, r5
1032; CHECK-BE-NEXT:    mffprwz r5, f5
1033; CHECK-BE-NEXT:    mtvsrwz v4, r5
1034; CHECK-BE-NEXT:    mffprwz r5, f6
1035; CHECK-BE-NEXT:    mtvsrwz v5, r5
1036; CHECK-BE-NEXT:    mffprwz r5, f7
1037; CHECK-BE-NEXT:    mtvsrwz v0, r5
1038; CHECK-BE-NEXT:    mffprwz r5, f3
1039; CHECK-BE-NEXT:    lxv vs3, 112(r4)
1040; CHECK-BE-NEXT:    mtvsrwz v1, r5
1041; CHECK-BE-NEXT:    mffprwz r5, f2
1042; CHECK-BE-NEXT:    lxv vs2, 96(r4)
1043; CHECK-BE-NEXT:    vperm v3, v3, v1, v2
1044; CHECK-BE-NEXT:    mtvsrwz v1, r5
1045; CHECK-BE-NEXT:    mffprwz r5, f1
1046; CHECK-BE-NEXT:    lxv vs1, 80(r4)
1047; CHECK-BE-NEXT:    xscvdpsxws f4, f3
1048; CHECK-BE-NEXT:    xxswapd vs3, vs3
1049; CHECK-BE-NEXT:    vperm v4, v4, v1, v2
1050; CHECK-BE-NEXT:    mtvsrwz v1, r5
1051; CHECK-BE-NEXT:    mffprwz r5, f0
1052; CHECK-BE-NEXT:    lxv vs0, 64(r4)
1053; CHECK-BE-NEXT:    xscvdpsxws f3, f3
1054; CHECK-BE-NEXT:    vperm v5, v5, v1, v2
1055; CHECK-BE-NEXT:    mtvsrwz v1, r5
1056; CHECK-BE-NEXT:    vmrghw v3, v4, v3
1057; CHECK-BE-NEXT:    vperm v0, v0, v1, v2
1058; CHECK-BE-NEXT:    mffprwz r4, f4
1059; CHECK-BE-NEXT:    vmrghw v5, v0, v5
1060; CHECK-BE-NEXT:    mtvsrwz v4, r4
1061; CHECK-BE-NEXT:    mffprwz r4, f3
1062; CHECK-BE-NEXT:    xscvdpsxws f3, f2
1063; CHECK-BE-NEXT:    xxswapd vs2, vs2
1064; CHECK-BE-NEXT:    xxmrghd vs4, v5, v3
1065; CHECK-BE-NEXT:    mtvsrwz v3, r4
1066; CHECK-BE-NEXT:    xscvdpsxws f2, f2
1067; CHECK-BE-NEXT:    vperm v3, v4, v3, v2
1068; CHECK-BE-NEXT:    stxv vs4, 0(r3)
1069; CHECK-BE-NEXT:    mffprwz r4, f3
1070; CHECK-BE-NEXT:    mtvsrwz v4, r4
1071; CHECK-BE-NEXT:    mffprwz r4, f2
1072; CHECK-BE-NEXT:    xscvdpsxws f2, f1
1073; CHECK-BE-NEXT:    xxswapd vs1, vs1
1074; CHECK-BE-NEXT:    mtvsrwz v5, r4
1075; CHECK-BE-NEXT:    xscvdpsxws f1, f1
1076; CHECK-BE-NEXT:    vperm v4, v4, v5, v2
1077; CHECK-BE-NEXT:    mffprwz r4, f2
1078; CHECK-BE-NEXT:    vmrghw v3, v4, v3
1079; CHECK-BE-NEXT:    mtvsrwz v4, r4
1080; CHECK-BE-NEXT:    mffprwz r4, f1
1081; CHECK-BE-NEXT:    xscvdpsxws f1, f0
1082; CHECK-BE-NEXT:    xxswapd vs0, vs0
1083; CHECK-BE-NEXT:    mtvsrwz v5, r4
1084; CHECK-BE-NEXT:    xscvdpsxws f0, f0
1085; CHECK-BE-NEXT:    vperm v4, v4, v5, v2
1086; CHECK-BE-NEXT:    mffprwz r4, f1
1087; CHECK-BE-NEXT:    mtvsrwz v5, r4
1088; CHECK-BE-NEXT:    mffprwz r4, f0
1089; CHECK-BE-NEXT:    mtvsrwz v0, r4
1090; CHECK-BE-NEXT:    vperm v2, v5, v0, v2
1091; CHECK-BE-NEXT:    vmrghw v2, v2, v4
1092; CHECK-BE-NEXT:    xxmrghd vs0, v2, v3
1093; CHECK-BE-NEXT:    stxv vs0, 16(r3)
1094; CHECK-BE-NEXT:    blr
1095entry:
1096  %a = load <16 x double>, <16 x double>* %0, align 128
1097  %1 = fptosi <16 x double> %a to <16 x i16>
1098  store <16 x i16> %1, <16 x i16>* %agg.result, align 32
1099  ret void
1100}
1101