1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -loop-unroll -S %s | FileCheck %s 3 4; Loop with multiple exiting blocks, where the header exits but not the latch, 5; e.g. because it has not been rotated. 6define i16 @full_unroll_multiple_exiting_blocks(i16* %A, i16 %x, i16 %y) { 7; CHECK-LABEL: @full_unroll_multiple_exiting_blocks( 8; CHECK-NEXT: entry: 9; CHECK-NEXT: br label [[HEADER:%.*]] 10; CHECK: header: 11; CHECK-NEXT: [[LV:%.*]] = load i16, i16* [[A:%.*]], align 2 12; CHECK-NEXT: [[RES_NEXT:%.*]] = add i16 123, [[LV]] 13; CHECK-NEXT: br label [[EXITING_1:%.*]] 14; CHECK: exiting.1: 15; CHECK-NEXT: [[EC_1:%.*]] = icmp eq i16 [[LV]], [[X:%.*]] 16; CHECK-NEXT: br i1 [[EC_1]], label [[EXIT:%.*]], label [[EXITING_2:%.*]] 17; CHECK: exiting.2: 18; CHECK-NEXT: [[EC_2:%.*]] = icmp eq i16 [[LV]], [[Y:%.*]] 19; CHECK-NEXT: br i1 [[EC_2]], label [[EXIT]], label [[LATCH:%.*]] 20; CHECK: latch: 21; CHECK-NEXT: [[PTR_1:%.*]] = getelementptr inbounds i16, i16* [[A]], i64 1 22; CHECK-NEXT: [[LV_1:%.*]] = load i16, i16* [[PTR_1]], align 2 23; CHECK-NEXT: [[RES_NEXT_1:%.*]] = add i16 [[RES_NEXT]], [[LV_1]] 24; CHECK-NEXT: br label [[EXITING_1_1:%.*]] 25; CHECK: exit: 26; CHECK-NEXT: [[RES_LCSSA:%.*]] = phi i16 [ 0, [[EXITING_1]] ], [ 1, [[EXITING_2]] ], [ 0, [[EXITING_1_1]] ], [ 1, [[EXITING_2_1:%.*]] ], [ 0, [[EXITING_1_2:%.*]] ], [ 1, [[EXITING_2_2:%.*]] ], [ [[RES_NEXT_3:%.*]], [[LATCH_2:%.*]] ], [ 0, [[EXITING_1_3:%.*]] ], [ 1, [[EXITING_2_3:%.*]] ] 27; CHECK-NEXT: ret i16 [[RES_LCSSA]] 28; CHECK: exiting.1.1: 29; CHECK-NEXT: [[EC_1_1:%.*]] = icmp eq i16 [[LV_1]], [[X]] 30; CHECK-NEXT: br i1 [[EC_1_1]], label [[EXIT]], label [[EXITING_2_1]] 31; CHECK: exiting.2.1: 32; CHECK-NEXT: [[EC_2_1:%.*]] = icmp eq i16 [[LV_1]], [[Y]] 33; CHECK-NEXT: br i1 [[EC_2_1]], label [[EXIT]], label [[LATCH_1:%.*]] 34; CHECK: latch.1: 35; CHECK-NEXT: [[PTR_2:%.*]] = getelementptr inbounds i16, i16* [[A]], i64 2 36; CHECK-NEXT: [[LV_2:%.*]] = load i16, i16* [[PTR_2]], align 2 37; CHECK-NEXT: [[RES_NEXT_2:%.*]] = add i16 [[RES_NEXT_1]], [[LV_2]] 38; CHECK-NEXT: br label [[EXITING_1_2]] 39; CHECK: exiting.1.2: 40; CHECK-NEXT: [[EC_1_2:%.*]] = icmp eq i16 [[LV_2]], [[X]] 41; CHECK-NEXT: br i1 [[EC_1_2]], label [[EXIT]], label [[EXITING_2_2]] 42; CHECK: exiting.2.2: 43; CHECK-NEXT: [[EC_2_2:%.*]] = icmp eq i16 [[LV_2]], [[Y]] 44; CHECK-NEXT: br i1 [[EC_2_2]], label [[EXIT]], label [[LATCH_2]] 45; CHECK: latch.2: 46; CHECK-NEXT: [[PTR_3:%.*]] = getelementptr inbounds i16, i16* [[A]], i64 3 47; CHECK-NEXT: [[LV_3:%.*]] = load i16, i16* [[PTR_3]], align 2 48; CHECK-NEXT: [[RES_NEXT_3]] = add i16 [[RES_NEXT_2]], [[LV_3]] 49; CHECK-NEXT: br i1 false, label [[EXITING_1_3]], label [[EXIT]] 50; CHECK: exiting.1.3: 51; CHECK-NEXT: [[EC_1_3:%.*]] = icmp eq i16 [[LV_3]], [[X]] 52; CHECK-NEXT: br i1 [[EC_1_3]], label [[EXIT]], label [[EXITING_2_3]] 53; CHECK: exiting.2.3: 54; CHECK-NEXT: [[EC_2_3:%.*]] = icmp eq i16 [[LV_3]], [[Y]] 55; CHECK-NEXT: br i1 [[EC_2_3]], label [[EXIT]], label [[LATCH_3:%.*]] 56; CHECK: latch.3: 57; CHECK-NEXT: unreachable 58; 59entry: 60 br label %header 61 62header: 63 %res = phi i16 [ 123, %entry ], [ %res.next, %latch ] 64 %i.0 = phi i64 [ 0, %entry ], [ %inc9, %latch ] 65 %ptr = getelementptr inbounds i16, i16* %A, i64 %i.0 66 %lv = load i16, i16* %ptr 67 %res.next = add i16 %res, %lv 68 %cmp = icmp ult i64 %i.0, 3 69 br i1 %cmp, label %exiting.1, label %exit 70 71exiting.1: 72 %ec.1 = icmp eq i16 %lv, %x 73 br i1 %ec.1, label %exit, label %exiting.2 74 75exiting.2: 76 %ec.2 = icmp eq i16 %lv, %y 77 br i1 %ec.2, label %exit, label %latch 78 79latch: 80 %inc9 = add i64 %i.0, 1 81 br label %header 82 83exit: 84 %res.lcssa = phi i16 [ %res.next, %header ], [ 0, %exiting.1 ], [ 1, %exiting.2 ] 85 ret i16 %res.lcssa 86} 87