1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=amdgcn -mcpu=gfx1010 --timeline --iterations=1 --timeline-max-cycles=0 < %s | FileCheck %s 3 4v_log_f32 v0, v0 5v_rcp_f32 v0, v0 6v_rsq_f32 v1, v1 7v_sqrt_f32 v2, v0 8v_rcp_f64 v[0:1], v[0:1] 9v_rsq_f64 v[1:2], v[1:2] 10v_sqrt_f64 v[2:3], v[0:1] 11 12# CHECK: Iterations: 1 13# CHECK-NEXT: Instructions: 7 14# CHECK-NEXT: Total Cycles: 94 15# CHECK-NEXT: Total uOps: 7 16 17# CHECK: Dispatch Width: 1 18# CHECK-NEXT: uOps Per Cycle: 0.07 19# CHECK-NEXT: IPC: 0.07 20# CHECK-NEXT: Block RThroughput: 7.0 21 22# CHECK: Instruction Info: 23# CHECK-NEXT: [1]: #uOps 24# CHECK-NEXT: [2]: Latency 25# CHECK-NEXT: [3]: RThroughput 26# CHECK-NEXT: [4]: MayLoad 27# CHECK-NEXT: [5]: MayStore 28# CHECK-NEXT: [6]: HasSideEffects (U) 29 30# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 31# CHECK-NEXT: 1 10 1.00 U v_log_f32_e32 v0, v0 32# CHECK-NEXT: 1 10 1.00 U v_rcp_f32_e32 v0, v0 33# CHECK-NEXT: 1 10 1.00 U v_rsq_f32_e32 v1, v1 34# CHECK-NEXT: 1 10 1.00 U v_sqrt_f32_e32 v2, v0 35# CHECK-NEXT: 1 24 1.00 U v_rcp_f64_e32 v[0:1], v[0:1] 36# CHECK-NEXT: 1 24 1.00 U v_rsq_f64_e32 v[1:2], v[1:2] 37# CHECK-NEXT: 1 24 1.00 U v_sqrt_f64_e32 v[2:3], v[0:1] 38 39# CHECK: Resources: 40# CHECK-NEXT: [0] - HWBranch 41# CHECK-NEXT: [1] - HWExport 42# CHECK-NEXT: [2] - HWLGKM 43# CHECK-NEXT: [3] - HWRC 44# CHECK-NEXT: [4] - HWSALU 45# CHECK-NEXT: [5] - HWTransVALU 46# CHECK-NEXT: [6] - HWVALU 47# CHECK-NEXT: [7] - HWVMEM 48 49# CHECK: Resource pressure per iteration: 50# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] 51# CHECK-NEXT: - - - 7.00 - 7.00 3.00 - 52 53# CHECK: Resource pressure by instruction: 54# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions: 55# CHECK-NEXT: - - - 1.00 - 1.00 - - v_log_f32_e32 v0, v0 56# CHECK-NEXT: - - - 1.00 - 1.00 - - v_rcp_f32_e32 v0, v0 57# CHECK-NEXT: - - - 1.00 - 1.00 - - v_rsq_f32_e32 v1, v1 58# CHECK-NEXT: - - - 1.00 - 1.00 - - v_sqrt_f32_e32 v2, v0 59# CHECK-NEXT: - - - 1.00 - 1.00 1.00 - v_rcp_f64_e32 v[0:1], v[0:1] 60# CHECK-NEXT: - - - 1.00 - 1.00 1.00 - v_rsq_f64_e32 v[1:2], v[1:2] 61# CHECK-NEXT: - - - 1.00 - 1.00 1.00 - v_sqrt_f64_e32 v[2:3], v[0:1] 62 63# CHECK: Timeline view: 64# CHECK-NEXT: 0123456789 0123456789 0123456789 0123456789 0123 65# CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123456789 0123456789 66 67# CHECK: [0,0] DeeeeeeeeeE . . . . . . . . . . . . . . . . . v_log_f32_e32 v0, v0 68# CHECK-NEXT: [0,1] . . DeeeeeeeeeE . . . . . . . . . . . . . . . v_rcp_f32_e32 v0, v0 69# CHECK-NEXT: [0,2] . . .DeeeeeeeeeE . . . . . . . . . . . . . . . v_rsq_f32_e32 v1, v1 70# CHECK-NEXT: [0,3] . . . . DeeeeeeeeeE . . . . . . . . . . . . . v_sqrt_f32_e32 v2, v0 71# CHECK-NEXT: [0,4] . . . . .DeeeeeeeeeeeeeeeeeeeeeeeE . . . . . . . . . . v_rcp_f64_e32 v[0:1], v[0:1] 72# CHECK-NEXT: [0,5] . . . . . . . . . DeeeeeeeeeeeeeeeeeeeeeeeE. . . . . . v_rsq_f64_e32 v[1:2], v[1:2] 73# CHECK-NEXT: [0,6] . . . . . . . . . . . . . . DeeeeeeeeeeeeeeeeeeeeeeeE v_sqrt_f64_e32 v[2:3], v[0:1] 74 75# CHECK: Average Wait times (based on the timeline view): 76# CHECK-NEXT: [0]: Executions 77# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue 78# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready 79# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage 80 81# CHECK: [0] [1] [2] [3] 82# CHECK-NEXT: 0. 1 0.0 0.0 0.0 v_log_f32_e32 v0, v0 83# CHECK-NEXT: 1. 1 0.0 0.0 0.0 v_rcp_f32_e32 v0, v0 84# CHECK-NEXT: 2. 1 0.0 0.0 0.0 v_rsq_f32_e32 v1, v1 85# CHECK-NEXT: 3. 1 0.0 0.0 0.0 v_sqrt_f32_e32 v2, v0 86# CHECK-NEXT: 4. 1 0.0 0.0 0.0 v_rcp_f64_e32 v[0:1], v[0:1] 87# CHECK-NEXT: 5. 1 0.0 0.0 0.0 v_rsq_f64_e32 v[1:2], v[1:2] 88# CHECK-NEXT: 6. 1 0.0 0.0 0.0 v_sqrt_f64_e32 v[2:3], v[0:1] 89# CHECK-NEXT: 1 0.0 0.0 0.0 <total> 90