1 /* Misc. support for CPU family m32r2f.
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
4
5 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6
7 This file is part of the GNU simulators.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23 */
24
25 #define WANT_CPU m32r2f
26 #define WANT_CPU_M32R2F
27
28 #include "sim-main.h"
29 #include "cgen-ops.h"
30
31 /* Get the value of h-pc. */
32
33 USI
m32r2f_h_pc_get(SIM_CPU * current_cpu)34 m32r2f_h_pc_get (SIM_CPU *current_cpu)
35 {
36 return CPU (h_pc);
37 }
38
39 /* Set a value for h-pc. */
40
41 void
m32r2f_h_pc_set(SIM_CPU * current_cpu,USI newval)42 m32r2f_h_pc_set (SIM_CPU *current_cpu, USI newval)
43 {
44 CPU (h_pc) = newval;
45 }
46
47 /* Get the value of h-gr. */
48
49 SI
m32r2f_h_gr_get(SIM_CPU * current_cpu,UINT regno)50 m32r2f_h_gr_get (SIM_CPU *current_cpu, UINT regno)
51 {
52 return CPU (h_gr[regno]);
53 }
54
55 /* Set a value for h-gr. */
56
57 void
m32r2f_h_gr_set(SIM_CPU * current_cpu,UINT regno,SI newval)58 m32r2f_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
59 {
60 CPU (h_gr[regno]) = newval;
61 }
62
63 /* Get the value of h-cr. */
64
65 USI
m32r2f_h_cr_get(SIM_CPU * current_cpu,UINT regno)66 m32r2f_h_cr_get (SIM_CPU *current_cpu, UINT regno)
67 {
68 return GET_H_CR (regno);
69 }
70
71 /* Set a value for h-cr. */
72
73 void
m32r2f_h_cr_set(SIM_CPU * current_cpu,UINT regno,USI newval)74 m32r2f_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
75 {
76 SET_H_CR (regno, newval);
77 }
78
79 /* Get the value of h-accum. */
80
81 DI
m32r2f_h_accum_get(SIM_CPU * current_cpu)82 m32r2f_h_accum_get (SIM_CPU *current_cpu)
83 {
84 return GET_H_ACCUM ();
85 }
86
87 /* Set a value for h-accum. */
88
89 void
m32r2f_h_accum_set(SIM_CPU * current_cpu,DI newval)90 m32r2f_h_accum_set (SIM_CPU *current_cpu, DI newval)
91 {
92 SET_H_ACCUM (newval);
93 }
94
95 /* Get the value of h-accums. */
96
97 DI
m32r2f_h_accums_get(SIM_CPU * current_cpu,UINT regno)98 m32r2f_h_accums_get (SIM_CPU *current_cpu, UINT regno)
99 {
100 return GET_H_ACCUMS (regno);
101 }
102
103 /* Set a value for h-accums. */
104
105 void
m32r2f_h_accums_set(SIM_CPU * current_cpu,UINT regno,DI newval)106 m32r2f_h_accums_set (SIM_CPU *current_cpu, UINT regno, DI newval)
107 {
108 SET_H_ACCUMS (regno, newval);
109 }
110
111 /* Get the value of h-cond. */
112
113 BI
m32r2f_h_cond_get(SIM_CPU * current_cpu)114 m32r2f_h_cond_get (SIM_CPU *current_cpu)
115 {
116 return CPU (h_cond);
117 }
118
119 /* Set a value for h-cond. */
120
121 void
m32r2f_h_cond_set(SIM_CPU * current_cpu,BI newval)122 m32r2f_h_cond_set (SIM_CPU *current_cpu, BI newval)
123 {
124 CPU (h_cond) = newval;
125 }
126
127 /* Get the value of h-psw. */
128
129 UQI
m32r2f_h_psw_get(SIM_CPU * current_cpu)130 m32r2f_h_psw_get (SIM_CPU *current_cpu)
131 {
132 return GET_H_PSW ();
133 }
134
135 /* Set a value for h-psw. */
136
137 void
m32r2f_h_psw_set(SIM_CPU * current_cpu,UQI newval)138 m32r2f_h_psw_set (SIM_CPU *current_cpu, UQI newval)
139 {
140 SET_H_PSW (newval);
141 }
142
143 /* Get the value of h-bpsw. */
144
145 UQI
m32r2f_h_bpsw_get(SIM_CPU * current_cpu)146 m32r2f_h_bpsw_get (SIM_CPU *current_cpu)
147 {
148 return CPU (h_bpsw);
149 }
150
151 /* Set a value for h-bpsw. */
152
153 void
m32r2f_h_bpsw_set(SIM_CPU * current_cpu,UQI newval)154 m32r2f_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
155 {
156 CPU (h_bpsw) = newval;
157 }
158
159 /* Get the value of h-bbpsw. */
160
161 UQI
m32r2f_h_bbpsw_get(SIM_CPU * current_cpu)162 m32r2f_h_bbpsw_get (SIM_CPU *current_cpu)
163 {
164 return CPU (h_bbpsw);
165 }
166
167 /* Set a value for h-bbpsw. */
168
169 void
m32r2f_h_bbpsw_set(SIM_CPU * current_cpu,UQI newval)170 m32r2f_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
171 {
172 CPU (h_bbpsw) = newval;
173 }
174
175 /* Get the value of h-lock. */
176
177 BI
m32r2f_h_lock_get(SIM_CPU * current_cpu)178 m32r2f_h_lock_get (SIM_CPU *current_cpu)
179 {
180 return CPU (h_lock);
181 }
182
183 /* Set a value for h-lock. */
184
185 void
m32r2f_h_lock_set(SIM_CPU * current_cpu,BI newval)186 m32r2f_h_lock_set (SIM_CPU *current_cpu, BI newval)
187 {
188 CPU (h_lock) = newval;
189 }
190
191 /* Record trace results for INSN. */
192
193 void
m32r2f_record_trace_results(SIM_CPU * current_cpu,CGEN_INSN * insn,int * indices,TRACE_RECORD * tr)194 m32r2f_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
195 int *indices, TRACE_RECORD *tr)
196 {
197 }
198