1/* Linker script for 68HC12 executable (PROM).  */
2ENTRY(_start)
3OUTPUT_FORMAT("elf32-m68hc12", "elf32-m68hc12", "elf32-m68hc12")
4OUTPUT_ARCH(m68hc12)
5
6GROUP(-lc -lbcc -lgcc)
7SEARCH_DIR(.);
8/* Fixed definition of the available memory banks.
9   See generic emulation script for a user defined configuration.  */
10
11/* The memory layout below is suitable for gcc validation.
12   It takes care of big programs allowing up to 48128 bytes
13   of text while allowing some programs that consume some
14   memory (comp-goto-1 requires the RAM to be set to 0x4400
15   to avoid head<->stack collision in malloc/sbrk).  */
16MEMORY
17{
18  page0 (rwx) : ORIGIN = 0x00, LENGTH = 256
19  text  (rx)  : ORIGIN = 0x04400, LENGTH = 0x10000 - 0x4400
20  data        : ORIGIN = 0x01100, LENGTH = 0x2000 - 0x1100
21}
22/* Setup the stack on the top of the data memory bank.  */
23PROVIDE (_stack = 0x04400 - 1);
24SECTIONS
25{
26  .hash          : { *(.hash)		}
27  .dynsym        : { *(.dynsym)		}
28  .dynstr        : { *(.dynstr)		}
29  .gnu.version		  : { *(.gnu.version) }
30  .gnu.version_d	  : { *(.gnu.version_d) }
31  .gnu.version_r	  : { *(.gnu.version_r) }
32  .rel.text      :
33    {
34      *(.rel.text)
35      *(.rel.text.*)
36      *(.rel.gnu.linkonce.t.*)
37    }
38  .rela.text     :
39    {
40      *(.rela.text)
41      *(.rela.text.*)
42      *(.rela.gnu.linkonce.t.*)
43    }
44  .rel.data      :
45    {
46      *(.rel.data)
47      *(.rel.data.*)
48      *(.rel.gnu.linkonce.d.*)
49    }
50  .rela.data     :
51    {
52      *(.rela.data)
53      *(.rela.data.*)
54      *(.rela.gnu.linkonce.d.*)
55    }
56  .rel.rodata    :
57    {
58      *(.rel.rodata)
59      *(.rel.rodata.*)
60      *(.rel.gnu.linkonce.r.*)
61    }
62  .rela.rodata   :
63    {
64      *(.rela.rodata)
65      *(.rela.rodata.*)
66      *(.rela.gnu.linkonce.r.*)
67    }
68  .rel.sdata     :
69    {
70      *(.rel.sdata)
71      *(.rel.sdata.*)
72      *(.rel.gnu.linkonce.s.*)
73    }
74  .rela.sdata     :
75    {
76      *(.rela.sdata)
77      *(.rela.sdata.*)
78      *(.rela.gnu.linkonce.s.*)
79    }
80  .rel.sbss      :
81    {
82      *(.rel.sbss)
83      *(.rel.sbss.*)
84      *(.rel.gnu.linkonce.sb.*)
85    }
86  .rela.sbss     :
87    {
88      *(.rela.sbss)
89      *(.rela.sbss.*)
90      *(.rel.gnu.linkonce.sb.*)
91    }
92  .rel.bss       :
93    {
94      *(.rel.bss)
95      *(.rel.bss.*)
96      *(.rel.gnu.linkonce.b.*)
97    }
98  .rela.bss      :
99    {
100      *(.rela.bss)
101      *(.rela.bss.*)
102      *(.rela.gnu.linkonce.b.*)
103    }
104  .rela.stext		  : { *(.rela.stest) }
105  .rela.etext		  : { *(.rela.etest) }
106  .rela.sdata		  : { *(.rela.sdata) }
107  .rela.edata		  : { *(.rela.edata) }
108  .rela.eit_v		  : { *(.rela.eit_v) }
109  .rela.ebss		  : { *(.rela.ebss) }
110  .rela.srodata		  : { *(.rela.srodata) }
111  .rela.erodata		  : { *(.rela.erodata) }
112  .rela.got		  : { *(.rela.got) }
113  .rela.ctors		  : { *(.rela.ctors) }
114  .rela.dtors		  : { *(.rela.dtors) }
115  .rela.init		  : { *(.rela.init) }
116  .rela.fini		  : { *(.rela.fini) }
117  .rela.plt		  : { *(.rela.plt) }
118  .rel.stext		  : { *(.rel.stest) }
119  .rel.etext		  : { *(.rel.etest) }
120  .rel.sdata		  : { *(.rel.sdata) }
121  .rel.edata		  : { *(.rel.edata) }
122  .rel.ebss		  : { *(.rel.ebss) }
123  .rel.eit_v		  : { *(.rel.eit_v) }
124  .rel.srodata		  : { *(.rel.srodata) }
125  .rel.erodata		  : { *(.rel.erodata) }
126  .rel.got		  : { *(.rel.got) }
127  .rel.ctors		  : { *(.rel.ctors) }
128  .rel.dtors		  : { *(.rel.dtors) }
129  .rel.init		  : { *(.rel.init) }
130  .rel.fini		  : { *(.rel.fini) }
131  .rel.plt		  : { *(.rel.plt) }
132  /* Concatenate .page0 sections.  Put them in the page0 memory bank
133     unless we are creating a relocatable file.  */
134  .page0 :
135  {
136    *(.page0)
137  }  > page0
138
139  /* Start of text section.  */
140  .stext   :
141  {
142    *(.stext)
143  }  > text
144  .init	  :
145  {
146    *(.init)
147  } =0
148  .text  :
149  {
150    /* Put startup code at beginning so that _start keeps same address.  */
151    /* Startup code.  */
152    *(.install0)	/* Section should setup the stack pointer.  */
153    *(.install1)	/* Place holder for applications.  */
154    *(.install2)	/* Optional installation of data sections in RAM.  */
155    *(.install3)	/* Place holder for applications.  */
156    *(.install4)	/* Section that calls the main.  */
157    *(.init)
158    *(.text)
159    *(.text.*)
160    /* .gnu.warning sections are handled specially by elf32.em.  */
161    *(.gnu.warning)
162    *(.gnu.linkonce.t.*)
163    /* Finish code.  */
164    *(.fini0)		/* Beginning of finish code (_exit symbol).  */
165    *(.fini1)		/* Place holder for applications.  */
166    *(.fini2)		/* C++ destructors.  */
167    *(.fini3)		/* Place holder for applications.  */
168    *(.fini4)		/* Runtime exit.  */
169    _etext = .;
170    PROVIDE (etext = .);
171  }  > text
172  .eh_frame   :
173  {
174    *(.eh_frame)
175  }  > text
176  .rodata    :
177  {
178    *(.rodata)
179    *(.rodata.*)
180    *(.gnu.linkonce.r*)
181  }  > text
182  .rodata1   :
183  {
184    *(.rodata1)
185  }  > text
186  /* Constructor and destructor tables are in ROM.  */
187  .ctors   :
188  {
189     PROVIDE (__CTOR_LIST__ = .);
190    *(.ctors)
191    /* We don't want to include the .ctor section from
192       from the crtend.o file until after the sorted ctors.
193       The .ctor section from the crtend file contains the
194       end of ctors marker and it must be last
195    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
196    KEEP (*(SORT(.ctors.*)))
197    KEEP (*(.ctors)) */
198     PROVIDE(__CTOR_END__ = .);
199  }  > text
200    .dtors	  :
201  {
202     PROVIDE(__DTOR_LIST__ = .);
203    *(.dtors)
204    /*
205    KEEP (*crtbegin.o(.dtors))
206    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
207    KEEP (*(SORT(.dtors.*)))
208    KEEP (*(.dtors)) */
209     PROVIDE(__DTOR_END__ = .);
210  }  > text
211  /* Start of the data section image in ROM.  */
212  __data_image = .;
213  PROVIDE (__data_image = .);
214  /* All read-only sections that normally go in PROM must be above.
215     We construct the DATA image section in PROM at end of all these
216     read-only sections.  The data image must be copied at init time.
217     Refer to GNU ld, Section 3.6.8.2 Output Section LMA.  */
218  .data    : AT (__data_image)
219  {
220    __data_section_start = .;
221    PROVIDE (__data_section_start = .);
222    *(.sdata)
223    *(.data)
224    *(.data.*)
225    *(.data1)
226    *(.gnu.linkonce.d.*)
227    CONSTRUCTORS
228    _edata  =  .;
229    PROVIDE (edata = .);
230  }  > data
231  __data_section_size = SIZEOF(.data);
232  PROVIDE (__data_section_size = SIZEOF(.data));
233  __data_image_end = __data_image + __data_section_size;
234/* SCz: this does not work yet... This is supposed to force the loading
235   of _map_data.o (from libgcc.a) when the .data section is not empty.
236   By doing so, this should bring the code that copies the .data section
237   from ROM to RAM at init time.
238  ___pre_comp_data_size = SIZEOF(.data);
239  __install_data_sections = ___pre_comp_data_size > 0 ?
240		__map_data_sections : 0;
241*/
242  /* .install  :
243  {
244    . = _data_image_end;
245  }  > text */
246  /* Relocation for some bss and data sections.  */
247  .bss   :
248  {
249    __bss_start = .;
250    *(.softregs)
251    *(.sbss)
252    *(.scommon)
253    *(.dynbss)
254    *(.bss)
255    *(.bss.*)
256    *(.gnu.linkonce.b.*)
257    *(COMMON)
258    PROVIDE (_end = .);
259  }  > data
260  __bss_size = SIZEOF(.bss);
261  PROVIDE (__bss_size = SIZEOF(.bss));
262  /* If the 'vectors_addr' symbol is defined, it indicates the start address
263     of interrupt vectors.  This depends on the 68HC11 operating mode:
264			Addr
265     Single chip	0xffc0
266     Extended mode	0xffc0
267     Bootstrap		0x00c0
268     Test		0xbfc0
269     In general, the vectors address is 0xffc0.  This can be overriden
270     with the '-defsym vectors_addr=0xbfc0' ld option.
271     Note: for the bootstrap mode, the interrupt vectors are at 0xbfc0 but
272     they are redirected to 0x00c0 by the internal PROM.  Application's vectors
273     must also consist of jump instructions (see Motorola's manual).  */
274  PROVIDE (_vectors_addr = DEFINED (vectors_addr) ? vectors_addr : 0xffc0);
275  .vectors DEFINED (vectors_addr) ? vectors_addr : 0xffc0 :
276  {
277    *(.vectors)
278  }
279  /* Stabs debugging sections.  */
280  .stab		 0 : { *(.stab) }
281  .stabstr	 0 : { *(.stabstr) }
282  .stab.excl	 0 : { *(.stab.excl) }
283  .stab.exclstr	 0 : { *(.stab.exclstr) }
284  .stab.index	 0 : { *(.stab.index) }
285  .stab.indexstr 0 : { *(.stab.indexstr) }
286  .comment	 0 : { *(.comment) }
287  /* DWARF debug sections.
288     Symbols in the DWARF debugging sections are relative to the beginning
289     of the section so we begin them at 0.
290     Treatment of DWARF debug section must be at end of the linker
291     script to avoid problems when there are undefined symbols. It's necessary
292     to avoid that the DWARF section is relocated before such undefined
293     symbols are found.  */
294  /* DWARF 1 */
295  .debug	 0 : { *(.debug) }
296  .line		 0 : { *(.line) }
297  /* GNU DWARF 1 extensions */
298  .debug_srcinfo 0 : { *(.debug_srcinfo) }
299  .debug_sfnames 0 : { *(.debug_sfnames) }
300  /* DWARF 1.1 and DWARF 2 */
301  .debug_aranges  0 : { *(.debug_aranges) }
302  .debug_pubnames 0 : { *(.debug_pubnames) }
303  /* DWARF 2 */
304  .debug_info     0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
305  .debug_abbrev   0 : { *(.debug_abbrev) }
306  .debug_line     0 : { *(.debug_line) }
307  .debug_frame    0 : { *(.debug_frame) }
308  .debug_str      0 : { *(.debug_str) }
309  .debug_loc      0 : { *(.debug_loc) }
310  .debug_macinfo  0 : { *(.debug_macinfo) }
311}
312