1{
2Register definitions and utility code for STM32F10x - HD density
3
4Created by Jeppe Johansen 2012 - jeppe@j-software.dk
5}
6unit stm32f10x_hd;
7
8{$goto on}
9{$define stm32f10x_hd}
10
11interface
12
13type
14 TBitvector32 = bitpacked array[0..31] of 0..1;
15
16{$PACKRECORDS 2}
17const
18 PeripheralBase 	= $40000000;
19
20 FSMCBase			= $60000000;
21
22 APB1Base 			= PeripheralBase;
23 APB2Base 			= PeripheralBase+$10000;
24 AHBBase 			= PeripheralBase+$20000;
25
26 { FSMC }
27 FSMCBank1NOR1		= FSMCBase+$00000000;
28 FSMCBank1NOR2		= FSMCBase+$04000000;
29 FSMCBank1NOR3		= FSMCBase+$08000000;
30 FSMCBank1NOR4		= FSMCBase+$0C000000;
31
32 FSMCBank1PSRAM1	= FSMCBase+$00000000;
33 FSMCBank1PSRAM2	= FSMCBase+$04000000;
34 FSMCBank1PSRAM3	= FSMCBase+$08000000;
35 FSMCBank1PSRAM4	= FSMCBase+$0C000000;
36
37 FSMCBank2NAND1	= FSMCBase+$10000000;
38 FSMCBank3NAND2	= FSMCBase+$20000000;
39
40 FSMCBank4PCCARD	= FSMCBase+$30000000;
41
42type
43 TTimerRegisters = record
44  CR1, res1,
45  CR2, res2,
46  SMCR, res3,
47  DIER, res4,
48  SR, res5,
49  EGR, res,
50  CCMR1, res6,
51  CCMR2, res7,
52  CCER, res8,
53  CNT, res9,
54  PSC, res10,
55  ARR, res11,
56  RCR, res12,
57  CCR1, res13,
58  CCR2, res14,
59  CCR3, res15,
60  CCR4, res16,
61  BDTR, res17,
62  DCR, res18,
63  DMAR, res19: Word;
64 end;
65
66 TRTCRegisters = record
67  CRH, res1,
68  CRL, res2,
69  PRLH, res3,
70  PRLL, res4,
71  DIVH, res5,
72  DIVL, res6,
73  CNTH, res7,
74  CNTL, res8,
75  ALRH, res9,
76  ALRL, res10: Word;
77 end;
78
79 TIWDGRegisters = record
80  KR, res1,
81  PR, res2,
82  RLR, res3,
83  SR, res4: word;
84 end;
85
86 TWWDGRegisters = record
87  CR, res2,
88  CFR, res3,
89  SR, res4: word;
90 end;
91
92 TSPIRegisters = record
93  CR1, res1,
94  CR2, res2,
95  SR, res3,
96  DR, res4,
97  CRCPR, res5,
98  RXCRCR, res6,
99  TXCRCR, res7,
100  I2SCFGR, res8,
101  I2SPR, res9: Word;
102 end;
103
104 TUSARTRegisters = record
105  SR, res1,
106  DR, res2,
107  BRR, res3,
108  CR1, res4,
109  CR2, res5,
110  CR3, res6,
111  GTPR, res7: Word;
112 end;
113
114 TI2CRegisters = record
115  CR1, res1,
116  CR2, res2,
117  OAR1, res3,
118  OAR2, res4,
119  DR, res5,
120  SR1, res6,
121  SR2, res7,
122  CCR, res8: word;
123  TRISE: byte;
124 end;
125
126 TUSBRegisters = record
127  EPR: array[0..7] of longword;
128
129  res: array[0..7] of longword;
130
131  CNTR, res1,
132  ISTR, res2,
133  FNR, res3: Word;
134  DADDR: byte; res4: word; res5: byte;
135  BTABLE: Word;
136 end;
137
138 TUSBMem = packed array[0..511] of byte;
139
140 TCANMailbox = record
141  IR,
142  DTR,
143  DLR,
144  DHR: longword;
145 end;
146
147 TCANRegisters = record
148  MCR,
149  MSR,
150  TSR,
151  RF0R,
152  RF1R,
153  IER,
154  ESR,
155  BTR: longword;
156
157  res5: array[$020..$17F] of byte;
158
159  TX: array[0..2] of TCANMailbox;
160  RX: array[0..2] of TCANMailbox;
161
162  res6: array[$1D0..$1FF] of byte;
163
164  FMR,
165  FM1R,
166  res9: longword;
167  FS1R, res10: word;
168  res11: longword;
169  FFA1R, res12: word;
170  res13: longword;
171  FA1R, res14: word;
172  res15: array[$220..$23F] of byte;
173
174  FOR1,
175  FOR2: longword;
176
177  FB: array[1..13] of array[1..2] of longword;
178 end;
179
180 TBKPRegisters = record
181  DR: array[1..10] of record data, res: word; end;
182
183  RTCCR,
184  CR,
185  CSR,
186  res1,res2: longword;
187
188  DR2: array[11..42] of record data, res: word; end;
189 end;
190
191 TPwrRegisters = record
192  CR, res: word;
193  CSR: Word;
194 end;
195
196 TDACRegisters = record
197  CR,
198  SWTRIGR: longword;
199
200  DHR12R1, res2,
201  DHR12L1, res3,
202  DHR8R1, res4,
203  DHR12R2, res5,
204  DHR12L2, res6,
205  DHR8R2, res7: word;
206
207  DHR12RD,
208  DHR12LD: longword;
209
210  DHR8RD, res8,
211
212  DOR1, res9,
213  DOR2, res10: Word;
214 end;
215
216 TAFIORegisters = record
217  EVCR,
218  MAPR: longword;
219  EXTICR: array[0..3] of longword;
220 end;
221
222 TEXTIRegisters = record
223  IMR,
224  EMR,
225  RTSR,
226  FTSR,
227  SWIER,
228  PR: longword;
229 end;
230
231 TPortRegisters = record
232  CRL,
233  CRH,
234  IDR,
235  ODR,
236  BSRR,
237  BRR,
238  LCKR: longword;
239 end;
240
241 TADCRegisters = record
242  SR,
243  CR1,
244  CR2,
245  SMPR1,
246  SMPR2: longword;
247  JOFR1, res2,
248  JOFR2, res3,
249  JOFR3, res4,
250  JOFR4, res5,
251  HTR, res6,
252  LTR, res7: word;
253  SQR1,
254  SQR2,
255  SQR3,
256  JSQR: longword;
257  JDR1, res8,
258  JDR2, res9,
259  JDR3, res10,
260  JDR4, res11: Word;
261  DR: longword;
262 end;
263
264 TSDIORegisters = record
265  POWER,
266  CLKCR,
267  ARG: longword;
268  CMD, res3,
269  RESPCMD, res4: Word;
270  RESP1,
271  RESP2,
272  RESP3,
273  RESP4,
274  DTIMER,
275  DLEN: longword;
276  DCTRL, res5: word;
277  DCOUNT,
278  STA,
279  ICR,
280  MASK,
281  FIFOCNT,
282  FIFO: longword;
283 end;
284
285 TDMAChannel = record
286  CCR, res1,
287  CNDTR, res2: word;
288  CPAR,
289  CMAR,
290  res: longword;
291 end;
292
293 TDMARegisters = record
294  ISR,
295  IFCR: longword;
296  Channel: array[0..7] of TDMAChannel;
297 end;
298
299 TRCCRegisters = record
300  CR,
301  CFGR,
302  CIR,
303  APB2RSTR,
304  APB1RSTR,
305  AHBENR,
306  APB2ENR,
307  APB1ENR,
308  BDCR,
309  CSR: longword;
310 end;
311
312 TCRCRegisters = record
313  DR: longword;
314  IDR: byte; res1: word; res2: byte;
315  CR: byte;
316 end;
317
318 TFlashRegisters = record
319  ACR,
320  KEYR,
321  OPTKEYR,
322  SR,
323  CR,
324  AR,
325  res,
326  OBR,
327  WRPR: longword;
328 end;
329
330 TFSMC_Bank1 = record
331  BCR1 : longword;
332  BTR1 : longword;
333  BCR2 : longword;
334  BTR2 : longword;
335  BCR3 : longword;
336  BTR3 : longword;
337  BCR4 : longword;
338  BTR4 : longword;
339 end;
340
341 TFSMC_Bank1E = record
342   BWTR1 : longword;
343   res1  : longword;
344   BWTR2 : longword;
345   res2  : longword;
346   BWTR3 : longword;
347   res3  : longword;
348   BWTR4 : longword;
349 end;
350
351 TFSMC_Bank2 = record
352   PCR2,
353   SR2,
354   PMEM2,
355   PATT2,
356   res1,
357   ECCR2 : longword
358 end;
359
360 TFSMC_Bank3 = record
361   PCR3,
362   SR3,
363   PMEM3,
364   PATT3,
365   RESERVED0,
366   ECCR3 : longword;
367 end;
368
369 TFSMC_Bank4 = record
370   PCR4,
371   SR4,
372   PMEM4,
373   PATT4,
374   PIO4 : longword;
375 end;
376
377{$ALIGN 2}
378var
379 { Timers }
380 Timer1: TTimerRegisters 	absolute (APB2Base+$2C00);
381 Timer2: TTimerRegisters 	absolute (APB1Base+$0000);
382 Timer3: TTimerRegisters 	absolute (APB1Base+$0400);
383 Timer4: TTimerRegisters 	absolute (APB1Base+$0800);
384 Timer5: TTimerRegisters 	absolute (APB1Base+$0C00);
385 Timer6: TTimerRegisters 	absolute (APB1Base+$1000);
386 Timer7: TTimerRegisters 	absolute (APB1Base+$1400);
387 Timer8: TTimerRegisters 	absolute (APB2Base+$3400);
388
389 { RTC }
390 RTC: TRTCRegisters 			absolute (APB1Base+$2800);
391
392 { WDG }
393 WWDG: TWWDGRegisters 		absolute (APB1Base+$2C00);
394 IWDG: TIWDGRegisters 		absolute (APB1Base+$3000);
395
396 { SPI }
397 SPI1: TSPIRegisters			absolute (APB2Base+$3000);
398 SPI2: TSPIRegisters			absolute (APB1Base+$3800);
399 SPI3: TSPIRegisters			absolute (APB1Base+$3C00);
400
401 { USART/UART }
402 USART1: TUSARTRegisters	absolute (APB2Base+$3800);
403 USART2: TUSARTRegisters	absolute (APB1Base+$4400);
404 USART3: TUSARTRegisters	absolute (APB1Base+$4800);
405 UART4: TUSARTRegisters		absolute (APB1Base+$4C00);
406 UART5: TUSARTRegisters		absolute (APB1Base+$5000);
407
408 { I2C }
409 I2C1: TI2CRegisters			absolute (APB1Base+$5400);
410 I2C2: TI2CRegisters			absolute (APB1Base+$5800);
411
412 { USB }
413 USB: TUSBRegisters			absolute (APB1Base+$5C00);
414 USBMem: TUSBMem                        absolute (APB1Base+$6000);
415
416 { CAN }
417 CAN: TCANRegisters			absolute (APB1Base+$6800);
418
419 { BKP }
420 BKP: TBKPRegisters			absolute (APB1Base+$6C00);
421
422 { PWR }
423 PWR: TPwrRegisters			absolute (APB1Base+$7000);
424
425 { DAC }
426 DAC: TDACRegisters			absolute (APB1Base+$7400);
427
428 { GPIO }
429 AFIO: TAFIORegisters		absolute (APB2Base+$0);
430 EXTI: TEXTIRegisters		absolute (APB2Base+$0400);
431
432 PortA: TPortRegisters		absolute (APB2Base+$0800);
433 PortB: TPortRegisters		absolute (APB2Base+$0C00);
434 PortC: TPortRegisters		absolute (APB2Base+$1000);
435 PortD: TPortRegisters		absolute (APB2Base+$1400);
436 PortE: TPortRegisters		absolute (APB2Base+$1800);
437 PortF: TPortRegisters		absolute (APB2Base+$1C00);
438 PortG: TPortRegisters		absolute (APB2Base+$2000);
439
440 { ADC }
441 ADC1: TADCRegisters			absolute (APB2Base+$2400);
442 ADC2: TADCRegisters			absolute (APB2Base+$2800);
443 ADC3: TADCRegisters			absolute (APB2Base+$3C00);
444
445 { SDIO }
446 SDIO: TSDIORegisters		absolute (APB2Base+$8000);
447
448 { DMA }
449 DMA1: TDMARegisters			absolute (AHBBase+$0000);
450 DMA2: TDMARegisters			absolute (AHBBase+$0400);
451
452 { RCC }
453 RCC: TRCCRegisters			absolute (AHBBase+$1000);
454
455 { Flash }
456 Flash: TFlashRegisters		absolute (AHBBase+$2000);
457
458 { CRC }
459 CRC: TCRCRegisters			absolute (AHBBase+$3000);
460
461 { FSMC }
462 FSMC_Bank1 : TFSMC_Bank1 absolute (FSMCBase + $40000000);
463 FSMC_Bank1E : TFSMC_Bank1E absolute (FSMCBase + $40000104);
464 FSMC_Bank2 : TFSMC_Bank2 absolute (FSMCBase + $40000060);
465 FSMC_Bank3 : TFSMC_Bank3 absolute (FSMCBase + $40000080);
466 FSMC_Bank4 : TFSMC_Bank4 absolute (FSMCBase + $400000A0);
467
468implementation
469
470procedure NMI_interrupt; external name 'NMI_interrupt';
471procedure Hardfault_interrupt; external name 'Hardfault_interrupt';
472procedure MemManage_interrupt; external name 'MemManage_interrupt';
473procedure BusFault_interrupt; external name 'BusFault_interrupt';
474procedure UsageFault_interrupt; external name 'UsageFault_interrupt';
475procedure SWI_interrupt; external name 'SWI_interrupt';
476procedure DebugMonitor_interrupt; external name 'DebugMonitor_interrupt';
477procedure PendingSV_interrupt; external name 'PendingSV_interrupt';
478procedure SysTick_interrupt; external name 'SysTick_interrupt';
479procedure Window_watchdog_interrupt; external name 'Window_watchdog_interrupt';
480procedure PVD_through_EXTI_Line_detection_interrupt; external name 'PVD_through_EXTI_Line_detection_interrupt';
481procedure Tamper_interrupt; external name 'Tamper_interrupt';
482procedure RTC_global_interrupt; external name 'RTC_global_interrupt';
483procedure Flash_global_interrupt; external name 'Flash_global_interrupt';
484procedure RCC_global_interrupt; external name 'RCC_global_interrupt';
485procedure EXTI_Line0_interrupt; external name 'EXTI_Line0_interrupt';
486procedure EXTI_Line1_interrupt; external name 'EXTI_Line1_interrupt';
487procedure EXTI_Line2_interrupt; external name 'EXTI_Line2_interrupt';
488procedure EXTI_Line3_interrupt; external name 'EXTI_Line3_interrupt';
489procedure EXTI_Line4_interrupt; external name 'EXTI_Line4_interrupt';
490procedure DMA1_Channel1_global_interrupt; external name 'DMA1_Channel1_global_interrupt';
491procedure DMA1_Channel2_global_interrupt; external name 'DMA1_Channel2_global_interrupt';
492procedure DMA1_Channel3_global_interrupt; external name 'DMA1_Channel3_global_interrupt';
493procedure DMA1_Channel4_global_interrupt; external name 'DMA1_Channel4_global_interrupt';
494procedure DMA1_Channel5_global_interrupt; external name 'DMA1_Channel5_global_interrupt';
495procedure DMA1_Channel6_global_interrupt; external name 'DMA1_Channel6_global_interrupt';
496procedure DMA1_Channel7_global_interrupt; external name 'DMA1_Channel7_global_interrupt';
497procedure ADC1_and_ADC2_global_interrupt; external name 'ADC1_and_ADC2_global_interrupt';
498procedure USB_High_Priority_or_CAN_TX_interrupts; external name 'USB_High_Priority_or_CAN_TX_interrupts';
499procedure USB_Low_Priority_or_CAN_RX0_interrupts; external name 'USB_Low_Priority_or_CAN_RX0_interrupts';
500procedure CAN_RX1_interrupt; external name 'CAN_RX1_interrupt';
501procedure CAN_SCE_interrupt; external name 'CAN_SCE_interrupt';
502procedure EXTI_Line9_5_interrupts; external name 'EXTI_Line9_5_interrupts';
503procedure TIM1_Break_interrupt; external name 'TIM1_Break_interrupt';
504procedure TIM1_Update_interrupt; external name 'TIM1_Update_interrupt';
505procedure TIM1_Trigger_and_Commutation_interrupts; external name 'TIM1_Trigger_and_Commutation_interrupts';
506procedure TIM1_Capture_Compare_interrupt; external name 'TIM1_Capture_Compare_interrupt';
507procedure TIM2_global_interrupt; external name 'TIM2_global_interrupt';
508procedure TIM3_global_interrupt; external name 'TIM3_global_interrupt';
509procedure TIM4_global_interrupt; external name 'TIM4_global_interrupt';
510procedure I2C1_event_interrupt; external name 'I2C1_event_interrupt';
511procedure I2C1_error_interrupt; external name 'I2C1_error_interrupt';
512procedure I2C2_event_interrupt; external name 'I2C2_event_interrupt';
513procedure I2C2_error_interrupt; external name 'I2C2_error_interrupt';
514procedure SPI1_global_interrupt; external name 'SPI1_global_interrupt';
515procedure SPI2_global_interrupt; external name 'SPI2_global_interrupt';
516procedure USART1_global_interrupt; external name 'USART1_global_interrupt';
517procedure USART2_global_interrupt; external name 'USART2_global_interrupt';
518procedure USART3_global_interrupt; external name 'USART3_global_interrupt';
519procedure EXTI_Line15_10_interrupts; external name 'EXTI_Line15_10_interrupts';
520procedure RTC_alarm_through_EXTI_line_interrupt; external name 'RTC_alarm_through_EXTI_line_interrupt';
521procedure USB_wakeup_from_suspend_through_EXTI_line_interrupt; external name 'USB_wakeup_from_suspend_through_EXTI_line_interrupt';
522procedure TIM8_Break_interrupt; external name 'TIM8_Break_interrupt';
523procedure TIM8_Update_interrupt; external name 'TIM8_Update_interrupt';
524procedure TIM8_Trigger_and_Commutation_interrupts; external name 'TIM8_Trigger_and_Commutation_interrupts';
525procedure TIM8_Capture_Compare_interrupt; external name 'TIM8_Capture_Compare_interrupt';
526procedure ADC3_global_interrupt; external name 'ADC3_global_interrupt';
527procedure FSMC_global_interrupt; external name 'FSMC_global_interrupt';
528procedure SDIO_global_interrupt; external name 'SDIO_global_interrupt';
529procedure TIM5_global_interrupt; external name 'TIM5_global_interrupt';
530procedure SPI3_global_interrupt; external name 'SPI3_global_interrupt';
531procedure UART4_global_interrupt; external name 'UART4_global_interrupt';
532procedure UART5_global_interrupt; external name 'UART5_global_interrupt';
533procedure TIM6_global_interrupt; external name 'TIM6_global_interrupt';
534procedure TIM7_global_interrupt; external name 'TIM7_global_interrupt';
535procedure DMA2_Channel1_global_interrupt; external name 'DMA2_Channel1_global_interrupt';
536procedure DMA2_Channel2_global_interrupt; external name 'DMA2_Channel2_global_interrupt';
537procedure DMA2_Channel3_global_interrupt; external name 'DMA2_Channel3_global_interrupt';
538procedure DMA2_Channel4_and_DMA2_Channel5_global_interrupts; external name 'DMA2_Channel4_and_DMA2_Channel5_global_interrupts';
539
540{$i cortexm3_start.inc}
541
542procedure Vectors; assembler; nostackframe;
543label interrupt_vectors;
544asm
545   .section ".init.interrupt_vectors"
546interrupt_vectors:
547   .long _stack_top
548   .long Startup
549   .long NMI_interrupt
550   .long Hardfault_interrupt
551   .long MemManage_interrupt
552   .long BusFault_interrupt
553   .long UsageFault_interrupt
554   .long 0
555   .long 0
556   .long 0
557   .long 0
558   .long SWI_interrupt
559   .long DebugMonitor_interrupt
560   .long 0
561   .long PendingSV_interrupt
562   .long SysTick_interrupt
563
564   .long Window_watchdog_interrupt
565   .long PVD_through_EXTI_Line_detection_interrupt
566   .long Tamper_interrupt
567   .long RTC_global_interrupt
568   .long Flash_global_interrupt
569   .long RCC_global_interrupt
570   .long EXTI_Line0_interrupt
571   .long EXTI_Line1_interrupt
572   .long EXTI_Line2_interrupt
573   .long EXTI_Line3_interrupt
574   .long EXTI_Line4_interrupt
575   .long DMA1_Channel1_global_interrupt
576   .long DMA1_Channel2_global_interrupt
577   .long DMA1_Channel3_global_interrupt
578   .long DMA1_Channel4_global_interrupt
579   .long DMA1_Channel5_global_interrupt
580   .long DMA1_Channel6_global_interrupt
581   .long DMA1_Channel7_global_interrupt
582   .long ADC1_and_ADC2_global_interrupt
583   .long USB_High_Priority_or_CAN_TX_interrupts
584   .long USB_Low_Priority_or_CAN_RX0_interrupts
585   .long CAN_RX1_interrupt
586   .long CAN_SCE_interrupt
587   .long EXTI_Line9_5_interrupts
588   .long TIM1_Break_interrupt
589   .long TIM1_Update_interrupt
590   .long TIM1_Trigger_and_Commutation_interrupts
591   .long TIM1_Capture_Compare_interrupt
592   .long TIM2_global_interrupt
593   .long TIM3_global_interrupt
594   .long TIM4_global_interrupt
595   .long I2C1_event_interrupt
596   .long I2C1_error_interrupt
597   .long I2C2_event_interrupt
598   .long I2C2_error_interrupt
599   .long SPI1_global_interrupt
600   .long SPI2_global_interrupt
601   .long USART1_global_interrupt
602   .long USART2_global_interrupt
603   .long USART3_global_interrupt
604   .long EXTI_Line15_10_interrupts
605   .long RTC_alarm_through_EXTI_line_interrupt
606   .long USB_wakeup_from_suspend_through_EXTI_line_interrupt
607   .long TIM8_Break_interrupt
608   .long TIM8_Update_interrupt
609   .long TIM8_Trigger_and_Commutation_interrupts
610   .long TIM8_Capture_Compare_interrupt
611   .long ADC3_global_interrupt
612   .long FSMC_global_interrupt
613   .long SDIO_global_interrupt
614   .long TIM5_global_interrupt
615   .long SPI3_global_interrupt
616   .long UART4_global_interrupt
617   .long UART5_global_interrupt
618   .long TIM6_global_interrupt
619   .long TIM7_global_interrupt
620   .long DMA2_Channel1_global_interrupt
621   .long DMA2_Channel2_global_interrupt
622   .long DMA2_Channel3_global_interrupt
623   .long DMA2_Channel4_and_DMA2_Channel5_global_interrupts
624
625   .weak NMI_interrupt
626   .weak Hardfault_interrupt
627   .weak MemManage_interrupt
628   .weak BusFault_interrupt
629   .weak UsageFault_interrupt
630   .weak SWI_interrupt
631   .weak DebugMonitor_interrupt
632   .weak PendingSV_interrupt
633   .weak SysTick_interrupt
634
635   .weak Window_watchdog_interrupt
636   .weak PVD_through_EXTI_Line_detection_interrupt
637   .weak Tamper_interrupt
638   .weak RTC_global_interrupt
639   .weak Flash_global_interrupt
640   .weak RCC_global_interrupt
641   .weak EXTI_Line0_interrupt
642   .weak EXTI_Line1_interrupt
643   .weak EXTI_Line2_interrupt
644   .weak EXTI_Line3_interrupt
645   .weak EXTI_Line4_interrupt
646   .weak DMA1_Channel1_global_interrupt
647   .weak DMA1_Channel2_global_interrupt
648   .weak DMA1_Channel3_global_interrupt
649   .weak DMA1_Channel4_global_interrupt
650   .weak DMA1_Channel5_global_interrupt
651   .weak DMA1_Channel6_global_interrupt
652   .weak DMA1_Channel7_global_interrupt
653   .weak ADC1_and_ADC2_global_interrupt
654   .weak USB_High_Priority_or_CAN_TX_interrupts
655   .weak USB_Low_Priority_or_CAN_RX0_interrupts
656   .weak CAN_RX1_interrupt
657   .weak CAN_SCE_interrupt
658   .weak EXTI_Line9_5_interrupts
659   .weak TIM1_Break_interrupt
660   .weak TIM1_Update_interrupt
661   .weak TIM1_Trigger_and_Commutation_interrupts
662   .weak TIM1_Capture_Compare_interrupt
663   .weak TIM2_global_interrupt
664   .weak TIM3_global_interrupt
665   .weak TIM4_global_interrupt
666   .weak I2C1_event_interrupt
667   .weak I2C1_error_interrupt
668   .weak I2C2_event_interrupt
669   .weak I2C2_error_interrupt
670   .weak SPI1_global_interrupt
671   .weak SPI2_global_interrupt
672   .weak USART1_global_interrupt
673   .weak USART2_global_interrupt
674   .weak USART3_global_interrupt
675   .weak EXTI_Line15_10_interrupts
676   .weak RTC_alarm_through_EXTI_line_interrupt
677   .weak USB_wakeup_from_suspend_through_EXTI_line_interrupt
678   .weak TIM8_Break_interrupt
679   .weak TIM8_Update_interrupt
680   .weak TIM8_Trigger_and_Commutation_interrupts
681   .weak TIM8_Capture_Compare_interrupt
682   .weak ADC3_global_interrupt
683   .weak FSMC_global_interrupt
684   .weak SDIO_global_interrupt
685   .weak TIM5_global_interrupt
686   .weak SPI3_global_interrupt
687   .weak UART4_global_interrupt
688   .weak UART5_global_interrupt
689   .weak TIM6_global_interrupt
690   .weak TIM7_global_interrupt
691   .weak DMA2_Channel1_global_interrupt
692   .weak DMA2_Channel2_global_interrupt
693   .weak DMA2_Channel3_global_interrupt
694   .weak DMA2_Channel4_and_DMA2_Channel5_global_interrupts
695
696
697   .set NMI_interrupt, HaltProc
698   .set Hardfault_interrupt, HaltProc
699   .set MemManage_interrupt, HaltProc
700   .set BusFault_interrupt, HaltProc
701   .set UsageFault_interrupt, HaltProc
702   .set SWI_interrupt, HaltProc
703   .set DebugMonitor_interrupt, HaltProc
704   .set PendingSV_interrupt, HaltProc
705   .set SysTick_interrupt, HaltProc
706
707   .set Window_watchdog_interrupt, HaltProc
708   .set PVD_through_EXTI_Line_detection_interrupt, HaltProc
709   .set Tamper_interrupt, HaltProc
710   .set RTC_global_interrupt, HaltProc
711   .set Flash_global_interrupt, HaltProc
712   .set RCC_global_interrupt, HaltProc
713   .set EXTI_Line0_interrupt, HaltProc
714   .set EXTI_Line1_interrupt, HaltProc
715   .set EXTI_Line2_interrupt, HaltProc
716   .set EXTI_Line3_interrupt, HaltProc
717   .set EXTI_Line4_interrupt, HaltProc
718   .set DMA1_Channel1_global_interrupt, HaltProc
719   .set DMA1_Channel2_global_interrupt, HaltProc
720   .set DMA1_Channel3_global_interrupt, HaltProc
721   .set DMA1_Channel4_global_interrupt, HaltProc
722   .set DMA1_Channel5_global_interrupt, HaltProc
723   .set DMA1_Channel6_global_interrupt, HaltProc
724   .set DMA1_Channel7_global_interrupt, HaltProc
725   .set ADC1_and_ADC2_global_interrupt, HaltProc
726   .set USB_High_Priority_or_CAN_TX_interrupts, HaltProc
727   .set USB_Low_Priority_or_CAN_RX0_interrupts, HaltProc
728   .set CAN_RX1_interrupt, HaltProc
729   .set CAN_SCE_interrupt, HaltProc
730   .set EXTI_Line9_5_interrupts, HaltProc
731   .set TIM1_Break_interrupt, HaltProc
732   .set TIM1_Update_interrupt, HaltProc
733   .set TIM1_Trigger_and_Commutation_interrupts, HaltProc
734   .set TIM1_Capture_Compare_interrupt, HaltProc
735   .set TIM2_global_interrupt, HaltProc
736   .set TIM3_global_interrupt, HaltProc
737   .set TIM4_global_interrupt, HaltProc
738   .set I2C1_event_interrupt, HaltProc
739   .set I2C1_error_interrupt, HaltProc
740   .set I2C2_event_interrupt, HaltProc
741   .set I2C2_error_interrupt, HaltProc
742   .set SPI1_global_interrupt, HaltProc
743   .set SPI2_global_interrupt, HaltProc
744   .set USART1_global_interrupt, HaltProc
745   .set USART2_global_interrupt, HaltProc
746   .set USART3_global_interrupt, HaltProc
747   .set EXTI_Line15_10_interrupts, HaltProc
748   .set RTC_alarm_through_EXTI_line_interrupt, HaltProc
749   .set USB_wakeup_from_suspend_through_EXTI_line_interrupt, HaltProc
750   .set TIM8_Break_interrupt, HaltProc
751   .set TIM8_Update_interrupt, HaltProc
752   .set TIM8_Trigger_and_Commutation_interrupts, HaltProc
753   .set TIM8_Capture_Compare_interrupt, HaltProc
754   .set ADC3_global_interrupt, HaltProc
755   .set FSMC_global_interrupt, HaltProc
756   .set SDIO_global_interrupt, HaltProc
757   .set TIM5_global_interrupt, HaltProc
758   .set SPI3_global_interrupt, HaltProc
759   .set UART4_global_interrupt, HaltProc
760   .set UART5_global_interrupt, HaltProc
761   .set TIM6_global_interrupt, HaltProc
762   .set TIM7_global_interrupt, HaltProc
763   .set DMA2_Channel1_global_interrupt, HaltProc
764   .set DMA2_Channel2_global_interrupt, HaltProc
765   .set DMA2_Channel3_global_interrupt, HaltProc
766   .set DMA2_Channel4_and_DMA2_Channel5_global_interrupts, HaltProc
767
768   .text
769end;
770
771end.
772