1 unit PIC16F15323; 2 3 // Define hardware 4 {$SET PIC_MODEL = 'PIC16F15323'} 5 {$SET PIC_MAXFREQ = 32000000} 6 {$SET PIC_NPINS = 14} 7 {$SET PIC_NUMBANKS = 64} 8 {$SET PIC_NUMPAGES = 1} 9 {$SET PIC_MAXFLASH = 2048} 10 11 interface 12 var 13 INDF0 : byte absolute $0000; 14 INDF1 : byte absolute $0001; 15 PCL : byte absolute $0002; 16 STATUS : byte absolute $0003; 17 STATUS_nTO : bit absolute STATUS.4; 18 STATUS_nPD : bit absolute STATUS.3; 19 STATUS_Z : bit absolute STATUS.2; 20 STATUS_DC : bit absolute STATUS.1; 21 STATUS_C : bit absolute STATUS.0; 22 FSR0L : byte absolute $0004; 23 FSR0H : byte absolute $0005; 24 FSR1L : byte absolute $0006; 25 FSR1H : byte absolute $0007; 26 BSR : byte absolute $0008; 27 BSR_BSR5 : bit absolute BSR.5; 28 BSR_BSR4 : bit absolute BSR.4; 29 BSR_BSR3 : bit absolute BSR.3; 30 BSR_BSR2 : bit absolute BSR.2; 31 BSR_BSR1 : bit absolute BSR.1; 32 BSR_BSR0 : bit absolute BSR.0; 33 WREG : byte absolute $0009; 34 PCLATH : byte absolute $000A; 35 PCLATH_PCLATH6 : bit absolute PCLATH.6; 36 PCLATH_PCLATH5 : bit absolute PCLATH.5; 37 PCLATH_PCLATH4 : bit absolute PCLATH.4; 38 PCLATH_PCLATH3 : bit absolute PCLATH.3; 39 PCLATH_PCLATH2 : bit absolute PCLATH.2; 40 PCLATH_PCLATH1 : bit absolute PCLATH.1; 41 PCLATH_PCLATH0 : bit absolute PCLATH.0; 42 INTCON : byte absolute $000B; 43 INTCON_GIE : bit absolute INTCON.7; 44 INTCON_PEIE : bit absolute INTCON.6; 45 INTCON_INTEDG : bit absolute INTCON.0; 46 PORTA : byte absolute $000C; 47 PORTA_RA5 : bit absolute PORTA.5; 48 PORTA_RA4 : bit absolute PORTA.4; 49 PORTA_RA3 : bit absolute PORTA.3; 50 PORTA_RA2 : bit absolute PORTA.2; 51 PORTA_RA1 : bit absolute PORTA.1; 52 PORTA_RA0 : bit absolute PORTA.0; 53 PORTC : byte absolute $000E; 54 PORTC_RC5 : bit absolute PORTC.5; 55 PORTC_RC4 : bit absolute PORTC.4; 56 PORTC_RC3 : bit absolute PORTC.3; 57 PORTC_RC2 : bit absolute PORTC.2; 58 PORTC_RC1 : bit absolute PORTC.1; 59 PORTC_RC0 : bit absolute PORTC.0; 60 TRISA : byte absolute $0012; 61 TRISA_TRISA5 : bit absolute TRISA.5; 62 TRISA_TRISA4 : bit absolute TRISA.4; 63 TRISA_TRISA2 : bit absolute TRISA.2; 64 TRISA_TRISA1 : bit absolute TRISA.1; 65 TRISA_TRISA0 : bit absolute TRISA.0; 66 TRISC : byte absolute $0014; 67 TRISC_TRISC5 : bit absolute TRISC.5; 68 TRISC_TRISC4 : bit absolute TRISC.4; 69 TRISC_TRISC3 : bit absolute TRISC.3; 70 TRISC_TRISC2 : bit absolute TRISC.2; 71 TRISC_TRISC1 : bit absolute TRISC.1; 72 TRISC_TRISC0 : bit absolute TRISC.0; 73 LATA : byte absolute $0018; 74 LATA_LATA5 : bit absolute LATA.5; 75 LATA_LATA4 : bit absolute LATA.4; 76 LATA_LATA2 : bit absolute LATA.2; 77 LATA_LATA1 : bit absolute LATA.1; 78 LATA_LATA0 : bit absolute LATA.0; 79 LATC : byte absolute $001A; 80 LATC_LATC5 : bit absolute LATC.5; 81 LATC_LATC4 : bit absolute LATC.4; 82 LATC_LATC3 : bit absolute LATC.3; 83 LATC_LATC2 : bit absolute LATC.2; 84 LATC_LATC1 : bit absolute LATC.1; 85 LATC_LATC0 : bit absolute LATC.0; 86 ADRESL : byte absolute $009B; 87 ADRESH : byte absolute $009C; 88 ADCON0 : byte absolute $009D; 89 ADCON0_CHS5 : bit absolute ADCON0.7; 90 ADCON0_CHS4 : bit absolute ADCON0.6; 91 ADCON0_CHS3 : bit absolute ADCON0.5; 92 ADCON0_CHS2 : bit absolute ADCON0.4; 93 ADCON0_CHS1 : bit absolute ADCON0.3; 94 ADCON0_CHS0 : bit absolute ADCON0.2; 95 ADCON0_GOnDONE : bit absolute ADCON0.1; 96 ADCON0_ADON : bit absolute ADCON0.0; 97 ADCON1 : byte absolute $009E; 98 ADCON1_ADFM : bit absolute ADCON1.7; 99 ADCON1_ADCS2 : bit absolute ADCON1.6; 100 ADCON1_ADCS1 : bit absolute ADCON1.5; 101 ADCON1_ADCS0 : bit absolute ADCON1.4; 102 ADCON1_ADPREF1 : bit absolute ADCON1.1; 103 ADCON1_ADPREF0 : bit absolute ADCON1.0; 104 ADACT : byte absolute $009F; 105 ADACT_ADACT4 : bit absolute ADACT.4; 106 ADACT_ADACT3 : bit absolute ADACT.3; 107 ADACT_ADACT2 : bit absolute ADACT.2; 108 ADACT_ADACT1 : bit absolute ADACT.1; 109 ADACT_ADACT0 : bit absolute ADACT.0; 110 RC1REG : byte absolute $0119; 111 TX1REG : byte absolute $011A; 112 SP1BRGL : byte absolute $011B; 113 SP1BRGH : byte absolute $011C; 114 RC1STA : byte absolute $011D; 115 RC1STA_SPEN : bit absolute RC1STA.7; 116 RC1STA_RX9 : bit absolute RC1STA.6; 117 RC1STA_SREN : bit absolute RC1STA.5; 118 RC1STA_CREN : bit absolute RC1STA.4; 119 RC1STA_ADDEN : bit absolute RC1STA.3; 120 RC1STA_FERR : bit absolute RC1STA.2; 121 RC1STA_OERR : bit absolute RC1STA.1; 122 RC1STA_RX9D : bit absolute RC1STA.0; 123 TX1STA : byte absolute $011E; 124 TX1STA_CSRC : bit absolute TX1STA.7; 125 TX1STA_TX9 : bit absolute TX1STA.6; 126 TX1STA_TXEN : bit absolute TX1STA.5; 127 TX1STA_SYNC : bit absolute TX1STA.4; 128 TX1STA_SENDB : bit absolute TX1STA.3; 129 TX1STA_BRGH : bit absolute TX1STA.2; 130 TX1STA_TRMT : bit absolute TX1STA.1; 131 TX1STA_TX9D : bit absolute TX1STA.0; 132 BAUD1CON : byte absolute $011F; 133 BAUD1CON_ABDOVF : bit absolute BAUD1CON.7; 134 BAUD1CON_RCIDL : bit absolute BAUD1CON.6; 135 BAUD1CON_SCKP : bit absolute BAUD1CON.4; 136 BAUD1CON_BRG16 : bit absolute BAUD1CON.3; 137 BAUD1CON_WUE : bit absolute BAUD1CON.1; 138 BAUD1CON_ABDEN : bit absolute BAUD1CON.0; 139 SSP1BUF : byte absolute $018C; 140 SSP1ADD : byte absolute $018D; 141 SSP1MSK : byte absolute $018E; 142 SSP1STAT : byte absolute $018F; 143 SSP1STAT_SMP : bit absolute SSP1STAT.7; 144 SSP1STAT_CKE : bit absolute SSP1STAT.6; 145 SSP1STAT_D_nA : bit absolute SSP1STAT.5; 146 SSP1STAT_P : bit absolute SSP1STAT.4; 147 SSP1STAT_S : bit absolute SSP1STAT.3; 148 SSP1STAT_R_nW : bit absolute SSP1STAT.2; 149 SSP1STAT_UA : bit absolute SSP1STAT.1; 150 SSP1STAT_BF : bit absolute SSP1STAT.0; 151 SSP1CON1 : byte absolute $0190; 152 SSP1CON1_WCOL : bit absolute SSP1CON1.7; 153 SSP1CON1_SSPOV : bit absolute SSP1CON1.6; 154 SSP1CON1_SSPEN : bit absolute SSP1CON1.5; 155 SSP1CON1_CKP : bit absolute SSP1CON1.4; 156 SSP1CON1_SSPM3 : bit absolute SSP1CON1.3; 157 SSP1CON1_SSPM2 : bit absolute SSP1CON1.2; 158 SSP1CON1_SSPM1 : bit absolute SSP1CON1.1; 159 SSP1CON1_SSPM0 : bit absolute SSP1CON1.0; 160 SSP1CON2 : byte absolute $0191; 161 SSP1CON2_GCEN : bit absolute SSP1CON2.7; 162 SSP1CON2_ACKSTAT : bit absolute SSP1CON2.6; 163 SSP1CON2_ACKDT : bit absolute SSP1CON2.5; 164 SSP1CON2_ACKEN : bit absolute SSP1CON2.4; 165 SSP1CON2_RCEN : bit absolute SSP1CON2.3; 166 SSP1CON2_PEN : bit absolute SSP1CON2.2; 167 SSP1CON2_RSEN : bit absolute SSP1CON2.1; 168 SSP1CON2_SEN : bit absolute SSP1CON2.0; 169 SSP1CON3 : byte absolute $0192; 170 SSP1CON3_ACKTIM : bit absolute SSP1CON3.7; 171 SSP1CON3_PCIE : bit absolute SSP1CON3.6; 172 SSP1CON3_SCIE : bit absolute SSP1CON3.5; 173 SSP1CON3_BOEN : bit absolute SSP1CON3.4; 174 SSP1CON3_SDAHT : bit absolute SSP1CON3.3; 175 SSP1CON3_SBCDE : bit absolute SSP1CON3.2; 176 SSP1CON3_AHEN : bit absolute SSP1CON3.1; 177 SSP1CON3_DHEN : bit absolute SSP1CON3.0; 178 TMR1L : byte absolute $020C; 179 TMR1L_TMR1L7 : bit absolute TMR1L.7; 180 TMR1L_TMR1L6 : bit absolute TMR1L.6; 181 TMR1L_TMR1L5 : bit absolute TMR1L.5; 182 TMR1L_TMR1L4 : bit absolute TMR1L.4; 183 TMR1L_TMR1L3 : bit absolute TMR1L.3; 184 TMR1L_TMR1L2 : bit absolute TMR1L.2; 185 TMR1L_TMR1L1 : bit absolute TMR1L.1; 186 TMR1L_TMR1L0 : bit absolute TMR1L.0; 187 TMR1H : byte absolute $020D; 188 TMR1H_TMR1H7 : bit absolute TMR1H.7; 189 TMR1H_TMR1H6 : bit absolute TMR1H.6; 190 TMR1H_TMR1H5 : bit absolute TMR1H.5; 191 TMR1H_TMR1H4 : bit absolute TMR1H.4; 192 TMR1H_TMR1H3 : bit absolute TMR1H.3; 193 TMR1H_TMR1H2 : bit absolute TMR1H.2; 194 TMR1H_TMR1H1 : bit absolute TMR1H.1; 195 TMR1H_TMR1H0 : bit absolute TMR1H.0; 196 T1CON : byte absolute $020E; 197 T1CON_CKPS1 : bit absolute T1CON.5; 198 T1CON_CKPS0 : bit absolute T1CON.4; 199 T1CON_nSYNC : bit absolute T1CON.2; 200 T1CON_RD16 : bit absolute T1CON.1; 201 T1CON_ON : bit absolute T1CON.0; 202 T1GCON : byte absolute $020F; 203 T1GCON_GE : bit absolute T1GCON.7; 204 T1GCON_GPOL : bit absolute T1GCON.6; 205 T1GCON_GTM : bit absolute T1GCON.5; 206 T1GCON_GSPM : bit absolute T1GCON.4; 207 T1GCON_GGO_nDONE : bit absolute T1GCON.3; 208 T1GCON_GVAL : bit absolute T1GCON.2; 209 T1GATE : byte absolute $0210; 210 T1GATE_GSS4 : bit absolute T1GATE.4; 211 T1GATE_GSS3 : bit absolute T1GATE.3; 212 T1GATE_GSS2 : bit absolute T1GATE.2; 213 T1GATE_GSS1 : bit absolute T1GATE.1; 214 T1GATE_GSS0 : bit absolute T1GATE.0; 215 T1CLK : byte absolute $0211; 216 T1CLK_CS3 : bit absolute T1CLK.3; 217 T1CLK_CS2 : bit absolute T1CLK.2; 218 T1CLK_CS1 : bit absolute T1CLK.1; 219 T1CLK_CS0 : bit absolute T1CLK.0; 220 T2TMR : byte absolute $028C; 221 T2PR : byte absolute $028D; 222 T2CON : byte absolute $028E; 223 T2CON_CKPS2 : bit absolute T2CON.6; 224 T2CON_OUTPS3 : bit absolute T2CON.3; 225 T2CON_OUTPS2 : bit absolute T2CON.2; 226 T2CON_OUTPS1 : bit absolute T2CON.1; 227 T2CON_OUTPS0 : bit absolute T2CON.0; 228 T2HLT : byte absolute $028F; 229 T2HLT_PSYNC : bit absolute T2HLT.7; 230 T2HLT_CKPOL : bit absolute T2HLT.6; 231 T2HLT_CKSYNC : bit absolute T2HLT.5; 232 T2HLT_MODE4 : bit absolute T2HLT.4; 233 T2HLT_MODE3 : bit absolute T2HLT.3; 234 T2HLT_MODE2 : bit absolute T2HLT.2; 235 T2HLT_MODE1 : bit absolute T2HLT.1; 236 T2HLT_MODE0 : bit absolute T2HLT.0; 237 T2CLKCON : byte absolute $0290; 238 T2RST : byte absolute $0291; 239 T2RST_RSEL3 : bit absolute T2RST.3; 240 T2RST_RSEL2 : bit absolute T2RST.2; 241 T2RST_RSEL1 : bit absolute T2RST.1; 242 T2RST_RSEL0 : bit absolute T2RST.0; 243 CCPR1L : byte absolute $030C; 244 CCPR1H : byte absolute $030D; 245 CCP1CON : byte absolute $030E; 246 CCP1CON_EN : bit absolute CCP1CON.7; 247 CCP1CON_OUT : bit absolute CCP1CON.5; 248 CCP1CON_FMT : bit absolute CCP1CON.4; 249 CCP1CAP : byte absolute $030F; 250 CCPR2L : byte absolute $0310; 251 CCPR2H : byte absolute $0311; 252 CCP2CON : byte absolute $0312; 253 CCP2CAP : byte absolute $0313; 254 PWM3DCL : byte absolute $0314; 255 PWM3DCL_DC1 : bit absolute PWM3DCL.7; 256 PWM3DCL_DC0 : bit absolute PWM3DCL.6; 257 PWM3DCH : byte absolute $0315; 258 PWM3CON : byte absolute $0316; 259 PWM3CON_POL : bit absolute PWM3CON.4; 260 PWM4DCL : byte absolute $0318; 261 PWM4DCH : byte absolute $0319; 262 PWM4CON : byte absolute $031A; 263 PWM5DCL : byte absolute $031C; 264 PWM5DCH : byte absolute $031D; 265 PWM5CON : byte absolute $031E; 266 PWM6DCL : byte absolute $038C; 267 PWM6DCH : byte absolute $038D; 268 PWM6CON : byte absolute $038E; 269 NCO1ACCL : byte absolute $058C; 270 NCO1ACCL_NCO1ACC7 : bit absolute NCO1ACCL.7; 271 NCO1ACCL_NCO1ACC6 : bit absolute NCO1ACCL.6; 272 NCO1ACCL_NCO1ACC5 : bit absolute NCO1ACCL.5; 273 NCO1ACCL_NCO1ACC4 : bit absolute NCO1ACCL.4; 274 NCO1ACCL_NCO1ACC3 : bit absolute NCO1ACCL.3; 275 NCO1ACCL_NCO1ACC2 : bit absolute NCO1ACCL.2; 276 NCO1ACCL_NCO1ACC1 : bit absolute NCO1ACCL.1; 277 NCO1ACCL_NCO1ACC0 : bit absolute NCO1ACCL.0; 278 NCO1ACCH : byte absolute $058D; 279 NCO1ACCH_NCO1ACC15 : bit absolute NCO1ACCH.7; 280 NCO1ACCH_NCO1ACC14 : bit absolute NCO1ACCH.6; 281 NCO1ACCH_NCO1ACC13 : bit absolute NCO1ACCH.5; 282 NCO1ACCH_NCO1ACC12 : bit absolute NCO1ACCH.4; 283 NCO1ACCH_NCO1ACC11 : bit absolute NCO1ACCH.3; 284 NCO1ACCH_NCO1ACC10 : bit absolute NCO1ACCH.2; 285 NCO1ACCH_NCO1ACC9 : bit absolute NCO1ACCH.1; 286 NCO1ACCH_NCO1ACC8 : bit absolute NCO1ACCH.0; 287 NCO1ACCU : byte absolute $058E; 288 NCO1ACCU_NCO1ACC19 : bit absolute NCO1ACCU.3; 289 NCO1ACCU_NCO1ACC18 : bit absolute NCO1ACCU.2; 290 NCO1ACCU_NCO1ACC17 : bit absolute NCO1ACCU.1; 291 NCO1ACCU_NCO1ACC16 : bit absolute NCO1ACCU.0; 292 NCO1INCL : byte absolute $058F; 293 NCO1INCL_NCO1INC7 : bit absolute NCO1INCL.7; 294 NCO1INCL_NCO1INC6 : bit absolute NCO1INCL.6; 295 NCO1INCL_NCO1INC5 : bit absolute NCO1INCL.5; 296 NCO1INCL_NCO1INC4 : bit absolute NCO1INCL.4; 297 NCO1INCL_NCO1INC3 : bit absolute NCO1INCL.3; 298 NCO1INCL_NCO1INC2 : bit absolute NCO1INCL.2; 299 NCO1INCL_NCO1INC1 : bit absolute NCO1INCL.1; 300 NCO1INCL_NCO1INC0 : bit absolute NCO1INCL.0; 301 NCO1INCH : byte absolute $0590; 302 NCO1INCH_NCO1INC15 : bit absolute NCO1INCH.7; 303 NCO1INCH_NCO1INC14 : bit absolute NCO1INCH.6; 304 NCO1INCH_NCO1INC13 : bit absolute NCO1INCH.5; 305 NCO1INCH_NCO1INC12 : bit absolute NCO1INCH.4; 306 NCO1INCH_NCO1INC11 : bit absolute NCO1INCH.3; 307 NCO1INCH_NCO1INC10 : bit absolute NCO1INCH.2; 308 NCO1INCH_NCO1INC9 : bit absolute NCO1INCH.1; 309 NCO1INCH_NCO1INC8 : bit absolute NCO1INCH.0; 310 NCO1INCU : byte absolute $0591; 311 NCO1INCU_NCO1INC19 : bit absolute NCO1INCU.3; 312 NCO1INCU_NCO1INC18 : bit absolute NCO1INCU.2; 313 NCO1INCU_NCO1INC17 : bit absolute NCO1INCU.1; 314 NCO1INCU_NCO1INC16 : bit absolute NCO1INCU.0; 315 NCO1CON : byte absolute $0592; 316 NCO1CON_N1EN : bit absolute NCO1CON.7; 317 NCO1CON_N1OUT : bit absolute NCO1CON.5; 318 NCO1CON_N1POL : bit absolute NCO1CON.4; 319 NCO1CON_N1PFM : bit absolute NCO1CON.0; 320 NCO1CLK : byte absolute $0593; 321 NCO1CLK_N1PWS2 : bit absolute NCO1CLK.7; 322 NCO1CLK_N1PWS1 : bit absolute NCO1CLK.6; 323 NCO1CLK_N1PWS0 : bit absolute NCO1CLK.5; 324 NCO1CLK_N1CKS3 : bit absolute NCO1CLK.3; 325 NCO1CLK_N1CKS2 : bit absolute NCO1CLK.2; 326 NCO1CLK_N1CKS1 : bit absolute NCO1CLK.1; 327 NCO1CLK_N1CKS0 : bit absolute NCO1CLK.0; 328 TMR0L : byte absolute $059C; 329 TMR0H : byte absolute $059D; 330 T0CON0 : byte absolute $059E; 331 T0CON0_T0EN : bit absolute T0CON0.7; 332 T0CON0_T0OUT : bit absolute T0CON0.5; 333 T0CON0_T016BIT : bit absolute T0CON0.4; 334 T0CON0_T0OUTPS3 : bit absolute T0CON0.3; 335 T0CON0_T0OUTPS2 : bit absolute T0CON0.2; 336 T0CON0_T0OUTPS1 : bit absolute T0CON0.1; 337 T0CON0_T0OUTPS0 : bit absolute T0CON0.0; 338 T0CON1 : byte absolute $059F; 339 T0CON1_T0CS2 : bit absolute T0CON1.7; 340 T0CON1_T0CS1 : bit absolute T0CON1.6; 341 T0CON1_T0CS0 : bit absolute T0CON1.5; 342 T0CON1_T0ASYNC : bit absolute T0CON1.4; 343 T0CON1_T0CKPS3 : bit absolute T0CON1.3; 344 T0CON1_T0CKPS2 : bit absolute T0CON1.2; 345 T0CON1_T0CKPS1 : bit absolute T0CON1.1; 346 T0CON1_T0CKPS0 : bit absolute T0CON1.0; 347 CWG1CLKCON : byte absolute $060C; 348 CWG1CLKCON_CS : bit absolute CWG1CLKCON.0; 349 CWG1DAT : byte absolute $060D; 350 CWG1DAT_DAT3 : bit absolute CWG1DAT.3; 351 CWG1DAT_DAT2 : bit absolute CWG1DAT.2; 352 CWG1DAT_DAT1 : bit absolute CWG1DAT.1; 353 CWG1DAT_DAT0 : bit absolute CWG1DAT.0; 354 CWG1DBR : byte absolute $060E; 355 CWG1DBR_DBR5 : bit absolute CWG1DBR.5; 356 CWG1DBR_DBR4 : bit absolute CWG1DBR.4; 357 CWG1DBR_DBR3 : bit absolute CWG1DBR.3; 358 CWG1DBR_DBR2 : bit absolute CWG1DBR.2; 359 CWG1DBR_DBR1 : bit absolute CWG1DBR.1; 360 CWG1DBR_DBR0 : bit absolute CWG1DBR.0; 361 CWG1DBF : byte absolute $060F; 362 CWG1DBF_DBF5 : bit absolute CWG1DBF.5; 363 CWG1DBF_DBF4 : bit absolute CWG1DBF.4; 364 CWG1DBF_DBF3 : bit absolute CWG1DBF.3; 365 CWG1DBF_DBF2 : bit absolute CWG1DBF.2; 366 CWG1DBF_DBF1 : bit absolute CWG1DBF.1; 367 CWG1DBF_DBF0 : bit absolute CWG1DBF.0; 368 CWG1CON0 : byte absolute $0610; 369 CWG1CON0_LD : bit absolute CWG1CON0.6; 370 CWG1CON1 : byte absolute $0611; 371 CWG1CON1_IN : bit absolute CWG1CON1.5; 372 CWG1CON1_POLD : bit absolute CWG1CON1.3; 373 CWG1CON1_POLC : bit absolute CWG1CON1.2; 374 CWG1CON1_POLB : bit absolute CWG1CON1.1; 375 CWG1CON1_POLA : bit absolute CWG1CON1.0; 376 CWG1AS0 : byte absolute $0612; 377 CWG1AS0_SHUTDOWN : bit absolute CWG1AS0.7; 378 CWG1AS0_REN : bit absolute CWG1AS0.6; 379 CWG1AS0_LSBD1 : bit absolute CWG1AS0.5; 380 CWG1AS0_LSBD0 : bit absolute CWG1AS0.4; 381 CWG1AS0_LSAC1 : bit absolute CWG1AS0.3; 382 CWG1AS0_LSAC0 : bit absolute CWG1AS0.2; 383 CWG1AS1 : byte absolute $0613; 384 CWG1AS1_AS4E : bit absolute CWG1AS1.4; 385 CWG1AS1_AS3E : bit absolute CWG1AS1.3; 386 CWG1AS1_AS2E : bit absolute CWG1AS1.2; 387 CWG1AS1_AS1E : bit absolute CWG1AS1.1; 388 CWG1AS1_AS0E : bit absolute CWG1AS1.0; 389 CWG1STR : byte absolute $0614; 390 CWG1STR_OVRD : bit absolute CWG1STR.7; 391 CWG1STR_OVRC : bit absolute CWG1STR.6; 392 CWG1STR_OVRB : bit absolute CWG1STR.5; 393 CWG1STR_OVRA : bit absolute CWG1STR.4; 394 CWG1STR_STRD : bit absolute CWG1STR.3; 395 CWG1STR_STRC : bit absolute CWG1STR.2; 396 CWG1STR_STRB : bit absolute CWG1STR.1; 397 CWG1STR_STRA : bit absolute CWG1STR.0; 398 PIR0 : byte absolute $070C; 399 PIR0_TMR0IF : bit absolute PIR0.5; 400 PIR0_IOCIF : bit absolute PIR0.4; 401 PIR0_INTF : bit absolute PIR0.0; 402 PIR1 : byte absolute $070D; 403 PIR1_OSFIF : bit absolute PIR1.7; 404 PIR1_CSWIF : bit absolute PIR1.6; 405 PIR1_ADTIF : bit absolute PIR1.1; 406 PIR1_ADIF : bit absolute PIR1.0; 407 PIR2 : byte absolute $070E; 408 PIR2_ZCDIF : bit absolute PIR2.6; 409 PIR2_C2IF : bit absolute PIR2.1; 410 PIR2_C1IF : bit absolute PIR2.0; 411 PIR3 : byte absolute $070F; 412 PIR3_RC1IF : bit absolute PIR3.5; 413 PIR3_TX1IF : bit absolute PIR3.4; 414 PIR3_BCL1IF : bit absolute PIR3.1; 415 PIR3_SSP1IF : bit absolute PIR3.0; 416 PIR4 : byte absolute $0710; 417 PIR4_TMR2IF : bit absolute PIR4.1; 418 PIR4_TMR1IF : bit absolute PIR4.0; 419 PIR5 : byte absolute $0711; 420 PIR5_CLC4IF : bit absolute PIR5.7; 421 PIR5_CLC3IF : bit absolute PIR5.6; 422 PIR5_CLC2IF : bit absolute PIR5.5; 423 PIR5_CLC1IF : bit absolute PIR5.4; 424 PIR5_TMR1GIF : bit absolute PIR5.0; 425 PIR6 : byte absolute $0712; 426 PIR6_CCP2IF : bit absolute PIR6.1; 427 PIR6_CCP1IF : bit absolute PIR6.0; 428 PIR7 : byte absolute $0713; 429 PIR7_NVMIF : bit absolute PIR7.5; 430 PIR7_NCO1IF : bit absolute PIR7.4; 431 PIR7_CWG1IF : bit absolute PIR7.0; 432 PIE0 : byte absolute $0716; 433 PIE0_TMR0IE : bit absolute PIE0.5; 434 PIE0_IOCIE : bit absolute PIE0.4; 435 PIE0_INTE : bit absolute PIE0.0; 436 PIE1 : byte absolute $0717; 437 PIE1_OSFIE : bit absolute PIE1.7; 438 PIE1_CSWIE : bit absolute PIE1.6; 439 PIE1_ADIE : bit absolute PIE1.0; 440 PIE2 : byte absolute $0718; 441 PIE2_ZCDIE : bit absolute PIE2.6; 442 PIE2_C2IE : bit absolute PIE2.1; 443 PIE2_C1IE : bit absolute PIE2.0; 444 PIE3 : byte absolute $0719; 445 PIE3_RC1IE : bit absolute PIE3.5; 446 PIE3_TX1IE : bit absolute PIE3.4; 447 PIE3_BCL1IE : bit absolute PIE3.1; 448 PIE3_SSP1IE : bit absolute PIE3.0; 449 PIE4 : byte absolute $071A; 450 PIE4_TMR2IE : bit absolute PIE4.1; 451 PIE4_TMR1IE : bit absolute PIE4.0; 452 PIE5 : byte absolute $071B; 453 PIE5_CLC4IE : bit absolute PIE5.7; 454 PIE5_CLC3IE : bit absolute PIE5.6; 455 PIE5_CLC2IE : bit absolute PIE5.5; 456 PIE5_CLC1IE : bit absolute PIE5.4; 457 PIE5_TMR1GIE : bit absolute PIE5.0; 458 PIE6 : byte absolute $071C; 459 PIE6_CCP2IE : bit absolute PIE6.1; 460 PIE6_CCP1IE : bit absolute PIE6.0; 461 PIE7 : byte absolute $071D; 462 PIE7_NVMIE : bit absolute PIE7.5; 463 PIE7_NCO1IE : bit absolute PIE7.4; 464 PIE7_CWG1IE : bit absolute PIE7.0; 465 PMD0 : byte absolute $0796; 466 PMD0_SYSCMD : bit absolute PMD0.7; 467 PMD0_FVRMD : bit absolute PMD0.6; 468 PMD0_NVMMD : bit absolute PMD0.2; 469 PMD0_CLKRMD : bit absolute PMD0.1; 470 PMD0_IOCMD : bit absolute PMD0.0; 471 PMD1 : byte absolute $0797; 472 PMD1_DDS1MD : bit absolute PMD1.7; 473 PMD1_TMR2MD : bit absolute PMD1.2; 474 PMD1_TMR1MD : bit absolute PMD1.1; 475 PMD1_TMR0MD : bit absolute PMD1.0; 476 PMD2 : byte absolute $0798; 477 PMD2_DAC1MD : bit absolute PMD2.6; 478 PMD2_ADCMD : bit absolute PMD2.5; 479 PMD2_CMP2MD : bit absolute PMD2.2; 480 PMD2_CMP1MD : bit absolute PMD2.1; 481 PMD2_ZCDMD : bit absolute PMD2.0; 482 PMD3 : byte absolute $0799; 483 PMD3_PWM6MD : bit absolute PMD3.5; 484 PMD3_PWM5MD : bit absolute PMD3.4; 485 PMD3_PWM4MD : bit absolute PMD3.3; 486 PMD3_PWM3MD : bit absolute PMD3.2; 487 PMD3_CCP2MD : bit absolute PMD3.1; 488 PMD3_CCP1MD : bit absolute PMD3.0; 489 PMD4 : byte absolute $079A; 490 PMD4_UART1MD : bit absolute PMD4.6; 491 PMD4_MSSP1MD : bit absolute PMD4.4; 492 PMD4_CWG1MD : bit absolute PMD4.0; 493 PMD5 : byte absolute $079B; 494 PMD5_CLC4MD : bit absolute PMD5.4; 495 PMD5_CLC3MD : bit absolute PMD5.3; 496 PMD5_CLC2MD : bit absolute PMD5.2; 497 PMD5_CLC1MD : bit absolute PMD5.1; 498 WDTCON0 : byte absolute $080C; 499 WDTCON0_WDTPS4 : bit absolute WDTCON0.5; 500 WDTCON0_WDTPS3 : bit absolute WDTCON0.4; 501 WDTCON0_WDTPS2 : bit absolute WDTCON0.3; 502 WDTCON0_WDTPS1 : bit absolute WDTCON0.2; 503 WDTCON0_WDTPS0 : bit absolute WDTCON0.1; 504 WDTCON1 : byte absolute $080D; 505 WDTCON1_WDTCS2 : bit absolute WDTCON1.6; 506 WDTCON1_WDTCS1 : bit absolute WDTCON1.5; 507 WDTCON1_WDTCS0 : bit absolute WDTCON1.4; 508 WDTCON1_WINDOW2 : bit absolute WDTCON1.2; 509 WDTCON1_WINDOW1 : bit absolute WDTCON1.1; 510 WDTCON1_WINDOW0 : bit absolute WDTCON1.0; 511 WDTPSL : byte absolute $080E; 512 WDTPSH : byte absolute $080F; 513 WDTTMR : byte absolute $0810; 514 WDTTMR_WDTTMR4 : bit absolute WDTTMR.7; 515 WDTTMR_WDTTMR3 : bit absolute WDTTMR.6; 516 WDTTMR_WDTTMR2 : bit absolute WDTTMR.5; 517 WDTTMR_WDTTMR1 : bit absolute WDTTMR.4; 518 WDTTMR_WDTTMR0 : bit absolute WDTTMR.3; 519 WDTTMR_STATE : bit absolute WDTTMR.2; 520 WDTTMR_PSCNT17 : bit absolute WDTTMR.1; 521 WDTTMR_PSCNT16 : bit absolute WDTTMR.0; 522 BORCON : byte absolute $0811; 523 BORCON_SBOREN : bit absolute BORCON.7; 524 BORCON_BORRDY : bit absolute BORCON.0; 525 VREGCON : byte absolute $0812; 526 VREGCON_VREGPM : bit absolute VREGCON.1; 527 PCON0 : byte absolute $0813; 528 PCON0_STKOVF : bit absolute PCON0.7; 529 PCON0_STKUNF : bit absolute PCON0.6; 530 PCON0_nWDTWV : bit absolute PCON0.5; 531 PCON0_nRWDT : bit absolute PCON0.4; 532 PCON0_nRMCLR : bit absolute PCON0.3; 533 PCON0_nRI : bit absolute PCON0.2; 534 PCON0_nPOR : bit absolute PCON0.1; 535 PCON0_nBOR : bit absolute PCON0.0; 536 PCON1 : byte absolute $0814; 537 PCON1_nMEMV : bit absolute PCON1.1; 538 NVMADRL : byte absolute $081A; 539 NVMADRL_NVMADRL7 : bit absolute NVMADRL.7; 540 NVMADRL_NVMADRL6 : bit absolute NVMADRL.6; 541 NVMADRL_NVMADRL5 : bit absolute NVMADRL.5; 542 NVMADRL_NVMADRL4 : bit absolute NVMADRL.4; 543 NVMADRL_NVMADRL3 : bit absolute NVMADRL.3; 544 NVMADRL_NVMADRL2 : bit absolute NVMADRL.2; 545 NVMADRL_NVMADRL1 : bit absolute NVMADRL.1; 546 NVMADRL_NVMADRL0 : bit absolute NVMADRL.0; 547 NVMADRH : byte absolute $081B; 548 NVMADRH_NVMADRH6 : bit absolute NVMADRH.6; 549 NVMADRH_NVMADRH5 : bit absolute NVMADRH.5; 550 NVMADRH_NVMADRH4 : bit absolute NVMADRH.4; 551 NVMADRH_NVMADRH3 : bit absolute NVMADRH.3; 552 NVMADRH_NVMADRH2 : bit absolute NVMADRH.2; 553 NVMADRH_NVMADRH1 : bit absolute NVMADRH.1; 554 NVMADRH_NVMADRH0 : bit absolute NVMADRH.0; 555 NVMDATL : byte absolute $081C; 556 NVMDATL_NVMDATL7 : bit absolute NVMDATL.7; 557 NVMDATL_NVMDATL6 : bit absolute NVMDATL.6; 558 NVMDATL_NVMDATL5 : bit absolute NVMDATL.5; 559 NVMDATL_NVMDATL4 : bit absolute NVMDATL.4; 560 NVMDATL_NVMDATL3 : bit absolute NVMDATL.3; 561 NVMDATL_NVMDATL2 : bit absolute NVMDATL.2; 562 NVMDATL_NVMDATL1 : bit absolute NVMDATL.1; 563 NVMDATL_NVMDATL0 : bit absolute NVMDATL.0; 564 NVMDATH : byte absolute $081D; 565 NVMDATH_NVMDATH5 : bit absolute NVMDATH.5; 566 NVMDATH_NVMDATH4 : bit absolute NVMDATH.4; 567 NVMDATH_NVMDATH3 : bit absolute NVMDATH.3; 568 NVMDATH_NVMDATH2 : bit absolute NVMDATH.2; 569 NVMDATH_NVMDATH1 : bit absolute NVMDATH.1; 570 NVMDATH_NVMDATH0 : bit absolute NVMDATH.0; 571 NVMCON1 : byte absolute $081E; 572 NVMCON1_NVMREGS : bit absolute NVMCON1.6; 573 NVMCON1_LWLO : bit absolute NVMCON1.5; 574 NVMCON1_FREE : bit absolute NVMCON1.4; 575 NVMCON1_WRERR : bit absolute NVMCON1.3; 576 NVMCON1_WREN : bit absolute NVMCON1.2; 577 NVMCON1_WR : bit absolute NVMCON1.1; 578 NVMCON1_RD : bit absolute NVMCON1.0; 579 NVMCON2 : byte absolute $081F; 580 CPUDOZE : byte absolute $088C; 581 CPUDOZE_IDLEN : bit absolute CPUDOZE.7; 582 CPUDOZE_DOZEN : bit absolute CPUDOZE.6; 583 CPUDOZE_ROI : bit absolute CPUDOZE.5; 584 CPUDOZE_DOE : bit absolute CPUDOZE.4; 585 CPUDOZE_DOZE2 : bit absolute CPUDOZE.2; 586 CPUDOZE_DOZE1 : bit absolute CPUDOZE.1; 587 CPUDOZE_DOZE0 : bit absolute CPUDOZE.0; 588 OSCCON1 : byte absolute $088D; 589 OSCCON1_NOSC2 : bit absolute OSCCON1.6; 590 OSCCON1_NOSC1 : bit absolute OSCCON1.5; 591 OSCCON1_NOSC0 : bit absolute OSCCON1.4; 592 OSCCON1_NDIV3 : bit absolute OSCCON1.3; 593 OSCCON1_NDIV2 : bit absolute OSCCON1.2; 594 OSCCON1_NDIV1 : bit absolute OSCCON1.1; 595 OSCCON1_NDIV0 : bit absolute OSCCON1.0; 596 OSCCON2 : byte absolute $088E; 597 OSCCON2_COSC2 : bit absolute OSCCON2.6; 598 OSCCON2_COSC1 : bit absolute OSCCON2.5; 599 OSCCON2_COSC0 : bit absolute OSCCON2.4; 600 OSCCON2_CDIV3 : bit absolute OSCCON2.3; 601 OSCCON2_CDIV2 : bit absolute OSCCON2.2; 602 OSCCON2_CDIV1 : bit absolute OSCCON2.1; 603 OSCCON2_CDIV0 : bit absolute OSCCON2.0; 604 OSCCON3 : byte absolute $088F; 605 OSCCON3_CSWHOLD : bit absolute OSCCON3.7; 606 OSCCON3_ORDY : bit absolute OSCCON3.4; 607 OSCCON3_NOSCR : bit absolute OSCCON3.3; 608 OSCSTAT : byte absolute $0890; 609 OSCSTAT_EXTOR : bit absolute OSCSTAT.7; 610 OSCSTAT_HFOR : bit absolute OSCSTAT.6; 611 OSCSTAT_MFOR : bit absolute OSCSTAT.5; 612 OSCSTAT_LFOR : bit absolute OSCSTAT.4; 613 OSCSTAT_ADOR : bit absolute OSCSTAT.2; 614 OSCSTAT_PLLR : bit absolute OSCSTAT.0; 615 OSCEN : byte absolute $0891; 616 OSCEN_EXTOEN : bit absolute OSCEN.7; 617 OSCEN_HFOEN : bit absolute OSCEN.6; 618 OSCEN_MFOEN : bit absolute OSCEN.5; 619 OSCEN_LFOEN : bit absolute OSCEN.4; 620 OSCEN_ADOEN : bit absolute OSCEN.2; 621 OSCTUNE : byte absolute $0892; 622 OSCTUNE_HFTUN5 : bit absolute OSCTUNE.5; 623 OSCTUNE_HFTUN4 : bit absolute OSCTUNE.4; 624 OSCTUNE_HFTUN3 : bit absolute OSCTUNE.3; 625 OSCTUNE_HFTUN2 : bit absolute OSCTUNE.2; 626 OSCTUNE_HFTUN1 : bit absolute OSCTUNE.1; 627 OSCTUNE_HFTUN0 : bit absolute OSCTUNE.0; 628 OSCFRQ : byte absolute $0893; 629 OSCFRQ_HFFRQ2 : bit absolute OSCFRQ.2; 630 OSCFRQ_HFFRQ1 : bit absolute OSCFRQ.1; 631 OSCFRQ_HFFRQ0 : bit absolute OSCFRQ.0; 632 CLKRCON : byte absolute $0895; 633 CLKRCON_CLKREN : bit absolute CLKRCON.7; 634 CLKRCON_CLKRDC1 : bit absolute CLKRCON.4; 635 CLKRCON_CLKRDC0 : bit absolute CLKRCON.3; 636 CLKRCON_CLKRDIV2 : bit absolute CLKRCON.2; 637 CLKRCON_CLKRDIV1 : bit absolute CLKRCON.1; 638 CLKRCON_CLKRDIV0 : bit absolute CLKRCON.0; 639 CLKRCLK : byte absolute $0896; 640 CLKRCLK_CLKRCLK3 : bit absolute CLKRCLK.3; 641 CLKRCLK_CLKRCLK2 : bit absolute CLKRCLK.2; 642 CLKRCLK_CLKRCLK1 : bit absolute CLKRCLK.1; 643 CLKRCLK_CLKRCLK0 : bit absolute CLKRCLK.0; 644 FVRCON : byte absolute $090C; 645 FVRCON_FVREN : bit absolute FVRCON.7; 646 FVRCON_FVRRDY : bit absolute FVRCON.6; 647 FVRCON_TSEN : bit absolute FVRCON.5; 648 FVRCON_TSRNG : bit absolute FVRCON.4; 649 FVRCON_CDAFVR1 : bit absolute FVRCON.3; 650 FVRCON_CDAFVR0 : bit absolute FVRCON.2; 651 FVRCON_ADFVR1 : bit absolute FVRCON.1; 652 FVRCON_ADFVR0 : bit absolute FVRCON.0; 653 DAC1CON0 : byte absolute $090E; 654 DAC1CON0_OE1 : bit absolute DAC1CON0.5; 655 DAC1CON0_OE2 : bit absolute DAC1CON0.4; 656 DAC1CON0_PSS1 : bit absolute DAC1CON0.3; 657 DAC1CON0_PSS0 : bit absolute DAC1CON0.2; 658 DAC1CON0_NSS : bit absolute DAC1CON0.0; 659 DAC1CON1 : byte absolute $090F; 660 DAC1CON1_DAC1R4 : bit absolute DAC1CON1.4; 661 DAC1CON1_DAC1R3 : bit absolute DAC1CON1.3; 662 DAC1CON1_DAC1R2 : bit absolute DAC1CON1.2; 663 DAC1CON1_DAC1R1 : bit absolute DAC1CON1.1; 664 DAC1CON1_DAC1R0 : bit absolute DAC1CON1.0; 665 ZCDCON : byte absolute $091F; 666 ZCDCON_ZCDSEN : bit absolute ZCDCON.7; 667 ZCDCON_ZCDOUT : bit absolute ZCDCON.5; 668 ZCDCON_ZCDPOL : bit absolute ZCDCON.4; 669 ZCDCON_ZCDINTP : bit absolute ZCDCON.1; 670 ZCDCON_ZCDINTN : bit absolute ZCDCON.0; 671 CMOUT : byte absolute $098F; 672 CMOUT_MC2OUT : bit absolute CMOUT.1; 673 CMOUT_MC1OUT : bit absolute CMOUT.0; 674 CM1CON0 : byte absolute $0990; 675 CM1CON0_HYS : bit absolute CM1CON0.1; 676 CM1CON1 : byte absolute $0991; 677 CM1CON1_INTP : bit absolute CM1CON1.1; 678 CM1CON1_INTN : bit absolute CM1CON1.0; 679 CM1NCH : byte absolute $0992; 680 CM1NCH_NCH2 : bit absolute CM1NCH.2; 681 CM1NCH_NCH1 : bit absolute CM1NCH.1; 682 CM1NCH_NCH0 : bit absolute CM1NCH.0; 683 CM1PCH : byte absolute $0993; 684 CM1PCH_PCH2 : bit absolute CM1PCH.2; 685 CM1PCH_PCH1 : bit absolute CM1PCH.1; 686 CM1PCH_PCH0 : bit absolute CM1PCH.0; 687 CM2CON0 : byte absolute $0994; 688 CM2CON1 : byte absolute $0995; 689 CM2NCH : byte absolute $0996; 690 CM2PCH : byte absolute $0997; 691 CLCDATA : byte absolute $1E0F; 692 CLCDATA_MLC4OUT : bit absolute CLCDATA.3; 693 CLCDATA_MLC3OUT : bit absolute CLCDATA.2; 694 CLCDATA_MLC2OUT : bit absolute CLCDATA.1; 695 CLCDATA_MLC1OUT : bit absolute CLCDATA.0; 696 CLC1CON : byte absolute $1E10; 697 CLC1CON_LC1EN : bit absolute CLC1CON.7; 698 CLC1CON_LC1OUT : bit absolute CLC1CON.5; 699 CLC1CON_LC1INTP : bit absolute CLC1CON.4; 700 CLC1CON_LC1INTN : bit absolute CLC1CON.3; 701 CLC1CON_LC1MODE2 : bit absolute CLC1CON.2; 702 CLC1CON_LC1MODE1 : bit absolute CLC1CON.1; 703 CLC1CON_LC1MODE0 : bit absolute CLC1CON.0; 704 CLC1POL : byte absolute $1E11; 705 CLC1POL_LC1POL : bit absolute CLC1POL.7; 706 CLC1POL_LC1G4POL : bit absolute CLC1POL.3; 707 CLC1POL_LC1G3POL : bit absolute CLC1POL.2; 708 CLC1POL_LC1G2POL : bit absolute CLC1POL.1; 709 CLC1POL_LC1G1POL : bit absolute CLC1POL.0; 710 CLC1SEL0 : byte absolute $1E12; 711 CLC1SEL0_LC1D1S5 : bit absolute CLC1SEL0.5; 712 CLC1SEL0_LC1D1S4 : bit absolute CLC1SEL0.4; 713 CLC1SEL0_LC1D1S3 : bit absolute CLC1SEL0.3; 714 CLC1SEL0_LC1D1S2 : bit absolute CLC1SEL0.2; 715 CLC1SEL0_LC1D1S1 : bit absolute CLC1SEL0.1; 716 CLC1SEL0_LC1D1S0 : bit absolute CLC1SEL0.0; 717 CLC1SEL1 : byte absolute $1E13; 718 CLC1SEL1_LC1D2S5 : bit absolute CLC1SEL1.5; 719 CLC1SEL1_LC1D2S4 : bit absolute CLC1SEL1.4; 720 CLC1SEL1_LC1D2S3 : bit absolute CLC1SEL1.3; 721 CLC1SEL1_LC1D2S2 : bit absolute CLC1SEL1.2; 722 CLC1SEL1_LC1D2S1 : bit absolute CLC1SEL1.1; 723 CLC1SEL1_LC1D2S0 : bit absolute CLC1SEL1.0; 724 CLC1SEL2 : byte absolute $1E14; 725 CLC1SEL2_LC1D3S5 : bit absolute CLC1SEL2.5; 726 CLC1SEL2_LC1D3S4 : bit absolute CLC1SEL2.4; 727 CLC1SEL2_LC1D3S3 : bit absolute CLC1SEL2.3; 728 CLC1SEL2_LC1D3S2 : bit absolute CLC1SEL2.2; 729 CLC1SEL2_LC1D3S1 : bit absolute CLC1SEL2.1; 730 CLC1SEL2_LC1D3S0 : bit absolute CLC1SEL2.0; 731 CLC1SEL3 : byte absolute $1E15; 732 CLC1SEL3_LC1D4S5 : bit absolute CLC1SEL3.5; 733 CLC1SEL3_LC1D4S4 : bit absolute CLC1SEL3.4; 734 CLC1SEL3_LC1D4S3 : bit absolute CLC1SEL3.3; 735 CLC1SEL3_LC1D4S2 : bit absolute CLC1SEL3.2; 736 CLC1SEL3_LC1D4S1 : bit absolute CLC1SEL3.1; 737 CLC1SEL3_LC1D4S0 : bit absolute CLC1SEL3.0; 738 CLC1GLS0 : byte absolute $1E16; 739 CLC1GLS0_LC1G1D4T : bit absolute CLC1GLS0.7; 740 CLC1GLS0_LC1G1D4N : bit absolute CLC1GLS0.6; 741 CLC1GLS0_LC1G1D3T : bit absolute CLC1GLS0.5; 742 CLC1GLS0_LC1G1D3N : bit absolute CLC1GLS0.4; 743 CLC1GLS0_LC1G1D2T : bit absolute CLC1GLS0.3; 744 CLC1GLS0_LC1G1D2N : bit absolute CLC1GLS0.2; 745 CLC1GLS0_LC1G1D1T : bit absolute CLC1GLS0.1; 746 CLC1GLS0_LC1G1D1N : bit absolute CLC1GLS0.0; 747 CLC1GLS1 : byte absolute $1E17; 748 CLC1GLS1_LC1G2D4T : bit absolute CLC1GLS1.7; 749 CLC1GLS1_LC1G2D4N : bit absolute CLC1GLS1.6; 750 CLC1GLS1_LC1G2D3T : bit absolute CLC1GLS1.5; 751 CLC1GLS1_LC1G2D3N : bit absolute CLC1GLS1.4; 752 CLC1GLS1_LC1G2D2T : bit absolute CLC1GLS1.3; 753 CLC1GLS1_LC1G2D2N : bit absolute CLC1GLS1.2; 754 CLC1GLS1_LC1G2D1T : bit absolute CLC1GLS1.1; 755 CLC1GLS1_LC1G2D1N : bit absolute CLC1GLS1.0; 756 CLC1GLS2 : byte absolute $1E18; 757 CLC1GLS2_LC1G3D4T : bit absolute CLC1GLS2.7; 758 CLC1GLS2_LC1G3D4N : bit absolute CLC1GLS2.6; 759 CLC1GLS2_LC1G3D3T : bit absolute CLC1GLS2.5; 760 CLC1GLS2_LC1G3D3N : bit absolute CLC1GLS2.4; 761 CLC1GLS2_LC1G3D2T : bit absolute CLC1GLS2.3; 762 CLC1GLS2_LC1G3D2N : bit absolute CLC1GLS2.2; 763 CLC1GLS2_LC1G3D1T : bit absolute CLC1GLS2.1; 764 CLC1GLS2_LC1G3D1N : bit absolute CLC1GLS2.0; 765 CLC1GLS3 : byte absolute $1E19; 766 CLC1GLS3_LC1G4D4T : bit absolute CLC1GLS3.7; 767 CLC1GLS3_LC1G4D4N : bit absolute CLC1GLS3.6; 768 CLC1GLS3_LC1G4D3T : bit absolute CLC1GLS3.5; 769 CLC1GLS3_LC1G4D3N : bit absolute CLC1GLS3.4; 770 CLC1GLS3_LC1G4D2T : bit absolute CLC1GLS3.3; 771 CLC1GLS3_LC1G4D2N : bit absolute CLC1GLS3.2; 772 CLC1GLS3_LC1G4D1T : bit absolute CLC1GLS3.1; 773 CLC1GLS3_LC1G4D1N : bit absolute CLC1GLS3.0; 774 CLC2CON : byte absolute $1E1A; 775 CLC2CON_LC2EN : bit absolute CLC2CON.7; 776 CLC2CON_LC2OUT : bit absolute CLC2CON.5; 777 CLC2CON_LC2INTP : bit absolute CLC2CON.4; 778 CLC2CON_LC2INTN : bit absolute CLC2CON.3; 779 CLC2CON_LC2MODE2 : bit absolute CLC2CON.2; 780 CLC2CON_LC2MODE1 : bit absolute CLC2CON.1; 781 CLC2CON_LC2MODE0 : bit absolute CLC2CON.0; 782 CLC2POL : byte absolute $1E1B; 783 CLC2POL_LC2POL : bit absolute CLC2POL.7; 784 CLC2POL_LC2G4POL : bit absolute CLC2POL.3; 785 CLC2POL_LC2G3POL : bit absolute CLC2POL.2; 786 CLC2POL_LC2G2POL : bit absolute CLC2POL.1; 787 CLC2POL_LC2G1POL : bit absolute CLC2POL.0; 788 CLC2SEL0 : byte absolute $1E1C; 789 CLC2SEL0_LC2D1S5 : bit absolute CLC2SEL0.5; 790 CLC2SEL0_LC2D1S4 : bit absolute CLC2SEL0.4; 791 CLC2SEL0_LC2D1S3 : bit absolute CLC2SEL0.3; 792 CLC2SEL0_LC2D1S2 : bit absolute CLC2SEL0.2; 793 CLC2SEL0_LC2D1S1 : bit absolute CLC2SEL0.1; 794 CLC2SEL0_LC2D1S0 : bit absolute CLC2SEL0.0; 795 CLC2SEL1 : byte absolute $1E1D; 796 CLC2SEL1_LC2D2S5 : bit absolute CLC2SEL1.5; 797 CLC2SEL1_LC2D2S4 : bit absolute CLC2SEL1.4; 798 CLC2SEL1_LC2D2S3 : bit absolute CLC2SEL1.3; 799 CLC2SEL1_LC2D2S2 : bit absolute CLC2SEL1.2; 800 CLC2SEL1_LC2D2S1 : bit absolute CLC2SEL1.1; 801 CLC2SEL1_LC2D2S0 : bit absolute CLC2SEL1.0; 802 CLC2SEL2 : byte absolute $1E1E; 803 CLC2SEL2_LC2D3S5 : bit absolute CLC2SEL2.5; 804 CLC2SEL2_LC2D3S4 : bit absolute CLC2SEL2.4; 805 CLC2SEL2_LC2D3S3 : bit absolute CLC2SEL2.3; 806 CLC2SEL2_LC2D3S2 : bit absolute CLC2SEL2.2; 807 CLC2SEL2_LC2D3S1 : bit absolute CLC2SEL2.1; 808 CLC2SEL2_LC2D3S0 : bit absolute CLC2SEL2.0; 809 CLC2SEL3 : byte absolute $1E1F; 810 CLC2SEL3_LC2D4S5 : bit absolute CLC2SEL3.5; 811 CLC2SEL3_LC2D4S4 : bit absolute CLC2SEL3.4; 812 CLC2SEL3_LC2D4S3 : bit absolute CLC2SEL3.3; 813 CLC2SEL3_LC2D4S2 : bit absolute CLC2SEL3.2; 814 CLC2SEL3_LC2D4S1 : bit absolute CLC2SEL3.1; 815 CLC2SEL3_LC2D4S0 : bit absolute CLC2SEL3.0; 816 CLC2GLS0 : byte absolute $1E20; 817 CLC2GLS0_LC2G1D4T : bit absolute CLC2GLS0.7; 818 CLC2GLS0_LC2G1D4N : bit absolute CLC2GLS0.6; 819 CLC2GLS0_LC2G1D3T : bit absolute CLC2GLS0.5; 820 CLC2GLS0_LC2G1D3N : bit absolute CLC2GLS0.4; 821 CLC2GLS0_LC2G1D2T : bit absolute CLC2GLS0.3; 822 CLC2GLS0_LC2G1D2N : bit absolute CLC2GLS0.2; 823 CLC2GLS0_LC2G1D1T : bit absolute CLC2GLS0.1; 824 CLC2GLS0_LC2G1D1N : bit absolute CLC2GLS0.0; 825 CLC2GLS1 : byte absolute $1E21; 826 CLC2GLS1_LC2G2D4T : bit absolute CLC2GLS1.7; 827 CLC2GLS1_LC2G2D4N : bit absolute CLC2GLS1.6; 828 CLC2GLS1_LC2G2D3T : bit absolute CLC2GLS1.5; 829 CLC2GLS1_LC2G2D3N : bit absolute CLC2GLS1.4; 830 CLC2GLS1_LC2G2D2T : bit absolute CLC2GLS1.3; 831 CLC2GLS1_LC2G2D2N : bit absolute CLC2GLS1.2; 832 CLC2GLS1_LC2G2D1T : bit absolute CLC2GLS1.1; 833 CLC2GLS1_LC2G2D1N : bit absolute CLC2GLS1.0; 834 CLC2GLS2 : byte absolute $1E22; 835 CLC2GLS2_LC2G3D4T : bit absolute CLC2GLS2.7; 836 CLC2GLS2_LC2G3D4N : bit absolute CLC2GLS2.6; 837 CLC2GLS2_LC2G3D3T : bit absolute CLC2GLS2.5; 838 CLC2GLS2_LC2G3D3N : bit absolute CLC2GLS2.4; 839 CLC2GLS2_LC2G3D2T : bit absolute CLC2GLS2.3; 840 CLC2GLS2_LC2G3D2N : bit absolute CLC2GLS2.2; 841 CLC2GLS2_LC2G3D1T : bit absolute CLC2GLS2.1; 842 CLC2GLS2_LC2G3D1N : bit absolute CLC2GLS2.0; 843 CLC2GLS3 : byte absolute $1E23; 844 CLC2GLS3_LC2G4D4T : bit absolute CLC2GLS3.7; 845 CLC2GLS3_LC2G4D4N : bit absolute CLC2GLS3.6; 846 CLC2GLS3_LC2G4D3T : bit absolute CLC2GLS3.5; 847 CLC2GLS3_LC2G4D3N : bit absolute CLC2GLS3.4; 848 CLC2GLS3_LC2G4D2T : bit absolute CLC2GLS3.3; 849 CLC2GLS3_LC2G4D2N : bit absolute CLC2GLS3.2; 850 CLC2GLS3_LC2G4D1T : bit absolute CLC2GLS3.1; 851 CLC2GLS3_LC2G4D1N : bit absolute CLC2GLS3.0; 852 CLC3CON : byte absolute $1E24; 853 CLC3CON_LC3EN : bit absolute CLC3CON.7; 854 CLC3CON_LC3OUT : bit absolute CLC3CON.5; 855 CLC3CON_LC3INTP : bit absolute CLC3CON.4; 856 CLC3CON_LC3INTN : bit absolute CLC3CON.3; 857 CLC3CON_LC3MODE2 : bit absolute CLC3CON.2; 858 CLC3CON_LC3MODE1 : bit absolute CLC3CON.1; 859 CLC3CON_LC3MODE0 : bit absolute CLC3CON.0; 860 CLC3POL : byte absolute $1E25; 861 CLC3POL_LC3POL : bit absolute CLC3POL.7; 862 CLC3POL_LC3G4POL : bit absolute CLC3POL.3; 863 CLC3POL_LC3G3POL : bit absolute CLC3POL.2; 864 CLC3POL_LC3G2POL : bit absolute CLC3POL.1; 865 CLC3POL_LC3G1POL : bit absolute CLC3POL.0; 866 CLC3SEL0 : byte absolute $1E26; 867 CLC3SEL0_LC3D1S5 : bit absolute CLC3SEL0.5; 868 CLC3SEL0_LC3D1S4 : bit absolute CLC3SEL0.4; 869 CLC3SEL0_LC3D1S3 : bit absolute CLC3SEL0.3; 870 CLC3SEL0_LC3D1S2 : bit absolute CLC3SEL0.2; 871 CLC3SEL0_LC3D1S1 : bit absolute CLC3SEL0.1; 872 CLC3SEL0_LC3D1S0 : bit absolute CLC3SEL0.0; 873 CLC3SEL1 : byte absolute $1E27; 874 CLC3SEL1_LC3D2S5 : bit absolute CLC3SEL1.5; 875 CLC3SEL1_LC3D2S4 : bit absolute CLC3SEL1.4; 876 CLC3SEL1_LC3D2S3 : bit absolute CLC3SEL1.3; 877 CLC3SEL1_LC3D2S2 : bit absolute CLC3SEL1.2; 878 CLC3SEL1_LC3D2S1 : bit absolute CLC3SEL1.1; 879 CLC3SEL1_LC3D2S0 : bit absolute CLC3SEL1.0; 880 CLC3SEL2 : byte absolute $1E28; 881 CLC3SEL2_LC3D3S5 : bit absolute CLC3SEL2.5; 882 CLC3SEL2_LC3D3S4 : bit absolute CLC3SEL2.4; 883 CLC3SEL2_LC3D3S3 : bit absolute CLC3SEL2.3; 884 CLC3SEL2_LC3D3S2 : bit absolute CLC3SEL2.2; 885 CLC3SEL2_LC3D3S1 : bit absolute CLC3SEL2.1; 886 CLC3SEL2_LC3D3S0 : bit absolute CLC3SEL2.0; 887 CLC3SEL3 : byte absolute $1E29; 888 CLC3SEL3_LC3D4S5 : bit absolute CLC3SEL3.5; 889 CLC3SEL3_LC3D4S4 : bit absolute CLC3SEL3.4; 890 CLC3SEL3_LC3D4S3 : bit absolute CLC3SEL3.3; 891 CLC3SEL3_LC3D4S2 : bit absolute CLC3SEL3.2; 892 CLC3SEL3_LC3D4S1 : bit absolute CLC3SEL3.1; 893 CLC3SEL3_LC3D4S0 : bit absolute CLC3SEL3.0; 894 CLC3GLS0 : byte absolute $1E2A; 895 CLC3GLS0_LC3G1D4T : bit absolute CLC3GLS0.7; 896 CLC3GLS0_LC3G1D4N : bit absolute CLC3GLS0.6; 897 CLC3GLS0_LC3G1D3T : bit absolute CLC3GLS0.5; 898 CLC3GLS0_LC3G1D3N : bit absolute CLC3GLS0.4; 899 CLC3GLS0_LC3G1D2T : bit absolute CLC3GLS0.3; 900 CLC3GLS0_LC3G1D2N : bit absolute CLC3GLS0.2; 901 CLC3GLS0_LC3G1D1T : bit absolute CLC3GLS0.1; 902 CLC3GLS0_LC3G1D1N : bit absolute CLC3GLS0.0; 903 CLC3GLS1 : byte absolute $1E2B; 904 CLC3GLS1_LC3G2D4T : bit absolute CLC3GLS1.7; 905 CLC3GLS1_LC3G2D4N : bit absolute CLC3GLS1.6; 906 CLC3GLS1_LC3G2D3T : bit absolute CLC3GLS1.5; 907 CLC3GLS1_LC3G2D3N : bit absolute CLC3GLS1.4; 908 CLC3GLS1_LC3G2D2T : bit absolute CLC3GLS1.3; 909 CLC3GLS1_LC3G2D2N : bit absolute CLC3GLS1.2; 910 CLC3GLS1_LC3G2D1T : bit absolute CLC3GLS1.1; 911 CLC3GLS1_LC3G2D1N : bit absolute CLC3GLS1.0; 912 CLC3GLS2 : byte absolute $1E2C; 913 CLC3GLS2_LC3G3D4T : bit absolute CLC3GLS2.7; 914 CLC3GLS2_LC3G3D4N : bit absolute CLC3GLS2.6; 915 CLC3GLS2_LC3G3D3T : bit absolute CLC3GLS2.5; 916 CLC3GLS2_LC3G3D3N : bit absolute CLC3GLS2.4; 917 CLC3GLS2_LC3G3D2T : bit absolute CLC3GLS2.3; 918 CLC3GLS2_LC3G3D2N : bit absolute CLC3GLS2.2; 919 CLC3GLS2_LC3G3D1T : bit absolute CLC3GLS2.1; 920 CLC3GLS2_LC3G3D1N : bit absolute CLC3GLS2.0; 921 CLC3GLS3 : byte absolute $1E2D; 922 CLC3GLS3_LC3G4D4T : bit absolute CLC3GLS3.7; 923 CLC3GLS3_LC3G4D4N : bit absolute CLC3GLS3.6; 924 CLC3GLS3_LC3G4D3T : bit absolute CLC3GLS3.5; 925 CLC3GLS3_LC3G4D3N : bit absolute CLC3GLS3.4; 926 CLC3GLS3_LC3G4D2T : bit absolute CLC3GLS3.3; 927 CLC3GLS3_LC3G4D2N : bit absolute CLC3GLS3.2; 928 CLC3GLS3_LC3G4D1T : bit absolute CLC3GLS3.1; 929 CLC3GLS3_LC3G4D1N : bit absolute CLC3GLS3.0; 930 CLC4CON : byte absolute $1E2E; 931 CLC4CON_LC4EN : bit absolute CLC4CON.7; 932 CLC4CON_LC4OUT : bit absolute CLC4CON.5; 933 CLC4CON_LC4INTP : bit absolute CLC4CON.4; 934 CLC4CON_LC4INTN : bit absolute CLC4CON.3; 935 CLC4CON_LC4MODE2 : bit absolute CLC4CON.2; 936 CLC4CON_LC4MODE1 : bit absolute CLC4CON.1; 937 CLC4CON_LC4MODE0 : bit absolute CLC4CON.0; 938 CLC4POL : byte absolute $1E2F; 939 CLC4POL_LC4POL : bit absolute CLC4POL.7; 940 CLC4POL_LC4G4POL : bit absolute CLC4POL.3; 941 CLC4POL_LC4G3POL : bit absolute CLC4POL.2; 942 CLC4POL_LC4G2POL : bit absolute CLC4POL.1; 943 CLC4POL_LC4G1POL : bit absolute CLC4POL.0; 944 CLC4SEL0 : byte absolute $1E30; 945 CLC4SEL0_LC4D1S5 : bit absolute CLC4SEL0.5; 946 CLC4SEL0_LC4D1S4 : bit absolute CLC4SEL0.4; 947 CLC4SEL0_LC4D1S3 : bit absolute CLC4SEL0.3; 948 CLC4SEL0_LC4D1S2 : bit absolute CLC4SEL0.2; 949 CLC4SEL0_LC4D1S1 : bit absolute CLC4SEL0.1; 950 CLC4SEL0_LC4D1S0 : bit absolute CLC4SEL0.0; 951 CLC4SEL1 : byte absolute $1E31; 952 CLC4SEL1_LC4D2S5 : bit absolute CLC4SEL1.5; 953 CLC4SEL1_LC4D2S4 : bit absolute CLC4SEL1.4; 954 CLC4SEL1_LC4D2S3 : bit absolute CLC4SEL1.3; 955 CLC4SEL1_LC4D2S2 : bit absolute CLC4SEL1.2; 956 CLC4SEL1_LC4D2S1 : bit absolute CLC4SEL1.1; 957 CLC4SEL1_LC4D2S0 : bit absolute CLC4SEL1.0; 958 CLC4SEL2 : byte absolute $1E32; 959 CLC4SEL2_LC4D3S5 : bit absolute CLC4SEL2.5; 960 CLC4SEL2_LC4D3S4 : bit absolute CLC4SEL2.4; 961 CLC4SEL2_LC4D3S3 : bit absolute CLC4SEL2.3; 962 CLC4SEL2_LC4D3S2 : bit absolute CLC4SEL2.2; 963 CLC4SEL2_LC4D3S1 : bit absolute CLC4SEL2.1; 964 CLC4SEL2_LC4D3S0 : bit absolute CLC4SEL2.0; 965 CLC4SEL3 : byte absolute $1E33; 966 CLC4SEL3_LC4D4S5 : bit absolute CLC4SEL3.5; 967 CLC4SEL3_LC4D4S4 : bit absolute CLC4SEL3.4; 968 CLC4SEL3_LC4D4S3 : bit absolute CLC4SEL3.3; 969 CLC4SEL3_LC4D4S2 : bit absolute CLC4SEL3.2; 970 CLC4SEL3_LC4D4S1 : bit absolute CLC4SEL3.1; 971 CLC4SEL3_LC4D4S0 : bit absolute CLC4SEL3.0; 972 CLC4GLS0 : byte absolute $1E34; 973 CLC4GLS0_LC4G1D4T : bit absolute CLC4GLS0.7; 974 CLC4GLS0_LC4G1D4N : bit absolute CLC4GLS0.6; 975 CLC4GLS0_LC4G1D3T : bit absolute CLC4GLS0.5; 976 CLC4GLS0_LC4G1D3N : bit absolute CLC4GLS0.4; 977 CLC4GLS0_LC4G1D2T : bit absolute CLC4GLS0.3; 978 CLC4GLS0_LC4G1D2N : bit absolute CLC4GLS0.2; 979 CLC4GLS0_LC4G1D1T : bit absolute CLC4GLS0.1; 980 CLC4GLS0_LC4G1D1N : bit absolute CLC4GLS0.0; 981 CLC4GLS1 : byte absolute $1E35; 982 CLC4GLS1_LC4G2D4T : bit absolute CLC4GLS1.7; 983 CLC4GLS1_LC4G2D4N : bit absolute CLC4GLS1.6; 984 CLC4GLS1_LC4G2D3T : bit absolute CLC4GLS1.5; 985 CLC4GLS1_LC4G2D3N : bit absolute CLC4GLS1.4; 986 CLC4GLS1_LC4G2D2T : bit absolute CLC4GLS1.3; 987 CLC4GLS1_LC4G2D2N : bit absolute CLC4GLS1.2; 988 CLC4GLS1_LC4G2D1T : bit absolute CLC4GLS1.1; 989 CLC4GLS1_LC4G2D1N : bit absolute CLC4GLS1.0; 990 CLC4GLS2 : byte absolute $1E36; 991 CLC4GLS2_LC4G3D4T : bit absolute CLC4GLS2.7; 992 CLC4GLS2_LC4G3D4N : bit absolute CLC4GLS2.6; 993 CLC4GLS2_LC4G3D3T : bit absolute CLC4GLS2.5; 994 CLC4GLS2_LC4G3D3N : bit absolute CLC4GLS2.4; 995 CLC4GLS2_LC4G3D2T : bit absolute CLC4GLS2.3; 996 CLC4GLS2_LC4G3D2N : bit absolute CLC4GLS2.2; 997 CLC4GLS2_LC4G3D1T : bit absolute CLC4GLS2.1; 998 CLC4GLS2_LC4G3D1N : bit absolute CLC4GLS2.0; 999 CLC4GLS3 : byte absolute $1E37; 1000 CLC4GLS3_LC4G4D4T : bit absolute CLC4GLS3.7; 1001 CLC4GLS3_LC4G4D4N : bit absolute CLC4GLS3.6; 1002 CLC4GLS3_LC4G4D3T : bit absolute CLC4GLS3.5; 1003 CLC4GLS3_LC4G4D3N : bit absolute CLC4GLS3.4; 1004 CLC4GLS3_LC4G4D2T : bit absolute CLC4GLS3.3; 1005 CLC4GLS3_LC4G4D2N : bit absolute CLC4GLS3.2; 1006 CLC4GLS3_LC4G4D1T : bit absolute CLC4GLS3.1; 1007 CLC4GLS3_LC4G4D1N : bit absolute CLC4GLS3.0; 1008 PPSLOCK : byte absolute $1E8F; 1009 PPSLOCK_PPSLOCKED : bit absolute PPSLOCK.0; 1010 INTPPS : byte absolute $1E90; 1011 INTPPS_INTPPS5 : bit absolute INTPPS.5; 1012 INTPPS_INTPPS4 : bit absolute INTPPS.4; 1013 INTPPS_INTPPS3 : bit absolute INTPPS.3; 1014 INTPPS_INTPPS2 : bit absolute INTPPS.2; 1015 INTPPS_INTPPS1 : bit absolute INTPPS.1; 1016 INTPPS_INTPPS0 : bit absolute INTPPS.0; 1017 T0CKIPPS : byte absolute $1E91; 1018 T0CKIPPS_T0CKIPPS5 : bit absolute T0CKIPPS.5; 1019 T0CKIPPS_T0CKIPPS4 : bit absolute T0CKIPPS.4; 1020 T0CKIPPS_T0CKIPPS3 : bit absolute T0CKIPPS.3; 1021 T0CKIPPS_T0CKIPPS2 : bit absolute T0CKIPPS.2; 1022 T0CKIPPS_T0CKIPPS1 : bit absolute T0CKIPPS.1; 1023 T0CKIPPS_T0CKIPPS0 : bit absolute T0CKIPPS.0; 1024 T1CKIPPS : byte absolute $1E92; 1025 T1CKIPPS_T1CKIPPS5 : bit absolute T1CKIPPS.5; 1026 T1CKIPPS_T1CKIPPS4 : bit absolute T1CKIPPS.4; 1027 T1CKIPPS_T1CKIPPS3 : bit absolute T1CKIPPS.3; 1028 T1CKIPPS_T1CKIPPS2 : bit absolute T1CKIPPS.2; 1029 T1CKIPPS_T1CKIPPS1 : bit absolute T1CKIPPS.1; 1030 T1CKIPPS_T1CKIPPS0 : bit absolute T1CKIPPS.0; 1031 T1GPPS : byte absolute $1E93; 1032 T1GPPS_T1GPPS5 : bit absolute T1GPPS.5; 1033 T1GPPS_T1GPPS4 : bit absolute T1GPPS.4; 1034 T1GPPS_T1GPPS3 : bit absolute T1GPPS.3; 1035 T1GPPS_T1GPPS2 : bit absolute T1GPPS.2; 1036 T1GPPS_T1GPPS1 : bit absolute T1GPPS.1; 1037 T1GPPS_T1GPPS0 : bit absolute T1GPPS.0; 1038 T2INPPS : byte absolute $1E9C; 1039 T2INPPS_T2INPPS5 : bit absolute T2INPPS.5; 1040 T2INPPS_T2INPPS4 : bit absolute T2INPPS.4; 1041 T2INPPS_T2INPPS3 : bit absolute T2INPPS.3; 1042 T2INPPS_T2INPPS2 : bit absolute T2INPPS.2; 1043 T2INPPS_T2INPPS1 : bit absolute T2INPPS.1; 1044 T2INPPS_T2INPPS0 : bit absolute T2INPPS.0; 1045 CCP1PPS : byte absolute $1EA1; 1046 CCP1PPS_CCP1PPS5 : bit absolute CCP1PPS.5; 1047 CCP1PPS_CCP1PPS4 : bit absolute CCP1PPS.4; 1048 CCP1PPS_CCP1PPS3 : bit absolute CCP1PPS.3; 1049 CCP1PPS_CCP1PPS2 : bit absolute CCP1PPS.2; 1050 CCP1PPS_CCP1PPS1 : bit absolute CCP1PPS.1; 1051 CCP1PPS_CCP1PPS0 : bit absolute CCP1PPS.0; 1052 CCP2PPS : byte absolute $1EA2; 1053 CCP2PPS_CCP2PPS5 : bit absolute CCP2PPS.5; 1054 CCP2PPS_CCP2PPS4 : bit absolute CCP2PPS.4; 1055 CCP2PPS_CCP2PPS3 : bit absolute CCP2PPS.3; 1056 CCP2PPS_CCP2PPS2 : bit absolute CCP2PPS.2; 1057 CCP2PPS_CCP2PPS1 : bit absolute CCP2PPS.1; 1058 CCP2PPS_CCP2PPS0 : bit absolute CCP2PPS.0; 1059 CWG1PPS : byte absolute $1EB1; 1060 CWG1PPS_CWG1PPS5 : bit absolute CWG1PPS.5; 1061 CWG1PPS_CWG1PPS4 : bit absolute CWG1PPS.4; 1062 CWG1PPS_CWG1PPS3 : bit absolute CWG1PPS.3; 1063 CWG1PPS_CWG1PPS2 : bit absolute CWG1PPS.2; 1064 CWG1PPS_CWG1PPS1 : bit absolute CWG1PPS.1; 1065 CWG1PPS_CWG1PPS0 : bit absolute CWG1PPS.0; 1066 CLCIN0PPS : byte absolute $1EBB; 1067 CLCIN0PPS_CLCIN0PPS5 : bit absolute CLCIN0PPS.5; 1068 CLCIN0PPS_CLCIN0PPS4 : bit absolute CLCIN0PPS.4; 1069 CLCIN0PPS_CLCIN0PPS3 : bit absolute CLCIN0PPS.3; 1070 CLCIN0PPS_CLCIN0PPS2 : bit absolute CLCIN0PPS.2; 1071 CLCIN0PPS_CLCIN0PPS1 : bit absolute CLCIN0PPS.1; 1072 CLCIN0PPS_CLCIN0PPS0 : bit absolute CLCIN0PPS.0; 1073 CLCIN1PPS : byte absolute $1EBC; 1074 CLCIN1PPS_CLCIN1PPS5 : bit absolute CLCIN1PPS.5; 1075 CLCIN1PPS_CLCIN1PPS4 : bit absolute CLCIN1PPS.4; 1076 CLCIN1PPS_CLCIN1PPS3 : bit absolute CLCIN1PPS.3; 1077 CLCIN1PPS_CLCIN1PPS2 : bit absolute CLCIN1PPS.2; 1078 CLCIN1PPS_CLCIN1PPS1 : bit absolute CLCIN1PPS.1; 1079 CLCIN1PPS_CLCIN1PPS0 : bit absolute CLCIN1PPS.0; 1080 CLCIN2PPS : byte absolute $1EBD; 1081 CLCIN2PPS_CLCIN2PPS5 : bit absolute CLCIN2PPS.5; 1082 CLCIN2PPS_CLCIN2PPS4 : bit absolute CLCIN2PPS.4; 1083 CLCIN2PPS_CLCIN2PPS3 : bit absolute CLCIN2PPS.3; 1084 CLCIN2PPS_CLCIN2PPS2 : bit absolute CLCIN2PPS.2; 1085 CLCIN2PPS_CLCIN2PPS1 : bit absolute CLCIN2PPS.1; 1086 CLCIN2PPS_CLCIN2PPS0 : bit absolute CLCIN2PPS.0; 1087 CLCIN3PPS : byte absolute $1EBE; 1088 CLCIN3PPS_CLCIN3PPS5 : bit absolute CLCIN3PPS.5; 1089 CLCIN3PPS_CLCIN3PPS4 : bit absolute CLCIN3PPS.4; 1090 CLCIN3PPS_CLCIN3PPS3 : bit absolute CLCIN3PPS.3; 1091 CLCIN3PPS_CLCIN3PPS2 : bit absolute CLCIN3PPS.2; 1092 CLCIN3PPS_CLCIN3PPS1 : bit absolute CLCIN3PPS.1; 1093 CLCIN3PPS_CLCIN3PPS0 : bit absolute CLCIN3PPS.0; 1094 ADACTPPS : byte absolute $1EC3; 1095 ADACTPPS_ADACTPPS5 : bit absolute ADACTPPS.5; 1096 ADACTPPS_ADACTPPS4 : bit absolute ADACTPPS.4; 1097 ADACTPPS_ADACTPPS3 : bit absolute ADACTPPS.3; 1098 ADACTPPS_ADACTPPS2 : bit absolute ADACTPPS.2; 1099 ADACTPPS_ADACTPPS1 : bit absolute ADACTPPS.1; 1100 ADACTPPS_ADACTPPS0 : bit absolute ADACTPPS.0; 1101 SSP1CLKPPS : byte absolute $1EC5; 1102 SSP1CLKPPS_SSP1CLKPPS5 : bit absolute SSP1CLKPPS.5; 1103 SSP1CLKPPS_SSP1CLKPPS4 : bit absolute SSP1CLKPPS.4; 1104 SSP1CLKPPS_SSP1CLKPPS3 : bit absolute SSP1CLKPPS.3; 1105 SSP1CLKPPS_SSP1CLKPPS2 : bit absolute SSP1CLKPPS.2; 1106 SSP1CLKPPS_SSP1CLKPPS1 : bit absolute SSP1CLKPPS.1; 1107 SSP1CLKPPS_SSP1CLKPPS0 : bit absolute SSP1CLKPPS.0; 1108 SSP1DATPPS : byte absolute $1EC6; 1109 SSP1DATPPS_SSP1DATPPS5 : bit absolute SSP1DATPPS.5; 1110 SSP1DATPPS_SSP1DATPPS4 : bit absolute SSP1DATPPS.4; 1111 SSP1DATPPS_SSP1DATPPS3 : bit absolute SSP1DATPPS.3; 1112 SSP1DATPPS_SSP1DATPPS2 : bit absolute SSP1DATPPS.2; 1113 SSP1DATPPS_SSP1DATPPS1 : bit absolute SSP1DATPPS.1; 1114 SSP1DATPPS_SSP1DATPPS0 : bit absolute SSP1DATPPS.0; 1115 SSP1SSPPS : byte absolute $1EC7; 1116 SSP1SSPPS_SSP1SSPPS5 : bit absolute SSP1SSPPS.5; 1117 SSP1SSPPS_SSP1SSPPS4 : bit absolute SSP1SSPPS.4; 1118 SSP1SSPPS_SSP1SSPPS3 : bit absolute SSP1SSPPS.3; 1119 SSP1SSPPS_SSP1SSPPS2 : bit absolute SSP1SSPPS.2; 1120 SSP1SSPPS_SSP1SSPPS1 : bit absolute SSP1SSPPS.1; 1121 SSP1SSPPS_SSP1SSPPS0 : bit absolute SSP1SSPPS.0; 1122 RX1DTPPS : byte absolute $1ECB; 1123 RX1DTPPS_RX1DTPPS5 : bit absolute RX1DTPPS.5; 1124 RX1DTPPS_RX1DTPPS4 : bit absolute RX1DTPPS.4; 1125 RX1DTPPS_RX1DTPPS3 : bit absolute RX1DTPPS.3; 1126 RX1DTPPS_RX1DTPPS2 : bit absolute RX1DTPPS.2; 1127 RX1DTPPS_RX1DTPPS1 : bit absolute RX1DTPPS.1; 1128 RX1DTPPS_RX1DTPPS0 : bit absolute RX1DTPPS.0; 1129 TX1CKPPS : byte absolute $1ECC; 1130 TX1CKPPS_TX1CKPPS5 : bit absolute TX1CKPPS.5; 1131 TX1CKPPS_TX1CKPPS4 : bit absolute TX1CKPPS.4; 1132 TX1CKPPS_TX1CKPPS3 : bit absolute TX1CKPPS.3; 1133 TX1CKPPS_TX1CKPPS2 : bit absolute TX1CKPPS.2; 1134 TX1CKPPS_TX1CKPPS1 : bit absolute TX1CKPPS.1; 1135 TX1CKPPS_TX1CKPPS0 : bit absolute TX1CKPPS.0; 1136 RA0PPS : byte absolute $1F10; 1137 RA0PPS_RA0PPS4 : bit absolute RA0PPS.4; 1138 RA0PPS_RA0PPS3 : bit absolute RA0PPS.3; 1139 RA0PPS_RA0PPS2 : bit absolute RA0PPS.2; 1140 RA0PPS_RA0PPS1 : bit absolute RA0PPS.1; 1141 RA0PPS_RA0PPS0 : bit absolute RA0PPS.0; 1142 RA1PPS : byte absolute $1F11; 1143 RA1PPS_RA1PPS4 : bit absolute RA1PPS.4; 1144 RA1PPS_RA1PPS3 : bit absolute RA1PPS.3; 1145 RA1PPS_RA1PPS2 : bit absolute RA1PPS.2; 1146 RA1PPS_RA1PPS1 : bit absolute RA1PPS.1; 1147 RA1PPS_RA1PPS0 : bit absolute RA1PPS.0; 1148 RA2PPS : byte absolute $1F12; 1149 RA2PPS_RA2PPS4 : bit absolute RA2PPS.4; 1150 RA2PPS_RA2PPS3 : bit absolute RA2PPS.3; 1151 RA2PPS_RA2PPS2 : bit absolute RA2PPS.2; 1152 RA2PPS_RA2PPS1 : bit absolute RA2PPS.1; 1153 RA2PPS_RA2PPS0 : bit absolute RA2PPS.0; 1154 RA3PPS : byte absolute $1F13; 1155 RA3PPS_RA3PPS4 : bit absolute RA3PPS.4; 1156 RA3PPS_RA3PPS3 : bit absolute RA3PPS.3; 1157 RA3PPS_RA3PPS2 : bit absolute RA3PPS.2; 1158 RA3PPS_RA3PPS1 : bit absolute RA3PPS.1; 1159 RA3PPS_RA3PPS0 : bit absolute RA3PPS.0; 1160 RA4PPS : byte absolute $1F14; 1161 RA4PPS_RA4PPS4 : bit absolute RA4PPS.4; 1162 RA4PPS_RA4PPS3 : bit absolute RA4PPS.3; 1163 RA4PPS_RA4PPS2 : bit absolute RA4PPS.2; 1164 RA4PPS_RA4PPS1 : bit absolute RA4PPS.1; 1165 RA4PPS_RA4PPS0 : bit absolute RA4PPS.0; 1166 RA5PPS : byte absolute $1F15; 1167 RA5PPS_RA5PPS4 : bit absolute RA5PPS.4; 1168 RA5PPS_RA5PPS3 : bit absolute RA5PPS.3; 1169 RA5PPS_RA5PPS2 : bit absolute RA5PPS.2; 1170 RA5PPS_RA5PPS1 : bit absolute RA5PPS.1; 1171 RA5PPS_RA5PPS0 : bit absolute RA5PPS.0; 1172 RC0PPS : byte absolute $1F20; 1173 RC0PPS_RC0PPS4 : bit absolute RC0PPS.4; 1174 RC0PPS_RC0PPS3 : bit absolute RC0PPS.3; 1175 RC0PPS_RC0PPS2 : bit absolute RC0PPS.2; 1176 RC0PPS_RC0PPS1 : bit absolute RC0PPS.1; 1177 RC0PPS_RC0PPS0 : bit absolute RC0PPS.0; 1178 RC1PPS : byte absolute $1F21; 1179 RC1PPS_RC1PPS4 : bit absolute RC1PPS.4; 1180 RC1PPS_RC1PPS3 : bit absolute RC1PPS.3; 1181 RC1PPS_RC1PPS2 : bit absolute RC1PPS.2; 1182 RC1PPS_RC1PPS1 : bit absolute RC1PPS.1; 1183 RC1PPS_RC1PPS0 : bit absolute RC1PPS.0; 1184 RC2PPS : byte absolute $1F22; 1185 RC2PPS_RC2PPS4 : bit absolute RC2PPS.4; 1186 RC2PPS_RC2PPS3 : bit absolute RC2PPS.3; 1187 RC2PPS_RC2PPS2 : bit absolute RC2PPS.2; 1188 RC2PPS_RC2PPS1 : bit absolute RC2PPS.1; 1189 RC2PPS_RC2PPS0 : bit absolute RC2PPS.0; 1190 RC3PPS : byte absolute $1F23; 1191 RC3PPS_RC3PPS4 : bit absolute RC3PPS.4; 1192 RC3PPS_RC3PPS3 : bit absolute RC3PPS.3; 1193 RC3PPS_RC3PPS2 : bit absolute RC3PPS.2; 1194 RC3PPS_RC3PPS1 : bit absolute RC3PPS.1; 1195 RC3PPS_RC3PPS0 : bit absolute RC3PPS.0; 1196 RC4PPS : byte absolute $1F24; 1197 RC4PPS_RC4PPS4 : bit absolute RC4PPS.4; 1198 RC4PPS_RC4PPS3 : bit absolute RC4PPS.3; 1199 RC4PPS_RC4PPS2 : bit absolute RC4PPS.2; 1200 RC4PPS_RC4PPS1 : bit absolute RC4PPS.1; 1201 RC4PPS_RC4PPS0 : bit absolute RC4PPS.0; 1202 RC5PPS : byte absolute $1F25; 1203 RC5PPS_RC5PPS4 : bit absolute RC5PPS.4; 1204 RC5PPS_RC5PPS3 : bit absolute RC5PPS.3; 1205 RC5PPS_RC5PPS2 : bit absolute RC5PPS.2; 1206 RC5PPS_RC5PPS1 : bit absolute RC5PPS.1; 1207 RC5PPS_RC5PPS0 : bit absolute RC5PPS.0; 1208 ANSELA : byte absolute $1F38; 1209 ANSELA_ANSA5 : bit absolute ANSELA.5; 1210 ANSELA_ANSA4 : bit absolute ANSELA.4; 1211 ANSELA_ANSA2 : bit absolute ANSELA.2; 1212 ANSELA_ANSA1 : bit absolute ANSELA.1; 1213 ANSELA_ANSA0 : bit absolute ANSELA.0; 1214 WPUA : byte absolute $1F39; 1215 WPUA_WPUA5 : bit absolute WPUA.5; 1216 WPUA_WPUA4 : bit absolute WPUA.4; 1217 WPUA_WPUA3 : bit absolute WPUA.3; 1218 WPUA_WPUA2 : bit absolute WPUA.2; 1219 WPUA_WPUA1 : bit absolute WPUA.1; 1220 WPUA_WPUA0 : bit absolute WPUA.0; 1221 ODCONA : byte absolute $1F3A; 1222 ODCONA_ODCA5 : bit absolute ODCONA.5; 1223 ODCONA_ODCA4 : bit absolute ODCONA.4; 1224 ODCONA_ODCA2 : bit absolute ODCONA.2; 1225 ODCONA_ODCA1 : bit absolute ODCONA.1; 1226 ODCONA_ODCA0 : bit absolute ODCONA.0; 1227 SLRCONA : byte absolute $1F3B; 1228 SLRCONA_SLRA5 : bit absolute SLRCONA.5; 1229 SLRCONA_SLRA4 : bit absolute SLRCONA.4; 1230 SLRCONA_SLRA2 : bit absolute SLRCONA.2; 1231 SLRCONA_SLRA1 : bit absolute SLRCONA.1; 1232 SLRCONA_SLRA0 : bit absolute SLRCONA.0; 1233 INLVLA : byte absolute $1F3C; 1234 INLVLA_INLVLA5 : bit absolute INLVLA.5; 1235 INLVLA_INLVLA4 : bit absolute INLVLA.4; 1236 INLVLA_INLVLA3 : bit absolute INLVLA.3; 1237 INLVLA_INLVLA2 : bit absolute INLVLA.2; 1238 INLVLA_INLVLA1 : bit absolute INLVLA.1; 1239 INLVLA_INLVLA0 : bit absolute INLVLA.0; 1240 IOCAP : byte absolute $1F3D; 1241 IOCAP_IOCAP5 : bit absolute IOCAP.5; 1242 IOCAP_IOCAP4 : bit absolute IOCAP.4; 1243 IOCAP_IOCAP3 : bit absolute IOCAP.3; 1244 IOCAP_IOCAP2 : bit absolute IOCAP.2; 1245 IOCAP_IOCAP1 : bit absolute IOCAP.1; 1246 IOCAP_IOCAP0 : bit absolute IOCAP.0; 1247 IOCAN : byte absolute $1F3E; 1248 IOCAN_IOCAN5 : bit absolute IOCAN.5; 1249 IOCAN_IOCAN4 : bit absolute IOCAN.4; 1250 IOCAN_IOCAN3 : bit absolute IOCAN.3; 1251 IOCAN_IOCAN2 : bit absolute IOCAN.2; 1252 IOCAN_IOCAN1 : bit absolute IOCAN.1; 1253 IOCAN_IOCAN0 : bit absolute IOCAN.0; 1254 IOCAF : byte absolute $1F3F; 1255 IOCAF_IOCAF5 : bit absolute IOCAF.5; 1256 IOCAF_IOCAF4 : bit absolute IOCAF.4; 1257 IOCAF_IOCAF3 : bit absolute IOCAF.3; 1258 IOCAF_IOCAF2 : bit absolute IOCAF.2; 1259 IOCAF_IOCAF1 : bit absolute IOCAF.1; 1260 IOCAF_IOCAF0 : bit absolute IOCAF.0; 1261 ANSELC : byte absolute $1F4E; 1262 ANSELC_ANSC5 : bit absolute ANSELC.5; 1263 ANSELC_ANSC4 : bit absolute ANSELC.4; 1264 ANSELC_ANSC3 : bit absolute ANSELC.3; 1265 ANSELC_ANSC2 : bit absolute ANSELC.2; 1266 ANSELC_ANSC1 : bit absolute ANSELC.1; 1267 ANSELC_ANSC0 : bit absolute ANSELC.0; 1268 WPUC : byte absolute $1F4F; 1269 WPUC_WPUC5 : bit absolute WPUC.5; 1270 WPUC_WPUC4 : bit absolute WPUC.4; 1271 WPUC_WPUC3 : bit absolute WPUC.3; 1272 WPUC_WPUC2 : bit absolute WPUC.2; 1273 WPUC_WPUC1 : bit absolute WPUC.1; 1274 WPUC_WPUC0 : bit absolute WPUC.0; 1275 ODCONC : byte absolute $1F50; 1276 ODCONC_ODCC5 : bit absolute ODCONC.5; 1277 ODCONC_ODCC4 : bit absolute ODCONC.4; 1278 ODCONC_ODCC3 : bit absolute ODCONC.3; 1279 ODCONC_ODCC2 : bit absolute ODCONC.2; 1280 ODCONC_ODCC1 : bit absolute ODCONC.1; 1281 ODCONC_ODCC0 : bit absolute ODCONC.0; 1282 SLRCONC : byte absolute $1F51; 1283 SLRCONC_SLRC5 : bit absolute SLRCONC.5; 1284 SLRCONC_SLRC4 : bit absolute SLRCONC.4; 1285 SLRCONC_SLRC3 : bit absolute SLRCONC.3; 1286 SLRCONC_SLRC2 : bit absolute SLRCONC.2; 1287 SLRCONC_SLRC1 : bit absolute SLRCONC.1; 1288 SLRCONC_SLRC0 : bit absolute SLRCONC.0; 1289 INLVLC : byte absolute $1F52; 1290 INLVLC_INLVLC5 : bit absolute INLVLC.5; 1291 INLVLC_INLVLC4 : bit absolute INLVLC.4; 1292 INLVLC_INLVLC3 : bit absolute INLVLC.3; 1293 INLVLC_INLVLC2 : bit absolute INLVLC.2; 1294 INLVLC_INLVLC1 : bit absolute INLVLC.1; 1295 INLVLC_INLVLC0 : bit absolute INLVLC.0; 1296 IOCCP : byte absolute $1F53; 1297 IOCCP_IOCCP5 : bit absolute IOCCP.5; 1298 IOCCP_IOCCP4 : bit absolute IOCCP.4; 1299 IOCCP_IOCCP3 : bit absolute IOCCP.3; 1300 IOCCP_IOCCP2 : bit absolute IOCCP.2; 1301 IOCCP_IOCCP1 : bit absolute IOCCP.1; 1302 IOCCP_IOCCP0 : bit absolute IOCCP.0; 1303 IOCCN : byte absolute $1F54; 1304 IOCCN_IOCCN5 : bit absolute IOCCN.5; 1305 IOCCN_IOCCN4 : bit absolute IOCCN.4; 1306 IOCCN_IOCCN3 : bit absolute IOCCN.3; 1307 IOCCN_IOCCN2 : bit absolute IOCCN.2; 1308 IOCCN_IOCCN1 : bit absolute IOCCN.1; 1309 IOCCN_IOCCN0 : bit absolute IOCCN.0; 1310 IOCCF : byte absolute $1F55; 1311 IOCCF_IOCCF5 : bit absolute IOCCF.5; 1312 IOCCF_IOCCF4 : bit absolute IOCCF.4; 1313 IOCCF_IOCCF3 : bit absolute IOCCF.3; 1314 IOCCF_IOCCF2 : bit absolute IOCCF.2; 1315 IOCCF_IOCCF1 : bit absolute IOCCF.1; 1316 IOCCF_IOCCF0 : bit absolute IOCCF.0; 1317 STATUS_SHAD : byte absolute $1FE4; 1318 STATUS_SHAD_STATUS_SHAD2 : bit absolute STATUS_SHAD.2; 1319 STATUS_SHAD_STATUS_SHAD1 : bit absolute STATUS_SHAD.1; 1320 STATUS_SHAD_STATUS_SHAD0 : bit absolute STATUS_SHAD.0; 1321 WREG_SHAD : byte absolute $1FE5; 1322 BSR_SHAD : byte absolute $1FE6; 1323 PCLATH_SHAD : byte absolute $1FE7; 1324 FSR0L_SHAD : byte absolute $1FE8; 1325 FSR0H_SHAD : byte absolute $1FE9; 1326 FSR1L_SHAD : byte absolute $1FEA; 1327 FSR1H_SHAD : byte absolute $1FEB; 1328 STKPTR : byte absolute $1FED; 1329 STKPTR_STKPTR4 : bit absolute STKPTR.4; 1330 STKPTR_STKPTR3 : bit absolute STKPTR.3; 1331 STKPTR_STKPTR2 : bit absolute STKPTR.2; 1332 STKPTR_STKPTR1 : bit absolute STKPTR.1; 1333 STKPTR_STKPTR0 : bit absolute STKPTR.0; 1334 TOSL : byte absolute $1FEE; 1335 TOSH : byte absolute $1FEF; 1336 1337 1338 // -- Define RAM state values -- 1339 1340 {$CLEAR_STATE_RAM} 1341 1342 {$SET_STATE_RAM '000-00B:SFR:ALLMAPPED'} // Banks 0-63 : INDF0, INDF1, PCL, STATUS, FSR0L, FSR0H, FSR1L, FSR1H, BSR, WREG, PCLATH, INTCON 1343 {$SET_STATE_RAM '00C-00C:SFR'} // Bank 0 : PORTA 1344 {$SET_STATE_RAM '00E-00E:SFR'} // Bank 0 : PORTC 1345 {$SET_STATE_RAM '012-012:SFR'} // Bank 0 : TRISA 1346 {$SET_STATE_RAM '014-014:SFR'} // Bank 0 : TRISC 1347 {$SET_STATE_RAM '018-018:SFR'} // Bank 0 : LATA 1348 {$SET_STATE_RAM '01A-01A:SFR'} // Bank 0 : LATC 1349 {$SET_STATE_RAM '020-06F:GPR'} 1350 {$SET_STATE_RAM '070-07F:GPR:ALLMAPPED'} 1351 {$SET_STATE_RAM '09B-09F:SFR'} // Bank 1 : ADRESL, ADRESH, ADCON0, ADCON1, ADACT 1352 {$SET_STATE_RAM '0A0-0EF:GPR'} 1353 {$SET_STATE_RAM '119-11F:SFR'} // Bank 2 : RC1REG, TX1REG, SP1BRGL, SP1BRGH, RC1STA, TX1STA, BAUD1CON 1354 {$SET_STATE_RAM '120-16F:GPR'} 1355 {$SET_STATE_RAM '18C-192:SFR'} // Bank 3 : SSP1BUF, SSP1ADD, SSP1MSK, SSP1STAT, SSP1CON1, SSP1CON2, SSP1CON3 1356 {$SET_STATE_RAM '20C-211:SFR'} // Bank 4 : TMR1L, TMR1H, T1CON, T1GCON, T1GATE, T1CLK 1357 {$SET_STATE_RAM '28C-291:SFR'} // Bank 5 : T2TMR, T2PR, T2CON, T2HLT, T2CLKCON, T2RST 1358 {$SET_STATE_RAM '30C-316:SFR'} // Bank 6 : CCPR1L, CCPR1H, CCP1CON, CCP1CAP, CCPR2L, CCPR2H, CCP2CON, CCP2CAP, PWM3DCL, PWM3DCH, PWM3CON 1359 {$SET_STATE_RAM '318-31A:SFR'} // Bank 6 : PWM4DCL, PWM4DCH, PWM4CON 1360 {$SET_STATE_RAM '31C-31E:SFR'} // Bank 6 : PWM5DCL, PWM5DCH, PWM5CON 1361 {$SET_STATE_RAM '38C-38E:SFR'} // Bank 7 : PWM6DCL, PWM6DCH, PWM6CON 1362 {$SET_STATE_RAM '58C-593:SFR'} // Bank 11 : NCO1ACCL, NCO1ACCH, NCO1ACCU, NCO1INCL, NCO1INCH, NCO1INCU, NCO1CON, NCO1CLK 1363 {$SET_STATE_RAM '59C-59F:SFR'} // Bank 11 : TMR0L, TMR0H, T0CON0, T0CON1 1364 {$SET_STATE_RAM '60C-614:SFR'} // Bank 12 : CWG1CLKCON, CWG1DAT, CWG1DBR, CWG1DBF, CWG1CON0, CWG1CON1, CWG1AS0, CWG1AS1, CWG1STR 1365 {$SET_STATE_RAM '70C-713:SFR'} // Bank 14 : PIR0, PIR1, PIR2, PIR3, PIR4, PIR5, PIR6, PIR7 1366 {$SET_STATE_RAM '716-71D:SFR'} // Bank 14 : PIE0, PIE1, PIE2, PIE3, PIE4, PIE5, PIE6, PIE7 1367 {$SET_STATE_RAM '796-79B:SFR'} // Bank 15 : PMD0, PMD1, PMD2, PMD3, PMD4, PMD5 1368 {$SET_STATE_RAM '80C-814:SFR'} // Bank 16 : WDTCON0, WDTCON1, WDTPSL, WDTPSH, WDTTMR, BORCON, VREGCON, PCON0, PCON1 1369 {$SET_STATE_RAM '81A-81F:SFR'} // Bank 16 : NVMADRL, NVMADRH, NVMDATL, NVMDATH, NVMCON1, NVMCON2 1370 {$SET_STATE_RAM '88C-893:SFR'} // Bank 17 : CPUDOZE, OSCCON1, OSCCON2, OSCCON3, OSCSTAT, OSCEN, OSCTUNE, OSCFRQ 1371 {$SET_STATE_RAM '895-896:SFR'} // Bank 17 : CLKRCON, CLKRCLK 1372 {$SET_STATE_RAM '90C-90C:SFR'} // Bank 18 : FVRCON 1373 {$SET_STATE_RAM '90E-90F:SFR'} // Bank 18 : DAC1CON0, DAC1CON1 1374 {$SET_STATE_RAM '91F-91F:SFR'} // Bank 18 : ZCDCON 1375 {$SET_STATE_RAM '98F-997:SFR'} // Bank 19 : CMOUT, CM1CON0, CM1CON1, CM1NCH, CM1PCH, CM2CON0, CM2CON1, CM2NCH, CM2PCH 1376 {$SET_STATE_RAM '1E0F-1E37:SFR'} // Bank 60 : CLCDATA, CLC1CON, CLC1POL, CLC1SEL0, CLC1SEL1, CLC1SEL2, CLC1SEL3, CLC1GLS0, CLC1GLS1, CLC1GLS2, CLC1GLS3, CLC2CON, CLC2POL, CLC2SEL0, CLC2SEL1, CLC2SEL2, CLC2SEL3, CLC2GLS0, CLC2GLS1, CLC2GLS2, CLC2GLS3, CLC3CON, CLC3POL, CLC3SEL0, CLC3SEL1, CLC3SEL2, CLC3SEL3, CLC3GLS0, CLC3GLS1, CLC3GLS2, CLC3GLS3, CLC4CON, CLC4POL, CLC4SEL0, CLC4SEL1, CLC4SEL2, CLC4SEL3, CLC4GLS0, CLC4GLS1, CLC4GLS2, CLC4GLS3 1377 {$SET_STATE_RAM '1E8F-1E93:SFR'} // Bank 61 : PPSLOCK, INTPPS, T0CKIPPS, T1CKIPPS, T1GPPS 1378 {$SET_STATE_RAM '1E9C-1E9C:SFR'} // Bank 61 : T2INPPS 1379 {$SET_STATE_RAM '1EA1-1EA2:SFR'} // Bank 61 : CCP1PPS, CCP2PPS 1380 {$SET_STATE_RAM '1EB1-1EB1:SFR'} // Bank 61 : CWG1PPS 1381 {$SET_STATE_RAM '1EBB-1EBE:SFR'} // Bank 61 : CLCIN0PPS, CLCIN1PPS, CLCIN2PPS, CLCIN3PPS 1382 {$SET_STATE_RAM '1EC3-1EC3:SFR'} // Bank 61 : ADACTPPS 1383 {$SET_STATE_RAM '1EC5-1EC7:SFR'} // Bank 61 : SSP1CLKPPS, SSP1DATPPS, SSP1SSPPS 1384 {$SET_STATE_RAM '1ECB-1ECC:SFR'} // Bank 61 : RX1DTPPS, TX1CKPPS 1385 {$SET_STATE_RAM '1F10-1F15:SFR'} // Bank 62 : RA0PPS, RA1PPS, RA2PPS, RA3PPS, RA4PPS, RA5PPS 1386 {$SET_STATE_RAM '1F20-1F25:SFR'} // Bank 62 : RC0PPS, RC1PPS, RC2PPS, RC3PPS, RC4PPS, RC5PPS 1387 {$SET_STATE_RAM '1F38-1F3F:SFR'} // Bank 62 : ANSELA, WPUA, ODCONA, SLRCONA, INLVLA, IOCAP, IOCAN, IOCAF 1388 {$SET_STATE_RAM '1F4E-1F55:SFR'} // Bank 62 : ANSELC, WPUC, ODCONC, SLRCONC, INLVLC, IOCCP, IOCCN, IOCCF 1389 {$SET_STATE_RAM '1FE4-1FEB:SFR'} // Bank 63 : STATUS_SHAD, WREG_SHAD, BSR_SHAD, PCLATH_SHAD, FSR0L_SHAD, FSR0H_SHAD, FSR1L_SHAD, FSR1H_SHAD 1390 {$SET_STATE_RAM '1FED-1FEF:SFR'} // Bank 63 : STKPTR, TOSL, TOSH 1391 1392 1393 // -- Define mapped RAM -- 1394 1395 1396 1397 1398 // -- Un-implemented fields -- 1399 1400 {$SET_UNIMP_BITS '003:1F'} // STATUS bits 7,6,5 un-implemented (read as 0) 1401 {$SET_UNIMP_BITS '008:3F'} // BSR bits 7,6 un-implemented (read as 0) 1402 {$SET_UNIMP_BITS '00A:7F'} // PCLATH bit 7 un-implemented (read as 0) 1403 {$SET_UNIMP_BITS '00B:C1'} // INTCON bits 5,4,3,2,1 un-implemented (read as 0) 1404 {$SET_UNIMP_BITS '00C:3F'} // PORTA bits 7,6 un-implemented (read as 0) 1405 {$SET_UNIMP_BITS '00E:3F'} // PORTC bits 7,6 un-implemented (read as 0) 1406 {$SET_UNIMP_BITS '012:37'} // TRISA bits 7,6,3 un-implemented (read as 0) 1407 {$SET_UNIMP_BITS '014:3F'} // TRISC bits 7,6 un-implemented (read as 0) 1408 {$SET_UNIMP_BITS '018:37'} // LATA bits 7,6,3 un-implemented (read as 0) 1409 {$SET_UNIMP_BITS '01A:3F'} // LATC bits 7,6 un-implemented (read as 0) 1410 {$SET_UNIMP_BITS '09E:F3'} // ADCON1 bits 3,2 un-implemented (read as 0) 1411 {$SET_UNIMP_BITS '09F:1F'} // ADACT bits 7,6,5 un-implemented (read as 0) 1412 {$SET_UNIMP_BITS '11F:DB'} // BAUD1CON bits 5,2 un-implemented (read as 0) 1413 {$SET_UNIMP_BITS '20E:37'} // T1CON bits 7,6,3 un-implemented (read as 0) 1414 {$SET_UNIMP_BITS '20F:FC'} // T1GCON bits 1,0 un-implemented (read as 0) 1415 {$SET_UNIMP_BITS '210:1F'} // T1GATE bits 7,6,5 un-implemented (read as 0) 1416 {$SET_UNIMP_BITS '211:0F'} // T1CLK bits 7,6,5,4 un-implemented (read as 0) 1417 {$SET_UNIMP_BITS '290:0F'} // T2CLKCON bits 7,6,5,4 un-implemented (read as 0) 1418 {$SET_UNIMP_BITS '291:0F'} // T2RST bits 7,6,5,4 un-implemented (read as 0) 1419 {$SET_UNIMP_BITS '30E:BF'} // CCP1CON bit 6 un-implemented (read as 0) 1420 {$SET_UNIMP_BITS '30F:07'} // CCP1CAP bits 7,6,5,4,3 un-implemented (read as 0) 1421 {$SET_UNIMP_BITS '312:BF'} // CCP2CON bit 6 un-implemented (read as 0) 1422 {$SET_UNIMP_BITS '313:07'} // CCP2CAP bits 7,6,5,4,3 un-implemented (read as 0) 1423 {$SET_UNIMP_BITS '314:C0'} // PWM3DCL bits 5,4,3,2,1,0 un-implemented (read as 0) 1424 {$SET_UNIMP_BITS '316:B0'} // PWM3CON bits 6,3,2,1,0 un-implemented (read as 0) 1425 {$SET_UNIMP_BITS '318:C0'} // PWM4DCL bits 5,4,3,2,1,0 un-implemented (read as 0) 1426 {$SET_UNIMP_BITS '31A:B0'} // PWM4CON bits 6,3,2,1,0 un-implemented (read as 0) 1427 {$SET_UNIMP_BITS '31C:C0'} // PWM5DCL bits 5,4,3,2,1,0 un-implemented (read as 0) 1428 {$SET_UNIMP_BITS '31E:B0'} // PWM5CON bits 6,3,2,1,0 un-implemented (read as 0) 1429 {$SET_UNIMP_BITS '38C:C0'} // PWM6DCL bits 5,4,3,2,1,0 un-implemented (read as 0) 1430 {$SET_UNIMP_BITS '38E:B0'} // PWM6CON bits 6,3,2,1,0 un-implemented (read as 0) 1431 {$SET_UNIMP_BITS '58E:0F'} // NCO1ACCU bits 7,6,5,4 un-implemented (read as 0) 1432 {$SET_UNIMP_BITS '591:0F'} // NCO1INCU bits 7,6,5,4 un-implemented (read as 0) 1433 {$SET_UNIMP_BITS '592:B1'} // NCO1CON bits 6,3,2,1 un-implemented (read as 0) 1434 {$SET_UNIMP_BITS '593:EF'} // NCO1CLK bit 4 un-implemented (read as 0) 1435 {$SET_UNIMP_BITS '59E:BF'} // T0CON0 bit 6 un-implemented (read as 0) 1436 {$SET_UNIMP_BITS '60C:01'} // CWG1CLKCON bits 7,6,5,4,3,2,1 un-implemented (read as 0) 1437 {$SET_UNIMP_BITS '60D:0F'} // CWG1DAT bits 7,6,5,4 un-implemented (read as 0) 1438 {$SET_UNIMP_BITS '60E:3F'} // CWG1DBR bits 7,6 un-implemented (read as 0) 1439 {$SET_UNIMP_BITS '60F:3F'} // CWG1DBF bits 7,6 un-implemented (read as 0) 1440 {$SET_UNIMP_BITS '610:C7'} // CWG1CON0 bits 5,4,3 un-implemented (read as 0) 1441 {$SET_UNIMP_BITS '611:2F'} // CWG1CON1 bits 7,6,4 un-implemented (read as 0) 1442 {$SET_UNIMP_BITS '612:FC'} // CWG1AS0 bits 1,0 un-implemented (read as 0) 1443 {$SET_UNIMP_BITS '613:1F'} // CWG1AS1 bits 7,6,5 un-implemented (read as 0) 1444 {$SET_UNIMP_BITS '70C:31'} // PIR0 bits 7,6,3,2,1 un-implemented (read as 0) 1445 {$SET_UNIMP_BITS '70D:C3'} // PIR1 bits 5,4,3,2 un-implemented (read as 0) 1446 {$SET_UNIMP_BITS '70E:43'} // PIR2 bits 7,5,4,3,2 un-implemented (read as 0) 1447 {$SET_UNIMP_BITS '70F:37'} // PIR3 bits 7,6,3 un-implemented (read as 0) 1448 {$SET_UNIMP_BITS '710:03'} // PIR4 bits 7,6,5,4,3,2 un-implemented (read as 0) 1449 {$SET_UNIMP_BITS '711:F1'} // PIR5 bits 3,2,1 un-implemented (read as 0) 1450 {$SET_UNIMP_BITS '712:03'} // PIR6 bits 7,6,5,4,3,2 un-implemented (read as 0) 1451 {$SET_UNIMP_BITS '713:31'} // PIR7 bits 7,6,3,2,1 un-implemented (read as 0) 1452 {$SET_UNIMP_BITS '716:31'} // PIE0 bits 7,6,3,2,1 un-implemented (read as 0) 1453 {$SET_UNIMP_BITS '717:C1'} // PIE1 bits 5,4,3,2,1 un-implemented (read as 0) 1454 {$SET_UNIMP_BITS '718:43'} // PIE2 bits 7,5,4,3,2 un-implemented (read as 0) 1455 {$SET_UNIMP_BITS '719:33'} // PIE3 bits 7,6,3,2 un-implemented (read as 0) 1456 {$SET_UNIMP_BITS '71A:03'} // PIE4 bits 7,6,5,4,3,2 un-implemented (read as 0) 1457 {$SET_UNIMP_BITS '71B:F1'} // PIE5 bits 3,2,1 un-implemented (read as 0) 1458 {$SET_UNIMP_BITS '71C:03'} // PIE6 bits 7,6,5,4,3,2 un-implemented (read as 0) 1459 {$SET_UNIMP_BITS '71D:31'} // PIE7 bits 7,6,3,2,1 un-implemented (read as 0) 1460 {$SET_UNIMP_BITS '796:C7'} // PMD0 bits 5,4,3 un-implemented (read as 0) 1461 {$SET_UNIMP_BITS '797:87'} // PMD1 bits 6,5,4,3 un-implemented (read as 0) 1462 {$SET_UNIMP_BITS '798:67'} // PMD2 bits 7,4,3 un-implemented (read as 0) 1463 {$SET_UNIMP_BITS '799:3F'} // PMD3 bits 7,6 un-implemented (read as 0) 1464 {$SET_UNIMP_BITS '79A:51'} // PMD4 bits 7,5,3,2,1 un-implemented (read as 0) 1465 {$SET_UNIMP_BITS '79B:1E'} // PMD5 bits 7,6,5,0 un-implemented (read as 0) 1466 {$SET_UNIMP_BITS '80C:3F'} // WDTCON0 bits 7,6 un-implemented (read as 0) 1467 {$SET_UNIMP_BITS '80D:77'} // WDTCON1 bits 7,3 un-implemented (read as 0) 1468 {$SET_UNIMP_BITS '810:7F'} // WDTTMR bit 7 un-implemented (read as 0) 1469 {$SET_UNIMP_BITS '811:81'} // BORCON bits 6,5,4,3,2,1 un-implemented (read as 0) 1470 {$SET_UNIMP_BITS '812:02'} // VREGCON bits 7,6,5,4,3,2,0 un-implemented (read as 0) 1471 {$SET_UNIMP_BITS '814:02'} // PCON1 bits 7,6,5,4,3,2,0 un-implemented (read as 0) 1472 {$SET_UNIMP_BITS '81B:7F'} // NVMADRH bit 7 un-implemented (read as 0) 1473 {$SET_UNIMP_BITS '81D:3F'} // NVMDATH bits 7,6 un-implemented (read as 0) 1474 {$SET_UNIMP_BITS '81E:7F'} // NVMCON1 bit 7 un-implemented (read as 0) 1475 {$SET_UNIMP_BITS '88C:F7'} // CPUDOZE bit 3 un-implemented (read as 0) 1476 {$SET_UNIMP_BITS '88D:7F'} // OSCCON1 bit 7 un-implemented (read as 0) 1477 {$SET_UNIMP_BITS '88E:7F'} // OSCCON2 bit 7 un-implemented (read as 0) 1478 {$SET_UNIMP_BITS '88F:98'} // OSCCON3 bits 6,5,2,1,0 un-implemented (read as 0) 1479 {$SET_UNIMP_BITS '890:F5'} // OSCSTAT bits 3,1 un-implemented (read as 0) 1480 {$SET_UNIMP_BITS '891:F4'} // OSCEN bits 3,1,0 un-implemented (read as 0) 1481 {$SET_UNIMP_BITS '892:3F'} // OSCTUNE bits 7,6 un-implemented (read as 0) 1482 {$SET_UNIMP_BITS '893:07'} // OSCFRQ bits 7,6,5,4,3 un-implemented (read as 0) 1483 {$SET_UNIMP_BITS '895:9F'} // CLKRCON bits 6,5 un-implemented (read as 0) 1484 {$SET_UNIMP_BITS '896:0F'} // CLKRCLK bits 7,6,5,4 un-implemented (read as 0) 1485 {$SET_UNIMP_BITS '90E:BD'} // DAC1CON0 bits 6,1 un-implemented (read as 0) 1486 {$SET_UNIMP_BITS '90F:1F'} // DAC1CON1 bits 7,6,5 un-implemented (read as 0) 1487 {$SET_UNIMP_BITS '91F:B3'} // ZCDCON bits 6,3,2 un-implemented (read as 0) 1488 {$SET_UNIMP_BITS '98F:03'} // CMOUT bits 7,6,5,4,3,2 un-implemented (read as 0) 1489 {$SET_UNIMP_BITS '990:D3'} // CM1CON0 bits 5,3,2 un-implemented (read as 0) 1490 {$SET_UNIMP_BITS '991:03'} // CM1CON1 bits 7,6,5,4,3,2 un-implemented (read as 0) 1491 {$SET_UNIMP_BITS '992:07'} // CM1NCH bits 7,6,5,4,3 un-implemented (read as 0) 1492 {$SET_UNIMP_BITS '993:07'} // CM1PCH bits 7,6,5,4,3 un-implemented (read as 0) 1493 {$SET_UNIMP_BITS '994:D3'} // CM2CON0 bits 5,3,2 un-implemented (read as 0) 1494 {$SET_UNIMP_BITS '995:03'} // CM2CON1 bits 7,6,5,4,3,2 un-implemented (read as 0) 1495 {$SET_UNIMP_BITS '996:07'} // CM2NCH bits 7,6,5,4,3 un-implemented (read as 0) 1496 {$SET_UNIMP_BITS '997:07'} // CM2PCH bits 7,6,5,4,3 un-implemented (read as 0) 1497 {$SET_UNIMP_BITS '1E0F:0F'} // CLCDATA bits 7,6,5,4 un-implemented (read as 0) 1498 {$SET_UNIMP_BITS '1E10:BF'} // CLC1CON bit 6 un-implemented (read as 0) 1499 {$SET_UNIMP_BITS '1E11:8F'} // CLC1POL bits 6,5,4 un-implemented (read as 0) 1500 {$SET_UNIMP_BITS '1E12:3F'} // CLC1SEL0 bits 7,6 un-implemented (read as 0) 1501 {$SET_UNIMP_BITS '1E13:3F'} // CLC1SEL1 bits 7,6 un-implemented (read as 0) 1502 {$SET_UNIMP_BITS '1E14:3F'} // CLC1SEL2 bits 7,6 un-implemented (read as 0) 1503 {$SET_UNIMP_BITS '1E15:3F'} // CLC1SEL3 bits 7,6 un-implemented (read as 0) 1504 {$SET_UNIMP_BITS '1E1A:BF'} // CLC2CON bit 6 un-implemented (read as 0) 1505 {$SET_UNIMP_BITS '1E1B:8F'} // CLC2POL bits 6,5,4 un-implemented (read as 0) 1506 {$SET_UNIMP_BITS '1E1C:3F'} // CLC2SEL0 bits 7,6 un-implemented (read as 0) 1507 {$SET_UNIMP_BITS '1E1D:3F'} // CLC2SEL1 bits 7,6 un-implemented (read as 0) 1508 {$SET_UNIMP_BITS '1E1E:3F'} // CLC2SEL2 bits 7,6 un-implemented (read as 0) 1509 {$SET_UNIMP_BITS '1E1F:3F'} // CLC2SEL3 bits 7,6 un-implemented (read as 0) 1510 {$SET_UNIMP_BITS '1E24:BF'} // CLC3CON bit 6 un-implemented (read as 0) 1511 {$SET_UNIMP_BITS '1E25:8F'} // CLC3POL bits 6,5,4 un-implemented (read as 0) 1512 {$SET_UNIMP_BITS '1E26:3F'} // CLC3SEL0 bits 7,6 un-implemented (read as 0) 1513 {$SET_UNIMP_BITS '1E27:3F'} // CLC3SEL1 bits 7,6 un-implemented (read as 0) 1514 {$SET_UNIMP_BITS '1E28:3F'} // CLC3SEL2 bits 7,6 un-implemented (read as 0) 1515 {$SET_UNIMP_BITS '1E29:3F'} // CLC3SEL3 bits 7,6 un-implemented (read as 0) 1516 {$SET_UNIMP_BITS '1E2E:BF'} // CLC4CON bit 6 un-implemented (read as 0) 1517 {$SET_UNIMP_BITS '1E2F:8F'} // CLC4POL bits 6,5,4 un-implemented (read as 0) 1518 {$SET_UNIMP_BITS '1E30:3F'} // CLC4SEL0 bits 7,6 un-implemented (read as 0) 1519 {$SET_UNIMP_BITS '1E31:3F'} // CLC4SEL1 bits 7,6 un-implemented (read as 0) 1520 {$SET_UNIMP_BITS '1E32:3F'} // CLC4SEL2 bits 7,6 un-implemented (read as 0) 1521 {$SET_UNIMP_BITS '1E33:3F'} // CLC4SEL3 bits 7,6 un-implemented (read as 0) 1522 {$SET_UNIMP_BITS '1E8F:01'} // PPSLOCK bits 7,6,5,4,3,2,1 un-implemented (read as 0) 1523 {$SET_UNIMP_BITS '1E90:3F'} // INTPPS bits 7,6 un-implemented (read as 0) 1524 {$SET_UNIMP_BITS '1E91:3F'} // T0CKIPPS bits 7,6 un-implemented (read as 0) 1525 {$SET_UNIMP_BITS '1E92:3F'} // T1CKIPPS bits 7,6 un-implemented (read as 0) 1526 {$SET_UNIMP_BITS '1E93:3F'} // T1GPPS bits 7,6 un-implemented (read as 0) 1527 {$SET_UNIMP_BITS '1E9C:3F'} // T2INPPS bits 7,6 un-implemented (read as 0) 1528 {$SET_UNIMP_BITS '1EA1:3F'} // CCP1PPS bits 7,6 un-implemented (read as 0) 1529 {$SET_UNIMP_BITS '1EA2:3F'} // CCP2PPS bits 7,6 un-implemented (read as 0) 1530 {$SET_UNIMP_BITS '1EB1:3F'} // CWG1PPS bits 7,6 un-implemented (read as 0) 1531 {$SET_UNIMP_BITS '1EBB:3F'} // CLCIN0PPS bits 7,6 un-implemented (read as 0) 1532 {$SET_UNIMP_BITS '1EBC:3F'} // CLCIN1PPS bits 7,6 un-implemented (read as 0) 1533 {$SET_UNIMP_BITS '1EBD:3F'} // CLCIN2PPS bits 7,6 un-implemented (read as 0) 1534 {$SET_UNIMP_BITS '1EBE:3F'} // CLCIN3PPS bits 7,6 un-implemented (read as 0) 1535 {$SET_UNIMP_BITS '1EC3:3F'} // ADACTPPS bits 7,6 un-implemented (read as 0) 1536 {$SET_UNIMP_BITS '1EC5:3F'} // SSP1CLKPPS bits 7,6 un-implemented (read as 0) 1537 {$SET_UNIMP_BITS '1EC6:3F'} // SSP1DATPPS bits 7,6 un-implemented (read as 0) 1538 {$SET_UNIMP_BITS '1EC7:3F'} // SSP1SSPPS bits 7,6 un-implemented (read as 0) 1539 {$SET_UNIMP_BITS '1ECB:3F'} // RX1DTPPS bits 7,6 un-implemented (read as 0) 1540 {$SET_UNIMP_BITS '1ECC:3F'} // TX1CKPPS bits 7,6 un-implemented (read as 0) 1541 {$SET_UNIMP_BITS '1F10:1F'} // RA0PPS bits 7,6,5 un-implemented (read as 0) 1542 {$SET_UNIMP_BITS '1F11:1F'} // RA1PPS bits 7,6,5 un-implemented (read as 0) 1543 {$SET_UNIMP_BITS '1F12:1F'} // RA2PPS bits 7,6,5 un-implemented (read as 0) 1544 {$SET_UNIMP_BITS '1F13:1F'} // RA3PPS bits 7,6,5 un-implemented (read as 0) 1545 {$SET_UNIMP_BITS '1F14:1F'} // RA4PPS bits 7,6,5 un-implemented (read as 0) 1546 {$SET_UNIMP_BITS '1F15:1F'} // RA5PPS bits 7,6,5 un-implemented (read as 0) 1547 {$SET_UNIMP_BITS '1F20:1F'} // RC0PPS bits 7,6,5 un-implemented (read as 0) 1548 {$SET_UNIMP_BITS '1F21:1F'} // RC1PPS bits 7,6,5 un-implemented (read as 0) 1549 {$SET_UNIMP_BITS '1F22:1F'} // RC2PPS bits 7,6,5 un-implemented (read as 0) 1550 {$SET_UNIMP_BITS '1F23:1F'} // RC3PPS bits 7,6,5 un-implemented (read as 0) 1551 {$SET_UNIMP_BITS '1F24:1F'} // RC4PPS bits 7,6,5 un-implemented (read as 0) 1552 {$SET_UNIMP_BITS '1F25:1F'} // RC5PPS bits 7,6,5 un-implemented (read as 0) 1553 {$SET_UNIMP_BITS '1F38:37'} // ANSELA bits 7,6,3 un-implemented (read as 0) 1554 {$SET_UNIMP_BITS '1F39:3F'} // WPUA bits 7,6 un-implemented (read as 0) 1555 {$SET_UNIMP_BITS '1F3A:37'} // ODCONA bits 7,6,3 un-implemented (read as 0) 1556 {$SET_UNIMP_BITS '1F3B:37'} // SLRCONA bits 7,6,3 un-implemented (read as 0) 1557 {$SET_UNIMP_BITS '1F3C:3F'} // INLVLA bits 7,6 un-implemented (read as 0) 1558 {$SET_UNIMP_BITS '1F3D:3F'} // IOCAP bits 7,6 un-implemented (read as 0) 1559 {$SET_UNIMP_BITS '1F3E:3F'} // IOCAN bits 7,6 un-implemented (read as 0) 1560 {$SET_UNIMP_BITS '1F3F:3F'} // IOCAF bits 7,6 un-implemented (read as 0) 1561 {$SET_UNIMP_BITS '1F4E:3F'} // ANSELC bits 7,6 un-implemented (read as 0) 1562 {$SET_UNIMP_BITS '1F4F:3F'} // WPUC bits 7,6 un-implemented (read as 0) 1563 {$SET_UNIMP_BITS '1F50:3F'} // ODCONC bits 7,6 un-implemented (read as 0) 1564 {$SET_UNIMP_BITS '1F51:3F'} // SLRCONC bits 7,6 un-implemented (read as 0) 1565 {$SET_UNIMP_BITS '1F52:3F'} // INLVLC bits 7,6 un-implemented (read as 0) 1566 {$SET_UNIMP_BITS '1F53:3F'} // IOCCP bits 7,6 un-implemented (read as 0) 1567 {$SET_UNIMP_BITS '1F54:3F'} // IOCCN bits 7,6 un-implemented (read as 0) 1568 {$SET_UNIMP_BITS '1F55:3F'} // IOCCF bits 7,6 un-implemented (read as 0) 1569 {$SET_UNIMP_BITS '1FE4:07'} // STATUS_SHAD bits 7,6,5,4,3 un-implemented (read as 0) 1570 {$SET_UNIMP_BITS '1FED:1F'} // STKPTR bits 7,6,5 un-implemented (read as 0) 1571 1572 1573 // -- PIN mapping -- 1574 1575 // Pin 1 : VDD 1576 // Pin 2 : ECIN/OSC1/CLKIN/ANA5/IOCA5/RA5 1577 // Pin 3 : OSC2/CLKOUT/ANA4/C1IN1-/IOCA4/RA4 1578 // Pin 4 : MCLR/VPP/IOCA3/RA3 1579 // Pin 5 : ANC5/IOCC5/RC5 1580 // Pin 6 : ANC4/IOCC4/RC4 1581 // Pin 7 : ANC3/C1IN3-/C2IN3-/IOCC3/RC3 1582 // Pin 8 : ANC2/C2IN2-/C1IN2-/IOCC2/RC2 1583 // Pin 9 : ANC1/C2IN1-/C1IN1-/SMB_I2C/IOCC1/RC1 1584 // Pin 10 : ANC0/C2IN0+/SMB_I2C/IOCC0/RC0 1585 // Pin 11 : ZCD1/ANA2/IOCA2/RA2 1586 // Pin 12 : ICSPCLK/ICDCLK/DAC1REF+/VREF+/ANA1/C2IN0-/C1IN0-/IOCA1/RA1 1587 // Pin 13 : ICSPDAT/ICDDAT/DAC1OUT/ANA0/C1IN0+/IOCA0/RA0 1588 // Pin 14 : VSS 1589 1590 1591 // -- RAM to PIN mapping -- 1592 1593 {$MAP_RAM_TO_PIN '00C:0-13,1-12,2-11,3-4,4-3,5-2'} // PORTA 1594 {$MAP_RAM_TO_PIN '00E:0-10,1-9,2-8,3-7,4-6,5-5'} // PORTC 1595 1596 1597 // -- Bits Configuration -- 1598 1599 // FEXTOSC : External Oscillator mode selection bits 1600 {$define _FEXTOSC_ECH = $3FFF} // EC above 8MHz; PFM set to high power 1601 {$define _FEXTOSC_ECM = $3FFE} // EC for 500kHz to 8MHz; PFM set to medium power 1602 {$define _FEXTOSC_ECL = $3FFD} // EC below 500kHz; PFM set to low power 1603 {$define _FEXTOSC_OFF = $3FFC} // Oscillator not enabled 1604 {$define _FEXTOSC_Reserved = $3FFB} // Reserved 1605 {$define _FEXTOSC_HS = $3FFA} // HS (crystal oscillator) above 4MHz; PFM set to high power 1606 {$define _FEXTOSC_XT = $3FF9} // XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power 1607 {$define _FEXTOSC_LP = $3FF8} // LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power 1608 1609 // RSTOSC : Power-up default value for COSC bits 1610 {$define _RSTOSC_EXT1X = $3FFF} // EXTOSC operating per FEXTOSC bits 1611 {$define _RSTOSC_HFINT1 = $3FEF} // HFINTOSC (1MHz) 1612 {$define _RSTOSC_LFINT = $3FDF} // LFINTOSC 1613 {$define _RSTOSC_Reserved = $3FCF} // Reserved 1614 {$define _RSTOSC_Reserved = $3FBF} // Reserved 1615 {$define _RSTOSC_EXT4X = $3FAF} // EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits 1616 {$define _RSTOSC_HFINTPLL = $3F9F} // HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz) 1617 {$define _RSTOSC_HFINT32 = $3F8F} // HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1 1618 1619 // CLKOUTEN : Clock Out Enable bit isnull1620 {$define _CLKOUTEN_ON = $3EFF} // CLKOUT function is enabled; FOSC/4 clock appears at OSC2 1621 {$define _CLKOUTEN_OFF = $3FFF} // CLKOUT function is disabled; i/o or oscillator function on OSC2 1622 1623 // CSWEN : Clock Switch Enable bit 1624 {$define _CSWEN_ON = $3FFF} // Writing to NOSC and NDIV is allowed 1625 {$define _CSWEN_OFF = $37FF} // The NOSC and NDIV bits cannot be changed by user software 1626 1627 // FCMEN : Fail-Safe Clock Monitor Enable bit 1628 {$define _FCMEN_ON = $3FFF} // FSCM timer enabled 1629 {$define _FCMEN_OFF = $1FFF} // FSCM timer disabled 1630 1631 // MCLRE : Master Clear Enable bit 1632 {$define _MCLRE_ON = $3FFF} // MCLR pin is Master Clear function 1633 {$define _MCLRE_OFF = $3FFE} // MCLR pin function is port defined function 1634 1635 // PWRTE : Power-up Timer Enable bit 1636 {$define _PWRTE_OFF = $3FFF} // PWRT disabled 1637 {$define _PWRTE_ON = $3FFD} // PWRT enabled 1638 1639 // LPBOREN : Low-Power BOR enable bit 1640 {$define _LPBOREN_OFF = $3FFF} // ULPBOR disabled 1641 {$define _LPBOREN_ON = $3FDF} // ULPBOR enabled 1642 1643 // BOREN : Brown-out reset enable bits 1644 {$define _BOREN_ON = $3FFF} // Brown-out Reset Enabled, SBOREN bit is ignored 1645 {$define _BOREN_NSLEEP = $3FBF} // Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored 1646 {$define _BOREN_SBOREN = $3F7F} // Brown-out reset enabled according to SBOREN bit 1647 {$define _BOREN_OFF = $3F3F} // Brown-out reset disabled 1648 1649 // BORV : Brown-out Reset Voltage Selection 1650 {$define _BORV_LO = $3FFF} // Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices 1651 {$define _BORV_HI = $3DFF} // Brown-out Reset Voltage (VBOR) is set to 2.7V 1652 1653 // ZCD : Zero-cross detect disable 1654 {$define _ZCD_OFF = $3FFF} // Zero-cross detect circuit is disabled at POR. 1655 {$define _ZCD_ON = $3BFF} // Zero-cross detect circuit is always enabled 1656 1657 // PPS1WAY : Peripheral Pin Select one-way control 1658 {$define _PPS1WAY_ON = $3FFF} // The PPSLOCK bit can be cleared and set only once in software 1659 {$define _PPS1WAY_OFF = $37FF} // The PPSLOCK bit can be set and cleared repeatedly by software 1660 1661 // STVREN : Stack Overflow/Underflow Reset Enable bit 1662 {$define _STVREN_ON = $3FFF} // Stack Overflow or Underflow will cause a reset 1663 {$define _STVREN_OFF = $2FFF} // Stack Overflow or Underflow will not cause a reset 1664 1665 // WDTCPS : WDT Period Select bits 1666 {$define _WDTCPS_WDTCPS_0 = $3FE0} // Divider ratio 1:32 1667 {$define _WDTCPS_WDTCPS_1 = $3FE1} // Divider ratio 1:64 1668 {$define _WDTCPS_WDTCPS_2 = $3FE2} // Divider ratio 1:128 1669 {$define _WDTCPS_WDTCPS_3 = $3FE3} // Divider ratio 1:256 1670 {$define _WDTCPS_WDTCPS_4 = $3FE4} // Divider ratio 1:512 1671 {$define _WDTCPS_WDTCPS_5 = $3FE5} // Divider ratio 1:1024 1672 {$define _WDTCPS_WDTCPS_6 = $3FE6} // Divider ratio 1:2048 1673 {$define _WDTCPS_WDTCPS_7 = $3FE7} // Divider ratio 1:4096 1674 {$define _WDTCPS_WDTCPS_8 = $3FE8} // Divider ratio 1:8192 1675 {$define _WDTCPS_WDTCPS_9 = $3FE9} // Divider ratio 1:16384 1676 {$define _WDTCPS_WDTCPS_10 = $3FEA} // Divider ratio 1:32768 1677 {$define _WDTCPS_WDTCPS_11 = $3FEB} // Divider ratio 1:65536 1678 {$define _WDTCPS_WDTCPS_12 = $3FEC} // Divider ratio 1:131072 1679 {$define _WDTCPS_WDTCPS_13 = $3FED} // Divider ratio 1:262144 1680 {$define _WDTCPS_WDTCPS_14 = $3FEE} // Divider ratio 1:524299 1681 {$define _WDTCPS_WDTCPS_15 = $3FEF} // Divider ratio 1:1048576 1682 {$define _WDTCPS_WDTCPS_16 = $3FF0} // Divider ratio 1:2097152 1683 {$define _WDTCPS_WDTCPS_17 = $3FF1} // Divider ratio 1:4194304 1684 {$define _WDTCPS_WDTCPS_18 = $3FF2} // Divider ratio 1:8388608 1685 {$define _WDTCPS_WDTCPS_19 = $3FF3} // Divider ratio 1:32 1686 {$define _WDTCPS_WDTCPS_20 = $3FF4} // Divider ratio 1:32 1687 {$define _WDTCPS_WDTCPS_21 = $3FF5} // Divider ratio 1:32 1688 {$define _WDTCPS_WDTCPS_22 = $3FF6} // Divider ratio 1:32 1689 {$define _WDTCPS_WDTCPS_23 = $3FF7} // Divider ratio 1:32 1690 {$define _WDTCPS_WDTCPS_24 = $3FF8} // Divider ratio 1:32 1691 {$define _WDTCPS_WDTCPS_25 = $3FF9} // Divider ratio 1:32 1692 {$define _WDTCPS_WDTCPS_26 = $3FFA} // Divider ratio 1:32 1693 {$define _WDTCPS_WDTCPS_27 = $3FFB} // Divider ratio 1:32 1694 {$define _WDTCPS_WDTCPS_28 = $3FFC} // Divider ratio 1:32 1695 {$define _WDTCPS_WDTCPS_29 = $3FFD} // Divider ratio 1:32 1696 {$define _WDTCPS_WDTCPS_30 = $3FFE} // Divider ratio 1:32 1697 {$define _WDTCPS_WDTCPS_31 = $3FFF} // Divider ratio 1:65536; software control of WDTPS 1698 1699 // WDTE : WDT operating mode 1700 {$define _WDTE_OFF = $3F9F} // WDT Disabled, SWDTEN is ignored 1701 {$define _WDTE_SWDTEN = $3FBF} // WDT enabled/disabled by SWDTEN bit in WDTCON0 1702 {$define _WDTE_NSLEEP = $3FDF} // WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored 1703 {$define _WDTE_ON = $3FFF} // WDT enabled regardless of sleep; SWDTEN ignored 1704 1705 // WDTCWS : WDT Window Select bits 1706 {$define _WDTCWS_WDTCWS_0 = $38FF} // window delay = 87.5 percent of time; no software control; keyed access required 1707 {$define _WDTCWS_WDTCWS_1 = $39FF} // window delay = 75 percent of time; no software control; keyed access required 1708 {$define _WDTCWS_WDTCWS_2 = $3AFF} // window delay = 62.5 percent of time; no software control; keyed access required 1709 {$define _WDTCWS_WDTCWS_3 = $3BFF} // window delay = 50 percent of time; no software control; keyed access required 1710 {$define _WDTCWS_WDTCWS_4 = $3CFF} // window delay = 37.5 percent of time; no software control; keyed access required 1711 {$define _WDTCWS_WDTCWS_5 = $3DFF} // window delay = 25 percent of time; no software control; keyed access required 1712 {$define _WDTCWS_WDTCWS_6 = $3EFF} // window always open (100%); no software control; keyed access required 1713 {$define _WDTCWS_WDTCWS_7 = $3FFF} // window always open (100%); software control; keyed access not required 1714 1715 // WDTCCS : WDT input clock selector 1716 {$define _WDTCCS_LFINTOSC = $07FF} // WDT reference clock is the 31.0kHz LFINTOSC output 1717 {$define _WDTCCS_HFINTOSC = $0FFF} // WDT reference clock is the 31.25 kHz HFINTOSC 1718 {$define _WDTCCS_Reserved = $17FF} // Reserved 1719 {$define _WDTCCS_SC = $3FFF} // Software Control 1720 1721 // BBSIZE : Boot Block Size Selection bits 1722 {$define _BBSIZE_BB512 = $3FFF} // 512 words boot block size 1723 {$define _BBSIZE_BB1K = $3FFE} // 1024 words boot block size 1724 {$define _BBSIZE_BB2K = $3FFD} // 2048 words boot block size 1725 {$define _BBSIZE_BB4K = $3FFC} // * half of user program memory 1726 {$define _BBSIZE_BB8K = $3FFB} // * half of user program memory 1727 {$define _BBSIZE_BB16K = $3FFA} // * half of user program memory 1728 {$define _BBSIZE_BB32K = $3FF9} // * half of user program memory 1729 {$define _BBSIZE_BB64K = $3FF8} // * half of user program memory 1730 1731 // BBEN : Boot Block Enable bit 1732 {$define _BBEN_OFF = $3FFF} // Boot Block disabled 1733 {$define _BBEN_ON = $3FF7} // Boot Block enabled 1734 1735 // SAFEN : SAF Enable bit 1736 {$define _SAFEN_OFF = $3FFF} // SAF disabled 1737 {$define _SAFEN_ON = $3FEF} // SAF enabled 1738 1739 // WRTAPP : Application Block Write Protection bit 1740 {$define _WRTAPP_OFF = $3FFF} // Application Block not write protected 1741 {$define _WRTAPP_ON = $3F7F} // Application Block write protected 1742 1743 // WRTB : Boot Block Write Protection bit 1744 {$define _WRTB_OFF = $3FFF} // Boot Block not write protected 1745 {$define _WRTB_ON = $3EFF} // Boot Block write protected 1746 1747 // WRTC : Configuration Register Write Protection bit 1748 {$define _WRTC_OFF = $3FFF} // Configuration Register not write protected 1749 {$define _WRTC_ON = $3DFF} // Configuration Register write protected 1750 1751 // WRTSAF : Storage Area Flash Write Protection bit 1752 {$define _WRTSAF_OFF = $3FFF} // SAF not write protected 1753 {$define _WRTSAF_ON = $37FF} // SAF write protected 1754 1755 // LVP : Low Voltage Programming Enable bit 1756 {$define _LVP_ON = $3FFF} // Low Voltage programming enabled. MCLR/Vpp pin function is MCLR. 1757 {$define _LVP_OFF = $1FFF} // High Voltage on MCLR/Vpp must be used for programming 1758 1759 // CP : UserNVM Program memory code protection bit 1760 {$define _CP_OFF = $3FFF} // UserNVM code protection disabled 1761 {$define _CP_ON = $3FFE} // UserNVM code protection enabled 1762 1763 implementation 1764 end. 1765