1 2 3""" 4""" Segment 1 5""" 6 7 macro msg 8 absa #1 9 emcall 21 10 endm 11 12 equ MBZ, 0 13 14main: 15 msg msg_main_entry 16 17" Run the tests with out faulting 18 19 msg msg_without 20 21 lda =0,dl 22 sta mme_enable 23 tsx2 run_tests 24 25" Run the tests with faulting 26 27 msg msg_with 28 29 lda =1,dl 30 sta mme_enable 31 tsx2 run_tests 32 33 msg msg_done 34 emcall 18 35 36 macro unmap_memory 37 lda mme_enable 38 mme 39 endm 40 41run_tests: 42 43" tra skip 44 45" Test 1: simple direct R,n 46 47 msg msg_test1 48 bool t1_data,123001001 49 50 lda =0,dl 51 52 unmap_memory 53 lda t1_a1 54 55 cmpa t1_a1 56 tze t1_pass 57 dis * 58t1_pass: 59 msg msg_test_ok 60 61" Test 2: simple indirect 62 63 msg msg_test2 64 65 bool t2_data,234002001 66 67 lda =0,dl 68 69 unmap_memory 70 lda t2_p1,* "t2_p1 -> t2_a1 71 72 cmpa t2_a1 73 tze t2_pass 74 dis * 75t2_pass: 76 msg msg_test_ok 77 78 79" Test 3: double indirect 80 81 msg msg_test3 82 83 bool t3_data,345003001 84 85 lda =0,dl 86 87 unmap_memory 88 lda t3_p1,* "t3_p1 -> t3_p2 -> t3_a1 89 90 cmpa t3_a1 91 tze t3_pass 92 dis * 93t3_pass: 94 msg msg_test_ok 95 96" Test 4: simple indirect with indexing 97 98 msg msg_test4 99 100 bool t4_data,456004001 101 102 lda =0,dl 103 ldx3 =1,du 104 105 unmap_memory 106 lda t4_p1,3* " t4_p1[1] -> t4_a1 107 108 cmpa t4_a1 109 tze t4_pass 110 dis * 111 112t4_pass: 113 msg msg_test_ok 114 115" Test 5: indirect with ITS 116 117 msg msg_test5 118 119 bool t5_data,567005001 120 121 lda =0,dl 122 123 unmap_memory 124 lda t5_p1,* "t5_p1 -> seg2:t5_a1 125 126 cmpa t5_a1 127 tze t5_pass 128 dis * 129t5_pass: 130 msg msg_test_ok 131 132" Test 6: indirect with ITS indirect 133 134 msg msg_test6 135 136 bool t6_data,670006001 137 138 lda =0,dl 139 140 unmap_memory 141 lda t6_p1,* "t6_p1 -> seg2:t6_p2 -> t6_a1 142 143 cmpa t6_a1 144 tze t6_pass 145 dis * 146 147t6_pass: 148 msg msg_test_ok 149 150" Test 7: subtract delta 151 152skip: 153 msg msg_test7 154 155 bool t7_data,701007001 156 157 " Initialize the indirect word 158 159 lda t7_p1_init 160 sta t7_p1 161 162 lda =0,dl 163 164 unmap_memory 165 lda t7_p1, sd "t7_p1[-1] -> t7_a1 166 167 cmpa t7_a1-1 168 tze t7_pass 169 dis * 170 171t7_pass: 172 msg msg_test_ok 173 174" Test 8: sequence character reverse, no addr change 175 176 msg msg_test8 177 178 bool t8_data,10 179 180 " Initialize the indirect word 181 182 lda t8_p1_init 183 sta t8_p1 184 185 lda =0,dl 186 187 unmap_memory 188 lda t8_p1, scr "t8_p1[-1] -> t8_a1 189 190 cmpa t8_data, dl 191 tze t8_pass 192 dis * 193 194t8_pass: 195 msg msg_test_ok 196 197 198" Test 9: sequence character reverse, addr change 199 200 msg msg_test9 201 202 bool t9_data,10 203 204 " Initialize the indirect word 205 206 lda t9_p1_init 207 sta t9_p1 208 209 lda =0,dl 210 211 unmap_memory 212 lda t9_p1, scr "t9_p1[-1] -> t9_a1 213 214 cmpa t9_data, dl 215 tze t9_pass 216 dis * 217 218t9_pass: 219 msg msg_test_ok 220 221" Test 10: character indirect 222 223 msg msg_test10 224 225 bool t10_data,11 226 227 " Initialize the indirect word 228 229 lda t10_p1_init 230 sta t10_p1 231 232 lda =0,dl 233 234 unmap_memory 235 lda t10_p1, ci "t10_p1 -> t10_a1 236 237 cmpa t10_data, dl 238 tze t10_pass 239 dis * 240 241t10_pass: 242 msg msg_test_ok 243 244" Test 11: indirect 245 246 msg msg_test11 247 248 bool t11_data,012012001 249 250 lda =0,dl 251 252 unmap_memory 253 lda t11_p1, i "t11_p1 -> t11_a1 254 255 cmpa t11_a1 256 tze t11_pass 257 dis * 258 259t11_pass: 260 msg msg_test_ok 261 262" Test 12: sequence character, no addr change 263 264 msg msg_test12 265 266 bool t12_data,12 267 268 " Initialize the indirect word 269 270 lda t12_p1_init 271 sta t12_p1 272 273 lda =0,dl 274 275 unmap_memory 276 lda t12_p1, sc "t12_p1 -> t12_a1 277 278 cmpa t12_data, dl 279 tze t12_pass 280 dis * 281 282t12_pass: 283 msg msg_test_ok 284 285" Test 13: sequence character, addr change 286 287 msg msg_test13 288 289 bool t13_data,13 290 bool t13_data2,14 291 292 " Initialize the indirect word 293 294 lda t13_p1_init 295 sta t13_p1 296 297 lda =0,dl 298 299 unmap_memory 300 lda t13_p1, sc "t13_p1[0] -> t13_a1 301 302 cmpa t13_data, dl 303 tze t13_pass1 304 dis * 305 306t13_pass1: 307 308 unmap_memory 309 lda t13_p1, sc "t13_p1[1] -> t13_a1 310 311 cmpa t13_data2, dl 312 tze t13_pass 313 dis * 314 315t13_pass: 316 msg msg_test_ok 317 318" Test 14: add delta 319 320 msg msg_test14 321 322 bool t14_data,123010001 323 bool t14_data2,123010002 324 325 " Initialize the indirect word 326 327 lda t14_p1_init 328 sta t14_p1 329 330 lda =0,dl 331 332 unmap_memory 333 lda t14_p1, ad "t14_p1[0] -> t14_a1 334 335 cmpa t14_a1 336 tze t14_pass1 337 dis * 338 339t14_pass1: 340 341 unmap_memory 342 lda t14_p1, ad "t14_p1[1] -> t14_a2 343 344 cmpa t14_a2 345 tze t14_pass 346 dis * 347 348t14_pass: 349 msg msg_test_ok 350 351" Test 15: decrement address, increment tally 352 353 msg msg_test15 354 355 bool t15_data,234011001 356 357 " Initialize the indirect word 358 359 lda t15_p1_init 360 sta t15_p1 361 362 lda =0,dl 363 364 unmap_memory 365 lda t15_p1, di "t15_p1[-1] -> t15_a1 366 367 cmpa t15_a1-1 368 tze t15_pass 369 dis * 370 371t15_pass: 372 msg msg_test_ok 373 374" Test 16: decrement address, increment tally, continue 375 376 msg msg_test16 377 378 bool t16_data,345012001 379 380 " Initialize the indirect word 381 382 lda t16_p1_init 383 sta t16_p1 384 385 lda =0,dl 386 387 unmap_memory 388 lda t16_p1, dic "t16_p1[-1] -> t16_p2 -> t16_a1 389 390 cmpa t16_a1 391 tze t16_pass 392 dis * 393 394t16_pass: 395 msg msg_test_ok 396 397" Test 17: increment address, decrement tally 398 399 msg msg_test17 400 401 bool t17_data,456013001 402 403 " Initialize the indirect word 404 405 lda t17_p1_init 406 sta t17_p1 407 408 lda =0,dl 409 410 unmap_memory 411 lda t17_p1, id "t17_p1 -> t17_a1 412 413 cmpa t17_a1 414 tze t17_pass 415 dis * 416 417t17_pass: 418 msg msg_test_ok 419 420" Test 18: increment address, decrement tally, continue 421 422 msg msg_test18 423 424 bool t18_data,456013001 425 426 " Initialize the indirect word 427 428 lda t18_p1_init 429 sta t18_p1 430 431 lda =0,dl 432 433 unmap_memory 434 lda t18_p1, idc "t18_p1[1] -> t18_p2 -> t18_a1 435 436 cmpa t18_a1 437 tze t18_pass 438 dis * 439 440t18_pass: 441 msg msg_test_ok 442 443" Test 19: IR with indexing 444 445 msg msg_test19 446 447 bool t19_data,567014001 448 449 lda =0,dl 450 ldx3 =1,du 451 452 unmap_memory 453 lda t19_p1,*3 " t19_p1[1] -> t19_a1 454 455 cmpa t19_a1+1 456 tze t19_pass 457 dis * 458 459t19_pass: 460 msg msg_test_ok 461 462" Test 20: fault tag 3, snapped link 463" 464 465 msg msg_test20 466 467 bool t20_data,670123456 468 469 unmap_memory 470 471" Set up snapped link 472" 2:2048 -> PR0 473 lprp0 t20_link_ptr_3 474 ldaq t20_snapped_init 475 staq 0|0 476 477" Through the link 478 479 lda =0,dl 480 lprp0 t20_link_ptr 481 lda 0|0,* 482 483 cmpa t20_a1 484 tze t20_pass 485 dis * 486 487t20_pass: 488 msg msg_test_ok 489 490" Test 21: fault tag 3, unsnapped link 491" 492 493 msg msg_test21 494 495 bool t21_data,701234567 496 497 lda =0,dl 498 499 unmap_memory 500 501" Set up unsnapped link. 502" 2:2048 -> PR0 503 lprp0 t21_link_ptr_3 504 ldaq t21_unsnapped_init 505 staq 0|0 506" Initialize the data that the F3 handler will copy into the link 507 ldaq t21_snapped_init 508 staq 0|2 509 510 511" Through the link 512 513 lprp0 t21_link_ptr 514 lda 0|0,* 515 516 cmpa t21_a1 517 tze t21_pass 518 dis * 519 520t21_pass: 521 msg msg_test_ok 522 523" Test 22: double indirect with indexing 524 525 msg msg_test22 526 527 bool t22_data,345026001 528 529 lda =0,dl 530 ldx3 =1,du 531 532 unmap_memory 533 lda t22_p1,*3 "t22_p1 -> t22_p2 -> t22_a1[1] 534 535 cmpa t22_a1 536 tze t22_pass 537 dis * 538t22_pass: 539 msg msg_test_ok 540 541 542 543 544 545 546 547 548 549 550" done with tests 551" 552 553 tra 0,2 554 555t7_p1_init: 556 vfd 18/t7_a1, 12/0, 6/1 " initial tally 0, delta 1 557 558 equ TB6, 0 559 equ TB9, 1 560 561t8_p1_init: 562 " initial tally 0, 9-bit chars, start at character 3 563 vfd 18/t8_a1, 12/0, 1/TB9, 2/MBZ, 3/3 564 565t9_p1_init: 566 " initial tally 0, 9-bit chars, start at character 0 567 vfd 18/t9_a1, 12/0, 1/TB9, 2/MBZ, 3/0 568 569t10_p1_init: 570 " initial tally 0, 9-bit chars, character 3 571 vfd 18/t10_a1, 12/0, 1/TB9, 2/MBZ, 3/3 572 573t12_p1_init: 574 " initial tally 0, 9-bit chars, start at character 3 575 vfd 18/t12_a1, 12/0, 1/TB9, 2/MBZ, 3/3 576 577t13_p1_init: 578 " initial tally 0, 9-bit chars, start at character 3 579 vfd 18/t13_a1, 12/0, 1/TB9, 2/MBZ, 3/3 580 581t14_p1_init: 582 vfd 18/t14_a1, 12/0, 6/1 " initial tally 0, delta 1 583 584t15_p1_init: 585 vfd 18/t15_a1, 12/0, 6/0 " initial tally 0 586 587 bool TM_RI,20 588 589t16_p1_init: 590 vfd 18/t16_p2, 12/0, 6/TM_RI " initial tally 0 591 592t17_p1_init: 593 vfd 18/t17_a1, 12/0, 6/0 " initial tally 0 594 595t18_p1_init: 596 vfd 18/t18_p2, 12/0, 6/TM_RI " initial tally 0 597 598" Test 20, 21 599 600t20_link_ptr: 601t21_link_ptr: 602 vfd 6/0,12/2,18/2048 603 604t20_link_ptr_3: 605t21_link_ptr_3: 606" go through seg 3 which is the same memory as segment 2 but always mapped 607 vfd 6/0,12/3,18/2048 608 609" ITS 610" 611" Word 0 612" 3 bits MBZ 613" 15 bits Segment number 614" 3 bits Ring number 615" 9 bits MBZ 616" 6 bits 43 617" Word 1 618" 18 bits Word number 619" 3 bits MBZ 620" 6 bits Bit number 621" 3 bits MBZ 622" 6 bits Tag 623 624 even 625"t20_data is at 3:2052 626t20_snapped_init: 627 vfd 3/0,15/2,3/0,9/0,6/35 628 "vfd 18/2052,3/0,6/0,3/0,6/16 629 vfd 18/2052,3/0,6/0,3/0,6/0 630"t21_data is at 3:2053 631t21_snapped_init: 632 vfd 3/0,15/2,3/0,9/0,6/35 633 "vfd 18/2053,3/0,6/0,3/0,6/16 634 vfd 18/2053,3/0,6/0,3/0,6/0 635 636t21_unsnapped_init: 637 vfd 3/0,15/0,3/0,9/0,6/39 638 vfd 18/0,3/0,6/0,3/0,6/0 639 640mme_enable: 641 oct 0 642 643msg_test1: 644 aci 'Test 1 R,n ...\n\0' 645 646msg_test_ok: 647 aci '... ok\n\0' 648 649msg_test2: 650 aci 'Test 2 R,* ...\n\0' 651 652msg_test3: 653 aci 'Test 3 R,*,* ...\n\0' 654 655msg_test4: 656 aci 'Test 4 R,3* ...\n\0' 657 658msg_test5: 659 aci 'Test 5 R,*seg ...\n\0' 660 661msg_test6: 662 aci 'Test 6 R,*seg, * ...\n\0' 663 664msg_test7: 665 aci 'Test 7 R,sd ... \n\0' 666 667msg_test8: 668 aci 'Test 8 R,scr ...\n\0' 669 670msg_test9: 671 aci 'Test 9 R,scr w/addr change ...\n\0' 672 673msg_test10: 674 aci 'Test 10 R,ci ...\n\0' 675 676msg_test11: 677 aci 'Test 11 R,i ...\n\0' 678 679msg_test12: 680 aci 'Test 12 R,sc ...\n\0' 681 682msg_test13: 683 aci 'Test 13 R,sc w/addr change ...\n\0' 684 685msg_test14: 686 aci 'Test 14 R,ad ...\n\0' 687 688msg_test15: 689 aci 'Test 15 R,di ...\n\0' 690 691msg_test16: 692 aci 'Test 16 R,dic ...\n\0' 693 694msg_test18: 695 aci 'Test 18 R,idc ...\n\0' 696 697msg_test17: 698 aci 'Test 17 R,id ...\n\0' 699 700msg_test19: 701 aci 'Test 19 R,*3 ...\n\0' 702 703msg_test20: 704 aci 'Test 20 fault tag 3 snapped ... \n\0' 705 706msg_test21: 707 aci 'Test 21 fault tag 3 unsnapped ...\n\0' 708 709msg_test22: 710 aci 'Test 22 IR,RI,R ...\n\0' 711 712msg_main_entry: 713 aci 'Fault test main\n\0' 714 715msg_dbg_mme_back: 716 aci 'back from mme\n\0' 717 718msg_done: 719 aci 'Fault test done\n\0' 720 721msg_without: 722 aci 'Running tests without page faulting \n\0' 723 724msg_with: 725 aci 'Running tests with page faulting\n\0' 726 727" Page 1: indirect words 728 729 org 1*1024 730 731" Test 2 732 733t2_p1: arg t2_a1 734 735" Test 3 736 737t3_p1: arg t3_p2,* 738 739" Test 4 740 741t4_p1: dec -1 742 arg t4_a1 743 744" Test 5 745 746 even 747t5_p1: its 2,1024 " t5_a1 is at offset 1024 in seg 2. 748 749" Test 6 750 751 even 752t6_p1: its 2,0,* " t6_p2 is at offset 0 in seg 2. 753 754" Test 7 755 756t7_p1: oct 0 " Initialized to t7_p1_init in test 757 758" Test 8 759 760t8_p1: oct 0 " Initialized to t8_p1_init in test 761 762" Test 9 763 764t9_p1: oct 0 " Initialized to t9_p1_init in test 765 766" Test 10 767 768t10_p1: oct 0 " Initialized to t10_p1_init in test 769 770" Test 11 771 772t11_p1: vfd 18/t11_a1, 18/0 773 774" Test 12 775 776t12_p1: oct 0 " Initialized to t12_p1_init in test 777 778" Test 13 779 780t13_p1: oct 0 " Initialized to t13_p1_init in test 781 782" Test 14 783 784t14_p1: oct 0 " Initialized to t14_p1_init in test 785 786" Test 15 787 788t15_p1: oct 0 " Initialized to t15_p1_init in test 789 790" Test 16 791 792t16_p1: oct 0 " Initialized to t16_p1_init in test 793 794" Test 17 795 796t17_p1: oct 0 " Initialized to t17_p1_init in test 797 798" Test 18 799 800t18_p1: oct 0 " Initialized to t18_p1_init in test 801 802" Test 19 803 804t19_p1: arg t19_a1 805 806" Test 22 807t22_p1: arg t22_p2,N* 808 809" 810" Page 2: double indirect words 811" 812 813 org 2*1024 814 815" Test 3 816 817t3_p2: arg t3_a1 818 819" Test 16 820 821 arg t16_a1 822t16_p2: oct 0 823 824" Test 18 825 826t18_p2: arg t18_a1 827 828" Test 22 829 830t22_p2: arg t22_a1-1 831 832" 833" Page 3: data 834" 835 836 org 3*1024 837 838" Test 1 839 840t1_a1: dec t1_data 841 842" Test 2 843 844t2_a1: dec t2_data 845 846" Test 3 847 848t3_a1: dec t3_data 849 850" Test 4 851 852t4_a1: dec t4_data 853 854" Test 5 855 856t5_a1: dec t5_data " This is not actually the data read by test 5 -- it 857 " is over on seg 2. 858 859" Test 6 860 861t6_a1: dec t6_data " This is not actually the data read by test 6 -- it 862 " is over on seg 2. 863 864" Test 7 865 866 dec t7_data 867t7_a1: oct 0 " subtract delta will back up one word to the data 868 869" Test 8 870 871t8_a1: vfd 9/-1, 9/-1, 9/t8_data, 9/-1 872 873" Test 9 874 875 vfd 9/-1, 9/-1, 9/-1, 9/t9_data 876t9_a1: vfd 9/-1, 9/-1, 9/-1, 9/-1 877 878" Test 10 879 880t10_a1: vfd 9/-1, 9/-1, 9/-1, 9/t10_data 881 882" Test 11 883 884t11_a1: dec t11_data 885 886" Test 12 887 888t12_a1: vfd 9/-1, 9/-1, 9/-1, 9/t12_data 889 890" Test 13 891 892t13_a1: vfd 9/-1, 9/-1, 9/-1, 9/t13_data 893 vfd 9/t13_data2, 9/-1, 9/-1, 9/-1 894 895" Test 14 896 897t14_a1: dec t14_data 898t14_a2: dec t14_data2 899 900" Test 15 901 902 dec t15_data 903t15_a1: oct 0 " DIC will back up one word to the data 904 905" Test 16 906 907t16_a1: dec t16_data 908 909" Test 17 910 911t17_a1: dec t17_data 912 913" Test 18 914 915t18_a1: dec t18_data 916 917" Test 19 918 919t19_a1: oct -1 920 dec t19_data 921 922" Test 20 923 924t20_a1: dec t20_data 925 926" Test 21 927 928t21_a1: dec t21_data 929 930" Test 22 931 932t22_a1: dec t22_data 933 934