1 // license:BSD-3-Clause 2 // copyright-holders:Sandro Ronco 3 // thanks-to:rfka01 4 /********************************************************************* 5 6 Decision Mate V expansion slot 7 8 *********************************************************************/ 9 10 #ifndef MAME_BUS_DMV_DMVBUS_H 11 #define MAME_BUS_DMV_DMVBUS_H 12 13 #pragma once 14 15 /*************************************************************************** 16 TYPE DEFINITIONS 17 ***************************************************************************/ 18 19 class device_dmvslot_interface; 20 21 22 // ======================> dmvcart_slot_device 23 24 class dmvcart_slot_device : public device_t, 25 public device_single_card_slot_interface<device_dmvslot_interface> 26 { 27 public: 28 // construction/destruction 29 template <typename T> dmvcart_slot_device(machine_config const & mconfig,char const * tag,device_t * owner,T && opts,char const * dflt)30 dmvcart_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) 31 : dmvcart_slot_device(mconfig, tag, owner, (uint32_t)0) 32 { 33 option_reset(); 34 opts(*this); 35 set_default_option(dflt); 36 set_fixed(false); 37 } 38 dmvcart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 39 virtual ~dmvcart_slot_device(); 40 prog_read()41 auto prog_read() { return m_prog_read_cb.bind(); } prog_write()42 auto prog_write() { return m_prog_write_cb.bind(); } out_int()43 auto out_int() { return m_out_int_cb.bind(); } out_irq()44 auto out_irq() { return m_out_irq_cb.bind(); } out_thold()45 auto out_thold() { return m_out_thold_cb.bind(); } set_memspace(T && tag,int spacenum)46 template <typename T> void set_memspace(T &&tag, int spacenum) { m_memspace.set_tag(std::forward<T>(tag), spacenum); } set_iospace(T && tag,int spacenum)47 template <typename T> void set_iospace(T &&tag, int spacenum) { m_iospace.set_tag(std::forward<T>(tag), spacenum); } 48 49 // reading and writing 50 bool read(offs_t offset, uint8_t &data); 51 bool write(offs_t offset, uint8_t data); 52 void ram_read(uint8_t cas, offs_t offset, uint8_t &data); 53 void ram_write(uint8_t cas, offs_t offset, uint8_t data); 54 void io_read(int ifsel, offs_t offset, uint8_t &data); 55 void io_write(int ifsel, offs_t offset, uint8_t data); 56 void hold_w(int state); 57 void switch16_w(int state); 58 void timint_w(int state); 59 void keyint_w(int state); 60 void busint_w(int state); 61 void flexint_w(int state); 62 void irq2_w(int state); 63 void irq2a_w(int state); 64 void irq3_w(int state); 65 void irq4_w(int state); 66 void irq5_w(int state); 67 void irq6_w(int state); 68 bool av16bit(); 69 70 protected: 71 // device-level overrides 72 virtual void device_start() override; 73 74 // internal state 75 devcb_read8 m_prog_read_cb; 76 devcb_write8 m_prog_write_cb; 77 devcb_write_line m_out_int_cb; 78 devcb_write_line m_out_irq_cb; 79 devcb_write_line m_out_thold_cb; 80 81 required_address_space m_memspace; 82 required_address_space m_iospace; 83 84 device_dmvslot_interface* m_cart; 85 86 friend class device_dmvslot_interface; 87 }; 88 89 90 // ======================> device_dmvslot_interface 91 92 class device_dmvslot_interface : public device_interface 93 { 94 public: 95 // construction/destruction 96 virtual ~device_dmvslot_interface(); 97 read(offs_t offset,uint8_t & data)98 virtual bool read(offs_t offset, uint8_t &data) { return false; } write(offs_t offset,uint8_t data)99 virtual bool write(offs_t offset, uint8_t data) { return false; } io_read(int ifsel,offs_t offset,uint8_t & data)100 virtual void io_read(int ifsel, offs_t offset, uint8_t &data) { } io_write(int ifsel,offs_t offset,uint8_t data)101 virtual void io_write(int ifsel, offs_t offset, uint8_t data) { } 102 103 // slot 1 ram_read(uint8_t cas,offs_t offset,uint8_t & data)104 virtual void ram_read(uint8_t cas, offs_t offset, uint8_t &data) { } ram_write(uint8_t cas,offs_t offset,uint8_t data)105 virtual void ram_write(uint8_t cas, offs_t offset, uint8_t data) { } 106 107 // slot 7 and 7A av16bit()108 virtual bool av16bit() { return false; } hold_w(int state)109 virtual void hold_w(int state) { } switch16_w(int state)110 virtual void switch16_w(int state) { } timint_w(int state)111 virtual void timint_w(int state) { } keyint_w(int state)112 virtual void keyint_w(int state) { } busint_w(int state)113 virtual void busint_w(int state) { } flexint_w(int state)114 virtual void flexint_w(int state) { } irq2_w(int state)115 virtual void irq2_w(int state) { } irq2a_w(int state)116 virtual void irq2a_w(int state) { } irq3_w(int state)117 virtual void irq3_w(int state) { } irq4_w(int state)118 virtual void irq4_w(int state) { } irq5_w(int state)119 virtual void irq5_w(int state) { } irq6_w(int state)120 virtual void irq6_w(int state) { } 121 122 protected: 123 device_dmvslot_interface(const machine_config &mconfig, device_t &device); 124 memspace()125 address_space &memspace() { return *m_bus->m_memspace; } iospace()126 address_space &iospace() { return *m_bus->m_iospace; } 127 prog_read(T &&...args)128 template <typename... T> uint8_t prog_read(T &&... args) { return m_bus->m_prog_read_cb(std::forward<T>(args)...); } prog_write(T &&...args)129 template <typename... T> void prog_write(T &&... args) { m_bus->m_prog_write_cb(std::forward<T>(args)...); } 130 out_int(int state)131 void out_int(int state) { m_bus->m_out_int_cb(state); } out_irq(int state)132 void out_irq(int state) { m_bus->m_out_irq_cb(state); } out_thold(int state)133 void out_thold(int state) { m_bus->m_out_thold_cb(state); } 134 135 private: 136 dmvcart_slot_device *m_bus; 137 }; 138 139 140 // device type definition 141 DECLARE_DEVICE_TYPE(DMVCART_SLOT, dmvcart_slot_device) 142 143 #endif // MAME_BUS_DMV_DMVBUS_H 144