1 // license:BSD-3-Clause 2 // copyright-holders:Curt Coder 3 #pragma once 4 5 #ifndef MAME_INCLUDES_ABC1600_H 6 #define MAME_INCLUDES_ABC1600_H 7 8 #include "bus/abcbus/abcbus.h" 9 #include "bus/abckb/abckb.h" 10 #include "bus/rs232/rs232.h" 11 #include "cpu/m68000/m68000.h" 12 #include "imagedev/floppy.h" 13 #include "machine/abc1600mac.h" 14 #include "machine/e0516.h" 15 #include "machine/nmc9306.h" 16 #include "machine/ram.h" 17 #include "machine/wd_fdc.h" 18 #include "machine/z80dma.h" 19 #include "machine/z80scc.h" 20 #include "machine/z80sio.h" 21 #include "machine/z8536.h" 22 #include "video/abc1600.h" 23 24 25 26 //************************************************************************** 27 // MACROS / CONSTANTS 28 //************************************************************************** 29 30 #define MC68008P8_TAG "3f" 31 #define Z8410AB1_0_TAG "5g" 32 #define Z8410AB1_1_TAG "7g" 33 #define Z8410AB1_2_TAG "9g" 34 #define Z8470AB1_TAG "17b" 35 #define Z8530B1_TAG "2a" 36 #define Z8536B1_TAG "15b" 37 #define SAB1797_02P_TAG "5a" 38 #define FDC9229BT_TAG "7a" 39 #define E050_C16PC_TAG "13b" 40 #define NMC9306_TAG "14c" 41 #define SCREEN_TAG "screen" 42 #define BUS0I_TAG "bus0i" 43 #define BUS0X_TAG "bus0x" 44 #define BUS1_TAG "bus1" 45 #define BUS2_TAG "bus2" 46 #define RS232_A_TAG "rs232a" 47 #define RS232_B_TAG "rs232b" 48 #define RS232_PR_TAG "rs232pr" 49 #define ABC_KEYBOARD_PORT_TAG "kb" 50 51 52 53 //************************************************************************** 54 // TYPE DEFINITIONS 55 //************************************************************************** 56 57 // ======================> abc1600_state 58 59 class abc1600_state : public driver_device 60 { 61 public: abc1600_state(const machine_config & mconfig,device_type type,const char * tag)62 abc1600_state(const machine_config &mconfig, device_type type, const char *tag) : 63 driver_device(mconfig, type, tag), 64 m_maincpu(*this, MC68008P8_TAG), 65 m_mac(*this, ABC1600_MAC_TAG), 66 m_dma0(*this, Z8410AB1_0_TAG), 67 m_dma1(*this, Z8410AB1_1_TAG), 68 m_dma2(*this, Z8410AB1_2_TAG), 69 m_dart(*this, Z8470AB1_TAG), 70 m_scc(*this, Z8530B1_TAG), 71 m_cio(*this, Z8536B1_TAG), 72 m_fdc(*this, SAB1797_02P_TAG), 73 m_rtc(*this, E050_C16PC_TAG), 74 m_nvram(*this, NMC9306_TAG), 75 m_ram(*this, RAM_TAG), 76 m_floppy0(*this, SAB1797_02P_TAG":0"), 77 m_floppy1(*this, SAB1797_02P_TAG":1"), 78 m_floppy2(*this, SAB1797_02P_TAG":2"), 79 m_bus0i(*this, BUS0I_TAG), 80 m_bus0x(*this, BUS0X_TAG), 81 m_bus1(*this, BUS1_TAG), 82 m_bus2(*this, BUS2_TAG) 83 { } 84 85 required_device<m68000_base_device> m_maincpu; 86 required_device<abc1600_mac_device> m_mac; 87 required_device<z80dma_device> m_dma0; 88 required_device<z80dma_device> m_dma1; 89 required_device<z80dma_device> m_dma2; 90 required_device<z80dart_device> m_dart; 91 required_device<scc8530_device> m_scc; 92 required_device<z8536_device> m_cio; 93 required_device<fd1797_device> m_fdc; 94 required_device<e0516_device> m_rtc; 95 required_device<nmc9306_device> m_nvram; 96 required_device<ram_device> m_ram; 97 required_device<floppy_connector> m_floppy0; 98 required_device<floppy_connector> m_floppy1; 99 required_device<floppy_connector> m_floppy2; 100 required_device<abcbus_slot_device> m_bus0i; 101 required_device<abcbus_slot_device> m_bus0x; 102 required_device<abcbus_slot_device> m_bus1; 103 required_device<abcbus_slot_device> m_bus2; 104 105 virtual void machine_start() override; 106 virtual void machine_reset() override; 107 108 uint8_t bus_r(offs_t offset); 109 void bus_w(offs_t offset, uint8_t data); 110 uint8_t dart_r(offs_t offset); 111 void dart_w(offs_t offset, uint8_t data); 112 uint8_t scc_r(offs_t offset); 113 void scc_w(offs_t offset, uint8_t data); 114 uint8_t cio_r(offs_t offset); 115 void cio_w(offs_t offset, uint8_t data); 116 void fw0_w(uint8_t data); 117 void fw1_w(uint8_t data); 118 void spec_contr_reg_w(uint8_t data); 119 120 void dbrq_w(int state); dma0_iorq_r(offs_t offset)121 uint8_t dma0_iorq_r(offs_t offset) { return m_sysfs ? m_mac->dma0_iorq_r(offset) : (m_bus0i->read_tren() & m_bus0x->read_tren()); } dma0_iorq_w(offs_t offset,uint8_t data)122 void dma0_iorq_w(offs_t offset, uint8_t data) { if (m_sysfs) m_mac->dma0_iorq_w(offset, data); else { m_bus0i->write_tren(data); m_bus0x->write_tren(data); }; } dma1_iorq_r(offs_t offset)123 uint8_t dma1_iorq_r(offs_t offset) { return m_sysscc ? m_mac->dma1_iorq_r(offset) : m_bus1->read_tren(); } dma1_iorq_w(offs_t offset,uint8_t data)124 void dma1_iorq_w(offs_t offset, uint8_t data) { if (m_sysscc) m_mac->dma1_iorq_w(offset, data); else m_bus1->write_tren(data); } 125 126 uint8_t cio_pa_r(); 127 uint8_t cio_pb_r(); 128 void cio_pb_w(uint8_t data); 129 uint8_t cio_pc_r(); 130 void cio_pc_w(uint8_t data); 131 132 void nmi_w(int state); 133 134 void cpu_space_map(address_map &map); 135 136 void update_pren0(int state); 137 void update_pren1(int state); 138 void update_drdy0(int state); 139 void update_drdy1(int state); sccrq_a_w(int state)140 void sccrq_a_w(int state) { m_sccrq_a = state; update_drdy1(0); } sccrq_b_w(int state)141 void sccrq_b_w(int state) { m_sccrq_b = state; update_drdy1(0); } dart_irq_w(int state)142 void dart_irq_w(int state) { m_dart_irq = state; m_maincpu->set_input_line(M68K_IRQ_5, (m_dart_irq || m_scc_irq) ? ASSERT_LINE : CLEAR_LINE); } scc_irq_w(int state)143 void scc_irq_w(int state) { m_scc_irq = state; m_maincpu->set_input_line(M68K_IRQ_5, (m_dart_irq || m_scc_irq) ? ASSERT_LINE : CLEAR_LINE); } 144 145 // DMA 146 int m_dmadis; 147 int m_sysscc; 148 int m_sysfs; 149 uint8_t m_cause; 150 int m_partst; // parity test 151 152 void abc1600(machine_config &config); 153 void abc1600_mem(address_map &map); 154 void mac_mem(address_map &map); 155 // peripherals 156 int m_cs7; // card select address bit 7 157 int m_bus0; // BUS 0 selected 158 uint8_t m_csb; // card select 159 int m_atce; // V.24 channel A external clock enable 160 int m_btce; // V.24 channel B external clock enable 161 bool m_sccrq_a; 162 bool m_sccrq_b; 163 int m_dart_irq; 164 int m_scc_irq; 165 }; 166 167 168 169 #endif 170