1 // license:BSD-3-Clause
2 // copyright-holders:Fabio Priuli
3 /***********************************************************************************************************
4
5 UPD7725 / UPD96050 add-on chip emulation (for SNES/SFC)
6 used in carts with DSP-1, DSP-1A, DSP-1B, DSP-2, DSP-3, DSP-4, ST-010 & ST-011 add-on chips
7
8 ***********************************************************************************************************/
9
10
11 #include "emu.h"
12 #include "upd.h"
13
14
15 // helpers
get_prg(uint8_t * CPU,uint32_t addr)16 inline uint32_t get_prg(uint8_t *CPU, uint32_t addr)
17 {
18 return ((CPU[addr * 4] << 24) | (CPU[addr * 4 + 1] << 16) | (CPU[addr * 4 + 2] << 8) | 0x00);
19 }
get_data(uint8_t * CPU,uint32_t addr)20 inline uint16_t get_data(uint8_t *CPU, uint32_t addr)
21 {
22 return ((CPU[addr * 2] << 8) | CPU[addr * 2 + 1]);
23 }
24
25 //-------------------------------------------------
26 // constructor
27 //-------------------------------------------------
28
29 DEFINE_DEVICE_TYPE(SNS_LOROM_NECDSP, sns_rom20_necdsp_device, "sns_rom_necdsp", "SNES Cart (LoROM) + NEC DSP")
30 DEFINE_DEVICE_TYPE(SNS_HIROM_NECDSP, sns_rom21_necdsp_device, "sns_rom21_necdsp", "SNES Cart (HiROM) + NEC DSP")
31 DEFINE_DEVICE_TYPE(SNS_LOROM_SETA10, sns_rom_seta10dsp_device, "sns_rom_seta10", "SNES Cart (LoROM) + Seta ST010 DSP")
32 DEFINE_DEVICE_TYPE(SNS_LOROM_SETA11, sns_rom_seta11dsp_device, "sns_rom_seta11", "SNES Cart (LoROM) + Seta ST011 DSP")
33
34
sns_rom20_necdsp_device(const machine_config & mconfig,device_type type,const char * tag,device_t * owner,uint32_t clock)35 sns_rom20_necdsp_device::sns_rom20_necdsp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
36 : sns_rom_device(mconfig, type, tag, owner, clock), m_upd7725(*this, "dsp")
37 {
38 }
39
sns_rom20_necdsp_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)40 sns_rom20_necdsp_device::sns_rom20_necdsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
41 : sns_rom20_necdsp_device(mconfig, SNS_LOROM_NECDSP, tag, owner, clock)
42 {
43 }
44
sns_rom21_necdsp_device(const machine_config & mconfig,device_type type,const char * tag,device_t * owner,uint32_t clock)45 sns_rom21_necdsp_device::sns_rom21_necdsp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
46 : sns_rom21_device(mconfig, type, tag, owner, clock), m_upd7725(*this, "dsp")
47 {
48 }
49
sns_rom21_necdsp_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)50 sns_rom21_necdsp_device::sns_rom21_necdsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
51 : sns_rom21_necdsp_device(mconfig, SNS_HIROM_NECDSP, tag, owner, clock)
52 {
53 }
54
sns_rom_setadsp_device(const machine_config & mconfig,device_type type,const char * tag,device_t * owner,uint32_t clock)55 sns_rom_setadsp_device::sns_rom_setadsp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
56 : sns_rom_device(mconfig, type, tag, owner, clock), m_upd96050(*this, "dsp")
57 {
58 }
59
sns_rom_seta10dsp_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)60 sns_rom_seta10dsp_device::sns_rom_seta10dsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
61 : sns_rom_setadsp_device(mconfig, SNS_LOROM_SETA10, tag, owner, clock)
62 {
63 }
64
sns_rom_seta11dsp_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)65 sns_rom_seta11dsp_device::sns_rom_seta11dsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
66 : sns_rom_setadsp_device(mconfig, SNS_LOROM_SETA11, tag, owner, clock)
67 {
68 }
69
70
device_start()71 void sns_rom20_necdsp_device::device_start()
72 {
73 m_dsp_prg.resize(0x2000/sizeof(uint32_t));
74 m_dsp_data.resize(0x800/sizeof(uint16_t));
75 }
76
device_start()77 void sns_rom21_necdsp_device::device_start()
78 {
79 m_dsp_prg.resize(0x2000/sizeof(uint32_t));
80 m_dsp_data.resize(0x800/sizeof(uint16_t));
81 }
82
device_start()83 void sns_rom_setadsp_device::device_start()
84 {
85 m_dsp_prg.resize(0x10000/sizeof(uint32_t));
86 m_dsp_data.resize(0x1000/sizeof(uint16_t));
87 }
88
89 /*-------------------------------------------------
90 mapper specific handlers
91 -------------------------------------------------*/
92
93 //-------------------------------------------------
94 // NEC DSP
95 //-------------------------------------------------
96
97 // Lo-ROM
98
99 // DSP dump contains prg at offset 0 and data at offset 0x2000
necdsp_prg_r(offs_t offset)100 uint32_t sns_rom20_necdsp_device::necdsp_prg_r(offs_t offset)
101 {
102 return get_prg(&m_bios[0], offset);
103 }
104
necdsp_data_r(offs_t offset)105 uint16_t sns_rom20_necdsp_device::necdsp_data_r(offs_t offset)
106 {
107 return get_data(&m_bios[0], offset + 0x2000/2);
108 }
109
110
111 //-------------------------------------------------
112 // ADDRESS_MAP( dsp_prg_map )
113 //-------------------------------------------------
114
dsp_prg_map_lorom(address_map & map)115 void sns_rom20_necdsp_device::dsp_prg_map_lorom(address_map &map)
116 {
117 map(0x0000, 0x07ff).r(FUNC(sns_rom20_necdsp_device::necdsp_prg_r));
118 }
119
120
121 //-------------------------------------------------
122 // ADDRESS_MAP( dsp_data_map )
123 //-------------------------------------------------
124
dsp_data_map_lorom(address_map & map)125 void sns_rom20_necdsp_device::dsp_data_map_lorom(address_map &map)
126 {
127 map(0x0000, 0x03ff).r(FUNC(sns_rom20_necdsp_device::necdsp_data_r));
128 }
129
130
131 //-------------------------------------------------
132 // device_add_mconfig - add device configuration
133 //-------------------------------------------------
134
device_add_mconfig(machine_config & config)135 void sns_rom20_necdsp_device::device_add_mconfig(machine_config &config)
136 {
137 UPD7725(config, m_upd7725, 8000000);
138 m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom20_necdsp_device::dsp_prg_map_lorom);
139 m_upd7725->set_addrmap(AS_DATA, &sns_rom20_necdsp_device::dsp_data_map_lorom);
140 }
141
chip_read(offs_t offset)142 uint8_t sns_rom20_necdsp_device::chip_read(offs_t offset)
143 {
144 offset &= 0x7fff;
145 return m_upd7725->snesdsp_read(offset < 0x4000);
146 }
147
148
chip_write(offs_t offset,uint8_t data)149 void sns_rom20_necdsp_device::chip_write(offs_t offset, uint8_t data)
150 {
151 offset &= 0x7fff;
152 m_upd7725->snesdsp_write(offset < 0x4000, data);
153 }
154
155
156 // Hi-ROM
157
158 // DSP dump contains prg at offset 0 and data at offset 0x2000
necdsp_prg_r(offs_t offset)159 uint32_t sns_rom21_necdsp_device::necdsp_prg_r(offs_t offset)
160 {
161 return get_prg(&m_bios[0], offset);
162 }
163
necdsp_data_r(offs_t offset)164 uint16_t sns_rom21_necdsp_device::necdsp_data_r(offs_t offset)
165 {
166 return get_data(&m_bios[0], offset + 0x2000/2);
167 }
168
169
170 //-------------------------------------------------
171 // ADDRESS_MAP( dsp_prg_map )
172 //-------------------------------------------------
173
dsp_prg_map_hirom(address_map & map)174 void sns_rom21_necdsp_device::dsp_prg_map_hirom(address_map &map)
175 {
176 map(0x0000, 0x07ff).r(FUNC(sns_rom21_necdsp_device::necdsp_prg_r));
177 }
178
179
180 //-------------------------------------------------
181 // ADDRESS_MAP( dsp_data_map )
182 //-------------------------------------------------
183
dsp_data_map_hirom(address_map & map)184 void sns_rom21_necdsp_device::dsp_data_map_hirom(address_map &map)
185 {
186 map(0x0000, 0x03ff).r(FUNC(sns_rom21_necdsp_device::necdsp_data_r));
187 }
188
189 //-------------------------------------------------
190 // device_add_mconfig - add device configuration
191 //-------------------------------------------------
192
device_add_mconfig(machine_config & config)193 void sns_rom21_necdsp_device::device_add_mconfig(machine_config &config)
194 {
195 UPD7725(config, m_upd7725, 8000000);
196 m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom21_necdsp_device::dsp_prg_map_hirom);
197 m_upd7725->set_addrmap(AS_DATA, &sns_rom21_necdsp_device::dsp_data_map_hirom);
198 }
199
chip_read(offs_t offset)200 uint8_t sns_rom21_necdsp_device::chip_read(offs_t offset)
201 {
202 offset &= 0x1fff;
203 return m_upd7725->snesdsp_read(offset < 0x1000);
204 }
205
206
chip_write(offs_t offset,uint8_t data)207 void sns_rom21_necdsp_device::chip_write(offs_t offset, uint8_t data)
208 {
209 offset &= 0x1fff;
210 m_upd7725->snesdsp_write(offset < 0x1000, data);
211 }
212
213
214 //-------------------------------------------------
215 // Seta DSP
216 //-------------------------------------------------
217
218 // same as above but additional read/write handling for the add-on chip
219
chip_read(offs_t offset)220 uint8_t sns_rom_setadsp_device::chip_read(offs_t offset)
221 {
222 if (offset >= 0x600000 && offset < 0x680000 && (offset & 0xffff) < 0x4000)
223 m_upd96050->snesdsp_read((offset & 0x01) ? false : true);
224
225 if (offset >= 0x680000 && offset < 0x700000 && (offset & 0xffff) < 0x8000)
226 {
227 uint16_t address = offset & 0xffff;
228 uint16_t temp = m_upd96050->dataram_r(address/2);
229 if (offset & 1)
230 return temp >> 8;
231 else
232 return temp & 0xff;
233 }
234
235 return 0xff;
236 }
237
238
chip_write(offs_t offset,uint8_t data)239 void sns_rom_setadsp_device::chip_write(offs_t offset, uint8_t data)
240 {
241 if (offset >= 0x600000 && offset < 0x680000 && (offset & 0xffff) < 0x4000)
242 {
243 m_upd96050->snesdsp_write((offset & 0x01) ? false : true, data);
244 return;
245 }
246
247 if (offset >= 0x680000 && offset < 0x700000 && (offset & 0xffff) < 0x8000)
248 {
249 uint16_t address = offset & 0xffff;
250 uint16_t temp = m_upd96050->dataram_r(address/2);
251
252 if (offset & 1)
253 {
254 temp &= 0xff;
255 temp |= data << 8;
256 }
257 else
258 {
259 temp &= 0xff00;
260 temp |= data;
261 }
262
263 m_upd96050->dataram_w(address/2, temp);
264 return;
265 }
266 }
267
268
269 // DSP dump contains prg at offset 0 and data at offset 0x10000
setadsp_prg_r(offs_t offset)270 uint32_t sns_rom_setadsp_device::setadsp_prg_r(offs_t offset)
271 {
272 return get_prg(&m_bios[0], offset);
273 }
274
setadsp_data_r(offs_t offset)275 uint16_t sns_rom_setadsp_device::setadsp_data_r(offs_t offset)
276 {
277 return get_data(&m_bios[0], offset + 0x10000/2);
278 }
279
280
281 //-------------------------------------------------
282 // ADDRESS_MAP( st01x_prg_map )
283 //-------------------------------------------------
284
st01x_prg_map(address_map & map)285 void sns_rom_setadsp_device::st01x_prg_map(address_map &map)
286 {
287 map(0x0000, 0x3fff).r(FUNC(sns_rom_setadsp_device::setadsp_prg_r));
288 }
289
290
291 //-------------------------------------------------
292 // ADDRESS_MAP( st01x_data_map )
293 //-------------------------------------------------
294
st01x_data_map(address_map & map)295 void sns_rom_setadsp_device::st01x_data_map(address_map &map)
296 {
297 map(0x0000, 0x07ff).r(FUNC(sns_rom_setadsp_device::setadsp_data_r));
298 }
299
300
301 //-------------------------------------------------
302 // device_add_mconfig - add device configuration
303 //-------------------------------------------------
304
device_add_mconfig(machine_config & config)305 void sns_rom_seta10dsp_device::device_add_mconfig(machine_config &config)
306 {
307 UPD96050(config, m_upd96050, 10000000);
308 m_upd96050->set_addrmap(AS_PROGRAM, &sns_rom_seta10dsp_device::st01x_prg_map);
309 m_upd96050->set_addrmap(AS_DATA, &sns_rom_seta10dsp_device::st01x_data_map);
310 }
311
312
device_add_mconfig(machine_config & config)313 void sns_rom_seta11dsp_device::device_add_mconfig(machine_config &config)
314 {
315 UPD96050(config, m_upd96050, 15000000);
316 m_upd96050->set_addrmap(AS_PROGRAM, &sns_rom_seta11dsp_device::st01x_prg_map);
317 m_upd96050->set_addrmap(AS_DATA, &sns_rom_seta11dsp_device::st01x_data_map);
318 }
319
320
321 // To make faster DSP access to its internal rom, let's install read banks and map m_bios there with correct byte order
322
speedup_addon_bios_access()323 void sns_rom20_necdsp_device::speedup_addon_bios_access()
324 {
325 m_upd7725->space(AS_PROGRAM).install_read_bank(0x0000, 0x07ff, "dsp_prg");
326 m_upd7725->space(AS_DATA).install_read_bank(0x0000, 0x03ff, "dsp_data");
327 membank("dsp_prg")->set_base(&m_dsp_prg[0]);
328 membank("dsp_data")->set_base(&m_dsp_data[0]);
329 // copy data in the correct format
330 for (int x = 0; x < 0x800; x++)
331 m_dsp_prg[x] = (m_bios[x * 4] << 24) | (m_bios[x * 4 + 1] << 16) | (m_bios[x * 4 + 2] << 8) | 0x00;
332 for (int x = 0; x < 0x400; x++)
333 m_dsp_data[x] = (m_bios[0x2000 + x * 2] << 8) | m_bios[0x2000 + x * 2 + 1];
334 }
335
speedup_addon_bios_access()336 void sns_rom21_necdsp_device::speedup_addon_bios_access()
337 {
338 m_upd7725->space(AS_PROGRAM).install_read_bank(0x0000, 0x07ff, "dsp_prg");
339 m_upd7725->space(AS_DATA).install_read_bank(0x0000, 0x03ff, "dsp_data");
340 membank("dsp_prg")->set_base(&m_dsp_prg[0]);
341 membank("dsp_data")->set_base(&m_dsp_data[0]);
342 // copy data in the correct format
343 for (int x = 0; x < 0x800; x++)
344 m_dsp_prg[x] = (m_bios[x * 4] << 24) | (m_bios[x * 4 + 1] << 16) | (m_bios[x * 4 + 2] << 8) | 0x00;
345 for (int x = 0; x < 0x400; x++)
346 m_dsp_data[x] = (m_bios[0x2000 + x * 2] << 8) | m_bios[0x2000 + x * 2 + 1];
347 }
348
speedup_addon_bios_access()349 void sns_rom_setadsp_device::speedup_addon_bios_access()
350 {
351 m_upd96050->space(AS_PROGRAM).install_read_bank(0x0000, 0x3fff, "dsp_prg");
352 m_upd96050->space(AS_DATA).install_read_bank(0x0000, 0x07ff, "dsp_data");
353 membank("dsp_prg")->set_base(&m_dsp_prg[0]);
354 membank("dsp_data")->set_base(&m_dsp_data[0]);
355 // copy data in the correct format
356 for (int x = 0; x < 0x4000; x++)
357 m_dsp_prg[x] = (m_bios[x * 4] << 24) | (m_bios[x * 4 + 1] << 16) | (m_bios[x * 4 + 2] << 8) | 0x00;
358 for (int x = 0; x < 0x800; x++)
359 m_dsp_data[x] = (m_bios[0x10000 + x * 2] << 8) | m_bios[0x10000 + x * 2 + 1];
360 }
361
362
363
364
365 // Legacy versions including DSP dump roms, in order to support faulty dumps missing DSP data...
366
367 DEFINE_DEVICE_TYPE(SNS_LOROM_NECDSP1_LEG, sns_rom20_necdsp1_legacy_device, "sns_dsp1leg", "SNES Cart (LoROM) + NEC DSP1 Legacy")
368 DEFINE_DEVICE_TYPE(SNS_LOROM_NECDSP1B_LEG, sns_rom20_necdsp1b_legacy_device, "sns_dsp1bleg", "SNES Cart (LoROM) + NEC DSP1B Legacy")
369 DEFINE_DEVICE_TYPE(SNS_LOROM_NECDSP2_LEG, sns_rom20_necdsp2_legacy_device, "sns_dsp2leg", "SNES Cart (LoROM) + NEC DSP2 Legacy")
370 DEFINE_DEVICE_TYPE(SNS_LOROM_NECDSP3_LEG, sns_rom20_necdsp3_legacy_device, "sns_dsp3leg", "SNES Cart (LoROM) + NEC DSP3 Legacy")
371 DEFINE_DEVICE_TYPE(SNS_LOROM_NECDSP4_LEG, sns_rom20_necdsp4_legacy_device, "sns_dsp4leg", "SNES Cart (LoROM) + NEC DSP4 Legacy")
372 DEFINE_DEVICE_TYPE(SNS_HIROM_NECDSP1_LEG, sns_rom21_necdsp1_legacy_device, "sns_dsp1leg_hi", "SNES Cart (HiROM) + NEC DSP1 Legacy")
373 DEFINE_DEVICE_TYPE(SNS_LOROM_SETA10_LEG, sns_rom_seta10dsp_legacy_device, "sns_seta10leg", "SNES Cart (LoROM) + SETA ST010 DSP Legacy")
374 DEFINE_DEVICE_TYPE(SNS_LOROM_SETA11_LEG, sns_rom_seta11dsp_legacy_device, "sns_seta11leg", "SNES Cart (LoROM) + SETA ST011 DSP Legacy")
375
376
sns_rom20_necdsp1_legacy_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)377 sns_rom20_necdsp1_legacy_device::sns_rom20_necdsp1_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
378 : sns_rom20_necdsp_device(mconfig, SNS_LOROM_NECDSP1_LEG, tag, owner, clock)
379 {
380 }
381
sns_rom20_necdsp1b_legacy_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)382 sns_rom20_necdsp1b_legacy_device::sns_rom20_necdsp1b_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
383 : sns_rom20_necdsp_device(mconfig, SNS_LOROM_NECDSP1B_LEG, tag, owner, clock)
384 {
385 }
386
sns_rom20_necdsp2_legacy_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)387 sns_rom20_necdsp2_legacy_device::sns_rom20_necdsp2_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
388 : sns_rom20_necdsp_device(mconfig, SNS_LOROM_NECDSP2_LEG, tag, owner, clock)
389 {
390 }
391
sns_rom20_necdsp3_legacy_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)392 sns_rom20_necdsp3_legacy_device::sns_rom20_necdsp3_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
393 : sns_rom20_necdsp_device(mconfig, SNS_LOROM_NECDSP3_LEG, tag, owner, clock)
394 {
395 }
396
sns_rom20_necdsp4_legacy_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)397 sns_rom20_necdsp4_legacy_device::sns_rom20_necdsp4_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
398 : sns_rom20_necdsp_device(mconfig, SNS_LOROM_NECDSP4_LEG, tag, owner, clock)
399 {
400 }
401
sns_rom21_necdsp1_legacy_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)402 sns_rom21_necdsp1_legacy_device::sns_rom21_necdsp1_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
403 : sns_rom21_necdsp_device(mconfig, SNS_HIROM_NECDSP1_LEG, tag, owner, clock)
404 {
405 }
406
sns_rom_seta10dsp_legacy_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)407 sns_rom_seta10dsp_legacy_device::sns_rom_seta10dsp_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
408 : sns_rom_setadsp_device(mconfig, SNS_LOROM_SETA10_LEG, tag, owner, clock)
409 {
410 }
411
sns_rom_seta11dsp_legacy_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)412 sns_rom_seta11dsp_legacy_device::sns_rom_seta11dsp_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
413 : sns_rom_setadsp_device(mconfig, SNS_LOROM_SETA11_LEG, tag, owner, clock)
414 {
415 }
416
417
device_add_mconfig(machine_config & config)418 void sns_rom20_necdsp1_legacy_device::device_add_mconfig(machine_config &config)
419 {
420 UPD7725(config, m_upd7725, 8000000);
421 m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom20_necdsp1_legacy_device::dsp_prg_map_lorom);
422 m_upd7725->set_addrmap(AS_DATA, &sns_rom20_necdsp1_legacy_device::dsp_data_map_lorom);
423 }
424
device_add_mconfig(machine_config & config)425 void sns_rom20_necdsp1b_legacy_device::device_add_mconfig(machine_config &config)
426 {
427 UPD7725(config, m_upd7725, 8000000);
428 m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom20_necdsp1b_legacy_device::dsp_prg_map_lorom);
429 m_upd7725->set_addrmap(AS_DATA, &sns_rom20_necdsp1b_legacy_device::dsp_data_map_lorom);
430 }
431
device_add_mconfig(machine_config & config)432 void sns_rom20_necdsp2_legacy_device::device_add_mconfig(machine_config &config)
433 {
434 UPD7725(config, m_upd7725, 8000000);
435 m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom20_necdsp2_legacy_device::dsp_prg_map_lorom);
436 m_upd7725->set_addrmap(AS_DATA, &sns_rom20_necdsp2_legacy_device::dsp_data_map_lorom);
437 }
438
device_add_mconfig(machine_config & config)439 void sns_rom20_necdsp3_legacy_device::device_add_mconfig(machine_config &config)
440 {
441 UPD7725(config, m_upd7725, 8000000);
442 m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom20_necdsp3_legacy_device::dsp_prg_map_lorom);
443 m_upd7725->set_addrmap(AS_DATA, &sns_rom20_necdsp3_legacy_device::dsp_data_map_lorom);
444 }
445
device_add_mconfig(machine_config & config)446 void sns_rom20_necdsp4_legacy_device::device_add_mconfig(machine_config &config)
447 {
448 UPD7725(config, m_upd7725, 8000000);
449 m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom20_necdsp4_legacy_device::dsp_prg_map_lorom);
450 m_upd7725->set_addrmap(AS_DATA, &sns_rom20_necdsp4_legacy_device::dsp_data_map_lorom);
451 }
452
device_add_mconfig(machine_config & config)453 void sns_rom21_necdsp1_legacy_device::device_add_mconfig(machine_config &config)
454 {
455 UPD7725(config, m_upd7725, 8000000);
456 m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom21_necdsp1_legacy_device::dsp_prg_map_hirom);
457 m_upd7725->set_addrmap(AS_DATA, &sns_rom21_necdsp1_legacy_device::dsp_data_map_hirom);
458 }
459
device_add_mconfig(machine_config & config)460 void sns_rom_seta10dsp_legacy_device::device_add_mconfig(machine_config &config)
461 {
462 UPD96050(config, m_upd96050, 10000000);
463 m_upd96050->set_addrmap(AS_PROGRAM, &sns_rom_seta10dsp_legacy_device::st01x_prg_map);
464 m_upd96050->set_addrmap(AS_DATA, &sns_rom_seta10dsp_legacy_device::st01x_data_map);
465 }
466
device_add_mconfig(machine_config & config)467 void sns_rom_seta11dsp_legacy_device::device_add_mconfig(machine_config &config)
468 {
469 UPD96050(config, m_upd96050, 15000000);
470 m_upd96050->set_addrmap(AS_PROGRAM, &sns_rom_seta11dsp_legacy_device::st01x_prg_map);
471 m_upd96050->set_addrmap(AS_DATA, &sns_rom_seta11dsp_legacy_device::st01x_data_map);
472 }
473
474
475 ROM_START( snes_dsp1 )
476 ROM_REGION(0x2800, "addon", 0)
477 ROM_LOAD( "dsp1.bin", 0, 0x02800, CRC(2838f9f5) SHA1(0a03ccb1fd2bea91151c745a4d1f217ae784f889) )
478 ROM_END
479
ROM_START(snes_dsp1b)480 ROM_START( snes_dsp1b )
481 ROM_REGION(0x2800, "addon", 0)
482 ROM_LOAD( "dsp1b.bin", 0, 0x02800, CRC(453557e0) SHA1(3a218b0e4572a8eba6d0121b17fdac9529609220) )
483 ROM_END
484
485 ROM_START( snes_dsp2 )
486 ROM_REGION(0x2800, "addon", 0)
487 ROM_LOAD( "dsp2.bin", 0, 0x02800, CRC(8e9fbd9b) SHA1(06dd9fcb118d18f6bbe234e013cb8780e06d6e63) )
488 ROM_END
489
490 ROM_START( snes_dsp3 )
491 ROM_REGION(0x2800, "addon", 0)
492 ROM_LOAD( "dsp3.bin", 0, 0x02800, CRC(6b86728a) SHA1(1b133741fad810eb7320c21ecfdd427d25a46da1) )
493 ROM_END
494
495 ROM_START( snes_dsp4 )
496 ROM_REGION(0x2800, "addon", 0)
497 ROM_LOAD( "dsp4.bin", 0, 0x02800, CRC(ce0c7783) SHA1(76fd25f7dc26c3b3f7868a3aa78c7684068713e5) )
498 ROM_END
499
500 ROM_START( snes_st010 )
501 ROM_REGION(0x11000, "addon", 0)
502 ROM_LOAD( "st010.bin", 0, 0x11000, CRC(aa11ee2d) SHA1(cc1984e989cb94e3dcbb5f99e085b5414e18a017) )
503 ROM_END
504
505 ROM_START( snes_st011 )
506 ROM_REGION(0x11000, "addon", 0)
507 ROM_LOAD( "st011.bin", 0, 0x11000, CRC(34d2952c) SHA1(1375b8c1efc8cae4962b57dfe22f6b78e1ddacc8) )
508 ROM_END
509
510 const tiny_rom_entry *sns_rom20_necdsp1_legacy_device::device_rom_region() const
511 {
512 return ROM_NAME( snes_dsp1 );
513 }
514
device_rom_region() const515 const tiny_rom_entry *sns_rom20_necdsp1b_legacy_device::device_rom_region() const
516 {
517 return ROM_NAME( snes_dsp1b );
518 }
519
device_rom_region() const520 const tiny_rom_entry *sns_rom20_necdsp2_legacy_device::device_rom_region() const
521 {
522 return ROM_NAME( snes_dsp2 );
523 }
524
device_rom_region() const525 const tiny_rom_entry *sns_rom20_necdsp3_legacy_device::device_rom_region() const
526 {
527 return ROM_NAME( snes_dsp3 );
528 }
529
device_rom_region() const530 const tiny_rom_entry *sns_rom20_necdsp4_legacy_device::device_rom_region() const
531 {
532 return ROM_NAME( snes_dsp4 );
533 }
534
device_rom_region() const535 const tiny_rom_entry *sns_rom21_necdsp1_legacy_device::device_rom_region() const
536 {
537 return ROM_NAME( snes_dsp1 );
538 }
539
device_rom_region() const540 const tiny_rom_entry *sns_rom_seta10dsp_legacy_device::device_rom_region() const
541 {
542 return ROM_NAME( snes_st010 );
543 }
544
device_rom_region() const545 const tiny_rom_entry *sns_rom_seta11dsp_legacy_device::device_rom_region() const
546 {
547 return ROM_NAME( snes_st011 );
548 }
549