1 // license:BSD-3-Clause
2 // copyright-holders:Frank Palazzolo
3 /*****************************************************************************
4 *
5 * cp1610.c
6 * Portable CP1610 emulator (General Instrument CP1610)
7 *
8 * Copyright Frank Palazzolo, all rights reserved.
9 *
10 * This work is based on Juergen Buchmueller's F8 emulation,
11 * and the 'General Instruments CP1610' data sheets.
12 * Special thanks to Joe Zbiciak for his GPL'd CP1610 emulator
13 *
14 *****************************************************************************/
15
16 #include "emu.h"
17 #include "cp1610.h"
18 #include "debugger.h"
19 #include "1610dasm.h"
20
21 DEFINE_DEVICE_TYPE(CP1610, cp1610_cpu_device, "cp1610", "GI CP1610")
22
23
24 #define S 0x80
25 #define Z 0x40
26 #define OV 0x20
27 #define C 0x10
28
29
30 #define cp1610_readop(A) m_program->read_word(A)
31 #define cp1610_readmem16(A) m_program->read_word(A)
32 #define cp1610_writemem16(A,B) m_program->write_word(A,B)
33
34 /* clear all flags */
35 #define CLR_SZOC \
36 m_flags &= ~(S|Z|C|OV)
37
38 /* clear sign and zero flags */
39 #define CLR_SZ \
40 m_flags &= ~(S|Z)
41
42 /* clear sign,zero, and carry flags */
43 #define CLR_SZC \
44 m_flags &= ~(S|Z|C)
45
46 /* set sign and zero flags */
47 #define SET_SZ(n) \
48 if (n == 0) \
49 m_flags |= Z; \
50 else \
51 if (n & 0x8000) \
52 m_flags |= S
53
54 /* set sign zero, and carry flags */
55 #define SET_SZC(n,m) \
56 if (n == 0) \
57 m_flags |= Z; \
58 else \
59 if (n & 0x8000) \
60 m_flags |= S; \
61 if ((n + m) & 0x10000) \
62 m_flags |= C
63
64 /* set carry and overflow flags */
65 #define SET_COV(n,m,qq) \
66 { \
67 unsigned int pp = n + m; \
68 if (pp & 0x10000) \
69 m_flags |= C; \
70 if (qq) \
71 { \
72 if ((n^pp)&(~(m^n))&0x8000) \
73 m_flags |= OV; \
74 if (m == 0x8000) \
75 m_flags ^= OV; \
76 } \
77 else \
78 { \
79 if ((n^pp)&(~(m^n))&0x8000) \
80 m_flags |= OV; \
81 } \
82 }
83
84 /***********************************
85 * illegal opcodes
86 ***********************************/
cp1610_illegal()87 void cp1610_cpu_device::cp1610_illegal()
88 {
89 logerror("cp1610 illegal opcode at 0x%04x\n", m_r[7]);
90 }
91
92 /***************************************************
93 * S Z C OV 0 000 000 000
94 * - - - - HLT
95 ***************************************************/
cp1610_hlt()96 void cp1610_cpu_device::cp1610_hlt()
97 {
98 /* TBD */
99 m_icount -= 4;
100 }
101
102 /***************************************************
103 * S Z C OV 0 000 000 010
104 * - - - - EIS
105 ***************************************************/
cp1610_eis()106 void cp1610_cpu_device::cp1610_eis()
107 {
108 m_mask_interrupts = true;
109 m_intr_enabled = true;
110 m_icount -= 4;
111 }
112
113 /***************************************************
114 * S Z C OV 0 000 000 011
115 * - - - - DIS
116 ***************************************************/
cp1610_dis()117 void cp1610_cpu_device::cp1610_dis()
118 {
119 m_mask_interrupts = true;
120 m_intr_enabled = false;
121 m_icount -= 4;
122 }
123
124 /***************************************************
125 * S Z C OV 0 000 000 101
126 * - - - - TCI
127 ***************************************************/
cp1610_tci()128 void cp1610_cpu_device::cp1610_tci()
129 {
130 /* TBD */
131 m_mask_interrupts = true;
132 m_icount -= 4;
133 }
134
135 /***************************************************
136 * S Z C OV 0 000 000 110
137 * - - 0 - CLRC
138 ***************************************************/
cp1610_clrc()139 void cp1610_cpu_device::cp1610_clrc()
140 {
141 m_mask_interrupts = true;
142 m_flags &= ~C;
143 m_icount -= 4;
144 }
145
146 /***************************************************
147 * S Z C OV 0 000 000 111
148 * - - 1 - SETC
149 ***************************************************/
cp1610_setc()150 void cp1610_cpu_device::cp1610_setc()
151 {
152 m_mask_interrupts = true;
153 m_flags |= C;
154 m_icount -= 6;
155 }
156
157 /***************************************************
158 * S Z C OV 0 000 001 ddd
159 * x x - - INCR Rd
160 ***************************************************/
cp1610_incr(int n)161 void cp1610_cpu_device::cp1610_incr(int n)
162 {
163 m_r[n]++;
164 CLR_SZ;
165 SET_SZ(m_r[n]);
166 m_icount -= 6;
167 }
168
169 /***************************************************
170 * S Z C OV 0 000 010 ddd
171 * x x - - DECR Rd
172 ***************************************************/
cp1610_decr(int n)173 void cp1610_cpu_device::cp1610_decr(int n)
174 {
175 m_r[n]--;
176 CLR_SZ;
177 SET_SZ(m_r[n]);
178 m_icount -= 6;
179 }
180
181 /***************************************************
182 * S Z C OV 0 000 011 ddd
183 * x x - - COMR Rd
184 ***************************************************/
cp1610_comr(int n)185 void cp1610_cpu_device::cp1610_comr(int n)
186 {
187 m_r[n] ^= 0xffff;
188 CLR_SZ;
189 SET_SZ(m_r[n]);
190 m_icount -= 6;
191 }
192
193 /***************************************************
194 * S Z C OV 0 000 100 ddd
195 * x x x x NEGR Rd
196 ***************************************************/
cp1610_negr(int n)197 void cp1610_cpu_device::cp1610_negr(int n)
198 {
199 uint16_t temp;
200 CLR_SZOC;
201 temp = (m_r[n] ^ 0xffff) + 1;
202 SET_COV(0,temp,1);
203 m_r[n] = temp;
204 SET_SZ(m_r[n]);
205 m_icount -= 6;
206 }
207
208 /***************************************************
209 * S Z C OV 0 000 101 ddd
210 * x x x x ADCR Rd
211 ***************************************************/
cp1610_adcr(int n)212 void cp1610_cpu_device::cp1610_adcr(int n)
213 {
214 uint16_t offset = 0;
215 if (m_flags & C)
216 offset = 1;
217 CLR_SZOC;
218 SET_COV(m_r[n],offset,0);
219 m_r[n] += offset;
220 SET_SZ(m_r[n]);
221 m_icount -= 6;
222 }
223
224 /***************************************************
225 * S Z C OV 0 000 110 0dd
226 * - - - - GSWD Rd
227 ***************************************************/
cp1610_gswd(int n)228 void cp1610_cpu_device::cp1610_gswd(int n)
229 {
230 m_r[n] = (m_flags << 8) + m_flags;
231 m_icount -= 6;
232 }
233
234 /***************************************************
235 * S Z C OV 0 000 110 10x
236 * - - - - NOP
237 ***************************************************/
cp1610_nop()238 void cp1610_cpu_device::cp1610_nop()
239 {
240 m_icount -= 6;
241 }
242
243 /***************************************************
244 * S Z C OV 0 000 110 11x
245 * - - - - SIN
246 ***************************************************/
cp1610_sin()247 void cp1610_cpu_device::cp1610_sin()
248 {
249 /* TBD */
250 m_icount -= 6;
251 }
252
253 /***************************************************
254 * S Z C OV 0 000 111 sss
255 * x x x x RSWD Rs
256 ***************************************************/
cp1610_rswd(int n)257 void cp1610_cpu_device::cp1610_rswd(int n)
258 {
259 m_flags = m_r[n];
260 m_icount -= 6;
261 }
262
263 /***************************************************
264 * S Z C OV 0 001 000 0rr
265 * x x - - SWAP Rr,1
266 ***************************************************/
cp1610_swap(int r)267 void cp1610_cpu_device::cp1610_swap(int r)
268 {
269 uint8_t temp;
270 m_mask_interrupts = true;
271 CLR_SZ;
272 temp = m_r[r] >> 8;
273 m_r[r] = (m_r[r] << 8) | temp;
274 SET_SZ(m_r[r]);
275 /* S flag is set on bit 7 not bit 15 */
276 m_flags &= ~S;
277 if (m_r[r] & 0x80)
278 m_flags |= S;
279 m_icount -= 6;
280 }
281
282 /***************************************************
283 * S Z C OV 0 001 000 1rr
284 * x x - - SWAP Rr,2
285 ***************************************************/
cp1610_dswap(int r)286 void cp1610_cpu_device::cp1610_dswap(int r)
287 {
288 /* This instruction was not officially supported by GI */
289 uint16_t temp;
290 m_mask_interrupts = true;
291 CLR_SZ;
292 temp = m_r[r] & 0xff;
293 m_r[r] = (temp << 8) | temp;
294 SET_SZ(m_r[r]);
295 /* S flag is set on bit 7 not bit 15 */
296 m_flags &= ~S;
297 if (m_r[r] & 0x80)
298 m_flags |= S;
299 m_icount -= 8;
300 }
301
302 /***************************************************
303 * S Z C OV 0 001 001 0rr
304 * x x - - SLL Rr,1
305 ***************************************************/
cp1610_sll_1(int r)306 void cp1610_cpu_device::cp1610_sll_1(int r)
307 {
308 m_mask_interrupts = true;
309 CLR_SZ;
310 m_r[r] <<= 1;
311 SET_SZ(m_r[r]);
312 m_icount -= 6;
313 }
314
315 /***************************************************
316 * S Z C OV 0 001 001 1rr
317 * x x - - SLL Rr,2
318 ***************************************************/
cp1610_sll_2(int r)319 void cp1610_cpu_device::cp1610_sll_2(int r)
320 {
321 m_mask_interrupts = true;
322 CLR_SZ;
323 m_r[r] <<= 2;
324 SET_SZ(m_r[r]);
325 m_icount -= 8;
326 }
327
328 /***************************************************
329 * S Z C OV 0 001 010 0rr
330 * x x x - RLC Rr,1
331 ***************************************************/
cp1610_rlc_1(int r)332 void cp1610_cpu_device::cp1610_rlc_1(int r)
333 {
334 uint16_t offset = 0;
335 m_mask_interrupts = true;
336 if (m_flags & C)
337 offset = 1;
338 CLR_SZC;
339 if (m_r[r] & 0x8000)
340 m_flags |= C;
341 m_r[r] = (m_r[r] << 1) + offset;
342 SET_SZ(m_r[r]);
343 m_icount -= 6;
344 }
345
346 /***************************************************
347 * S Z C OV 0 001 010 1rr
348 * x x x x RLC Rr,2
349 ***************************************************/
cp1610_rlc_2(int r)350 void cp1610_cpu_device::cp1610_rlc_2(int r)
351 {
352 uint16_t offset = 0;
353 m_mask_interrupts = true;
354 switch(m_flags & (C | OV))
355 {
356 case 0:
357 offset = 0;
358 break;
359 case OV:
360 offset = 1;
361 break;
362 case C:
363 offset = 2;
364 break;
365 case (C | OV):
366 offset = 3;
367 break;
368 }
369
370 CLR_SZOC;
371 if (m_r[r] & 0x8000)
372 m_flags |= C;
373 if (m_r[r] & 0x4000)
374 m_flags |= OV;
375 m_r[r] <<= 2;
376 m_r[r] += offset;
377 SET_SZ(m_r[r]);
378 m_icount -= 8;
379 }
380
381 /***************************************************
382 * S Z C OV 0 001 011 0rr
383 * x x x - SLLC Rr,1
384 ***************************************************/
cp1610_sllc_1(int r)385 void cp1610_cpu_device::cp1610_sllc_1(int r)
386 {
387 m_mask_interrupts = true;
388 CLR_SZC;
389 if (m_r[r] & 0x8000)
390 m_flags |= C;
391 m_r[r] <<= 1;
392 SET_SZ(m_r[r]);
393 m_icount -= 6;
394 }
395
396 /***************************************************
397 * S Z C OV 0 001 011 1rr
398 * x x x x SLLC Rr,2
399 ***************************************************/
cp1610_sllc_2(int r)400 void cp1610_cpu_device::cp1610_sllc_2(int r)
401 {
402 m_mask_interrupts = true;
403 CLR_SZOC;
404 if (m_r[r] & 0x8000)
405 m_flags |= C;
406 if (m_r[r] & 0x4000)
407 m_flags |= OV;
408 m_r[r] <<= 2;
409 SET_SZ(m_r[r]);
410 m_icount -= 8;
411 }
412
413 /***************************************************
414 * S Z C OV 0 001 100 0rr
415 * x x - - SLR Rr,1
416 ***************************************************/
cp1610_slr_1(int r)417 void cp1610_cpu_device::cp1610_slr_1(int r)
418 {
419 m_mask_interrupts = true;
420 CLR_SZ;
421 m_r[r] >>= 1;
422 SET_SZ(m_r[r]);
423 /* S flag is set on bit 7 not bit 15 */
424 m_flags &= ~S;
425 if (m_r[r] & 0x80)
426 m_flags |= S;
427 m_icount -= 6;
428 }
429
430 /***************************************************
431 * S Z C OV 0 001 100 1rr
432 * x x - - SLR Rr,2
433 ***************************************************/
cp1610_slr_2(int r)434 void cp1610_cpu_device::cp1610_slr_2(int r)
435 {
436 m_mask_interrupts = true;
437 CLR_SZ;
438 m_r[r] >>= 2;
439 SET_SZ(m_r[r]);
440 /* S flag is set on bit 7 not bit 15 */
441 m_flags &= ~S;
442 if (m_r[r] & 0x80)
443 m_flags |= S;
444 m_icount -= 8;
445 }
446
447 /***************************************************
448 * S Z C OV 0 001 101 0rr
449 * x x - - SAR Rr,1
450 ***************************************************/
cp1610_sar_1(int r)451 void cp1610_cpu_device::cp1610_sar_1(int r)
452 {
453 m_mask_interrupts = true;
454 CLR_SZ;
455 m_r[r] = (uint16_t)(((int16_t)(m_r[r])) >> 1);
456 SET_SZ(m_r[r]);
457 /* S flag is set on bit 7 not bit 15 */
458 m_flags &= ~S;
459 if (m_r[r] & 0x80)
460 m_flags |= S;
461 m_icount -= 6;
462 }
463
464 /***************************************************
465 * S Z C OV 0 001 101 1rr
466 * x x - - SAR Rr,2
467 ***************************************************/
cp1610_sar_2(int r)468 void cp1610_cpu_device::cp1610_sar_2(int r)
469 {
470 m_mask_interrupts = true;
471 CLR_SZ;
472 m_r[r] = (uint16_t)(((int16_t)(m_r[r])) >> 2);
473 SET_SZ(m_r[r]);
474 /* S flag is set on bit 7 not bit 15 */
475 m_flags &= ~S;
476 if (m_r[r] & 0x80)
477 m_flags |= S;
478 m_icount -= 8;
479 }
480
481 /***************************************************
482 * S Z C OV 0 001 110 0rr
483 * x x x - RRC Rr,1
484 ***************************************************/
cp1610_rrc_1(int r)485 void cp1610_cpu_device::cp1610_rrc_1(int r)
486 {
487 uint16_t offset = 0;
488 m_mask_interrupts = true;
489 if (m_flags & C)
490 offset = 0x8000;
491 CLR_SZC;
492 if (m_r[r] & 1)
493 m_flags |= C;
494 m_r[r] >>= 1;
495 m_r[r] += offset;
496 SET_SZ(m_r[r]);
497 /* S flag is set on bit 7 not bit 15 */
498 m_flags &= ~S;
499 if (m_r[r] & 0x80)
500 m_flags |= S;
501 m_icount -= 6;
502 }
503
504 /***************************************************
505 * S Z C OV 0 001 110 1rr
506 * x x x x RRC Rr,2
507 ***************************************************/
cp1610_rrc_2(int r)508 void cp1610_cpu_device::cp1610_rrc_2(int r)
509 {
510 uint16_t offset = 0;
511 m_mask_interrupts = true;
512 if (m_flags & C)
513 offset |= 0x4000;
514 if (m_flags & OV)
515 offset |= 0x8000;
516 CLR_SZOC;
517 if (m_r[r] & 1)
518 m_flags |= C;
519 if (m_r[r] & 2)
520 m_flags |= OV;
521 m_r[r] >>= 2;
522 m_r[r] += offset;
523 SET_SZ(m_r[r]);
524 /* S flag is set on bit 7 not bit 15 */
525 m_flags &= ~S;
526 if (m_r[r] & 0x80)
527 m_flags |= S;
528 m_icount -= 8;
529 }
530
531 /***************************************************
532 * S Z C OV 0 001 111 0rr
533 * x x x - SARC Rr,1
534 ***************************************************/
cp1610_sarc_1(int r)535 void cp1610_cpu_device::cp1610_sarc_1(int r)
536 {
537 m_mask_interrupts = true;
538 CLR_SZC;
539 if (m_r[r] & 1)
540 m_flags |= C;
541 m_r[r] = (uint16_t)(((int16_t)m_r[r]) >> 1);
542 SET_SZ(m_r[r]);
543 /* S flag is set on bit 7 not bit 15 */
544 m_flags &= ~S;
545 if (m_r[r] & 0x80)
546 m_flags |= S;
547 m_icount -= 6;
548 }
549
550 /***************************************************
551 * S Z C OV 0 001 111 1rr
552 * x x x x SARC Rr,2
553 ***************************************************/
cp1610_sarc_2(int r)554 void cp1610_cpu_device::cp1610_sarc_2(int r)
555 {
556 m_mask_interrupts = true;
557 CLR_SZOC;
558 if (m_r[r] & 1)
559 m_flags |= C;
560 if (m_r[r] & 2)
561 m_flags |= OV;
562 m_r[r] = (uint16_t)(((int16_t)m_r[r]) >> 2);
563 SET_SZ(m_r[r]);
564 /* S flag is set on bit 7 not bit 15 */
565 m_flags &= ~S;
566 if (m_r[r] & 0x80)
567 m_flags |= S;
568 m_icount -= 6;
569 }
570
571 /***************************************************
572 * S Z C OV 0 010 sss sss
573 * x x - - TSTR Rs
574 ***************************************************/
cp1610_tstr(int n)575 void cp1610_cpu_device::cp1610_tstr(int n)
576 {
577 CLR_SZ;
578 SET_SZ(m_r[n]);
579 m_icount -= 6;
580 if (n > 5)
581 m_icount -= 1;
582 }
583
584 /***************************************************
585 * S Z C OV 0 010 sss ddd (sss != ddd)
586 * x x - - MOVR Rs,Rd
587 ***************************************************/
cp1610_movr(int s,int d)588 void cp1610_cpu_device::cp1610_movr(int s, int d)
589 {
590 CLR_SZ;
591 m_r[d] = m_r[s];
592 SET_SZ(m_r[d]);
593 m_icount -= 6;
594 if (d > 5)
595 m_icount -= 1;
596 }
597
598 /***************************************************
599 * S Z C OV 0 011 sss ddd
600 * x x x x ADDR Rs, Rd
601 ***************************************************/
cp1610_addr(int s,int d)602 void cp1610_cpu_device::cp1610_addr(int s, int d)
603 {
604 CLR_SZOC;
605 SET_COV(m_r[s],m_r[d],0);
606 m_r[d] += m_r[s];
607 SET_SZ(m_r[d]);
608 m_icount -= 6;
609 }
610
611 /***************************************************
612 * S Z C OV 0 100 sss ddd
613 * x x x x SUBR Rs, Rd
614 ***************************************************/
cp1610_subr(int s,int d)615 void cp1610_cpu_device::cp1610_subr(int s, int d)
616 {
617 CLR_SZOC;
618 SET_COV(m_r[d],(uint32_t)((m_r[s]^0xffff)+1),1);
619 m_r[d] -= m_r[s];
620 SET_SZ(m_r[d]);
621 m_icount -= 6;
622 }
623
624 /***************************************************
625 * S Z C OV 0 101 sss ddd
626 * x x x x CMPR Rs, Rd
627 ***************************************************/
cp1610_cmpr(int s,int d)628 void cp1610_cpu_device::cp1610_cmpr(int s, int d)
629 {
630 uint16_t temp;
631 CLR_SZOC;
632 SET_COV(m_r[d],(uint32_t)((m_r[s]^0xffff)+1),1);
633 temp = m_r[d] - m_r[s];
634 SET_SZ(temp);
635 m_icount -= 6;
636 }
637
638 /***************************************************
639 * S Z C OV 0 110 sss ddd
640 * x x - - ANDR Rs, Rd
641 ***************************************************/
cp1610_andr(int s,int d)642 void cp1610_cpu_device::cp1610_andr(int s, int d)
643 {
644 CLR_SZ;
645 m_r[d] &= m_r[s];
646 SET_SZ(m_r[d]);
647 m_icount -= 6;
648 }
649
650 /***************************************************
651 * S Z C OV 0 111 sss ddd (sss != ddd)
652 * x x - - XORR Rs, Rd
653 ***************************************************/
cp1610_xorr(int s,int d)654 void cp1610_cpu_device::cp1610_xorr(int s, int d)
655 {
656 CLR_SZ;
657 m_r[d] ^= m_r[s];
658 SET_SZ(m_r[d]);
659 m_icount -= 6;
660 }
661
662 /***************************************************
663 * S Z C OV 0 111 ddd ddd
664 * x x - - CLRR Rd
665 ***************************************************/
cp1610_clrr(int d)666 void cp1610_cpu_device::cp1610_clrr(int d)
667 {
668 CLR_SZ;
669 m_r[d] = 0;
670 SET_SZ(m_r[d]);
671 m_icount -= 6;
672 }
673
674 /***************************************************
675 * S Z C OV 1 000 s00 000 p ppp ppp ppp ppp ppp
676 * - - - - B ADDR
677 ***************************************************/
cp1610_b(int dir)678 void cp1610_cpu_device::cp1610_b(int dir)
679 {
680 uint16_t offset = cp1610_readop(m_r[7]);
681 m_r[7]++;
682 m_r[7] += (offset ^ dir);
683 m_icount -= 9;
684 }
685
686 /***************************************************
687 * S Z C OV 1 000 s01 000 p ppp ppp ppp ppp ppp
688 * - - - - NOPP
689 ***************************************************/
cp1610_nopp(int dir)690 void cp1610_cpu_device::cp1610_nopp(int dir)
691 {
692 cp1610_readop(m_r[7]);
693 m_r[7]++;
694 m_icount -= 7;
695 }
696
697 /***************************************************
698 * S Z C OV 1 000 s00 001 p ppp ppp ppp ppp ppp
699 * - - - - BC ADDR
700 ***************************************************/
cp1610_bc(int dir)701 void cp1610_cpu_device::cp1610_bc(int dir)
702 {
703 uint16_t offset = cp1610_readop(m_r[7]);
704 m_r[7]++;
705 if (m_flags & C)
706 {
707 m_r[7] += (offset ^ dir);
708 m_icount -= 9;
709 }
710 else
711 {
712 m_icount -= 7;
713 }
714 }
715
716 /***************************************************
717 * S Z C OV 1 000 s01 001 p ppp ppp ppp ppp ppp
718 * - - - - BNC ADDR
719 ***************************************************/
cp1610_bnc(int dir)720 void cp1610_cpu_device::cp1610_bnc(int dir)
721 {
722 uint16_t offset = cp1610_readop(m_r[7]);
723 m_r[7]++;
724 if (!(m_flags & C))
725 {
726 m_r[7] += (offset ^ dir);
727 m_icount -= 9;
728 }
729 else
730 {
731 m_icount -= 7;
732 }
733 }
734
735 /***************************************************
736 * S Z C OV 1 000 s00 010 p ppp ppp ppp ppp ppp
737 * - - - - BOV ADDR
738 ***************************************************/
cp1610_bov(int dir)739 void cp1610_cpu_device::cp1610_bov(int dir)
740 {
741 uint16_t offset = cp1610_readop(m_r[7]);
742 m_r[7]++;
743 if (m_flags & OV)
744 {
745 m_r[7] += (offset ^ dir);
746 m_icount -= 9;
747 }
748 else
749 {
750 m_icount -= 7;
751 }
752 }
753
754 /***************************************************
755 * S Z C OV 1 000 s01 010 p ppp ppp ppp ppp ppp
756 * - - - - BNOV ADDR
757 ***************************************************/
cp1610_bnov(int dir)758 void cp1610_cpu_device::cp1610_bnov(int dir)
759 {
760 uint16_t offset = cp1610_readop(m_r[7]);
761 m_r[7]++;
762 if (!(m_flags & OV))
763 {
764 m_r[7] += (offset ^ dir);
765 m_icount -= 9;
766 }
767 else
768 {
769 m_icount -= 7;
770 }
771 }
772
773 /***************************************************
774 * S Z C OV 1 000 s00 011 p ppp ppp ppp ppp ppp
775 * - - - - BPL ADDR
776 ***************************************************/
cp1610_bpl(int dir)777 void cp1610_cpu_device::cp1610_bpl(int dir)
778 {
779 uint16_t offset = cp1610_readop(m_r[7]);
780 m_r[7]++;
781 if (!(m_flags & S))
782 {
783 m_r[7] += (offset ^ dir);
784 m_icount -= 9;
785 }
786 else
787 {
788 m_icount -= 7;
789 }
790 }
791
792 /***************************************************
793 * S Z C OV 1 000 s01 011 p ppp ppp ppp ppp ppp
794 * - - - - BMI ADDR
795 ***************************************************/
cp1610_bmi(int dir)796 void cp1610_cpu_device::cp1610_bmi(int dir)
797 {
798 uint16_t offset = cp1610_readop(m_r[7]);
799 m_r[7]++;
800 if (m_flags & S)
801 {
802 m_r[7] += (offset ^ dir);
803 m_icount -= 9;
804 }
805 else
806 {
807 m_icount -= 7;
808 }
809 }
810
811 /***************************************************
812 * S Z C OV 1 000 s00 100 p ppp ppp ppp ppp ppp
813 * - - - - BZE ADDR
814 ***************************************************/
cp1610_bze(int dir)815 void cp1610_cpu_device::cp1610_bze(int dir)
816 {
817 uint16_t offset = cp1610_readop(m_r[7]);
818 m_r[7]++;
819 if (m_flags & Z)
820 {
821 m_r[7] += (offset ^ dir);
822 m_icount -= 9;
823 }
824 else
825 {
826 m_icount -= 7;
827 }
828 }
829
830 /***************************************************
831 * S Z C OV 1 000 s01 100 p ppp ppp ppp ppp ppp
832 * - - - - BNZE ADDR
833 ***************************************************/
cp1610_bnze(int dir)834 void cp1610_cpu_device::cp1610_bnze(int dir)
835 {
836 uint16_t offset = cp1610_readop(m_r[7]);
837 m_r[7]++;
838 if (!(m_flags & Z))
839 {
840 m_r[7] += (offset ^ dir);
841 m_icount -= 9;
842 }
843 else
844 {
845 m_icount -= 7;
846 }
847 }
848
849 /***************************************************
850 * S Z C OV 1 000 s00 101 p ppp ppp ppp ppp ppp
851 * - - - - BLT ADDR
852 ***************************************************/
cp1610_blt(int dir)853 void cp1610_cpu_device::cp1610_blt(int dir)
854 {
855 int condition1 = 0;
856 int condition2 = 0;
857 uint16_t offset = cp1610_readop(m_r[7]);
858 m_r[7]++;
859 if (m_flags & S) condition1 = 1;
860 if (m_flags & OV) condition2 = 1;
861 if (condition1 ^ condition2)
862 {
863 m_r[7] += (offset ^ dir);
864 m_icount -= 9;
865 }
866 else
867 {
868 m_icount -= 7;
869 }
870 }
871
872 /***************************************************
873 * S Z C OV 1 000 s01 101 p ppp ppp ppp ppp ppp
874 * - - - - BGE ADDR
875 ***************************************************/
cp1610_bge(int dir)876 void cp1610_cpu_device::cp1610_bge(int dir)
877 {
878 int condition1 = 0;
879 int condition2 = 0;
880 uint16_t offset = cp1610_readop(m_r[7]);
881 m_r[7]++;
882 if (m_flags & S) condition1 = 1;
883 if (m_flags & OV) condition2 = 1;
884 if (!(condition1 ^ condition2))
885 {
886 m_r[7] += (offset ^ dir);
887 m_icount -= 9;
888 }
889 else
890 {
891 m_icount -= 7;
892 }
893 }
894
895 /***************************************************
896 * S Z C OV 1 000 s00 110 p ppp ppp ppp ppp ppp
897 * - - - - BLE ADDR
898 ***************************************************/
cp1610_ble(int dir)899 void cp1610_cpu_device::cp1610_ble(int dir)
900 {
901 int condition1 = 0;
902 int condition2 = 0;
903 uint16_t offset = cp1610_readop(m_r[7]);
904 m_r[7]++;
905 if (m_flags & S) condition1 = 1;
906 if (m_flags & OV) condition2 = 1;
907 if ((m_flags & Z) || (condition1 ^ condition2))
908 {
909 m_r[7] += (offset ^ dir);
910 m_icount -= 9;
911 }
912 else
913 {
914 m_icount -= 7;
915 }
916 }
917
918 /***************************************************
919 * S Z C OV 1 000 s01 110 p ppp ppp ppp ppp ppp
920 * - - - - BGT ADDR
921 ***************************************************/
cp1610_bgt(int dir)922 void cp1610_cpu_device::cp1610_bgt(int dir)
923 {
924 int condition1 = 0;
925 int condition2 = 0;
926 uint16_t offset = cp1610_readop(m_r[7]);
927 m_r[7]++;
928 if (m_flags & S) condition1 = 1;
929 if (m_flags & OV) condition2 = 1;
930 if (!((m_flags & Z) || (condition1 ^ condition2)))
931 {
932 m_r[7] += (offset ^ dir);
933 m_icount -= 9;
934 }
935 else
936 {
937 m_icount -= 7;
938 }
939 }
940
941 /***************************************************
942 * S Z C OV 1 000 s00 111 p ppp ppp ppp ppp ppp
943 * - - - - BUSC ADDR
944 ***************************************************/
cp1610_busc(int dir)945 void cp1610_cpu_device::cp1610_busc(int dir)
946 {
947 int condition1 = 0;
948 int condition2 = 0;
949 uint16_t offset = cp1610_readop(m_r[7]);
950 m_r[7]++;
951 if (m_flags & C) condition1 = 1;
952 if (m_flags & S) condition2 = 1;
953 if (condition1 ^ condition2)
954 {
955 m_r[7] += (offset ^ dir);
956 m_icount -= 9;
957 }
958 else
959 {
960 m_icount -= 7;
961 }
962 }
963
964 /***************************************************
965 * S Z C OV 1 000 s01 111 p ppp ppp ppp ppp ppp
966 * - - - - BESC ADDR
967 ***************************************************/
cp1610_besc(int dir)968 void cp1610_cpu_device::cp1610_besc(int dir)
969 {
970 int condition1 = 0;
971 int condition2 = 0;
972 uint16_t offset = cp1610_readop(m_r[7]);
973 m_r[7]++;
974 if (m_flags & C) condition1 = 1;
975 if (m_flags & S) condition2 = 1;
976 if (!(condition1 ^ condition2))
977 {
978 m_r[7] += (offset ^ dir);
979 m_icount -= 9;
980 }
981 else
982 {
983 m_icount -= 7;
984 }
985 }
986
987 /***************************************************
988 * S Z C OV 1 000 s1e e p ppp ppp ppp ppp ppp
989 * - - - - BEXT ADDR, eeee
990 ***************************************************/
cp1610_bext(int ext,int dir)991 void cp1610_cpu_device::cp1610_bext(int ext, int dir)
992 {
993 uint16_t offset = cp1610_readop(m_r[7]);
994 m_r[7]++;
995
996 if (m_read_bext(ext))
997 {
998 m_r[7] += (offset ^ dir);
999 m_icount -= 9;
1000 }
1001 else
1002 {
1003 m_icount -= 7;
1004 }
1005 }
1006
1007 /***************************************************
1008 * S Z C OV 1 001 000 sss a aaa aaa aaa aaa aaa
1009 * - - - - MVO Rs, ADDR
1010 ***************************************************/
cp1610_mvo(int s)1011 void cp1610_cpu_device::cp1610_mvo(int s)
1012 {
1013 uint16_t addr;
1014 m_mask_interrupts = true;
1015 addr = cp1610_readop(m_r[7]);
1016 m_r[7]++;
1017 cp1610_writemem16(addr,m_r[s]);
1018 m_icount -= 11;
1019 }
1020
1021 /***************************************************
1022 * S Z C OV 1 001 mmm sss (mmm = 0xx)
1023 * - - - - MVO@ Rs, Rm
1024 ***************************************************/
cp1610_mvoat(int s,int m)1025 void cp1610_cpu_device::cp1610_mvoat(int s, int m)
1026 {
1027 m_mask_interrupts = true;
1028 cp1610_writemem16(m_r[m],m_r[s]);
1029 m_icount -= 9;
1030 }
1031
1032 /***************************************************
1033 * S Z C OV 1 001 mmm sss (m = 10x or 110)
1034 * - - - - MVO@ Rs, Rm
1035 ***************************************************/
cp1610_mvoat_i(int s,int m)1036 void cp1610_cpu_device::cp1610_mvoat_i(int s, int m)
1037 {
1038 m_mask_interrupts = true;
1039 cp1610_writemem16(m_r[m],m_r[s]);
1040 m_r[m]++;
1041 m_icount -= 9;
1042 }
1043
1044 /***************************************************
1045 * S Z C OV 1 001 111 sss I III III III III III
1046 * - - - - MVOI Rs, II
1047 ***************************************************/
cp1610_mvoi(int s)1048 void cp1610_cpu_device::cp1610_mvoi(int s)
1049 {
1050 m_mask_interrupts = true;
1051 cp1610_writemem16(m_r[7],m_r[s]);
1052 m_r[7]++;
1053 m_icount -= 9;
1054 }
1055
1056 /***************************************************
1057 * S Z C OV 1 010 000 ddd a aaa aaa aaa aaa aaa
1058 * - - - - MVI ADDR, Rd
1059 ***************************************************/
cp1610_mvi(int d)1060 void cp1610_cpu_device::cp1610_mvi(int d)
1061 {
1062 uint16_t addr = cp1610_readop(m_r[7]);
1063 m_r[7]++;
1064 m_r[d] = cp1610_readmem16(addr);
1065 m_icount -= 10;
1066 }
1067
1068 /***************************************************
1069 * S Z C OV 1 010 mmm ddd (mmm = 0xx)
1070 * - - - - MVI@ Rm, Rd
1071 ***************************************************/
cp1610_mviat(int m,int d)1072 void cp1610_cpu_device::cp1610_mviat(int m, int d)
1073 {
1074 m_r[d] = cp1610_readmem16(m_r[m]);
1075 m_icount -= 8;
1076 }
1077
1078 /***************************************************
1079 * S Z C OV 1 010 mmm ddd (mmm = 10x)
1080 * - - - - MVI@ Rm, Rd
1081 ***************************************************/
cp1610_mviat_i(int m,int d)1082 void cp1610_cpu_device::cp1610_mviat_i(int m, int d)
1083 {
1084 uint16_t temp = cp1610_readmem16(m_r[m]);
1085 m_r[m]++;
1086 m_r[d] = temp;
1087 m_icount -= 8;
1088 }
1089
1090 /***************************************************
1091 * S Z C OV 1 010 110 ddd
1092 * - - - - PULR Rd
1093 ***************************************************/
cp1610_pulr(int d)1094 void cp1610_cpu_device::cp1610_pulr(int d)
1095 {
1096 m_r[6]--;
1097 m_r[d] = cp1610_readmem16(m_r[6]);
1098 m_icount -= 11;
1099 }
1100
1101 /***************************************************
1102 * S Z C OV 1 010 111 ddd I III III III III III
1103 * - - - - MVII II, Rd
1104 ***************************************************/
cp1610_mvii(int d)1105 void cp1610_cpu_device::cp1610_mvii(int d)
1106 {
1107 uint16_t temp = cp1610_readop(m_r[7]);
1108 m_r[7]++;
1109 m_r[d] = temp;
1110 m_icount -= 8;
1111 }
1112
1113 /***************************************************
1114 * S Z C OV 1 011 000 ddd a aaa aaa aaa aaa aaa
1115 * x x x x ADD ADDR, Rd
1116 ***************************************************/
cp1610_add(int d)1117 void cp1610_cpu_device::cp1610_add(int d)
1118 {
1119 uint16_t addr = cp1610_readop(m_r[7]);
1120 uint16_t data = cp1610_readmem16(addr);
1121 m_r[7]++;
1122 CLR_SZOC;
1123 SET_COV(m_r[d],data,0);
1124 m_r[d] += data;
1125 SET_SZ(m_r[d]);
1126 m_icount -= 10;
1127 }
1128
1129 /***************************************************
1130 * S Z C OV 1 011 mmm ddd (mmm = 0xx)
1131 * x x x x ADD@ Rm, Rd
1132 ***************************************************/
cp1610_addat(int m,int d)1133 void cp1610_cpu_device::cp1610_addat(int m, int d)
1134 {
1135 uint16_t data = cp1610_readmem16(m_r[m]);
1136 CLR_SZOC;
1137 SET_COV(m_r[d],data,0);
1138 m_r[d] += data;
1139 SET_SZ(m_r[d]);
1140 m_icount -= 8;
1141 }
1142
1143 /***************************************************
1144 * S Z C OV 1 011 mmm ddd (mmm = 10x)
1145 * x x x x ADD@ Rm, Rd
1146 ***************************************************/
cp1610_addat_i(int m,int d)1147 void cp1610_cpu_device::cp1610_addat_i(int m, int d)
1148 {
1149 uint16_t data = cp1610_readmem16(m_r[m]);
1150 m_r[m]++;
1151 CLR_SZOC;
1152 SET_COV(m_r[d],data,0);
1153 m_r[d] += data;
1154 SET_SZ(m_r[d]);
1155 m_icount -= 8;
1156 }
1157
1158 /***************************************************
1159 * S Z C OV 1 011 mmm ddd (mmm = 110)
1160 * x x x x ADD@ Rm, Rd
1161 ***************************************************/
cp1610_addat_d(int m,int d)1162 void cp1610_cpu_device::cp1610_addat_d(int m, int d)
1163 {
1164 uint16_t data;
1165 m_r[m]--;
1166 data = cp1610_readmem16(m_r[m]);
1167 CLR_SZOC;
1168 SET_COV(m_r[d],data,0);
1169 m_r[d] += data;
1170 SET_SZ(m_r[d]);
1171 m_icount -= 11;
1172 }
1173
1174 /***************************************************
1175 * S Z C OV 1 011 111 ddd I III III III III III
1176 * x x x x ADDI II, Rd
1177 ***************************************************/
cp1610_addi(int d)1178 void cp1610_cpu_device::cp1610_addi(int d)
1179 {
1180 uint16_t data;
1181 data = cp1610_readop(m_r[7]);
1182 m_r[7]++;
1183 CLR_SZOC;
1184 SET_COV(m_r[d],data,0);
1185 m_r[d] += data;
1186 SET_SZ(m_r[d]);
1187 m_icount -= 8;
1188 }
1189
1190 /***************************************************
1191 * S Z C OV 1 100 000 ddd a aaa aaa aaa aaa aaa
1192 * x x x x SUB ADDR, Rd
1193 ***************************************************/
cp1610_sub(int d)1194 void cp1610_cpu_device::cp1610_sub(int d)
1195 {
1196 uint16_t addr = cp1610_readop(m_r[7]);
1197 uint32_t data = cp1610_readmem16(addr);
1198 m_r[7]++;
1199 CLR_SZOC;
1200 data = (data ^ 0xffff) + 1;
1201 SET_COV(m_r[d],data,1);
1202 data &= 0xffff;
1203 m_r[d] += data;
1204 SET_SZ(m_r[d]);
1205 m_icount -= 10;
1206 }
1207
1208 /***************************************************
1209 * S Z C OV 1 100 mmm ddd (mmm = 0xx)
1210 * x x x x SUB@ Rm, Rd
1211 ***************************************************/
cp1610_subat(int m,int d)1212 void cp1610_cpu_device::cp1610_subat(int m, int d)
1213 {
1214 uint32_t data = cp1610_readmem16(m_r[m]);
1215 CLR_SZOC;
1216 data = (data ^ 0xffff) + 1;
1217 SET_COV(m_r[d],data,1);
1218 data &= 0xffff;
1219 m_r[d] += data;
1220 SET_SZ(m_r[d]);
1221 m_icount -= 8;
1222 }
1223
1224 /***************************************************
1225 * S Z C OV 1 100 mmm ddd (mmm = 10x)
1226 * x x x x SUB@ Rm, Rd
1227 ***************************************************/
cp1610_subat_i(int m,int d)1228 void cp1610_cpu_device::cp1610_subat_i(int m, int d)
1229 {
1230 uint32_t data = cp1610_readmem16(m_r[m]);
1231 m_r[m]++;
1232 CLR_SZOC;
1233 data = (data ^ 0xffff) + 1;
1234 SET_COV(m_r[d],data,1);
1235 data &= 0xffff;
1236 m_r[d] += data;
1237 SET_SZ(m_r[d]);
1238 m_icount -= 8;
1239 }
1240
1241 /***************************************************
1242 * S Z C OV 1 100 mmm ddd (mmm = 110)
1243 * x x x x SUB@ Rm, Rd
1244 ***************************************************/
cp1610_subat_d(int m,int d)1245 void cp1610_cpu_device::cp1610_subat_d(int m, int d)
1246 {
1247 uint32_t data;
1248 m_r[m]--;
1249 data = cp1610_readmem16(m_r[m]);
1250 CLR_SZOC;
1251 data = (data ^ 0xffff) + 1;
1252 SET_COV(m_r[d],data,1);
1253 data &= 0xffff;
1254 m_r[d] += data;
1255 SET_SZ(m_r[d]);
1256 m_icount -= 11;
1257 }
1258
1259 /***************************************************
1260 * S Z C OV 1 100 111 ddd I III III III III III
1261 * x x x x SUBI II, Rd
1262 ***************************************************/
cp1610_subi(int d)1263 void cp1610_cpu_device::cp1610_subi(int d)
1264 {
1265 uint32_t data;
1266 data = cp1610_readop(m_r[7]);
1267 m_r[7]++;
1268 data = (data ^ 0xffff) + 1;
1269 CLR_SZOC;
1270 SET_COV(m_r[d],data,1);
1271 data &= 0xffff;
1272 m_r[d] += data;
1273 SET_SZ(m_r[d]);
1274 m_icount -= 8;
1275 }
1276
1277 /***************************************************
1278 * S Z C OV 1 101 000 ddd a aaa aaa aaa aaa aaa
1279 * x x x x CMP ADDR, Rd
1280 ***************************************************/
cp1610_cmp(int d)1281 void cp1610_cpu_device::cp1610_cmp(int d)
1282 {
1283 uint16_t addr = cp1610_readop(m_r[7]);
1284 uint32_t data = cp1610_readmem16(addr);
1285 uint16_t res;
1286 m_r[7]++;
1287 CLR_SZOC;
1288 data = (data ^ 0xffff) + 1;
1289 SET_COV(m_r[d],data,1);
1290 data &= 0xffff;
1291 res = m_r[d] + data;
1292 SET_SZ(res);
1293 m_icount -= 10;
1294 }
1295
1296 /***************************************************
1297 * S Z C OV 1 101 mmm ddd (mmm = 0xx)
1298 * x x x x CMP@ Rm, Rd
1299 ***************************************************/
cp1610_cmpat(int m,int d)1300 void cp1610_cpu_device::cp1610_cmpat(int m, int d)
1301 {
1302 uint32_t data = cp1610_readmem16(m_r[m]);
1303 uint16_t res;
1304 CLR_SZOC;
1305 data = (data ^ 0xffff) + 1;
1306 SET_COV(m_r[d],data,1);
1307 data &= 0xffff;
1308 res = m_r[d] + data;
1309 SET_SZ(res);
1310 m_icount -= 8;
1311 }
1312
1313 /***************************************************
1314 * S Z C OV 1 101 mmm ddd (mmm = 10x)
1315 * x x x x CMP@ Rm, Rd
1316 ***************************************************/
cp1610_cmpat_i(int m,int d)1317 void cp1610_cpu_device::cp1610_cmpat_i(int m, int d)
1318 {
1319 uint32_t data = cp1610_readmem16(m_r[m]);
1320 uint16_t res;
1321 m_r[m]++;
1322 CLR_SZOC;
1323 data = (data ^ 0xffff) + 1;
1324 SET_COV(m_r[d],data,1);
1325 data &= 0xffff;
1326 res = m_r[d] + data;
1327 SET_SZ(res);
1328 m_icount -= 8;
1329 }
1330
1331 /***************************************************
1332 * S Z C OV 1 101 mmm ddd (mmm = 110)
1333 * x x x x CMP@ Rm, Rd
1334 ***************************************************/
cp1610_cmpat_d(int m,int d)1335 void cp1610_cpu_device::cp1610_cmpat_d(int m, int d)
1336 {
1337 uint32_t data;
1338 uint16_t res;
1339 m_r[m]--;
1340 data = cp1610_readmem16(m_r[m]);
1341 CLR_SZOC;
1342 data = (data ^ 0xffff) + 1;
1343 SET_COV(m_r[d],data,1);
1344 data &= 0xffff;
1345 res = m_r[d] + data;
1346 SET_SZ(res);
1347 m_icount -= 11;
1348 }
1349
1350 /***************************************************
1351 * S Z C OV 1 101 111 ddd I III III III III III
1352 * x x x x CMPI II, Rd
1353 ***************************************************/
cp1610_cmpi(int d)1354 void cp1610_cpu_device::cp1610_cmpi(int d)
1355 {
1356 uint32_t data;
1357 uint16_t res;
1358 data = cp1610_readop(m_r[7]);
1359 m_r[7]++;
1360 data = (data ^ 0xffff) + 1;
1361 CLR_SZOC;
1362 SET_COV(m_r[d],data,1);
1363 data &= 0xffff;
1364 res = m_r[d] + data;
1365 SET_SZ(res);
1366 m_icount -= 8;
1367 }
1368
1369 /***************************************************
1370 * S Z C OV 1 110 000 ddd a aaa aaa aaa aaa aaa
1371 * x x - - AND ADDR, Rd
1372 ***************************************************/
cp1610_and(int d)1373 void cp1610_cpu_device::cp1610_and(int d)
1374 {
1375 uint16_t addr = cp1610_readop(m_r[7]);
1376 uint16_t data = cp1610_readmem16(addr);
1377 m_r[7]++;
1378 CLR_SZ;
1379 m_r[d] &= data;
1380 SET_SZ(m_r[d]);
1381 m_icount -= 10;
1382 }
1383
1384 /***************************************************
1385 * S Z C OV 1 110 mmm ddd (mmm = 0xx)
1386 * x x - - AND@ Rm, Rd
1387 ***************************************************/
cp1610_andat(int m,int d)1388 void cp1610_cpu_device::cp1610_andat(int m, int d)
1389 {
1390 uint16_t data = cp1610_readmem16(m_r[m]);
1391 CLR_SZ;
1392 m_r[d] &= data;
1393 SET_SZ(m_r[d]);
1394 m_icount -= 8;
1395 }
1396
1397 /***************************************************
1398 * S Z C OV 1 110 mmm ddd (mmm = 10x)
1399 * x x - - AND@ Rm, Rd
1400 ***************************************************/
cp1610_andat_i(int m,int d)1401 void cp1610_cpu_device::cp1610_andat_i(int m, int d)
1402 {
1403 uint16_t data = cp1610_readmem16(m_r[m]);
1404 m_r[m]++;
1405 CLR_SZ;
1406 m_r[d] &= data;
1407 SET_SZ(m_r[d]);
1408 m_icount -= 8;
1409 }
1410
1411 /***************************************************
1412 * S Z C OV 1 110 mmm ddd (mmm = 110)
1413 * x x - - AND@ Rm, Rd
1414 ***************************************************/
cp1610_andat_d(int m,int d)1415 void cp1610_cpu_device::cp1610_andat_d(int m, int d)
1416 {
1417 uint16_t data;
1418 m_r[m]--;
1419 data = cp1610_readmem16(m_r[m]);
1420 CLR_SZ;
1421 m_r[d] &= data;
1422 SET_SZ(m_r[d]);
1423 m_icount -= 11;
1424 }
1425
1426 /***************************************************
1427 * S Z C OV 1 110 111 ddd I III III III III III
1428 * x x - - AND II, Rd
1429 ***************************************************/
cp1610_andi(int d)1430 void cp1610_cpu_device::cp1610_andi(int d)
1431 {
1432 uint16_t data;
1433 data = cp1610_readop(m_r[7]);
1434 m_r[7]++;
1435 CLR_SZ;
1436 m_r[d] &= data;
1437 SET_SZ(m_r[d]);
1438 m_icount -= 8;
1439 }
1440
1441 /***************************************************
1442 * S Z C OV 1 111 000 ddd a aaa aaa aaa aaa aaa
1443 * x x - - XOR ADDR, Rd
1444 ***************************************************/
cp1610_xor(int d)1445 void cp1610_cpu_device::cp1610_xor(int d)
1446 {
1447 uint16_t addr = cp1610_readop(m_r[7]);
1448 uint16_t data = cp1610_readmem16(addr);
1449 m_r[7]++;
1450 CLR_SZ;
1451 m_r[d] ^= data;
1452 SET_SZ(m_r[d]);
1453 m_icount -= 10;
1454 }
1455
1456 /***************************************************
1457 * S Z C OV 1 111 mmm ddd (mmm = 0xx)
1458 * x x - - XOR@ Rm, Rd
1459 ***************************************************/
cp1610_xorat(int m,int d)1460 void cp1610_cpu_device::cp1610_xorat(int m, int d)
1461 {
1462 uint16_t data = cp1610_readmem16(m_r[m]);
1463 CLR_SZ;
1464 m_r[d] ^= data;
1465 SET_SZ(m_r[d]);
1466 m_icount -= 8;
1467 }
1468
1469 /***************************************************
1470 * S Z C OV 1 111 mmm ddd (mmm = 10x)
1471 * x x - - XOR@ Rm, Rd
1472 ***************************************************/
cp1610_xorat_i(int m,int d)1473 void cp1610_cpu_device::cp1610_xorat_i(int m, int d)
1474 {
1475 uint16_t data = cp1610_readmem16(m_r[m]);
1476 m_r[m]++;
1477 CLR_SZ;
1478 m_r[d] ^= data;
1479 SET_SZ(m_r[d]);
1480 m_icount -= 8;
1481 }
1482
1483 /***************************************************
1484 * S Z C OV 1 111 mmm ddd (mmm = 110)
1485 * x x - - XOR@ Rm, Rd
1486 ***************************************************/
cp1610_xorat_d(int m,int d)1487 void cp1610_cpu_device::cp1610_xorat_d(int m, int d)
1488 {
1489 uint16_t data;
1490 m_r[m]--;
1491 data = cp1610_readmem16(m_r[m]);
1492 CLR_SZ;
1493 m_r[d] ^= data;
1494 SET_SZ(m_r[d]);
1495 m_icount -= 11;
1496 }
1497
1498 /***************************************************
1499 * S Z C OV 1 111 111 ddd I III III III III III
1500 * x x - - XOR II, Rd
1501 ***************************************************/
cp1610_xori(int d)1502 void cp1610_cpu_device::cp1610_xori(int d)
1503 {
1504 uint16_t data;
1505 data = cp1610_readop(m_r[7]);
1506 m_r[7]++;
1507 CLR_SZ;
1508 m_r[d] ^= data;
1509 SET_SZ(m_r[d]);
1510 m_icount -= 8;
1511 }
1512
1513 /***************************************************
1514 * S Z C OV 0x001 1 010 mmm ddd (mmm = 0xx)
1515 * - - - - SDBD, MVI@ Rm, Rd
1516 ***************************************************/
cp1610_sdbd_mviat(int r,int d)1517 void cp1610_cpu_device::cp1610_sdbd_mviat(int r, int d)
1518 {
1519 m_r[d] = cp1610_readmem16(m_r[r]) & 0xff;
1520 m_r[d] |= (cp1610_readmem16(m_r[r]) << 8);
1521 m_icount -= 14;
1522 }
1523
1524 /***************************************************
1525 * S Z C OV 0x001 1 010 mmm ddd (mmm = 10x)
1526 * - - - - SDBD, MVI@ Rm, Rd
1527 ***************************************************/
cp1610_sdbd_mviat_i(int r,int d)1528 void cp1610_cpu_device::cp1610_sdbd_mviat_i(int r, int d)
1529 {
1530 uint16_t temp;
1531 temp = cp1610_readmem16(m_r[r]) & 0xff;
1532 m_r[r]++;
1533 m_r[d] = temp;
1534 temp = (cp1610_readmem16(m_r[r]) << 8);
1535 m_r[r]++;
1536 m_r[d] |= temp;
1537 m_icount -= 14;
1538 }
1539
1540 /***************************************************
1541 * S Z C OV 0x001 1 010 mmm ddd (mmm = 101)
1542 * - - - - SDBD, MVI@ Rm, Rd
1543 ***************************************************/
cp1610_sdbd_mviat_d(int r,int d)1544 void cp1610_cpu_device::cp1610_sdbd_mviat_d(int r, int d)
1545 {
1546 m_r[r]--;
1547 m_r[d] = cp1610_readmem16(m_r[r]) & 0xff;
1548 m_r[r]--;
1549 m_r[d] |= (cp1610_readmem16(m_r[r]) << 8);
1550 m_icount -= 17;
1551 }
1552
1553 /************************************************************************
1554 * S Z C OV 0x001 1 010 111 ddd x xxx xLL LLL LLL x xxx xUU UUU UUU
1555 * - - - - SDBD, MVII I-I, Rd
1556 ************************************************************************/
cp1610_sdbd_mvii(int d)1557 void cp1610_cpu_device::cp1610_sdbd_mvii(int d)
1558 {
1559 uint16_t addr;
1560 addr = cp1610_readop(m_r[7]) & 0xff;
1561 m_r[7]++;
1562 addr |= (cp1610_readop(m_r[7]) << 8);
1563 m_r[7]++;
1564 m_r[d] = addr;
1565 m_icount -= 14;
1566 }
1567
1568 /***************************************************
1569 * S Z C OV 0x001 1 011 mmm ddd (mmm = 0xx)
1570 * x x x x SDBD, ADD@ Rm, Rd
1571 ***************************************************/
cp1610_sdbd_addat(int r,int d)1572 void cp1610_cpu_device::cp1610_sdbd_addat(int r, int d)
1573 {
1574 uint16_t temp;
1575 CLR_SZOC;
1576 temp = cp1610_readmem16(m_r[r]) & 0xff;
1577 temp |= (cp1610_readmem16(m_r[r]) << 8);
1578 SET_COV(m_r[d],temp,0);
1579 m_r[d] += temp;
1580 SET_SZ(m_r[d]);
1581 m_icount -= 14;
1582 }
1583
1584 /***************************************************
1585 * S Z C OV 0x001 1 011 mmm ddd (mmm = 10x)
1586 * x x x x SDBD, ADD@ Rm, Rd
1587 ***************************************************/
cp1610_sdbd_addat_i(int r,int d)1588 void cp1610_cpu_device::cp1610_sdbd_addat_i(int r, int d)
1589 {
1590 uint16_t temp;
1591 CLR_SZOC;
1592 temp = cp1610_readmem16(m_r[r]) & 0xff;
1593 m_r[r]++;
1594 temp |= (cp1610_readmem16(m_r[r]) << 8);
1595 m_r[r]++;
1596 SET_COV(m_r[d],temp,0);
1597 m_r[d] += temp;
1598 SET_SZ(m_r[d]);
1599 m_icount -= 14;
1600 }
1601
1602 /***************************************************
1603 * S Z C OV 0x001 1 011 mmm ddd (mmm = 101)
1604 * x x x x SDBD, ADD@ Rm, Rd
1605 ***************************************************/
cp1610_sdbd_addat_d(int r,int d)1606 void cp1610_cpu_device::cp1610_sdbd_addat_d(int r, int d)
1607 {
1608 uint16_t temp;
1609 CLR_SZOC;
1610 m_r[r]--;
1611 temp = cp1610_readmem16(m_r[r]) & 0xff;
1612 m_r[r]--;
1613 temp |= (cp1610_readmem16(m_r[r]) << 8);
1614 SET_COV(m_r[d],temp,0);
1615 m_r[d] += temp;
1616 SET_SZ(m_r[d]);
1617 m_icount -= 17;
1618 }
1619
1620 /************************************************************************
1621 * S Z C OV 0x001 1 011 111 ddd x xxx xLL LLL LLL x xxx xUU UUU UUU
1622 * x x x x SDBD, ADDI I-I, Rd
1623 ************************************************************************/
cp1610_sdbd_addi(int d)1624 void cp1610_cpu_device::cp1610_sdbd_addi(int d)
1625 {
1626 uint16_t addr;
1627 uint16_t temp;
1628 CLR_SZOC;
1629 addr = cp1610_readop(m_r[7]) & 0xff;
1630 m_r[7]++;
1631 addr |= (cp1610_readop(m_r[7]) << 8);
1632 m_r[7]++;
1633 temp = addr;
1634 SET_COV(m_r[d],temp,0);
1635 m_r[d] += temp;
1636 SET_SZ(m_r[d]);
1637 m_icount -= 14;
1638 }
1639
1640 /***************************************************
1641 * S Z C OV 0x001 1 100 mmm ddd (mmm = 0xx)
1642 * x x x x SDBD, SUB@ Rm, Rd
1643 ***************************************************/
cp1610_sdbd_subat(int r,int d)1644 void cp1610_cpu_device::cp1610_sdbd_subat(int r, int d)
1645 {
1646 uint16_t temp;
1647 CLR_SZOC;
1648 temp = cp1610_readmem16(m_r[r]) & 0xff;
1649 temp |= (cp1610_readmem16(m_r[r]) << 8);
1650 temp = (temp ^ 0xffff) + 1;
1651 SET_COV(m_r[d],temp,1);
1652 m_r[d] += temp;
1653 SET_SZ(m_r[d]);
1654 m_icount -= 14;
1655 }
1656
1657 /***************************************************
1658 * S Z C OV 0x001 1 100 mmm ddd (mmm = 10x)
1659 * x x x x SDBD, SUB@ Rm, Rd
1660 ***************************************************/
cp1610_sdbd_subat_i(int r,int d)1661 void cp1610_cpu_device::cp1610_sdbd_subat_i(int r, int d)
1662 {
1663 uint16_t temp;
1664 CLR_SZOC;
1665 temp = cp1610_readmem16(m_r[r]) & 0xff;
1666 m_r[r]++;
1667 temp |= (cp1610_readmem16(m_r[r]) << 8);
1668 m_r[r]++;
1669 temp = (temp ^ 0xffff) + 1;
1670 SET_COV(m_r[d],temp,1);
1671 m_r[d] += temp;
1672 SET_SZ(m_r[d]);
1673 m_icount -= 14;
1674 }
1675
1676 /***************************************************
1677 * S Z C OV 0x001 1 100 mmm ddd (mmm = 101)
1678 * x x x x SDBD, SUB@ Rm, Rd
1679 ***************************************************/
cp1610_sdbd_subat_d(int r,int d)1680 void cp1610_cpu_device::cp1610_sdbd_subat_d(int r, int d)
1681 {
1682 uint16_t temp;
1683 CLR_SZOC;
1684 m_r[r]--;
1685 temp = cp1610_readmem16(m_r[r]) & 0xff;
1686 m_r[r]--;
1687 temp |= (cp1610_readmem16(m_r[r]) << 8);
1688 temp = (temp ^ 0xffff) + 1;
1689 SET_COV(m_r[d],temp,1);
1690 m_r[d] += temp;
1691 SET_SZ(m_r[d]);
1692 m_icount -= 17;
1693 }
1694
1695 /************************************************************************
1696 * S Z C OV 0x001 1 100 111 ddd x xxx xLL LLL LLL x xxx xUU UUU UUU
1697 * x x x x SDBD, SUBI I-I, Rd
1698 ************************************************************************/
cp1610_sdbd_subi(int d)1699 void cp1610_cpu_device::cp1610_sdbd_subi(int d)
1700 {
1701 uint16_t addr;
1702 uint16_t temp;
1703 CLR_SZOC;
1704 addr = cp1610_readop(m_r[7]) & 0xff;
1705 m_r[7]++;
1706 addr |= (cp1610_readop(m_r[7]) << 8);
1707 m_r[7]++;
1708 temp = addr;
1709 temp = (temp ^ 0xffff) + 1;
1710 SET_COV(m_r[d],temp,1);
1711 m_r[d] += temp;
1712 SET_SZ(m_r[d]);
1713 m_icount -= 14;
1714 }
1715
1716 /***************************************************
1717 * S Z C OV 0x001 1 101 mmm ddd (mmm = 0xx)
1718 * x x x x SDBD, CMP@ Rm, Rd
1719 ***************************************************/
cp1610_sdbd_cmpat(int r,int d)1720 void cp1610_cpu_device::cp1610_sdbd_cmpat(int r, int d)
1721 {
1722 uint16_t temp;
1723 uint16_t temp2;
1724 CLR_SZOC;
1725 temp = cp1610_readmem16(m_r[r]) & 0xff;
1726 temp |= (cp1610_readmem16(m_r[r]) << 8);
1727 temp = (temp ^ 0xffff) + 1;
1728 SET_COV(m_r[d],temp,1);
1729 temp2 = m_r[d] + temp;
1730 SET_SZ(temp2);
1731 m_icount -= 14;
1732 }
1733
1734 /***************************************************
1735 * S Z C OV 0x001 1 101 mmm ddd (mmm = 10x)
1736 * x x x x SDBD, CMP@ Rm, Rd
1737 ***************************************************/
cp1610_sdbd_cmpat_i(int r,int d)1738 void cp1610_cpu_device::cp1610_sdbd_cmpat_i(int r, int d)
1739 {
1740 uint16_t temp;
1741 uint16_t temp2;
1742 CLR_SZOC;
1743 temp = cp1610_readmem16(m_r[r]) & 0xff;
1744 m_r[r]++;
1745 temp |= (cp1610_readmem16(m_r[r]) << 8);
1746 m_r[r]++;
1747 temp = (temp ^ 0xffff) + 1;
1748 SET_COV(m_r[d],temp,1);
1749 temp2 = m_r[d] + temp;
1750 SET_SZ(temp2);
1751 m_icount -= 14;
1752 }
1753
1754 /***************************************************
1755 * S Z C OV 0x001 1 101 mmm ddd (mmm = 101)
1756 * x x x x SDBD, CMP@ Rm, Rd
1757 ***************************************************/
cp1610_sdbd_cmpat_d(int r,int d)1758 void cp1610_cpu_device::cp1610_sdbd_cmpat_d(int r, int d)
1759 {
1760 uint16_t temp;
1761 uint16_t temp2;
1762 CLR_SZOC;
1763 m_r[r]--;
1764 temp = cp1610_readmem16(m_r[r]) & 0xff;
1765 m_r[r]--;
1766 temp |= (cp1610_readmem16(m_r[r]) << 8);
1767 temp = (temp ^ 0xffff) + 1;
1768 SET_COV(m_r[d],temp,1);
1769 temp2 = m_r[d] + temp;
1770 SET_SZ(temp2);
1771 m_icount -= 17;
1772 }
1773
1774 /************************************************************************
1775 * S Z C OV 0x001 1 101 111 ddd x xxx xLL LLL LLL x xxx xUU UUU UUU
1776 * x x x x SDBD, CMPI I-I, Rd
1777 ************************************************************************/
cp1610_sdbd_cmpi(int d)1778 void cp1610_cpu_device::cp1610_sdbd_cmpi(int d)
1779 {
1780 uint16_t addr;
1781 uint16_t temp;
1782 uint16_t temp2;
1783 CLR_SZOC;
1784 addr = cp1610_readop(m_r[7]) & 0xff;
1785 m_r[7]++;
1786 addr |= (cp1610_readop(m_r[7]) << 8);
1787 m_r[7]++;
1788 temp = addr;
1789 temp = (temp ^ 0xffff) + 1;
1790 SET_COV(m_r[d],temp,1);
1791 temp2 = m_r[d] + temp;
1792 SET_SZ(temp2);
1793 m_icount -= 14;
1794 }
1795
1796 /***************************************************
1797 * S Z C OV 0x001 1 110 mmm ddd (mmm = 0xx)
1798 * x x - - SDBD, AND@ Rm, Rd
1799 ***************************************************/
cp1610_sdbd_andat(int r,int d)1800 void cp1610_cpu_device::cp1610_sdbd_andat(int r, int d)
1801 {
1802 uint16_t temp;
1803 CLR_SZ;
1804 temp = cp1610_readmem16(m_r[r]) & 0xff;
1805 temp |= (cp1610_readmem16(m_r[r]) << 8);
1806 m_r[d] &= temp;
1807 SET_SZ(m_r[d]);
1808 m_icount -= 14;
1809 }
1810
1811 /***************************************************
1812 * S Z C OV 0x001 1 110 mmm ddd (mmm = 10x)
1813 * x x - - SDBD, AND@ Rm, Rd
1814 ***************************************************/
cp1610_sdbd_andat_i(int r,int d)1815 void cp1610_cpu_device::cp1610_sdbd_andat_i(int r, int d)
1816 {
1817 uint16_t temp;
1818 CLR_SZ;
1819 temp = cp1610_readmem16(m_r[r]) & 0xff;
1820 m_r[r]++;
1821 temp |= (cp1610_readmem16(m_r[r]) << 8);
1822 m_r[r]++;
1823 m_r[d] &= temp;
1824 SET_SZ(m_r[d]);
1825 m_icount -= 14;
1826 }
1827
1828 /***************************************************
1829 * S Z C OV 0x001 1 110 mmm ddd (mmm = 101)
1830 * x x - - SDBD, AND@ Rm, Rd
1831 ***************************************************/
cp1610_sdbd_andat_d(int r,int d)1832 void cp1610_cpu_device::cp1610_sdbd_andat_d(int r, int d)
1833 {
1834 uint16_t temp;
1835 CLR_SZ;
1836 m_r[r]--;
1837 temp = cp1610_readmem16(m_r[r]) & 0xff;
1838 m_r[r]--;
1839 temp |= (cp1610_readmem16(m_r[r]) << 8);
1840 m_r[d] &= temp;
1841 SET_SZ(m_r[d]);
1842 m_icount -= 17;
1843 }
1844
1845 /************************************************************************
1846 * S Z C OV 0x001 1 110 111 ddd x xxx xLL LLL LLL x xxx xUU UUU UUU
1847 * x x - - SDBD, ANDI I-I, Rd
1848 ************************************************************************/
cp1610_sdbd_andi(int d)1849 void cp1610_cpu_device::cp1610_sdbd_andi(int d)
1850 {
1851 uint16_t addr;
1852 CLR_SZ;
1853 addr = cp1610_readop(m_r[7]) & 0xff;
1854 m_r[7]++;
1855 addr |= (cp1610_readop(m_r[7]) << 8);
1856 m_r[7]++;
1857 m_r[d] &= addr;
1858 SET_SZ(m_r[d]);
1859 m_icount -= 14;
1860 }
1861
1862 /***************************************************
1863 * S Z C OV 0x001 1 111 mmm ddd (mmm = 0xx)
1864 * x x - - SDBD, XOR@ Rm, Rd
1865 ***************************************************/
cp1610_sdbd_xorat(int r,int d)1866 void cp1610_cpu_device::cp1610_sdbd_xorat(int r, int d)
1867 {
1868 uint16_t temp;
1869 CLR_SZ;
1870 temp = cp1610_readmem16(m_r[r]) & 0xff;
1871 temp |= (cp1610_readmem16(m_r[r]) << 8);
1872 m_r[d] ^= temp;
1873 SET_SZ(m_r[d]);
1874 m_icount -= 14;
1875 }
1876
1877 /***************************************************
1878 * S Z C OV 0x001 1 111 mmm ddd (mmm = 10x)
1879 * x x - - SDBD, XOR@ Rm, Rd
1880 ***************************************************/
cp1610_sdbd_xorat_i(int r,int d)1881 void cp1610_cpu_device::cp1610_sdbd_xorat_i(int r, int d)
1882 {
1883 uint16_t temp;
1884 CLR_SZ;
1885 temp = cp1610_readmem16(m_r[r]) & 0xff;
1886 m_r[r]++;
1887 temp |= (cp1610_readmem16(m_r[r]) << 8);
1888 m_r[r]++;
1889 m_r[d] ^= temp;
1890 SET_SZ(m_r[d]);
1891 m_icount -= 14;
1892 }
1893
1894 /***************************************************
1895 * S Z C OV 0x001 1 111 mmm ddd (mmm = 101)
1896 * x x - - SDBD, XOR@ Rm, Rd
1897 ***************************************************/
cp1610_sdbd_xorat_d(int r,int d)1898 void cp1610_cpu_device::cp1610_sdbd_xorat_d(int r, int d)
1899 {
1900 uint16_t temp;
1901 CLR_SZ;
1902 m_r[r]--;
1903 temp = cp1610_readmem16(m_r[r]) & 0xff;
1904 m_r[r]--;
1905 temp |= (cp1610_readmem16(m_r[r]) << 8);
1906 m_r[d] ^= temp;
1907 SET_SZ(m_r[d]);
1908 m_icount -= 17;
1909 }
1910
1911 /************************************************************************
1912 * S Z C OV 0x001 1 111 111 ddd x xxx xLL LLL LLL x xxx xUU UUU UUU
1913 * x x - - SDBD, XORI I-I, Rd
1914 ************************************************************************/
cp1610_sdbd_xori(int d)1915 void cp1610_cpu_device::cp1610_sdbd_xori(int d)
1916 {
1917 uint16_t addr;
1918 CLR_SZ;
1919 addr = cp1610_readop(m_r[7]) & 0xff;
1920 m_r[7]++;
1921 addr |= (cp1610_readop(m_r[7]) << 8);
1922 m_r[7]++;
1923 m_r[d] ^= addr;
1924 SET_SZ(m_r[d]);
1925 m_icount -= 14;
1926 }
1927
1928 /***************************************************
1929 * S Z C OV b baa aaa a00 x xxx xxa aaa aaa aaa
1930 * - - - - JSR R1bb, ADDR
1931 ***************************************************/
cp1610_jsr(int r,uint16_t addr)1932 void cp1610_cpu_device::cp1610_jsr(int r, uint16_t addr)
1933 {
1934 m_r[r] = m_r[7];
1935 m_r[7] = addr;
1936 }
1937
1938 /***************************************************
1939 * S Z C OV b baa aaa a01 x xxx xxa aaa aaa aaa
1940 * - - - - JSRE R1bb, ADDR
1941 ***************************************************/
cp1610_jsre(int r,uint16_t addr)1942 void cp1610_cpu_device::cp1610_jsre(int r, uint16_t addr)
1943 {
1944 m_r[r] = m_r[7];
1945 m_r[7] = addr;
1946 m_intr_enabled = true;
1947 }
1948
1949 /***************************************************
1950 * S Z C OV b baa aaa a10 x xxx xxa aaa aaa aaa
1951 * - - - - JSRD R1bb, ADDR
1952 ***************************************************/
cp1610_jsrd(int r,uint16_t addr)1953 void cp1610_cpu_device::cp1610_jsrd(int r, uint16_t addr)
1954 {
1955 m_r[r] = m_r[7];
1956 m_r[7] = addr;
1957 m_intr_enabled = false;
1958 }
1959
1960 /***************************************************
1961 * S Z C OV 1 1aa aaa a00 x xxx xxa aaa aaa aaa
1962 * - - - - J ADDR
1963 ***************************************************/
cp1610_j(uint16_t addr)1964 void cp1610_cpu_device::cp1610_j(uint16_t addr)
1965 {
1966 m_r[7] = addr;
1967 }
1968
1969 /***************************************************
1970 * S Z C OV 1 1aa aaa a01 x xxx xxa aaa aaa aaa
1971 * - - - - JE ADDR
1972 ***************************************************/
cp1610_je(uint16_t addr)1973 void cp1610_cpu_device::cp1610_je(uint16_t addr)
1974 {
1975 m_r[7] = addr;
1976 m_intr_enabled = true;
1977 }
1978
1979 /***************************************************
1980 * S Z C OV 1 1aa aaa a10 x xxx xxa aaa aaa aaa
1981 * - - - - JD ADDR
1982 ***************************************************/
cp1610_jd(uint16_t addr)1983 void cp1610_cpu_device::cp1610_jd(uint16_t addr)
1984 {
1985 m_r[7] = addr;
1986 m_intr_enabled = false;
1987 }
1988
cp1610_do_sdbd()1989 void cp1610_cpu_device::cp1610_do_sdbd()
1990 {
1991 uint16_t sdbdtype, dest;
1992
1993 /* Even though SDBD is uninterruptable, we don't need to set the mask bit,
1994 * because we already treat the SDBD prefixed instructions as uninterruptable
1995 */
1996 //m_mask_interrupts = true;
1997
1998 sdbdtype = cp1610_readop(m_r[7]);
1999 dest = sdbdtype & 0x07;
2000 m_r[7]++;
2001
2002 switch (sdbdtype & 0x3f8)
2003 {
2004 case 0x240: /* Not supporting SDBD MVO@ or SDBD MVOI for now */
2005 case 0x248:
2006 case 0x250:
2007 case 0x258:
2008 case 0x260:
2009 case 0x268:
2010 case 0x270:
2011 case 0x278: /* 1 001 xxx xxx */ cp1610_illegal(); break;
2012
2013 case 0x280: /* 1 010 000 xxx */ cp1610_sdbd_mviat(0,dest); break;
2014 case 0x288: /* 1 010 001 xxx */ cp1610_sdbd_mviat(1,dest); break;
2015 case 0x290: /* 1 010 010 xxx */ cp1610_sdbd_mviat(2,dest); break;
2016 case 0x298: /* 1 010 011 xxx */ cp1610_sdbd_mviat(3,dest); break;
2017 case 0x2a0: /* 1 010 100 xxx */ cp1610_sdbd_mviat_i(4,dest); break;
2018 case 0x2a8: /* 1 010 101 xxx */ cp1610_sdbd_mviat_i(5,dest); break;
2019 case 0x2b0: /* 1 010 110 xxx */ cp1610_sdbd_mviat_d(6,dest); break; /* ??? */
2020 case 0x2b8: /* 1 010 111 xxx */ cp1610_sdbd_mvii(dest); break;
2021
2022 case 0x2c0: /* 1 011 000 xxx */ cp1610_sdbd_addat(0,dest); break;
2023 case 0x2c8: /* 1 011 001 xxx */ cp1610_sdbd_addat(1,dest); break;
2024 case 0x2d0: /* 1 011 010 xxx */ cp1610_sdbd_addat(2,dest); break;
2025 case 0x2d8: /* 1 011 011 xxx */ cp1610_sdbd_addat(3,dest); break;
2026 case 0x2e0: /* 1 011 100 xxx */ cp1610_sdbd_addat_i(4,dest); break;
2027 case 0x2e8: /* 1 011 101 xxx */ cp1610_sdbd_addat_i(5,dest); break;
2028 case 0x2f0: /* 1 011 110 xxx */ cp1610_sdbd_addat_d(6,dest); break; /* ??? */
2029 case 0x2f8: /* 1 011 111 xxx */ cp1610_sdbd_addi(dest); break;
2030
2031 case 0x300: /* 1 100 000 xxx */ cp1610_sdbd_subat(0,dest); break;
2032 case 0x308: /* 1 100 001 xxx */ cp1610_sdbd_subat(1,dest); break;
2033 case 0x310: /* 1 100 010 xxx */ cp1610_sdbd_subat(2,dest); break;
2034 case 0x318: /* 1 100 011 xxx */ cp1610_sdbd_subat(3,dest); break;
2035 case 0x320: /* 1 100 100 xxx */ cp1610_sdbd_subat_i(4,dest); break;
2036 case 0x328: /* 1 100 101 xxx */ cp1610_sdbd_subat_i(5,dest); break;
2037 case 0x330: /* 1 100 110 xxx */ cp1610_sdbd_subat_d(6,dest); break; /* ??? */
2038 case 0x338: /* 1 100 111 xxx */ cp1610_sdbd_subi(dest); break;
2039
2040 case 0x340: /* 1 101 000 xxx */ cp1610_sdbd_cmpat(0,dest); break;
2041 case 0x348: /* 1 101 001 xxx */ cp1610_sdbd_cmpat(1,dest); break;
2042 case 0x350: /* 1 101 010 xxx */ cp1610_sdbd_cmpat(2,dest); break;
2043 case 0x358: /* 1 101 011 xxx */ cp1610_sdbd_cmpat(3,dest); break;
2044 case 0x360: /* 1 101 100 xxx */ cp1610_sdbd_cmpat_i(4,dest); break;
2045 case 0x368: /* 1 101 101 xxx */ cp1610_sdbd_cmpat_i(5,dest); break;
2046 case 0x370: /* 1 101 110 xxx */ cp1610_sdbd_cmpat_d(6,dest); break; /* ??? */
2047 case 0x378: /* 1 101 111 xxx */ cp1610_sdbd_cmpi(dest); break;
2048
2049 case 0x380: /* 1 110 000 xxx */ cp1610_sdbd_andat(0,dest); break;
2050 case 0x388: /* 1 110 001 xxx */ cp1610_sdbd_andat(1,dest); break;
2051 case 0x390: /* 1 110 010 xxx */ cp1610_sdbd_andat(2,dest); break;
2052 case 0x398: /* 1 110 011 xxx */ cp1610_sdbd_andat(3,dest); break;
2053 case 0x3a0: /* 1 110 100 xxx */ cp1610_sdbd_andat_i(4,dest); break;
2054 case 0x3a8: /* 1 110 101 xxx */ cp1610_sdbd_andat_i(5,dest); break;
2055 case 0x3b0: /* 1 110 110 xxx */ cp1610_sdbd_andat_d(6,dest); break; /* ??? */
2056 case 0x3b8: /* 1 110 111 xxx */ cp1610_sdbd_andi(dest); break;
2057
2058 case 0x3c0: /* 1 110 000 xxx */ cp1610_sdbd_xorat(0,dest); break;
2059 case 0x3c8: /* 1 110 001 xxx */ cp1610_sdbd_xorat(1,dest); break;
2060 case 0x3d0: /* 1 110 010 xxx */ cp1610_sdbd_xorat(2,dest); break;
2061 case 0x3d8: /* 1 110 011 xxx */ cp1610_sdbd_xorat(3,dest); break;
2062 case 0x3e0: /* 1 110 100 xxx */ cp1610_sdbd_xorat_i(4,dest); break;
2063 case 0x3e8: /* 1 110 101 xxx */ cp1610_sdbd_xorat_i(5,dest); break;
2064 case 0x3f0: /* 1 110 110 xxx */ cp1610_sdbd_xorat_d(6,dest); break; /* ??? */
2065 case 0x3f8: /* 1 110 111 xxx */ cp1610_sdbd_xori(dest); break;
2066 default: cp1610_illegal(); break;
2067 }
2068 }
2069
cp1610_do_jumps()2070 void cp1610_cpu_device::cp1610_do_jumps()
2071 {
2072 uint16_t jumptype, arg1, arg2, addr;
2073
2074 arg1 = cp1610_readop(m_r[7]);
2075 m_r[7]++;
2076
2077 arg2 = cp1610_readop(m_r[7]);
2078 m_r[7]++;
2079
2080 /*logerror("jumps: pc = 0x%04x, arg1 = 0x%04x, arg2 = 0x%04x\n",m_r[7]-1,arg1,arg2);*/
2081 jumptype = arg1 & 0x303;
2082 addr = ((arg1 & 0x0fc) << 8) | (arg2 & 0x3ff);
2083
2084 switch( jumptype )
2085 {
2086 case 0x000: /* 0 0xx xxx x00 */ cp1610_jsr(4,addr); break;
2087 case 0x001: /* 0 0xx xxx x01 */ cp1610_jsre(4,addr); break;
2088 case 0x002: /* 0 0xx xxx x10 */ cp1610_jsrd(4,addr); break;
2089 case 0x003: /* 0 0xx xxx x11 */ cp1610_illegal(); break;
2090
2091 case 0x100: /* 0 1xx xxx x00 */ cp1610_jsr(5,addr); break;
2092 case 0x101: /* 0 1xx xxx x01 */ cp1610_jsre(5,addr); break;
2093 case 0x102: /* 0 1xx xxx x10 */ cp1610_jsrd(5,addr); break;
2094 case 0x103: /* 0 1xx xxx x11 */ cp1610_illegal(); break;
2095
2096 case 0x200: /* 1 0xx xxx x00 */ cp1610_jsr(6,addr); break;
2097 case 0x201: /* 1 0xx xxx x01 */ cp1610_jsre(6,addr); break;
2098 case 0x202: /* 1 0xx xxx x10 */ cp1610_jsrd(6,addr); break;
2099 case 0x203: /* 1 0xx xxx x11 */ cp1610_illegal(); break;
2100
2101 case 0x300: /* 1 1xx xxx x00 */ cp1610_j(addr); break;
2102 case 0x301: /* 1 1xx xxx x01 */ cp1610_je(addr); break;
2103 case 0x302: /* 1 1xx xxx x10 */ cp1610_jd(addr); break;
2104 case 0x303: /* 1 1xx xxx x11 */ cp1610_illegal(); break;
2105 }
2106
2107 m_icount -= 12;
2108 }
2109
2110 /* Execute cycles */
execute_run()2111 void cp1610_cpu_device::execute_run()
2112 {
2113 uint16_t opcode;
2114
2115 if (m_reset_pending)
2116 {
2117 m_reset_pending = false;
2118 m_r[7] = m_read_iab();
2119 }
2120
2121 do
2122 {
2123 debugger_instruction_hook(m_r[7]);
2124
2125 m_mask_interrupts = false;
2126
2127 opcode = cp1610_readop(m_r[7]);
2128 m_r[7]++;
2129 #if 0
2130 logerror("PC:0x%04x, opcode = 0x%03x, ",m_r[7]-1,opcode);
2131 logerror("R0:0x%04x, ",m_r[0]);
2132 logerror("R1:0x%04x, ",m_r[1]);
2133 logerror("R2:0x%04x, ",m_r[2]);
2134 logerror("R3:0x%04x, ",m_r[3]);
2135 logerror("R4:0x%04x, ",m_r[4]);
2136 logerror("R5:0x%04x, ",m_r[5]);
2137 logerror("R6:0x%04x\n",m_r[6]);
2138 #endif
2139
2140 switch( opcode )
2141 {
2142 /* opcode bitmask */
2143 case 0x000: /* 0 000 000 000 */ cp1610_hlt(); break; /* TBD */
2144 case 0x001: /* 0 000 000 001 */ cp1610_do_sdbd(); break;
2145 case 0x002: /* 0 000 000 010 */ cp1610_eis(); break; /* TBD */
2146 case 0x003: /* 0 000 000 011 */ cp1610_dis(); break; /* TBD */
2147 case 0x004: /* 0 000 000 100 */ cp1610_do_jumps(); break;
2148 case 0x005: /* 0 000 000 101 */ cp1610_tci(); break; /* TBD */
2149 case 0x006: /* 0 000 000 110 */ cp1610_clrc(); break;
2150 case 0x007: /* 0 000 000 111 */ cp1610_setc(); break;
2151
2152 case 0x008: /* 0 000 001 000 */ cp1610_incr(0); break;
2153 case 0x009: /* 0 000 001 001 */ cp1610_incr(1); break;
2154 case 0x00a: /* 0 000 001 010 */ cp1610_incr(2); break;
2155 case 0x00b: /* 0 000 001 011 */ cp1610_incr(3); break;
2156 case 0x00c: /* 0 000 001 100 */ cp1610_incr(4); break;
2157 case 0x00d: /* 0 000 001 101 */ cp1610_incr(5); break;
2158 case 0x00e: /* 0 000 001 110 */ cp1610_incr(6); break;
2159 case 0x00f: /* 0 000 001 111 */ cp1610_incr(7); break;
2160
2161 case 0x010: /* 0 000 010 000 */ cp1610_decr(0); break;
2162 case 0x011: /* 0 000 010 001 */ cp1610_decr(1); break;
2163 case 0x012: /* 0 000 010 010 */ cp1610_decr(2); break;
2164 case 0x013: /* 0 000 010 011 */ cp1610_decr(3); break;
2165 case 0x014: /* 0 000 010 100 */ cp1610_decr(4); break;
2166 case 0x015: /* 0 000 010 101 */ cp1610_decr(5); break;
2167 case 0x016: /* 0 000 010 110 */ cp1610_decr(6); break;
2168 case 0x017: /* 0 000 010 111 */ cp1610_decr(7); break;
2169
2170 case 0x018: /* 0 000 011 000 */ cp1610_comr(0); break;
2171 case 0x019: /* 0 000 011 001 */ cp1610_comr(1); break;
2172 case 0x01a: /* 0 000 011 010 */ cp1610_comr(2); break;
2173 case 0x01b: /* 0 000 011 011 */ cp1610_comr(3); break;
2174 case 0x01c: /* 0 000 011 100 */ cp1610_comr(4); break;
2175 case 0x01d: /* 0 000 011 101 */ cp1610_comr(5); break;
2176 case 0x01e: /* 0 000 011 110 */ cp1610_comr(6); break;
2177 case 0x01f: /* 0 000 011 111 */ cp1610_comr(7); break;
2178
2179 case 0x020: /* 0 000 100 000 */ cp1610_negr(0); break;
2180 case 0x021: /* 0 000 100 001 */ cp1610_negr(1); break;
2181 case 0x022: /* 0 000 100 010 */ cp1610_negr(2); break;
2182 case 0x023: /* 0 000 100 011 */ cp1610_negr(3); break;
2183 case 0x024: /* 0 000 100 100 */ cp1610_negr(4); break;
2184 case 0x025: /* 0 000 100 101 */ cp1610_negr(5); break;
2185 case 0x026: /* 0 000 100 110 */ cp1610_negr(6); break;
2186 case 0x027: /* 0 000 100 111 */ cp1610_negr(7); break;
2187
2188 case 0x028: /* 0 000 101 000 */ cp1610_adcr(0); break;
2189 case 0x029: /* 0 000 101 001 */ cp1610_adcr(1); break;
2190 case 0x02a: /* 0 000 101 010 */ cp1610_adcr(2); break;
2191 case 0x02b: /* 0 000 101 011 */ cp1610_adcr(3); break;
2192 case 0x02c: /* 0 000 101 100 */ cp1610_adcr(4); break;
2193 case 0x02d: /* 0 000 101 101 */ cp1610_adcr(5); break;
2194 case 0x02e: /* 0 000 101 110 */ cp1610_adcr(6); break;
2195 case 0x02f: /* 0 000 101 111 */ cp1610_adcr(7); break;
2196
2197 case 0x030: /* 0 000 110 000 */ cp1610_gswd(0); break;
2198 case 0x031: /* 0 000 110 001 */ cp1610_gswd(1); break;
2199 case 0x032: /* 0 000 110 010 */ cp1610_gswd(2); break;
2200 case 0x033: /* 0 000 110 011 */ cp1610_gswd(3); break;
2201 case 0x034: /* 0 000 110 100 */ cp1610_nop(); break;
2202 case 0x035: /* 0 000 110 101 */ cp1610_nop(); break;
2203 case 0x036: /* 0 000 110 110 */ cp1610_sin(); break; /* TBD */
2204 case 0x037: /* 0 000 110 111 */ cp1610_sin(); break; /* TBD */
2205
2206 case 0x038: /* 0 000 111 000 */ cp1610_rswd(0); break;
2207 case 0x039: /* 0 000 111 001 */ cp1610_rswd(1); break;
2208 case 0x03a: /* 0 000 111 010 */ cp1610_rswd(2); break;
2209 case 0x03b: /* 0 000 111 011 */ cp1610_rswd(3); break;
2210 case 0x03c: /* 0 000 111 100 */ cp1610_rswd(4); break;
2211 case 0x03d: /* 0 000 111 101 */ cp1610_rswd(5); break;
2212 case 0x03e: /* 0 000 111 110 */ cp1610_rswd(6); break;
2213 case 0x03f: /* 0 000 111 111 */ cp1610_rswd(7); break;
2214
2215 case 0x040: /* 0 001 000 000 */ cp1610_swap(0); break;
2216 case 0x041: /* 0 001 000 001 */ cp1610_swap(1); break;
2217 case 0x042: /* 0 001 000 010 */ cp1610_swap(2); break;
2218 case 0x043: /* 0 001 000 011 */ cp1610_swap(3); break;
2219 case 0x044: /* 0 001 000 100 */ cp1610_dswap(0); break;
2220 case 0x045: /* 0 001 000 101 */ cp1610_dswap(1); break;
2221 case 0x046: /* 0 001 000 110 */ cp1610_dswap(2); break;
2222 case 0x047: /* 0 001 000 111 */ cp1610_dswap(3); break;
2223
2224 case 0x048: /* 0 001 001 000 */ cp1610_sll_1(0); break;
2225 case 0x049: /* 0 001 001 001 */ cp1610_sll_1(1); break;
2226 case 0x04a: /* 0 001 001 010 */ cp1610_sll_1(2); break;
2227 case 0x04b: /* 0 001 001 011 */ cp1610_sll_1(3); break;
2228 case 0x04c: /* 0 001 001 100 */ cp1610_sll_2(0); break;
2229 case 0x04d: /* 0 001 001 101 */ cp1610_sll_2(1); break;
2230 case 0x04e: /* 0 001 001 110 */ cp1610_sll_2(2); break;
2231 case 0x04f: /* 0 001 001 111 */ cp1610_sll_2(3); break;
2232
2233 case 0x050: /* 0 001 010 000 */ cp1610_rlc_1(0); break;
2234 case 0x051: /* 0 001 010 001 */ cp1610_rlc_1(1); break;
2235 case 0x052: /* 0 001 010 010 */ cp1610_rlc_1(2); break;
2236 case 0x053: /* 0 001 010 011 */ cp1610_rlc_1(3); break;
2237 case 0x054: /* 0 001 010 100 */ cp1610_rlc_2(0); break;
2238 case 0x055: /* 0 001 010 101 */ cp1610_rlc_2(1); break;
2239 case 0x056: /* 0 001 010 110 */ cp1610_rlc_2(2); break;
2240 case 0x057: /* 0 001 010 111 */ cp1610_rlc_2(3); break;
2241
2242 case 0x058: /* 0 001 011 000 */ cp1610_sllc_1(0); break;
2243 case 0x059: /* 0 001 011 001 */ cp1610_sllc_1(1); break;
2244 case 0x05a: /* 0 001 011 010 */ cp1610_sllc_1(2); break;
2245 case 0x05b: /* 0 001 011 011 */ cp1610_sllc_1(3); break;
2246 case 0x05c: /* 0 001 011 100 */ cp1610_sllc_2(0); break;
2247 case 0x05d: /* 0 001 011 101 */ cp1610_sllc_2(1); break;
2248 case 0x05e: /* 0 001 011 110 */ cp1610_sllc_2(2); break;
2249 case 0x05f: /* 0 001 011 111 */ cp1610_sllc_2(3); break;
2250
2251 case 0x060: /* 0 001 100 000 */ cp1610_slr_1(0); break;
2252 case 0x061: /* 0 001 100 001 */ cp1610_slr_1(1); break;
2253 case 0x062: /* 0 001 100 010 */ cp1610_slr_1(2); break;
2254 case 0x063: /* 0 001 100 011 */ cp1610_slr_1(3); break;
2255 case 0x064: /* 0 001 100 100 */ cp1610_slr_2(0); break;
2256 case 0x065: /* 0 001 100 101 */ cp1610_slr_2(1); break;
2257 case 0x066: /* 0 001 100 110 */ cp1610_slr_2(2); break;
2258 case 0x067: /* 0 001 100 111 */ cp1610_slr_2(3); break;
2259
2260 case 0x068: /* 0 001 101 000 */ cp1610_sar_1(0); break;
2261 case 0x069: /* 0 001 101 001 */ cp1610_sar_1(1); break;
2262 case 0x06a: /* 0 001 101 010 */ cp1610_sar_1(2); break;
2263 case 0x06b: /* 0 001 101 011 */ cp1610_sar_1(3); break;
2264 case 0x06c: /* 0 001 101 100 */ cp1610_sar_2(0); break;
2265 case 0x06d: /* 0 001 101 101 */ cp1610_sar_2(1); break;
2266 case 0x06e: /* 0 001 101 110 */ cp1610_sar_2(2); break;
2267 case 0x06f: /* 0 001 101 111 */ cp1610_sar_2(3); break;
2268
2269 case 0x070: /* 0 001 110 000 */ cp1610_rrc_1(0); break;
2270 case 0x071: /* 0 001 110 001 */ cp1610_rrc_1(1); break;
2271 case 0x072: /* 0 001 110 010 */ cp1610_rrc_1(2); break;
2272 case 0x073: /* 0 001 110 011 */ cp1610_rrc_1(3); break;
2273 case 0x074: /* 0 001 110 100 */ cp1610_rrc_2(0); break;
2274 case 0x075: /* 0 001 110 101 */ cp1610_rrc_2(1); break;
2275 case 0x076: /* 0 001 110 110 */ cp1610_rrc_2(2); break;
2276 case 0x077: /* 0 001 110 111 */ cp1610_rrc_2(3); break;
2277
2278 case 0x078: /* 0 001 111 000 */ cp1610_sarc_1(0); break;
2279 case 0x079: /* 0 001 111 001 */ cp1610_sarc_1(1); break;
2280 case 0x07a: /* 0 001 111 010 */ cp1610_sarc_1(2); break;
2281 case 0x07b: /* 0 001 111 011 */ cp1610_sarc_1(3); break;
2282 case 0x07c: /* 0 001 111 100 */ cp1610_sarc_2(0); break;
2283 case 0x07d: /* 0 001 111 101 */ cp1610_sarc_2(1); break;
2284 case 0x07e: /* 0 001 111 110 */ cp1610_sarc_2(2); break;
2285 case 0x07f: /* 0 001 111 111 */ cp1610_sarc_2(3); break;
2286
2287 case 0x080: /* 0 010 000 000 */ cp1610_tstr(0); break;
2288 case 0x081: /* 0 010 000 001 */ cp1610_movr(0,1); break;
2289 case 0x082: /* 0 010 000 010 */ cp1610_movr(0,2); break;
2290 case 0x083: /* 0 010 000 011 */ cp1610_movr(0,3); break;
2291 case 0x084: /* 0 010 000 100 */ cp1610_movr(0,4); break;
2292 case 0x085: /* 0 010 000 101 */ cp1610_movr(0,5); break;
2293 case 0x086: /* 0 010 000 110 */ cp1610_movr(0,6); break;
2294 case 0x087: /* 0 010 000 111 */ cp1610_movr(0,7); break; /* jr */
2295
2296 case 0x088: /* 0 010 001 000 */ cp1610_movr(1,0); break;
2297 case 0x089: /* 0 010 001 001 */ cp1610_tstr(1); break;
2298 case 0x08a: /* 0 010 001 010 */ cp1610_movr(1,2); break;
2299 case 0x08b: /* 0 010 001 011 */ cp1610_movr(1,3); break;
2300 case 0x08c: /* 0 010 001 100 */ cp1610_movr(1,4); break;
2301 case 0x08d: /* 0 010 001 101 */ cp1610_movr(1,5); break;
2302 case 0x08e: /* 0 010 001 110 */ cp1610_movr(1,6); break;
2303 case 0x08f: /* 0 010 001 111 */ cp1610_movr(1,7); break; /* jr */
2304
2305 case 0x090: /* 0 010 010 000 */ cp1610_movr(2,0); break;
2306 case 0x091: /* 0 010 010 001 */ cp1610_movr(2,1); break;
2307 case 0x092: /* 0 010 010 010 */ cp1610_tstr(2); break;
2308 case 0x093: /* 0 010 010 011 */ cp1610_movr(2,3); break;
2309 case 0x094: /* 0 010 010 100 */ cp1610_movr(2,4); break;
2310 case 0x095: /* 0 010 010 101 */ cp1610_movr(2,5); break;
2311 case 0x096: /* 0 010 010 110 */ cp1610_movr(2,6); break;
2312 case 0x097: /* 0 010 010 111 */ cp1610_movr(2,7); break; /* jr */
2313
2314 case 0x098: /* 0 010 011 000 */ cp1610_movr(3,0); break;
2315 case 0x099: /* 0 010 011 001 */ cp1610_movr(3,1); break;
2316 case 0x09a: /* 0 010 011 010 */ cp1610_movr(3,2); break;
2317 case 0x09b: /* 0 010 011 011 */ cp1610_tstr(3); break;
2318 case 0x09c: /* 0 010 011 100 */ cp1610_movr(3,4); break;
2319 case 0x09d: /* 0 010 011 101 */ cp1610_movr(3,5); break;
2320 case 0x09e: /* 0 010 011 110 */ cp1610_movr(3,6); break;
2321 case 0x09f: /* 0 010 011 111 */ cp1610_movr(3,7); break; /* jr */
2322
2323 case 0x0a0: /* 0 010 100 000 */ cp1610_movr(4,0); break;
2324 case 0x0a1: /* 0 010 100 001 */ cp1610_movr(4,1); break;
2325 case 0x0a2: /* 0 010 100 010 */ cp1610_movr(4,2); break;
2326 case 0x0a3: /* 0 010 100 011 */ cp1610_movr(4,3); break;
2327 case 0x0a4: /* 0 010 100 100 */ cp1610_tstr(4); break;
2328 case 0x0a5: /* 0 010 100 101 */ cp1610_movr(4,5); break;
2329 case 0x0a6: /* 0 010 100 110 */ cp1610_movr(4,6); break;
2330 case 0x0a7: /* 0 010 100 111 */ cp1610_movr(4,7); break; /* jr */
2331
2332 case 0x0a8: /* 0 010 101 000 */ cp1610_movr(5,0); break;
2333 case 0x0a9: /* 0 010 101 001 */ cp1610_movr(5,1); break;
2334 case 0x0aa: /* 0 010 101 010 */ cp1610_movr(5,2); break;
2335 case 0x0ab: /* 0 010 101 011 */ cp1610_movr(5,3); break;
2336 case 0x0ac: /* 0 010 101 100 */ cp1610_movr(5,4); break;
2337 case 0x0ad: /* 0 010 101 101 */ cp1610_tstr(5); break;
2338 case 0x0ae: /* 0 010 101 110 */ cp1610_movr(5,6); break;
2339 case 0x0af: /* 0 010 101 111 */ cp1610_movr(5,7); break; /* jr */
2340
2341 case 0x0b0: /* 0 010 110 000 */ cp1610_movr(6,0); break;
2342 case 0x0b1: /* 0 010 110 001 */ cp1610_movr(6,1); break;
2343 case 0x0b2: /* 0 010 110 010 */ cp1610_movr(6,2); break;
2344 case 0x0b3: /* 0 010 110 011 */ cp1610_movr(6,3); break;
2345 case 0x0b4: /* 0 010 110 100 */ cp1610_movr(6,4); break;
2346 case 0x0b5: /* 0 010 110 101 */ cp1610_movr(6,5); break;
2347 case 0x0b6: /* 0 010 110 110 */ cp1610_tstr(6); break;
2348 case 0x0b7: /* 0 010 110 111 */ cp1610_movr(6,7); break; /* jr */
2349
2350 case 0x0b8: /* 0 010 111 000 */ cp1610_movr(7,0); break;
2351 case 0x0b9: /* 0 010 111 001 */ cp1610_movr(7,1); break;
2352 case 0x0ba: /* 0 010 111 010 */ cp1610_movr(7,2); break;
2353 case 0x0bb: /* 0 010 111 011 */ cp1610_movr(7,3); break;
2354 case 0x0bc: /* 0 010 111 100 */ cp1610_movr(7,4); break;
2355 case 0x0bd: /* 0 010 111 101 */ cp1610_movr(7,5); break;
2356 case 0x0be: /* 0 010 111 110 */ cp1610_movr(7,6); break;
2357 case 0x0bf: /* 0 010 111 111 */ cp1610_tstr(7); break;
2358
2359 case 0x0c0: /* 0 011 000 000 */ cp1610_addr(0,0); break;
2360 case 0x0c1: /* 0 011 000 001 */ cp1610_addr(0,1); break;
2361 case 0x0c2: /* 0 011 000 010 */ cp1610_addr(0,2); break;
2362 case 0x0c3: /* 0 011 000 011 */ cp1610_addr(0,3); break;
2363 case 0x0c4: /* 0 011 000 100 */ cp1610_addr(0,4); break;
2364 case 0x0c5: /* 0 011 000 101 */ cp1610_addr(0,5); break;
2365 case 0x0c6: /* 0 011 000 110 */ cp1610_addr(0,6); break;
2366 case 0x0c7: /* 0 011 000 111 */ cp1610_addr(0,7); break;
2367
2368 case 0x0c8: /* 0 011 001 000 */ cp1610_addr(1,0); break;
2369 case 0x0c9: /* 0 011 001 001 */ cp1610_addr(1,1); break;
2370 case 0x0ca: /* 0 011 001 010 */ cp1610_addr(1,2); break;
2371 case 0x0cb: /* 0 011 001 011 */ cp1610_addr(1,3); break;
2372 case 0x0cc: /* 0 011 001 100 */ cp1610_addr(1,4); break;
2373 case 0x0cd: /* 0 011 001 101 */ cp1610_addr(1,5); break;
2374 case 0x0ce: /* 0 011 001 110 */ cp1610_addr(1,6); break;
2375 case 0x0cf: /* 0 011 001 111 */ cp1610_addr(1,7); break;
2376
2377 case 0x0d0: /* 0 011 010 000 */ cp1610_addr(2,0); break;
2378 case 0x0d1: /* 0 011 010 001 */ cp1610_addr(2,1); break;
2379 case 0x0d2: /* 0 011 010 010 */ cp1610_addr(2,2); break;
2380 case 0x0d3: /* 0 011 010 011 */ cp1610_addr(2,3); break;
2381 case 0x0d4: /* 0 011 010 100 */ cp1610_addr(2,4); break;
2382 case 0x0d5: /* 0 011 010 101 */ cp1610_addr(2,5); break;
2383 case 0x0d6: /* 0 011 010 110 */ cp1610_addr(2,6); break;
2384 case 0x0d7: /* 0 011 010 111 */ cp1610_addr(2,7); break;
2385
2386 case 0x0d8: /* 0 011 011 000 */ cp1610_addr(3,0); break;
2387 case 0x0d9: /* 0 011 011 001 */ cp1610_addr(3,1); break;
2388 case 0x0da: /* 0 011 011 010 */ cp1610_addr(3,2); break;
2389 case 0x0db: /* 0 011 011 011 */ cp1610_addr(3,3); break;
2390 case 0x0dc: /* 0 011 011 100 */ cp1610_addr(3,4); break;
2391 case 0x0dd: /* 0 011 011 101 */ cp1610_addr(3,5); break;
2392 case 0x0de: /* 0 011 011 110 */ cp1610_addr(3,6); break;
2393 case 0x0df: /* 0 011 011 111 */ cp1610_addr(3,7); break;
2394
2395 case 0x0e0: /* 0 011 100 000 */ cp1610_addr(4,0); break;
2396 case 0x0e1: /* 0 011 100 001 */ cp1610_addr(4,1); break;
2397 case 0x0e2: /* 0 011 100 010 */ cp1610_addr(4,2); break;
2398 case 0x0e3: /* 0 011 100 011 */ cp1610_addr(4,3); break;
2399 case 0x0e4: /* 0 011 100 100 */ cp1610_addr(4,4); break;
2400 case 0x0e5: /* 0 011 100 101 */ cp1610_addr(4,5); break;
2401 case 0x0e6: /* 0 011 100 110 */ cp1610_addr(4,6); break;
2402 case 0x0e7: /* 0 011 100 111 */ cp1610_addr(4,7); break;
2403
2404 case 0x0e8: /* 0 011 101 000 */ cp1610_addr(5,0); break;
2405 case 0x0e9: /* 0 011 101 001 */ cp1610_addr(5,1); break;
2406 case 0x0ea: /* 0 011 101 010 */ cp1610_addr(5,2); break;
2407 case 0x0eb: /* 0 011 101 011 */ cp1610_addr(5,3); break;
2408 case 0x0ec: /* 0 011 101 100 */ cp1610_addr(5,4); break;
2409 case 0x0ed: /* 0 011 101 101 */ cp1610_addr(5,5); break;
2410 case 0x0ee: /* 0 011 101 110 */ cp1610_addr(5,6); break;
2411 case 0x0ef: /* 0 011 101 111 */ cp1610_addr(5,7); break;
2412
2413 case 0x0f0: /* 0 011 110 000 */ cp1610_addr(6,0); break;
2414 case 0x0f1: /* 0 011 110 001 */ cp1610_addr(6,1); break;
2415 case 0x0f2: /* 0 011 110 010 */ cp1610_addr(6,2); break;
2416 case 0x0f3: /* 0 011 110 011 */ cp1610_addr(6,3); break;
2417 case 0x0f4: /* 0 011 110 100 */ cp1610_addr(6,4); break;
2418 case 0x0f5: /* 0 011 110 101 */ cp1610_addr(6,5); break;
2419 case 0x0f6: /* 0 011 110 110 */ cp1610_addr(6,6); break;
2420 case 0x0f7: /* 0 011 110 111 */ cp1610_addr(6,7); break;
2421
2422 case 0x0f8: /* 0 011 111 000 */ cp1610_addr(7,0); break;
2423 case 0x0f9: /* 0 011 111 001 */ cp1610_addr(7,1); break;
2424 case 0x0fa: /* 0 011 111 010 */ cp1610_addr(7,2); break;
2425 case 0x0fb: /* 0 011 111 011 */ cp1610_addr(7,3); break;
2426 case 0x0fc: /* 0 011 111 100 */ cp1610_addr(7,4); break;
2427 case 0x0fd: /* 0 011 111 101 */ cp1610_addr(7,5); break;
2428 case 0x0fe: /* 0 011 111 110 */ cp1610_addr(7,6); break;
2429 case 0x0ff: /* 0 011 111 111 */ cp1610_addr(7,7); break;
2430
2431 case 0x100: /* 0 100 000 000 */ cp1610_subr(0,0); break;
2432 case 0x101: /* 0 100 000 001 */ cp1610_subr(0,1); break;
2433 case 0x102: /* 0 100 000 010 */ cp1610_subr(0,2); break;
2434 case 0x103: /* 0 100 000 011 */ cp1610_subr(0,3); break;
2435 case 0x104: /* 0 100 000 100 */ cp1610_subr(0,4); break;
2436 case 0x105: /* 0 100 000 101 */ cp1610_subr(0,5); break;
2437 case 0x106: /* 0 100 000 110 */ cp1610_subr(0,6); break;
2438 case 0x107: /* 0 100 000 111 */ cp1610_subr(0,7); break;
2439
2440 case 0x108: /* 0 100 001 000 */ cp1610_subr(1,0); break;
2441 case 0x109: /* 0 100 001 001 */ cp1610_subr(1,1); break;
2442 case 0x10a: /* 0 100 001 010 */ cp1610_subr(1,2); break;
2443 case 0x10b: /* 0 100 001 011 */ cp1610_subr(1,3); break;
2444 case 0x10c: /* 0 100 001 100 */ cp1610_subr(1,4); break;
2445 case 0x10d: /* 0 100 001 101 */ cp1610_subr(1,5); break;
2446 case 0x10e: /* 0 100 001 110 */ cp1610_subr(1,6); break;
2447 case 0x10f: /* 0 100 001 111 */ cp1610_subr(1,7); break;
2448
2449 case 0x110: /* 0 100 010 000 */ cp1610_subr(2,0); break;
2450 case 0x111: /* 0 100 010 001 */ cp1610_subr(2,1); break;
2451 case 0x112: /* 0 100 010 010 */ cp1610_subr(2,2); break;
2452 case 0x113: /* 0 100 010 011 */ cp1610_subr(2,3); break;
2453 case 0x114: /* 0 100 010 100 */ cp1610_subr(2,4); break;
2454 case 0x115: /* 0 100 010 101 */ cp1610_subr(2,5); break;
2455 case 0x116: /* 0 100 010 110 */ cp1610_subr(2,6); break;
2456 case 0x117: /* 0 100 010 111 */ cp1610_subr(2,7); break;
2457
2458 case 0x118: /* 0 100 011 000 */ cp1610_subr(3,0); break;
2459 case 0x119: /* 0 100 011 001 */ cp1610_subr(3,1); break;
2460 case 0x11a: /* 0 100 011 010 */ cp1610_subr(3,2); break;
2461 case 0x11b: /* 0 100 011 011 */ cp1610_subr(3,3); break;
2462 case 0x11c: /* 0 100 011 100 */ cp1610_subr(3,4); break;
2463 case 0x11d: /* 0 100 011 101 */ cp1610_subr(3,5); break;
2464 case 0x11e: /* 0 100 011 110 */ cp1610_subr(3,6); break;
2465 case 0x11f: /* 0 100 011 111 */ cp1610_subr(3,7); break;
2466
2467 case 0x120: /* 0 100 100 000 */ cp1610_subr(4,0); break;
2468 case 0x121: /* 0 100 100 001 */ cp1610_subr(4,1); break;
2469 case 0x122: /* 0 100 100 010 */ cp1610_subr(4,2); break;
2470 case 0x123: /* 0 100 100 011 */ cp1610_subr(4,3); break;
2471 case 0x124: /* 0 100 100 100 */ cp1610_subr(4,4); break;
2472 case 0x125: /* 0 100 100 101 */ cp1610_subr(4,5); break;
2473 case 0x126: /* 0 100 100 110 */ cp1610_subr(4,6); break;
2474 case 0x127: /* 0 100 100 111 */ cp1610_subr(4,7); break;
2475
2476 case 0x128: /* 0 100 101 000 */ cp1610_subr(5,0); break;
2477 case 0x129: /* 0 100 101 001 */ cp1610_subr(5,1); break;
2478 case 0x12a: /* 0 100 101 010 */ cp1610_subr(5,2); break;
2479 case 0x12b: /* 0 100 101 011 */ cp1610_subr(5,3); break;
2480 case 0x12c: /* 0 100 101 100 */ cp1610_subr(5,4); break;
2481 case 0x12d: /* 0 100 101 101 */ cp1610_subr(5,5); break;
2482 case 0x12e: /* 0 100 101 110 */ cp1610_subr(5,6); break;
2483 case 0x12f: /* 0 100 101 111 */ cp1610_subr(5,7); break;
2484
2485 case 0x130: /* 0 100 110 000 */ cp1610_subr(6,0); break;
2486 case 0x131: /* 0 100 110 001 */ cp1610_subr(6,1); break;
2487 case 0x132: /* 0 100 110 010 */ cp1610_subr(6,2); break;
2488 case 0x133: /* 0 100 110 011 */ cp1610_subr(6,3); break;
2489 case 0x134: /* 0 100 110 100 */ cp1610_subr(6,4); break;
2490 case 0x135: /* 0 100 110 101 */ cp1610_subr(6,5); break;
2491 case 0x136: /* 0 100 110 110 */ cp1610_subr(6,6); break;
2492 case 0x137: /* 0 100 110 111 */ cp1610_subr(6,7); break;
2493
2494 case 0x138: /* 0 100 111 000 */ cp1610_subr(7,0); break;
2495 case 0x139: /* 0 100 111 001 */ cp1610_subr(7,1); break;
2496 case 0x13a: /* 0 100 111 010 */ cp1610_subr(7,2); break;
2497 case 0x13b: /* 0 100 111 011 */ cp1610_subr(7,3); break;
2498 case 0x13c: /* 0 100 111 100 */ cp1610_subr(7,4); break;
2499 case 0x13d: /* 0 100 111 101 */ cp1610_subr(7,5); break;
2500 case 0x13e: /* 0 100 111 110 */ cp1610_subr(7,6); break;
2501 case 0x13f: /* 0 100 111 111 */ cp1610_subr(7,7); break;
2502
2503 case 0x140: /* 0 101 000 000 */ cp1610_cmpr(0,0); break;
2504 case 0x141: /* 0 101 000 001 */ cp1610_cmpr(0,1); break;
2505 case 0x142: /* 0 101 000 010 */ cp1610_cmpr(0,2); break;
2506 case 0x143: /* 0 101 000 011 */ cp1610_cmpr(0,3); break;
2507 case 0x144: /* 0 101 000 100 */ cp1610_cmpr(0,4); break;
2508 case 0x145: /* 0 101 000 101 */ cp1610_cmpr(0,5); break;
2509 case 0x146: /* 0 101 000 110 */ cp1610_cmpr(0,6); break;
2510 case 0x147: /* 0 101 000 111 */ cp1610_cmpr(0,7); break;
2511
2512 case 0x148: /* 0 101 001 000 */ cp1610_cmpr(1,0); break;
2513 case 0x149: /* 0 101 001 001 */ cp1610_cmpr(1,1); break;
2514 case 0x14a: /* 0 101 001 010 */ cp1610_cmpr(1,2); break;
2515 case 0x14b: /* 0 101 001 011 */ cp1610_cmpr(1,3); break;
2516 case 0x14c: /* 0 101 001 100 */ cp1610_cmpr(1,4); break;
2517 case 0x14d: /* 0 101 001 101 */ cp1610_cmpr(1,5); break;
2518 case 0x14e: /* 0 101 001 110 */ cp1610_cmpr(1,6); break;
2519 case 0x14f: /* 0 101 001 111 */ cp1610_cmpr(1,7); break;
2520
2521 case 0x150: /* 0 101 010 000 */ cp1610_cmpr(2,0); break;
2522 case 0x151: /* 0 101 010 001 */ cp1610_cmpr(2,1); break;
2523 case 0x152: /* 0 101 010 010 */ cp1610_cmpr(2,2); break;
2524 case 0x153: /* 0 101 010 011 */ cp1610_cmpr(2,3); break;
2525 case 0x154: /* 0 101 010 100 */ cp1610_cmpr(2,4); break;
2526 case 0x155: /* 0 101 010 101 */ cp1610_cmpr(2,5); break;
2527 case 0x156: /* 0 101 010 110 */ cp1610_cmpr(2,6); break;
2528 case 0x157: /* 0 101 010 111 */ cp1610_cmpr(2,7); break;
2529
2530 case 0x158: /* 0 101 011 000 */ cp1610_cmpr(3,0); break;
2531 case 0x159: /* 0 101 011 001 */ cp1610_cmpr(3,1); break;
2532 case 0x15a: /* 0 101 011 010 */ cp1610_cmpr(3,2); break;
2533 case 0x15b: /* 0 101 011 011 */ cp1610_cmpr(3,3); break;
2534 case 0x15c: /* 0 101 011 100 */ cp1610_cmpr(3,4); break;
2535 case 0x15d: /* 0 101 011 101 */ cp1610_cmpr(3,5); break;
2536 case 0x15e: /* 0 101 011 110 */ cp1610_cmpr(3,6); break;
2537 case 0x15f: /* 0 101 011 111 */ cp1610_cmpr(3,7); break;
2538
2539 case 0x160: /* 0 101 100 000 */ cp1610_cmpr(4,0); break;
2540 case 0x161: /* 0 101 100 001 */ cp1610_cmpr(4,1); break;
2541 case 0x162: /* 0 101 100 010 */ cp1610_cmpr(4,2); break;
2542 case 0x163: /* 0 101 100 011 */ cp1610_cmpr(4,3); break;
2543 case 0x164: /* 0 101 100 100 */ cp1610_cmpr(4,4); break;
2544 case 0x165: /* 0 101 100 101 */ cp1610_cmpr(4,5); break;
2545 case 0x166: /* 0 101 100 110 */ cp1610_cmpr(4,6); break;
2546 case 0x167: /* 0 101 100 111 */ cp1610_cmpr(4,7); break;
2547
2548 case 0x168: /* 0 101 101 000 */ cp1610_cmpr(5,0); break;
2549 case 0x169: /* 0 101 101 001 */ cp1610_cmpr(5,1); break;
2550 case 0x16a: /* 0 101 101 010 */ cp1610_cmpr(5,2); break;
2551 case 0x16b: /* 0 101 101 011 */ cp1610_cmpr(5,3); break;
2552 case 0x16c: /* 0 101 101 100 */ cp1610_cmpr(5,4); break;
2553 case 0x16d: /* 0 101 101 101 */ cp1610_cmpr(5,5); break;
2554 case 0x16e: /* 0 101 101 110 */ cp1610_cmpr(5,6); break;
2555 case 0x16f: /* 0 101 101 111 */ cp1610_cmpr(5,7); break;
2556
2557 case 0x170: /* 0 101 110 000 */ cp1610_cmpr(6,0); break;
2558 case 0x171: /* 0 101 110 001 */ cp1610_cmpr(6,1); break;
2559 case 0x172: /* 0 101 110 010 */ cp1610_cmpr(6,2); break;
2560 case 0x173: /* 0 101 110 011 */ cp1610_cmpr(6,3); break;
2561 case 0x174: /* 0 101 110 100 */ cp1610_cmpr(6,4); break;
2562 case 0x175: /* 0 101 110 101 */ cp1610_cmpr(6,5); break;
2563 case 0x176: /* 0 101 110 110 */ cp1610_cmpr(6,6); break;
2564 case 0x177: /* 0 101 110 111 */ cp1610_cmpr(6,7); break;
2565
2566 case 0x178: /* 0 101 111 000 */ cp1610_cmpr(7,0); break;
2567 case 0x179: /* 0 101 111 001 */ cp1610_cmpr(7,1); break;
2568 case 0x17a: /* 0 101 111 010 */ cp1610_cmpr(7,2); break;
2569 case 0x17b: /* 0 101 111 011 */ cp1610_cmpr(7,3); break;
2570 case 0x17c: /* 0 101 111 100 */ cp1610_cmpr(7,4); break;
2571 case 0x17d: /* 0 101 111 101 */ cp1610_cmpr(7,5); break;
2572 case 0x17e: /* 0 101 111 110 */ cp1610_cmpr(7,6); break;
2573 case 0x17f: /* 0 101 111 111 */ cp1610_cmpr(7,7); break;
2574
2575 case 0x180: /* 0 110 000 000 */ cp1610_andr(0,0); break;
2576 case 0x181: /* 0 110 000 001 */ cp1610_andr(0,1); break;
2577 case 0x182: /* 0 110 000 010 */ cp1610_andr(0,2); break;
2578 case 0x183: /* 0 110 000 011 */ cp1610_andr(0,3); break;
2579 case 0x184: /* 0 110 000 100 */ cp1610_andr(0,4); break;
2580 case 0x185: /* 0 110 000 101 */ cp1610_andr(0,5); break;
2581 case 0x186: /* 0 110 000 110 */ cp1610_andr(0,6); break;
2582 case 0x187: /* 0 110 000 111 */ cp1610_andr(0,7); break;
2583
2584 case 0x188: /* 0 110 001 000 */ cp1610_andr(1,0); break;
2585 case 0x189: /* 0 110 001 001 */ cp1610_andr(1,1); break;
2586 case 0x18a: /* 0 110 001 010 */ cp1610_andr(1,2); break;
2587 case 0x18b: /* 0 110 001 011 */ cp1610_andr(1,3); break;
2588 case 0x18c: /* 0 110 001 100 */ cp1610_andr(1,4); break;
2589 case 0x18d: /* 0 110 001 101 */ cp1610_andr(1,5); break;
2590 case 0x18e: /* 0 110 001 110 */ cp1610_andr(1,6); break;
2591 case 0x18f: /* 0 110 001 111 */ cp1610_andr(1,7); break;
2592
2593 case 0x190: /* 0 110 010 000 */ cp1610_andr(2,0); break;
2594 case 0x191: /* 0 110 010 001 */ cp1610_andr(2,1); break;
2595 case 0x192: /* 0 110 010 010 */ cp1610_andr(2,2); break;
2596 case 0x193: /* 0 110 010 011 */ cp1610_andr(2,3); break;
2597 case 0x194: /* 0 110 010 100 */ cp1610_andr(2,4); break;
2598 case 0x195: /* 0 110 010 101 */ cp1610_andr(2,5); break;
2599 case 0x196: /* 0 110 010 110 */ cp1610_andr(2,6); break;
2600 case 0x197: /* 0 110 010 111 */ cp1610_andr(2,7); break;
2601
2602 case 0x198: /* 0 110 011 000 */ cp1610_andr(3,0); break;
2603 case 0x199: /* 0 110 011 001 */ cp1610_andr(3,1); break;
2604 case 0x19a: /* 0 110 011 010 */ cp1610_andr(3,2); break;
2605 case 0x19b: /* 0 110 011 011 */ cp1610_andr(3,3); break;
2606 case 0x19c: /* 0 110 011 100 */ cp1610_andr(3,4); break;
2607 case 0x19d: /* 0 110 011 101 */ cp1610_andr(3,5); break;
2608 case 0x19e: /* 0 110 011 110 */ cp1610_andr(3,6); break;
2609 case 0x19f: /* 0 110 011 111 */ cp1610_andr(3,7); break;
2610
2611 case 0x1a0: /* 0 110 100 000 */ cp1610_andr(4,0); break;
2612 case 0x1a1: /* 0 110 100 001 */ cp1610_andr(4,1); break;
2613 case 0x1a2: /* 0 110 100 010 */ cp1610_andr(4,2); break;
2614 case 0x1a3: /* 0 110 100 011 */ cp1610_andr(4,3); break;
2615 case 0x1a4: /* 0 110 100 100 */ cp1610_andr(4,4); break;
2616 case 0x1a5: /* 0 110 100 101 */ cp1610_andr(4,5); break;
2617 case 0x1a6: /* 0 110 100 110 */ cp1610_andr(4,6); break;
2618 case 0x1a7: /* 0 110 100 111 */ cp1610_andr(4,7); break;
2619
2620 case 0x1a8: /* 0 110 101 000 */ cp1610_andr(5,0); break;
2621 case 0x1a9: /* 0 110 101 001 */ cp1610_andr(5,1); break;
2622 case 0x1aa: /* 0 110 101 010 */ cp1610_andr(5,2); break;
2623 case 0x1ab: /* 0 110 101 011 */ cp1610_andr(5,3); break;
2624 case 0x1ac: /* 0 110 101 100 */ cp1610_andr(5,4); break;
2625 case 0x1ad: /* 0 110 101 101 */ cp1610_andr(5,5); break;
2626 case 0x1ae: /* 0 110 101 110 */ cp1610_andr(5,6); break;
2627 case 0x1af: /* 0 110 101 111 */ cp1610_andr(5,7); break;
2628
2629 case 0x1b0: /* 0 110 110 000 */ cp1610_andr(6,0); break;
2630 case 0x1b1: /* 0 110 110 001 */ cp1610_andr(6,1); break;
2631 case 0x1b2: /* 0 110 110 010 */ cp1610_andr(6,2); break;
2632 case 0x1b3: /* 0 110 110 011 */ cp1610_andr(6,3); break;
2633 case 0x1b4: /* 0 110 110 100 */ cp1610_andr(6,4); break;
2634 case 0x1b5: /* 0 110 110 101 */ cp1610_andr(6,5); break;
2635 case 0x1b6: /* 0 110 110 110 */ cp1610_andr(6,6); break;
2636 case 0x1b7: /* 0 110 110 111 */ cp1610_andr(6,7); break;
2637
2638 case 0x1b8: /* 0 110 111 000 */ cp1610_andr(7,0); break;
2639 case 0x1b9: /* 0 110 111 001 */ cp1610_andr(7,1); break;
2640 case 0x1ba: /* 0 110 111 010 */ cp1610_andr(7,2); break;
2641 case 0x1bb: /* 0 110 111 011 */ cp1610_andr(7,3); break;
2642 case 0x1bc: /* 0 110 111 100 */ cp1610_andr(7,4); break;
2643 case 0x1bd: /* 0 110 111 101 */ cp1610_andr(7,5); break;
2644 case 0x1be: /* 0 110 111 110 */ cp1610_andr(7,6); break;
2645 case 0x1bf: /* 0 110 111 111 */ cp1610_andr(7,7); break;
2646
2647 case 0x1c0: /* 0 111 000 000 */ cp1610_clrr(0); break;
2648 case 0x1c1: /* 0 111 000 001 */ cp1610_xorr(0,1); break;
2649 case 0x1c2: /* 0 111 000 010 */ cp1610_xorr(0,2); break;
2650 case 0x1c3: /* 0 111 000 011 */ cp1610_xorr(0,3); break;
2651 case 0x1c4: /* 0 111 000 100 */ cp1610_xorr(0,4); break;
2652 case 0x1c5: /* 0 111 000 101 */ cp1610_xorr(0,5); break;
2653 case 0x1c6: /* 0 111 000 110 */ cp1610_xorr(0,6); break;
2654 case 0x1c7: /* 0 111 000 111 */ cp1610_xorr(0,7); break;
2655
2656 case 0x1c8: /* 0 111 001 000 */ cp1610_xorr(1,0); break;
2657 case 0x1c9: /* 0 111 001 001 */ cp1610_clrr(1); break;
2658 case 0x1ca: /* 0 111 001 010 */ cp1610_xorr(1,2); break;
2659 case 0x1cb: /* 0 111 001 011 */ cp1610_xorr(1,3); break;
2660 case 0x1cc: /* 0 111 001 100 */ cp1610_xorr(1,4); break;
2661 case 0x1cd: /* 0 111 001 101 */ cp1610_xorr(1,5); break;
2662 case 0x1ce: /* 0 111 001 110 */ cp1610_xorr(1,6); break;
2663 case 0x1cf: /* 0 111 001 111 */ cp1610_xorr(1,7); break;
2664
2665 case 0x1d0: /* 0 111 010 000 */ cp1610_xorr(2,0); break;
2666 case 0x1d1: /* 0 111 010 001 */ cp1610_xorr(2,1); break;
2667 case 0x1d2: /* 0 111 010 010 */ cp1610_clrr(2); break;
2668 case 0x1d3: /* 0 111 010 011 */ cp1610_xorr(2,3); break;
2669 case 0x1d4: /* 0 111 010 100 */ cp1610_xorr(2,4); break;
2670 case 0x1d5: /* 0 111 010 101 */ cp1610_xorr(2,5); break;
2671 case 0x1d6: /* 0 111 010 110 */ cp1610_xorr(2,6); break;
2672 case 0x1d7: /* 0 111 010 111 */ cp1610_xorr(2,7); break;
2673
2674 case 0x1d8: /* 0 111 011 000 */ cp1610_xorr(3,0); break;
2675 case 0x1d9: /* 0 111 011 001 */ cp1610_xorr(3,1); break;
2676 case 0x1da: /* 0 111 011 010 */ cp1610_xorr(3,2); break;
2677 case 0x1db: /* 0 111 011 011 */ cp1610_clrr(3); break;
2678 case 0x1dc: /* 0 111 011 100 */ cp1610_xorr(3,4); break;
2679 case 0x1dd: /* 0 111 011 101 */ cp1610_xorr(3,5); break;
2680 case 0x1de: /* 0 111 011 110 */ cp1610_xorr(3,6); break;
2681 case 0x1df: /* 0 111 011 111 */ cp1610_xorr(3,7); break;
2682
2683 case 0x1e0: /* 0 111 100 000 */ cp1610_xorr(4,0); break;
2684 case 0x1e1: /* 0 111 100 001 */ cp1610_xorr(4,1); break;
2685 case 0x1e2: /* 0 111 100 010 */ cp1610_xorr(4,2); break;
2686 case 0x1e3: /* 0 111 100 011 */ cp1610_xorr(4,3); break;
2687 case 0x1e4: /* 0 111 100 100 */ cp1610_clrr(4); break;
2688 case 0x1e5: /* 0 111 100 101 */ cp1610_xorr(4,5); break;
2689 case 0x1e6: /* 0 111 100 110 */ cp1610_xorr(4,6); break;
2690 case 0x1e7: /* 0 111 100 111 */ cp1610_xorr(4,7); break;
2691
2692 case 0x1e8: /* 0 111 101 000 */ cp1610_xorr(5,0); break;
2693 case 0x1e9: /* 0 111 101 001 */ cp1610_xorr(5,1); break;
2694 case 0x1ea: /* 0 111 101 010 */ cp1610_xorr(5,2); break;
2695 case 0x1eb: /* 0 111 101 011 */ cp1610_xorr(5,3); break;
2696 case 0x1ec: /* 0 111 101 100 */ cp1610_xorr(5,4); break;
2697 case 0x1ed: /* 0 111 101 101 */ cp1610_clrr(5); break;
2698 case 0x1ee: /* 0 111 101 110 */ cp1610_xorr(5,6); break;
2699 case 0x1ef: /* 0 111 101 111 */ cp1610_xorr(5,7); break;
2700
2701 case 0x1f0: /* 0 111 110 000 */ cp1610_xorr(6,0); break;
2702 case 0x1f1: /* 0 111 110 001 */ cp1610_xorr(6,1); break;
2703 case 0x1f2: /* 0 111 110 010 */ cp1610_xorr(6,2); break;
2704 case 0x1f3: /* 0 111 110 011 */ cp1610_xorr(6,3); break;
2705 case 0x1f4: /* 0 111 110 100 */ cp1610_xorr(6,4); break;
2706 case 0x1f5: /* 0 111 110 101 */ cp1610_xorr(6,5); break;
2707 case 0x1f6: /* 0 111 110 110 */ cp1610_clrr(6); break;
2708 case 0x1f7: /* 0 111 110 111 */ cp1610_xorr(6,7); break;
2709
2710 case 0x1f8: /* 0 111 111 000 */ cp1610_xorr(7,0); break;
2711 case 0x1f9: /* 0 111 111 001 */ cp1610_xorr(7,1); break;
2712 case 0x1fa: /* 0 111 111 010 */ cp1610_xorr(7,2); break;
2713 case 0x1fb: /* 0 111 111 011 */ cp1610_xorr(7,3); break;
2714 case 0x1fc: /* 0 111 111 100 */ cp1610_xorr(7,4); break;
2715 case 0x1fd: /* 0 111 111 101 */ cp1610_xorr(7,5); break;
2716 case 0x1fe: /* 0 111 111 110 */ cp1610_xorr(7,6); break;
2717 case 0x1ff: /* 0 110 111 111 */ cp1610_clrr(7); break;
2718
2719 case 0x200: /* 1 000 000 000 */ cp1610_b(0); break;
2720 case 0x201: /* 1 000 000 001 */ cp1610_bc(0); break; /* aka BLGE */
2721 case 0x202: /* 1 000 000 010 */ cp1610_bov(0); break;
2722 case 0x203: /* 1 000 000 011 */ cp1610_bpl(0); break;
2723 case 0x204: /* 1 000 000 100 */ cp1610_bze(0); break; /* aka BEQ */
2724 case 0x205: /* 1 000 000 101 */ cp1610_blt(0); break;
2725 case 0x206: /* 1 000 000 110 */ cp1610_ble(0); break;
2726 case 0x207: /* 1 000 000 111 */ cp1610_busc(0); break;
2727
2728 case 0x208: /* 1 000 001 000 */ cp1610_nopp(0); break;
2729 case 0x209: /* 1 000 001 001 */ cp1610_bnc(0); break; /* aka BLLT */
2730 case 0x20a: /* 1 000 001 010 */ cp1610_bnov(0); break;
2731 case 0x20b: /* 1 000 001 011 */ cp1610_bmi(0); break;
2732 case 0x20c: /* 1 000 001 100 */ cp1610_bnze(0); break; /* aka BNEQ */
2733 case 0x20d: /* 1 000 001 101 */ cp1610_bge(0); break;
2734 case 0x20e: /* 1 000 001 110 */ cp1610_bgt(0); break;
2735 case 0x20f: /* 1 000 001 111 */ cp1610_besc(0); break;
2736
2737 case 0x210: /* 1 000 010 000 */ cp1610_bext(0,0); break;
2738 case 0x211: /* 1 000 010 001 */ cp1610_bext(1,0); break;
2739 case 0x212: /* 1 000 010 010 */ cp1610_bext(2,0); break;
2740 case 0x213: /* 1 000 010 011 */ cp1610_bext(3,0); break;
2741 case 0x214: /* 1 000 010 100 */ cp1610_bext(4,0); break;
2742 case 0x215: /* 1 000 010 101 */ cp1610_bext(5,0); break;
2743 case 0x216: /* 1 000 010 110 */ cp1610_bext(6,0); break;
2744 case 0x217: /* 1 000 010 111 */ cp1610_bext(7,0); break;
2745
2746 case 0x218: /* 1 000 011 000 */ cp1610_bext(8,0); break;
2747 case 0x219: /* 1 000 011 001 */ cp1610_bext(9,0); break;
2748 case 0x21a: /* 1 000 011 010 */ cp1610_bext(10,0); break;
2749 case 0x21b: /* 1 000 011 011 */ cp1610_bext(11,0); break;
2750 case 0x21c: /* 1 000 011 100 */ cp1610_bext(12,0); break;
2751 case 0x21d: /* 1 000 011 101 */ cp1610_bext(13,0); break;
2752 case 0x21e: /* 1 000 011 110 */ cp1610_bext(14,0); break;
2753 case 0x21f: /* 1 000 011 111 */ cp1610_bext(15,0); break;
2754
2755 case 0x220: /* 1 000 100 000 */ cp1610_b(0xffff); break;
2756 case 0x221: /* 1 000 100 001 */ cp1610_bc(0xffff); break; /* aka BLGE */
2757 case 0x222: /* 1 000 100 010 */ cp1610_bov(0xffff); break;
2758 case 0x223: /* 1 000 100 011 */ cp1610_bpl(0xffff); break;
2759 case 0x224: /* 1 000 100 100 */ cp1610_bze(0xffff); break; /* aka BEQ */
2760 case 0x225: /* 1 000 100 101 */ cp1610_blt(0xffff); break;
2761 case 0x226: /* 1 000 100 110 */ cp1610_ble(0xffff); break;
2762 case 0x227: /* 1 000 100 111 */ cp1610_busc(0xffff); break;
2763
2764 case 0x228: /* 1 000 101 000 */ cp1610_nopp(0xffff); break;
2765 case 0x229: /* 1 000 101 001 */ cp1610_bnc(0xffff); break; /* aka BLLT */
2766 case 0x22a: /* 1 000 101 010 */ cp1610_bnov(0xffff); break;
2767 case 0x22b: /* 1 000 101 011 */ cp1610_bmi(0xffff); break;
2768 case 0x22c: /* 1 000 101 100 */ cp1610_bnze(0xffff); break; /* aka BNEQ */
2769 case 0x22d: /* 1 000 101 101 */ cp1610_bge(0xffff); break;
2770 case 0x22e: /* 1 000 101 110 */ cp1610_bgt(0xffff); break;
2771 case 0x22f: /* 1 000 101 111 */ cp1610_besc(0xffff); break;
2772
2773 case 0x230: /* 1 000 110 000 */ cp1610_bext(0,0xffff); break;
2774 case 0x231: /* 1 000 110 001 */ cp1610_bext(1,0xffff); break;
2775 case 0x232: /* 1 000 110 010 */ cp1610_bext(2,0xffff); break;
2776 case 0x233: /* 1 000 110 011 */ cp1610_bext(3,0xffff); break;
2777 case 0x234: /* 1 000 110 100 */ cp1610_bext(4,0xffff); break;
2778 case 0x235: /* 1 000 110 101 */ cp1610_bext(5,0xffff); break;
2779 case 0x236: /* 1 000 110 110 */ cp1610_bext(6,0xffff); break;
2780 case 0x237: /* 1 000 110 111 */ cp1610_bext(7,0xffff); break;
2781
2782 case 0x238: /* 1 000 111 000 */ cp1610_bext(8,0xffff); break;
2783 case 0x239: /* 1 000 111 001 */ cp1610_bext(9,0xffff); break;
2784 case 0x23a: /* 1 000 111 010 */ cp1610_bext(10,0xffff); break;
2785 case 0x23b: /* 1 000 111 011 */ cp1610_bext(11,0xffff); break;
2786 case 0x23c: /* 1 000 111 100 */ cp1610_bext(12,0xffff); break;
2787 case 0x23d: /* 1 000 111 101 */ cp1610_bext(13,0xffff); break;
2788 case 0x23e: /* 1 000 111 110 */ cp1610_bext(14,0xffff); break;
2789 case 0x23f: /* 1 000 111 111 */ cp1610_bext(15,0xffff); break;
2790
2791 case 0x240: /* 1 001 000 000 */ cp1610_mvo(0); break;
2792 case 0x241: /* 1 001 000 001 */ cp1610_mvo(1); break;
2793 case 0x242: /* 1 001 000 010 */ cp1610_mvo(2); break;
2794 case 0x243: /* 1 001 000 011 */ cp1610_mvo(3); break;
2795 case 0x244: /* 1 001 000 100 */ cp1610_mvo(4); break;
2796 case 0x245: /* 1 001 000 101 */ cp1610_mvo(5); break;
2797 case 0x246: /* 1 001 000 110 */ cp1610_mvo(6); break;
2798 case 0x247: /* 1 001 000 111 */ cp1610_mvo(7); break;
2799
2800 case 0x248: /* 1 001 001 000 */ cp1610_mvoat(0,1); break;
2801 case 0x249: /* 1 001 001 001 */ cp1610_mvoat(1,1); break;
2802 case 0x24a: /* 1 001 001 010 */ cp1610_mvoat(2,1); break;
2803 case 0x24b: /* 1 001 001 011 */ cp1610_mvoat(3,1); break;
2804 case 0x24c: /* 1 001 001 100 */ cp1610_mvoat(4,1); break;
2805 case 0x24d: /* 1 001 001 101 */ cp1610_mvoat(5,1); break;
2806 case 0x24e: /* 1 001 001 110 */ cp1610_mvoat(6,1); break;
2807 case 0x24f: /* 1 001 001 111 */ cp1610_mvoat(7,1); break;
2808
2809 case 0x250: /* 1 001 010 000 */ cp1610_mvoat(0,2); break;
2810 case 0x251: /* 1 001 010 001 */ cp1610_mvoat(1,2); break;
2811 case 0x252: /* 1 001 010 010 */ cp1610_mvoat(2,2); break;
2812 case 0x253: /* 1 001 010 011 */ cp1610_mvoat(3,2); break;
2813 case 0x254: /* 1 001 010 100 */ cp1610_mvoat(4,2); break;
2814 case 0x255: /* 1 001 010 101 */ cp1610_mvoat(5,2); break;
2815 case 0x256: /* 1 001 010 110 */ cp1610_mvoat(6,2); break;
2816 case 0x257: /* 1 001 010 111 */ cp1610_mvoat(7,2); break;
2817
2818 case 0x258: /* 1 001 011 000 */ cp1610_mvoat(0,3); break;
2819 case 0x259: /* 1 001 011 001 */ cp1610_mvoat(1,3); break;
2820 case 0x25a: /* 1 001 011 010 */ cp1610_mvoat(2,3); break;
2821 case 0x25b: /* 1 001 011 011 */ cp1610_mvoat(3,3); break;
2822 case 0x25c: /* 1 001 011 100 */ cp1610_mvoat(4,3); break;
2823 case 0x25d: /* 1 001 011 101 */ cp1610_mvoat(5,3); break;
2824 case 0x25e: /* 1 001 011 110 */ cp1610_mvoat(6,3); break;
2825 case 0x25f: /* 1 001 011 111 */ cp1610_mvoat(7,3); break;
2826
2827 case 0x260: /* 1 001 100 000 */ cp1610_mvoat_i(0,4); break;
2828 case 0x261: /* 1 001 100 001 */ cp1610_mvoat_i(1,4); break;
2829 case 0x262: /* 1 001 100 010 */ cp1610_mvoat_i(2,4); break;
2830 case 0x263: /* 1 001 100 011 */ cp1610_mvoat_i(3,4); break;
2831 case 0x264: /* 1 001 100 100 */ cp1610_mvoat_i(4,4); break;
2832 case 0x265: /* 1 001 100 101 */ cp1610_mvoat_i(5,4); break;
2833 case 0x266: /* 1 001 100 110 */ cp1610_mvoat_i(6,4); break;
2834 case 0x267: /* 1 001 100 111 */ cp1610_mvoat_i(7,4); break;
2835
2836 case 0x268: /* 1 001 101 000 */ cp1610_mvoat_i(0,5); break;
2837 case 0x269: /* 1 001 101 001 */ cp1610_mvoat_i(1,5); break;
2838 case 0x26a: /* 1 001 101 010 */ cp1610_mvoat_i(2,5); break;
2839 case 0x26b: /* 1 001 101 011 */ cp1610_mvoat_i(3,5); break;
2840 case 0x26c: /* 1 001 101 100 */ cp1610_mvoat_i(4,5); break;
2841 case 0x26d: /* 1 001 101 101 */ cp1610_mvoat_i(5,5); break;
2842 case 0x26e: /* 1 001 101 110 */ cp1610_mvoat_i(6,5); break;
2843 case 0x26f: /* 1 001 101 111 */ cp1610_mvoat_i(7,5); break;
2844
2845 case 0x270: /* 1 001 110 000 */ cp1610_mvoat_i(0,6); break; /* pshr */
2846 case 0x271: /* 1 001 110 001 */ cp1610_mvoat_i(1,6); break; /* pshr */
2847 case 0x272: /* 1 001 110 010 */ cp1610_mvoat_i(2,6); break; /* pshr */
2848 case 0x273: /* 1 001 110 011 */ cp1610_mvoat_i(3,6); break; /* pshr */
2849 case 0x274: /* 1 001 110 100 */ cp1610_mvoat_i(4,6); break; /* pshr */
2850 case 0x275: /* 1 001 110 101 */ cp1610_mvoat_i(5,6); break; /* pshr */
2851 case 0x276: /* 1 001 110 110 */ cp1610_mvoat_i(6,6); break; /* pshr */
2852 case 0x277: /* 1 001 110 111 */ cp1610_mvoat_i(7,6); break; /* pshr */
2853
2854 case 0x278: /* 1 001 111 000 */ cp1610_mvoi(0); break;
2855 case 0x279: /* 1 001 111 001 */ cp1610_mvoi(1); break;
2856 case 0x27a: /* 1 001 111 010 */ cp1610_mvoi(2); break;
2857 case 0x27b: /* 1 001 111 011 */ cp1610_mvoi(3); break;
2858 case 0x27c: /* 1 001 111 100 */ cp1610_mvoi(4); break;
2859 case 0x27d: /* 1 001 111 101 */ cp1610_mvoi(5); break;
2860 case 0x27e: /* 1 001 111 110 */ cp1610_mvoi(6); break;
2861 case 0x27f: /* 1 001 111 111 */ cp1610_mvoi(7); break;
2862
2863 case 0x280: /* 1 010 000 000 */ cp1610_mvi(0); break;
2864 case 0x281: /* 1 010 000 001 */ cp1610_mvi(1); break;
2865 case 0x282: /* 1 010 000 010 */ cp1610_mvi(2); break;
2866 case 0x283: /* 1 010 000 011 */ cp1610_mvi(3); break;
2867 case 0x284: /* 1 010 000 100 */ cp1610_mvi(4); break;
2868 case 0x285: /* 1 010 000 101 */ cp1610_mvi(5); break;
2869 case 0x286: /* 1 010 000 110 */ cp1610_mvi(6); break;
2870 case 0x287: /* 1 010 000 111 */ cp1610_mvi(7); break;
2871
2872 case 0x288: /* 1 010 001 000 */ cp1610_mviat(1,0); break;
2873 case 0x289: /* 1 010 001 001 */ cp1610_mviat(1,1); break;
2874 case 0x28a: /* 1 010 001 010 */ cp1610_mviat(1,2); break;
2875 case 0x28b: /* 1 010 001 011 */ cp1610_mviat(1,3); break;
2876 case 0x28c: /* 1 010 001 100 */ cp1610_mviat(1,4); break;
2877 case 0x28d: /* 1 010 001 101 */ cp1610_mviat(1,5); break;
2878 case 0x28e: /* 1 010 001 110 */ cp1610_mviat(1,6); break;
2879 case 0x28f: /* 1 010 001 111 */ cp1610_mviat(1,7); break;
2880
2881 case 0x290: /* 1 010 010 000 */ cp1610_mviat(2,0); break;
2882 case 0x291: /* 1 010 010 001 */ cp1610_mviat(2,1); break;
2883 case 0x292: /* 1 010 010 010 */ cp1610_mviat(2,2); break;
2884 case 0x293: /* 1 010 010 011 */ cp1610_mviat(2,3); break;
2885 case 0x294: /* 1 010 010 100 */ cp1610_mviat(2,4); break;
2886 case 0x295: /* 1 010 010 101 */ cp1610_mviat(2,5); break;
2887 case 0x296: /* 1 010 010 110 */ cp1610_mviat(2,6); break;
2888 case 0x297: /* 1 010 010 111 */ cp1610_mviat(2,7); break;
2889
2890 case 0x298: /* 1 010 011 000 */ cp1610_mviat(3,0); break;
2891 case 0x299: /* 1 010 011 001 */ cp1610_mviat(3,1); break;
2892 case 0x29a: /* 1 010 011 010 */ cp1610_mviat(3,2); break;
2893 case 0x29b: /* 1 010 011 011 */ cp1610_mviat(3,3); break;
2894 case 0x29c: /* 1 010 011 100 */ cp1610_mviat(3,4); break;
2895 case 0x29d: /* 1 010 011 101 */ cp1610_mviat(3,5); break;
2896 case 0x29e: /* 1 010 011 110 */ cp1610_mviat(3,6); break;
2897 case 0x29f: /* 1 010 011 111 */ cp1610_mviat(3,7); break;
2898
2899 case 0x2a0: /* 1 010 100 000 */ cp1610_mviat_i(4,0); break;
2900 case 0x2a1: /* 1 010 100 001 */ cp1610_mviat_i(4,1); break;
2901 case 0x2a2: /* 1 010 100 010 */ cp1610_mviat_i(4,2); break;
2902 case 0x2a3: /* 1 010 100 011 */ cp1610_mviat_i(4,3); break;
2903 case 0x2a4: /* 1 010 100 100 */ cp1610_mviat_i(4,4); break;
2904 case 0x2a5: /* 1 010 100 101 */ cp1610_mviat_i(4,5); break;
2905 case 0x2a6: /* 1 010 100 110 */ cp1610_mviat_i(4,6); break;
2906 case 0x2a7: /* 1 010 100 111 */ cp1610_mviat_i(4,7); break;
2907
2908 case 0x2a8: /* 1 010 101 000 */ cp1610_mviat_i(5,0); break;
2909 case 0x2a9: /* 1 010 101 001 */ cp1610_mviat_i(5,1); break;
2910 case 0x2aa: /* 1 010 101 010 */ cp1610_mviat_i(5,2); break;
2911 case 0x2ab: /* 1 010 101 011 */ cp1610_mviat_i(5,3); break;
2912 case 0x2ac: /* 1 010 101 100 */ cp1610_mviat_i(5,4); break;
2913 case 0x2ad: /* 1 010 101 101 */ cp1610_mviat_i(5,5); break;
2914 case 0x2ae: /* 1 010 101 110 */ cp1610_mviat_i(5,6); break;
2915 case 0x2af: /* 1 010 101 111 */ cp1610_mviat_i(5,7); break;
2916
2917 case 0x2b0: /* 1 010 110 000 */ cp1610_pulr(0); break;
2918 case 0x2b1: /* 1 010 110 001 */ cp1610_pulr(1); break;
2919 case 0x2b2: /* 1 010 110 010 */ cp1610_pulr(2); break;
2920 case 0x2b3: /* 1 010 110 011 */ cp1610_pulr(3); break;
2921 case 0x2b4: /* 1 010 110 100 */ cp1610_pulr(4); break;
2922 case 0x2b5: /* 1 010 110 101 */ cp1610_pulr(5); break;
2923 case 0x2b6: /* 1 010 110 110 */ cp1610_pulr(6); break;
2924 case 0x2b7: /* 1 010 110 111 */ cp1610_pulr(7); break;
2925
2926 case 0x2b8: /* 1 010 111 000 */ cp1610_mvii(0); break;
2927 case 0x2b9: /* 1 010 111 001 */ cp1610_mvii(1); break;
2928 case 0x2ba: /* 1 010 111 010 */ cp1610_mvii(2); break;
2929 case 0x2bb: /* 1 010 111 011 */ cp1610_mvii(3); break;
2930 case 0x2bc: /* 1 010 111 100 */ cp1610_mvii(4); break;
2931 case 0x2bd: /* 1 010 111 101 */ cp1610_mvii(5); break;
2932 case 0x2be: /* 1 010 111 110 */ cp1610_mvii(6); break;
2933 case 0x2bf: /* 1 010 111 111 */ cp1610_mvii(7); break;
2934
2935 case 0x2c0: /* 1 011 000 000 */ cp1610_add(0); break;
2936 case 0x2c1: /* 1 011 000 001 */ cp1610_add(1); break;
2937 case 0x2c2: /* 1 011 000 010 */ cp1610_add(2); break;
2938 case 0x2c3: /* 1 011 000 011 */ cp1610_add(3); break;
2939 case 0x2c4: /* 1 011 000 100 */ cp1610_add(4); break;
2940 case 0x2c5: /* 1 011 000 101 */ cp1610_add(5); break;
2941 case 0x2c6: /* 1 011 000 110 */ cp1610_add(6); break;
2942 case 0x2c7: /* 1 011 000 111 */ cp1610_add(7); break;
2943
2944 case 0x2c8: /* 1 011 001 000 */ cp1610_addat(1,0); break;
2945 case 0x2c9: /* 1 011 001 001 */ cp1610_addat(1,1); break;
2946 case 0x2ca: /* 1 011 001 010 */ cp1610_addat(1,2); break;
2947 case 0x2cb: /* 1 011 001 011 */ cp1610_addat(1,3); break;
2948 case 0x2cc: /* 1 011 001 100 */ cp1610_addat(1,4); break;
2949 case 0x2cd: /* 1 011 001 101 */ cp1610_addat(1,5); break;
2950 case 0x2ce: /* 1 011 001 110 */ cp1610_addat(1,6); break;
2951 case 0x2cf: /* 1 011 001 111 */ cp1610_addat(1,7); break;
2952
2953 case 0x2d0: /* 1 011 010 000 */ cp1610_addat(2,0); break;
2954 case 0x2d1: /* 1 011 010 001 */ cp1610_addat(2,1); break;
2955 case 0x2d2: /* 1 011 010 010 */ cp1610_addat(2,2); break;
2956 case 0x2d3: /* 1 011 010 011 */ cp1610_addat(2,3); break;
2957 case 0x2d4: /* 1 011 010 100 */ cp1610_addat(2,4); break;
2958 case 0x2d5: /* 1 011 010 101 */ cp1610_addat(2,5); break;
2959 case 0x2d6: /* 1 011 010 110 */ cp1610_addat(2,6); break;
2960 case 0x2d7: /* 1 011 010 111 */ cp1610_addat(2,7); break;
2961
2962 case 0x2d8: /* 1 011 011 000 */ cp1610_addat(3,0); break;
2963 case 0x2d9: /* 1 011 011 001 */ cp1610_addat(3,1); break;
2964 case 0x2da: /* 1 011 011 010 */ cp1610_addat(3,2); break;
2965 case 0x2db: /* 1 011 011 011 */ cp1610_addat(3,3); break;
2966 case 0x2dc: /* 1 011 011 100 */ cp1610_addat(3,4); break;
2967 case 0x2dd: /* 1 011 011 101 */ cp1610_addat(3,5); break;
2968 case 0x2de: /* 1 011 011 110 */ cp1610_addat(3,6); break;
2969 case 0x2df: /* 1 011 011 111 */ cp1610_addat(3,7); break;
2970
2971 case 0x2e0: /* 1 011 100 000 */ cp1610_addat_i(4,0); break;
2972 case 0x2e1: /* 1 011 100 001 */ cp1610_addat_i(4,1); break;
2973 case 0x2e2: /* 1 011 100 010 */ cp1610_addat_i(4,2); break;
2974 case 0x2e3: /* 1 011 100 011 */ cp1610_addat_i(4,3); break;
2975 case 0x2e4: /* 1 011 100 100 */ cp1610_addat_i(4,4); break;
2976 case 0x2e5: /* 1 011 100 101 */ cp1610_addat_i(4,5); break;
2977 case 0x2e6: /* 1 011 100 110 */ cp1610_addat_i(4,6); break;
2978 case 0x2e7: /* 1 011 100 111 */ cp1610_addat_i(4,7); break;
2979
2980 case 0x2e8: /* 1 011 101 000 */ cp1610_addat_i(5,0); break;
2981 case 0x2e9: /* 1 011 101 001 */ cp1610_addat_i(5,1); break;
2982 case 0x2ea: /* 1 011 101 010 */ cp1610_addat_i(5,2); break;
2983 case 0x2eb: /* 1 011 101 011 */ cp1610_addat_i(5,3); break;
2984 case 0x2ec: /* 1 011 101 100 */ cp1610_addat_i(5,4); break;
2985 case 0x2ed: /* 1 011 101 101 */ cp1610_addat_i(5,5); break;
2986 case 0x2ee: /* 1 011 101 110 */ cp1610_addat_i(5,6); break;
2987 case 0x2ef: /* 1 011 101 111 */ cp1610_addat_i(5,7); break;
2988
2989 case 0x2f0: /* 1 011 110 000 */ cp1610_addat_d(6,0); break;
2990 case 0x2f1: /* 1 011 110 001 */ cp1610_addat_d(6,1); break;
2991 case 0x2f2: /* 1 011 110 010 */ cp1610_addat_d(6,2); break;
2992 case 0x2f3: /* 1 011 110 011 */ cp1610_addat_d(6,3); break;
2993 case 0x2f4: /* 1 011 110 100 */ cp1610_addat_d(6,4); break;
2994 case 0x2f5: /* 1 011 110 101 */ cp1610_addat_d(6,5); break;
2995 case 0x2f6: /* 1 011 110 110 */ cp1610_addat_d(6,6); break;
2996 case 0x2f7: /* 1 011 110 111 */ cp1610_addat_d(6,7); break;
2997
2998 case 0x2f8: /* 1 011 111 000 */ cp1610_addi(0); break;
2999 case 0x2f9: /* 1 011 111 001 */ cp1610_addi(1); break;
3000 case 0x2fa: /* 1 011 111 010 */ cp1610_addi(2); break;
3001 case 0x2fb: /* 1 011 111 011 */ cp1610_addi(3); break;
3002 case 0x2fc: /* 1 011 111 100 */ cp1610_addi(4); break;
3003 case 0x2fd: /* 1 011 111 101 */ cp1610_addi(5); break;
3004 case 0x2fe: /* 1 011 111 110 */ cp1610_addi(6); break;
3005 case 0x2ff: /* 1 011 111 111 */ cp1610_addi(7); break;
3006
3007 case 0x300: /* 1 100 000 000 */ cp1610_sub(0); break;
3008 case 0x301: /* 1 100 000 001 */ cp1610_sub(1); break;
3009 case 0x302: /* 1 100 000 010 */ cp1610_sub(2); break;
3010 case 0x303: /* 1 100 000 011 */ cp1610_sub(3); break;
3011 case 0x304: /* 1 100 000 100 */ cp1610_sub(4); break;
3012 case 0x305: /* 1 100 000 101 */ cp1610_sub(5); break;
3013 case 0x306: /* 1 100 000 110 */ cp1610_sub(6); break;
3014 case 0x307: /* 1 100 000 111 */ cp1610_sub(7); break;
3015
3016 case 0x308: /* 1 100 001 000 */ cp1610_subat(1,0); break;
3017 case 0x309: /* 1 100 001 001 */ cp1610_subat(1,1); break;
3018 case 0x30a: /* 1 100 001 010 */ cp1610_subat(1,2); break;
3019 case 0x30b: /* 1 100 001 011 */ cp1610_subat(1,3); break;
3020 case 0x30c: /* 1 100 001 100 */ cp1610_subat(1,4); break;
3021 case 0x30d: /* 1 100 001 101 */ cp1610_subat(1,5); break;
3022 case 0x30e: /* 1 100 001 110 */ cp1610_subat(1,6); break;
3023 case 0x30f: /* 1 100 001 111 */ cp1610_subat(1,7); break;
3024
3025 case 0x310: /* 1 100 010 000 */ cp1610_subat(2,0); break;
3026 case 0x311: /* 1 100 010 001 */ cp1610_subat(2,1); break;
3027 case 0x312: /* 1 100 010 010 */ cp1610_subat(2,2); break;
3028 case 0x313: /* 1 100 010 011 */ cp1610_subat(2,3); break;
3029 case 0x314: /* 1 100 010 100 */ cp1610_subat(2,4); break;
3030 case 0x315: /* 1 100 010 101 */ cp1610_subat(2,5); break;
3031 case 0x316: /* 1 100 010 110 */ cp1610_subat(2,6); break;
3032 case 0x317: /* 1 100 010 111 */ cp1610_subat(2,7); break;
3033
3034 case 0x318: /* 1 100 011 000 */ cp1610_subat(3,0); break;
3035 case 0x319: /* 1 100 011 001 */ cp1610_subat(3,1); break;
3036 case 0x31a: /* 1 100 011 010 */ cp1610_subat(3,2); break;
3037 case 0x31b: /* 1 100 011 011 */ cp1610_subat(3,3); break;
3038 case 0x31c: /* 1 100 011 100 */ cp1610_subat(3,4); break;
3039 case 0x31d: /* 1 100 011 101 */ cp1610_subat(3,5); break;
3040 case 0x31e: /* 1 100 011 110 */ cp1610_subat(3,6); break;
3041 case 0x31f: /* 1 100 011 111 */ cp1610_subat(3,7); break;
3042
3043 case 0x320: /* 1 100 100 000 */ cp1610_subat_i(4,0); break;
3044 case 0x321: /* 1 100 100 001 */ cp1610_subat_i(4,1); break;
3045 case 0x322: /* 1 100 100 010 */ cp1610_subat_i(4,2); break;
3046 case 0x323: /* 1 100 100 011 */ cp1610_subat_i(4,3); break;
3047 case 0x324: /* 1 100 100 100 */ cp1610_subat_i(4,4); break;
3048 case 0x325: /* 1 100 100 101 */ cp1610_subat_i(4,5); break;
3049 case 0x326: /* 1 100 100 110 */ cp1610_subat_i(4,6); break;
3050 case 0x327: /* 1 100 100 111 */ cp1610_subat_i(4,7); break;
3051
3052 case 0x328: /* 1 100 101 000 */ cp1610_subat_i(5,0); break;
3053 case 0x329: /* 1 100 101 001 */ cp1610_subat_i(5,1); break;
3054 case 0x32a: /* 1 100 101 010 */ cp1610_subat_i(5,2); break;
3055 case 0x32b: /* 1 100 101 011 */ cp1610_subat_i(5,3); break;
3056 case 0x32c: /* 1 100 101 100 */ cp1610_subat_i(5,4); break;
3057 case 0x32d: /* 1 100 101 101 */ cp1610_subat_i(5,5); break;
3058 case 0x32e: /* 1 100 101 110 */ cp1610_subat_i(5,6); break;
3059 case 0x32f: /* 1 100 101 111 */ cp1610_subat_i(5,7); break;
3060
3061 case 0x330: /* 1 100 110 000 */ cp1610_subat_d(6,0); break;
3062 case 0x331: /* 1 100 110 001 */ cp1610_subat_d(6,1); break;
3063 case 0x332: /* 1 100 110 010 */ cp1610_subat_d(6,2); break;
3064 case 0x333: /* 1 100 110 011 */ cp1610_subat_d(6,3); break;
3065 case 0x334: /* 1 100 110 100 */ cp1610_subat_d(6,4); break;
3066 case 0x335: /* 1 100 110 101 */ cp1610_subat_d(6,5); break;
3067 case 0x336: /* 1 100 110 110 */ cp1610_subat_d(6,6); break;
3068 case 0x337: /* 1 100 110 111 */ cp1610_subat_d(6,7); break;
3069
3070 case 0x338: /* 1 100 111 000 */ cp1610_subi(0); break;
3071 case 0x339: /* 1 100 111 001 */ cp1610_subi(1); break;
3072 case 0x33a: /* 1 100 111 010 */ cp1610_subi(2); break;
3073 case 0x33b: /* 1 100 111 011 */ cp1610_subi(3); break;
3074 case 0x33c: /* 1 100 111 100 */ cp1610_subi(4); break;
3075 case 0x33d: /* 1 100 111 101 */ cp1610_subi(5); break;
3076 case 0x33e: /* 1 100 111 110 */ cp1610_subi(6); break;
3077 case 0x33f: /* 1 100 111 111 */ cp1610_subi(7); break;
3078
3079 case 0x340: /* 1 101 000 000 */ cp1610_cmp(0); break;
3080 case 0x341: /* 1 101 000 001 */ cp1610_cmp(1); break;
3081 case 0x342: /* 1 101 000 010 */ cp1610_cmp(2); break;
3082 case 0x343: /* 1 101 000 011 */ cp1610_cmp(3); break;
3083 case 0x344: /* 1 101 000 100 */ cp1610_cmp(4); break;
3084 case 0x345: /* 1 101 000 101 */ cp1610_cmp(5); break;
3085 case 0x346: /* 1 101 000 110 */ cp1610_cmp(6); break;
3086 case 0x347: /* 1 101 000 111 */ cp1610_cmp(7); break;
3087
3088 case 0x348: /* 1 101 001 000 */ cp1610_cmpat(1,0); break;
3089 case 0x349: /* 1 101 001 001 */ cp1610_cmpat(1,1); break;
3090 case 0x34a: /* 1 101 001 010 */ cp1610_cmpat(1,2); break;
3091 case 0x34b: /* 1 101 001 011 */ cp1610_cmpat(1,3); break;
3092 case 0x34c: /* 1 101 001 100 */ cp1610_cmpat(1,4); break;
3093 case 0x34d: /* 1 101 001 101 */ cp1610_cmpat(1,5); break;
3094 case 0x34e: /* 1 101 001 110 */ cp1610_cmpat(1,6); break;
3095 case 0x34f: /* 1 101 001 111 */ cp1610_cmpat(1,7); break;
3096
3097 case 0x350: /* 1 101 010 000 */ cp1610_cmpat(2,0); break;
3098 case 0x351: /* 1 101 010 001 */ cp1610_cmpat(2,1); break;
3099 case 0x352: /* 1 101 010 010 */ cp1610_cmpat(2,2); break;
3100 case 0x353: /* 1 101 010 011 */ cp1610_cmpat(2,3); break;
3101 case 0x354: /* 1 101 010 100 */ cp1610_cmpat(2,4); break;
3102 case 0x355: /* 1 101 010 101 */ cp1610_cmpat(2,5); break;
3103 case 0x356: /* 1 101 010 110 */ cp1610_cmpat(2,6); break;
3104 case 0x357: /* 1 101 010 111 */ cp1610_cmpat(2,7); break;
3105
3106 case 0x358: /* 1 101 011 000 */ cp1610_cmpat(3,0); break;
3107 case 0x359: /* 1 101 011 001 */ cp1610_cmpat(3,1); break;
3108 case 0x35a: /* 1 101 011 010 */ cp1610_cmpat(3,2); break;
3109 case 0x35b: /* 1 101 011 011 */ cp1610_cmpat(3,3); break;
3110 case 0x35c: /* 1 101 011 100 */ cp1610_cmpat(3,4); break;
3111 case 0x35d: /* 1 101 011 101 */ cp1610_cmpat(3,5); break;
3112 case 0x35e: /* 1 101 011 110 */ cp1610_cmpat(3,6); break;
3113 case 0x35f: /* 1 101 011 111 */ cp1610_cmpat(3,7); break;
3114
3115 case 0x360: /* 1 101 100 000 */ cp1610_cmpat_i(4,0); break;
3116 case 0x361: /* 1 101 100 001 */ cp1610_cmpat_i(4,1); break;
3117 case 0x362: /* 1 101 100 010 */ cp1610_cmpat_i(4,2); break;
3118 case 0x363: /* 1 101 100 011 */ cp1610_cmpat_i(4,3); break;
3119 case 0x364: /* 1 101 100 100 */ cp1610_cmpat_i(4,4); break;
3120 case 0x365: /* 1 101 100 101 */ cp1610_cmpat_i(4,5); break;
3121 case 0x366: /* 1 101 100 110 */ cp1610_cmpat_i(4,6); break;
3122 case 0x367: /* 1 101 100 111 */ cp1610_cmpat_i(4,7); break;
3123
3124 case 0x368: /* 1 101 101 000 */ cp1610_cmpat_i(5,0); break;
3125 case 0x369: /* 1 101 101 001 */ cp1610_cmpat_i(5,1); break;
3126 case 0x36a: /* 1 101 101 010 */ cp1610_cmpat_i(5,2); break;
3127 case 0x36b: /* 1 101 101 011 */ cp1610_cmpat_i(5,3); break;
3128 case 0x36c: /* 1 101 101 100 */ cp1610_cmpat_i(5,4); break;
3129 case 0x36d: /* 1 101 101 101 */ cp1610_cmpat_i(5,5); break;
3130 case 0x36e: /* 1 101 101 110 */ cp1610_cmpat_i(5,6); break;
3131 case 0x36f: /* 1 101 101 111 */ cp1610_cmpat_i(5,7); break;
3132
3133 case 0x370: /* 1 101 110 000 */ cp1610_cmpat_d(6,0); break;
3134 case 0x371: /* 1 101 110 001 */ cp1610_cmpat_d(6,1); break;
3135 case 0x372: /* 1 101 110 010 */ cp1610_cmpat_d(6,2); break;
3136 case 0x373: /* 1 101 110 011 */ cp1610_cmpat_d(6,3); break;
3137 case 0x374: /* 1 101 110 100 */ cp1610_cmpat_d(6,4); break;
3138 case 0x375: /* 1 101 110 101 */ cp1610_cmpat_d(6,5); break;
3139 case 0x376: /* 1 101 110 110 */ cp1610_cmpat_d(6,6); break;
3140 case 0x377: /* 1 101 110 111 */ cp1610_cmpat_d(6,7); break;
3141
3142 case 0x378: /* 1 101 111 000 */ cp1610_cmpi(0); break;
3143 case 0x379: /* 1 101 111 001 */ cp1610_cmpi(1); break;
3144 case 0x37a: /* 1 101 111 010 */ cp1610_cmpi(2); break;
3145 case 0x37b: /* 1 101 111 011 */ cp1610_cmpi(3); break;
3146 case 0x37c: /* 1 101 111 100 */ cp1610_cmpi(4); break;
3147 case 0x37d: /* 1 101 111 101 */ cp1610_cmpi(5); break;
3148 case 0x37e: /* 1 101 111 110 */ cp1610_cmpi(6); break;
3149 case 0x37f: /* 1 101 111 111 */ cp1610_cmpi(7); break;
3150
3151 case 0x380: /* 1 110 000 000 */ cp1610_and(0); break;
3152 case 0x381: /* 1 110 000 001 */ cp1610_and(1); break;
3153 case 0x382: /* 1 110 000 010 */ cp1610_and(2); break;
3154 case 0x383: /* 1 110 000 011 */ cp1610_and(3); break;
3155 case 0x384: /* 1 110 000 100 */ cp1610_and(4); break;
3156 case 0x385: /* 1 110 000 101 */ cp1610_and(5); break;
3157 case 0x386: /* 1 110 000 110 */ cp1610_and(6); break;
3158 case 0x387: /* 1 110 000 111 */ cp1610_and(7); break;
3159
3160 case 0x388: /* 1 110 001 000 */ cp1610_andat(1,0); break;
3161 case 0x389: /* 1 110 001 001 */ cp1610_andat(1,1); break;
3162 case 0x38a: /* 1 110 001 010 */ cp1610_andat(1,2); break;
3163 case 0x38b: /* 1 110 001 011 */ cp1610_andat(1,3); break;
3164 case 0x38c: /* 1 110 001 100 */ cp1610_andat(1,4); break;
3165 case 0x38d: /* 1 110 001 101 */ cp1610_andat(1,5); break;
3166 case 0x38e: /* 1 110 001 110 */ cp1610_andat(1,6); break;
3167 case 0x38f: /* 1 110 001 111 */ cp1610_andat(1,7); break;
3168
3169 case 0x390: /* 1 110 010 000 */ cp1610_andat(2,0); break;
3170 case 0x391: /* 1 110 010 001 */ cp1610_andat(2,1); break;
3171 case 0x392: /* 1 110 010 010 */ cp1610_andat(2,2); break;
3172 case 0x393: /* 1 110 010 011 */ cp1610_andat(2,3); break;
3173 case 0x394: /* 1 110 010 100 */ cp1610_andat(2,4); break;
3174 case 0x395: /* 1 110 010 101 */ cp1610_andat(2,5); break;
3175 case 0x396: /* 1 110 010 110 */ cp1610_andat(2,6); break;
3176 case 0x397: /* 1 110 010 111 */ cp1610_andat(2,7); break;
3177
3178 case 0x398: /* 1 110 011 000 */ cp1610_andat(3,0); break;
3179 case 0x399: /* 1 110 011 001 */ cp1610_andat(3,1); break;
3180 case 0x39a: /* 1 110 011 010 */ cp1610_andat(3,2); break;
3181 case 0x39b: /* 1 110 011 011 */ cp1610_andat(3,3); break;
3182 case 0x39c: /* 1 110 011 100 */ cp1610_andat(3,4); break;
3183 case 0x39d: /* 1 110 011 101 */ cp1610_andat(3,5); break;
3184 case 0x39e: /* 1 110 011 110 */ cp1610_andat(3,6); break;
3185 case 0x39f: /* 1 110 011 111 */ cp1610_andat(3,7); break;
3186
3187 case 0x3a0: /* 1 110 100 000 */ cp1610_andat_i(4,0); break;
3188 case 0x3a1: /* 1 110 100 001 */ cp1610_andat_i(4,1); break;
3189 case 0x3a2: /* 1 110 100 010 */ cp1610_andat_i(4,2); break;
3190 case 0x3a3: /* 1 110 100 011 */ cp1610_andat_i(4,3); break;
3191 case 0x3a4: /* 1 110 100 100 */ cp1610_andat_i(4,4); break;
3192 case 0x3a5: /* 1 110 100 101 */ cp1610_andat_i(4,5); break;
3193 case 0x3a6: /* 1 110 100 110 */ cp1610_andat_i(4,6); break;
3194 case 0x3a7: /* 1 110 100 111 */ cp1610_andat_i(4,7); break;
3195
3196 case 0x3a8: /* 1 110 101 000 */ cp1610_andat_i(5,0); break;
3197 case 0x3a9: /* 1 110 101 001 */ cp1610_andat_i(5,1); break;
3198 case 0x3aa: /* 1 110 101 010 */ cp1610_andat_i(5,2); break;
3199 case 0x3ab: /* 1 110 101 011 */ cp1610_andat_i(5,3); break;
3200 case 0x3ac: /* 1 110 101 100 */ cp1610_andat_i(5,4); break;
3201 case 0x3ad: /* 1 110 101 101 */ cp1610_andat_i(5,5); break;
3202 case 0x3ae: /* 1 110 101 110 */ cp1610_andat_i(5,6); break;
3203 case 0x3af: /* 1 110 101 111 */ cp1610_andat_i(5,7); break;
3204
3205 case 0x3b0: /* 1 110 110 000 */ cp1610_andat_d(6,0); break;
3206 case 0x3b1: /* 1 110 110 001 */ cp1610_andat_d(6,1); break;
3207 case 0x3b2: /* 1 110 110 010 */ cp1610_andat_d(6,2); break;
3208 case 0x3b3: /* 1 110 110 011 */ cp1610_andat_d(6,3); break;
3209 case 0x3b4: /* 1 110 110 100 */ cp1610_andat_d(6,4); break;
3210 case 0x3b5: /* 1 110 110 101 */ cp1610_andat_d(6,5); break;
3211 case 0x3b6: /* 1 110 110 110 */ cp1610_andat_d(6,6); break;
3212 case 0x3b7: /* 1 110 110 111 */ cp1610_andat_d(6,7); break;
3213
3214 case 0x3b8: /* 1 110 111 000 */ cp1610_andi(0); break;
3215 case 0x3b9: /* 1 110 111 001 */ cp1610_andi(1); break;
3216 case 0x3ba: /* 1 110 111 010 */ cp1610_andi(2); break;
3217 case 0x3bb: /* 1 110 111 011 */ cp1610_andi(3); break;
3218 case 0x3bc: /* 1 110 111 100 */ cp1610_andi(4); break;
3219 case 0x3bd: /* 1 110 111 101 */ cp1610_andi(5); break;
3220 case 0x3be: /* 1 110 111 110 */ cp1610_andi(6); break;
3221 case 0x3bf: /* 1 110 111 111 */ cp1610_andi(7); break;
3222
3223 case 0x3c0: /* 1 111 000 000 */ cp1610_xor(0); break;
3224 case 0x3c1: /* 1 111 000 001 */ cp1610_xor(1); break;
3225 case 0x3c2: /* 1 111 000 010 */ cp1610_xor(2); break;
3226 case 0x3c3: /* 1 111 000 011 */ cp1610_xor(3); break;
3227 case 0x3c4: /* 1 111 000 100 */ cp1610_xor(4); break;
3228 case 0x3c5: /* 1 111 000 101 */ cp1610_xor(5); break;
3229 case 0x3c6: /* 1 111 000 110 */ cp1610_xor(6); break;
3230 case 0x3c7: /* 1 111 000 111 */ cp1610_xor(7); break;
3231
3232 case 0x3c8: /* 1 111 001 000 */ cp1610_xorat(1,0); break;
3233 case 0x3c9: /* 1 111 001 001 */ cp1610_xorat(1,1); break;
3234 case 0x3ca: /* 1 111 001 010 */ cp1610_xorat(1,2); break;
3235 case 0x3cb: /* 1 111 001 011 */ cp1610_xorat(1,3); break;
3236 case 0x3cc: /* 1 111 001 100 */ cp1610_xorat(1,4); break;
3237 case 0x3cd: /* 1 111 001 101 */ cp1610_xorat(1,5); break;
3238 case 0x3ce: /* 1 111 001 110 */ cp1610_xorat(1,6); break;
3239 case 0x3cf: /* 1 111 001 111 */ cp1610_xorat(1,7); break;
3240
3241 case 0x3d0: /* 1 111 010 000 */ cp1610_xorat(2,0); break;
3242 case 0x3d1: /* 1 111 010 001 */ cp1610_xorat(2,1); break;
3243 case 0x3d2: /* 1 111 010 010 */ cp1610_xorat(2,2); break;
3244 case 0x3d3: /* 1 111 010 011 */ cp1610_xorat(2,3); break;
3245 case 0x3d4: /* 1 111 010 100 */ cp1610_xorat(2,4); break;
3246 case 0x3d5: /* 1 111 010 101 */ cp1610_xorat(2,5); break;
3247 case 0x3d6: /* 1 111 010 110 */ cp1610_xorat(2,6); break;
3248 case 0x3d7: /* 1 111 010 111 */ cp1610_xorat(2,7); break;
3249
3250 case 0x3d8: /* 1 111 011 000 */ cp1610_xorat(3,0); break;
3251 case 0x3d9: /* 1 111 011 001 */ cp1610_xorat(3,1); break;
3252 case 0x3da: /* 1 111 011 010 */ cp1610_xorat(3,2); break;
3253 case 0x3db: /* 1 111 011 011 */ cp1610_xorat(3,3); break;
3254 case 0x3dc: /* 1 111 011 100 */ cp1610_xorat(3,4); break;
3255 case 0x3dd: /* 1 111 011 101 */ cp1610_xorat(3,5); break;
3256 case 0x3de: /* 1 111 011 110 */ cp1610_xorat(3,6); break;
3257 case 0x3df: /* 1 111 011 111 */ cp1610_xorat(3,7); break;
3258
3259 case 0x3e0: /* 1 111 100 000 */ cp1610_xorat_i(4,0); break;
3260 case 0x3e1: /* 1 111 100 001 */ cp1610_xorat_i(4,1); break;
3261 case 0x3e2: /* 1 111 100 010 */ cp1610_xorat_i(4,2); break;
3262 case 0x3e3: /* 1 111 100 011 */ cp1610_xorat_i(4,3); break;
3263 case 0x3e4: /* 1 111 100 100 */ cp1610_xorat_i(4,4); break;
3264 case 0x3e5: /* 1 111 100 101 */ cp1610_xorat_i(4,5); break;
3265 case 0x3e6: /* 1 111 100 110 */ cp1610_xorat_i(4,6); break;
3266 case 0x3e7: /* 1 111 100 111 */ cp1610_xorat_i(4,7); break;
3267
3268 case 0x3e8: /* 1 111 101 000 */ cp1610_xorat_i(5,0); break;
3269 case 0x3e9: /* 1 111 101 001 */ cp1610_xorat_i(5,1); break;
3270 case 0x3ea: /* 1 111 101 010 */ cp1610_xorat_i(5,2); break;
3271 case 0x3eb: /* 1 111 101 011 */ cp1610_xorat_i(5,3); break;
3272 case 0x3ec: /* 1 111 101 100 */ cp1610_xorat_i(5,4); break;
3273 case 0x3ed: /* 1 111 101 101 */ cp1610_xorat_i(5,5); break;
3274 case 0x3ee: /* 1 111 101 110 */ cp1610_xorat_i(5,6); break;
3275 case 0x3ef: /* 1 111 101 111 */ cp1610_xorat_i(5,7); break;
3276
3277 case 0x3f0: /* 1 111 110 000 */ cp1610_xorat_d(6,0); break;
3278 case 0x3f1: /* 1 111 110 001 */ cp1610_xorat_d(6,1); break;
3279 case 0x3f2: /* 1 111 110 010 */ cp1610_xorat_d(6,2); break;
3280 case 0x3f3: /* 1 111 110 011 */ cp1610_xorat_d(6,3); break;
3281 case 0x3f4: /* 1 111 110 100 */ cp1610_xorat_d(6,4); break;
3282 case 0x3f5: /* 1 111 110 101 */ cp1610_xorat_d(6,5); break;
3283 case 0x3f6: /* 1 111 110 110 */ cp1610_xorat_d(6,6); break;
3284 case 0x3f7: /* 1 111 110 111 */ cp1610_xorat_d(6,7); break;
3285
3286 case 0x3f8: /* 1 111 111 000 */ cp1610_xori(0); break;
3287 case 0x3f9: /* 1 111 111 001 */ cp1610_xori(1); break;
3288 case 0x3fa: /* 1 111 111 010 */ cp1610_xori(2); break;
3289 case 0x3fb: /* 1 111 111 011 */ cp1610_xori(3); break;
3290 case 0x3fc: /* 1 111 111 100 */ cp1610_xori(4); break;
3291 case 0x3fd: /* 1 111 111 101 */ cp1610_xori(5); break;
3292 case 0x3fe: /* 1 111 111 110 */ cp1610_xori(6); break;
3293 case 0x3ff: /* 1 111 111 111 */ cp1610_xori(7); break;
3294 }
3295
3296 if (!m_mask_interrupts)
3297 {
3298 if (m_reset_pending)
3299 {
3300 m_reset_pending = false;
3301 m_r[7] = m_read_iab();
3302 }
3303 else if (m_intr_pending)
3304 {
3305 /* PSHR R7 */
3306 standard_irq_callback(CP1610_INT_INTR);
3307 m_write_intak(m_r[6]);
3308 cp1610_writemem16(m_r[6],m_r[7]);
3309 m_r[6]++;
3310 m_icount -= 9;
3311 m_intr_pending = false;
3312 m_r[7] = m_read_iab();
3313 }
3314 else if (m_intrm_pending && m_intr_enabled)
3315 {
3316 /* PSHR R7 */
3317 standard_irq_callback(CP1610_INT_INTRM);
3318 m_write_intak(m_r[6]);
3319 cp1610_writemem16(m_r[6],m_r[7]);
3320 m_r[6]++;
3321 m_icount -= 9;
3322 m_intrm_pending = false;
3323 m_r[7] = m_read_iab();
3324 }
3325 }
3326
3327 } while( m_icount > 0 );
3328 }
3329
3330
device_start()3331 void cp1610_cpu_device::device_start()
3332 {
3333 m_read_bext.resolve_safe(0);
3334 m_read_iab.resolve_safe(0);
3335 m_write_intak.resolve_safe();
3336 m_intr_enabled = false;
3337 m_reset_pending = false;
3338 m_intr_pending = false;
3339 m_intrm_pending = false;
3340 m_flags = 0;
3341 std::fill(std::begin(m_r), std::end(m_r), 0x0000);
3342
3343 m_program = &space(AS_PROGRAM);
3344
3345 save_item(NAME(m_r));
3346 save_item(NAME(m_flags));
3347 save_item(NAME(m_intr_enabled));
3348 save_item(NAME(m_intr_state));
3349 save_item(NAME(m_intrm_state));
3350 save_item(NAME(m_reset_pending));
3351 save_item(NAME(m_intr_pending));
3352 save_item(NAME(m_intrm_pending));
3353 save_item(NAME(m_mask_interrupts));
3354
3355 // Register state for debugger
3356 state_add( CP1610_R0, "R0", m_r[0] ).formatstr("%04X");
3357 state_add( CP1610_R1, "R1", m_r[1] ).formatstr("%04X");
3358 state_add( CP1610_R2, "R2", m_r[2] ).formatstr("%04X");
3359 state_add( CP1610_R3, "R3", m_r[3] ).formatstr("%04X");
3360 state_add( CP1610_R4, "R4", m_r[4] ).formatstr("%04X");
3361 state_add( CP1610_R5, "R5", m_r[5] ).formatstr("%04X");
3362 state_add( CP1610_R6, "R6", m_r[6] ).formatstr("%04X");
3363 state_add( CP1610_R7, "R7", m_r[7] ).formatstr("%04X");
3364 state_add( STATE_GENPC, "GENPC", m_r[7] ).noshow();
3365 state_add( STATE_GENPCBASE, "CURPC", m_r[7]).noshow();
3366 state_add( STATE_GENFLAGS, "GENFLAGS", m_flags ).noshow();
3367
3368 set_icountptr(m_icount);
3369 }
3370
device_reset()3371 void cp1610_cpu_device::device_reset()
3372 {
3373 /* This is how we set the reset vector */
3374 m_reset_pending = true;
3375 }
3376
execute_set_input(int irqline,int state)3377 void cp1610_cpu_device::execute_set_input(int irqline, int state)
3378 {
3379 switch(irqline)
3380 {
3381 case CP1610_INT_INTRM:
3382 m_intrm_pending = (state == ASSERT_LINE);
3383 m_intrm_state = state;
3384 break;
3385 case CP1610_INT_INTR:
3386 if (state == ASSERT_LINE)
3387 m_intr_pending = true;
3388 m_intr_state = state;
3389 break;
3390 }
3391 }
3392
3393
cp1610_cpu_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)3394 cp1610_cpu_device::cp1610_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
3395 : cpu_device(mconfig, CP1610, tag, owner, clock)
3396 , m_program_config("program", ENDIANNESS_BIG, 16, 16, -1)
3397 , m_intr_state(0)
3398 , m_intrm_state(0)
3399 , m_read_bext(*this)
3400 , m_read_iab(*this)
3401 , m_write_intak(*this)
3402 {
3403 }
3404
memory_space_config() const3405 device_memory_interface::space_config_vector cp1610_cpu_device::memory_space_config() const
3406 {
3407 return space_config_vector {
3408 std::make_pair(AS_PROGRAM, &m_program_config)
3409 };
3410 }
3411
state_string_export(const device_state_entry & entry,std::string & str) const3412 void cp1610_cpu_device::state_string_export(const device_state_entry &entry, std::string &str) const
3413 {
3414 switch (entry.index())
3415 {
3416 case STATE_GENFLAGS:
3417 str = string_format("%c%c%c%c",
3418 m_flags & 0x80 ? 'S':'.',
3419 m_flags & 0x40 ? 'Z':'.',
3420 m_flags & 0x20 ? 'V':'.',
3421 m_flags & 0x10 ? 'C':'.');
3422 break;
3423 }
3424 }
3425
create_disassembler()3426 std::unique_ptr<util::disasm_interface> cp1610_cpu_device::create_disassembler()
3427 {
3428 return std::make_unique<cp1610_disassembler>();
3429 }
3430