1 // license:BSD-3-Clause
2 // copyright-holders:Curt Coder
3 /*
4
5 Wave Mate Bullet
6
7 PCB Layout
8 ----------
9
10 |-------------------------------------------|
11 | CN7 CN6 |
12 | PIO |
13 | FDC |
14 | 4164 4164 CN5 |
15 | 4164 4164 SW1 CN2|
16 | 4164 4164 |
17 | 4164 4164 PROM |
18 | 4164 4164 4.9152MHz |
19 | 4164 4164 16MHz DMA CPU |
20 | 4164 4164 |
21 | 4164 4164 CN4 CN3 CN1|
22 | |
23 | DART CTC |
24 | CN8 |
25 |-------------------------------------------|
26
27 Notes:
28 Relevant IC's shown.
29
30 CPU - SGS Z80ACPUB1 Z80A CPU
31 DMA - Zilog Z8410APS Z80A DMA
32 PIO - SGS Z80APIOB1 Z80A PIO
33 DART - Zilog Z8470APS Z80A DART
34 CTC - Zilog Z8430APS Z80A CTC
35 FDC - Synertek SY1793-02 FDC
36 PROM - AMD AM27S190C 32x8 TTL PROM
37 4164 - Fujitsu MB8264-15 64Kx1 RAM
38 CN1 - 2x25 PCB header, external DMA bus
39 CN2 - 2x17 PCB header, Winchester / 2x25 header, SCSI (in board revision E)
40 CN3 - 2x5 PCB header, RS-232 A (system console)
41 CN4 - 2x5 PCB header, RS-232 B
42 CN5 - 2x17 PCB header, Centronics
43 CN6 - 2x25 PCB header, 8" floppy drives
44 CN7 - 2x17 PCB header, 5.25" floppy drives
45 CN8 - 4-pin Molex
46
47 */
48
49 /*
50
51 TODO:
52
53 - memory banking is broken
54 - z80dart wait/ready
55 - IMI 7710 Winchester controller
56 chdman createhd -o imi7710.chd -chs 350,3,10 -ss 1024
57 - revision E model
58
59 */
60
61 #include "emu.h"
62 #include "includes/bullet.h"
63
64 #include "bus/rs232/rs232.h"
65 #include "bus/scsi/scsihd.h"
66 #include "softlist.h"
67
68
69 //**************************************************************************
70 // MACROS / CONSTANTS
71 //**************************************************************************
72
73 // DMA ready sources
74 enum
75 {
76 FDRDY = 0,
77 DARTARDY,
78 DARTBRDY,
79 WINRDY,
80 EXRDY1,
81 EXRDY2
82 };
83
84 #define SEG0 \
85 BIT(m_mbank, 0)
86
87 #define SEG5 \
88 BIT(m_mbank, 5)
89
90 #define DMB4 \
91 BIT(m_xdma0, 4)
92
93 #define DMB6 \
94 BIT(m_xdma0, 6)
95
96
97
98 //**************************************************************************
99 // READ/WRITE HANDLERS
100 //**************************************************************************
101
102 //-------------------------------------------------
103 // mreq_r -
104 //-------------------------------------------------
105
mreq_r(offs_t offset)106 uint8_t bullet_state::mreq_r(offs_t offset)
107 {
108 uint8_t data = 0;
109
110 if (!m_brom && !BIT(offset, 5))
111 {
112 data = m_rom->base()[offset & 0x1f];
113 }
114 else
115 {
116 if (offset < 0xc000)
117 {
118 data = m_ram->pointer()[(m_segst << 16) | offset];
119 }
120 else
121 {
122 data = m_ram->pointer()[offset];
123 }
124 }
125
126 return data;
127 }
128
129
130 //-------------------------------------------------
131 // mreq_w -
132 //-------------------------------------------------
133
mreq_w(offs_t offset,uint8_t data)134 void bullet_state::mreq_w(offs_t offset, uint8_t data)
135 {
136 if (offset < 0xc000)
137 {
138 m_ram->pointer()[(m_segst << 16) | offset] = data;
139 }
140 else
141 {
142 m_ram->pointer()[offset] = data;
143 }
144 }
145
146
147 //-------------------------------------------------
148 // win_r -
149 //-------------------------------------------------
150
win_r()151 uint8_t bullet_state::win_r()
152 {
153 return 0;
154 }
155
156
157 //-------------------------------------------------
158 // wstrobe_w -
159 //-------------------------------------------------
160
wstrobe_w(uint8_t data)161 void bullet_state::wstrobe_w(uint8_t data)
162 {
163 }
164
165
166 //-------------------------------------------------
167 // brom_r -
168 //-------------------------------------------------
169
brom_r()170 uint8_t bullet_state::brom_r()
171 {
172 m_brom = 1;
173
174 return 0;
175 }
176
177
178 //-------------------------------------------------
179 // brom_w -
180 //-------------------------------------------------
181
brom_w(uint8_t data)182 void bullet_state::brom_w(uint8_t data)
183 {
184 m_brom = 1;
185 }
186
187
188 //-------------------------------------------------
189 // exdsk_w -
190 //-------------------------------------------------
191
exdsk_w(uint8_t data)192 void bullet_state::exdsk_w(uint8_t data)
193 {
194 /*
195
196 bit signal description
197
198 0 drive select 0
199 1 drive select 1
200 2 select 8" floppy
201 3 MSE select software control of port
202 4 SIDE select side 2
203 5 _MOTOR disable 5" floppy spindle motors
204 6
205 7 WPRC enable write precompensation
206
207 */
208
209 if (BIT(data, 3))
210 {
211 m_exdsk_sw = true;
212 }
213
214 if (m_exdsk_sw)
215 {
216 // drive select
217 m_floppy = nullptr;
218
219 switch (data & 0x07)
220 {
221 // 5.25"
222 case 0: m_floppy = m_floppy0->get_device(); break;
223 case 1: m_floppy = m_floppy1->get_device(); break;
224 case 2: m_floppy = m_floppy2->get_device(); break;
225 case 3: m_floppy = m_floppy3->get_device(); break;
226 // 8"
227 case 4: m_floppy = m_floppy4->get_device(); break;
228 case 5: m_floppy = m_floppy5->get_device(); break;
229 case 6: m_floppy = m_floppy6->get_device(); break;
230 case 7: m_floppy = m_floppy7->get_device(); break;
231 }
232
233 m_fdc->set_floppy(m_floppy);
234 }
235
236 if (m_floppy)
237 {
238 // side select
239 m_floppy->ss_w(BIT(data, 4));
240
241 // floppy motor
242 m_floppy->mon_w(BIT(data, 5));
243 }
244 }
245
246
247 //-------------------------------------------------
248 // exdma_w -
249 //-------------------------------------------------
250
exdma_w(uint8_t data)251 void bullet_state::exdma_w(uint8_t data)
252 {
253 /*
254
255 bit description
256
257 0 DMA ready source select 0
258 1 DMA ready source select 1
259 2 DMA ready source select 2
260 3 memory control 0
261 4 memory control 1
262 5
263 6
264 7
265
266 */
267
268 m_exdma = data;
269
270 m_buf = BIT(data, 3);
271
272 update_dma_rdy();
273 }
274
275
276 //-------------------------------------------------
277 // hdcon_w -
278 //-------------------------------------------------
279
hdcon_w(uint8_t data)280 void bullet_state::hdcon_w(uint8_t data)
281 {
282 /*
283
284 bit signal description
285
286 0 PLO phase lock oscillator
287 1 RCD read clock frequency
288 2 EXC MB8877 clock frequency
289 3 DEN MB8877 density select
290 4 enable software control of mode
291 5
292 6
293 7
294
295 */
296
297 if (BIT(data, 4))
298 {
299 m_hdcon_sw = true;
300 }
301
302 if (m_hdcon_sw)
303 {
304 // FDC clock
305 m_fdc->set_unscaled_clock(16_MHz_XTAL / (BIT(data, 2) ? 16 : 8));
306
307 // density select
308 m_fdc->dden_w(BIT(data, 3));
309 }
310 }
311
312
313 //-------------------------------------------------
314 // info_r -
315 //-------------------------------------------------
316
info_r()317 uint8_t bullet_state::info_r()
318 {
319 /*
320
321 bit signal description
322
323 0 SW1 DIP switch 1
324 1 SW2 DIP switch 2
325 2 SW3 DIP switch 3
326 3 SW4 DIP switch 4
327 4 HLDST floppy disk head load status
328 5 *XDCG floppy disk exchange (8" only)
329 6 FDIRQ FDC interrupt request line
330 7 FDDRQ FDC data request line
331
332 */
333
334 uint8_t data = 0;
335
336 // DIP switches
337 data |= m_sw1->read() & 0x0f;
338
339 // floppy
340 data |= m_fdc->hld_r() << 4;
341 data |= (m_floppy ? m_floppy->dskchg_r() : 1) << 5;
342 data |= m_fdc->intrq_r() << 6;
343 data |= m_fdc->drq_r() << 7;
344
345 return data;
346 }
347
348
349 //-------------------------------------------------
350 // segst_w -
351 //-------------------------------------------------
352
segst_w(uint8_t data)353 void bullet_state::segst_w(uint8_t data)
354 {
355 m_segst = BIT(data, 0);
356 }
357
358
359 //-------------------------------------------------
360 // mreq_r -
361 //-------------------------------------------------
362
mreq_r(offs_t offset)363 uint8_t bulletf_state::mreq_r(offs_t offset)
364 {
365 uint8_t data = 0;
366
367 if (!m_rome && !BIT(offset, 5))
368 {
369 data = m_rom->base()[offset & 0x1f];
370 }
371 else
372 {
373 if (offset < 0xc000)
374 {
375 if (!SEG5)
376 {
377 data = m_ram->pointer()[(SEG0 << 16) | offset];
378 }
379 else if (offset >= 0x8000)
380 {
381 data = m_ram->pointer()[0x1c000 + (offset - 0x8000)];
382 }
383 }
384 else
385 {
386 data = m_ram->pointer()[offset];
387 }
388 }
389
390 return data;
391 }
392
393
394 //-------------------------------------------------
395 // mreq_w -
396 //-------------------------------------------------
397
mreq_w(offs_t offset,uint8_t data)398 void bulletf_state::mreq_w(offs_t offset, uint8_t data)
399 {
400 if (offset < 0xc000)
401 {
402 if (!SEG5)
403 {
404 m_ram->pointer()[(SEG0 << 16) | offset] = data;
405 }
406 else if (offset >= 0x8000)
407 {
408 m_ram->pointer()[0x1c000 + (offset - 0x8000)] = data;
409 }
410 }
411 else
412 {
413 m_ram->pointer()[offset] = data;
414 }
415 }
416
417
418 //-------------------------------------------------
419 // xdma0_w -
420 //-------------------------------------------------
421
xdma0_w(uint8_t data)422 void bulletf_state::xdma0_w(uint8_t data)
423 {
424 /*
425
426 bit signal
427
428 0 device select (0=FDC, 1=SCSI)
429 1
430 2
431 3
432 4 DMB4 Source bank
433 5
434 6 DMB6 Destination bank
435 7
436
437 */
438
439 m_rome = 1;
440
441 m_xdma0 = data;
442 }
443
444
445 //-------------------------------------------------
446 // xfdc_w -
447 //-------------------------------------------------
448
xfdc_w(uint8_t data)449 void bulletf_state::xfdc_w(uint8_t data)
450 {
451 /*
452
453 bit signal
454
455 0 Unit select number
456 1 Unit select number
457 2 Unit select number
458 3 Unit select number
459 4 Select side 2
460 5 Disable 3 & 5 inch spindle motors
461 6 Set for 1 MHz controller operation, reset for 2 MHz controller operation
462 7 Set to select single density
463
464 */
465
466 // drive select
467 m_floppy = nullptr;
468
469 switch (data & 0x0f)
470 {
471 // 5.25"
472 case 0: m_floppy = m_floppy0->get_device(); break;
473 case 1: m_floppy = m_floppy1->get_device(); break;
474 case 2: m_floppy = m_floppy2->get_device(); break;
475 case 3: m_floppy = m_floppy3->get_device(); break;
476 // 8"
477 case 4: m_floppy = m_floppy4->get_device(); break;
478 case 5: m_floppy = m_floppy5->get_device(); break;
479 case 6: m_floppy = m_floppy6->get_device(); break;
480 case 7: m_floppy = m_floppy7->get_device(); break;
481 // 3.5"
482 case 8: m_floppy = m_floppy8->get_device(); break;
483 case 9: m_floppy = m_floppy9->get_device(); break;
484 }
485
486 m_fdc->set_floppy(m_floppy);
487
488 if (m_floppy)
489 {
490 // side select
491 m_floppy->ss_w(BIT(data, 4));
492
493 // floppy motor
494 m_floppy->mon_w(BIT(data, 5));
495 }
496
497 // FDC clock
498 m_fdc->set_unscaled_clock(16_MHz_XTAL / (BIT(data, 6) ? 16 : 8));
499
500 // density select
501 m_fdc->dden_w(BIT(data, 7));
502 }
503
504
505 //-------------------------------------------------
506 // mbank_w -
507 //-------------------------------------------------
508
mbank_w(uint8_t data)509 void bulletf_state::mbank_w(uint8_t data)
510 {
511 /*
512
513 bit signal
514
515 0 Select active bank (0=bank 0, 1=bank 1)
516 1
517 2
518 3
519 4 Select system space overlay (0=no overlay, 1=overlay)
520 5
521 6
522 7
523
524 */
525
526 m_mbank = data;
527 }
528
529
530 //-------------------------------------------------
531 // scsi_r -
532 //-------------------------------------------------
533
scsi_r()534 uint8_t bulletf_state::scsi_r()
535 {
536 uint8_t data = m_scsi_data_in->read();
537
538 m_scsibus->write_ack(1);
539
540 m_wack = 0;
541 update_dma_rdy();
542
543 return data;
544 }
545
546
547 //-------------------------------------------------
548 // scsi_w -
549 //-------------------------------------------------
550
scsi_w(uint8_t data)551 void bulletf_state::scsi_w(uint8_t data)
552 {
553 m_scsi_data_out->write(data);
554
555 m_scsibus->write_ack(1);
556
557 m_wack = 0;
558 update_dma_rdy();
559 }
560
561 //-------------------------------------------------
562 // hwsts_r -
563 //-------------------------------------------------
564
hwsts_r()565 uint8_t bulletf_state::hwsts_r()
566 {
567 /*
568
569 bit signal
570
571 0 CBUSY Centronics busy
572 1 SW2 DIP switch 2
573 2 SW3 DIP switch 3
574 3 FD2S *Floppy disk two sided
575 4 HLDST Floppy disk head load status
576 5 XDCG *Floppy disk exchange (8-inch only)
577 6 FDIRQ FDC interrupt request line
578 7 FDDRQ FDC data request line
579
580 */
581
582 uint8_t data = 0;
583
584 // centronics busy
585 data |= m_centronics_busy;
586
587 // DIP switches
588 data |= m_sw1->read() & 0x06;
589
590 // floppy
591 data |= (m_floppy ? m_floppy->twosid_r() : 1) << 3;
592 data |= m_fdc->hld_r() << 4;
593 data |= (m_floppy ? m_floppy->dskchg_r() : 1) << 5;
594 data |= m_fdc->intrq_r() << 6;
595 data |= m_fdc->drq_r() << 7;
596
597 return data;
598 }
599
600
601
602 //**************************************************************************
603 // ADDRESS MAPS
604 //**************************************************************************
605
606 //-------------------------------------------------
607 // ADDRESS_MAP( bullet_mem )
608 //-------------------------------------------------
609
bullet_mem(address_map & map)610 void bullet_state::bullet_mem(address_map &map)
611 {
612 map(0x0000, 0xffff).rw(FUNC(bullet_state::mreq_r), FUNC(bullet_state::mreq_w));
613 }
614
615
616 //-------------------------------------------------
617 // ADDRESS_MAP( bullet_io )
618 //-------------------------------------------------
619
bullet_io(address_map & map)620 void bullet_state::bullet_io(address_map &map)
621 {
622 map.global_mask(0x1f);
623 map(0x00, 0x03).rw(m_dart, FUNC(z80dart_device::ba_cd_r), FUNC(z80dart_device::ba_cd_w));
624 map(0x04, 0x07).rw(Z80PIO_TAG, FUNC(z80pio_device::read), FUNC(z80pio_device::write));
625 map(0x08, 0x0b).rw(m_ctc, FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
626 map(0x0c, 0x0c).mirror(0x03).rw(FUNC(bullet_state::win_r), FUNC(bullet_state::wstrobe_w));
627 map(0x10, 0x13).rw(m_fdc, FUNC(mb8877_device::read), FUNC(mb8877_device::write));
628 map(0x14, 0x14).rw(m_dmac, FUNC(z80dma_device::read), FUNC(z80dma_device::write));
629 map(0x15, 0x15).rw(FUNC(bullet_state::brom_r), FUNC(bullet_state::brom_w));
630 map(0x16, 0x16).w(FUNC(bullet_state::exdsk_w));
631 map(0x17, 0x17).w(FUNC(bullet_state::exdma_w));
632 map(0x18, 0x18).w(FUNC(bullet_state::hdcon_w));
633 map(0x19, 0x19).r(FUNC(bullet_state::info_r));
634 map(0x1a, 0x1a).w(FUNC(bullet_state::segst_w));
635 }
636
637
638 //-------------------------------------------------
639 // ADDRESS_MAP( bulletf_mem )
640 //-------------------------------------------------
641
bulletf_mem(address_map & map)642 void bulletf_state::bulletf_mem(address_map &map)
643 {
644 map(0x0000, 0xffff).rw(FUNC(bulletf_state::mreq_r), FUNC(bulletf_state::mreq_w));
645 }
646
647
648 //-------------------------------------------------
649 // ADDRESS_MAP( bulletf_io )
650 //-------------------------------------------------
651
bulletf_io(address_map & map)652 void bulletf_state::bulletf_io(address_map &map)
653 {
654 map.global_mask(0x3f);
655 map(0x00, 0x03).rw(m_dart, FUNC(z80dart_device::ba_cd_r), FUNC(z80dart_device::ba_cd_w));
656 map(0x04, 0x07).rw(Z80PIO_TAG, FUNC(z80pio_device::read), FUNC(z80pio_device::write));
657 map(0x08, 0x0b).rw(m_ctc, FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
658 map(0x10, 0x13).rw(m_fdc, FUNC(mb8877_device::read), FUNC(mb8877_device::write));
659 map(0x14, 0x14).w(FUNC(bulletf_state::xdma0_w));
660 map(0x16, 0x16).w(FUNC(bulletf_state::xfdc_w));
661 map(0x17, 0x17).w(FUNC(bulletf_state::mbank_w));
662 map(0x19, 0x19).rw(FUNC(bulletf_state::scsi_r), FUNC(bulletf_state::scsi_w));
663 map(0x1a, 0x1a).rw(m_dmac, FUNC(z80dma_device::read), FUNC(z80dma_device::write));
664 map(0x1b, 0x1b).r(FUNC(bulletf_state::hwsts_r));
665 }
666
667
668
669 //**************************************************************************
670 // INPUT PORTS
671 //**************************************************************************
672
673 //-------------------------------------------------
674 // INPUT_PORTS( bullet )
675 //-------------------------------------------------
676
677 INPUT_PORTS_START( bullet )
678 PORT_START("SW1")
679 PORT_DIPUNUSED_DIPLOC( 0x01, IP_ACTIVE_LOW, "SW1:1" )
680 PORT_DIPUNUSED_DIPLOC( 0x02, IP_ACTIVE_LOW, "SW1:2" )
681 PORT_DIPUNUSED_DIPLOC( 0x04, IP_ACTIVE_LOW, "SW1:3" )
682 PORT_DIPUNUSED_DIPLOC( 0x08, IP_ACTIVE_LOW, "SW1:4" )
683 PORT_DIPNAME( 0xf0, 0x50, "Floppy Type" ) PORT_DIPLOCATION("SW1:5,6,7,8")
684 PORT_DIPSETTING( 0xf0, "5.25\" SD" )
685 PORT_DIPSETTING( 0x50, "5.25\" DD" )
686 PORT_DIPSETTING( 0x90, "8\" SD" )
687 PORT_DIPSETTING( 0x00, "8\" DD" )
688 INPUT_PORTS_END
689
690
691 //-------------------------------------------------
692 // INPUT_PORTS( bulletf )
693 //-------------------------------------------------
694
INPUT_PORTS_START(bulletf)695 INPUT_PORTS_START( bulletf )
696 PORT_START("SW1")
697 PORT_DIPNAME( 0x01, 0x01, "SCSI Bus Termination" ) PORT_DIPLOCATION("SW1:1")
698 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
699 PORT_DIPSETTING( 0x01, DEF_STR( On ) )
700 PORT_DIPUNUSED_DIPLOC( 0x02, IP_ACTIVE_LOW, "SW1:2" )
701 PORT_DIPUNUSED_DIPLOC( 0x04, IP_ACTIVE_LOW, "SW1:3" )
702 PORT_DIPNAME( 0x08, 0x08, "Boot ROM Device" ) PORT_DIPLOCATION("SW1:4")
703 PORT_DIPSETTING( 0x00, "Onboard" )
704 PORT_DIPSETTING( 0x08, "EPROM" )
705 PORT_DIPNAME( 0xf0, 0xc0, "Floppy Type" ) PORT_DIPLOCATION("SW1:5,6,7,8")
706 PORT_DIPSETTING( 0x10, "3\" DD" )
707 PORT_DIPSETTING( 0xc0, "5.25\" SD" )
708 PORT_DIPSETTING( 0x40, "5.25\" DD" )
709 PORT_DIPSETTING( 0xa0, "8\" SD" )
710 PORT_DIPSETTING( 0x20, "8\" DD" )
711 INPUT_PORTS_END
712
713
714
715 //**************************************************************************
716 // DEVICE CONFIGURATION
717 //**************************************************************************
718
719 //-------------------------------------------------
720 // Z80CTC
721 //-------------------------------------------------
722
723 TIMER_DEVICE_CALLBACK_MEMBER(bullet_state::ctc_tick)
724 {
725 m_ctc->trg0(1);
726 m_ctc->trg0(0);
727
728 m_ctc->trg1(1);
729 m_ctc->trg1(0);
730
731 m_ctc->trg2(1);
732 m_ctc->trg2(0);
733 }
734
WRITE_LINE_MEMBER(bullet_state::dart_rxtxca_w)735 WRITE_LINE_MEMBER( bullet_state::dart_rxtxca_w )
736 {
737 m_dart->txca_w(state);
738 m_dart->rxca_w(state);
739 }
740
741 //-------------------------------------------------
742 // Z80DART
743 //-------------------------------------------------
744
WRITE_LINE_MEMBER(bullet_state::dartardy_w)745 WRITE_LINE_MEMBER( bullet_state::dartardy_w )
746 {
747 m_dartardy = state;
748 update_dma_rdy();
749 }
750
WRITE_LINE_MEMBER(bullet_state::dartbrdy_w)751 WRITE_LINE_MEMBER( bullet_state::dartbrdy_w )
752 {
753 m_dartbrdy = state;
754 update_dma_rdy();
755 }
756
757 //-------------------------------------------------
758 // Z80DMA
759 //-------------------------------------------------
760
update_dma_rdy()761 void bullet_state::update_dma_rdy()
762 {
763 int rdy = 1;
764
765 switch (m_exdma & 0x07)
766 {
767 case FDRDY:
768 rdy = m_fdrdy;
769 break;
770
771 case DARTARDY:
772 rdy = m_dartardy;
773 break;
774
775 case DARTBRDY:
776 rdy = m_dartbrdy;
777 break;
778
779 case WINRDY:
780 rdy = m_winrdy;
781 break;
782
783 case EXRDY1:
784 rdy = m_exrdy1;
785 break;
786
787 case EXRDY2:
788 rdy = m_exrdy2;
789 break;
790 }
791
792 m_dmac->rdy_w(rdy);
793 }
794
dma_mreq_r(offs_t offset)795 uint8_t bullet_state::dma_mreq_r(offs_t offset)
796 {
797 uint8_t data = m_ram->pointer()[(m_buf << 16) | offset];
798
799 if (BIT(m_exdma, 4))
800 {
801 m_buf = !m_buf;
802 }
803
804 return data;
805 }
806
dma_mreq_w(offs_t offset,uint8_t data)807 void bullet_state::dma_mreq_w(offs_t offset, uint8_t data)
808 {
809 m_ram->pointer()[(m_buf << 16) | offset] = data;
810
811 if (BIT(m_exdma, 4))
812 {
813 m_buf = !m_buf;
814 }
815 }
816
io_read_byte(offs_t offset)817 uint8_t bullet_state::io_read_byte(offs_t offset)
818 {
819 return m_maincpu->space(AS_IO).read_byte(offset);
820 }
821
io_write_byte(offs_t offset,uint8_t data)822 void bullet_state::io_write_byte(offs_t offset, uint8_t data)
823 {
824 m_maincpu->space(AS_IO).write_byte(offset, data);
825 }
826
827 //-------------------------------------------------
828 // Z80DMA for bulletf (not used currently)
829 //-------------------------------------------------
830
update_dma_rdy()831 void bulletf_state::update_dma_rdy()
832 {
833 int rdy = 1;
834
835 if (BIT(m_xdma0, 0))
836 {
837 rdy = m_wack || m_wrdy;
838 }
839 else
840 {
841 rdy = m_fdrdy;
842 }
843
844 m_dmac->rdy_w(rdy);
845 }
846
dma_mreq_r(offs_t offset)847 uint8_t bulletf_state::dma_mreq_r(offs_t offset)
848 {
849 return m_ram->pointer()[(DMB4 << 16) | offset];
850 }
851
dma_mreq_w(offs_t offset,uint8_t data)852 void bulletf_state::dma_mreq_w(offs_t offset, uint8_t data)
853 {
854 m_ram->pointer()[(DMB6 << 16) | offset] = data;
855 }
856
857 //-------------------------------------------------
858 // Z80PIO
859 //-------------------------------------------------
860
DECLARE_WRITE_LINE_MEMBER(bullet_state::write_centronics_busy)861 DECLARE_WRITE_LINE_MEMBER( bullet_state::write_centronics_busy )
862 {
863 m_centronics_busy = state;
864 }
865
DECLARE_WRITE_LINE_MEMBER(bullet_state::write_centronics_perror)866 DECLARE_WRITE_LINE_MEMBER( bullet_state::write_centronics_perror )
867 {
868 m_centronics_perror = state;
869 }
870
DECLARE_WRITE_LINE_MEMBER(bullet_state::write_centronics_select)871 DECLARE_WRITE_LINE_MEMBER( bullet_state::write_centronics_select )
872 {
873 m_centronics_select = state;
874 }
875
DECLARE_WRITE_LINE_MEMBER(bullet_state::write_centronics_fault)876 DECLARE_WRITE_LINE_MEMBER( bullet_state::write_centronics_fault )
877 {
878 m_centronics_fault = state;
879 }
880
pio_pb_r()881 uint8_t bullet_state::pio_pb_r()
882 {
883 /*
884
885 bit signal description
886
887 0 centronics busy
888 1 centronics paper end
889 2 centronics selected
890 3 *FAULT centronics fault
891 4 external vector
892 5 WBUSDIR winchester bus direction
893 6 WCOMPLETE winchester command complete
894 7 *WINRDY winchester ready
895
896 */
897
898 uint8_t data = 0;
899
900 // centronics
901 data |= m_centronics_busy;
902 data |= m_centronics_perror << 1;
903 data |= m_centronics_select << 2;
904 data |= m_centronics_fault << 3;
905
906 return data;
907 }
908
909
pio_pa_w(uint8_t data)910 void bulletf_state::pio_pa_w(uint8_t data)
911 {
912 /*
913
914 bit signal
915
916 0 ATN
917 1 RST
918 2 SEL
919 3 BUSY
920 4 MSG
921 5 C/D
922 6 REQ
923 7 I/O
924
925 */
926
927 m_scsibus->write_atn(BIT(data, 0));
928 m_scsibus->write_rst(BIT(data, 1));
929 m_scsibus->write_sel(BIT(data, 2));
930 }
931
WRITE_LINE_MEMBER(bulletf_state::cstrb_w)932 WRITE_LINE_MEMBER( bulletf_state::cstrb_w )
933 {
934 m_centronics->write_strobe(!state);
935 }
936
bullet_525_floppies(device_slot_interface & device)937 static void bullet_525_floppies(device_slot_interface &device)
938 {
939 device.option_add("525sd", FLOPPY_525_SD);
940 device.option_add("525dd", FLOPPY_525_DD);
941 device.option_add("525qd", FLOPPY_525_QD);
942 }
943
bullet_8_floppies(device_slot_interface & device)944 static void bullet_8_floppies(device_slot_interface &device)
945 {
946 device.option_add("8dssd", FLOPPY_8_DSSD);
947 device.option_add("8dsdd", FLOPPY_8_DSDD);
948 }
949
bullet_35_floppies(device_slot_interface & device)950 static void bullet_35_floppies(device_slot_interface &device)
951 {
952 device.option_add("35dd", FLOPPY_35_DD);
953 }
954
WRITE_LINE_MEMBER(bullet_state::fdc_drq_w)955 WRITE_LINE_MEMBER( bullet_state::fdc_drq_w )
956 {
957 m_fdrdy = !state;
958 update_dma_rdy();
959 }
960
WRITE_LINE_MEMBER(bulletf_state::req_w)961 WRITE_LINE_MEMBER( bulletf_state::req_w )
962 {
963 if (!state)
964 {
965 m_scsibus->write_ack(0);
966
967 m_wack = 1;
968 }
969
970 m_wrdy = !state;
971 update_dma_rdy();
972
973 m_scsi_ctrl_in->write_bit6(state);
974 }
975
976
977 static DEVICE_INPUT_DEFAULTS_START( terminal )
978 DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_9600 )
979 DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_9600 )
980 DEVICE_INPUT_DEFAULTS( "RS232_STARTBITS", 0xff, RS232_STARTBITS_1 )
981 DEVICE_INPUT_DEFAULTS( "RS232_DATABITS", 0xff, RS232_DATABITS_8 )
982 DEVICE_INPUT_DEFAULTS( "RS232_PARITY", 0xff, RS232_PARITY_NONE )
983 DEVICE_INPUT_DEFAULTS( "RS232_STOPBITS", 0xff, RS232_STOPBITS_1 )
984 DEVICE_INPUT_DEFAULTS_END
985
986
987 //-------------------------------------------------
988 // z80_daisy_config daisy_chain
989 //-------------------------------------------------
990
991 static const z80_daisy_config daisy_chain[] =
992 {
993 { Z80DMA_TAG },
994 { Z80DART_TAG },
995 { Z80PIO_TAG },
996 { Z80CTC_TAG },
997 { nullptr }
998 };
999
1000
1001
1002 //**************************************************************************
1003 // MACHINE INITIALIZATION
1004 //**************************************************************************
1005
1006 //-------------------------------------------------
1007 // MACHINE_START( bullet )
1008 //-------------------------------------------------
1009
machine_start()1010 void bullet_state::machine_start()
1011 {
1012 // state saving
1013 save_item(NAME(m_segst));
1014 save_item(NAME(m_brom));
1015 save_item(NAME(m_exdma));
1016 save_item(NAME(m_buf));
1017 save_item(NAME(m_fdrdy));
1018 save_item(NAME(m_dartardy));
1019 save_item(NAME(m_dartbrdy));
1020 save_item(NAME(m_winrdy));
1021 save_item(NAME(m_exrdy1));
1022 save_item(NAME(m_exrdy2));
1023 save_item(NAME(m_centronics_busy));
1024 save_item(NAME(m_centronics_perror));
1025 save_item(NAME(m_centronics_select));
1026 save_item(NAME(m_centronics_fault));
1027 }
1028
1029
1030 //-------------------------------------------------
1031 // MACHINE_START( bulletf )
1032 //-------------------------------------------------
1033
machine_start()1034 void bulletf_state::machine_start()
1035 {
1036 // state saving
1037 save_item(NAME(m_fdrdy));
1038 save_item(NAME(m_rome));
1039 save_item(NAME(m_xdma0));
1040 save_item(NAME(m_mbank));
1041 save_item(NAME(m_wack));
1042 save_item(NAME(m_wrdy));
1043 save_item(NAME(m_centronics_busy));
1044 }
1045
1046
machine_reset()1047 void bullet_state::machine_reset()
1048 {
1049 // memory banking
1050 m_brom = 0;
1051 m_segst = 0;
1052
1053 // DMA ready
1054 m_exdma = 0;
1055 m_buf = 0;
1056 update_dma_rdy();
1057
1058 // disable software control
1059 m_exdsk_sw = false;
1060 m_hdcon_sw = false;
1061
1062 uint8_t sw1 = m_sw1->read();
1063 int mini = BIT(sw1, 6);
1064 m_fdc->set_unscaled_clock(16_MHz_XTAL / (mini ? 16 : 8));
1065 m_fdc->dden_w(BIT(sw1, 7));
1066
1067 if (mini)
1068 {
1069 m_floppy = m_floppy0->get_device();
1070 }
1071 else
1072 {
1073 m_floppy = m_floppy4->get_device();
1074 }
1075
1076 m_fdc->set_floppy(m_floppy);
1077
1078 if (m_floppy)
1079 {
1080 m_floppy->ss_w(0);
1081 m_floppy->mon_w(0);
1082 }
1083 }
1084
1085
machine_reset()1086 void bulletf_state::machine_reset()
1087 {
1088 // memory banking
1089 m_rome = 0;
1090 m_mbank = 0;
1091
1092 // DMA ready
1093 m_xdma0 = 0;
1094 m_wack = 0;
1095 m_wrdy = 0;
1096 update_dma_rdy();
1097 }
1098
1099
1100
1101 //**************************************************************************
1102 // MACHINE CONFIGURATION
1103 //**************************************************************************
1104
1105 //-------------------------------------------------
1106 // machine_config( bullet )
1107 //-------------------------------------------------
1108
bullet(machine_config & config)1109 void bullet_state::bullet(machine_config &config)
1110 {
1111 // basic machine hardware
1112 Z80(config, m_maincpu, 16_MHz_XTAL / 4);
1113 m_maincpu->set_addrmap(AS_PROGRAM, &bullet_state::bullet_mem);
1114 m_maincpu->set_addrmap(AS_IO, &bullet_state::bullet_io);
1115 m_maincpu->set_daisy_config(daisy_chain);
1116
1117 // devices
1118 Z80CTC(config, m_ctc, 16_MHz_XTAL / 4);
1119 m_ctc->intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
1120 m_ctc->zc_callback<0>().set(FUNC(bullet_state::dart_rxtxca_w));
1121 m_ctc->zc_callback<1>().set(m_dart, FUNC(z80dart_device::rxtxcb_w));
1122 m_ctc->zc_callback<2>().set(m_ctc, FUNC(z80ctc_device::trg3));
1123
1124 TIMER(config, "ctc").configure_periodic(FUNC(bullet_state::ctc_tick), attotime::from_hz(4.9152_MHz_XTAL / 4));
1125
1126 Z80DART(config, m_dart, 16_MHz_XTAL / 4);
1127 m_dart->out_txda_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_txd));
1128 m_dart->out_dtra_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_dtr));
1129 m_dart->out_rtsa_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_rts));
1130 m_dart->out_wrdya_callback().set(FUNC(bullet_state::dartardy_w));
1131 m_dart->out_txdb_callback().set(RS232_B_TAG, FUNC(rs232_port_device::write_txd));
1132 m_dart->out_dtrb_callback().set(RS232_B_TAG, FUNC(rs232_port_device::write_dtr));
1133 m_dart->out_rtsb_callback().set(RS232_B_TAG, FUNC(rs232_port_device::write_rts));
1134 m_dart->out_wrdyb_callback().set(FUNC(bullet_state::dartbrdy_w));
1135 m_dart->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
1136
1137 Z80DMA(config, m_dmac, 16_MHz_XTAL / 4);
1138 m_dmac->out_busreq_callback().set_inputline(m_maincpu, INPUT_LINE_HALT);
1139 m_dmac->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
1140 m_dmac->in_mreq_callback().set(FUNC(bullet_state::dma_mreq_r));
1141 m_dmac->out_mreq_callback().set(FUNC(bullet_state::dma_mreq_w));
1142 m_dmac->in_iorq_callback().set(FUNC(bullet_state::io_read_byte));
1143 m_dmac->out_iorq_callback().set(FUNC(bullet_state::io_write_byte));
1144
1145 z80pio_device& pio(Z80PIO(config, Z80PIO_TAG, 16_MHz_XTAL / 4));
1146 pio.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
1147 pio.out_pa_callback().set("cent_data_out", FUNC(output_latch_device::write));
1148 pio.in_pb_callback().set(FUNC(bullet_state::pio_pb_r));
1149
1150 MB8877(config, m_fdc, 16_MHz_XTAL / 16);
1151 m_fdc->intrq_wr_callback().set(m_dart, FUNC(z80dart_device::dcda_w));
1152 m_fdc->drq_wr_callback().set(FUNC(bullet_state::fdc_drq_w));
1153 FLOPPY_CONNECTOR(config, MB8877_TAG":0", bullet_525_floppies, "525qd", floppy_image_device::default_floppy_formats);
1154 FLOPPY_CONNECTOR(config, MB8877_TAG":1", bullet_525_floppies, nullptr, floppy_image_device::default_floppy_formats);
1155 FLOPPY_CONNECTOR(config, MB8877_TAG":2", bullet_525_floppies, nullptr, floppy_image_device::default_floppy_formats);
1156 FLOPPY_CONNECTOR(config, MB8877_TAG":3", bullet_525_floppies, nullptr, floppy_image_device::default_floppy_formats);
1157 FLOPPY_CONNECTOR(config, MB8877_TAG":4", bullet_8_floppies, nullptr, floppy_image_device::default_floppy_formats);
1158 FLOPPY_CONNECTOR(config, MB8877_TAG":5", bullet_8_floppies, nullptr, floppy_image_device::default_floppy_formats);
1159 FLOPPY_CONNECTOR(config, MB8877_TAG":6", bullet_8_floppies, nullptr, floppy_image_device::default_floppy_formats);
1160 FLOPPY_CONNECTOR(config, MB8877_TAG":7", bullet_8_floppies, nullptr, floppy_image_device::default_floppy_formats);
1161
1162 CENTRONICS(config, m_centronics, centronics_devices, "printer");
1163 m_centronics->busy_handler().set(FUNC(bullet_state::write_centronics_busy));
1164 m_centronics->perror_handler().set(FUNC(bullet_state::write_centronics_perror));
1165 m_centronics->select_handler().set(FUNC(bullet_state::write_centronics_select));
1166 m_centronics->fault_handler().set(FUNC(bullet_state::write_centronics_fault));
1167
1168 output_latch_device ¢_data_out(OUTPUT_LATCH(config, "cent_data_out"));
1169 m_centronics->set_output_latch(cent_data_out);
1170
1171 rs232_port_device &rs232a(RS232_PORT(config, RS232_A_TAG, default_rs232_devices, "terminal"));
1172 rs232a.rxd_handler().set(m_dart, FUNC(z80dart_device::rxa_w));
1173 rs232a.set_option_device_input_defaults("terminal", DEVICE_INPUT_DEFAULTS_NAME(terminal));
1174
1175 rs232_port_device &rs232b(RS232_PORT(config, RS232_B_TAG, default_rs232_devices, nullptr));
1176 rs232b.rxd_handler().set(m_dart, FUNC(z80dart_device::rxb_w));
1177
1178 // software lists
1179 SOFTWARE_LIST(config, "flop_list").set_original("wmbullet");
1180
1181 // internal ram
1182 RAM(config, RAM_TAG).set_default_size("128K");
1183 }
1184
1185
1186 //-------------------------------------------------
1187 // machine_config( bulletf )
1188 //-------------------------------------------------
1189
bulletf(machine_config & config)1190 void bulletf_state::bulletf(machine_config &config)
1191 {
1192 // basic machine hardware
1193 Z80(config, m_maincpu, 16_MHz_XTAL / 4);
1194 m_maincpu->set_addrmap(AS_PROGRAM, &bulletf_state::bulletf_mem);
1195 m_maincpu->set_addrmap(AS_IO, &bulletf_state::bulletf_io);
1196 m_maincpu->set_daisy_config(daisy_chain);
1197
1198 // devices
1199 Z80CTC(config, m_ctc, 16_MHz_XTAL / 4);
1200 m_ctc->intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
1201 m_ctc->zc_callback<0>().set(FUNC(bullet_state::dart_rxtxca_w));
1202 m_ctc->zc_callback<1>().set(m_dart, FUNC(z80dart_device::rxtxcb_w));
1203 m_ctc->zc_callback<2>().set(m_ctc, FUNC(z80ctc_device::trg3));
1204
1205 TIMER(config, "ctc").configure_periodic(FUNC(bullet_state::ctc_tick), attotime::from_hz(4.9152_MHz_XTAL / 4));
1206
1207 Z80DART(config, m_dart, 16_MHz_XTAL / 4);
1208 m_dart->out_txda_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_txd));
1209 m_dart->out_dtra_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_dtr));
1210 m_dart->out_rtsa_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_rts));
1211 m_dart->out_wrdya_callback().set(FUNC(bullet_state::dartardy_w));
1212 m_dart->out_txdb_callback().set(RS232_B_TAG, FUNC(rs232_port_device::write_txd));
1213 m_dart->out_dtrb_callback().set(RS232_B_TAG, FUNC(rs232_port_device::write_dtr));
1214 m_dart->out_rtsb_callback().set(RS232_B_TAG, FUNC(rs232_port_device::write_rts));
1215 m_dart->out_wrdyb_callback().set(FUNC(bullet_state::dartbrdy_w));
1216 m_dart->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
1217
1218 Z80DMA(config, m_dmac, 16_MHz_XTAL / 4);
1219 m_dmac->out_busreq_callback().set_inputline(m_maincpu, INPUT_LINE_HALT);
1220 m_dmac->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
1221 m_dmac->in_mreq_callback().set(FUNC(bullet_state::dma_mreq_r));
1222 m_dmac->out_mreq_callback().set(FUNC(bullet_state::dma_mreq_w));
1223 m_dmac->in_iorq_callback().set(FUNC(bullet_state::io_read_byte));
1224 m_dmac->out_iorq_callback().set(FUNC(bullet_state::io_write_byte));
1225
1226 z80pio_device& pio(Z80PIO(config, Z80PIO_TAG, 16_MHz_XTAL / 4));
1227 pio.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
1228 pio.in_pa_callback().set("scsi_ctrl_in", FUNC(input_buffer_device::read));
1229 pio.out_pa_callback().set(FUNC(bulletf_state::pio_pa_w));
1230 pio.out_ardy_callback().set("cent_data_out", FUNC(output_latch_device::write));
1231 pio.out_brdy_callback().set(FUNC(bulletf_state::cstrb_w));
1232
1233 MB8877(config, m_fdc, 16_MHz_XTAL / 16);
1234 m_fdc->intrq_wr_callback().set(m_dart, FUNC(z80dart_device::rib_w));
1235 m_fdc->drq_wr_callback().set(FUNC(bullet_state::fdc_drq_w));
1236 FLOPPY_CONNECTOR(config, MB8877_TAG":0", bullet_525_floppies, "525qd", floppy_image_device::default_floppy_formats);
1237 FLOPPY_CONNECTOR(config, MB8877_TAG":1", bullet_525_floppies, nullptr, floppy_image_device::default_floppy_formats);
1238 FLOPPY_CONNECTOR(config, MB8877_TAG":2", bullet_525_floppies, nullptr, floppy_image_device::default_floppy_formats);
1239 FLOPPY_CONNECTOR(config, MB8877_TAG":3", bullet_525_floppies, nullptr, floppy_image_device::default_floppy_formats);
1240 FLOPPY_CONNECTOR(config, MB8877_TAG":4", bullet_8_floppies, nullptr, floppy_image_device::default_floppy_formats);
1241 FLOPPY_CONNECTOR(config, MB8877_TAG":5", bullet_8_floppies, nullptr, floppy_image_device::default_floppy_formats);
1242 FLOPPY_CONNECTOR(config, MB8877_TAG":6", bullet_8_floppies, nullptr, floppy_image_device::default_floppy_formats);
1243 FLOPPY_CONNECTOR(config, MB8877_TAG":7", bullet_8_floppies, nullptr, floppy_image_device::default_floppy_formats);
1244 FLOPPY_CONNECTOR(config, MB8877_TAG":8", bullet_35_floppies, nullptr, floppy_image_device::default_floppy_formats);
1245 FLOPPY_CONNECTOR(config, MB8877_TAG":9", bullet_35_floppies, nullptr, floppy_image_device::default_floppy_formats);
1246
1247 CENTRONICS(config, m_centronics, centronics_devices, "printer");
1248 m_centronics->busy_handler().set(FUNC(bullet_state::write_centronics_busy));
1249
1250 output_latch_device ¢_data_out(OUTPUT_LATCH(config, "cent_data_out"));
1251 m_centronics->set_output_latch(cent_data_out);
1252
1253 rs232_port_device &rs232a(RS232_PORT(config, RS232_A_TAG, default_rs232_devices, "terminal"));
1254 rs232a.rxd_handler().set(m_dart, FUNC(z80dart_device::rxa_w));
1255 rs232a.set_option_device_input_defaults("terminal", DEVICE_INPUT_DEFAULTS_NAME(terminal));
1256
1257 rs232_port_device &rs232b(RS232_PORT(config, RS232_B_TAG, default_rs232_devices, nullptr));
1258 rs232b.rxd_handler().set(m_dart, FUNC(z80dart_device::rxb_w));
1259
1260 SCSI_PORT(config, m_scsibus, 0);
1261 m_scsibus->bsy_handler().set(m_scsi_ctrl_in, FUNC(input_buffer_device::write_bit3));
1262 m_scsibus->msg_handler().set(m_scsi_ctrl_in, FUNC(input_buffer_device::write_bit4));
1263 m_scsibus->cd_handler().set(m_scsi_ctrl_in, FUNC(input_buffer_device::write_bit5));
1264 m_scsibus->req_handler().set(FUNC(bulletf_state::req_w));
1265 m_scsibus->io_handler().set(m_scsi_ctrl_in, FUNC(input_buffer_device::write_bit7));
1266 m_scsibus->set_data_input_buffer(m_scsi_data_in);
1267 m_scsibus->set_slot_device(1, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_0));
1268
1269 OUTPUT_LATCH(config, m_scsi_data_out);
1270 m_scsibus->set_output_latch(*m_scsi_data_out);
1271 INPUT_BUFFER(config, m_scsi_data_in);
1272 INPUT_BUFFER(config, m_scsi_ctrl_in);
1273
1274 // software lists
1275 SOFTWARE_LIST(config, "flop_list").set_original("wmbullet");
1276
1277 // internal ram
1278 RAM(config, RAM_TAG).set_default_size("128K");
1279 }
1280
1281
1282
1283 //**************************************************************************
1284 // ROMS
1285 //**************************************************************************
1286
1287 //-------------------------------------------------
1288 // ROM( bullet )
1289 //-------------------------------------------------
1290
1291 ROM_START( wmbullet )
1292 ROM_REGION( 0x10000, Z80_TAG, 0 )
1293 ROM_LOAD( "sr70x.u8", 0x00, 0x20, CRC(d54b8a30) SHA1(65ff8753dd63c9dd1899bc9364a016225585d050) )
1294 ROM_END
1295
1296
1297 #define rom_wmbulletf rom_wmbullet
1298
1299
1300
1301 //**************************************************************************
1302 // SYSTEM DRIVERS
1303 //**************************************************************************
1304
1305 // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
1306 // the setname 'bullet' is used by Sega's Bullet in MAME.
1307 COMP( 1982, wmbullet, 0, 0, bullet, bullet, bullet_state, empty_init, "Wave Mate", "Bullet", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE | MACHINE_NO_SOUND_HW )
1308 COMP( 1984, wmbulletf, wmbullet, 0, bulletf, bulletf, bulletf_state, empty_init, "Wave Mate", "Bullet (Revision F)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE | MACHINE_NO_SOUND_HW )
1309