1 // license:LGPL-2.1+
2 // copyright-holders:David Haywood, Angelo Salese, ElSemi, Andrew Gardner
3 /* Hyper NeoGeo 64
4
5 Driver by David Haywood, ElSemi, Andrew Gardner and Angelo Salese
6
7
8 Notes:
9 * The top board is likely identical for all revisions and all "versions" of the hardware.
10 It contains the main MIPS CPU and a secondary communications KL5C80.
11
12 * The bottom board is what changes between hardware "versions". It has a Toshiba MCU with
13 a protected internal ROM. This MCU controls (at least) the inputs per game and communicates
14 with the main board through dualport RAM.
15
16 * I believe that this secondary board is used as a protection device.
17 The "board type" code comes from it in dualport RAM, and each game reads its inputs differently through dualport.
18 It's capable of changing the input ports dynamically (maybe explaining Roads Edge's "do not touch" quote below).
19 It probably has a lot to do with the network (Roads Edge network connectors are on this board).
20
21 * The Toshiba CPU datasheet is here : http://kr.ic-on-line.cn/IOL/viewpdf/TMP87CH40N_1029113.htm
22
23 * From the Roads Edge manual : "The Network Check screen will be displayed for about 40 seconds whether
24 the cabinet is connected for communication competition or not. After this,
25 the game screen will then appear. At the same time the Network Check screen
26 is displayed, the steering wheel will automatically straighten itself out."
27 "During the Network Check, absolutely do not touch or try to use the steering wheel,
28 pedal, shift lever, and switches. This will cause the cabinet to malfunction."
29
30 * The Japanese text on the Roads Edge network screen says : "waiting to connect network... please wait without touching machine"
31
32 * Xrally and Roads Edge have a symbols table at respectively 0xb2f30 and 0xe10c0
33
34 ToDo:
35 * Sprite garbage in Beast Busters 2nd Nightmare, another irq issue?
36 * Samurai Shodown 64 2 puts "Press 1p & 2p button" msg in gameplay, known to be a MCU simulation issue, i/o port 4 doesn't
37 seem to be just an input port but controls program flow too.
38 * Work out the purpose of the interrupts and how many are needed.
39 * Correct game speed (seems too fast).
40
41 2d:
42 * Scroll (base registers?)
43 * ROZ (4th tilemap in fatal fury should be floor [in progress], background should zoom)
44 * Find registers to control tilemap mode (4bpp/8bpp, 8x8, 16x16)
45 * Fix zooming sprites (zoom registers not understood, center versus edge pivot)
46 * Priorities
47 * Is all the bitmap decoding right?
48 * Upgrade to modern video timing.
49
50 3d:
51 * Find where the remainder of the 3d display list information is 'hiding'
52 -- should the 3d 'ram' be treated like a fifo, instead of like RAM (see Dreamcast etc.)
53 * Remaining 3d bits - glowing, etc.
54 * Populate the display buffers
55 * Does the hng64 do perspective-correct texture mapping? Doesn't look like it...
56
57 Other:
58 * Translate KL5C80 docs and finish up the implementation
59 * Figure out what IO $54 & $72 are on the communications CPU
60 * Fix sound
61 * Backup ram etc.
62 * Correct cpu speed
63 * How to use the FPGA data ('ROM1')
64
65 */
66
67 /*
68 NeoGeo Hyper 64 (Main Board)
69 SNK, 1997
70
71 This is a 3D system comprising one large PCB with many custom smt components
72 on both sides, one interface PCB with JAMMA connector and sound circuitry, and
73 one game cartridge. Only the Main PCB and interface PCB are detailed here.
74
75 PCB Layout (Top)
76 ----------------
77
78 LVS-MAC SNK 1997.06.02
79 |--------------------------------------------------------------|
80 | CONN9 |
81 | |
82 | ASIC1 ASIC3 CPU1 |
83 | |
84 | DPRAM1 |
85 | OSC2 ASIC5 ROM1|
86 | FSRAM1 OSC2 |
87 | FSRAM2 FPGA1 |
88 | FSRAM3 ASIC10 OSC4 |
89 | |
90 | CPU3 IC4 |
91 | PSRAM1 ASIC7 ASIC8 DSP1 OSC3 SRAM5 |
92 | PSRAM2 FROM1 |
93 | |
94 | |
95 | CONN10 |
96 |--------------------------------------------------------------|
97
98 No. PCB Label IC Markings IC Package
99 ----------------------------------------------------
100 01 ASIC1 NEO64-REN QFP304
101 02 ASIC3 NEO64-GTE QFP208
102 03 ASIC5 NEO64-SYS QFP208
103 04 ASIC7 NEO64-BGC QFP240
104 05 ASIC8 NEO64-SPR QFP208
105 06 ASIC10 NEO64-SCC QFP208
106 07 CPU1 NEC D30200GD-100 VR4300 QFP120
107 08 CPU3 KL5C80A12CFP QFP80
108 09 DPRAM1* IDT7133 LA35J PLCC68
109 10 DSP1 L7A1045 L6028 DSP-A QFP120
110 11 FPGA1 ALTERA EPF10K10QC208-4 QFP208
111 12 FROM1 MBM29F400B-12 TSOP48 (archived as FROM1.BIN)
112 13 FSRAM1 TC55V1664AJ-15 SOJ44
113 14 FSRAM2 TC55V1664AJ-15 SOJ44
114 15 FSRAM3 TC55V1664AJ-15 SOJ44
115 16 IC4 SMC COM20020-5ILJ PLCC28
116 17 OSC1 M33.333 KDS 7M -
117 18 OSC2 M50.113 KDS 7L -
118 19 OSC3 A33.868 KDS 7M -
119 20 OSC4 A40.000 KDS 7L -
120 21 PSRAM1 TC551001BFL-70L SOP32
121 22 PSRAM2 TC551001BFL-70L SOP32
122 23 ROM1 ALTERA EPC1PC8 DIP8 (130817 bytes, archived as ROM1.BIN)
123 24 SRAM5 TC55257DFL-85L SOP28
124
125 * The IDT 7133 / 7143 lack interrupts and just act as 0x1000 bytes (2x 0x800 16-bit words) of RAM
126 IDT 7133 - 32K (2K X 16 Bit) MASTER Dual-Port SRAM
127 IDT 7143 - 32K (2K X 16 Bit) SLAVE Dual-Port SRAM
128
129
130 PCB Layout (Bottom)
131
132 |--------------------------------------------------------------|
133 | CONN10 |
134 | |
135 | |
136 | PSRAM4 ASIC9 SRAM4 CPU2 Y1 |
137 | PSRAM3 SRAM1 SRAM3 |
138 | SRAM2 |
139 | |
140 | FSRAM6 DRAM3 |
141 | FSRAM5 |
142 | FSRAM4 DRAM1 |
143 | BROM1 DRAM2 |
144 | |
145 | |
146 | ASIC2 ASIC4 ASIC6 |
147 | |
148 | CONN9 |
149 |--------------------------------------------------------------|
150
151 No. PCB Label IC Markings IC Package
152 ----------------------------------------------------
153 01 ASIC2 NEO64-REN QFP304
154 02 ASIC4 NEO64-TRI2 QFP208
155 03 ASIC6 NEO64-CVR QFP120
156 04 ASIC9 NEO64-CAL QFP208
157 05 BROM1 MBM29F400B-12 TSOP48 (archived as BROM1.BIN)
158 06 CPU2 NEC D70236AGJ-16 V53A QFP120
159 07 DRAM1 HY51V18164BJC-60 SOJ42
160 08 DRAM2 HY51V18164BJC-60 SOJ42
161 09 DRAM3 HY51V18164BJC-60 SOJ42
162 10 FSRAM4 TC55V1664AJ-15 SOJ44
163 11 FSRAM5 TC55V1664AJ-15 SOJ44
164 12 FSRAM6 TC55V1664AJ-15 SOJ44
165 13 PSRAM3 TC551001BFL-70L SOP32
166 14 PSRAM4 TC551001BFL-70L SOP32
167 15 SRAM1 TC55257DFL-85L SOP28
168 16 SRAM2 TC55257DFL-85L SOP28
169 17 SRAM3 TC551001BFL-70L SOP32
170 18 SRAM4 TC551001BFL-70L SOP32
171 19 Y1 D320L7 XTAL (32MHz)
172
173
174 INTERFACE PCB
175 -------------
176
177 LVS-JAM SNK 1999.1.20
178 |---------------------------------------------|
179 | J A M M A |
180 | |
181 | |
182 | |
183 | SW3 SW1 |
184 | |
185 | IC6 IOCTR1 |
186 | BACKUP |
187 | BKRAM1 |
188 | SW2 BT1 DPRAM1 IC1 |
189 |---------------------------------------------|
190
191 No. PCB Label IC Markings IC Package
192 ----------------------------------------------------
193 01 DPRAM1 IDT 71321 LA55PF QFP64 *
194 02 IC1 MC44200FT QFP44
195 03 IOCTR1 TOSHIBA TMP87CH40N-4828 SDIP64
196 04 BACKUP EPSON RTC62423 SOP24
197 05 BKRAM1 W24258S-70LE SOP28
198 06 IC6 NEC C1891ACY DIP20
199 07 BT1 3V Coin Battery
200 08 SW1 2 position DIPSW OFF = JAMMA ON = MVS
201 09 SW2 4 position DIPSW
202 10 SW3 2 position DIPSW OFF = MONO/JAMMA ON = 2CH MVS
203
204 Notes:
205 1. The game cart plugs into the main PCB on the TOP side into CONN9 & CONN10
206 2. If the game cart is not plugged in, the hardware shows nothing on screen.
207 3. The IOCTR I/O MCU runs at 8 MHz.
208
209 *"IDT71321 is function-compatible (but not pin-compatible) with MB8421" ( src\devices\machine\mb8421.cpp )
210 It appears unlikely the interrupt function of the DPRAM is unused unless address pins are all inverted as
211 there aren't any accesses to 7ff / 7fe outside of the RAM testing, commands are put at byte 0 by the MIPS
212
213 Hyper Neo Geo game cartridges
214 -----------------------------
215
216 The game carts contains nothing except a huge pile of surface mounted ROMs
217 on both sides of the PCB. On a DG1 cart all the roms are 32Mbits, for the
218 DG2 cart the SC and SP roms are 64Mbit.
219 The DG1 cart can accept a maximum of 96 ROMs
220 The DG2 cart can accept a maximum of 84 ROMs
221
222
223 The actual carts are mostly only about 1/3rd to 1/2 populated.
224 Some of the IC locations between DG1 and DG2 are different also. See the source code below
225 for the exact number of ROMs used per game and ROM placements.
226
227 Games that use the LVS-DG1 cart: Road's Edge, Samurai Shodown 64 / Samurai Spirits 64
228
229 Games that use the LVS-DG2 cart: Fatal Fury: Wild Ambition, Buriki One, SS 64 II
230
231 There might be Rev.A boards for Buriki and Round Trip, we have Rev. B
232
233 pr = program
234 sc = scroll characters?
235 sd = sound
236 tx = textures
237 sp = sprites?
238 vt = vertex?
239
240 Top
241 ---
242 LVS-DG1
243 (C) SNK 1997
244 1997.5.20
245 |----------------------------------------------------------------------------|
246 | |
247 | |
248 | |
249 | |
250 | TX01A.5 TX01A.13 VT03A.19 VT02A.18 VT01A.17 PR01B.81 |
251 | |
252 | |
253 | |
254 | TX02A.6 TX02A.14 VT06A.22 VT05A.21 VT04A.20 PR03A.83 |
255 | |
256 | |
257 | |
258 | TX03A.7 TX03A.15 VT09A.25 VT08A.24 VT07A.23 PR05A.85 |
259 | |
260 | |
261 | |
262 | TX04A.8 TX04A.16 VT12A.28 VT11A.27 VT10A.26 PR07A.87 |
263 | |
264 | |
265 | |
266 | PR15A.95 PR13A.93 PR11A.91 PR09A.89 |
267 | |
268 | |
269 | |
270 | SC09A.49 SC10A.50 SP09A.61 SP10A.62 SP11A.63 SP12A.64 SD02A.78 |
271 | |
272 | |
273 | |
274 | SC05A.45 SC06A.46 SP05A.57 SP06A.58 SP07A.59 SP08A.60 |
275 | |
276 | |
277 | |
278 | SC01A.41 SC02A.42 SP01A.53 SP02A.54 SP03A.55 SP04A.56 SD01A.77 |
279 | |
280 | |
281 | |
282 | |
283 |----------------------------------------------------------------------------|
284
285 Bottom
286 ------
287 LVS-DG1
288 |----------------------------------------------------------------------------|
289 | |----------------------| |
290 | |----------------------| |
291 | |
292 | |
293 | SC03A.43 SC04A.44 SP13A.65 SP14A.66 SP15A.67 SP16A.68 SD03A.79 |
294 | |
295 | |
296 | |
297 | SC07A.47 SC08A.48 SP17A.69 SP18A.70 SP19A.71 SP20A.72 |
298 | |
299 | |
300 | |
301 | SC11A.51 SC12A.52 SP21A.73 SP22A.74 SP23A.75 SP24A.76 SD04A.80 |
302 | |
303 | |
304 | |
305 | PR16A.96 PR14A.94 PR12A.92 PR10A.90 |
306 | |
307 | |
308 | |
309 | TX04A.4 TX04A.12 VT24A.40 VT23A.39 VT22A.38 PR08A.88 |
310 | |
311 | |
312 | |
313 | TX03A.3 TX03A.11 VT21A.37 VT20A.36 VT19A.35 PR06A.86 |
314 | |
315 | |
316 | |
317 | TX02A.2 TX02A.10 VT18A.34 VT17A.33 VT16A.32 PR04A.84 |
318 | |
319 | |
320 | |
321 | TX01A.1 TX01A.9 VT15A.31 VT14A.30 VT13A.29 PR02B.82 |
322 | |
323 | |
324 | |----------------------| |
325 | |----------------------| |
326 |----------------------------------------------------------------------------|
327
328
329 Top
330 ---
331 LVS-DG2
332 (C) SNK 1998
333 1998.6.5
334 |----------------------------------------------------------------------------|
335 | |
336 | |
337 | |
338 | |
339 | TX01A.5 TX01A.13 VT03A.19 VT02A.18 VT01A.17 PR01B.81 |
340 | |
341 | |
342 | |
343 | TX02A.6 TX02A.14 VT06A.22 VT05A.21 VT04A.20 PR03A.83 |
344 | |
345 | |
346 | |
347 | TX03A.7 TX03A.15 VT09A.25 VT08A.24 VT07A.23 PR05A.85 |
348 | |
349 | |
350 | |
351 | TX04A.8 TX04A.16 VT12A.28 VT11A.27 VT10A.26 PR07A.87 |
352 | |
353 | |
354 | |
355 | PR15A.95 PR13A.93 PR11A.91 PR09A.89 |
356 | |
357 | |
358 | |
359 | SC05A.98 SC06A.100 SP09A.107 SP10A.111 SP11A.115 SP12A.119 SD02A.78 |
360 | |
361 | |
362 | |
363 | |
364 | |
365 | |
366 | |
367 | SC01A.97 SC02A.99 SP01A.105 SP02A.109 SP03A.113 SP04A.117 SD01A.77 |
368 | |
369 | |
370 | |
371 | |
372 |----------------------------------------------------------------------------|
373
374 Bottom
375 ------
376 LVS-DG2
377 |----------------------------------------------------------------------------|
378 | |----------------------| |
379 | |----------------------| |
380 | |
381 | |
382 | SC03A.101 SC04A.103 SP13A.108 SP14A.112 SP15A.116 SP16A.120 SD03A.79 |
383 | |
384 | |
385 | |
386 | |
387 | |
388 | |
389 | |
390 | SC07A.102 SC08A.104 SP05A.106 SP06A.110 SP07A.114 SP08A.118 SD04A.80 |
391 | |
392 | |
393 | |
394 | PR16A.96 PR14A.94 PR12A.92 PR10A.90 |
395 | |
396 | |
397 | |
398 | TX04A.4 TX04A.12 VT24A.40 VT23A.39 VT22A.38 PR08A.88 |
399 | |
400 | |
401 | |
402 | TX03A.3 TX03A.11 VT21A.37 VT20A.36 VT19A.35 PR06A.86 |
403 | |
404 | |
405 | |
406 | TX02A.2 TX02A.10 VT18A.34 VT17A.33 VT16A.32 PR04A.84 |
407 | |
408 | |
409 | |
410 | TX01A.1 TX01A.9 VT15A.31 VT14A.30 VT13A.29 PR02B.82 |
411 | |
412 | |
413 | |----------------------| |
414 | |----------------------| |
415 |----------------------------------------------------------------------------|
416 Notes:
417 Not all ROM positions are populated, check the source for exact ROM usage.
418 ROMs are mirrored. i.e. TX/PR/SP/SC etc ROMs line up on both sides of the PCB.
419 There are 4 copies of each TX ROM on the PCB.
420
421
422 ----
423
424 info from Daemon
425
426 There are various types of neogeo64 boards:
427 FIGHTING (revision 1 & 2), RACING, SHOOTING, and SAMURAI SHODOWN ONLY (Korean)
428 (MACHINE CODE ERROR): Is given when you try to put a "RACING GAME" on a "FIGHTING" board.
429
430 FIGHTING boards will ONLY play fighting games.
431
432 RACING boards will ONLY play racing games (and you need the extra gimmicks
433 to connect analog wheel and pedals, otherwise it gives you yet another
434 error).
435
436 Shooter boards will only work with Beast Busters 2.
437
438 And the Korean board only plays Samurai Shodown games (wont play Buriki One
439 or Fatal Fury for example).
440 */
441
442
443 #include "emu.h"
444 #include "includes/hng64.h"
445
446 #include "cpu/mips/mips3.h"
447 #include "cpu/z80/z80.h"
448 #include "machine/nvram.h"
449
450 #define VERBOSE 1
451 #include "logmacro.h"
452
hng64_com_r(offs_t offset)453 uint32_t hng64_state::hng64_com_r(offs_t offset)
454 {
455 //LOG("com read (PC=%08x): %08x %08x = %08x\n", m_maincpu->pc(), (offset*4)+0xc0000000, mem_mask, m_idt7133_dpram[offset]);
456 return m_idt7133_dpram[offset];
457 }
458
hng64_com_w(offs_t offset,uint32_t data,uint32_t mem_mask)459 void hng64_state::hng64_com_w(offs_t offset, uint32_t data, uint32_t mem_mask)
460 {
461 //LOG("com write (PC=%08x): %08x %08x = %08x\n", m_maincpu->pc(), (offset*4)+0xc0000000, mem_mask, data);
462 COMBINE_DATA(&m_idt7133_dpram[offset]);
463 }
464
465 /* TODO: fully understand this */
hng64_com_share_mips_w(offs_t offset,uint8_t data)466 void hng64_state::hng64_com_share_mips_w(offs_t offset, uint8_t data)
467 {
468 m_com_shared[offset ^ 3] = data;
469 }
470
hng64_com_share_mips_r(offs_t offset)471 uint8_t hng64_state::hng64_com_share_mips_r(offs_t offset)
472 {
473 return m_com_shared[offset];
474 }
475
hng64_com_share_w(offs_t offset,uint8_t data)476 void hng64_state::hng64_com_share_w(offs_t offset, uint8_t data)
477 {
478 m_com_shared[offset] = data;
479 }
480
hng64_com_share_r(offs_t offset)481 uint8_t hng64_state::hng64_com_share_r(offs_t offset)
482 {
483 if(offset == 4)
484 return m_com_shared[offset] | 1; // some busy flag?
485
486 return m_com_shared[offset];
487 }
488
489
hng64_rtc_r(offs_t offset,uint32_t mem_mask)490 uint32_t hng64_state::hng64_rtc_r(offs_t offset, uint32_t mem_mask)
491 {
492 if (offset & 1)
493 {
494 // RTC is mapped to 1 byte (4-bits used) in every 8 bytes so we can't even install this with a umask
495 int rtc_addr = offset >> 1;
496
497 // bit 4 disables "system log reader" (the device is 4-bit? so this bit is not from the device?)
498 if ((rtc_addr & 0xf) == 0xd)
499 return m_rtc->read((rtc_addr) & 0xf) | 0x10;
500
501 return m_rtc->read((rtc_addr) & 0xf);
502 }
503 else
504 {
505 // shouldn't happen unless something else is mapped here too
506 LOG("%s: unhandled hng64_rtc_r (%04x) (%08x)\n", machine().describe_context(), offset*4, mem_mask);
507 return 0xffffffff;
508 }
509 }
510
511 /* preliminary dma code, dma is used to copy program code -> ram */
do_dma(address_space & space)512 void hng64_state::do_dma(address_space &space)
513 {
514 // check if this determines how long the crosshatch is visible for, we might need to put it on a timer.
515
516 //printf("Performing DMA Start %08x Len %08x Dst %08x\n", m_dma_start, m_dma_len, m_dma_dst);
517 while (m_dma_len >= 0)
518 {
519 uint32_t dat;
520
521 dat = space.read_dword(m_dma_start);
522 space.write_dword(m_dma_dst, dat);
523 m_dma_start += 4;
524 m_dma_dst += 4;
525 m_dma_len--;
526 }
527 }
528
hng64_dmac_r(offs_t offset,uint32_t mem_mask)529 uint32_t hng64_state::hng64_dmac_r(offs_t offset, uint32_t mem_mask)
530 {
531 // DMAC seems to be mapped as 4 bytes in every 8
532 if ((offset * 4) == 0x54)
533 return 0x00000000; //dma status, 0x800
534
535 LOG("%s: unhandled hng64_dmac_r (%04x) (%08x)\n", machine().describe_context(), offset*4, mem_mask);
536
537 return 0xffffffff;
538 }
539
hng64_dmac_w(address_space & space,offs_t offset,uint32_t data,uint32_t mem_mask)540 void hng64_state::hng64_dmac_w(address_space &space, offs_t offset, uint32_t data, uint32_t mem_mask)
541 {
542 // DMAC seems to be mapped as 4 bytes in every 8
543 switch (offset * 4)
544 {
545 case 0x04: COMBINE_DATA(&m_dma_start); break;
546 case 0x14: COMBINE_DATA(&m_dma_dst); break;
547 case 0x24: COMBINE_DATA(&m_dma_len);
548 do_dma(space);
549 break;
550
551 // these are touched during startup when setting up the DMA, maybe mode selection?
552 case 0x34: // (0x0075)
553 case 0x44: // (0x0000)
554
555 // written immediately after length, maybe one of these is the actual trigger?, 4c is explicitly set to 0 after all operations are complete
556 case 0x4c: // (0x0101 - trigger) (0x0000 - after DMA)
557 case 0x5c: // (0x0008 - trigger?) after 0x4c
558 default:
559 LOG("%s: unhandled hng64_dmac_w (%04x) %08x (%08x)\n", machine().describe_context(), offset*4, data, mem_mask);
560 break;
561 }
562 }
563
hng64_rtc_w(offs_t offset,uint32_t data,uint32_t mem_mask)564 void hng64_state::hng64_rtc_w(offs_t offset, uint32_t data, uint32_t mem_mask)
565 {
566 if (offset & 1)
567 {
568 // RTC is mapped to 1 byte (4-bits used) in every 8 bytes so we can't even install this with a umask
569 m_rtc->write((offset >> 1) & 0xf, data);
570 }
571 else
572 {
573 // shouldn't happen unless something else is mapped here too
574 LOG("%s: unhandled hng64_rtc_w (%04x) %08x (%08x)\n", machine().describe_context(), offset*4, data, mem_mask);
575 }
576 }
577
hng64_mips_to_iomcu_irq_w(offs_t offset,uint32_t data,uint32_t mem_mask)578 void hng64_state::hng64_mips_to_iomcu_irq_w(offs_t offset, uint32_t data, uint32_t mem_mask)
579 {
580 // guess, written after a write to 0x00 in dpram, which is where the command goes, and the IRQ onthe MCU reads the command
581 LOG("%s: HNG64 writing to SYSTEM Registers %08x (%08x) (IO MCU IRQ TRIGGER?)\n", machine().describe_context(), data, mem_mask);
582 if (mem_mask & 0xffff0000) m_tempio_irqon_timer->adjust(attotime::zero);
583 }
584
hng64_irqc_r(offs_t offset,uint32_t mem_mask)585 uint32_t hng64_state::hng64_irqc_r(offs_t offset, uint32_t mem_mask)
586 {
587 if ((offset * 4) == 0x04)
588 {
589 LOG("%s: irq level READ %04x\n", machine().describe_context(), m_irq_level);
590 return m_irq_level;
591 }
592 else
593 {
594 LOG("%s: unhandled hng64_irqc_r (%04x) (%08x)\n", machine().describe_context(), offset*4, mem_mask);
595 }
596
597 return 0xffffffff;
598 }
599
hng64_irqc_w(offs_t offset,uint32_t data,uint32_t mem_mask)600 void hng64_state::hng64_irqc_w(offs_t offset, uint32_t data, uint32_t mem_mask)
601 {
602 switch (offset * 4)
603 {
604 //case 0x0c: // global irq mask? (probably not)
605 case 0x1c:
606 // IRQ ack
607 m_irq_pending &= ~(data&mem_mask);
608 set_irq(0x0000);
609 break;
610
611 default:
612 LOG("%s: unhandled hng64_irqc_w (%04x) %08x (%08x)\n", machine().describe_context(), offset * 4, data, mem_mask);
613 break;
614 }
615 }
616
617 /*
618 These 'sysregs' seem to be multiple sets of the same thing
619 (based on xrally)
620
621 the 0x1084 addresses appear to be related to the IO MCU, but neither sending commands to the MCU, not controlling lines directly
622 0x20 is written to 0x1084 in the MIPS IRQ handlers for the IO MCU (both 0x11 and 0x17 irq levels)
623
624 the 0x1074 address seems to be the same thing but for the network CPU
625 0x20 is written to 0x1074 in the MIPS IRQ handlers that seem to be associated with communication (levels 0x09, 0x0a, 0x0b, 0x0c)
626
627
628 -----
629 the following notes are taken from the old 'fake IO' function, in reality it turned out that these 'commands' were not needed
630 with the real IO MCU hooked up, although we still use the 0x0c one as a hack in order to provide the 'm_no_machine_error_code' value
631 in order to bypass a startup check, in reality it looks like that should be written by the MCU after reading it via serial.
632
633 ---- OUTDATED NOTES ----
634
635 I'm not really convinced these are commands in this sense based on code analysis, probably just a non-standard way of controlling the lines
636
637 command table:
638 0x0b = ? mode input polling (sams64, bbust2, sams64_2 & roadedge) (*)
639 0x0c = cut down connections, treats the dualport to be normal RAM
640 0x11 = ? mode input polling (fatfurwa, xrally, buriki) (*)
641 0x20 = asks for MCU machine code (probably not, this is also written in the function after the TLCS870 requests an interrupt on the MIPS)
642
643 (*) 0x11 is followed by 0x0b if the latter is used, JVS-esque indirect/direct mode?
644 ----
645 */
646
hng64_sysregs_r(offs_t offset,uint32_t mem_mask)647 uint32_t hng64_state::hng64_sysregs_r(offs_t offset, uint32_t mem_mask)
648 {
649 //LOG("%s: hng64_sysregs_r (%04x) (%08x)\n", machine().describe_context(), offset * 4, mem_mask);
650
651 switch(offset*4)
652 {
653 case 0x001c: return 0x00000000; // 0x00000040 must not be set or games won't boot
654 //case 0x106c:
655 //case 0x107c:
656 case 0x1084:
657 LOG("%s: HNG64 reading MCU status port (%08x)\n", machine().describe_context(), mem_mask);
658 return 0x00000002; //MCU->MIPS latch port
659 }
660
661 return m_sysregs[offset];
662 }
663
hng64_sysregs_w(offs_t offset,uint32_t data,uint32_t mem_mask)664 void hng64_state::hng64_sysregs_w(offs_t offset, uint32_t data, uint32_t mem_mask)
665 {
666 COMBINE_DATA (&m_sysregs[offset]);
667
668 #if 0
669 if(((offset*4) & 0xff00) == 0x1100)
670 printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, m_sysregs[offset], m_maincpu->pc());
671 #endif
672
673 switch(offset*4)
674 {
675 case 0x1084: //MIPS->MCU latch port
676 m_mcu_en = (data & 0xff); //command-based, i.e. doesn't control halt line and such?
677 LOG("%s: HNG64 writing to MCU control port %08x (%08x)\n", machine().describe_context(), data, mem_mask);
678 break;
679 default:
680 LOG("%s: HNG64 writing to SYSTEM Registers %08x %08x (%08x)\n", machine().describe_context(), offset*4, data, mem_mask);
681 }
682 }
683
684
685 /**************************************
686 * MIPS side Dual Port RAM hookup for MCU
687 **************************************/
688
hng64_dualport_r(offs_t offset)689 uint8_t hng64_state::hng64_dualport_r(offs_t offset)
690 {
691 LOG("%s: dualport R %04x\n", machine().describe_context(), offset);
692
693 // hack, this should just be put in ram at 0x600 by the MCU.
694 if (!(m_mcu_en == 0x0c))
695 {
696 switch (offset)
697 {
698 case 0x600: return m_no_machine_error_code;
699 }
700 }
701
702 return m_dt71321_dpram->right_r(offset);
703 }
704
705 /*
706 Beast Busters 2 outputs (all at offset == 0x1c):
707 0x00000001 start #1
708 0x00000002 start #2
709 0x00000004 start #3
710 0x00001000 gun #1
711 0x00002000 gun #2
712 0x00004000 gun #3
713 */
714
715
716 /*
717 MIPS clearly writes commands for the TLCS870 MCU at 00 here
718 first command it writes after the startup checks is 0x0a, it should also trigger an EXTINT0 on the TLCS870
719 around that time, as the EXTINT0 reads the command.
720
721 call at CBB0 in the MCU is to read the command from shared RAM
722 value is used in the jump table at CBC5
723 command 0x0a points at ccbd
724 which starts with a call to copy 0x40 bytes of data from 0x200 in shared RAM to the internal RAM of the MCU
725 the MIPS (at least in Fatal Fury) uploads this data to shared RAM prior to the call.
726
727 need to work out what triggers the interrupt, as a write to 0 wouldn't as the Dual Port RAM interrupts
728 are on addresses 0x7fe and 0x7ff (we're using an address near the system regs, based on code analysis
729 it seems correct, see hng64_mips_to_iomcu_irq_w )
730 */
731
hng64_dualport_w(offs_t offset,uint8_t data)732 void hng64_state::hng64_dualport_w(offs_t offset, uint8_t data)
733 {
734 m_dt71321_dpram->right_w(offset, data);
735 LOG("%s: dualport WRITE %04x %02x\n", machine().describe_context(), offset, data);
736 }
737
738 /************************************************************************************************************/
739
740 /* The following is guesswork, needs confirmation with a test on the real board. */
hng64_sprite_clear_even_w(offs_t offset,uint32_t data,uint32_t mem_mask)741 void hng64_state::hng64_sprite_clear_even_w(offs_t offset, uint32_t data, uint32_t mem_mask)
742 {
743 auto &mspace = m_maincpu->space(AS_PROGRAM);
744 uint32_t spr_offs;
745
746 spr_offs = (offset) * 0x10 * 4;
747
748 if(ACCESSING_BITS_16_31)
749 {
750 mspace.write_dword(0x20000000+0x00+0x00+spr_offs, 0x00000000);
751 mspace.write_dword(0x20000000+0x08+0x00+spr_offs, 0x00000000);
752 mspace.write_dword(0x20000000+0x10+0x00+spr_offs, 0x00000000);
753 mspace.write_dword(0x20000000+0x18+0x00+spr_offs, 0x00000000);
754 }
755 if(ACCESSING_BITS_8_15)
756 {
757 mspace.write_dword(0x20000000+0x00+0x20+spr_offs, 0x00000000);
758 mspace.write_dword(0x20000000+0x08+0x20+spr_offs, 0x00000000);
759 mspace.write_dword(0x20000000+0x10+0x20+spr_offs, 0x00000000);
760 mspace.write_dword(0x20000000+0x18+0x20+spr_offs, 0x00000000);
761 }
762 }
763
hng64_sprite_clear_odd_w(offs_t offset,uint32_t data,uint32_t mem_mask)764 void hng64_state::hng64_sprite_clear_odd_w(offs_t offset, uint32_t data, uint32_t mem_mask)
765 {
766 auto &mspace = m_maincpu->space(AS_PROGRAM);
767 uint32_t spr_offs;
768
769 spr_offs = (offset) * 0x10 * 4;
770
771 if(ACCESSING_BITS_16_31)
772 {
773 mspace.write_dword(0x20000000+0x04+0x00+spr_offs, 0x00000000);
774 mspace.write_dword(0x20000000+0x0c+0x00+spr_offs, 0x00000000);
775 mspace.write_dword(0x20000000+0x14+0x00+spr_offs, 0x00000000);
776 mspace.write_dword(0x20000000+0x1c+0x00+spr_offs, 0x00000000);
777 }
778 if(ACCESSING_BITS_0_15)
779 {
780 mspace.write_dword(0x20000000+0x04+0x20+spr_offs, 0x00000000);
781 mspace.write_dword(0x20000000+0x0c+0x20+spr_offs, 0x00000000);
782 mspace.write_dword(0x20000000+0x14+0x20+spr_offs, 0x00000000);
783 mspace.write_dword(0x20000000+0x1c+0x20+spr_offs, 0x00000000);
784 }
785 }
786
hng64_vregs_w(offs_t offset,uint32_t data,uint32_t mem_mask)787 void hng64_state::hng64_vregs_w(offs_t offset, uint32_t data, uint32_t mem_mask)
788 {
789 // printf("hng64_vregs_w %02x, %08x %08x\n", offset * 4, data, mem_mask);
790 COMBINE_DATA(&m_videoregs[offset]);
791 }
792
main_sound_comms_r(offs_t offset)793 uint16_t hng64_state::main_sound_comms_r(offs_t offset)
794 {
795 switch(offset *2)
796 {
797 case 0x04:
798 return sound_latch[0];
799 case 0x06:
800 return sound_latch[1];
801 default:
802 //printf("%08x R\n",offset*2);
803 break;
804 }
805 return 0;
806 }
807
main_sound_comms_w(offs_t offset,uint16_t data,uint16_t mem_mask)808 void hng64_state::main_sound_comms_w(offs_t offset, uint16_t data, uint16_t mem_mask)
809 {
810 switch(offset * 2)
811 {
812 case 0x00:
813 COMBINE_DATA(&main_latch[0]);
814 break;
815 case 0x02:
816 COMBINE_DATA(&main_latch[1]);
817 break;
818 case 0x08:
819 m_audiocpu->set_input_line(5, (data & 1) ? ASSERT_LINE : CLEAR_LINE);
820 if(data & 0xfe)
821 //printf("IRQ send %02x?\n",data);
822 break;
823 default:
824 //printf("%02x %04x\n",offset*2,data);
825 break;
826 }
827 }
828
829
hng_map(address_map & map)830 void hng64_state::hng_map(address_map &map)
831 {
832 // main RAM / ROM
833 map(0x00000000, 0x00ffffff).ram().share("mainram");
834 map(0x04000000, 0x05ffffff).nopw().rom().region("gameprg", 0).share("cart");
835
836 // Misc Peripherals
837 map(0x1f700000, 0x1f7010ff).rw(FUNC(hng64_state::hng64_sysregs_r), FUNC(hng64_state::hng64_sysregs_w)).share("sysregs"); // various things
838
839 map(0x1f701100, 0x1f70111f).rw(FUNC(hng64_state::hng64_irqc_r), FUNC(hng64_state::hng64_irqc_w));
840 map(0x1f701200, 0x1f70127f).rw(FUNC(hng64_state::hng64_dmac_r), FUNC(hng64_state::hng64_dmac_w));
841 // 1f702004 used (rarely writes 01 or a random looking value as part of init sequences)
842 map(0x1f702100, 0x1f70217f).rw(FUNC(hng64_state::hng64_rtc_r), FUNC(hng64_state::hng64_rtc_w));
843 map(0x1f7021c4, 0x1f7021c7).w(FUNC(hng64_state::hng64_mips_to_iomcu_irq_w));
844
845 // SRAM. Coin data, Player Statistics, etc.
846 map(0x1f800000, 0x1f803fff).ram().share("nvram");
847
848 // Dualport RAM (shared with IO MCU)
849 map(0x1f808000, 0x1f8087ff).rw(FUNC(hng64_state::hng64_dualport_r), FUNC(hng64_state::hng64_dualport_w)).umask32(0xffffffff);
850
851 // BIOS ROM
852 map(0x1fc00000, 0x1fc7ffff).nopw().rom().region("user1", 0).share("rombase");
853
854 // Sprites
855 map(0x20000000, 0x2000bfff).ram().share("spriteram");
856 map(0x2000d800, 0x2000e3ff).w(FUNC(hng64_state::hng64_sprite_clear_even_w));
857 map(0x2000e400, 0x2000efff).w(FUNC(hng64_state::hng64_sprite_clear_odd_w));
858 map(0x20010000, 0x20010013).ram().share("spriteregs");
859
860 // Backgrounds
861 map(0x20100000, 0x2017ffff).ram().w(FUNC(hng64_state::hng64_videoram_w)).share("videoram"); // Tilemap
862 map(0x20190000, 0x20190037).ram().w(FUNC(hng64_state::hng64_vregs_w)).share("videoregs");
863
864 // Mixing
865 map(0x20200000, 0x20203fff).ram().w(m_palette, FUNC(palette_device::write32)).share("palette");
866 map(0x20208000, 0x2020805f).w(FUNC(hng64_state::tcram_w)).share("tcram"); // Transition Control
867 map(0x20208000, 0x2020805f).r(FUNC(hng64_state::tcram_r));
868
869 // 3D display list control
870 map(0x20300000, 0x203001ff).w(FUNC(hng64_state::dl_w)); // 3d Display List
871 map(0x20300200, 0x20300203).w(FUNC(hng64_state::dl_upload_w)); // 3d Display List Upload
872 map(0x20300210, 0x20300213).w(FUNC(hng64_state::dl_unk_w)); // once, on startup
873 map(0x20300214, 0x20300217).w(FUNC(hng64_state::dl_control_w));
874 map(0x20300218, 0x2030021b).r(FUNC(hng64_state::dl_vreg_r));
875
876 // 3D framebuffer
877 map(0x30000000, 0x30000003).rw(FUNC(hng64_state::hng64_fbcontrol_r), FUNC(hng64_state::hng64_fbcontrol_w)).umask32(0xffffffff);
878 map(0x30000004, 0x30000007).w(FUNC(hng64_state::hng64_fbunkpair_w)).umask32(0xffff);
879 map(0x30000008, 0x3000000b).w(FUNC(hng64_state::hng64_fbscroll_w)).umask32(0xffff);
880 map(0x3000000c, 0x3000000f).w(FUNC(hng64_state::hng64_fbunkbyte_w)).umask32(0xffffffff);
881 map(0x30000010, 0x3000002f).rw(FUNC(hng64_state::hng64_fbtable_r), FUNC(hng64_state::hng64_fbtable_w)).share("fbtable");
882
883 map(0x30100000, 0x3015ffff).rw(FUNC(hng64_state::hng64_fbram1_r), FUNC(hng64_state::hng64_fbram1_w)).share("fbram1"); // 3D Display Buffer A
884 map(0x30200000, 0x3025ffff).rw(FUNC(hng64_state::hng64_fbram2_r), FUNC(hng64_state::hng64_fbram2_w)).share("fbram2"); // 3D Display Buffer B
885
886 // Sound
887 map(0x60000000, 0x601fffff).rw(FUNC(hng64_state::hng64_soundram2_r), FUNC(hng64_state::hng64_soundram2_w)); // actually seems unmapped, see note in audio/hng64.c
888 map(0x60200000, 0x603fffff).rw(FUNC(hng64_state::hng64_soundram_r), FUNC(hng64_state::hng64_soundram_w)); // program + data for V53A gets uploaded here
889
890 // These are sound ports of some sort
891 map(0x68000000, 0x6800000f).rw(FUNC(hng64_state::main_sound_comms_r), FUNC(hng64_state::main_sound_comms_w));
892 map(0x6f000000, 0x6f000003).w(FUNC(hng64_state::hng64_soundcpu_enable_w));
893
894 // Dualport RAM (shared with Communications CPU)
895 map(0xc0000000, 0xc0000fff).rw(FUNC(hng64_state::hng64_com_r), FUNC(hng64_state::hng64_com_w)).share("com_ram");
896 map(0xc0001000, 0xc0001007).ram().share("comhack");//.rw(FUNC(hng64_state::hng64_com_share_mips_r), FUNC(hng64_state::hng64_com_share_mips_w));
897 }
898
899
900 static INPUT_PORTS_START( hng64 ) // base port, for debugging
901 PORT_START("VBLANK")
902 PORT_BIT( 0xffffffff, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
903
904 PORT_START("IN0")
905 PORT_DIPNAME( 0x01, 0x01, "IN0" )
906 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
907 PORT_DIPSETTING( 0x01, DEF_STR( On ) )
908 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
909 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
910 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
911 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
912 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
913 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
914 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
915 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
916 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
917 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
918 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
919 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
920 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
921 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
922 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
923 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
924 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
925 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
926 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
927 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
928 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
929
930 PORT_START("IN1")
931 PORT_DIPNAME( 0x01, 0x01, "IN1" )
932 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
933 PORT_DIPSETTING( 0x01, DEF_STR( On ) )
934 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
935 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
936 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
937 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
938 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
939 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
940 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
941 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
942 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
943 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
944 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
945 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
946 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
947 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
948 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
949 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
950 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
951 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
952 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
953 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
954 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
955
956 PORT_START("IN2")
957 PORT_DIPNAME( 0x01, 0x01, "IN2" )
958 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
959 PORT_DIPSETTING( 0x01, DEF_STR( On ) )
960 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
961 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
962 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
963 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
964 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
965 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
966 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
967 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
968 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
969 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
970 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
971 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
972 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
973 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
974 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
975 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
976 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
977 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
978 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
979 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
980 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
981
982 PORT_START("IN3")
983 PORT_DIPNAME( 0x01, 0x01, "IN3" )
984 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
985 PORT_DIPSETTING( 0x01, DEF_STR( On ) )
986 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
987 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
988 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
989 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
990 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
991 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
992 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
993 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
994 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
995 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
996 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
997 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
998 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
999 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1000 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
1001 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1002 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1003 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
1004 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1005 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1006 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
1007
1008 PORT_START("IN4")
1009 PORT_DIPNAME( 0x01, 0x01, "IN4" )
1010 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1011 PORT_DIPSETTING( 0x01, DEF_STR( On ) )
1012 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
1013 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1014 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
1015 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1016 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1017 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
1018 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1019 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1020 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1021 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1022 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1023 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
1024 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1025 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1026 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
1027 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1028 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1029 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
1030 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1031 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1032 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
1033
1034 PORT_START("IN5")
1035 PORT_DIPNAME( 0x01, 0x01, "IN5" )
1036 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1037 PORT_DIPSETTING( 0x01, DEF_STR( On ) )
1038 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
1039 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1040 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
1041 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1042 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1043 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
1044 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1045 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1046 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1047 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1048 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1049 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
1050 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1051 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1052 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
1053 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1054 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1055 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
1056 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1057 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1058 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
1059
1060 PORT_START("IN6")
1061 PORT_DIPNAME( 0x01, 0x01, "IN6" )
1062 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1063 PORT_DIPSETTING( 0x01, DEF_STR( On ) )
1064 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
1065 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1066 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
1067 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1068 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1069 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
1070 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1071 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1072 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1073 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1074 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1075 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
1076 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1077 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1078 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
1079 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1080 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1081 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
1082 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1083 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1084 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
1085
1086 PORT_START("IN7")
1087 PORT_DIPNAME( 0x01, 0x01, "IN7" )
1088 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1089 PORT_DIPSETTING( 0x01, DEF_STR( On ) )
1090 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
1091 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1092 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
1093 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1094 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1095 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
1096 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1097 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1098 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1099 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1100 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1101 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
1102 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1103 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1104 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
1105 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1106 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1107 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
1108 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1109 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1110 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
1111
1112 PORT_START("AN0")
1113 PORT_START("AN1")
1114 PORT_START("AN2")
1115 PORT_START("AN3")
1116 PORT_START("AN4")
1117 PORT_START("AN5")
1118 PORT_START("AN6")
1119 PORT_START("AN7")
1120 INPUT_PORTS_END
1121
1122
1123 static INPUT_PORTS_START( hng64_fight )
1124 PORT_INCLUDE( hng64 )
1125
1126 PORT_MODIFY("IN0")
1127 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1128
1129 PORT_MODIFY("IN1")
1130 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1131
1132 PORT_MODIFY("IN2")
1133 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1134
1135 PORT_MODIFY("IN3")
1136 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1137
1138 PORT_MODIFY("IN4")
1139 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
1140 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
1141 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
1142 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
1143 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
1144 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
1145 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
1146 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1)
1147
1148 PORT_MODIFY("IN5") // why is this shifted, is it a bug in the TLCS870 emulation or intentional?
1149 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
1150 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
1151 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
1152 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
1153 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
1154 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
1155 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
1156 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
1157
1158 PORT_MODIFY("IN6")
1159 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
1160 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
1161 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
1162 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1163 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1164 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1165 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1166 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1167
1168 PORT_MODIFY("IN7")
1169 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) // Service
1170 PORT_SERVICE_NO_TOGGLE(0x02, IP_ACTIVE_LOW)
1171 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
1172 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1)
1173 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
1174 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
1175 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
1176 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
1177 INPUT_PORTS_END
1178
1179
1180 static INPUT_PORTS_START( hng64_drive )
1181 PORT_INCLUDE( hng64 )
1182
1183 PORT_MODIFY("IN0")
1184 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1185
1186 PORT_MODIFY("IN1")
1187 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1188
1189 PORT_MODIFY("IN2")
1190 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1191
1192 PORT_MODIFY("IN3")
1193 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1194
1195 PORT_MODIFY("IN4")
1196 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1197
1198 PORT_MODIFY("IN5")
1199 PORT_BIT( 0x1f, IP_ACTIVE_LOW, IPT_UNUSED )
1200 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("BGM 1")
1201 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("BGM 2")
1202 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("BGM 3")
1203
1204 PORT_MODIFY("IN6")
1205 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("BGM 4")
1206 PORT_BIT( 0x06, IP_ACTIVE_LOW, IPT_UNUSED )
1207 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("View 1")
1208 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("View 2")
1209 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Shift Down")
1210 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME("Shift Up")
1211 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
1212
1213 PORT_MODIFY("IN7")
1214 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) // Service
1215 PORT_SERVICE_NO_TOGGLE(0x02, IP_ACTIVE_LOW)
1216 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
1217 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1)
1218 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
1219 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
1220 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
1221 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
1222
1223 PORT_MODIFY("AN0")
1224 PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(30) PORT_KEYDELTA(60) PORT_PLAYER(1) PORT_NAME("Handle")
1225
1226 PORT_MODIFY("AN1")
1227 PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(50) PORT_KEYDELTA(60) PORT_PLAYER(1) PORT_NAME("Accelerator")
1228
1229 PORT_MODIFY("AN2")
1230 PORT_BIT( 0xff, 0x00, IPT_PEDAL2 ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(50) PORT_KEYDELTA(60) PORT_PLAYER(1) PORT_NAME("Brake")
1231 INPUT_PORTS_END
1232
1233
1234 static INPUT_PORTS_START( hng64_shoot )
1235 PORT_INCLUDE( hng64 )
1236
1237 PORT_MODIFY("IN0")
1238 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) //trigger
1239 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) //pump
1240 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) //bomb
1241 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
1242 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) //trigger
1243 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) //pump
1244 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) //bomb
1245 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
1246
1247 PORT_MODIFY("IN1")
1248 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3) //trigger
1249 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3) //pump
1250 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3) //bomb
1251 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
1252 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
1253 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1254 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START3 )
1255 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
1256
1257 PORT_MODIFY("IN2")
1258 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
1259 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1)
1260 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(1)
1261 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
1262 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
1263 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 )
1264 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE3 )
1265 PORT_SERVICE_NO_TOGGLE(0x80, IP_ACTIVE_LOW)
1266
1267 PORT_MODIFY("IN3") // Debug Port? - there are inputs to pause game, bring up a test menu, move the camera around etc.
1268 PORT_DIPNAME( 0x01, 0x01, "DEBUG" )
1269 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1270 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1271 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
1272 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1273 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1274 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1275 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1276 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1277 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1278 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1279 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1280 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1281 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1282 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1283 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1284 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1285 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1286 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1287 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1288 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1289 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1290 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1291 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1292
1293 PORT_MODIFY("IN4") // usual inputs are disconnected
1294 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1295
1296 PORT_MODIFY("IN5") // usual inputs are disconnected
1297 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1298
1299 PORT_MODIFY("IN6") // usual inputs are disconnected
1300 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1301
1302 PORT_MODIFY("IN7") // usual inputs are disconnected
1303 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
1304
1305 PORT_MODIFY("AN0")
1306 PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(25) PORT_KEYDELTA(7) PORT_REVERSE PORT_PLAYER(1)
1307
1308 PORT_MODIFY("AN1")
1309 PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_SENSITIVITY(25) PORT_KEYDELTA(7) PORT_REVERSE PORT_PLAYER(1)
1310
1311 PORT_MODIFY("AN2")
1312 PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(25) PORT_KEYDELTA(7) PORT_REVERSE PORT_PLAYER(2)
1313
1314 PORT_MODIFY("AN3")
1315 PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_SENSITIVITY(25) PORT_KEYDELTA(7) PORT_REVERSE PORT_PLAYER(2)
1316
1317 PORT_MODIFY("AN4")
1318 PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(25) PORT_KEYDELTA(7) PORT_REVERSE PORT_PLAYER(3)
1319
1320 PORT_MODIFY("AN5")
1321 PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_SENSITIVITY(25) PORT_KEYDELTA(7) PORT_REVERSE PORT_PLAYER(3)
1322 INPUT_PORTS_END
1323
1324
1325 static const gfx_layout hng64_8x8x4_tilelayout =
1326 {
1327 8,8,
1328 RGN_FRAC(1,1),
1329 4,
1330 { 0,1,2,3 },
1331 { 24, 28, 8, 12, 16, 20, 0, 4 },
1332 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
1333 8*32
1334 };
1335
1336 static const gfx_layout hng64_8x8x8_tilelayout =
1337 {
1338 8,8,
1339 RGN_FRAC(1,1),
1340 8,
1341 { 0,1,2,3,4,5,6,7 },
1342 { 24, 8, 16, 0,
1343 256+24, 256+8, 256+16, 256+0 },
1344 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
1345 16*32
1346 };
1347
1348 static const gfx_layout hng64_16x16x4_tilelayout =
1349 {
1350 16,16,
1351 RGN_FRAC(1,1),
1352 4,
1353 { 0,1,2,3 },
1354 { 24, 28, 8, 12, 16, 20, 0, 4,
1355 256+24, 256+28, 256+8, 256+12, 256+16, 256+20, 256+0, 256+4 },
1356 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
1357 16*32, 17*32, 18*32, 19*32, 20*32, 21*32, 22*32, 23*32 },
1358 32*32
1359 };
1360
1361 static const gfx_layout hng64_16x16x8_tilelayout =
1362 {
1363 16,16,
1364 RGN_FRAC(1,1),
1365 8,
1366 { 0,1,2,3,4,5,6,7 },
1367 { 24, 8, 16, 0,
1368 256+24, 256+8, 256+16, 256+0,
1369 1024+24, 1024+8, 1024+16, 1024+0,
1370 1280+24, 1280+8, 1280+16, 1280+0, },
1371 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
1372 16*32, 17*32, 18*32, 19*32, 20*32, 21*32, 22*32, 23*32 },
1373 64*32
1374 };
1375
1376 static const gfx_layout hng64_16x16x4_spritelayout =
1377 {
1378 16,16,
1379 RGN_FRAC(1,1),
1380 4,
1381 { 0,1,2,3 },
1382 { 56, 60, 24, 28, 48, 52, 16, 20, 40, 44, 8, 12, 32, 36, 0, 4 },
1383 { 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64, 8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
1384 16*64
1385 };
1386
1387 static const gfx_layout hng64_16x16x8_spritelayout =
1388 {
1389 16,16,
1390 RGN_FRAC(1,1),
1391 8,
1392 { 0,1,2,3,4,5,6,7 },
1393 { 56, 24, 48, 16, 40, 8, 32, 0,
1394 1024+56, 1024+24, 1024+48, 1024+16, 1024+40, 1024+8, 1024+32, 1024+0 },
1395 { 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64, 8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
1396 32*64
1397 };
1398
1399 static const uint32_t texlayout_xoffset[1024] = { STEP1024(0,8) };
1400 static const uint32_t texlayout_yoffset[512] = { STEP512(0,8192) };
1401 static const gfx_layout hng64_texlayout =
1402 {
1403 1024, 512,
1404 RGN_FRAC(1,1),
1405 8,
1406 { 0,1,2,3,4,5,6,7 },
1407 EXTENDED_XOFFS,
1408 EXTENDED_YOFFS,
1409 1024*512*8,
1410 texlayout_xoffset,
1411 texlayout_yoffset
1412 };
1413
1414 static GFXDECODE_START( gfx_hng64 )
1415 /* tilemap tiles */
1416 GFXDECODE_ENTRY( "scrtile", 0, hng64_8x8x4_tilelayout, 0x0, 0x100 )
1417 GFXDECODE_ENTRY( "scrtile", 0, hng64_8x8x8_tilelayout, 0x0, 0x10 )
1418 GFXDECODE_ENTRY( "scrtile", 0, hng64_16x16x4_tilelayout,0x0, 0x100 )
1419 GFXDECODE_ENTRY( "scrtile", 0, hng64_16x16x8_tilelayout,0x0, 0x10 )
1420
1421 /* sprite tiles */
1422 GFXDECODE_ENTRY( "sprtile", 0, hng64_16x16x4_spritelayout, 0x0, 0x100 )
1423 GFXDECODE_ENTRY( "sprtile", 0, hng64_16x16x8_spritelayout, 0x0, 0x10 )
1424
1425 GFXDECODE_ENTRY( "textures", 0, hng64_texlayout, 0x0, 0x10 ) /* textures */
1426 GFXDECODE_END
1427
hng64_reorder(uint8_t * gfxregion,size_t gfxregionsize)1428 static void hng64_reorder( uint8_t* gfxregion, size_t gfxregionsize)
1429 {
1430 // by default 2 4bpp tiles are stored in each 8bpp tile, this makes decoding in MAME harder than it needs to be
1431 // reorder them
1432 uint8_t tilesize = 4*8; // 4 bytes per line, 8 lines
1433
1434 std::vector<uint8_t> buffer(gfxregionsize);
1435
1436 for (int i = 0; i < gfxregionsize/2; i += tilesize)
1437 {
1438 memcpy(&buffer[i*2+tilesize], gfxregion+i, tilesize);
1439 memcpy(&buffer[i*2], gfxregion+i+(gfxregionsize/2), tilesize);
1440 }
1441
1442 memcpy(gfxregion, &buffer[0], gfxregionsize);
1443 }
1444
init_hng64_reorder_gfx()1445 void hng64_state::init_hng64_reorder_gfx()
1446 {
1447 hng64_reorder(memregion("scrtile")->base(), memregion("scrtile")->bytes());
1448 }
1449
init_hng64()1450 void hng64_state::init_hng64()
1451 {
1452 /* 1 meg of virtual address space for the com cpu */
1453 m_com_virtual_mem = std::make_unique<uint8_t[]>(0x100000);
1454 m_com_op_base = std::make_unique<uint8_t[]>(0x10000);
1455
1456 m_soundram = std::make_unique<uint16_t[]>(0x200000/2);
1457 m_soundram2 = std::make_unique<uint16_t[]>(0x200000/2);
1458
1459 init_hng64_reorder_gfx();
1460 }
1461
init_hng64_fght()1462 void hng64_state::init_hng64_fght()
1463 {
1464 m_no_machine_error_code = 0x01;
1465 init_hng64();
1466 }
1467
init_ss64()1468 void hng64_state::init_ss64()
1469 {
1470 init_hng64_fght();
1471 m_samsho64_3d_hack = 1;
1472 }
1473
init_hng64_drive()1474 void hng64_state::init_hng64_drive()
1475 {
1476 m_no_machine_error_code = 0x02;
1477 init_hng64();
1478 }
1479
init_roadedge()1480 void hng64_state::init_roadedge()
1481 {
1482 init_hng64_drive();
1483 m_roadedge_3d_hack = 1;
1484 }
1485
init_hng64_shoot()1486 void hng64_state::init_hng64_shoot()
1487 {
1488 m_no_machine_error_code = 0x03;
1489 init_hng64();
1490 }
1491
set_irq(uint32_t irq_vector)1492 void hng64_state::set_irq(uint32_t irq_vector)
1493 {
1494 /*
1495 TODO:
1496 - irq sources;
1497 - irq priority;
1498 - is there an irq mask mechanism?
1499 - is irq level cleared too when the irq acks?
1500
1501 IRQ level read at 0x80008cac
1502 IO RAM is at bf808000 on the MIPS
1503
1504 -- irq table in Fatal Fury WA - 'empty' entries just do minimum 'interrupt service' with no real function.
1505 80000400: 80039F20 irq00 vblank irq
1506 80000404: 80039F84 1rq01 jump based on ram content
1507 80000408: 8003A08C irq02 'empty'
1508 8000040C: 8006FF04 irq03 3d FIFO?
1509 80000410: A0000410 irq04 INVALID
1510 80000414: A0000414 irq05 INVALID
1511 80000418: A0000418 irq06 INVALID
1512 8000041C: A000041C irq07 INVALID
1513 80000420: A0000420 irq08 INVALID
1514 80000424: 8003A00C irq09 'empty' writes to sysreg 1074 instead of loading/storing regs tho
1515 80000428: 80039FD0 irq0a 'empty' writes to sysreg 1074 instead of loading/storing regs tho
1516 8000042C: 8003A0C0 irq0b 'empty'(network on xrally?) writes to sysreg 1074 instead of loading/storing regs tho
1517 80000430: 8003A050 irq0c 'empty' writes to sysreg 1074 instead of loading/storing regs tho
1518 80000434: A0000434 irq0d INVALID
1519 80000438: A0000438 irq0e INVALID
1520 8000043C: A000043C irq0f INVALID
1521 80000440: A0000440 irq10 INVALID
1522 80000444: 8003A0FC irq11 IO MCU related? write to sysreg 1084 instead of loading/storing regs, accesses dualport RAM
1523 80000448: A0000448 irq12 INVALID
1524 8000044C: A000044C irq13 INVALID
1525 80000450: A0000450 irq14 INVALID
1526 80000454: A0000454 irq15 INVALID
1527 80000458: A0000458 irq16 INVALID
1528 8000045C: 8003A1D4 irq17 'empty' write to sysreg 1084 instead of loading/storing regs tho (like irq 0x11)
1529 80000460: A0000460 irq18 INVALID
1530 (all other entries, invalid)
1531
1532 Xrally (invalid IRQs are more obviously invalid, pointing at 0)
1533 80000400: 80016ED0 irq00
1534 80000404: 80016F58 irq01
1535 80000408: 80017048 irq02
1536 8000040C: 80013484 irq03
1537 80000410: 00000000 irq04 INVALID
1538 80000414: 00000000 irq05 INVALID
1539 80000418: 00000000 irq06 INVALID
1540 8000041C: 00000000 irq07 INVALID
1541 80000420: 00000000 irq08 INVALID
1542 80000424: 80016FC8 irq09
1543 80000428: 80016F8C irq0a
1544 8000042C: 8001707C irq0b
1545 80000430: 8001700C irq0c
1546 80000434: 00000000 irq0d INVALID
1547 80000438: 00000000 irq0e INVALID
1548 8000043C: 00000000 irq0f INVALID
1549 80000440: 00000000 irq10 INVALID
1550 80000444: 800170C0 irq11
1551 80000448: 00000000 irq12 INVALID
1552 8000044C: 00000000 irq13 INVALID
1553 80000450: 00000000 irq14 INVALID
1554 80000454: 00000000 irq15 INVALID
1555 80000458: 00000000 irq16 INVALID
1556 8000045C: 80017198 irq17
1557 80000460: 00000000 irq18 INVALID
1558 (all other entries, invalid)
1559
1560 Buriki
1561 80000400: 800C49C4
1562 80000404: 800C4748
1563 80000408: 800C4828
1564 8000040C: 800C4B80
1565 80000410: 00000000
1566 80000414: 00000000
1567 80000418: 00000000
1568 8000041C: 00000000
1569 80000420: 00000000
1570 80000424: 800C47B0
1571 80000428: 800C4778
1572 8000042C: 800C4858
1573 80000430: 800C47F0
1574 80000434: 00000000
1575 80000438: 00000000
1576 8000043C: 00000000
1577 80000440: 00000000
1578 80000444: 800C4890
1579 80000448: 00000000
1580 8000044C: 00000000
1581 80000450: 00000000
1582 80000454: 00000000
1583 80000458: 00000000
1584 8000045C: 800C498C
1585 80000460: 00000000
1586
1587 Beast Busters 2
1588 80000400: 8000E9D8
1589 80000404: 8000EAFC
1590 80000408: 8000EBFC
1591 8000040C: 80012D90
1592 80000410: FFFFFFFF
1593 80000414: FFFFFFFF
1594 80000418: FFFFFFFF
1595 8000041C: FFFFFFFF
1596 80000420: FFFFFFFF
1597 80000424: 8000EB74
1598 80000428: 8000EB34
1599 8000042C: 8000EC34
1600 80000430: 8000EBBC
1601 80000434: FFFFFFFF
1602 80000438: FFFFFFFF
1603 8000043C: FFFFFFFF
1604 80000440: FFFFFFFF
1605 80000444: 8000E508
1606 80000448: FFFFFFFF
1607 8000044C: FFFFFFFF
1608 80000450: FFFFFFFF
1609 80000454: FFFFFFFF
1610 80000458: FFFFFFFF
1611 8000045C: FFFFFFFF irq17 INVALID (not even a stub routine here)
1612 80000460: FFFFFFFF
1613
1614 Roads Edge
1615 80000400: 80028B04
1616 80000404: 80028B88
1617 80000408: 80028C68
1618 8000040C: 80036FAC
1619 80000410: 00000000
1620 80000414: 00000000
1621 80000418: 00000000
1622 8000041C: 00000000
1623 80000420: 00000000
1624 80000424: 80028BF0
1625 80000428: 80028BB8
1626 8000042C: 80028C98
1627 80000430: 80028C30
1628 80000434: 00000000
1629 80000438: 00000000
1630 8000043C: 00000000
1631 80000440: 00000000
1632 80000444: 80027340
1633 80000448: 00000000
1634 8000044C: 00000000
1635 80000450: 00000000
1636 80000454: 00000000
1637 80000458: 00000000
1638 8000045C: 00000000 irq17 INVALID (not even a stub routine here)
1639 80000460: 00000000
1640
1641 SamSho 64 code is more complex, irqs point to functions that get a jump address from a fixed ram location for each IRQ, most are invalid tho?
1642 the ingame table is copied from 80005DD0
1643 bootup ingame
1644 80000400: 800C03E0 irq00 80005dd0 800c02e0 800cfcc8
1645 80000404: 800C041C irq01 80005dd4 800c0000
1646 80000408: 800C0458 irq02 80005dd8 800c0000
1647 8000040C: 800C0494 irq03 80005ddc 800c3054 800cfd58
1648 80000410: 800C04D0 irq04 80005de0 800c3070 800cfdf8 - interesting because this level is invalid on other games
1649 80000414: 800C032C irq05 80000478 00000000
1650 80000418: 800C0368 irq06 80000478 00000000
1651 8000041C: 800C03A4 irq07 80000478 00000000
1652 80000420: 800C050C irq08 80005df0 800c0000
1653 80000424: 800C0548 irq09 80005df4 800c0000
1654 80000428: 800C0584 irq0a 80005df8 800c0000
1655 8000042C: 800C05C0 irq0b 80005dfc 800c0000
1656 80000430: 800C05FC irq0c 80005e00 800c0000
1657 80000434: 800C02F0 irq0d 80000478 00000000
1658 80000438: 800C02F0 irq0e 80000478 00000000
1659 8000043C: 800C02F0 irq0f 80000478 00000000
1660 80000440: 800C0638 irq10 80005e10 800c0000
1661 80000444: 800C0674 irq11 80005e14 800c0000
1662 80000448: 800C06B0 irq12 80005e18 800c0000
1663 8000044C: 800C06EC irq13 80005e1c 800c0000
1664 80000450: 800C0728 irq14 80005e20 800c0000
1665 80000454: 800C0764 irq15 80005e24 800c0000
1666 80000458: 800C07A0 irq16 80005e28 800c0000
1667 8000045C: 800C07DC irq17 80005e2c 800c0000
1668 80000460: 00000000 (invalid)
1669
1670 SamSho 64 2 is the same types as SamSho 64
1671 bootup ingame
1672 80000400: 801008DC irq00 802011e0 801007e0 8011f6b4
1673 80000404: 80100918 irq01 802011e4 80100500
1674 80000408: 80100954 irq02 802011e8 80100500
1675 8000040C: 80100990 irq03 802011ec 80101b38 8011f7b8
1676 80000410: 801009CC irq04 802011f0 80101b54 80101b54
1677 80000414: 80100828 irq05 80000478 0000000b
1678 80000418: 80100864 irq06 80000478 0000000b
1679 8000041C: 801008A0 irq07 80000478 0000000b
1680 80000420: 80100A08 irq08 80201200 80100500
1681 80000424: 80100A44 irq09 80201204 80100500
1682 80000428: 80100A80 irq0a 80201208 80100500
1683 8000042C: 80100ABC irq0b 8020120c 80100500
1684 80000430: 80100AF8 irq0c 80201210 80100500
1685 80000434: 801007EC irq0d 80000478 0000000b
1686 80000438: 801007EC irq0e 80000478 0000000b
1687 8000043C: 801007EC irq0f 80000478 0000000b
1688 80000440: 80100B34 irq10 80201220 80100500
1689 80000444: 80100B70 irq11 80201224 80100500
1690 80000448: 80100BAC irq12 80201228 80100500
1691 8000044C: 80100BE8 irq13 8020122c 80100500
1692 80000450: 80100C24 irq14 80201230 80100500
1693 80000454: 80100C60 irq15 80201234 80100500
1694 80000458: 80100C9C irq16 80201238 80100500
1695 8000045C: 80100CD8 irq17 8020123c 80100500
1696 80000460: 00000000 (invalid)
1697
1698 Register 111c is connected to the interrupts and written in each one (IRQ ack / latch clear?)
1699
1700 HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000001. (PC=80009b54) 0x00 vblank irq
1701 HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000002. (PC=80009b5c) 0x01 <empty> (not empty of ffwa)
1702 HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000004. (PC=80009b64) 0x02 <empty>
1703 HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000008. (PC=80009b6c) 0x03 3d fifo processed irq
1704 00010
1705 00020
1706 00040
1707 00080
1708 00100
1709 HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000200. (PC=80009b70) 0x09
1710 HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000400. (PC=80009b78) 0x0a
1711 HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000800. (PC=80009b88) 0x0b network irq, needed by xrally and roadedge
1712 01000
1713 02000
1714 04000
1715 08000
1716 10000
1717 HNG64 writing to SYSTEM Registers 0x0000111c == 0x00020000. (PC=80009b80) 0x11 MCU related irq?
1718 40000
1719 80000
1720 100000
1721 200000
1722 400000
1723 800000 0x17 MCU related irq?
1724
1725 samsho64 / samsho64_2 does this during running:
1726 HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000000. (PC=800008fc) just checking?
1727 HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000040. (PC=800008fc) <- most notably causes TLBL error in fatfurwa
1728 */
1729
1730 m_irq_pending |= irq_vector;
1731
1732 if(m_irq_pending)
1733 {
1734 for(int i = 0; i < 31; i++)
1735 {
1736 if(m_irq_pending & 1 << i)
1737 {
1738 m_irq_level = i;
1739 break;
1740 }
1741 }
1742
1743 m_maincpu->set_input_line(0, ASSERT_LINE);
1744 }
1745 else
1746 m_maincpu->set_input_line(0, CLEAR_LINE);
1747 }
1748
TIMER_DEVICE_CALLBACK_MEMBER(hng64_state::hng64_irq)1749 TIMER_DEVICE_CALLBACK_MEMBER(hng64_state::hng64_irq)
1750 {
1751 int scanline = param;
1752
1753 switch(scanline)
1754 {
1755 case 224*2: set_irq(0x0001); break; // lv 0 vblank irq
1756 // case 0*2: set_irq(0x0002); break; // lv 1
1757 // case 32*2: set_irq(0x0008); break; // lv 2
1758 // case 64*2: set_irq(0x0008); break; // lv 2
1759 case 128*2: set_irq(0x0800); break; // lv 11 network irq?
1760 }
1761 }
1762
machine_start()1763 void hng64_state::machine_start()
1764 {
1765 /* set the fastest DRC options */
1766 m_maincpu->mips3drc_set_options(MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY);
1767
1768 /* configure fast RAM regions */
1769 m_maincpu->add_fastram(0x00000000, 0x00ffffff, false, m_mainram);
1770 m_maincpu->add_fastram(0x04000000, 0x05ffffff, true, m_cart);
1771 m_maincpu->add_fastram(0x1fc00000, 0x1fc7ffff, true, m_rombase);
1772
1773 for (int i = 0; i < 0x38 / 4; i++)
1774 {
1775 m_videoregs[i] = 0xdeadbeef;
1776 }
1777
1778 m_3dfifo_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(hng64_state::hng64_3dfifo_processed), this));
1779 m_comhack_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(hng64_state::comhack_callback), this));
1780
1781 init_io();
1782 }
1783
TIMER_CALLBACK_MEMBER(hng64_state::comhack_callback)1784 TIMER_CALLBACK_MEMBER(hng64_state::comhack_callback)
1785 {
1786 LOG("comhack_callback %04x\n\n", m_comhack[0]);
1787
1788 m_comhack[0] = m_comhack[0] | 0x0002;
1789 }
1790
1791
machine_reset()1792 void hng64_state::machine_reset()
1793 {
1794 /* For simulate MCU stepping */
1795 m_mcu_en = 0;
1796
1797 reset_net();
1798 reset_sound();
1799
1800 // on real hardware, even with no network, it takes until the counter reaches about 37 (Xtreme Rally) to boot, this kicks in at around 7
1801 m_comhack_timer->adjust(m_maincpu->cycles_to_attotime(400000000));
1802
1803 // does the HW init these to anything?
1804 m_fbcontrol[0] = 0x00;
1805 m_fbcontrol[1] = 0x00;
1806 m_fbcontrol[2] = 0x00;
1807 m_fbcontrol[3] = 0x00;
1808
1809 }
1810
1811 /***********************************************
1812
1813 Control / Lamp etc. access from MCU side?
1814
1815 this is probably 8 multiplexed 8-bit input / output ports (probably joysticks, coins etc.)
1816
1817 ***********************************************/
1818
ioport1_w(uint8_t data)1819 void hng64_state::ioport1_w(uint8_t data)
1820 {
1821 //LOG("%s: ioport1_w %02x\n", machine().describe_context(), data);
1822
1823 /* Port bits
1824
1825 aaac w-?-
1826
1827 a = external port number / address?
1828 c = toggled during read / write accesses, probably clocking byte from/to latch
1829
1830 ? = toggled at the start of extint 0 , set during reads?
1831
1832 w = set during writes?
1833
1834 */
1835
1836 m_port1 = data;
1837 }
1838
1839 // it does write 0xff here before each set of reading, but before setting a new output address?
ioport3_w(uint8_t data)1840 void hng64_state::ioport3_w(uint8_t data)
1841 {
1842
1843 if (m_port1 & 0x08) // 0x08 in port1 enables write? otherwise it writes 0xff to port 7 all the time, when port 7 is also lamps
1844 {
1845 int addr = (m_port1 & 0xe0) >> 5;
1846 m_lamps->lamps_w(addr, data);
1847 }
1848 }
1849
1850
ioport3_r()1851 uint8_t hng64_state::ioport3_r()
1852 {
1853 int addr = (m_port1&0xe0)>>5;
1854
1855 //LOG("%s: ioport3_r (from address %02x) (other bits of m_port1 %02x)\n", machine().describe_context(), addr, m_port1 & 0x1f);
1856 return m_in[addr]->read();
1857 }
1858
1859 DEFINE_DEVICE_TYPE(HNG64_LAMPS, hng64_lamps_device, "hng64_lamps", "HNG64 Lamps")
1860
hng64_lamps_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)1861 hng64_lamps_device::hng64_lamps_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
1862 : device_t(mconfig, HNG64_LAMPS, tag, owner, clock)
1863 , m_lamps_out_cb(*this)
1864 {
1865 }
1866
device_start()1867 void hng64_lamps_device::device_start()
1868 {
1869 m_lamps_out_cb.resolve_all_safe();
1870 }
1871
hng64_drive_lamps7_w(uint8_t data)1872 void hng64_state::hng64_drive_lamps7_w(uint8_t data)
1873 {
1874 /*
1875 0x80 - BGM Select #2 (Active High)
1876 0x40 - BGM Select #1 (Active High)
1877 0x20
1878 0x10
1879 0x08
1880 0x04
1881 0x02
1882 0x01
1883 */
1884 }
1885
hng64_drive_lamps6_w(uint8_t data)1886 void hng64_state::hng64_drive_lamps6_w(uint8_t data)
1887 {
1888 /*
1889 0x80 - BGM Select #4 (Active High)
1890 0x40 - BGM Select #3 (Active High)
1891 0x20 - Winning Lamp (0x00 = ON, 0x10 = Blink 1, 0x20 = Blink 2, 0x30 = OFF)
1892 0x10 - ^^
1893 0x08 - Breaking Lamp (Active Low?)
1894 0x04 - Start Lamp (Active High)
1895 0x02
1896 0x01 - Coin Counter #1
1897 */
1898 machine().bookkeeping().coin_counter_w(0, data & 0x01);
1899 }
1900
hng64_drive_lamps5_w(uint8_t data)1901 void hng64_state::hng64_drive_lamps5_w(uint8_t data)
1902 {
1903 // force feedback steering position
1904 }
1905
hng64_shoot_lamps7_w(uint8_t data)1906 void hng64_state::hng64_shoot_lamps7_w(uint8_t data)
1907 {
1908 /*
1909 0x80
1910 0x40 - Gun #3
1911 0x20 - Gun #2
1912 0x10 - Gun #1
1913 0x08
1914 0x04
1915 0x02
1916 0x01
1917 */
1918 }
1919
1920 /*
1921 Beast Busters 2 outputs (all written to offset 0x1c in dualport ram):
1922 0x00000001 start #1
1923 0x00000002 start #2
1924 0x00000004 start #3
1925 0x00001000 gun #1
1926 0x00002000 gun #2
1927 0x00004000 gun #3
1928 */
1929
hng64_shoot_lamps6_w(uint8_t data)1930 void hng64_state::hng64_shoot_lamps6_w(uint8_t data)
1931 {
1932 // Start Lamp #1 / #2 don't get written to the output port, is this a TLCS870 bug or are they not connected to the 'lamp' outputs, they do get written to the DP ram, see above notes
1933 /*
1934 0x80
1935 0x40
1936 0x20
1937 0x10
1938 0x08
1939 0x04 - Start Lamp #3
1940 0x02
1941 0x01
1942 */
1943 }
1944
hng64_fight_lamps6_w(uint8_t data)1945 void hng64_state::hng64_fight_lamps6_w(uint8_t data)
1946 {
1947 /*
1948 0x80
1949 0x40
1950 0x20
1951 0x10
1952 0x08
1953 0x04
1954 0x02 - Coin Counter #2
1955 0x01 - Coin Counter #1
1956 */
1957 machine().bookkeeping().coin_counter_w(0, data & 0x01);
1958 machine().bookkeeping().coin_counter_w(1, data & 0x02);
1959 }
1960
1961
1962 /***********************************************
1963
1964 Dual Port RAM access from MCU side
1965
1966 ***********************************************/
1967
ioport7_w(uint8_t data)1968 void hng64_state::ioport7_w(uint8_t data)
1969 {
1970 /* Port bits
1971
1972 i?xR Aacr
1973
1974 a = 0x200 of address bit to external RAM (direct?)
1975 A = 0x400 of address bit to external RAM (direct?)
1976 R = read / write mode? (if 1, write, if 0, read?)
1977
1978 r = counter reset? ( 1->0 ?)
1979 c = clock address? ( 1->0 ?)
1980
1981 x = written with clock bits, might be latch related?
1982 ? = written before some operations
1983
1984 i = generate interrupt on MIPS? (written after the MCU has completed writing 'results' of some operations to shared ram, before executing more code to write another result, so needs to be processed quickly by the MIPS?)
1985
1986 */
1987
1988 //LOG("%s: ioport7_w %02x\n", machine().describe_context(), data);
1989
1990 m_ex_ramaddr_upper = (data & 0x0c) >> 2;
1991
1992 if ((!(data & 0x80)) && (m_port7 & 0x80))
1993 {
1994 LOG("%s: MCU request MIPS IRQ?\n", machine().describe_context());
1995 set_irq(0x00020000);
1996 }
1997
1998 if ((!(data & 0x01)) && (m_port7 & 0x01))
1999 {
2000 m_ex_ramaddr = 0;
2001 }
2002
2003 if ((!(data & 0x02)) && (m_port7 & 0x02))
2004 {
2005 m_ex_ramaddr++;
2006 m_ex_ramaddr &= 0x1ff;
2007 }
2008
2009 m_port7 = data;
2010 }
2011
ioport0_r()2012 uint8_t hng64_state::ioport0_r()
2013 {
2014 uint16_t addr = (m_ex_ramaddr | (m_ex_ramaddr_upper<<9)) & 0x7ff;
2015 uint8_t ret = m_dt71321_dpram->left_r(addr);
2016
2017 LOG("%s: ioport0_r %02x (from address %04x)\n", machine().describe_context(), ret, addr);
2018 return ret;
2019 }
2020
ioport0_w(uint8_t data)2021 void hng64_state::ioport0_w(uint8_t data)
2022 {
2023 uint16_t addr = (m_ex_ramaddr | (m_ex_ramaddr_upper<<9)) & 0x7ff;
2024 m_dt71321_dpram->left_w(addr, data);
2025
2026 LOG("%s: ioport0_w %02x (to address %04x)\n", machine().describe_context(), data, addr);
2027 }
2028
2029
2030 /***********************************************
2031
2032 Unknown (LED?) access from MCU side
2033
2034 ***********************************************/
2035
2036 /* This port is dual purpose, with the upper pins being used as a serial input / output / clock etc. and the output latch (written data) being configured appropriately however the lower 2 bits also seem to be used
2037 maybe these lower 2 bits were intended for serial comms LEDs, although none are documented in the PCB layouts.
2038 */
ioport4_w(uint8_t data)2039 void hng64_state::ioport4_w(uint8_t data)
2040 {
2041 LOG("%s: ioport4_w %02x\n", machine().describe_context(), data);
2042 }
2043
2044 /***********************************************
2045
2046 Other port accesses from MCU side
2047
2048 ***********************************************/
2049
anport0_r()2050 uint8_t hng64_state::anport0_r() { return m_an_in[0]->read(); }
anport1_r()2051 uint8_t hng64_state::anport1_r() { return m_an_in[1]->read(); }
anport2_r()2052 uint8_t hng64_state::anport2_r() { return m_an_in[2]->read(); }
anport3_r()2053 uint8_t hng64_state::anport3_r() { return m_an_in[3]->read(); }
anport4_r()2054 uint8_t hng64_state::anport4_r() { return m_an_in[4]->read(); }
anport5_r()2055 uint8_t hng64_state::anport5_r() { return m_an_in[5]->read(); }
anport6_r()2056 uint8_t hng64_state::anport6_r() { return m_an_in[6]->read(); }
anport7_r()2057 uint8_t hng64_state::anport7_r() { return m_an_in[7]->read(); }
2058
2059 /***********************************************
2060
2061 Serial Accesses from MCU side
2062
2063 ***********************************************/
2064
2065 /* I think the serial reads / writes actually go to the network hardware, and the IO MCU is acting as an interface between the actual network and the KL5C80A12CFP
2066 because the network connectors are on the IO board. This might also be related to the 'm_no_machine_error_code' value required which differs per IO board
2067 type as the game startup sequences read that from the 0x6xx region of shared RAM, which also seems to be where a lot of the serial stuff is stored.
2068 */
2069
2070 // there are also serial reads, TLCS870 core doesn't support them yet
2071
WRITE_LINE_MEMBER(hng64_state::sio0_w)2072 WRITE_LINE_MEMBER( hng64_state::sio0_w )
2073 {
2074 // tlcs870 core provides better logging than anything we could put here at the moment
2075 }
2076
2077
2078
2079
TIMER_CALLBACK_MEMBER(hng64_state::tempio_irqon_callback)2080 TIMER_CALLBACK_MEMBER(hng64_state::tempio_irqon_callback)
2081 {
2082 LOG("timer_hack_on\n");
2083 m_iomcu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE );
2084 m_tempio_irqoff_timer->adjust(m_maincpu->cycles_to_attotime(1000));
2085 }
2086
TIMER_CALLBACK_MEMBER(hng64_state::tempio_irqoff_callback)2087 TIMER_CALLBACK_MEMBER(hng64_state::tempio_irqoff_callback)
2088 {
2089 LOG("timer_hack_off\n");
2090 m_iomcu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE );
2091 }
2092
2093
init_io()2094 void hng64_state::init_io()
2095 {
2096 m_tempio_irqon_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(hng64_state::tempio_irqon_callback), this));
2097 m_tempio_irqoff_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(hng64_state::tempio_irqoff_callback), this));
2098
2099 m_port7 = 0x00;
2100 m_port1 = 0x00;
2101 m_ex_ramaddr = 0;
2102 m_ex_ramaddr_upper = 0;
2103 }
2104
hng64(machine_config & config)2105 void hng64_state::hng64(machine_config &config)
2106 {
2107 /* basic machine hardware */
2108 VR4300BE(config, m_maincpu, HNG64_MASTER_CLOCK); // actually R4300
2109 m_maincpu->set_icache_size(16384);
2110 m_maincpu->set_dcache_size(16384);
2111 m_maincpu->set_addrmap(AS_PROGRAM, &hng64_state::hng_map);
2112
2113 TIMER(config, "scantimer", 0).configure_scanline(FUNC(hng64_state::hng64_irq), "screen", 0, 1);
2114
2115 NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
2116
2117 RTC62423(config, m_rtc, XTAL(32'768));
2118
2119 GFXDECODE(config, m_gfxdecode, m_palette, gfx_hng64);
2120
2121 SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
2122 m_screen->set_raw(PIXEL_CLOCK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART);
2123 m_screen->set_screen_update(FUNC(hng64_state::screen_update_hng64));
2124 m_screen->screen_vblank().set(FUNC(hng64_state::screen_vblank_hng64));
2125
2126 PALETTE(config, m_palette).set_format(palette_device::xRGB_888, 0x1000);
2127
2128 hng64_audio(config);
2129 hng64_network(config);
2130
2131 tmp87ph40an_device &iomcu(TMP87PH40AN(config, m_iomcu, 8_MHz_XTAL));
2132 iomcu.p0_in_cb().set(FUNC(hng64_state::ioport0_r)); // reads from shared ram
2133 //iomcu.p1_in_cb().set(FUNC(hng64_state::ioport1_r)); // the IO MCU code uses opcodes that only access the output latch, never read from the port
2134 //iomcu.p2_in_cb().set(FUNC(hng64_state::ioport2_r)); // the IO MCU uses EXTINT0 which shares one of the pins on this port, but the port is not used for IO
2135 iomcu.p3_in_cb().set(FUNC(hng64_state::ioport3_r)); // probably reads input ports?
2136 //iomcu.p4_in_cb().set(FUNC(hng64_state::ioport4_r)); // the IO MCU code uses opcodes that only access the output latch, never read from the port
2137 //iomcu.p5_in_cb().set(FUNC(hng64_state::ioport5_r)); // simply seems to be unused, neither used for an IO port, nor any of the other features
2138 //iomcu.p6_in_cb().set(FUNC(hng64_state::ioport6_r)); // the IO MCU code uses the ADC which shares pins with port 6, meaning port 6 isn't used as an IO port
2139 //iomcu.p7_in_cb().set(FUNC(hng64_state::ioport7_r)); // the IO MCU code uses opcodes that only access the output latch, never read from the port
2140 iomcu.p0_out_cb().set(FUNC(hng64_state::ioport0_w)); // writes to shared ram
2141 iomcu.p1_out_cb().set(FUNC(hng64_state::ioport1_w)); // configuration / clocking for input port (port 3) accesses
2142 //iomcu.p2_out_cb().set(FUNC(hng64_state::ioport2_w)); // the IO MCU uses EXTINT0 which shares one of the pins on this port, but the port is not used for IO
2143 iomcu.p3_out_cb().set(FUNC(hng64_state::ioport3_w)); // writes to ports for lamps, coin counters, force feedback etc.
2144 iomcu.p4_out_cb().set(FUNC(hng64_state::ioport4_w)); // unknown, lower 2 IO bits accessed along with serial accesses
2145 //iomcu.p5_out_cb().set(FUNC(hng64_state::ioport5_w)); // simply seems to be unused, neither used for an IO port, nor any of the other features
2146 //iomcu.p6_out_cb().set(FUNC(hng64_state::ioport6_w)); // the IO MCU code uses the ADC which shares pins with port 6, meaning port 6 isn't used as an IO port
2147 iomcu.p7_out_cb().set(FUNC(hng64_state::ioport7_w)); // configuration / clocking for shared ram (port 0) accesses
2148 // most likely the analog inputs, up to a maximum of 8
2149 iomcu.an0_in_cb().set(FUNC(hng64_state::anport0_r));
2150 iomcu.an1_in_cb().set(FUNC(hng64_state::anport1_r));
2151 iomcu.an2_in_cb().set(FUNC(hng64_state::anport2_r));
2152 iomcu.an3_in_cb().set(FUNC(hng64_state::anport3_r));
2153 iomcu.an4_in_cb().set(FUNC(hng64_state::anport4_r));
2154 iomcu.an5_in_cb().set(FUNC(hng64_state::anport5_r));
2155 iomcu.an6_in_cb().set(FUNC(hng64_state::anport6_r));
2156 iomcu.an7_in_cb().set(FUNC(hng64_state::anport7_r));
2157 // network related?
2158 iomcu.serial0_out_cb().set(FUNC(hng64_state::sio0_w));
2159 //iomcu.serial1_out_cb().set(FUNC(hng64_state::sio1_w)); // not initialized / used
2160
2161 IDT71321(config, "dt71321_dpram", 0);
2162 //MCFG_MB8421_INTL_AN0R(INPUTLINE("xxx", 0)) // I don't think the IRQs are connected
2163 }
2164
hng64_default(machine_config & config)2165 void hng64_state::hng64_default(machine_config &config)
2166 {
2167 hng64(config);
2168
2169 hng64_lamps_device &lamps(HNG64_LAMPS(config, m_lamps, 0));
2170 lamps.lamps0_out_cb().set(FUNC(hng64_state::hng64_default_lamps0_w));
2171 lamps.lamps1_out_cb().set(FUNC(hng64_state::hng64_default_lamps1_w));
2172 lamps.lamps2_out_cb().set(FUNC(hng64_state::hng64_default_lamps2_w));
2173 lamps.lamps3_out_cb().set(FUNC(hng64_state::hng64_default_lamps3_w));
2174 lamps.lamps4_out_cb().set(FUNC(hng64_state::hng64_default_lamps4_w));
2175 lamps.lamps5_out_cb().set(FUNC(hng64_state::hng64_default_lamps5_w));
2176 lamps.lamps6_out_cb().set(FUNC(hng64_state::hng64_default_lamps6_w));
2177 lamps.lamps7_out_cb().set(FUNC(hng64_state::hng64_default_lamps7_w));
2178 }
2179
hng64_drive(machine_config & config)2180 void hng64_state::hng64_drive(machine_config &config)
2181 {
2182 hng64(config);
2183
2184 hng64_lamps_device &lamps(HNG64_LAMPS(config, m_lamps, 0));
2185 lamps.lamps5_out_cb().set(FUNC(hng64_state::hng64_drive_lamps5_w)); // force feedback steering
2186 lamps.lamps6_out_cb().set(FUNC(hng64_state::hng64_drive_lamps6_w)); // lamps + coin counter
2187 lamps.lamps7_out_cb().set(FUNC(hng64_state::hng64_drive_lamps7_w)); // lamps
2188 }
2189
hng64_shoot(machine_config & config)2190 void hng64_state::hng64_shoot(machine_config &config)
2191 {
2192 hng64(config);
2193
2194 hng64_lamps_device &lamps(HNG64_LAMPS(config, m_lamps, 0));
2195 lamps.lamps6_out_cb().set(FUNC(hng64_state::hng64_shoot_lamps6_w)); // start lamps (some missing?!)
2196 lamps.lamps7_out_cb().set(FUNC(hng64_state::hng64_shoot_lamps7_w)); // gun lamps
2197 }
2198
hng64_fight(machine_config & config)2199 void hng64_state::hng64_fight(machine_config &config)
2200 {
2201 hng64(config);
2202
2203 hng64_lamps_device &lamps(HNG64_LAMPS(config, m_lamps, 0));
2204 lamps.lamps6_out_cb().set(FUNC(hng64_state::hng64_fight_lamps6_w)); // coin counters
2205 }
2206
2207
2208 #define ROM_LOAD_HNG64_BIOS(bios,name,offset,length,hash) \
2209 ROMX_LOAD(name, offset, length, hash, ROM_BIOS(bios))
2210
2211 /* All main BIOS roms are said to be from 'fighting' type PCB, it is unknown if the actual MIPS BIOS differs on the others, but it appears unlikely.
2212
2213 The IO MCU was dumped from a TMP87PH40AN type chip taken from an unknown IO board type.
2214
2215 Some boards instead use a TMP87CH40N but in all cases they're stickered SNK-IOJ1.00A so the content is possibly the same on all types.
2216
2217 This needs further studying of the MCU code as it is known that the different IO boards return a different ident value.
2218 */
2219
2220 #define HNG64_BIOS \
2221 /* R4300 BIOS code (main CPU) */ \
2222 ROM_REGION32_BE( 0x0100000, "user1", 0 ) \
2223 ROM_SYSTEM_BIOS( 0, "japan", "Japan" ) \
2224 ROM_LOAD_HNG64_BIOS( 0, "brom1.bin", 0x00000, 0x080000, CRC(a30dd3de) SHA1(3e2fd0a56214e6f5dcb93687e409af13d065ea30) ) \
2225 ROM_SYSTEM_BIOS( 1, "us", "USA" ) \
2226 ROM_LOAD_HNG64_BIOS( 1, "bios_us.bin", 0x00000, 0x080000, CRC(ab5948d6) SHA1(f8b940c1ae5ce2d3b2cd0c9bfaf6e5b063cec06e) ) \
2227 ROM_SYSTEM_BIOS( 2, "export", "Export" ) \
2228 ROM_LOAD_HNG64_BIOS( 2, "bios_export.bin", 0x00000, 0x080000, CRC(bbf07ec6) SHA1(5656aa077f6a6d43953f15b5123eea102a9d5313) ) \
2229 ROM_SYSTEM_BIOS( 3, "korea", "Korea" ) \
2230 ROM_LOAD_HNG64_BIOS( 3, "bios_korea.bin", 0x00000, 0x080000, CRC(ac953e2e) SHA1(f502188ef252b7c9d04934c4b525730a116de48b) ) \
2231 /* KL5C80 BIOS (network CPU) */ \
2232 ROM_REGION( 0x0100000, "user2", 0 ) \
2233 ROM_LOAD ( "from1.bin", 0x000000, 0x080000, CRC(6b933005) SHA1(e992747f46c48b66e5509fe0adf19c91250b00c7) ) \
2234 /* FPGA (unknown) */ \
2235 ROM_REGION( 0x0100000, "fpga", 0 ) /* FPGA data */ \
2236 ROM_LOAD ( "rom1.bin", 0x000000, 0x01ff32, CRC(4a6832dc) SHA1(ae504f7733c2f40450157cd1d3b85bc83fac8569) ) \
2237 /* TMP87PH40AN (I/O MCU) */ \
2238 ROM_REGION( 0x10000, "iomcu", 0 ) /* "64Bit I/O Controller Ver 1.0 1997.06.29(C)SNK" internal ID string */ \
2239 ROM_LOAD ( "tmp87ph40an.bin", 0x8000, 0x8000, CRC(b70df21f) SHA1(5b742e8a0bbf4c0ae4f4398d34c7058fb24acc92) )
2240
2241
2242 ROM_START( hng64 )
2243 /* BIOS */
2244 HNG64_BIOS
2245
2246 /* To placate MAME */
2247 ROM_REGION32_LE( 0x2000000, "gameprg", ROMREGION_ERASEFF )
2248 ROM_REGION( 0x4000, "scrtile", ROMREGION_ERASEFF )
2249 ROM_REGION( 0x4000, "sprtile", ROMREGION_ERASEFF )
2250 ROM_REGION( 0x1000000, "textures", ROMREGION_ERASEFF )
2251 ROM_REGION16_BE( 0x0c00000, "verts", ROMREGION_ERASEFF )
2252 ROM_REGION( 0x1000000, "l7a1045", ROMREGION_ERASEFF ) /* Sound Samples */
2253 ROM_END
2254
2255
2256 ROM_START( roadedge )
2257 HNG64_BIOS
2258
2259 ROM_REGION32_LE( 0x2000000, "gameprg", 0 )
2260 ROM_LOAD32_WORD( "001pr01b.81", 0x0000000, 0x400000, CRC(effbac30) SHA1(c1bddf3e511a8950f65ac7e452f81dbc4b7fd977) )
2261 ROM_LOAD32_WORD( "001pr02b.82", 0x0000002, 0x400000, CRC(b9aa4ad3) SHA1(9ab3c896dbdc45560b7127486e2db6ca3b15a057) )
2262
2263 /* Scroll Characters 8x8x8 / 16x16x8 */
2264 ROM_REGION( 0x1000000, "scrtile", 0 )
2265 ROM_LOAD16_BYTE( "001sc01a.41", 0x0000000, 0x400000, CRC(084395a1) SHA1(8bfea8fd3981fd45dcc04bd74840a5948aaf06a8) )
2266 ROM_LOAD16_BYTE( "001sc02a.42", 0x0000001, 0x400000, CRC(51dd19e3) SHA1(eeb3634294a049a357a75ee00aa9fce65b737395) )
2267 ROM_LOAD16_BYTE( "001sc03a.43", 0x0800000, 0x400000, CRC(0b6f3e19) SHA1(3b6dfd0f0633b0d8b629815920edfa39d92336bf) )
2268 ROM_LOAD16_BYTE( "001sc04a.44", 0x0800001, 0x400000, CRC(256c8c1c) SHA1(85935eea3722ec92f8d922f527c2e049c4185aa3) )
2269
2270 /* Sprite Characters - 8x8x8 / 16x16x8 */
2271 ROM_REGION( 0x1000000, "sprtile", 0 )
2272 ROM_LOAD32_BYTE( "001sp01a.53",0x0000000, 0x400000, CRC(7a469453) SHA1(3738ca76f538243bb23ffd23a42b2a0558882889) )
2273 ROM_LOAD32_BYTE( "001sp02a.54",0x0000001, 0x400000, CRC(6b9a3de0) SHA1(464c652f7b193326e3a871dfe751dd83c14284eb) )
2274 ROM_LOAD32_BYTE( "001sp03a.55",0x0000002, 0x400000, CRC(efbbd391) SHA1(7447c481ba6f9ba154d48a4b160dd24157891d35) )
2275 ROM_LOAD32_BYTE( "001sp04a.56",0x0000003, 0x400000, CRC(1a0eb173) SHA1(a69b786a9957197d1cc950ab046c57c18ca07ea7) )
2276
2277 /* Textures - 1024x1024x8 pages */
2278 ROM_REGION( 0x1000000, "textures", 0 )
2279 /* note: same roms are at different positions on the board, repeated a total of 4 times*/
2280 ROM_LOAD( "001tx01a.1", 0x0000000, 0x400000, CRC(f6539bb9) SHA1(57fc5583d56846be93d6f5784acd20fc149c70a5) )
2281 ROM_LOAD( "001tx02a.2", 0x0400000, 0x400000, CRC(f1d139d3) SHA1(f120243f4d55f38b10bf8d1aa861cdc546a24c80) )
2282 ROM_LOAD( "001tx03a.3", 0x0800000, 0x400000, CRC(22a375bd) SHA1(d55b62843d952930db110bcf3056a98a04a7adf4) )
2283 ROM_LOAD( "001tx04a.4", 0x0c00000, 0x400000, CRC(288a5bd5) SHA1(24e05db681894eb31cdc049cf42c1f9d7347bd0c) )
2284 ROM_LOAD( "001tx01a.5", 0x0000000, 0x400000, CRC(f6539bb9) SHA1(57fc5583d56846be93d6f5784acd20fc149c70a5) )
2285 ROM_LOAD( "001tx02a.6", 0x0400000, 0x400000, CRC(f1d139d3) SHA1(f120243f4d55f38b10bf8d1aa861cdc546a24c80) )
2286 ROM_LOAD( "001tx03a.7", 0x0800000, 0x400000, CRC(22a375bd) SHA1(d55b62843d952930db110bcf3056a98a04a7adf4) )
2287 ROM_LOAD( "001tx04a.8", 0x0c00000, 0x400000, CRC(288a5bd5) SHA1(24e05db681894eb31cdc049cf42c1f9d7347bd0c) )
2288 ROM_LOAD( "001tx01a.9", 0x0000000, 0x400000, CRC(f6539bb9) SHA1(57fc5583d56846be93d6f5784acd20fc149c70a5) )
2289 ROM_LOAD( "001tx02a.10",0x0400000, 0x400000, CRC(f1d139d3) SHA1(f120243f4d55f38b10bf8d1aa861cdc546a24c80) )
2290 ROM_LOAD( "001tx03a.11",0x0800000, 0x400000, CRC(22a375bd) SHA1(d55b62843d952930db110bcf3056a98a04a7adf4) )
2291 ROM_LOAD( "001tx04a.12",0x0c00000, 0x400000, CRC(288a5bd5) SHA1(24e05db681894eb31cdc049cf42c1f9d7347bd0c) )
2292 ROM_LOAD( "001tx01a.13",0x0000000, 0x400000, CRC(f6539bb9) SHA1(57fc5583d56846be93d6f5784acd20fc149c70a5) )
2293 ROM_LOAD( "001tx02a.14",0x0400000, 0x400000, CRC(f1d139d3) SHA1(f120243f4d55f38b10bf8d1aa861cdc546a24c80) )
2294 ROM_LOAD( "001tx03a.15",0x0800000, 0x400000, CRC(22a375bd) SHA1(d55b62843d952930db110bcf3056a98a04a7adf4) )
2295 ROM_LOAD( "001tx04a.16",0x0c00000, 0x400000, CRC(288a5bd5) SHA1(24e05db681894eb31cdc049cf42c1f9d7347bd0c) )
2296
2297 /* X,Y,Z Vertex ROMs */
2298 ROM_REGION( 0x0c00000, "verts", 0 )
2299 ROMX_LOAD( "001vt01a.17", 0x0000000, 0x400000, CRC(1a748e1b) SHA1(376d40baa3b94890d4740045d053faf208fe43db), ROM_GROUPWORD | ROM_SKIP(4) )
2300 ROMX_LOAD( "001vt02a.18", 0x0000002, 0x400000, CRC(449f94d0) SHA1(2228690532d82d2661285aeb4260689b027597cb), ROM_GROUPWORD | ROM_SKIP(4) )
2301 ROMX_LOAD( "001vt03a.19", 0x0000004, 0x400000, CRC(50ac8639) SHA1(dd2d3689466990a7c479bb8f11bd930ea45e47b5), ROM_GROUPWORD | ROM_SKIP(4) )
2302
2303 ROM_REGION( 0x1000000, "l7a1045", 0 ) /* Sound Samples */
2304 ROM_LOAD( "001sd01a.77", 0x0000000, 0x400000, CRC(a851da99) SHA1(2ba24feddafc5fadec155cdb7af305fdffcf6690) )
2305 ROM_LOAD( "001sd02a.78", 0x0400000, 0x400000, CRC(ca5cec15) SHA1(05e91a602728a048d61bf86aa8d43bb4186aeac1) )
2306 ROM_END
2307
2308
2309 ROM_START( sams64 )
2310 HNG64_BIOS
2311
2312 ROM_REGION32_LE( 0x2000000, "gameprg", 0 )
2313 ROM_LOAD32_WORD( "002-pro1a.81", 0x0000000, 0x400000, CRC(e5b907c5) SHA1(83637ffaa9031d41a5bed3397a519d1dfa8052cb) )
2314 ROM_LOAD32_WORD( "002-pro2a.82", 0x0000002, 0x400000, CRC(803ed2eb) SHA1(666db47886a316e68b911311e5db3bc0f5b8a34d) )
2315 ROM_LOAD32_WORD( "002-pro3a.83", 0x0800000, 0x400000, CRC(582156a7) SHA1(a7bbbd472a53072cbfaed5d41d4265123c9e3f3d) )
2316 ROM_LOAD32_WORD( "002-pro4a.84", 0x0800002, 0x400000, CRC(5a8291e9) SHA1(ec1e5a5a0ba37393e8b93d78b4ac855109d45ec9) )
2317
2318 /* Scroll Characters 8x8x8 / 16x16x8 */
2319 ROM_REGION( 0x2000000, "scrtile", 0 )
2320 ROM_LOAD16_BYTE( "002-sc01a.41", 0x0000000, 0x400000, CRC(77c3df69) SHA1(813d57814acccd2c04c951e58ac87cf7413bdf58) )
2321 ROM_LOAD16_BYTE( "002-sc02a.42", 0x0000001, 0x400000, CRC(60065174) SHA1(624c2e20abb53b2466df4ce2ffa9e20273798e92) )
2322 ROM_LOAD16_BYTE( "002-sc05a.45", 0x0800000, 0x400000, CRC(fd242bee) SHA1(b1fad97987da21c77d6c460bbed6f0dd18905ed4) )
2323 ROM_LOAD16_BYTE( "002-sc06a.46", 0x0800001, 0x400000, CRC(87afc297) SHA1(47d5eaae88ce501fbbd5a2d7305c1d6acadfb13e) )
2324 ROM_LOAD16_BYTE( "002-sc03a.43", 0x1000000, 0x400000, CRC(5d4a5289) SHA1(7a1576fdd344825cb05866c156d17b18f562a336) )
2325 ROM_LOAD16_BYTE( "002-sc04a.44", 0x1000001, 0x400000, CRC(aa5536fa) SHA1(09a50a29561ac97c564243da879bd7c4cf8c3cee) )
2326 ROM_LOAD16_BYTE( "002-sc07a.47", 0x1800000, 0x400000, CRC(e01e8a95) SHA1(b132214ef2b33a46cb605ea8f2193e77d9464881) )
2327 ROM_LOAD16_BYTE( "002-sc08a.48", 0x1800001, 0x400000, CRC(a17464d0) SHA1(2e6b73b1e0983b2b01455b0f4d6dc7c3845adb69) )
2328
2329 /* Sprite Characters - 8x8x8 / 16x16x8 */
2330 ROM_REGION( 0x2000000, "sprtile", 0 )
2331 ROM_LOAD32_BYTE( "002-sp01a.53",0x0000000, 0x400000, CRC(c73cf9b4) SHA1(7c34fa1bc03cd366d473dbf3e316a6434ee5ec60) )
2332 ROM_LOAD32_BYTE( "002-sp02a.54",0x0000001, 0x400000, CRC(04b0ecc8) SHA1(893e522324dd41dfcd2217974a6740e6bc3ea1d3) )
2333 ROM_LOAD32_BYTE( "002-sp03a.55",0x0000002, 0x400000, CRC(13c80b74) SHA1(ad6c1690ebcde0d8237201ea43eb162cd5308ccb) )
2334 ROM_LOAD32_BYTE( "002-sp04a.56",0x0000003, 0x400000, CRC(b1a6a06d) SHA1(1b11ee7cec46d0c99dc6310ee8221fa2de33c359) )
2335 ROM_LOAD32_BYTE( "002-sp05a.57",0x1000000, 0x400000, CRC(fa71e825) SHA1(adfa8b5a8ec703d4f04285c47f2618a294c90ec5) )
2336 ROM_LOAD32_BYTE( "002-sp06a.58",0x1000001, 0x400000, CRC(1bcfe48e) SHA1(8d85b1eb33fea48e5c6597d2fcbec903ecdad9d9) )
2337 ROM_LOAD32_BYTE( "002-sp07a.59",0x1000002, 0x400000, CRC(a5049bd7) SHA1(123e32c22f53d6e55ee1d1deb4ab40891004c6fd) )
2338 ROM_LOAD32_BYTE( "002-sp08a.60",0x1000003, 0x400000, CRC(c2e57813) SHA1(e7a21df1f94ed959a53da9dc4667863ee77bf676) )
2339
2340 /* Textures - 1024x1024x8 pages */
2341 ROM_REGION( 0x1000000, "textures", 0 )
2342 /* note: same roms are at different positions on the board, repeated a total of 4 times*/
2343 ROM_LOAD( "002-tx01a.13", 0x0000000, 0x400000, CRC(233749b5) SHA1(7c93681bbd5f4246e0dc50d26108f04e9b248d0d) )
2344 ROM_LOAD( "002-tx02a.14", 0x0400000, 0x400000, CRC(d5074be2) SHA1(c33e9b9f0d21ad5ad31d8f988b3c7378d374fc1b) )
2345 ROM_LOAD( "002-tx03a.15", 0x0800000, 0x400000, CRC(68c313f7) SHA1(90ce8d0d19a994647c7167e3b256ff31647e575a) )
2346 ROM_LOAD( "002-tx04a.16", 0x0c00000, 0x400000, CRC(f7dac24f) SHA1(1215354f28cbeb9fc38f6a7acae450ad5f34bb6a) )
2347
2348 /* X,Y,Z Vertex ROMs */
2349 ROM_REGION( 0x1800000, "verts", 0 )
2350 ROMX_LOAD( "002-vt01a.17", 0x0000000, 0x400000, CRC(403fd7fd) SHA1(9bdadbeb4cd13c4c4e89a1c233af9eaaa46f8fdf), ROM_GROUPWORD | ROM_SKIP(4) )
2351 ROMX_LOAD( "002-vt02a.18", 0x0000002, 0x400000, CRC(e1885905) SHA1(6b16083c50e887aebe2baf95bf56697c239970f2), ROM_GROUPWORD | ROM_SKIP(4) )
2352 ROMX_LOAD( "002-vt03a.19", 0x0000004, 0x400000, CRC(2074a6a6) SHA1(9a5e8259d1e19d2b43878c24ca06afba5ee5e316), ROM_GROUPWORD | ROM_SKIP(4) )
2353 ROMX_LOAD( "002-vt04a.20", 0x0c00000, 0x400000, CRC(aefc4d94) SHA1(f9d8222d4320ccf9f3c7c0ef307e03c8f34ea530), ROM_GROUPWORD | ROM_SKIP(4) )
2354 ROMX_LOAD( "002-vt05a.21", 0x0c00002, 0x400000, CRC(d32ee9cb) SHA1(a768dfc15899924eb05eccbf8e85cb29c7b60396), ROM_GROUPWORD | ROM_SKIP(4) )
2355 ROMX_LOAD( "002-vt06a.22", 0x0c00004, 0x400000, CRC(13bf3636) SHA1(7c704bf66b571350207bccc7a2d6ed1ec9de4cd5), ROM_GROUPWORD | ROM_SKIP(4) )
2356
2357 ROM_REGION( 0x1000000, "l7a1045", 0 ) /* Sound Samples */
2358 ROM_LOAD( "002-sd01a.77", 0x0000000, 0x400000, CRC(6215036b) SHA1(ded71dce98b7f7ef78ef32d966a292bbf0d15332) )
2359 ROM_LOAD( "002-sd02a.78", 0x0400000, 0x400000, CRC(32b28310) SHA1(5b80750a66c12b035b493d06e3842741a3334d0f) )
2360 ROM_LOAD( "002-sd03a.79", 0x0800000, 0x400000, CRC(53591413) SHA1(36c7efa1aced0ca38b3ce7b95af28755973698f3) )
2361 ROM_END
2362
2363
2364 ROM_START( xrally )
2365 HNG64_BIOS
2366
2367 ROM_REGION32_LE( 0x2000000, "gameprg", 0 )
2368 ROM_LOAD32_WORD( "003-pr01a.81", 0x0000000, 0x400000, CRC(4e160388) SHA1(08fba66d0f0dab47f7db5bc7d411f4fc0e8219c8) )
2369 ROM_LOAD32_WORD( "003-pr02a.82", 0x0000002, 0x400000, CRC(c4dd4f18) SHA1(4db0e6d5cabd9e4f82d5905556174b9eff8ad4d9) )
2370
2371 /* Scroll Characters 8x8x8 / 16x16x8 */
2372 ROM_REGION( 0x1000000, "scrtile", 0 )
2373 ROM_LOAD16_BYTE( "003-sc01a.41", 0x0000000, 0x400000, CRC(bc608584) SHA1(fa4b618eb36f302f58cefea7c50618a8318927d6) )
2374 ROM_LOAD16_BYTE( "003-sc02a.42", 0x0000001, 0x400000, CRC(c810e9e2) SHA1(4f0d35d9b0af2a4b66253e467c0d30a519c904b6) )
2375 ROM_LOAD16_BYTE( "003-sc03a.43", 0x0800000, 0x400000, CRC(12724653) SHA1(5e40947086883d64db84ac51a1b29efa2f173f58) )
2376 ROM_LOAD16_BYTE( "003-sc04a.44", 0x0800001, 0x400000, CRC(b0062c4d) SHA1(73c75b59dc1463ad80f805191f4605a6b4b1c321) )
2377
2378 /* Sprite Characters - 8x8x8 / 16x16x8 */
2379 ROM_REGION( 0x1000000, "sprtile", 0 )
2380 ROM_LOAD32_BYTE( "003-sp01a.53",0x0000000, 0x400000, CRC(12a329dc) SHA1(00929f3c460cce5a3657dec73d467731e59de564) )
2381 ROM_LOAD32_BYTE( "003-sp02a.54",0x0000001, 0x400000, CRC(ee9e5338) SHA1(681c2f34a2f292ce14fcbef4447ede7b949c7117) )
2382 ROM_LOAD32_BYTE( "003-sp03a.55",0x0000002, 0x400000, CRC(6fa8dff9) SHA1(500bd128e6568e9491e52676775e9239adc332fe) )
2383 ROM_LOAD32_BYTE( "003-sp04a.56",0x0000003, 0x400000, CRC(a98eec07) SHA1(de0c7db56b851daa369f37088bd536933372346f) )
2384
2385 /* Textures - 1024x1024x8 pages */
2386 ROM_REGION( 0x2000000, "textures", 0 )
2387 /* note: same roms are at different positions on the board, repeated a total of 4 times*/
2388 ROM_LOAD( "003-tx01a.13", 0x0000000, 0x400000, CRC(83ea2178) SHA1(931898f57564b8b9975e06df5ccfd8c84fc2fbe3) )
2389 ROM_LOAD( "003-tx02a.14", 0x0400000, 0x400000, CRC(7912f4be) SHA1(bca44c1415a25f2349857b2246e3ee7abe709a84) )
2390 ROM_LOAD( "003-tx03a.15", 0x0800000, 0x400000, CRC(a319c94e) SHA1(14d720cdd8b9411fd82a7b4b33ee5dbfdd01c9f8) )
2391 ROM_LOAD( "003-tx04a.16", 0x0c00000, 0x400000, CRC(16d7805b) SHA1(4cc7b2375832c2f9f20fe882e604a2a52bf07f6f) )
2392
2393 /* X,Y,Z Vertex ROMs */
2394 ROM_REGION( 0x0c00000, "verts", 0 )
2395 ROMX_LOAD( "003-vt01a.17", 0x0000000, 0x400000, CRC(3e5e275d) SHA1(74f5ec88c258bc224e271f7abeb02d6485e27d8c), ROM_GROUPWORD | ROM_SKIP(4) )
2396 ROMX_LOAD( "003-vt02a.18", 0x0000002, 0x400000, CRC(da7b956e) SHA1(c57cbb8c51145ae224faba5b6a1a7e61cb2bee64), ROM_GROUPWORD | ROM_SKIP(4) )
2397 ROMX_LOAD( "003-vt03a.19", 0x0000004, 0x400000, CRC(4fe72cb7) SHA1(9f8e662f0656f201924834d1ee78498d4223745e), ROM_GROUPWORD | ROM_SKIP(4) )
2398
2399 ROM_REGION( 0x1000000, "l7a1045", 0 ) /* Sound Samples */
2400 ROM_LOAD( "003-sd01a.77", 0x0000000, 0x400000, CRC(c43898ff) SHA1(0e49b87181b56c62a674d255d326f761942b99b1) )
2401 ROM_LOAD( "003-sd02a.78", 0x0400000, 0x400000, CRC(079a3d5a) SHA1(a97b052de69fee7d605cae30f5a228e6ffeabb26) )
2402 ROM_LOAD( "003-sd03a.79", 0x0800000, 0x400000, CRC(96c0991a) SHA1(01be872b3e307258236fe96a544417dd8a0bc8bd) )
2403 ROM_END
2404
2405
2406 ROM_START( bbust2 )
2407 HNG64_BIOS
2408
2409 ROM_REGION32_LE( 0x2000000, "gameprg", 0 )
2410 ROM_LOAD32_WORD( "004-pr01a.81", 0x0000000, 0x400000, CRC(7b836ece) SHA1(7a4a08251f1dd66c368ac203f5a006266e77f73d) )
2411 ROM_LOAD32_WORD( "004-pr02a.82", 0x0000002, 0x400000, CRC(8c55a988) SHA1(d9a61ac3d8550ce0ee6aab374c9f024912163180) )
2412 ROM_LOAD32_WORD( "004-pr03a.83", 0x0800000, 0x400000, CRC(f25a82dd) SHA1(74c0a03021ef424e0b9c3c818be297d2967b3012) )
2413 ROM_LOAD32_WORD( "004-pr04a.84", 0x0800002, 0x400000, CRC(9258312b) SHA1(fabac42c8a033e85d503be56f266f9386adff10b) )
2414
2415 /* Scroll Characters 8x8x8 / 16x16x8 */
2416 ROM_REGION( 0x1000000, "scrtile", 0 )
2417 ROM_LOAD16_BYTE( "004-sc01a.41", 0x0000000, 0x400000, CRC(0b52987e) SHA1(3c7b0ce9416dea8db4cf63431166fcfa7c3bb168) )
2418 ROM_LOAD16_BYTE( "004-sc02a.42", 0x0000001, 0x400000, CRC(6b55309d) SHA1(87761deed6d842075bbe13abc444ac502274eeba) )
2419 ROM_LOAD16_BYTE( "004-sc03a.43", 0x0800000, 0x400000, CRC(17302f01) SHA1(5b6a927c520e421aa31b9162d3e47b06069b4bd0) )
2420 ROM_LOAD16_BYTE( "004-sc04a.44", 0x0800001, 0x400000, CRC(db31d73c) SHA1(8a6847e367e87a081cd1499294935c45f1fb4794) )
2421
2422 /* Sprite Characters - 8x8x8 / 16x16x8 */
2423 ROM_REGION( 0x2000000, "sprtile", 0 )
2424 ROM_LOAD32_BYTE( "004-sp01a.53",0x0000000, 0x400000, CRC(72fe73c3) SHA1(82825705076c40558d414653386e3bf1d0693008) )
2425 ROM_LOAD32_BYTE( "004-sp02a.54",0x0000001, 0x400000, CRC(1ece1cff) SHA1(78d88e96df979a834b5af091d3feda8b9cd466e0) )
2426 ROM_LOAD32_BYTE( "004-sp03a.55",0x0000002, 0x400000, CRC(9049ab14) SHA1(0a19ccbd82f000eba19a0b407fa5765db0464cca) )
2427 ROM_LOAD32_BYTE( "004-sp04a.56",0x0000003, 0x400000, CRC(8f7fb914) SHA1(dd1709881bf1d9e233b4e794c0e2ce28d265f855) )
2428 ROM_LOAD32_BYTE( "004-sp05a.57",0x1000000, 0x400000, CRC(440ce760) SHA1(f6f256334c32fe7d25448fba73f8966c4c5b1cba) )
2429 ROM_LOAD32_BYTE( "004-sp06a.58",0x1000001, 0x400000, CRC(fc24d2e5) SHA1(073dcb21ec6cf9c6a81987a54c0e27a2db499341) )
2430 ROM_LOAD32_BYTE( "004-sp07a.59",0x1000002, 0x400000, CRC(bc580b81) SHA1(c668d0524fdc53c6ba2f3e5120f2dee7ce4279bb) )
2431 ROM_LOAD32_BYTE( "004-sp08a.60",0x1000003, 0x400000, CRC(d6c69bea) SHA1(24508c0ed0ca135316aec1c8239e8b755070384a) )
2432
2433 /* Textures - 1024x1024x8 pages */
2434 ROM_REGION( 0x1000000, "textures", 0 )
2435 /* note: same roms are at different positions on the board, repeated a total of 4 times*/
2436 ROM_LOAD( "004-tx01a.13", 0x0000000, 0x400000, CRC(12a78a20) SHA1(a5c1c8841cd0cb5efbf7408d908fa10a743e5c6f) )
2437 ROM_LOAD( "004-tx02a.14", 0x0400000, 0x400000, CRC(a36c6c34) SHA1(3e4ad293b064a7c05aa23447ff5f17010cae2863) )
2438 ROM_LOAD( "004-tx03a.15", 0x0800000, 0x400000, CRC(f46377c0) SHA1(bfa6fc3ab89599a4443577d18578569ad55774bd) )
2439 ROM_LOAD( "004-tx04a.16", 0x0c00000, 0x400000, CRC(b5f0ef01) SHA1(646bfb17b9e81aecf8db33d3a021f7769b262eda) )
2440
2441 /* X,Y,Z Vertex ROMs */
2442 ROM_REGION( 0x0c00000, "verts", 0 )
2443 ROMX_LOAD( "004-vt01a.17", 0x0000000, 0x400000, CRC(25ebbf9b) SHA1(b7c3fb9ee9cf75824d908e7a94970282f1845d5d), ROM_GROUPWORD | ROM_SKIP(4) )
2444 ROMX_LOAD( "004-vt02a.18", 0x0000002, 0x400000, CRC(279fc216) SHA1(eb90cc347745491c1d1b1fb611fd6e227310731c), ROM_GROUPWORD | ROM_SKIP(4) )
2445 ROMX_LOAD( "004-vt03a.19", 0x0000004, 0x400000, CRC(e0cf6a42) SHA1(dd09b3d05739cf030c820cd7dbaea2e7262764ab), ROM_GROUPWORD | ROM_SKIP(4) )
2446
2447 ROM_REGION( 0x1000000, "l7a1045", 0 ) /* Sound Samples */
2448 ROM_LOAD( "004-sd01a.77", 0x0000000, 0x400000, CRC(2ef868bd) SHA1(0a1ef002efe6738698ebe98a1c3695b151fdd282) )
2449 ROM_LOAD( "004-sd02a.78", 0x0400000, 0x400000, CRC(07fb3135) SHA1(56cc8e29ba9b13f82a4c9248bff02e2b7a0c49b0) )
2450 ROM_LOAD( "004-sd03a.79", 0x0800000, 0x400000, CRC(42571f1d) SHA1(425cbd3f7c8aea1c0f057ea8f186acffb0091dc0) )
2451 ROM_END
2452
2453
2454 ROM_START( sams64_2 )
2455 HNG64_BIOS
2456
2457 ROM_REGION32_LE( 0x2000000, "gameprg", 0 )
2458 ROM_LOAD32_WORD( "005pr01a.81", 0x0000000, 0x400000, CRC(a69d7700) SHA1(a580783a109bc3e24248d70bcd67f62dd7d8a5dd) )
2459 ROM_LOAD32_WORD( "005pr02a.82", 0x0000002, 0x400000, CRC(38b9e6b3) SHA1(d1dad8247d920cc66854a0096e1c7845842d2e1c) )
2460 ROM_LOAD32_WORD( "005pr03a.83", 0x0800000, 0x400000, CRC(0bc738a8) SHA1(79893b0e1c4a31e02ab385c4382684245975ae8f) )
2461 ROM_LOAD32_WORD( "005pr04a.84", 0x0800002, 0x400000, CRC(6b504852) SHA1(fcdcab432162542d249818a6cd15b8f2e8230f97) )
2462 ROM_LOAD32_WORD( "005pr05a.85", 0x1000000, 0x400000, CRC(32a743d3) SHA1(4088b930a1a4d6224a0939ef3942af1bf605cdb5) )
2463 ROM_LOAD32_WORD( "005pr06a.86", 0x1000002, 0x400000, CRC(c09fa615) SHA1(697d6769c16b3c8f73a6df4a1e268ec40cb30d51) )
2464 ROM_LOAD32_WORD( "005pr07a.87", 0x1800000, 0x400000, CRC(44286ad3) SHA1(1f890c74c0da0d34940a880468e68f7fb1417813) )
2465 ROM_LOAD32_WORD( "005pr08a.88", 0x1800002, 0x400000, CRC(d094eb67) SHA1(3edc8d608c631a05223e1d05157cd3daf2d6597a) )
2466
2467 /* Scroll Characters 8x8x8 / 16x16x8 */
2468 ROM_REGION( 0x4000000, "scrtile", 0 )
2469 ROM_LOAD16_BYTE( "005sc01a.97", 0x0000000, 0x800000, CRC(7f11cda9) SHA1(5fbdabd8423e9723a6ec38f8503e6ca7f4f69fdd) )
2470 ROM_LOAD16_BYTE( "005sc02a.99", 0x0000001, 0x800000, CRC(87d1e1a7) SHA1(00f2ef46ce64ab715add8cd47745c57944286f81) )
2471 ROM_LOAD16_BYTE( "005sc05a.98", 0x1000000, 0x800000, CRC(4475a3f8) SHA1(f099baf766ee00d166cfa8402baa0b6ea25a0010) )
2472 ROM_LOAD16_BYTE( "005sc06a.100", 0x1000001, 0x800000, CRC(41c0fbbd) SHA1(1d9ac01c9499a6202ee59d15d498ec34edc05888) )
2473 ROM_LOAD16_BYTE( "005sc03a.101", 0x2000000, 0x800000, CRC(a5d4c535) SHA1(089a3cd07701f025024ce73b7b4d38063c33a59f) )
2474 ROM_LOAD16_BYTE( "005sc04a.103", 0x2000001, 0x800000, CRC(14930d77) SHA1(b4c613a8896e21fe2cac0595dd1ea30dc7fce0bd) )
2475 ROM_LOAD16_BYTE( "005sc07a.102", 0x3000000, 0x800000, CRC(3505b198) SHA1(2fdfdd5a1f6f31f5fb1c0af70047108d1df44af2) )
2476 ROM_LOAD16_BYTE( "005sc08a.104", 0x3000001, 0x800000, CRC(3139e413) SHA1(38210541379ddeba8c0b9ef8fa5430c0090db7c7) )
2477
2478 /* Sprite Characters - 8x8x8 / 16x16x8 */
2479 ROM_REGION( 0x4000000, "sprtile", 0 )
2480 ROM_LOAD32_BYTE( "005sp01a.105",0x0000000, 0x800000, CRC(68eefee5) SHA1(d95bd7b549900500633af07544423b0062ac07ce) )
2481 ROM_LOAD32_BYTE( "005sp02a.109",0x0000001, 0x800000, CRC(5d9a49b9) SHA1(50768c496a3e0b4379e121349f32edec4f18652f) )
2482 ROM_LOAD32_BYTE( "005sp03a.113",0x0000002, 0x800000, CRC(9b6530fe) SHA1(398433b98578a6b4b950afc4d6318916376e0760) )
2483 ROM_LOAD32_BYTE( "005sp04a.117",0x0000003, 0x800000, CRC(d4e422ce) SHA1(9bfaa533ab3d014cdb0c535cf6952e01925cc30b) )
2484 ROM_LOAD32_BYTE( "005sp05a.106",0x2000000, 0x400000, CRC(d8b1fb26) SHA1(7da767d8e817c52afc416ccfe8caf30f66c233ef) )
2485 ROM_LOAD32_BYTE( "005sp06a.110",0x2000001, 0x400000, CRC(87ed72a0) SHA1(0d7db4dc9f15a0377a83f020ffbe81621ca77cff) )
2486 ROM_LOAD32_BYTE( "005sp07a.114",0x2000002, 0x400000, CRC(8eb3c173) SHA1(d5763c19a3e2fd93f7784d957e7401c9152c40de) )
2487 ROM_LOAD32_BYTE( "005sp08a.118",0x2000003, 0x400000, CRC(05486fbc) SHA1(747d9ae03ce999be4ab697753e93c90ea85b7d44) )
2488
2489 /* Textures - 1024x1024x8 pages */
2490 ROM_REGION( 0x1000000, "textures", 0 )
2491 /* note: same roms are at different positions on the board, repeated a total of 4 times*/
2492 ROM_LOAD( "005tx01a.1", 0x0000000, 0x400000, CRC(05a4ceb7) SHA1(2dfc46a70c0a957ed0931a4c4df90c341aafff70) )
2493 ROM_LOAD( "005tx02a.2", 0x0400000, 0x400000, CRC(b7094c69) SHA1(aed9a624166f6f1a2eb4e746c61f9f46f1929283) )
2494 ROM_LOAD( "005tx03a.3", 0x0800000, 0x400000, CRC(34764891) SHA1(cd6ea663ae28b7f6ac1ede2f9922afbb35b915b4) )
2495 ROM_LOAD( "005tx04a.4", 0x0c00000, 0x400000, CRC(6be50882) SHA1(1f99717cfa69076b258a0c52d66be007fd820374) )
2496 ROM_LOAD( "005tx01a.5", 0x0000000, 0x400000, CRC(05a4ceb7) SHA1(2dfc46a70c0a957ed0931a4c4df90c341aafff70) )
2497 ROM_LOAD( "005tx02a.6", 0x0400000, 0x400000, CRC(b7094c69) SHA1(aed9a624166f6f1a2eb4e746c61f9f46f1929283) )
2498 ROM_LOAD( "005tx03a.7", 0x0800000, 0x400000, CRC(34764891) SHA1(cd6ea663ae28b7f6ac1ede2f9922afbb35b915b4) )
2499 ROM_LOAD( "005tx04a.8", 0x0c00000, 0x400000, CRC(6be50882) SHA1(1f99717cfa69076b258a0c52d66be007fd820374) )
2500 ROM_LOAD( "005tx01a.9", 0x0000000, 0x400000, CRC(05a4ceb7) SHA1(2dfc46a70c0a957ed0931a4c4df90c341aafff70) )
2501 ROM_LOAD( "005tx02a.10",0x0400000, 0x400000, CRC(b7094c69) SHA1(aed9a624166f6f1a2eb4e746c61f9f46f1929283) )
2502 ROM_LOAD( "005tx03a.11",0x0800000, 0x400000, CRC(34764891) SHA1(cd6ea663ae28b7f6ac1ede2f9922afbb35b915b4) )
2503 ROM_LOAD( "005tx04a.12",0x0c00000, 0x400000, CRC(6be50882) SHA1(1f99717cfa69076b258a0c52d66be007fd820374) )
2504 ROM_LOAD( "005tx01a.13",0x0000000, 0x400000, CRC(05a4ceb7) SHA1(2dfc46a70c0a957ed0931a4c4df90c341aafff70) )
2505 ROM_LOAD( "005tx02a.14",0x0400000, 0x400000, CRC(b7094c69) SHA1(aed9a624166f6f1a2eb4e746c61f9f46f1929283) )
2506 ROM_LOAD( "005tx03a.15",0x0800000, 0x400000, CRC(34764891) SHA1(cd6ea663ae28b7f6ac1ede2f9922afbb35b915b4) )
2507 ROM_LOAD( "005tx04a.16",0x0c00000, 0x400000, CRC(6be50882) SHA1(1f99717cfa69076b258a0c52d66be007fd820374) )
2508
2509 /* X,Y,Z Vertex ROMs */
2510 ROM_REGION( 0x1800000, "verts", 0 )
2511 ROMX_LOAD( "005vt01a.17", 0x0000000, 0x400000, CRC(48a61479) SHA1(ef982b1ecc6dfca2ad989391afcc1b3d1e7fe652), ROM_GROUPWORD | ROM_SKIP(4) )
2512 ROMX_LOAD( "005vt02a.18", 0x0000002, 0x400000, CRC(ba9100c8) SHA1(f7704fb8e5310ea7d0e6ae6b8935717ec9119b6d), ROM_GROUPWORD | ROM_SKIP(4) )
2513 ROMX_LOAD( "005vt03a.19", 0x0000004, 0x400000, CRC(f54a28de) SHA1(c445cf7fee71a516065cf37e05b898208f48b17e), ROM_GROUPWORD | ROM_SKIP(4) )
2514 ROMX_LOAD( "005vt04a.20", 0x0c00000, 0x400000, CRC(57ad79c7) SHA1(bc382317323c1f8a31b69ae3100d3bba6b5d0838), ROM_GROUPWORD | ROM_SKIP(4) )
2515 ROMX_LOAD( "005vt05a.21", 0x0c00002, 0x400000, CRC(49c82bec) SHA1(09255279edb9a204bbe1cce8cef58d5c81e86d1f), ROM_GROUPWORD | ROM_SKIP(4) )
2516 ROMX_LOAD( "005vt06a.22", 0x0c00004, 0x400000, CRC(7ba05b6c) SHA1(729c1d182d74998dd904b587a2405f55af9825e0), ROM_GROUPWORD | ROM_SKIP(4) )
2517
2518 ROM_REGION( 0x1000000, "l7a1045", 0 ) /* Sound Samples */
2519 ROM_LOAD( "005sd01a.77", 0x0000000, 0x400000, CRC(8f68150f) SHA1(a1e5efdfd1ed29f81e25c8da669851ddb7b0c826) )
2520 ROM_LOAD( "005sd02a.78", 0x0400000, 0x400000, CRC(6b4da6a0) SHA1(8606c413c129635bdaaa37254edbfd19b10426bb) )
2521 ROM_LOAD( "005sd03a.79", 0x0800000, 0x400000, CRC(a529fab3) SHA1(8559d402c8f66f638590b8b57ec9efa775010c96) )
2522 ROM_LOAD( "005sd04a.80", 0x0c00000, 0x400000, CRC(dca95ead) SHA1(39afdfba0e5262b524f25706a96be00e5d14548e) )
2523 ROM_END
2524
2525
2526 ROM_START( fatfurwa )
2527 HNG64_BIOS
2528
2529 ROM_REGION32_LE( 0x2000000, "gameprg", 0 )
2530 ROM_LOAD32_WORD( "006pr01a.81", 0x0000000, 0x400000, CRC(3830efa1) SHA1(9d8c941ccb6cbe8d138499cf9d335db4ac7a9ec0) )
2531 ROM_LOAD32_WORD( "006pr02a.82", 0x0000002, 0x400000, CRC(8d5de84e) SHA1(e3ae014263f370c2836f62ab323f1560cb3a9cf0) )
2532 ROM_LOAD32_WORD( "006pr03a.83", 0x0800000, 0x400000, CRC(c811b458) SHA1(7d94e0df501fb086b2e5cf08905d7a3adc2c6472) )
2533 ROM_LOAD32_WORD( "006pr04a.84", 0x0800002, 0x400000, CRC(de708d6c) SHA1(2c9848e7bbf61c574370f9ecab5f5a6ba63339fd) )
2534
2535 /* Scroll Characters 8x8x8 / 16x16x8 */
2536 ROM_REGION( 0x4000000, "scrtile", 0 )
2537 ROM_LOAD16_BYTE( "006sc01a.97", 0x0000000, 0x800000, CRC(f13dffad) SHA1(86363aeae176fd4204e446c13a028da919dc2069) )
2538 ROM_LOAD16_BYTE( "006sc02a.99", 0x0000001, 0x800000, CRC(be79d42a) SHA1(f3eb950a62e2df1de116af9434027439f1305e1f) )
2539 ROM_LOAD16_BYTE( "006sc05a.98", 0x1000000, 0x800000, CRC(0487297b) SHA1(d3fa4d691559327739c96717312faf09b498001d) )
2540 ROM_LOAD16_BYTE( "006sc06a.100",0x1000001, 0x800000, CRC(34a76c31) SHA1(be05dc75afb7cde65ba5d29c0e66a7b1b62c41cb) )
2541 ROM_LOAD16_BYTE( "006sc03a.101",0x2000000, 0x800000, CRC(16918b73) SHA1(ad0c751a301fe3c95fca19473869dfd55fb6b0de) )
2542 ROM_LOAD16_BYTE( "006sc04a.103",0x2000001, 0x800000, CRC(9b63cd98) SHA1(62519a3a531c4493a5a85dc01ca69413977120ca) )
2543 ROM_LOAD16_BYTE( "006sc07a.102",0x3000000, 0x800000, CRC(7a1c371e) SHA1(1cd4ad66dd007adc9ab0c29720cbf9955c7337e0) )
2544 ROM_LOAD16_BYTE( "006sc08a.104",0x3000001, 0x800000, CRC(88232ade) SHA1(4ae2a572c3525087f77c95185e8697a1fc720512) )
2545
2546 /* Sprite Characters - 8x8x8 / 16x16x8 */
2547 ROM_REGION( 0x4000000, "sprtile", 0 )
2548 ROM_LOAD32_BYTE( "006sp01a.105",0x0000000, 0x800000, CRC(087b8c49) SHA1(bb1eb2baef7da91f904bf45414f21dd6bac30749) )
2549 ROM_LOAD32_BYTE( "006sp02a.109",0x0000001, 0x800000, CRC(da28631e) SHA1(ea7e2d9195cfa4f954f4d542296eec1323223653) )
2550 ROM_LOAD32_BYTE( "006sp03a.113",0x0000002, 0x800000, CRC(bb87b55b) SHA1(8644ebb356ae158244a6e03254b0212cb359e167) )
2551 ROM_LOAD32_BYTE( "006sp04a.117",0x0000003, 0x800000, CRC(2367a536) SHA1(304b5b7f7e5d41e69fbd4ac2a938c42f3766630e) )
2552 ROM_LOAD32_BYTE( "006sp05a.106",0x2000000, 0x800000, CRC(0eb8fd06) SHA1(c2b6fab1b0104910d7bb39d0a496ada39c5cc122) )
2553 ROM_LOAD32_BYTE( "006sp06a.110",0x2000001, 0x800000, CRC(dccc3f75) SHA1(fef8d259c17a78e2266fed965fba1e15f1cd01dd) )
2554 ROM_LOAD32_BYTE( "006sp07a.114",0x2000002, 0x800000, CRC(cd7baa1b) SHA1(4084f3a73aae623d69bd9de87cecf4a33b628b7f) )
2555 ROM_LOAD32_BYTE( "006sp08a.118",0x2000003, 0x800000, CRC(9c3044ac) SHA1(24b28bcc6be51ab3ff59c2894094cd03ec377d84) )
2556
2557 /* Textures - 1024x1024x8 pages */
2558 ROM_REGION( 0x1000000, "textures", 0 )
2559 /* note: same roms are at different positions on the board, repeated a total of 4 times*/
2560 ROM_LOAD( "006tx01a.1", 0x0000000, 0x400000, CRC(ab4c1747) SHA1(2c097bd38f1a92c4b6534992f6bf29fd6dc2d265) )
2561 ROM_LOAD( "006tx02a.2", 0x0400000, 0x400000, CRC(7854a229) SHA1(dba23c1b793dd0308ac1088c819543fff334a57e) )
2562 ROM_LOAD( "006tx03a.3", 0x0800000, 0x400000, CRC(94edfbd1) SHA1(d4004bb1273e6091608856cb4b151e9d81d5ed30) )
2563 ROM_LOAD( "006tx04a.4", 0x0c00000, 0x400000, CRC(82d61652) SHA1(28303ae9e2545a4cb0b5843f9e73407754f41e9e) )
2564 ROM_LOAD( "006tx01a.5", 0x0000000, 0x400000, CRC(ab4c1747) SHA1(2c097bd38f1a92c4b6534992f6bf29fd6dc2d265) )
2565 ROM_LOAD( "006tx02a.6", 0x0400000, 0x400000, CRC(7854a229) SHA1(dba23c1b793dd0308ac1088c819543fff334a57e) )
2566 ROM_LOAD( "006tx03a.7", 0x0800000, 0x400000, CRC(94edfbd1) SHA1(d4004bb1273e6091608856cb4b151e9d81d5ed30) )
2567 ROM_LOAD( "006tx04a.8", 0x0c00000, 0x400000, CRC(82d61652) SHA1(28303ae9e2545a4cb0b5843f9e73407754f41e9e) )
2568 ROM_LOAD( "006tx01a.9", 0x0000000, 0x400000, CRC(ab4c1747) SHA1(2c097bd38f1a92c4b6534992f6bf29fd6dc2d265) )
2569 ROM_LOAD( "006tx02a.10",0x0400000, 0x400000, CRC(7854a229) SHA1(dba23c1b793dd0308ac1088c819543fff334a57e) )
2570 ROM_LOAD( "006tx03a.11",0x0800000, 0x400000, CRC(94edfbd1) SHA1(d4004bb1273e6091608856cb4b151e9d81d5ed30) )
2571 ROM_LOAD( "006tx04a.12",0x0c00000, 0x400000, CRC(82d61652) SHA1(28303ae9e2545a4cb0b5843f9e73407754f41e9e) )
2572 ROM_LOAD( "006tx01a.13",0x0000000, 0x400000, CRC(ab4c1747) SHA1(2c097bd38f1a92c4b6534992f6bf29fd6dc2d265) )
2573 ROM_LOAD( "006tx02a.14",0x0400000, 0x400000, CRC(7854a229) SHA1(dba23c1b793dd0308ac1088c819543fff334a57e) )
2574 ROM_LOAD( "006tx03a.15",0x0800000, 0x400000, CRC(94edfbd1) SHA1(d4004bb1273e6091608856cb4b151e9d81d5ed30) )
2575 ROM_LOAD( "006tx04a.16",0x0c00000, 0x400000, CRC(82d61652) SHA1(28303ae9e2545a4cb0b5843f9e73407754f41e9e) )
2576
2577 /* X,Y,Z Vertex ROMs */
2578 ROM_REGION( 0x0c00000, "verts", 0 )
2579 ROMX_LOAD( "006vt01a.17", 0x0000000, 0x400000, CRC(5c20ed4c) SHA1(df679f518292d70b9f23d2bddabf975d56b96910), ROM_GROUPWORD | ROM_SKIP(4) )
2580 ROMX_LOAD( "006vt02a.18", 0x0000002, 0x400000, CRC(150eb717) SHA1(9acb067346eb386256047c0f1d24dc8fcc2118ca), ROM_GROUPWORD | ROM_SKIP(4) )
2581 ROMX_LOAD( "006vt03a.19", 0x0000004, 0x400000, CRC(021cfcaf) SHA1(fb8b5f50d3490b31f0a4c3e6d3ae1b98bae41c97), ROM_GROUPWORD | ROM_SKIP(4) )
2582
2583 ROM_REGION( 0x1000000, "l7a1045", 0 ) /* Sound Samples */
2584 ROM_LOAD( "006sd01a.77", 0x0000000, 0x400000, CRC(790efb6d) SHA1(23ddd3ee8ae808e58cbcaf92a9ef56d3ca6289b5) )
2585 ROM_LOAD( "006sd02a.78", 0x0400000, 0x400000, CRC(f7f020c7) SHA1(b72fde4ff6384b80166a3cb67d31bf7afda750bc) )
2586 ROM_LOAD( "006sd03a.79", 0x0800000, 0x400000, CRC(1a678084) SHA1(f52efb6145102d289f332d8341d89a5d231ba003) )
2587 ROM_LOAD( "006sd04a.80", 0x0c00000, 0x400000, CRC(3c280a5c) SHA1(9d3fc78e18de45382878268db47ff9d9716f1505) )
2588 ROM_END
2589
2590
2591 ROM_START( buriki )
2592 HNG64_BIOS
2593
2594 ROM_REGION32_LE( 0x2000000, "gameprg", 0 )
2595 ROM_LOAD32_WORD( "007pr01b.81", 0x0000000, 0x400000, CRC(a31202f5) SHA1(c657729b292d394ced021a0201a1c5608a7118ba) )
2596 ROM_LOAD32_WORD( "007pr02b.82", 0x0000002, 0x400000, CRC(a563fed6) SHA1(9af9a021beb814e35df968abe5a99225a124b5eb) )
2597 ROM_LOAD32_WORD( "007pr03a.83", 0x0800000, 0x400000, CRC(da5f6105) SHA1(5424cf5289cef66e301e968b4394e551918fe99b) )
2598 ROM_LOAD32_WORD( "007pr04a.84", 0x0800002, 0x400000, CRC(befc7bce) SHA1(83d9ecf944e03a40cf25ee288077c2265d6a588a) )
2599 ROM_LOAD32_WORD( "007pr05a.85", 0x1000000, 0x400000, CRC(013e28bc) SHA1(45e5ac45b42b26957c2877ac1042472c4b5ec914) )
2600 ROM_LOAD32_WORD( "007pr06a.86", 0x1000002, 0x400000, CRC(0620fccc) SHA1(e0bffc56b019c79276a4ef5ec7354edda15b0889) )
2601
2602 /* Scroll Characters 8x8x8 / 16x16x8 */
2603 ROM_REGION( 0x4000000, "scrtile", 0 )
2604 ROM_LOAD16_BYTE( "007sc01a.97", 0x0000000, 0x800000, CRC(4e8300db) SHA1(f1c9e6fddc10efc8f2a530027cca062f48b8c8d4) )
2605 ROM_LOAD16_BYTE( "007sc02a.99", 0x0000001, 0x800000, CRC(d5855944) SHA1(019c0bd2f8de7ffddd53df6581b40940262f0053) )
2606 ROM_LOAD16_BYTE( "007sc05a.98", 0x1000000, 0x400000, CRC(27f848c1) SHA1(2ee9cca4e68e56c7c17c8e2d7e0f55a34a5960bd) )
2607 ROM_LOAD16_BYTE( "007sc06a.100",0x1000001, 0x400000, CRC(c39e9b4c) SHA1(3c8a0494c2a6866ecc0df2c551619c57ee072440) )
2608 ROM_LOAD16_BYTE( "007sc03a.101",0x2000000, 0x800000, CRC(ff45c9b5) SHA1(ddcc2a10ccac62eb1f3671172ad1a4d163714fca) )
2609 ROM_LOAD16_BYTE( "007sc04a.103",0x2000001, 0x800000, CRC(e4cb59e9) SHA1(4e07ff374890217466a53d5bfb1fa99eb7402360) )
2610 ROM_LOAD16_BYTE( "007sc07a.102",0x3000000, 0x400000, CRC(753e7e3d) SHA1(39b2e9fd23878d8fc4f98fe88b466e963d8fc959) )
2611 ROM_LOAD16_BYTE( "007sc08a.104",0x3000001, 0x400000, CRC(b605928e) SHA1(558042b84115273fa581606daafba0e9688fa002) )
2612
2613 /* Sprite Characters - 8x8x8 / 16x16x8 */
2614 ROM_REGION( 0x4000000, "sprtile", 0 )
2615 ROM_LOAD32_BYTE( "007sp01a.105",0x0000000, 0x800000, CRC(160acae6) SHA1(37c15e1d2544ec6f3b61d06200345d6abdd28edf) )
2616 ROM_LOAD32_BYTE( "007sp02a.109",0x0000001, 0x800000, CRC(1a55331d) SHA1(0b03d5c7312e01874365b31f1ff3d9766abd00f1) )
2617 ROM_LOAD32_BYTE( "007sp03a.113",0x0000002, 0x800000, CRC(3f308444) SHA1(0acd52312c15a2ed3bacf60a2fd820cb09ebbb55) )
2618 ROM_LOAD32_BYTE( "007sp04a.117",0x0000003, 0x800000, CRC(6b81aa51) SHA1(55f7702e1d7a2bef7f050d0358de9036a0139877) )
2619 ROM_LOAD32_BYTE( "007sp05a.106",0x2000000, 0x400000, CRC(32d2fa41) SHA1(b16a0bbd397be2a8d532c85951b924e2e086a189) )
2620 ROM_LOAD32_BYTE( "007sp06a.110",0x2000001, 0x400000, CRC(b6f8d7f3) SHA1(70ce94f2193ee39218022da617413c42f6753574) )
2621 ROM_LOAD32_BYTE( "007sp07a.114",0x2000002, 0x400000, CRC(5caa1cc9) SHA1(3e40b10ea3bcf1239d0015da4be869632b805ddd) )
2622 ROM_LOAD32_BYTE( "007sp08a.118",0x2000003, 0x400000, CRC(7a158c67) SHA1(d66f4920a513208d45b908a1934d9afb894debf1) )
2623
2624 /* Textures - 1024x1024x8 pages */
2625 ROM_REGION( 0x1000000, "textures", 0 )
2626 /* note: same roms are at different positions on the board, repeated a total of 4 times*/
2627 ROM_LOAD( "007tx01a.1", 0x0000000, 0x400000, CRC(a7774075) SHA1(4f3da9af131a7efb0f0a5180da57c19c65fffb82) )
2628 ROM_LOAD( "007tx02a.2", 0x0400000, 0x400000, CRC(bc05d5fd) SHA1(84e3fafcebdeb1e2ffae80785949c973a14055d8) )
2629 ROM_LOAD( "007tx03a.3", 0x0800000, 0x400000, CRC(da9484fb) SHA1(f54b669a66400df00bf25436e5fd5c9bf68dbd55) )
2630 ROM_LOAD( "007tx04a.4", 0x0c00000, 0x400000, CRC(02aa3f46) SHA1(1fca89c70586f8ebcdf669ecac121afa5cdf623f) )
2631 ROM_LOAD( "007tx01a.5", 0x0000000, 0x400000, CRC(a7774075) SHA1(4f3da9af131a7efb0f0a5180da57c19c65fffb82) )
2632 ROM_LOAD( "007tx02a.6", 0x0400000, 0x400000, CRC(bc05d5fd) SHA1(84e3fafcebdeb1e2ffae80785949c973a14055d8) )
2633 ROM_LOAD( "007tx03a.7", 0x0800000, 0x400000, CRC(da9484fb) SHA1(f54b669a66400df00bf25436e5fd5c9bf68dbd55) )
2634 ROM_LOAD( "007tx04a.8", 0x0c00000, 0x400000, CRC(02aa3f46) SHA1(1fca89c70586f8ebcdf669ecac121afa5cdf623f) )
2635 ROM_LOAD( "007tx01a.9", 0x0000000, 0x400000, CRC(a7774075) SHA1(4f3da9af131a7efb0f0a5180da57c19c65fffb82) )
2636 ROM_LOAD( "007tx02a.10",0x0400000, 0x400000, CRC(bc05d5fd) SHA1(84e3fafcebdeb1e2ffae80785949c973a14055d8) )
2637 ROM_LOAD( "007tx03a.11",0x0800000, 0x400000, CRC(da9484fb) SHA1(f54b669a66400df00bf25436e5fd5c9bf68dbd55) )
2638 ROM_LOAD( "007tx04a.12",0x0c00000, 0x400000, CRC(02aa3f46) SHA1(1fca89c70586f8ebcdf669ecac121afa5cdf623f) )
2639 ROM_LOAD( "007tx01a.13",0x0000000, 0x400000, CRC(a7774075) SHA1(4f3da9af131a7efb0f0a5180da57c19c65fffb82) )
2640 ROM_LOAD( "007tx02a.14",0x0400000, 0x400000, CRC(bc05d5fd) SHA1(84e3fafcebdeb1e2ffae80785949c973a14055d8) )
2641 ROM_LOAD( "007tx03a.15",0x0800000, 0x400000, CRC(da9484fb) SHA1(f54b669a66400df00bf25436e5fd5c9bf68dbd55) )
2642 ROM_LOAD( "007tx04a.16",0x0c00000, 0x400000, CRC(02aa3f46) SHA1(1fca89c70586f8ebcdf669ecac121afa5cdf623f) )
2643
2644 /* X,Y,Z Vertex ROMs */
2645 ROM_REGION( 0x0c00000, "verts", 0 )
2646 ROMX_LOAD( "007vt01a.17", 0x0000000, 0x400000, CRC(f78a0376) SHA1(fde4ddd4bf326ae5f1ed10311c237b13b62e060c), ROM_GROUPWORD | ROM_SKIP(4) )
2647 ROMX_LOAD( "007vt02a.18", 0x0000002, 0x400000, CRC(f365f608) SHA1(035fd9b829b7720c4aee6fdf204c080e6157994f), ROM_GROUPWORD | ROM_SKIP(4) )
2648 ROMX_LOAD( "007vt03a.19", 0x0000004, 0x400000, CRC(ba05654d) SHA1(b7fe532732c0af7860c8eded3c5abd304d74e08e), ROM_GROUPWORD | ROM_SKIP(4) )
2649
2650 ROM_REGION( 0x1000000, "l7a1045", 0 ) /* Sound Samples */
2651 ROM_LOAD( "007sd01a.77", 0x0000000, 0x400000, CRC(1afb48c6) SHA1(b072d4fe72d6c5267864818d300b32e85b426213) )
2652 ROM_LOAD( "007sd02a.78", 0x0400000, 0x400000, CRC(c65f1dd5) SHA1(7f504c585a10c1090dbd1ac31a3a0db920c992a0) )
2653 ROM_LOAD( "007sd03a.79", 0x0800000, 0x400000, CRC(356f25c8) SHA1(5250865900894232960686f40c5da35b3868b78c) )
2654 ROM_LOAD( "007sd04a.80", 0x0c00000, 0x400000, CRC(dabfbbad) SHA1(7d58d5181705618e0e2d69c6fdb81b9b3d2b9e0f) )
2655 ROM_END
2656
2657 /* Bios */
2658 GAME( 1997, hng64, 0, hng64_default, hng64, hng64_state, init_hng64, ROT0, "SNK", "Hyper NeoGeo 64 Bios", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND|MACHINE_IS_BIOS_ROOT )
2659
2660 /* Games */
2661 GAME( 1997, roadedge, hng64, hng64_drive, hng64_drive, hng64_state, init_roadedge, ROT0, "SNK", "Roads Edge / Round Trip (rev.B)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) /* 001 */
2662 GAME( 1998, sams64, hng64, hng64_fight, hng64_fight, hng64_state, init_ss64, ROT0, "SNK", "Samurai Shodown 64 / Samurai Spirits 64", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) /* 002 */
2663 GAME( 1998, xrally, hng64, hng64_drive, hng64_drive, hng64_state, init_hng64_drive, ROT0, "SNK", "Xtreme Rally / Off Beat Racer!", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) /* 003 */
2664 GAME( 1998, bbust2, hng64, hng64_shoot, hng64_shoot, hng64_state, init_hng64_shoot, ROT0, "SNK", "Beast Busters 2nd Nightmare", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) /* 004 */
2665 GAME( 1998, sams64_2, hng64, hng64_fight, hng64_fight, hng64_state, init_ss64, ROT0, "SNK", "Samurai Shodown: Warrior's Rage / Samurai Spirits 2: Asura Zanmaden", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) /* 005 */
2666 GAME( 1998, fatfurwa, hng64, hng64_fight, hng64_fight, hng64_state, init_hng64_fght, ROT0, "SNK", "Fatal Fury: Wild Ambition (rev.A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) /* 006 */
2667 GAME( 1999, buriki, hng64, hng64_fight, hng64_fight, hng64_state, init_hng64_fght, ROT0, "SNK", "Buriki One (rev.B)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) /* 007 */
2668