1 // license:BSD-3-Clause
2 // copyright-holders:Mike Appolo
3 /***************************************************************************
4
5 Atari Major Havoc hardware
6
7 driver by Mike Appolo
8
9 Modified 10/08/2006 by Jess M. Askey to include support for Speech which was not used on production
10 Major Havoc PCB's. However, the hardware if used is functional. Speech is used in Major Havoc Return
11 to Vax.
12
13 Games supported:
14 * Alpha One
15 * Major Havoc
16 * Major Havoc: Return to Vax (including speech) - This version is a hack that includes 3 new levels
17 near the end of the game. Level 19 is incomplete.
18
19 Known bugs:
20 * none at this time
21
22 ****************************************************************************
23
24 MAJOR HAVOC (Driver)
25
26 Notes:
27
28 This game was provided in three configurations:
29 1) New Machine Purchase
30 2) Upgrade kit for Tempest (Kit "A")
31 3) Upgrade kit for Space Duel, Gravitar, and Black Window (Kit "B")
32
33 Controls on the machine were:
34 A backlit cylinder (roller) on new Major Havoc machines
35 or
36 A Tempest-like spinner on upgrades
37
38 All PCB pics point to this game using the 136002-125 PROM.
39 Page 4-30 of the operation manual states 6c is 136002-125, too.
40 However MAME had it using the 036408-01 PROM.
41 They have identical contents, anyway.
42
43 Memory Map for Major Havoc
44
45 Alpha Processor
46 D D D D D D D D
47 Hex Address 7 6 5 4 3 2 1 0 Function
48 --------------------------------------------------------------------------------
49 0000-01FF | D D D D D D D D | R/W | Program RAM (1/2K)
50 0200-07FF | D D D D D D D D | R/W | Paged Program RAM (3K)
51 0800-09FF | D D D D D D D D | R/W | Program RAM (1/2K)
52 | | |
53 1000 | D D D D D D D D | R | Gamma Commuication Read Port
54 | | |
55 1200 | D | R | Right Coin (Player 1=0)
56 1200 | D | R | Left Coin (Player 1=0)
57 1200 | D | R | Aux. Coin (Player 1=0)
58 1200 | D | R | Diagnostic Step
59 1200 | D | R | Self Test Switch (Player 1=1)
60 1200 | D | R | Cabinet Switch (Player 1=1)
61 1200 | D | R | Aux. Coin Switch (Player 1=1)
62 1200 | D | R | Diagnostic Step
63 1200 | D | R | Gammma Rcvd Flag
64 1200 | D | R | Gamma Xmtd Flag
65 1200 | D | R | 2.4 KHz
66 1200 | D | R | Vector Generator Halt Flag
67 | | |
68 1400-141F | D D D D | W | ColorRAM
69 | | |
70 1600 | D | W | Invert X
71 1600 | D | W | Invert Y
72 1600 | D | W | Player 1
73 1600 | D | W | Not Used
74 1600 | D | W | Gamma Proc. Reset
75 1600 | D | W | Beta Proc. Reset
76 1600 | D | W | Not Used
77 1600 | D | W | Roller Controller Light
78 | | |
79 1640 | | W | Vector Generator Go
80 1680 | | W | Watchdog Clear
81 16C0 | | W | Vector Generator Reset
82 | | |
83 1700 | | W | IRQ Acknowledge
84 1740 | D D | W | Program ROM Page Select
85 1780 | D | W | Program RAM Page Select
86 17C0 | D D D D D D D D | W | Gamma Comm. Write Port
87 | | |
88 1800-1FFF | D D D D D D D D | R/W | Shared Beta RAM(not used)
89 | | |
90 2000-3FFF | D D D D D D D D | R | Paged Program ROM (32K)
91 4000-4FFF | D D D D D D D D | R/W | Vector Generator RAM (4K)
92 5000-5FFF | D D D D D D D D | R | Vector Generator ROM (4K)
93 6000-7FFF | D D D D D D D D | R | Paged Vector ROM (32K)
94 8000-FFFF | D D D D D D D D | R | Program ROM (32K)
95 -------------------------------------------------------------------------------
96
97 Gamma Processor
98
99 D D D D D D D D
100 Hex Address 7 6 5 4 3 2 1 0 Function
101 --------------------------------------------------------------------------------
102 0000-07FF | D D D D D D D D | R/W | Program RAM (2K)
103 2000-203F | D D D D D D D D | R/W | Quad-Pokey I/O
104 | | |
105 2800 | D | R | Fire 1 Switch
106 2800 | D | R | Shield 1 Switch
107 2800 | D | R | Fire 2 Switch
108 2800 | D | R | Shield 2 Switch
109 2800 | D | R | N/C (floating, probably reads as 1)
110 2800 | D | R | /TIRDY (Speech Chip Ready)
111 2800 | D | R | Alpha Rcvd Flag
112 2800 | D | R | Alpha Xmtd Flag
113 | | |
114 3000 | D D D D D D D D | R | Alpha Comm. Read Port
115 | | |
116 3800-3803 | D D D D D D D D | R | Roller Controller Input
117 | | |
118 4000 | | W | IRQ Acknowledge
119 4800 | D | W | Left Coin Counter
120 4800 | D | W | Right Coin Counter
121 | | |
122 5000 | D D D D D D D D | W | Alpha Comm. Write Port
123 | | |
124 5800 | D D D D D D D D | W | Speech Data Write / Write Strobe Clear
125 5900 | | W | Speech Write Strobe Set
126 | | |
127 6000-61FF | D D D D D D D D | R/W | EEROM
128 8000-BFFF | D D D D D D D D | R | Program ROM (16K)
129 -----------------------------------------------------------------------------
130
131
132
133 MAJOR HAVOC DIP SWITCH SETTINGS
134
135 $=Default
136
137 DIP Switch at position 13/14S
138
139 1 2 3 4 5 6 7 8
140 STARTING LIVES _________________________________________
141 Free Play 1 Coin 2 Coin | | | | | | | | |
142 2 3 5 $|Off |Off | | | | | | |
143 3 4 4 | On | On | | | | | | |
144 4 5 6 | On |Off | | | | | | |
145 5 6 7 |Off | On | | | | | | |
146 GAME DIFFICULTY | | | | | | | | |
147 Hard | | | On | On | | | | |
148 Medium $| | |Off |Off | | | | |
149 Easy | | |Off | On | | | | |
150 Demo | | | On |Off | | | | |
151 BONUS LIFE | | | | | | | | |
152 50,000 | | | | | On | On | | |
153 100,000 $| | | | |Off |Off | | |
154 200,000 | | | | |Off | On | | |
155 No Bonus Life | | | | | On |Off | | |
156 ATTRACT MODE SOUND | | | | | | | | |
157 Silence | | | | | | | On | |
158 Sound $| | | | | | |Off | |
159 ADAPTIVE DIFFICULTY | | | | | | | | |
160 No | | | | | | | | On |
161 Yes $| | | | | | | |Off |
162 -----------------------------------------
163
164 DIP Switch at position 8S
165
166 1 2 3 4 5 6 7 8
167 _________________________________________
168 Free Play | | | | | | | On |Off |
169 1 Coin for 1 Game | | | | | | |Off |Off |
170 1 Coin for 2 Games | | | | | | | On | On |
171 2 Coins for 1 Game $| | | | | | |Off | On |
172 RIGHT COIN MECHANISM | | | | | | | | |
173 x1 $| | | | |Off |Off | | |
174 x4 | | | | |Off | On | | |
175 x5 | | | | | On |Off | | |
176 x6 | | | | | On | On | | |
177 LEFT COIN MECHANISM | | | | | | | | |
178 x1 $| | | |Off | | | | |
179 x2 | | | | On | | | | |
180 BONUS COIN ADDER | | | | | | | | |
181 No Bonus Coins $|Off |Off |Off | | | | | |
182 Every 4, add 1 |Off | On |Off | | | | | |
183 Every 4, add 2 |Off | On | On | | | | | |
184 Every 5, add 1 | On |Off |Off | | | | | |
185 Every 3, add 1 | On |Off | On | | | | | |
186 -----------------------------------------
187
188 2 COIN MINIMUM OPTION: Short pin 6 @13N to ground.
189
190 ***************************************************************************/
191
192 #include "emu.h"
193 #include "includes/mhavoc.h"
194
195 #include "cpu/m6502/m6502.h"
196 #include "video/avgdvg.h"
197 #include "video/vector.h"
198 #include "machine/eeprompar.h"
199 #include "machine/rescap.h"
200 #include "machine/watchdog.h"
201 #include "screen.h"
202 #include "speaker.h"
203
204
205 /* Quad pokey hookup (based on schematics):
206 Address: 543210
207 |||||\- pokey A0
208 ||||\-- pokey A1
209 |||\--- pokey A2
210 ||\---- pokey chip number LSB
211 |\----- pokey chip number MSB
212 \------ pokey A3
213 */
quad_pokeyn_r(offs_t offset)214 uint8_t mhavoc_state::quad_pokeyn_r(offs_t offset)
215 {
216 int pokey_num = (offset >> 3) & ~0x04;
217 int control = (offset & 0x20) >> 2;
218 int pokey_reg = (offset & 0x7) | control;
219
220 return m_pokey[pokey_num]->read(pokey_reg);
221 }
222
quad_pokeyn_w(offs_t offset,uint8_t data)223 void mhavoc_state::quad_pokeyn_w(offs_t offset, uint8_t data)
224 {
225 int pokey_num = (offset >> 3) & ~0x04;
226 int control = (offset & 0x20) >> 2;
227 int pokey_reg = (offset & 0x7) | control;
228
229 m_pokey[pokey_num]->write(pokey_reg, data);
230 }
231
232
233 /*************************************
234 *
235 * Alpha One: dual POKEY?
236 *
237 *************************************/
238 /* dual pokey hookup (presumably, based on the prototype code):
239 Address: 43210
240 ||||\- pokey A0
241 |||\-- pokey A1
242 ||\--- pokey A2
243 |\---- pokey chip number
244 \----- pokey A3
245 */
dual_pokey_r(offs_t offset)246 uint8_t mhavoc_state::dual_pokey_r(offs_t offset)
247 {
248 int pokey_num = (offset >> 3) & 0x01;
249 int control = (offset & 0x10) >> 1;
250 int pokey_reg = (offset & 0x7) | control;
251
252 return m_pokey[pokey_num]->read(pokey_reg);
253 }
254
255
dual_pokey_w(offs_t offset,uint8_t data)256 void mhavoc_state::dual_pokey_w(offs_t offset, uint8_t data)
257 {
258 int pokey_num = (offset >> 3) & 0x01;
259 int control = (offset & 0x10) >> 1;
260 int pokey_reg = (offset & 0x7) | control;
261
262 m_pokey[pokey_num]->write(pokey_reg, data);
263 }
264
265
266 /*************************************
267 *
268 * Alpha CPU memory handlers
269 *
270 *************************************/
271
alpha_map(address_map & map)272 void mhavoc_state::alpha_map(address_map &map)
273 {
274 map(0x0000, 0x01ff).ram();
275 map(0x0200, 0x07ff).bankrw("bank1").share("zram0");
276 map(0x0800, 0x09ff).ram();
277 map(0x0a00, 0x0fff).bankrw("bank1").share("zram1");
278 map(0x1000, 0x1000).r(FUNC(mhavoc_state::mhavoc_gamma_r)); /* Gamma Read Port */
279 map(0x1200, 0x1200).portr("IN0").nopw(); /* Alpha Input Port 0 */
280 map(0x1400, 0x141f).ram().share("avg:colorram"); /* ColorRAM */
281 map(0x1600, 0x1600).w(FUNC(mhavoc_state::mhavoc_out_0_w)); /* Control Signals */
282 map(0x1640, 0x1640).w("avg", FUNC(avg_mhavoc_device::go_w)); /* Vector Generator GO */
283 map(0x1680, 0x1680).w("watchdog", FUNC(watchdog_timer_device::reset_w)); /* Watchdog Clear */
284 map(0x16c0, 0x16c0).w("avg", FUNC(avg_mhavoc_device::reset_w)); /* Vector Generator Reset */
285 map(0x1700, 0x1700).w(FUNC(mhavoc_state::mhavoc_alpha_irq_ack_w)); /* IRQ ack */
286 map(0x1740, 0x1740).w(FUNC(mhavoc_state::mhavoc_rom_banksel_w)); /* Program ROM Page Select */
287 map(0x1780, 0x1780).w(FUNC(mhavoc_state::mhavoc_ram_banksel_w)); /* Program RAM Page Select */
288 map(0x17c0, 0x17c0).w(FUNC(mhavoc_state::mhavoc_gamma_w)); /* Gamma Communication Write Port */
289 map(0x1800, 0x1fff).ram(); /* Shared Beta Ram */
290 map(0x2000, 0x3fff).bankr("bank2"); /* Paged Program ROM (32K) */
291 map(0x4000, 0x4fff).ram().share("avg:vectorram").region("alpha", 0x4000); /* Vector Generator RAM */
292 map(0x5000, 0x7fff).rom(); /* Vector ROM */
293 map(0x8000, 0xffff).rom(); /* Program ROM (32K) */
294 }
295
296
297
298 /*************************************
299 *
300 * Gamma CPU memory handlers
301 *
302 *************************************/
303
304 /*
305 a15 a14 a13 a12 a11 a10 a09 a08 a07 a06 a05 a04 a03 a02 a01 a00
306 0 0 0 x x * * * * * * * * * * * RW ZRAM (6116 SRAM@9PQ)
307 0 0 1 0 0 x x x x x * * * * * * RW INPUTS: QCI/O (Quad Pokey)
308 0 0 1 0 1 x x x x x x x x x x x R INPUTS: SWITCHES
309 0 0 1 1 0 x x x x x x x x x x x R INPUTS: PORTRD_gamma
310 0 0 1 1 1 x x x x x x x x x * * R INPUTS: ROLLER (CCI(LETA?), with A2 grounded so only 4 ports are readable)
311 0 1 0 x x x x x x x x x x x x x R OUTPUTS: read of dipswitches @8S encompasses the entire OUTPUTS area
312 0 1 0 0 0 x x x x x x x x x x x W OUTPUTS: IRQACK
313 0 1 0 0 1 x x x x x x x x x x x W OUTPUTS: STROBES
314 0 1 0 1 0 x x x x x x x x x x x W OUTPUTS: PORTWR_gamma
315 0 1 0 1 1 ? ? ? ? ? ? ? ? ? ? ? W OUTPUTS: TISND, unused tms5220 write
316 ( supposedly, but the /WS hookup is not traced on pcb yet:
317 0 1 0 1 1 x? x? 0 x? x? x? x? x? x? x? x? W? OUTPUTS: TISND: Gamma CPU write to octal latch??
318 0 1 0 1 1 x? x? 1 x? x? x? x? x? x? x? x? W? OUTPUTS: TISND: octal latch output enable to tms5220 and pulse /WS on 5220??
319 Is there a way to activate /RS on the TMS5220 to read the status register? is the TMS5220 /INT line connected to the 6502 somehow?
320 )
321 0 1 1 x x x x * * * * * * * * * RW EEROM: (2804 EEPROM@9QR, pins 22(A9) and 19(A10) are N/C inside the chip)
322 1 x * * * * * * * * * * * * * * R ROM 27128 @9S
323 */
324
gamma_map(address_map & map)325 void mhavoc_state::gamma_map(address_map &map)
326 {
327 map(0x0000, 0x07ff).ram().mirror(0x1800); /* Program RAM (2K) */
328 map(0x2000, 0x203f).rw(FUNC(mhavoc_state::quad_pokeyn_r), FUNC(mhavoc_state::quad_pokeyn_w)).mirror(0x07C0); /* Quad Pokey read/write */
329 map(0x2800, 0x2800).portr("IN1").mirror(0x07ff); /* Gamma Input Port */
330 map(0x3000, 0x3000).r(FUNC(mhavoc_state::mhavoc_alpha_r)).mirror(0x07ff); /* Alpha Comm. Read Port */
331 map(0x3800, 0x3803).portr("DIAL").mirror(0x07fc); /* Roller Controller Input */
332 map(0x4000, 0x4000).portr("DSW2").w(FUNC(mhavoc_state::mhavoc_gamma_irq_ack_w)).mirror(0x07ff); /* DSW at 8S, IRQ Acknowledge */
333 map(0x4800, 0x4800).w(FUNC(mhavoc_state::mhavoc_out_1_w)).mirror(0x07ff); /* Coin Counters */
334 map(0x5000, 0x5000).w(FUNC(mhavoc_state::mhavoc_alpha_w)).mirror(0x07ff); /* Alpha Comm. Write Port */
335 //map(0x5800, 0x5800).w(FUNC(mhavoc_state::mhavocrv_speech_data_w)).mirror(0x06ff); /* TMS5220 data write */
336 //map(0x5900, 0x5900).w(FUNC(mhavoc_state::mhavocrv_speech_strobe_w)).mirror(0x06ff); /* TMS5220 /WS strobe write */
337 map(0x6000, 0x61ff).rw("eeprom", FUNC(eeprom_parallel_28xx_device::read), FUNC(eeprom_parallel_28xx_device::write)).mirror(0x1e00); /* EEROM */
338 map(0x8000, 0xbfff).rom().mirror(0x4000); /* Program ROM (16K) */
339 }
340
341
342
343
344 /*************************************
345 *
346 * Main CPU memory handlers (Alpha One)
347 *
348 *************************************/
349
alphaone_map(address_map & map)350 void mhavoc_state::alphaone_map(address_map &map)
351 {
352 map(0x0000, 0x01ff).ram();
353 map(0x0200, 0x07ff).bankrw("bank1").share("zram0");
354 map(0x0800, 0x09ff).ram();
355 map(0x0a00, 0x0fff).bankrw("bank1").share("zram1");
356 map(0x1020, 0x103f).rw(FUNC(mhavoc_state::dual_pokey_r), FUNC(mhavoc_state::dual_pokey_w));
357 map(0x1040, 0x1040).portr("IN0").nopw(); /* Alpha Input Port 0 */
358 map(0x1060, 0x1060).portr("IN1"); /* Gamma Input Port */
359 map(0x1080, 0x1080).portr("DIAL"); /* Roller Controller Input*/
360 map(0x10a0, 0x10a0).w(FUNC(mhavoc_state::alphaone_out_0_w)); /* Control Signals */
361 map(0x10a4, 0x10a4).w("avg", FUNC(avg_mhavoc_device::go_w)); /* Vector Generator GO */
362 map(0x10a8, 0x10a8).w("watchdog", FUNC(watchdog_timer_device::reset_w)); /* Watchdog Clear */
363 map(0x10ac, 0x10ac).w("avg", FUNC(avg_mhavoc_device::reset_w)); /* Vector Generator Reset */
364 map(0x10b0, 0x10b0).w(FUNC(mhavoc_state::mhavoc_alpha_irq_ack_w)); /* IRQ ack */
365 map(0x10b4, 0x10b4).w(FUNC(mhavoc_state::mhavoc_rom_banksel_w));
366 map(0x10b8, 0x10b8).w(FUNC(mhavoc_state::mhavoc_ram_banksel_w));
367 map(0x10e0, 0x10ff).nopr().writeonly().share("avg:colorram"); /* ColorRAM */
368 map(0x1800, 0x18ff).rw("eeprom", FUNC(eeprom_parallel_28xx_device::read), FUNC(eeprom_parallel_28xx_device::write)); /* EEROM */
369 map(0x2000, 0x3fff).bankr("bank2"); /* Paged Program ROM (32K) */
370 map(0x4000, 0x4fff).ram().share("avg:vectorram").region("alpha", 0x4000); /* Vector Generator RAM */
371 map(0x5000, 0x7fff).rom(); /* Vector ROM */
372 map(0x8000, 0xffff).rom(); /* Program ROM (32K) */
373 }
374
375
376
377 /*************************************
378 *
379 * Port definitions
380 *
381 *************************************/
382
READ_LINE_MEMBER(mhavoc_state::clock_r)383 READ_LINE_MEMBER(mhavoc_state::clock_r)
384 {
385 /* 2.4kHz (divide 2.5MHz by 1024) */
386 return (m_alpha->total_cycles() & 0x400) ? 0 : 1;
387 }
388
389
390 /* 2008-08 FP:
391 IN0 Bit 4 is tested in the second input test, but it's not clear its effect.
392 According to the memory map at top it should be Diagnostic Step, but it's
393 actually IN0 Bit 5 to have this function. I marked it as UNKNOWN for the moment */
394 static INPUT_PORTS_START( mhavoc )
395 PORT_START("IN0") /* alpha */
396 /* Bits 7-6 = selected based on player_1 */
397 /* Bits 5-4 = common */
398 /* Bit 3 = Gamma rcvd flag */
399 /* Bit 2 = Gamma xmtd flag */
400 /* Bit 1 = 2.4kHz (divide 2.5MHz by 1024) */
401 /* Bit 0 = Vector generator halt flag */
402 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("avg", avg_mhavoc_device, done_r)
PORT_READ_LINE_MEMBER(mhavoc_state,clock_r)403 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(mhavoc_state, clock_r)
404 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(mhavoc_state, gamma_xmtd_r)
405 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(mhavoc_state, gamma_rcvd_r)
406 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
407 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Diag Step/Coin C") PORT_CODE(KEYCODE_F1)
408 PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(mhavoc_state, coin_service_r)
409
410 PORT_START("IN1") /* gamma */
411 /* Bits 7-2 = input switches */
412 /* Bit 1 = Alpha rcvd flag */
413 /* Bit 0 = Alpha xmtd flag */
414 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(mhavoc_state, alpha_xmtd_r)
415 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(mhavoc_state, alpha_rcvd_r)
416 PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNKNOWN )
417 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
418 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
419 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 )
420 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
421
422 PORT_START("DIAL") /* gamma */
423 PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(40) PORT_REVERSE
424
425 PORT_START("DSW1") /* DIP Switch at position 13/14S */
426 PORT_DIPNAME( 0x01, 0x00, "Adaptive Difficulty" ) PORT_DIPLOCATION("SW1:8")
427 PORT_DIPSETTING( 0x01, DEF_STR( Off ))
428 PORT_DIPSETTING( 0x00, DEF_STR( On ))
429 PORT_DIPNAME( 0x02, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7")
430 PORT_DIPSETTING( 0x02, DEF_STR( Off ))
431 PORT_DIPSETTING( 0x00, DEF_STR( On ))
432 PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:5,6")
433 PORT_DIPSETTING( 0x0c, "50000")
434 PORT_DIPSETTING( 0x00, "100000")
435 PORT_DIPSETTING( 0x04, "200000")
436 PORT_DIPSETTING( 0x08, DEF_STR( None ))
437 PORT_DIPNAME( 0x30, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:3,4")
438 PORT_DIPSETTING( 0x10, DEF_STR( Easy ))
439 PORT_DIPSETTING( 0x00, DEF_STR( Medium ))
440 PORT_DIPSETTING( 0x30, DEF_STR( Hard ))
441 PORT_DIPSETTING( 0x20, "Demo")
442 PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
443 PORT_DIPSETTING( 0x00, "3 (2 in Free Play)")
444 PORT_DIPSETTING( 0xc0, "4 (3 in Free Play)")
445 PORT_DIPSETTING( 0x80, "5 (4 in Free Play)")
446 PORT_DIPSETTING( 0x40, "6 (5 in Free Play)")
447
448 PORT_START("DSW2") /* DIP Switch at position 8S */
449 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:7,8")
450 PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
451 PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
452 PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
453 PORT_DIPSETTING( 0x01, DEF_STR( Free_Play ) )
454 PORT_DIPNAME( 0x0c, 0x0c, "Right Coin Mechanism" ) PORT_DIPLOCATION("SW2:5,6")
455 PORT_DIPSETTING( 0x0c, "x1" )
456 PORT_DIPSETTING( 0x08, "x4" )
457 PORT_DIPSETTING( 0x04, "x5" )
458 PORT_DIPSETTING( 0x00, "x6" )
459 PORT_DIPNAME( 0x10, 0x10, "Left Coin Mechanism" ) PORT_DIPLOCATION("SW2:4")
460 PORT_DIPSETTING( 0x10, "x1" )
461 PORT_DIPSETTING( 0x00, "x2" )
462 PORT_DIPNAME( 0xe0, 0xe0, "Bonus Credits" ) PORT_DIPLOCATION("SW2:1,2,3")
463 PORT_DIPSETTING( 0x80, "2 each 4" )
464 PORT_DIPSETTING( 0x40, "1 each 3" )
465 PORT_DIPSETTING( 0xa0, "1 each 4" )
466 PORT_DIPSETTING( 0x60, "1 each 5" )
467 PORT_DIPSETTING( 0xe0, DEF_STR( None ) )
468
469 PORT_START("COIN") /* dummy for player_1 = 0 on alpha */
470 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) /* Left Coin Switch */
471 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) /* Right Coin */
472
473 PORT_START("SERVICE") /* dummy for player_1 = 1 on alpha */
474 PORT_DIPNAME( 0x01, 0x01, "Credit to start" )
475 PORT_DIPSETTING( 0x01, "1" )
476 PORT_DIPSETTING( 0x00, "2" )
477 PORT_SERVICE( 0x02, IP_ACTIVE_LOW )
478 INPUT_PORTS_END
479
480 static INPUT_PORTS_START( mhavocrv )
481 PORT_INCLUDE( mhavoc )
482
483 PORT_MODIFY("IN1")
484 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("tms", tms5220_device, readyq_r)
485 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
486 INPUT_PORTS_END
487
488 static INPUT_PORTS_START( mhavocp )
489 PORT_INCLUDE( mhavoc )
490
491 PORT_MODIFY("DSW1")
492 PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:7,8")
493 PORT_DIPSETTING( 0x00, "1" )
494 PORT_DIPSETTING( 0x01, "2" )
495 PORT_DIPSETTING( 0x02, "3" )
496 PORT_DIPSETTING( 0x03, "4" )
497 INPUT_PORTS_END
498
499 static INPUT_PORTS_START( alphaone )
500 PORT_START("IN0") /* alpha (player_1 = 0) */
501 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("avg", avg_mhavoc_device, done_r)
502 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(mhavoc_state, clock_r)
503 PORT_BIT( 0x7c, IP_ACTIVE_LOW, IPT_UNKNOWN )
504 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
505
506 PORT_START("IN1") /* gamma */
507 PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNKNOWN )
508 PORT_SERVICE( 0x10, IP_ACTIVE_LOW )
509 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN3 )
510 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
511 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
512
513 PORT_START("DIAL") /* gamma */
514 PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(40) PORT_REVERSE
515 INPUT_PORTS_END
516
517
518 /*************************************
519 *
520 * Machine drivers
521 *
522 *************************************/
523
524 void mhavoc_state::mhavoc(machine_config &config)
525 {
526 /* basic machine hardware */
527 M6502(config, m_alpha, MHAVOC_CLOCK_2_5M); /* 2.5 MHz */
528 m_alpha->set_addrmap(AS_PROGRAM, &mhavoc_state::alpha_map);
529
530 M6502(config, m_gamma, MHAVOC_CLOCK_1_25M); /* 1.25 MHz */
531 m_gamma->set_addrmap(AS_PROGRAM, &mhavoc_state::gamma_map);
532
533 EEPROM_2804(config, "eeprom");
534
535 TIMER(config, "5k_timer").configure_periodic(FUNC(mhavoc_state::mhavoc_cpu_irq_clock), attotime::from_hz(MHAVOC_CLOCK_5K));
536
537 WATCHDOG_TIMER(config, "watchdog");
538
539 /* video hardware */
540 VECTOR(config, "vector");
541 screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_VECTOR));
542 screen.set_refresh_hz(50);
543 screen.set_size(400, 300);
544 screen.set_visarea(0, 300, 0, 260);
545 screen.set_screen_update("vector", FUNC(vector_device::screen_update));
546
547 avg_device &avg(AVG_MHAVOC(config, "avg", 0));
548 avg.set_vector_tag("vector");
549
550 /* sound hardware */
551 SPEAKER(config, "mono").front_center();
552
553 /* FIXME: Outputs 1,2,3 are tied together
554 * This signal and Output 4 are processed separately.
555 * Later they are mixed together again.
556 * ==> DISCRETE emulation, below is just an approximation.
557 */
558
559 POKEY(config, m_pokey[0], MHAVOC_CLOCK_1_25M);
560 m_pokey[0]->allpot_r().set_ioport("DSW1");
561 m_pokey[0]->set_output_opamp(RES_K(1), CAP_U(0.001), 5.0);
562 m_pokey[0]->add_route(ALL_OUTPUTS, "mono", 0.25);
563
564 POKEY(config, m_pokey[1], MHAVOC_CLOCK_1_25M);
565 m_pokey[1]->set_output_opamp(RES_K(1), CAP_U(0.001), 5.0);
566 m_pokey[1]->add_route(ALL_OUTPUTS, "mono", 0.25);
567
568 POKEY(config, m_pokey[2], MHAVOC_CLOCK_1_25M);
569 m_pokey[2]->set_output_opamp(RES_K(1), CAP_U(0.001), 5.0);
570 m_pokey[2]->add_route(ALL_OUTPUTS, "mono", 0.25);
571
572 POKEY(config, m_pokey[3], MHAVOC_CLOCK_1_25M);
573 m_pokey[3]->set_output_opamp(RES_K(1), CAP_U(0.001), 5.0);
574 m_pokey[3]->add_route(ALL_OUTPUTS, "mono", 0.25);
575 }
576
mhavocrv(machine_config & config)577 void mhavoc_state::mhavocrv(machine_config &config)
578 {
579 mhavoc(config);
580
581 TMS5220(config, m_tms, MHAVOC_CLOCK/2/9);
582 m_tms->add_route(ALL_OUTPUTS, "mono", 1.0);
583 }
584
alphaone(machine_config & config)585 void mhavoc_state::alphaone(machine_config &config)
586 {
587 mhavoc(config);
588
589 /* basic machine hardware */
590 m_alpha->set_addrmap(AS_PROGRAM, &mhavoc_state::alphaone_map);
591 config.device_remove("gamma");
592
593 subdevice<screen_device>("screen")->set_visarea(0, 580, 0, 500);
594
595 /* sound hardware */
596 POKEY(config.replace(), m_pokey[0], MHAVOC_CLOCK_1_25M);
597 m_pokey[0]->add_route(ALL_OUTPUTS, "mono", 0.50);
598
599 POKEY(config.replace(), m_pokey[1], MHAVOC_CLOCK_1_25M);
600 m_pokey[1]->add_route(ALL_OUTPUTS, "mono", 0.50);
601
602 config.device_remove("pokey3");
603 config.device_remove("pokey4");
604 }
605
606
607
608 /*************************************
609 *
610 * ROM definitions
611 *
612 *************************************/
613
614 /*
615 * Notes:
616 * the R3 roms are supported as "mhavoc", the R2 roms (with a bug in gameplay)
617 * are supported as "mhavoc2".
618 * "Return to Vax" - Jess Askey's souped up version (errors on self test)
619 * are supported as "mhavocrv".
620 * Prototype is supported as "mhavocp"
621 * Alpha one is a single-board prototype
622 */
623
624 ROM_START( mhavoc )
625 /* Alpha Processor ROMs */
626 ROM_REGION( 0x18000, "alpha", 0 ) /* 152KB for ROMs */
627 /* Vector Generator ROM */
628 ROM_LOAD( "136025.210", 0x05000, 0x2000, CRC(c67284ca) SHA1(d9adad80c266d36429444f483cac4ebcf1fec7b8) )
629
630 /* Program ROM */
631 ROM_LOAD( "136025.216", 0x08000, 0x4000, CRC(522a9cc0) SHA1(bbd75e01c45220e1c87bd1e013cf2c2fb9f376b2) )
632 ROM_LOAD( "136025.217", 0x0c000, 0x4000, CRC(ea3d6877) SHA1(27823c1b546c073b37ff11a8cb25312ea71673c2) )
633
634 /* Paged Program ROM */
635 ROM_LOAD( "136025.215", 0x10000, 0x4000, CRC(a4d380ca) SHA1(c3cdc76054be2f904b1fb6f28c3c027eba5c3a70) ) /* page 0+1 */
636 ROM_LOAD( "136025.318", 0x14000, 0x4000, CRC(ba935067) SHA1(05ad81e7a1982b9d8fddb48502546f48b5dc21b7) ) /* page 2+3 */
637
638 /* Paged Vector Generator ROM */
639 ROM_REGION( 0x8000, "avg", 0 )
640 ROM_LOAD( "136025.106", 0x0000, 0x4000, CRC(2ca83c76) SHA1(cc1adca32f70af30c4590e9fd6b056b051ccdb38) ) /* page 0+1 */
641 ROM_LOAD( "136025.107", 0x4000, 0x4000, CRC(5f81c5f3) SHA1(be4055727a2d4536e37ec20150deffdb5af5b01f) ) /* page 2+3 */
642
643 /* Gamma Processor ROM */
644 ROM_REGION( 0x10000, "gamma", 0 )
645 ROM_LOAD( "136025.108", 0x08000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) ) /* mirrored to c000-ffff for reset+interrupt vectors */
646
647 /* AVG PROM */
648 ROM_REGION( 0x100, "avg:prom", 0 )
649 ROM_LOAD( "136002-125.6c", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
650 ROM_END
651
652
653 ROM_START( mhavoc2 )
654 /* Alpha Processor ROMs */
655 ROM_REGION( 0x18000, "alpha", 0 )
656 /* Vector Generator ROM */
657 ROM_LOAD( "136025.110", 0x05000, 0x2000, CRC(16eef583) SHA1(277252bd716dd96d5b98ec5e33a3a6a3bc1a9abf) )
658
659 /* Program ROM */
660 ROM_LOAD( "136025.103", 0x08000, 0x4000, CRC(bf192284) SHA1(4c2dc3ba75122e521ebf2c42f89b31737613c2df) )
661 ROM_LOAD( "136025.104", 0x0c000, 0x4000, CRC(833c5d4e) SHA1(932861b2a329172247c1a5d0a6498a00a1fce814) )
662
663 /* Paged Program ROM - switched to 2000-3fff */
664 ROM_LOAD( "136025.101", 0x10000, 0x4000, CRC(2b3b591f) SHA1(39fd6fdd14367906bc0102bde15d509d3289206b) ) /* page 0+1 */
665 ROM_LOAD( "136025.109", 0x14000, 0x4000, CRC(4d766827) SHA1(7697bf6f92bff0e62850ed75ff66008a08583ef7) ) /* page 2+3 */
666
667 /* Paged Vector Generator ROM */
668 ROM_REGION( 0x8000, "avg", 0 )
669 ROM_LOAD( "136025.106", 0x0000, 0x4000, CRC(2ca83c76) SHA1(cc1adca32f70af30c4590e9fd6b056b051ccdb38) ) /* page 0+1 */
670 ROM_LOAD( "136025.107", 0x4000, 0x4000, CRC(5f81c5f3) SHA1(be4055727a2d4536e37ec20150deffdb5af5b01f) ) /* page 2+3 */
671
672 /* the last 0x1000 is used for the 2 RAM pages */
673
674 /* Gamma Processor ROM */
675 ROM_REGION( 0x10000, "gamma", 0 )
676 ROM_LOAD( "136025.108", 0x08000, 0x4000, CRC(93faf210) SHA1(7744368a1d520f986d1c4246113a7e24fcdd6d04) ) /* mirrored to c000-ffff for reset+interrupt vectors */
677
678 /* AVG PROM */
679 ROM_REGION( 0x100, "avg:prom", 0 )
680 ROM_LOAD( "136002-125.6c", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
681 ROM_END
682
683
684 ROM_START( mhavocrv )
685 /* Alpha Processor ROMs */
686 ROM_REGION( 0x18000, "alpha", 0 ) /* 152KB for ROMs */
687 /* Vector Generator ROM */
688 ROM_LOAD( "136025.210", 0x05000, 0x2000, CRC(c67284ca) SHA1(d9adad80c266d36429444f483cac4ebcf1fec7b8) )
689
690 /* Program ROM */
691 ROM_LOAD( "136025.916", 0x08000, 0x4000, CRC(1255bd7f) SHA1(e277fe7b23ce8cf1294b6bfa5548b24a6c8952ce) )
692 ROM_LOAD( "136025.917", 0x0c000, 0x4000, CRC(21889079) SHA1(d1ad6d9fa1432912e376bca50ceeefac2bfd6ac3) )
693
694 /* Paged Program ROM */
695 ROM_LOAD( "136025.915", 0x10000, 0x4000, CRC(4c7235dc) SHA1(67cafc2ce438ec389550efb46c554a7fe7b45efc) ) /* page 0+1 */
696 ROM_LOAD( "136025.918", 0x14000, 0x4000, CRC(84735445) SHA1(21aacd862ce8911d257c6f48ead119ee5bb0b60d) ) /* page 2+3 */
697
698 /* Paged Vector Generator ROM */
699 ROM_REGION( 0x8000, "avg", 0 )
700 ROM_LOAD( "136025.106", 0x0000, 0x4000, CRC(2ca83c76) SHA1(cc1adca32f70af30c4590e9fd6b056b051ccdb38) ) /* page 0+1 */
701 ROM_LOAD( "136025.907", 0x4000, 0x4000, CRC(4deea2c9) SHA1(c4107581748a3f2d2084de2a4f120abd67a52189) ) /* page 2+3 */
702
703 /* the last 0x1000 is used for the 2 RAM pages */
704
705 /* Gamma Processor ROM */
706 ROM_REGION( 0x10000, "gamma", 0 )
707 ROM_LOAD( "136025.908", 0x08000, 0x4000, CRC(c52ec664) SHA1(08120a385f71b17ec02a3c2ef856ff835a91773e) ) /* mirrored to c000-ffff for reset+interrupt vectors */
708
709 /* AVG PROM */
710 ROM_REGION( 0x100, "avg:prom", 0 )
711 ROM_LOAD( "136002-125.6c", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
712 ROM_END
713
714
715 ROM_START( mhavocp )
716 /* Alpha Processor ROMs */
717 ROM_REGION( 0x18000, "alpha", 0 )
718 /* Vector Generator ROM */
719 ROM_LOAD( "136025.010", 0x05000, 0x2000, CRC(3050c0e6) SHA1(f19a9538996d949cdca7e6abd4f04e8ff6e0e2c1) )
720
721 /* Program ROM */
722 ROM_LOAD( "136025.016", 0x08000, 0x4000, CRC(94caf6c0) SHA1(8734411280bd0484c99a59231b97ad64d6e787e8) )
723 ROM_LOAD( "136025.017", 0x0c000, 0x4000, CRC(05cba70a) SHA1(c069e6dec3e5bc278103156d0908ab93f3784be1) )
724
725 /* Paged Program ROM - switched to 2000-3fff */
726 ROM_LOAD( "136025.015", 0x10000, 0x4000, CRC(c567c11b) SHA1(23b89389f59bb6a040342adfe583818a91ce5bff) )
727 ROM_LOAD( "136025.018", 0x14000, 0x4000, CRC(a8c35ccd) SHA1(c243a5407557390a64c6560d857f5031f839973f) )
728
729 /* Paged Vector Generator ROM */
730 ROM_REGION( 0x8000, "avg", 0 )
731 ROM_LOAD( "136025.006", 0x0000, 0x4000, CRC(e272ed41) SHA1(0de395d1c4300a64da7f45746d7b550779e36a21) )
732 ROM_LOAD( "136025.007", 0x4000, 0x4000, CRC(e152c9d8) SHA1(79d0938fa9ad262c7f28c5a8ad21004a4dec9ed8) )
733
734 /* the last 0x1000 is used for the 2 RAM pages */
735
736 /* Gamma Processor ROM */
737 ROM_REGION( 0x10000, "gamma", 0 )
738 ROM_LOAD( "136025.008", 0x8000, 0x4000, CRC(22ea7399) SHA1(eeda8cc40089506063835a62c3273e7dd3918fd5) ) /* mirrored to c000-ffff for reset+interrupt vectors */
739
740 /* AVG PROM */
741 ROM_REGION( 0x100, "avg:prom", 0 )
742 ROM_LOAD( "136002-125.6c", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
743 ROM_END
744
745
746 ROM_START( alphaone )
747 ROM_REGION( 0x18000, "alpha", 0 )
748 /* Vector Generator ROM */
749 ROM_LOAD( "vec5000.tw", 0x05000, 0x1000, CRC(2a4c149f) SHA1(b60a0b29958bee9b5f7c1d88163680b626bb76dd) )
750
751 /* Program ROM */
752 ROM_LOAD( "8000.tw", 0x08000, 0x2000, CRC(962d4da2) SHA1(2299f850aed7470a80a21526143f7b412a879cb1) )
753 ROM_LOAD( "a000.tw", 0x0a000, 0x2000, CRC(f739a791) SHA1(1e70e446fc7dd27683ad71e768ebb2bc1d4fedd3) )
754 ROM_LOAD( "twjk1.bin", 0x0c000, 0x2000, CRC(1ead0b34) SHA1(085e05526d029bcff7c8ae050cde73f52ee13846) )
755 ROM_LOAD( "e000.tw", 0x0e000, 0x1000, CRC(6b1d7d2b) SHA1(36ac8b53e2fe01ed281c94afec02484ef676ddad) )
756 ROM_RELOAD( 0x0f000, 0x1000 )
757
758 /* Paged Program ROM - switched to 2000-3fff */
759 ROM_LOAD( "page01.tw", 0x10000, 0x4000, CRC(cbf3b05a) SHA1(1dfaf9300a252c9c921f06167160a59cdf329726) )
760
761 /* Paged Vector Generator ROM */
762 ROM_REGION( 0x8000, "avg", 0 )
763 ROM_LOAD( "vec_pg01.tw", 0x0000, 0x4000, CRC(e392a94d) SHA1(b5843da97d7aa5767c87c29660115efc5ad9ad54) )
764 ROM_LOAD( "vec_pg23.tw", 0x4000, 0x4000, CRC(1ff74292) SHA1(90e61c48544c62d905e207bba5c67ae7694e86a5) )
765
766 /* the last 0x1000 is used for the 2 RAM pages */
767
768 /* AVG PROM */
769 ROM_REGION( 0x100, "avg:prom", 0 )
770 ROM_LOAD( "136002-125.6c", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
771 ROM_END
772
773
774 ROM_START( alphaonea )
775 ROM_REGION( 0x18000, "alpha", 0 )
776 /* Vector Generator ROM */
777 ROM_LOAD( "vec5000.tw", 0x05000, 0x1000, CRC(2a4c149f) SHA1(b60a0b29958bee9b5f7c1d88163680b626bb76dd) )
778
779 /* Program ROM */
780 ROM_LOAD( "8000.tw", 0x08000, 0x2000, CRC(962d4da2) SHA1(2299f850aed7470a80a21526143f7b412a879cb1) )
781 ROM_LOAD( "a000.tw", 0x0a000, 0x2000, CRC(f739a791) SHA1(1e70e446fc7dd27683ad71e768ebb2bc1d4fedd3) )
782 ROM_LOAD( "c000.tw", 0x0c000, 0x2000, CRC(f21fb1ac) SHA1(2590147e75611a3f87397e7b0baa7020e7528ac8) )
783 ROM_LOAD( "e000.tw", 0x0e000, 0x1000, CRC(6b1d7d2b) SHA1(36ac8b53e2fe01ed281c94afec02484ef676ddad) )
784 ROM_RELOAD( 0x0f000, 0x1000 )
785
786 /* Paged Program ROM - switched to 2000-3fff */
787 ROM_LOAD( "page01.tw", 0x10000, 0x4000, CRC(cbf3b05a) SHA1(1dfaf9300a252c9c921f06167160a59cdf329726) )
788
789 /* Paged Vector Generator ROM */
790 ROM_REGION( 0x8000, "avg", 0 )
791 ROM_LOAD( "vec_pg01.tw", 0x0000, 0x4000, CRC(e392a94d) SHA1(b5843da97d7aa5767c87c29660115efc5ad9ad54) )
792 ROM_LOAD( "vec_pg23.tw", 0x4000, 0x4000, CRC(1ff74292) SHA1(90e61c48544c62d905e207bba5c67ae7694e86a5) )
793
794 /* the last 0x1000 is used for the 2 RAM pages */
795
796 /* AVG PROM */
797 ROM_REGION( 0x100, "avg:prom", 0 )
798 ROM_LOAD( "136002-125.6c", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
799 ROM_END
800
801
802
803 /*************************************
804 *
805 * Game drivers
806 *
807 *************************************/
808
809 GAME( 1983, mhavoc, 0, mhavoc, mhavoc, mhavoc_state, empty_init, ROT0, "Atari", "Major Havoc (rev 3)", MACHINE_SUPPORTS_SAVE )
810 GAME( 1983, mhavoc2, mhavoc, mhavoc, mhavoc, mhavoc_state, empty_init, ROT0, "Atari", "Major Havoc (rev 2)", MACHINE_SUPPORTS_SAVE )
811 GAME( 2006, mhavocrv, mhavoc, mhavocrv, mhavocrv, mhavoc_state, init_mhavocrv, ROT0, "hack (JMA)", "Major Havoc - Return to Vax", MACHINE_SUPPORTS_SAVE )
812 GAME( 1983, mhavocp, mhavoc, mhavoc, mhavocp, mhavoc_state, empty_init, ROT0, "Atari", "Major Havoc (prototype)", MACHINE_SUPPORTS_SAVE )
813 GAME( 1983, alphaone, mhavoc, alphaone, alphaone, mhavoc_state, empty_init, ROT0, "Atari", "Alpha One (prototype, 3 lives)", MACHINE_SUPPORTS_SAVE )
814 GAME( 1983, alphaonea,mhavoc, alphaone, alphaone, mhavoc_state, empty_init, ROT0, "Atari", "Alpha One (prototype, 5 lives)", MACHINE_SUPPORTS_SAVE )
815