1 // license:BSD-3-Clause
2 // copyright-holders:Uki
3 /*****************************************************************************
4
5 Mahjong Sisters (c) 1986 Toa Plan
6
7 Driver by Uki
8
9 *****************************************************************************/
10
11 #include "emu.h"
12 #include "cpu/z80/z80.h"
13 #include "machine/74259.h"
14 #include "video/mc6845.h"
15 #include "sound/ay8910.h"
16 #include "sound/dac.h"
17 #include "emupal.h"
18 #include "screen.h"
19 #include "speaker.h"
20
21
22 #define MCLK 12000000
23
24
25 class mjsister_state : public driver_device
26 {
27 public:
mjsister_state(const machine_config & mconfig,device_type type,const char * tag)28 mjsister_state(const machine_config &mconfig, device_type type, const char *tag) :
29 driver_device(mconfig, type, tag),
30 m_maincpu(*this, "maincpu"),
31 m_mainlatch(*this, "mainlatch%u", 1),
32 m_palette(*this, "palette"),
33 m_crtc(*this, "crtc"),
34 m_dac(*this, "dac"),
35 m_rombank(*this, "rombank"),
36 m_vrambank(*this, "vrambank")
37 { }
38
39 void mjsister(machine_config &config);
40
41 protected:
42 virtual void machine_start() override;
43 virtual void machine_reset() override;
44 virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
45
46 private:
47 enum
48 {
49 TIMER_DAC
50 };
51
52 /* video-related */
53 bool m_video_enable;
54 int m_colorbank;
55
56 /* misc */
57 int m_input_sel1;
58 int m_input_sel2;
59 bool m_irq_enable;
60
61 uint32_t m_dac_adr;
62 uint32_t m_dac_bank;
63 uint32_t m_dac_adr_s;
64 uint32_t m_dac_adr_e;
65 uint32_t m_dac_busy;
66
67 /* devices */
68 required_device<cpu_device> m_maincpu;
69 required_device_array<ls259_device, 2> m_mainlatch;
70 required_device<palette_device> m_palette;
71 required_device<hd6845s_device> m_crtc;
72 required_device<dac_byte_interface> m_dac;
73
74 /* memory */
75 required_memory_bank m_rombank;
76 required_memory_bank m_vrambank;
77 std::unique_ptr<uint8_t[]> m_vram;
78 void dac_adr_s_w(uint8_t data);
79 void dac_adr_e_w(uint8_t data);
80 DECLARE_WRITE_LINE_MEMBER(rombank_w);
81 DECLARE_WRITE_LINE_MEMBER(flip_screen_w);
82 DECLARE_WRITE_LINE_MEMBER(colorbank_w);
83 DECLARE_WRITE_LINE_MEMBER(video_enable_w);
84 DECLARE_WRITE_LINE_MEMBER(irq_enable_w);
85 DECLARE_WRITE_LINE_MEMBER(vrambank_w);
86 DECLARE_WRITE_LINE_MEMBER(dac_bank_w);
87 DECLARE_WRITE_LINE_MEMBER(coin_counter_w);
88 void input_sel1_w(uint8_t data);
89 void input_sel2_w(uint8_t data);
90 uint8_t keys_r();
91 TIMER_CALLBACK_MEMBER(dac_callback);
92 INTERRUPT_GEN_MEMBER(interrupt);
93 uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
94
95 void mjsister_io_map(address_map &map);
96 void mjsister_map(address_map &map);
97
98 emu_timer *m_dac_timer;
99
100 MC6845_UPDATE_ROW(crtc_update_row);
101 };
102
103
104 /*************************************
105 *
106 * Video emulation
107 *
108 *************************************/
109
screen_update(screen_device & screen,bitmap_rgb32 & bitmap,const rectangle & cliprect)110 uint32_t mjsister_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
111 {
112 if (m_video_enable)
113 m_crtc->screen_update(screen, bitmap, cliprect);
114 else
115 bitmap.fill(m_palette->black_pen(), cliprect);
116
117 return 0;
118 }
119
MC6845_UPDATE_ROW(mjsister_state::crtc_update_row)120 MC6845_UPDATE_ROW( mjsister_state::crtc_update_row )
121 {
122 const pen_t *pen = m_palette->pens();
123
124 if (flip_screen())
125 y = 240 - y;
126
127 for (int i = 0; i < x_count; i++)
128 {
129 uint8_t x1 = i * 2 + 0;
130 uint8_t x2 = i * 2 + 1;
131
132 if (flip_screen())
133 {
134 x1 = 256 - x1;
135 x2 = 256 - x2;
136 }
137
138 // background layer
139 uint8_t data_bg = m_vram[0x400 + ((ma << 3) | (ra << 7) | i)];
140
141 bitmap.pix(y, x1) = pen[m_colorbank << 5 | ((data_bg & 0x0f) >> 0)];
142 bitmap.pix(y, x2) = pen[m_colorbank << 5 | ((data_bg & 0xf0) >> 4)];
143
144 // foreground layer
145 uint8_t data_fg = m_vram[0x8000 | (0x400 + ((ma << 3) | (ra << 7) | i))];
146
147 uint8_t c1 = ((data_fg & 0x0f) >> 0);
148 uint8_t c2 = ((data_fg & 0xf0) >> 4);
149
150 // 0 is transparent
151 if (c1) bitmap.pix(y, x1) = pen[m_colorbank << 5 | 0x10 | c1];
152 if (c2) bitmap.pix(y, x2) = pen[m_colorbank << 5 | 0x10 | c2];
153 }
154 }
155
156
157 /*************************************
158 *
159 * Memory handlers
160 *
161 *************************************/
162
device_timer(emu_timer & timer,device_timer_id id,int param,void * ptr)163 void mjsister_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
164 {
165 switch(id)
166 {
167 case TIMER_DAC:
168 dac_callback(ptr, param);
169 break;
170 default:
171 throw emu_fatalerror("Unknown id in mjsister_state::device_timer");
172 }
173 }
174
TIMER_CALLBACK_MEMBER(mjsister_state::dac_callback)175 TIMER_CALLBACK_MEMBER(mjsister_state::dac_callback)
176 {
177 uint8_t *DACROM = memregion("samples")->base();
178
179 m_dac->write(DACROM[(m_dac_bank * 0x10000 + m_dac_adr++) & 0x1ffff]);
180
181 if (((m_dac_adr & 0xff00 ) >> 8) != m_dac_adr_e)
182 m_dac_timer->adjust(attotime::from_hz(MCLK) * 1024);
183 else
184 m_dac_busy = 0;
185 }
186
dac_adr_s_w(uint8_t data)187 void mjsister_state::dac_adr_s_w(uint8_t data)
188 {
189 m_dac_adr_s = data;
190 }
191
dac_adr_e_w(uint8_t data)192 void mjsister_state::dac_adr_e_w(uint8_t data)
193 {
194 m_dac_adr_e = data;
195 m_dac_adr = m_dac_adr_s << 8;
196
197 if (m_dac_busy == 0)
198 synchronize(TIMER_DAC);
199
200 m_dac_busy = 1;
201 }
202
WRITE_LINE_MEMBER(mjsister_state::rombank_w)203 WRITE_LINE_MEMBER(mjsister_state::rombank_w)
204 {
205 m_rombank->set_entry((m_mainlatch[0]->q0_r() << 1) | m_mainlatch[1]->q6_r());
206 }
207
WRITE_LINE_MEMBER(mjsister_state::flip_screen_w)208 WRITE_LINE_MEMBER(mjsister_state::flip_screen_w)
209 {
210 flip_screen_set(state);
211 }
212
WRITE_LINE_MEMBER(mjsister_state::colorbank_w)213 WRITE_LINE_MEMBER(mjsister_state::colorbank_w)
214 {
215 m_colorbank = (m_mainlatch[0]->output_state() >> 2) & 7;
216 }
217
WRITE_LINE_MEMBER(mjsister_state::video_enable_w)218 WRITE_LINE_MEMBER(mjsister_state::video_enable_w)
219 {
220 m_video_enable = state;
221 }
222
WRITE_LINE_MEMBER(mjsister_state::irq_enable_w)223 WRITE_LINE_MEMBER(mjsister_state::irq_enable_w)
224 {
225 m_irq_enable = state;
226 if (!m_irq_enable)
227 m_maincpu->set_input_line(0, CLEAR_LINE);
228 }
229
WRITE_LINE_MEMBER(mjsister_state::vrambank_w)230 WRITE_LINE_MEMBER(mjsister_state::vrambank_w)
231 {
232 m_vrambank->set_entry(state);
233 }
234
WRITE_LINE_MEMBER(mjsister_state::dac_bank_w)235 WRITE_LINE_MEMBER(mjsister_state::dac_bank_w)
236 {
237 m_dac_bank = state;
238 }
239
WRITE_LINE_MEMBER(mjsister_state::coin_counter_w)240 WRITE_LINE_MEMBER(mjsister_state::coin_counter_w)
241 {
242 machine().bookkeeping().coin_counter_w(0, state);
243 }
244
input_sel1_w(uint8_t data)245 void mjsister_state::input_sel1_w(uint8_t data)
246 {
247 m_input_sel1 = data;
248 }
249
input_sel2_w(uint8_t data)250 void mjsister_state::input_sel2_w(uint8_t data)
251 {
252 m_input_sel2 = data;
253 }
254
keys_r()255 uint8_t mjsister_state::keys_r()
256 {
257 int p, i, ret = 0;
258 static const char *const keynames[] = { "KEY0", "KEY1", "KEY2", "KEY3", "KEY4", "KEY5" };
259
260 p = m_input_sel1 & 0x3f;
261 // p |= ((m_input_sel2 & 8) << 4) | ((m_input_sel2 & 0x20) << 1);
262
263 for (i = 0; i < 6; i++)
264 {
265 if (BIT(p, i))
266 ret |= ioport(keynames[i])->read();
267 }
268
269 return ret;
270 }
271
272 /*************************************
273 *
274 * Address maps
275 *
276 *************************************/
277
mjsister_map(address_map & map)278 void mjsister_state::mjsister_map(address_map &map)
279 {
280 map(0x0000, 0x77ff).rom();
281 map(0x7800, 0x7fff).ram();
282 map(0x8000, 0xffff).bankr("rombank").bankw("vrambank");
283 }
284
mjsister_io_map(address_map & map)285 void mjsister_state::mjsister_io_map(address_map &map)
286 {
287 map.global_mask(0xff);
288 map(0x00, 0x00).w(m_crtc, FUNC(hd6845s_device::address_w));
289 map(0x01, 0x01).rw(m_crtc, FUNC(hd6845s_device::register_r), FUNC(hd6845s_device::register_w));
290 map(0x10, 0x10).w("aysnd", FUNC(ay8910_device::address_w));
291 map(0x11, 0x11).r("aysnd", FUNC(ay8910_device::data_r));
292 map(0x12, 0x12).w("aysnd", FUNC(ay8910_device::data_w));
293 map(0x20, 0x20).r(FUNC(mjsister_state::keys_r));
294 map(0x21, 0x21).portr("IN0");
295 map(0x30, 0x30).w("mainlatch1", FUNC(ls259_device::write_nibble_d0));
296 map(0x31, 0x31).w("mainlatch2", FUNC(ls259_device::write_nibble_d0));
297 map(0x32, 0x32).w(FUNC(mjsister_state::input_sel1_w));
298 map(0x33, 0x33).w(FUNC(mjsister_state::input_sel2_w));
299 map(0x34, 0x34).w(FUNC(mjsister_state::dac_adr_s_w));
300 map(0x35, 0x35).w(FUNC(mjsister_state::dac_adr_e_w));
301 // map(0x36, 0x36) // writes 0xf8 here once
302 }
303
304
305 /*************************************
306 *
307 * Input ports
308 *
309 *************************************/
310
311 static INPUT_PORTS_START( mjsister )
312 PORT_START("DSW1")
DEF_STR(Coinage)313 PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DSW1:8,7,6")
314 PORT_DIPSETTING( 0x03, DEF_STR( 5C_1C ) )
315 PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
316 PORT_DIPSETTING( 0x01, DEF_STR( 3C_1C ) )
317 PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
318 PORT_DIPSETTING( 0x07, DEF_STR( 1C_1C ) )
319 PORT_DIPSETTING( 0x06, DEF_STR( 1C_2C ) )
320 PORT_DIPSETTING( 0x05, DEF_STR( 1C_3C ) )
321 PORT_DIPSETTING( 0x04, DEF_STR( 1C_4C ) )
322 PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "DSW1:5")
323 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("DSW1:4,3") // see code at $141C
324 PORT_DIPSETTING( 0x30, "0" )
325 PORT_DIPSETTING( 0x20, "1" )
326 PORT_DIPSETTING( 0x10, "2" )
327 PORT_DIPSETTING( 0x00, "3" )
328 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Test ) ) PORT_DIPLOCATION("DSW1:2")
329 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
330 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
331 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSW1:1")
332 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
333 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
334
335 PORT_START("DSW2") /* not on PCB */
336 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
337
338 PORT_START("IN0")
339 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
340 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SERVICE3 ) PORT_OPTIONAL PORT_NAME("Memory Reset 1") // only tested in service mode?
341 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_GAMBLE_BOOK ) PORT_OPTIONAL PORT_NAME("Analyzer") // only tested in service mode?
342 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_TOGGLE
343 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_SERVICE4 ) PORT_OPTIONAL PORT_NAME("Memory Reset 2") // only tested in service mode?
344 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_GAMBLE_PAYOUT ) PORT_OPTIONAL // only tested in service mode?
345 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN1 )
346 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Hopper") PORT_CODE(KEYCODE_8) // only tested in service mode?
347
348 PORT_START("KEY0")
349 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_MAHJONG_A )
350 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_MAHJONG_B )
351 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_MAHJONG_C )
352 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_MAHJONG_D )
353 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_MAHJONG_LAST_CHANCE )
354 PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
355
356 PORT_START("KEY1")
357 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_MAHJONG_E )
358 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_MAHJONG_F )
359 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_MAHJONG_G )
360 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_MAHJONG_H )
361 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_MAHJONG_SCORE )
362 PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
363
364 PORT_START("KEY2")
365 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_MAHJONG_I )
366 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_MAHJONG_J )
367 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_MAHJONG_K )
368 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_MAHJONG_L )
369 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_MAHJONG_DOUBLE_UP )
370 PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
371
372 PORT_START("KEY3")
373 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_MAHJONG_M )
374 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_MAHJONG_N )
375 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_MAHJONG_CHI )
376 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_MAHJONG_PON )
377 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_MAHJONG_FLIP_FLOP )
378 PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
379
380 PORT_START("KEY4")
381 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_MAHJONG_KAN )
382 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_MAHJONG_REACH )
383 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_MAHJONG_RON )
384 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN )
385 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_MAHJONG_BIG )
386 PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
387
388 PORT_START("KEY5")
389 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START1 )
390 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_MAHJONG_BET )
391 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
392 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN )
393 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_MAHJONG_SMALL )
394 PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
395
396 INPUT_PORTS_END
397
398 /*************************************
399 *
400 * Machine driver
401 *
402 *************************************/
403
404 void mjsister_state::machine_start()
405 {
406 uint8_t *ROM = memregion("maincpu")->base();
407 m_rombank->configure_entries(0, 4, &ROM[0x10000], 0x8000);
408
409 m_vram = make_unique_clear<uint8_t[]>(0x10000);
410 m_vrambank->configure_entries(0, 2, m_vram.get(), 0x8000);
411
412 m_dac_timer = timer_alloc(TIMER_DAC);
413
414 save_pointer(NAME(m_vram), 0x10000);
415 save_item(NAME(m_dac_busy));
416 save_item(NAME(m_video_enable));
417 save_item(NAME(m_colorbank));
418 save_item(NAME(m_input_sel1));
419 save_item(NAME(m_input_sel2));
420 save_item(NAME(m_irq_enable));
421 save_item(NAME(m_dac_adr));
422 save_item(NAME(m_dac_bank));
423 save_item(NAME(m_dac_adr_s));
424 save_item(NAME(m_dac_adr_e));
425 }
426
machine_reset()427 void mjsister_state::machine_reset()
428 {
429 m_dac_busy = 0;
430 m_video_enable = 0;
431 m_input_sel1 = 0;
432 m_input_sel2 = 0;
433 m_dac_adr = 0;
434 m_dac_bank = 0;
435 m_dac_adr_s = 0;
436 m_dac_adr_e = 0;
437 }
438
INTERRUPT_GEN_MEMBER(mjsister_state::interrupt)439 INTERRUPT_GEN_MEMBER(mjsister_state::interrupt)
440 {
441 if (m_irq_enable)
442 m_maincpu->set_input_line(0, ASSERT_LINE);
443 }
444
mjsister(machine_config & config)445 void mjsister_state::mjsister(machine_config &config)
446 {
447 /* basic machine hardware */
448 Z80(config, m_maincpu, MCLK/2); /* 6.000 MHz */
449 m_maincpu->set_addrmap(AS_PROGRAM, &mjsister_state::mjsister_map);
450 m_maincpu->set_addrmap(AS_IO, &mjsister_state::mjsister_io_map);
451 m_maincpu->set_periodic_int(FUNC(mjsister_state::interrupt), attotime::from_hz(2*60));
452
453 LS259(config, m_mainlatch[0]);
454 m_mainlatch[0]->q_out_cb<0>().set(FUNC(mjsister_state::rombank_w));
455 m_mainlatch[0]->q_out_cb<1>().set(FUNC(mjsister_state::flip_screen_w));
456 m_mainlatch[0]->q_out_cb<2>().set(FUNC(mjsister_state::colorbank_w));
457 m_mainlatch[0]->q_out_cb<3>().set(FUNC(mjsister_state::colorbank_w));
458 m_mainlatch[0]->q_out_cb<4>().set(FUNC(mjsister_state::colorbank_w));
459 m_mainlatch[0]->q_out_cb<5>().set(FUNC(mjsister_state::video_enable_w));
460 m_mainlatch[0]->q_out_cb<6>().set(FUNC(mjsister_state::irq_enable_w));
461 m_mainlatch[0]->q_out_cb<7>().set(FUNC(mjsister_state::vrambank_w));
462
463 LS259(config, m_mainlatch[1]);
464 m_mainlatch[1]->q_out_cb<2>().set(FUNC(mjsister_state::coin_counter_w));
465 m_mainlatch[1]->q_out_cb<5>().set(FUNC(mjsister_state::dac_bank_w));
466 m_mainlatch[1]->q_out_cb<6>().set(FUNC(mjsister_state::rombank_w));
467
468 /* video hardware */
469 screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
470 screen.set_raw(MCLK/2, 384, 0, 256, 268, 0, 240); // 6 MHz?
471 screen.set_screen_update(FUNC(mjsister_state::screen_update));
472
473 PALETTE(config, m_palette, palette_device::RGB_444_PROMS, "proms", 256);
474
475 HD6845S(config, m_crtc, MCLK/4); // 3 MHz?
476 m_crtc->set_screen("screen");
477 m_crtc->set_show_border_area(false);
478 m_crtc->set_char_width(2);
479 m_crtc->set_update_row_callback(FUNC(mjsister_state::crtc_update_row));
480
481 /* sound hardware */
482 SPEAKER(config, "speaker").front_center();
483
484 ay8910_device &aysnd(AY8910(config, "aysnd", MCLK/8));
485 aysnd.port_a_read_callback().set_ioport("DSW1");
486 aysnd.port_b_read_callback().set_ioport("DSW2");
487 aysnd.add_route(ALL_OUTPUTS, "speaker", 0.15);
488
489 DAC_8BIT_R2R(config, "dac", 0).add_route(ALL_OUTPUTS, "speaker", 0.5); // unknown DAC
490 }
491
492 /*************************************
493 *
494 * ROM definition(s)
495 *
496 *************************************/
497
498 ROM_START( mjsister )
499 ROM_REGION( 0x30000, "maincpu", 0 ) /* CPU */
500 ROM_LOAD( "ms00.bin", 0x00000, 0x08000, CRC(9468c33b) SHA1(63aecdcaa8493d58549dfd1d217743210cf953bc) )
501 ROM_LOAD( "ms01t.bin", 0x10000, 0x10000, CRC(a7b6e530) SHA1(fda9bea214968a8814d2c43226b3b32316581050) ) /* banked */
502 ROM_LOAD( "ms02t.bin", 0x20000, 0x10000, CRC(7752b5ba) SHA1(84dcf27a62eb290ba07c85af155897ec72f320a8) ) /* banked */
503
504 ROM_REGION( 0x20000, "samples", 0 ) /* samples */
505 ROM_LOAD( "ms03.bin", 0x00000, 0x10000, CRC(10a68e5e) SHA1(a0e2fa34c1c4f34642f65fbf17e9da9c2554a0c6) )
506 ROM_LOAD( "ms04.bin", 0x10000, 0x10000, CRC(641b09c1) SHA1(15cde906175bcb5190d36cc91cbef003ef91e425) )
507
508 ROM_REGION( 0x00400, "proms", 0 ) /* color PROMs */
509 ROM_LOAD( "ms05.bpr", 0x0000, 0x0100, CRC(dd231a5f) SHA1(be008593ac8ba8f5a1dd5b188dc7dc4c03016805) ) // R
510 ROM_LOAD( "ms06.bpr", 0x0100, 0x0100, CRC(df8e8852) SHA1(842a891440aef55a560d24c96f249618b9f4b97f) ) // G
511 ROM_LOAD( "ms07.bpr", 0x0200, 0x0100, CRC(6cb3a735) SHA1(468ae3d40552dc2ec24f5f2988850093d73948a6) ) // B
512 ROM_LOAD( "ms08.bpr", 0x0300, 0x0100, CRC(da2b3b38) SHA1(4de99c17b227653bc1b904f1309f447f5a0ab516) ) // ?
513 ROM_END
514
515
516 /*************************************
517 *
518 * Game driver(s)
519 *
520 *************************************/
521
522 GAME( 1986, mjsister, 0, mjsister, mjsister, mjsister_state, empty_init, ROT0, "Toaplan", "Mahjong Sisters (Japan)", MACHINE_SUPPORTS_SAVE )
523