1 // license:BSD-3-Clause 2 // copyright-holders:Couriersud 3 /*************************************************************************** 4 5 Nintendo Donkey Kong hardware 6 7 ***************************************************************************/ 8 #ifndef MAME_INCLUDES_DKONG_H 9 #define MAME_INCLUDES_DKONG_H 10 11 #pragma once 12 13 #include "cpu/m6502/n2a03.h" 14 #include "cpu/mcs48/mcs48.h" 15 #include "machine/eepromser.h" 16 #include "machine/i8257.h" 17 #include "machine/latch8.h" 18 #include "machine/tms6100.h" 19 #include "machine/watchdog.h" 20 #include "machine/z80dma.h" 21 #include "sound/discrete.h" 22 #include "sound/tms5110.h" 23 #include "emupal.h" 24 #include "screen.h" 25 #include "tilemap.h" 26 27 28 /* 29 * From the schematics: 30 * 31 * XTAL is 61,44 MHZ. There is some oscillator logic around it. The oscillating circuit 32 * transfers the signal with a transformator. Onwards, it is fed through a M(B/C)10136. This 33 * is a programmable counter which is used as a divisor by 5. 34 * Cascaded 74LS161 further divide the signal. The following signals are generated: 35 * 1/2H: 61,44MHZ/5/2 - pixel clock 36 * 1H : 61,44MHZ/5/4 - cpu-clock 37 * 2H : 61,44MHZ/5/8 38 * .... 39 * 128H: 61,44MHZ/5/512 40 * The horizontal circuit counts till 384=256+128, thus 256H only being high for 128H/2 41 * 42 * Signal 16H,32H,64H and 256H are combined using a LS00, LS04 and a D-Flipflop to produce 43 * a signal with Freq 16H/12. This is only possible because a 220pf capacitor with the 44 * impedance of the LS-Family of 10K delays the 16H signal by about half a cycle. 45 * This signal is divided by two by another D-Flipflop(74LS74) to give: 46 * 1VF: 61,44MHZ/5/64/12/2 = 8KHZ 47 * 2VF: 1VF/2 - Noise frequency: 4Khz 48 * ... 49 * The vertical circuit counts from 248 till 512 giving 264 lines. 50 * 256VF is not being used, so counting is from 248...255, 0...255, .... 51 */ 52 53 #define MASTER_CLOCK XTAL(61'440'000) 54 #define CLOCK_1H (MASTER_CLOCK / 5 / 4) 55 #define CLOCK_16H (CLOCK_1H / 16) 56 #define CLOCK_1VF ((CLOCK_16H) / 12 / 2) 57 #define CLOCK_2VF ((CLOCK_1VF) / 2) 58 59 #define PIXEL_CLOCK (MASTER_CLOCK/10) 60 #define HTOTAL (384) 61 #define HBSTART (256) 62 #define HBEND (0) 63 #define VTOTAL (264) 64 #define VBSTART (240) 65 #define VBEND (16) 66 67 #define I8035_CLOCK (XTAL(6'000'000)) 68 69 /**************************************************************************** 70 * CONSTANTS 71 ****************************************************************************/ 72 73 #define HARDWARE_TYPE_TAG "HARDWARE_TYPE" 74 75 enum 76 { 77 HARDWARE_TKG04 = 0, 78 HARDWARE_TRS01, 79 HARDWARE_TRS02, 80 HARDWARE_TKG02 81 }; 82 83 enum 84 { 85 DKONG_RADARSCP_CONVERSION = 0, 86 DKONG_BOARD = 1 87 }; 88 89 enum 90 { 91 DK2650_HERBIEDK = 0, 92 DK2650_HUNCHBKD, 93 DK2650_EIGHTACT, 94 DK2650_SHOOTGAL, 95 DK2650_SPCLFORC 96 }; 97 98 #define DK2B_PALETTE_LENGTH (256+256+8+1) /* (256) */ 99 #define DK4B_PALETTE_LENGTH (256+256+8+1) /* (256) */ 100 #define DK3_PALETTE_LENGTH (256+256+8+1) /* (256) */ 101 #define RS_PALETTE_LENGTH (256+256+8+1) 102 103 class dkong_state : public driver_device 104 { 105 public: dkong_state(const machine_config & mconfig,device_type type,const char * tag)106 dkong_state(const machine_config &mconfig, device_type type, const char *tag) 107 : driver_device(mconfig, type, tag) 108 , m_maincpu(*this, "maincpu") 109 , m_soundcpu(*this, "soundcpu") 110 , m_eeprom(*this, "eeprom") 111 , m_dev_n2a03a(*this, "n2a03a") 112 , m_dev_n2a03b(*this, "n2a03b") 113 , m_dev_vp2(*this, "virtual_p2") 114 , m_dev_6h(*this, "ls259.6h") 115 , m_ls175_3d(*this, "ls175.3d") 116 , m_discrete(*this, "discrete") 117 , m_m58817(*this, "tms") 118 , m_watchdog(*this, "watchdog") 119 , m_video_ram(*this,"video_ram") 120 , m_sprite_ram(*this,"sprite_ram") 121 , m_snd_rom(*this, "soundcpu") 122 , m_vidhw(DKONG_BOARD) 123 , m_sig30Hz(0) 124 , m_blue_level(0) 125 , m_cv1(0) 126 , m_cv2(0) 127 , m_vg1(0) 128 , m_vg2(0) 129 , m_vg3(0) 130 , m_cv3(0) 131 , m_cv4(0) 132 , m_gfxdecode(*this, "gfxdecode") 133 , m_screen(*this, "screen") 134 , m_palette(*this, "palette") 135 , m_z80dma(*this, "z80dma") 136 , m_dma8257(*this, "dma8257") 137 { 138 } 139 140 void dkong_base(machine_config &config); 141 void dk_braze(machine_config &config); 142 void dkj_braze(machine_config &config); 143 void ddk_braze(machine_config &config); 144 void dk3_braze(machine_config &config); 145 void strtheat(machine_config &config); 146 void spclforc(machine_config &config); 147 void s2650(machine_config &config); 148 void dkongjr(machine_config &config); 149 void radarscp1(machine_config &config); 150 void drktnjr(machine_config &config); 151 void dkong2b(machine_config &config); 152 void drakton(machine_config &config); 153 void radarscp(machine_config &config); 154 void pestplce(machine_config &config); 155 void herbiedk(machine_config &config); 156 void dkong3(machine_config &config); 157 void dkong3b(machine_config &config); 158 void radarscp_audio(machine_config &config); 159 void dkong2b_audio(machine_config &config); 160 void dkongjr_audio(machine_config &config); 161 void dkong3_audio(machine_config &config); 162 void radarscp1_audio(machine_config &config); 163 164 void init_strtheat(); 165 void init_herodk(); 166 void init_dkingjr(); 167 void init_drakton(); 168 void init_dkonghs(); 169 void init_dkongx(); 170 void init_dkong3hs(); 171 172 DECLARE_WRITE_LINE_MEMBER(dk_braze_a15); 173 174 private: 175 /* devices */ 176 required_device<cpu_device> m_maincpu; 177 optional_device<mcs48_cpu_device> m_soundcpu; 178 optional_device<eeprom_serial_93cxx_device> m_eeprom; 179 optional_device<n2a03_device> m_dev_n2a03a; /* dkong3 */ 180 optional_device<n2a03_device> m_dev_n2a03b; /* dkong3 */ 181 optional_device<latch8_device> m_dev_vp2; /* dkong2, virtual port 2 */ 182 optional_device<latch8_device> m_dev_6h; /* dkong2 */ 183 optional_device<latch8_device> m_ls175_3d; /* dkong2b_audio */ 184 optional_device<discrete_device> m_discrete; 185 optional_device<m58817_device> m_m58817; /* radarscp1 */ 186 optional_device<watchdog_timer_device> m_watchdog; 187 188 /* memory pointers */ 189 required_shared_ptr<uint8_t> m_video_ram; 190 required_shared_ptr<uint8_t> m_sprite_ram; 191 192 /* machine states */ 193 uint8_t m_hardware_type; 194 uint8_t m_nmi_mask; 195 196 std::unique_ptr<uint8_t[]> m_decrypted; 197 198 /* sound state */ 199 optional_region_ptr<uint8_t> m_snd_rom; 200 201 /* video state */ 202 tilemap_t *m_bg_tilemap; 203 204 bitmap_ind16 m_bg_bits; 205 const uint8_t * m_color_codes; 206 emu_timer * m_scanline_timer; 207 int8_t m_vidhw; /* Selected video hardware RS Conversion / TKG04 */ 208 209 /* radar scope */ 210 211 uint8_t * m_gfx4; 212 uint8_t * m_gfx3; 213 int m_gfx3_len; 214 215 uint8_t m_sig30Hz; 216 uint8_t m_lfsr_5I; 217 uint8_t m_grid_sig; 218 uint8_t m_rflip_sig; 219 uint8_t m_star_ff; 220 uint8_t m_blue_level; 221 double m_cd4049_a; 222 double m_cd4049_b; 223 224 /* Specific states */ 225 int8_t m_decrypt_counter; 226 227 /* 2650 protection */ 228 uint8_t m_protect_type; 229 uint8_t m_hunchloopback; 230 uint8_t m_prot_cnt; 231 uint8_t m_main_fo; 232 233 /* Save state relevant */ 234 uint8_t m_gfx_bank; 235 uint8_t m_palette_bank; 236 uint8_t m_grid_on; 237 uint16_t m_grid_col; 238 uint8_t m_sprite_bank; 239 uint8_t m_dma_latch; 240 uint8_t m_flip; 241 242 /* radarscp_step */ 243 double m_cv1; 244 double m_cv2; 245 double m_vg1; 246 double m_vg2; 247 double m_vg3; 248 double m_cv3; 249 double m_cv4; 250 double m_vc17; 251 int m_pixelcnt; 252 253 required_device<gfxdecode_device> m_gfxdecode; 254 required_device<screen_device> m_screen; 255 required_device<palette_device> m_palette; 256 optional_device<z80dma_device> m_z80dma; 257 optional_device<i8257_device> m_dma8257; 258 259 /* radarscp_scanline */ 260 int m_counter; 261 262 /* reverse address lookup map - hunchbkd */ 263 int16_t m_rev_map[0x200]; 264 uint8_t hb_dma_read_byte(offs_t offset); 265 void hb_dma_write_byte(offs_t offset, uint8_t data); 266 void dkong3_coin_counter_w(offs_t offset, uint8_t data); 267 uint8_t dkong_in2_r(offs_t offset); 268 uint8_t epos_decrypt_rom(offs_t offset); 269 void s2650_data_w(uint8_t data); 270 DECLARE_WRITE_LINE_MEMBER(s2650_fo_w); 271 uint8_t s2650_port0_r(); 272 uint8_t s2650_port1_r(); 273 void dkong3_2a03_reset_w(uint8_t data); 274 uint8_t strtheat_inputport_0_r(); 275 uint8_t strtheat_inputport_1_r(); 276 void nmi_mask_w(uint8_t data); 277 void dk_braze_a15_w(uint8_t data); 278 void dkong_videoram_w(offs_t offset, uint8_t data); 279 void dkongjr_gfxbank_w(uint8_t data); 280 void dkong3_gfxbank_w(uint8_t data); 281 void dkong_palettebank_w(offs_t offset, uint8_t data); 282 void radarscp_grid_enable_w(uint8_t data); 283 void radarscp_grid_color_w(uint8_t data); 284 void dkong_flipscreen_w(uint8_t data); 285 void dkong_spritebank_w(uint8_t data); 286 void dkong_voice_w(uint8_t data); 287 void dkong_audio_irq_w(uint8_t data); 288 uint8_t p8257_ctl_r(); 289 void p8257_ctl_w(uint8_t data); 290 void p8257_drq_w(uint8_t data); 291 void dkong_z80dma_rdy_w(uint8_t data); 292 uint8_t braze_eeprom_r(); 293 void braze_eeprom_w(uint8_t data); 294 TILE_GET_INFO_MEMBER(dkong_bg_tile_info); 295 TILE_GET_INFO_MEMBER(radarscp1_bg_tile_info); 296 DECLARE_MACHINE_START(dkong2b); 297 DECLARE_MACHINE_RESET(dkong); 298 DECLARE_MACHINE_RESET(ddk); 299 DECLARE_VIDEO_START(dkong); 300 DECLARE_VIDEO_START(dkong_base); 301 void dkong2b_palette(palette_device &palette); 302 DECLARE_MACHINE_START(dkong3); 303 void dkong3_palette(palette_device &palette); 304 DECLARE_MACHINE_START(radarscp); 305 void radarscp_palette(palette_device &palette); 306 DECLARE_MACHINE_START(radarscp1); 307 void radarscp1_palette(palette_device &palette); 308 DECLARE_MACHINE_START(s2650); 309 DECLARE_MACHINE_RESET(strtheat); 310 DECLARE_MACHINE_RESET(drakton); 311 void m58817_command_w(uint8_t data); 312 uint8_t dkong_voice_status_r(); 313 uint8_t dkong_tune_r(offs_t offset); 314 void dkong_p1_w(uint8_t data); 315 uint32_t screen_update_dkong(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); 316 uint32_t screen_update_pestplce(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); 317 uint32_t screen_update_spclforc(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); 318 DECLARE_WRITE_LINE_MEMBER(s2650_interrupt); 319 DECLARE_WRITE_LINE_MEMBER(vblank_irq); 320 TIMER_CALLBACK_MEMBER(scanline_callback); 321 DECLARE_WRITE_LINE_MEMBER(busreq_w); 322 323 void braze_decrypt_rom(uint8_t *dest); 324 void dk_braze_decrypt(); 325 void drakton_decrypt_rom(uint8_t mod, int offs, int *bs); 326 uint8_t memory_read_byte(offs_t offset); 327 void memory_write_byte(offs_t offset, uint8_t data); 328 double CD4049(double x); 329 330 void dkong3_io_map(address_map &map); 331 void dkong3_map(address_map &map); 332 void dkong3_sound1_map(address_map &map); 333 void dkong3_sound2_map(address_map &map); 334 void dkong_map(address_map &map); 335 void dkong_sound_io_map(address_map &map); 336 void dkong_sound_map(address_map &map); 337 void dkongjr_map(address_map &map); 338 void dkongjr_sound_io_map(address_map &map); 339 void epos_readport(address_map &map); 340 void radarscp1_sound_io_map(address_map &map); 341 void s2650_data_map(address_map &map); 342 void s2650_io_map(address_map &map); 343 void s2650_map(address_map &map); 344 345 private: 346 // video/dkong.c 347 void radarscp_step(int line_cnt); 348 void radarscp_scanline(int scanline); 349 void check_palette(void); 350 void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, uint32_t mask_bank, uint32_t shift_bits); 351 void radarscp_draw_background(bitmap_ind16 &bitmap, const rectangle &cliprect); 352 353 }; 354 355 #endif // MAME_INCLUDES_DKONG_H 356