1 // license:BSD-3-Clause
2 // copyright-holders:Aaron Giles
3 /*************************************************************************
4
5 Driver for Atari polygon racer games
6
7 **************************************************************************/
8 #ifndef MAME_INCLUDES_HARDDRIV_H
9 #define MAME_INCLUDES_HARDDRIV_H
10
11 #pragma once
12
13 #include "audio/atarijsa.h"
14 #include "machine/slapstic.h"
15
16 #include "bus/rs232/rs232.h"
17
18 #include "cpu/adsp2100/adsp2100.h"
19 #include "cpu/dsp32/dsp32.h"
20 #include "cpu/m68000/m68000.h"
21 #include "cpu/tms32010/tms32010.h"
22 #include "cpu/tms34010/tms34010.h"
23
24 #include "machine/74259.h"
25 #include "machine/adc0808.h"
26 #include "machine/asic65.h"
27 #include "machine/eeprompar.h"
28 #include "machine/mc68681.h"
29 #include "machine/timekpr.h"
30 #include "machine/timer.h"
31
32 #include "sound/dac.h"
33
34 #include "emupal.h"
35 #include "screen.h"
36
37 #define HARDDRIV_MASTER_CLOCK XTAL(32'000'000)
38 #define HARDDRIV_GSP_CLOCK XTAL(48'000'000)
39
DECLARE_DEVICE_TYPE(HARDDRIV_BOARD,harddriv_board_device_state)40 DECLARE_DEVICE_TYPE(HARDDRIV_BOARD, harddriv_board_device_state)
41 DECLARE_DEVICE_TYPE(HARDDRIVC_BOARD, harddrivc_board_device_state)
42 DECLARE_DEVICE_TYPE(RACEDRIV_BOARD, racedriv_board_device_state)
43 DECLARE_DEVICE_TYPE(RACEDRIVB1_BOARD, racedrivb1_board_device_state)
44 DECLARE_DEVICE_TYPE(RACEDRIVC_BOARD, racedrivc_board_device_state)
45 DECLARE_DEVICE_TYPE(RACEDRIVC1_BOARD, racedrivc1_board_device_state)
46 DECLARE_DEVICE_TYPE(RACEDRIVC_PANORAMA_SIDE_BOARD,racedrivc_panorama_side_board_device_state)
47 DECLARE_DEVICE_TYPE(STUNRUN_BOARD, stunrun_board_device_state)
48 DECLARE_DEVICE_TYPE(STEELTAL_BOARD, steeltal_board_device_state)
49 DECLARE_DEVICE_TYPE(STEELTAL1_BOARD, steeltal1_board_device_state)
50 DECLARE_DEVICE_TYPE(STEELTALP_BOARD, steeltalp_board_device_state)
51 DECLARE_DEVICE_TYPE(STRTDRIV_BOARD, strtdriv_board_device_state)
52 DECLARE_DEVICE_TYPE(HDRIVAIR_BOARD, hdrivair_board_device_state)
53 DECLARE_DEVICE_TYPE(HDRIVAIRP_BOARD, hdrivairp_board_device_state)
54 DECLARE_DEVICE_TYPE(HARDDRIV_SOUND_BOARD, harddriv_sound_board_device)
55
56
57 class harddriv_state : public device_t
58 {
59 public:
60 harddriv_state(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
61
62 void driver_msp(machine_config &config);
63 void driver_nomsp(machine_config &config);
64 void multisync_msp(machine_config &config);
65 void multisync_nomsp(machine_config &config);
66 void dsk(machine_config &config);
67 void dsk2(machine_config &config);
68 void ds3(machine_config &config);
69 void multisync2(machine_config &config);
70 void adsp(machine_config &config);
71
72 void init_strtdriv(void);
73
74 void init_harddriv(void);
75
76 void init_harddrivc(void);
77
78 void init_racedriv(void);
79 void init_racedrivb1(void);
80
81 void init_racedrivc(void);
82 void init_racedrivc1(void);
83
84 void init_hdrivair(void);
85 void init_hdrivairp(void);
86
87 void init_steeltal(void);
88 void init_steeltal1(void);
89 void init_steeltalp(void);
90
91 void init_stunrun(void);
92 void init_racedrivc_panorama_side();
93
94 mc68681_device* get_duart() { return m_duartn68681; }
95 screen_device* get_screen() { return m_screen; }
96
97 DECLARE_WRITE_LINE_MEMBER(video_int_write_line);
98 DECLARE_WRITE_LINE_MEMBER(sound_int_write_line);
99
100 protected:
101
102 void init_video();
103 INTERRUPT_GEN_MEMBER(hd68k_irq_gen);
104 TIMER_CALLBACK_MEMBER(deferred_adsp_bank_switch);
105 TIMER_CALLBACK_MEMBER(rddsp32_sync_cb);
106
107 /*----------- defined in machine/harddriv.cpp -----------*/
108
109 /* Driver/Multisync board */
110 void hd68k_irq_ack_w(uint16_t data);
111
112 DECLARE_WRITE_LINE_MEMBER(harddriv_duart_irq_handler);
113
114 uint16_t hd68k_gsp_io_r(offs_t offset);
115 void hd68k_gsp_io_w(offs_t offset, uint16_t data);
116
117 uint16_t hd68k_msp_io_r(offs_t offset);
118 void hd68k_msp_io_w(offs_t offset, uint16_t data);
119
120 uint16_t hd68k_a80000_r();
121 uint16_t hd68k_port0_r();
122 uint16_t hd68k_adc12_r();
123 uint16_t hdc68k_port1_r();
124 uint16_t hda68k_port1_r();
125 uint16_t hdc68k_wheel_r();
126 uint16_t hd68k_sound_reset_r();
127
128 void hd68k_adc_control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
129 void hd68k_wr0_write(offs_t offset, uint16_t data);
130 void hd68k_wr1_write(offs_t offset, uint16_t data);
131 void hd68k_wr2_write(offs_t offset, uint16_t data);
132 void hd68k_nwr_w(offs_t offset, uint16_t data);
133 void hdc68k_wheel_edge_reset_w(uint16_t data);
134
135 uint16_t hd68k_zram_r(address_space &space, offs_t offset, uint16_t mem_mask = ~0);
136 void hd68k_zram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
137
138 void hdgsp_io_w(offs_t offset, u16 data, u16 mem_mask = ~u16(0));
139
140 void hdgsp_protection_w(uint16_t data);
141
142 DECLARE_WRITE_LINE_MEMBER( hdgsp_irq_gen );
143 DECLARE_WRITE_LINE_MEMBER( hdmsp_irq_gen );
144
145 /* ADSP board */
146 uint16_t hd68k_adsp_program_r(offs_t offset);
147 void hd68k_adsp_program_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
148
149 uint16_t hd68k_adsp_data_r(offs_t offset);
150 void hd68k_adsp_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
151
152 uint16_t hd68k_adsp_buffer_r(offs_t offset);
153 void hd68k_adsp_buffer_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
154
155 void hd68k_adsp_control_w(offs_t offset, uint16_t data);
156 void hd68k_adsp_irq_clear_w(uint16_t data);
157 uint16_t hd68k_adsp_irq_state_r();
158
159 uint16_t hdadsp_special_r(offs_t offset);
160 void hdadsp_special_w(offs_t offset, uint16_t data);
161
162 uint16_t steeltal_dummy_r();
163 uint32_t rddsp_unmap_r();
164
165 /* DS III/IV board */
166 void hd68k_ds3_control_w(offs_t offset, uint16_t data);
167 uint16_t hd68k_ds3_girq_state_r();
168
169 uint16_t hd68k_ds3_gdata_r();
170 void hd68k_ds3_gdata_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
171
172 uint16_t hdds3_special_r(offs_t offset);
173 void hdds3_special_w(offs_t offset, uint16_t data);
174 uint16_t hdds3_control_r(offs_t offset);
175 void hdds3_control_w(offs_t offset, uint16_t data);
176
177 uint16_t hd68k_ds3_program_r(offs_t offset);
178 void hd68k_ds3_program_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
179
180 uint16_t hd68k_ds3_sdata_r();
181 void hd68k_ds3_sdata_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
182 void hd68k_ds3_sirq_clear_w(uint16_t data);
183 uint16_t hd68k_ds3_sirq_state_r();
184
185 uint16_t hdds3_sdsp_special_r(offs_t offset);
186 void hdds3_sdsp_special_w(offs_t offset, uint16_t data);
187
188 uint16_t hdds3_sdsp_control_r(offs_t offset);
189 void hdds3_sdsp_control_w(offs_t offset, uint16_t data);
190 uint16_t hdds3_xdsp_control_r(offs_t offset);
191 void hdds3_xdsp_control_w(offs_t offset, uint16_t data);
192
193 TIMER_CALLBACK_MEMBER( xsdp_sport1_irq_off_callback );
194
195 uint16_t hdgsp_control_lo_r(offs_t offset);
196 void hdgsp_control_lo_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
197 uint16_t hdgsp_control_hi_r(offs_t offset);
198 void hdgsp_control_hi_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
199
200 uint16_t hdgsp_vram_2bpp_r();
201 void hdgsp_vram_1bpp_w(offs_t offset, uint16_t data);
202 void hdgsp_vram_2bpp_w(offs_t offset, uint16_t data);
203
204 uint16_t hdgsp_paletteram_lo_r(offs_t offset);
205 void hdgsp_paletteram_lo_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
206 uint16_t hdgsp_paletteram_hi_r(offs_t offset);
207 void hdgsp_paletteram_hi_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
208
209 /* DSK board */
210 void hddsk_update_pif(uint32_t data);
211
212 /* DS III/IV board */
213 TIMER_DEVICE_CALLBACK_MEMBER( ds3sdsp_internal_timer_callback );
214 TIMER_DEVICE_CALLBACK_MEMBER( ds3xdsp_internal_timer_callback );
215
216 TMS340X0_SCANLINE_IND16_CB_MEMBER(scanline_driver);
217 TMS340X0_SCANLINE_IND16_CB_MEMBER(scanline_multisync);
218
219 /*----------- defined in video/harddriv.cpp -----------*/
220
221 TMS340X0_TO_SHIFTREG_CB_MEMBER(hdgsp_write_to_shiftreg);
222 TMS340X0_FROM_SHIFTREG_CB_MEMBER(hdgsp_read_from_shiftreg);
223
224 /* DSK board */
225 void hd68k_dsk_control_w(offs_t offset, uint16_t data);
226 uint16_t hd68k_dsk_ram_r(offs_t offset);
227 void hd68k_dsk_ram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
228 uint16_t hd68k_dsk_small_rom_r(offs_t offset);
229 uint16_t hd68k_dsk_rom_r(offs_t offset);
230 void hd68k_dsk_dsp32_w(offs_t offset, uint16_t data);
231 uint16_t hd68k_dsk_dsp32_r(offs_t offset);
232 void rddsp32_sync0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
233 void rddsp32_sync1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
234
235 /* DSPCOM board */
236 void hddspcom_control_w(offs_t offset, uint16_t data);
237
238 void rd68k_slapstic_w(address_space &space, offs_t offset, uint16_t data);
239 uint16_t rd68k_slapstic_r(address_space &space, offs_t offset);
240
241 /* Game-specific protection */
242 void st68k_sloop_w(offs_t offset, uint16_t data);
243 uint16_t st68k_sloop_r(offs_t offset);
244 uint16_t st68k_sloop_alt_r(offs_t offset);
245 void st68k_protosloop_w(offs_t offset, uint16_t data);
246 uint16_t st68k_protosloop_r(offs_t offset);
247
248 /* GSP optimizations */
249 uint16_t hdgsp_speedup_r(offs_t offset);
250 void hdgsp_speedup1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
251 void hdgsp_speedup2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
252 uint16_t rdgsp_speedup1_r(offs_t offset);
253 void rdgsp_speedup1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
254
255 /* MSP optimizations */
256 uint16_t hdmsp_speedup_r(offs_t offset);
257 void hdmsp_speedup_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
258
259 /* ADSP optimizations */
260 uint16_t hdadsp_speedup_r();
261 uint16_t hdds3_speedup_r();
262
263
264 DECLARE_WRITE_LINE_MEMBER(hdds3sdsp_timer_enable_callback);
265 void hdds3sdsp_serial_tx_callback(uint32_t data);
266 uint32_t hdds3sdsp_serial_rx_callback();
267
268 DECLARE_WRITE_LINE_MEMBER(hdds3xdsp_timer_enable_callback);
269 void hdds3xdsp_serial_tx_callback(uint32_t data);
270 uint32_t hdds3xdsp_serial_rx_callback();
271
272
273 void adsp_data_map(address_map &map);
274 void adsp_program_map(address_map &map);
275 void driver_68k_map(address_map &map);
276 void driver_gsp_map(address_map &map);
277 void driver_msp_map(address_map &map);
278 void ds3_data_map(address_map &map);
279 void ds3_program_map(address_map &map);
280 void ds3sdsp_data_map(address_map &map);
281 void ds3sdsp_program_map(address_map &map);
282 void ds3xdsp_data_map(address_map &map);
283 void ds3xdsp_program_map(address_map &map);
284 void dsk2_dsp32_map(address_map &map);
285 void dsk_dsp32_map(address_map &map);
286 void multisync2_68k_map(address_map &map);
287 void multisync2_gsp_map(address_map &map);
288 void multisync_68k_map(address_map &map);
289 void multisync_gsp_map(address_map &map);
290
291 required_device<cpu_device> m_maincpu;
292 required_device<tms34010_device> m_gsp;
293 optional_device<tms34010_device> m_msp;
294 required_device<adsp21xx_device> m_adsp;
295 optional_device<cpu_device> m_jsacpu;
296 optional_device<dsp32c_device> m_dsp32;
297 optional_device<adsp2105_device> m_ds3sdsp;
298 optional_device<adsp2105_device> m_ds3xdsp;
299 optional_memory_region m_ds3sdsp_region;
300 optional_memory_region m_ds3xdsp_region;
301 optional_device<dac_word_interface> m_ldac;
302 optional_device<dac_word_interface> m_rdac;
303 optional_device<harddriv_sound_board_device> m_harddriv_sound;
304 optional_device<atari_jsa_base_device> m_jsa;
305 optional_device<screen_device> m_screen;
306 optional_device<mc68681_device> m_duartn68681;
307 required_device<adc0808_device> m_adc8;
308 output_finder<2> m_lamps;
309
310 uint8_t m_hd34010_host_access;
311
312 optional_shared_ptr<uint16_t> m_msp_ram;
313
314 uint16_t * m_dsk_ram;
315 uint16_t * m_dsk_rom;
316 optional_device<eeprom_parallel_28xx_device> m_dsk_10c;
317 optional_device<eeprom_parallel_28xx_device> m_dsk_30c;
318 uint8_t m_dsk_pio_access;
319
320 uint16_t * m_m68k_slapstic_base;
321 uint16_t * m_m68k_sloop_alt_base;
322
323 required_device<timekeeper_device> m_200e;
324 required_device<eeprom_parallel_28xx_device> m_210e;
325
326 optional_shared_ptr<uint16_t> m_adsp_data_memory;
327 optional_shared_ptr<uint32_t> m_adsp_pgm_memory;
328
329 optional_shared_ptr<uint16_t> m_ds3sdsp_data_memory;
330 optional_shared_ptr<uint32_t> m_ds3sdsp_pgm_memory;
331 optional_shared_ptr<uint32_t> m_ds3xdsp_pgm_memory;
332
333 optional_shared_ptr<uint32_t> m_dsp32_ram;
334
335 uint16_t * m_gsp_protection;
336
337 uint16_t * m_gsp_speedup_addr[2];
338 offs_t m_gsp_speedup_pc;
339
340 uint16_t * m_msp_speedup_addr;
341 offs_t m_msp_speedup_pc;
342
343 uint16_t * m_ds3_speedup_addr;
344 offs_t m_ds3_speedup_pc;
345 offs_t m_ds3_transfer_pc;
346
347 uint32_t * m_rddsp32_sync[2];
348
349 uint32_t m_gsp_speedup_count[4];
350 uint32_t m_msp_speedup_count[4];
351 uint32_t m_adsp_speedup_count[4];
352
353 uint8_t m_gsp_multisync;
354 optional_shared_ptr<uint8_t> m_gsp_vram;
355 optional_shared_ptr<uint16_t> m_gsp_control_lo;
356 optional_shared_ptr<uint16_t> m_gsp_control_hi;
357 optional_shared_ptr<uint16_t> m_gsp_paletteram_lo;
358 optional_shared_ptr<uint16_t> m_gsp_paletteram_hi;
359
360 required_ioport m_in0;
361 optional_ioport m_sw1;
362 required_ioport m_a80000;
363 optional_ioport_array<4> m_12badc;
364
365 /* machine state */
366 uint8_t m_irq_state;
367 uint8_t m_gsp_irq_state;
368 uint8_t m_msp_irq_state;
369 uint8_t m_adsp_irq_state;
370 uint8_t m_ds3sdsp_irq_state;
371 uint8_t m_duart_irq_state;
372
373 uint8_t m_last_gsp_shiftreg;
374
375 uint8_t m_m68k_zp1;
376 uint8_t m_m68k_zp2;
377 uint8_t m_m68k_adsp_buffer_bank;
378
379 uint8_t m_adsp_halt;
380 uint8_t m_adsp_br;
381 uint8_t m_adsp_xflag;
382 uint16_t m_adsp_sim_address;
383 uint16_t m_adsp_som_address;
384 uint32_t m_adsp_eprom_base;
385
386 required_region_ptr<uint16_t> m_sim_memory;
387 uint16_t m_som_memory[0x8000/2];
388 uint16_t * m_adsp_pgm_memory_word;
389
390 uint16_t * m_ds3_sdata_memory;
391 uint32_t m_ds3_sdata_memory_size;
392
393 uint8_t m_ds3_gcmd;
394 uint8_t m_ds3_gflag;
395 uint8_t m_ds3_g68irqs;
396 uint8_t m_ds3_gfirqs;
397 uint8_t m_ds3_g68flag;
398 uint8_t m_ds3_send;
399 uint8_t m_ds3_reset;
400 uint16_t m_ds3_gdata;
401 uint16_t m_ds3_g68data;
402 uint32_t m_ds3_sim_address;
403
404 uint8_t m_ds3_scmd;
405 uint8_t m_ds3_sflag;
406 uint8_t m_ds3_s68irqs;
407 uint8_t m_ds3_sfirqs;
408 uint8_t m_ds3_s68flag;
409 uint8_t m_ds3_sreset;
410 uint16_t m_ds3_sdata;
411 uint16_t m_ds3_s68data;
412 uint32_t m_ds3_sdata_address;
413 uint16_t m_ds3sdsp_regs[32];
414 uint16_t m_ds3sdsp_timer_en;
415 uint16_t m_ds3sdsp_sdata;
416 optional_device<timer_device> m_ds3sdsp_internal_timer;
417
418 uint16_t m_ds3xdsp_regs[32];
419 uint16_t m_ds3xdsp_timer_en;
420 uint16_t m_ds3xdsp_sdata;
421 optional_device<timer_device> m_ds3xdsp_internal_timer;
422
423 uint16_t m_adc_control;
424 uint8_t m_adc12_select;
425 uint8_t m_adc12_byte;
426 uint16_t m_adc12_data;
427
428 uint16_t m_hdc68k_last_wheel;
429 uint16_t m_hdc68k_last_port1;
430 uint8_t m_hdc68k_wheel_edge;
431 uint8_t m_hdc68k_shifter_state;
432
433 uint8_t m_st68k_sloop_bank;
434 offs_t m_st68k_last_alt_sloop_offset;
435
436 uint8_t m_sel_select;
437 uint8_t m_sel1_data;
438 uint8_t m_sel2_data;
439 uint8_t m_sel3_data;
440 uint8_t m_sel4_data;
441
442 #define MAX_MSP_SYNC 16
443 uint32_t * m_dataptr[MAX_MSP_SYNC];
444 uint32_t m_dataval[MAX_MSP_SYNC];
445 int m_next_msp_sync;
446
447 /* video state */
448 offs_t m_vram_mask;
449
450 uint8_t m_shiftreg_enable;
451
452 uint32_t m_mask_table[65536 * 4];
453 uint8_t * m_gsp_shiftreg_source;
454
455 int8_t m_gfx_finescroll;
456 uint8_t m_gfx_palettebank;
457 virtual void update_interrupts();
458 void init_driver();
459 void init_multisync(int compact_inputs);
460 void init_adsp();
461 void init_ds3();
462 void init_dsk();
463 void init_dsk2();
464 void init_dspcom();
465 void init_driver_sound();
466 void racedrivc_init_common(offs_t gsp_protection);
467 void steeltal_init_common(offs_t ds3_transfer_pc, int proto_sloop);
468
469 required_device<mc68681_device> m_duart;
470 optional_device<asic65_device> m_asic65;
471
472 /* DS III/IV board */
473 void update_ds3_irq();
474 void update_ds3_sirq();
475
476 void hdds3sdsp_reset_timer();
477 void hdds3xdsp_reset_timer();
478
479 /* Game-specific protection */
480 int st68k_sloop_tweak(offs_t offset);
481 int st68k_protosloop_tweak(offs_t offset);
482
483 /*----------- defined in video/harddriv.c -----------*/
484
485 void update_palette_bank(int newbank);
486
487 inline void gsp_palette_change(int offset);
488
489 uint8_t m_sound_int_state;
490 uint8_t m_video_int_state;
491
492 optional_device<palette_device> m_palette;
493 int get_hblank(screen_device &screen) const { return (screen.hpos() > (screen.width() * 9 / 10)); }
494 optional_device<atari_slapstic_device> m_slapstic_device;
495
496 optional_device<rs232_port_device> m_rs232;
497
498 protected:
499 virtual void device_start() override;
500 virtual void device_reset() override;
501 };
502
503 class harddriv_sound_board_device : public device_t
504 {
505 public:
506 // construction/destruction
507 harddriv_sound_board_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
~harddriv_sound_board_device()508 ~harddriv_sound_board_device() {}
509
510 uint16_t hd68k_snd_data_r();
511 uint16_t hd68k_snd_status_r();
512 void hd68k_snd_data_w(uint16_t data);
513 void hd68k_snd_reset_w(uint16_t data);
514
515 private:
516 uint16_t hdsnd68k_data_r();
517 void hdsnd68k_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
518 uint16_t hdsnd68k_switches_r(offs_t offset);
519 uint16_t hdsnd68k_320port_r(offs_t offset);
520 uint16_t hdsnd68k_status_r();
521 void hdsnd68k_latches_w(offs_t offset, uint16_t data);
522 DECLARE_WRITE_LINE_MEMBER(speech_write_w);
523 DECLARE_WRITE_LINE_MEMBER(speech_reset_w);
524 DECLARE_WRITE_LINE_MEMBER(speech_rate_w);
525 DECLARE_WRITE_LINE_MEMBER(cram_enable_w);
526 DECLARE_WRITE_LINE_MEMBER(led_w);
527 void hdsnd68k_speech_w(offs_t offset, uint16_t data);
528 void hdsnd68k_irqclr_w(uint16_t data);
529 uint16_t hdsnd68k_320ram_r(offs_t offset);
530 void hdsnd68k_320ram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
531 uint16_t hdsnd68k_320ports_r(offs_t offset);
532 void hdsnd68k_320ports_w(offs_t offset, uint16_t data);
533 uint16_t hdsnd68k_320com_r(offs_t offset);
534 void hdsnd68k_320com_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
535
536 void hdsnddsp_dac_w(uint16_t data);
537 void hdsnddsp_comport_w(uint16_t data);
538 void hdsnddsp_mute_w(uint16_t data);
539 void hdsnddsp_gen68kirq_w(uint16_t data);
540 void hdsnddsp_soundaddr_w(offs_t offset, uint16_t data);
541 uint16_t hdsnddsp_rom_r();
542 uint16_t hdsnddsp_comram_r();
543 uint16_t hdsnddsp_compare_r(offs_t offset);
544
545 void driversnd_68k_map(address_map &map);
546 void driversnd_dsp_io_map(address_map &map);
547 void driversnd_dsp_program_map(address_map &map);
548
549 virtual void device_start() override;
550 virtual void device_reset() override;
551 virtual void device_add_mconfig(machine_config &config) override;
552
553 required_device<cpu_device> m_soundcpu;
554 required_device<ls259_device> m_latch;
555 required_device<dac_word_interface> m_dac;
556 required_device<tms32010_device> m_sounddsp;
557 required_shared_ptr<uint16_t> m_sounddsp_ram;
558 required_region_ptr<uint8_t> m_sound_rom;
559
560 uint8_t m_soundflag;
561 uint8_t m_mainflag;
562 uint16_t m_sounddata;
563 uint16_t m_maindata;
564
565 uint8_t m_cramen;
566 uint8_t m_irq68k;
567
568 offs_t m_sound_rom_offs;
569
570 uint16_t m_comram[0x400/2];
571 uint64_t m_last_bio_cycles;
572
573 void update_68k_interrupts();
574 TIMER_CALLBACK_MEMBER( delayed_68k_w );
575
576 DECLARE_READ_LINE_MEMBER(hdsnddsp_get_bio);
577 };
578
579 /* Hard Drivin' */
580
581 class harddriv_board_device_state : public harddriv_state
582 {
583 public:
584 harddriv_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
585
586 protected:
587 virtual void device_add_mconfig(machine_config &config) override;
588 virtual void device_start() override;
589 // virtual void device_reset();
590 };
591
592 /* Hard Drivin' Compact */
593
594 class harddrivc_board_device_state : public harddriv_state
595 {
596 public:
597 harddrivc_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
598
599 protected:
600 virtual void device_add_mconfig(machine_config &config) override;
601 virtual void device_start() override;
602 // virtual void device_reset();
603 };
604
605 /* Race Drivin' */
606
607 class racedriv_board_device_state : public harddriv_state
608 {
609 public:
610 racedriv_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
611
612 protected:
613 racedriv_board_device_state(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
614
615 virtual void device_add_mconfig(machine_config &config) override;
616 virtual void device_start() override;
617 // virtual void device_reset();
618 };
619
620 class racedrivb1_board_device_state : public racedriv_board_device_state
621 {
622 public:
623 racedrivb1_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
624
625 protected:
626 virtual void device_start() override;
627 };
628
629 /* Race Drivin' Compact */
630
631 class racedrivc_board_device_state : public harddriv_state
632 {
633 public:
634 racedrivc_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
635
636 protected:
637 racedrivc_board_device_state(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
638
639 virtual void device_add_mconfig(machine_config &config) override;
640 virtual void device_start() override;
641 // virtual void device_reset();
642 };
643
644 class racedrivc1_board_device_state : public racedrivc_board_device_state
645 {
646 public:
647 racedrivc1_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
648
649 protected:
650 virtual void device_start() override;
651 };
652
653 class racedrivc_panorama_side_board_device_state : public racedrivc_board_device_state
654 {
655 public:
656 racedrivc_panorama_side_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
657
658 protected:
659 virtual void device_add_mconfig(machine_config &config) override;
660 virtual void device_start() override;
661 };
662
663
664 /* Stun Runner */
665
666 class stunrun_board_device_state : public harddriv_state
667 {
668 public:
669 stunrun_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
670
671 protected:
672 virtual void device_add_mconfig(machine_config &config) override;
673 virtual void device_start() override;
674 // virtual void device_reset();
675 };
676
677 /* Steel Talons */
678
679 class steeltal_board_device_state : public harddriv_state
680 {
681 public:
682 steeltal_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
683
684 protected:
685 steeltal_board_device_state(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
686
687 virtual void device_add_mconfig(machine_config &config) override;
688 virtual void device_start() override;
689 // virtual void device_reset();
690 };
691
692 class steeltal1_board_device_state : public steeltal_board_device_state
693 {
694 public:
695 steeltal1_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
696
697 protected:
698 virtual void device_start() override;
699 };
700
701 class steeltalp_board_device_state : public steeltal_board_device_state
702 {
703 public:
704 steeltalp_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
705
706 protected:
707 virtual void device_start() override;
708 };
709
710
711
712 /* Street Drivin' */
713
714 class strtdriv_board_device_state : public harddriv_state
715 {
716 public:
717 strtdriv_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
718
719 protected:
720 virtual void device_add_mconfig(machine_config &config) override;
721 virtual void device_start() override;
722 // virtual void device_reset();
723 };
724
725 /* Hard Drivin' Airbourne */
726
727 class hdrivair_board_device_state : public harddriv_state
728 {
729 public:
730 hdrivair_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
731
732 protected:
733 hdrivair_board_device_state(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
734
735 virtual void device_add_mconfig(machine_config &config) override;
736 virtual void device_start() override;
737 // virtual void device_reset();
738 };
739
740 class hdrivairp_board_device_state : public hdrivair_board_device_state
741 {
742 public:
743 hdrivairp_board_device_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
744 protected:
745 virtual void device_start() override;
746 };
747
748 #endif // MAME_INCLUDES_HARDDRIV_H
749