1 // license:BSD-3-Clause 2 // copyright-holders:Miodrag Milanovic, Robbbert 3 /* 4 * s11.h 5 * 6 * Created on: 1/01/2013 7 */ 8 9 #ifndef MAME_INCLUDES_S11_H 10 #define MAME_INCLUDES_S11_H 11 12 #include "cpu/m6800/m6800.h" 13 #include "audio/pinsnd88.h" 14 #include "audio/s11c_bg.h" 15 #include "machine/6821pia.h" 16 #include "machine/genpin.h" 17 #include "machine/input_merger.h" 18 #include "machine/rescap.h" 19 #include "sound/dac.h" 20 #include "sound/flt_biquad.h" 21 #include "sound/hc55516.h" 22 #include "sound/ym2151.h" 23 24 // 6802/8 CPU's input clock is 4MHz 25 // but because it has an internal /4 divider, its E clock runs at 1/4 that frequency 26 #define E_CLOCK (XTAL(4'000'000)/4) 27 28 // Length of time in cycles between IRQs on the main 6808 CPU 29 // This length is determined by the settings of the W14 and W15 jumpers 30 // IRQ pulse width is always 32 cycles 31 // All machines I've looked at so far have W14 present and W15 absent 32 // which makes the timer int fire every 0x380 E-clocks (1MHz/0x380, ~1.116KHz) 33 // It is possible to have W15 present and W14 absent instead, 34 // which makes the timer fire every 0x700 E-clocks (1MHz/0x700, ~558Hz) 35 // but I am unaware of any games which make use of this feature. 36 // define the define below to enable the W15-instead-of-W14 feature. 37 #undef S11_W15 38 39 class s11_state : public genpin_class 40 { 41 public: s11_state(const machine_config & mconfig,device_type type,const char * tag)42 s11_state(const machine_config &mconfig, device_type type, const char *tag) 43 : genpin_class(mconfig, type, tag) 44 , m_maincpu(*this, "maincpu") 45 , m_mainirq(*this, "mainirq") 46 , m_piairq(*this, "piairq") 47 , m_audiocpu(*this, "audiocpu") 48 , m_audioirq(*this, "audioirq") 49 , m_hc55516(*this, "hc55516") 50 , m_cvsd_filter(*this, "cvsd_filter") 51 , m_cvsd_filter2(*this, "cvsd_filter2") 52 , m_dac(*this, "dac") 53 , m_pias(*this, "pias") 54 , m_pia21(*this, "pia21") 55 , m_pia24(*this, "pia24") 56 , m_pia28(*this, "pia28") 57 , m_pia2c(*this, "pia2c") 58 , m_pia30(*this, "pia30") 59 , m_pia34(*this, "pia34") 60 , m_bg(*this, "bg") 61 , m_ps88(*this, "ps88") 62 , m_digits(*this, "digit%u", 0U) 63 , m_swarray(*this, "SW.%u", 0U) 64 { } 65 66 void s11(machine_config &config); 67 void s11_only(machine_config &config); 68 void s11_bgs(machine_config &config); 69 void s11_bgm(machine_config &config); 70 71 void init_s11(); 72 73 DECLARE_INPUT_CHANGED_MEMBER(main_nmi); 74 DECLARE_INPUT_CHANGED_MEMBER(audio_nmi); 75 76 uint8_t sound_r(); 77 void bank_w(uint8_t data); 78 void dig0_w(uint8_t data); 79 void dig1_w(uint8_t data); 80 void lamp0_w(uint8_t data); lamp1_w(uint8_t data)81 void lamp1_w(uint8_t data) { }; sol2_w(uint8_t data)82 void sol2_w(uint8_t data) { }; // solenoids 8-15 83 void sol3_w(uint8_t data); // solenoids 0-7 84 void sound_w(uint8_t data); 85 86 void pia2c_pa_w(uint8_t data); 87 void pia2c_pb_w(uint8_t data); 88 void pia34_pa_w(uint8_t data); 89 void pia34_pb_w(uint8_t data); 90 DECLARE_WRITE_LINE_MEMBER(pia34_cb2_w); 91 92 DECLARE_WRITE_LINE_MEMBER(pias_ca2_w); 93 DECLARE_WRITE_LINE_MEMBER(pias_cb2_w); 94 DECLARE_WRITE_LINE_MEMBER(pia21_ca2_w); DECLARE_WRITE_LINE_MEMBER(pia21_cb2_w)95 DECLARE_WRITE_LINE_MEMBER(pia21_cb2_w) { }; // enable solenoids DECLARE_WRITE_LINE_MEMBER(pia24_cb2_w)96 DECLARE_WRITE_LINE_MEMBER(pia24_cb2_w) { }; // dummy to stop error log filling up DECLARE_WRITE_LINE_MEMBER(pia28_ca2_w)97 DECLARE_WRITE_LINE_MEMBER(pia28_ca2_w) { }; // comma3&4 DECLARE_WRITE_LINE_MEMBER(pia28_cb2_w)98 DECLARE_WRITE_LINE_MEMBER(pia28_cb2_w) { }; // comma1&2 DECLARE_WRITE_LINE_MEMBER(pia30_cb2_w)99 DECLARE_WRITE_LINE_MEMBER(pia30_cb2_w) { }; // dummy to stop error log filling up 100 DECLARE_WRITE_LINE_MEMBER(pia_irq); 101 DECLARE_WRITE_LINE_MEMBER(main_irq); 102 103 uint8_t switch_r(); 104 void switch_w(uint8_t data); 105 uint8_t pia28_w7_r(); 106 107 void s11_main_map(address_map &map); 108 void s11_audio_map(address_map &map); 109 110 protected: 111 DECLARE_MACHINE_RESET(s11); 112 113 // devices 114 required_device<cpu_device> m_maincpu; 115 required_device<input_merger_device> m_mainirq; 116 required_device<input_merger_device> m_piairq; 117 // the following devices are optional because certain board variants (i.e. system 11c) do not have the audio section on the mainboard populated 118 optional_device<m6802_cpu_device> m_audiocpu; 119 optional_device<input_merger_device> m_audioirq; 120 optional_device<hc55516_device> m_hc55516; 121 optional_device<filter_biquad_device> m_cvsd_filter; 122 optional_device<filter_biquad_device> m_cvsd_filter2; 123 optional_device<mc1408_device> m_dac; 124 optional_device<pia6821_device> m_pias; 125 required_device<pia6821_device> m_pia21; 126 required_device<pia6821_device> m_pia24; 127 required_device<pia6821_device> m_pia28; 128 required_device<pia6821_device> m_pia2c; 129 required_device<pia6821_device> m_pia30; 130 required_device<pia6821_device> m_pia34; 131 optional_device<s11c_bg_device> m_bg; 132 optional_device<pinsnd88_device> m_ps88; 133 output_finder<63> m_digits; 134 required_ioport_array<8> m_swarray; 135 136 // getters/setters get_strobe()137 uint8_t get_strobe() { return m_strobe; } set_strobe(uint8_t s)138 void set_strobe(uint8_t s) { m_strobe = s; } get_diag()139 uint8_t get_diag() { return m_diag; } set_diag(uint8_t d)140 void set_diag(uint8_t d) { m_diag = d; } get_segment1()141 uint32_t get_segment1() { return m_segment1; } set_segment1(uint32_t s)142 void set_segment1(uint32_t s) { m_segment1 = s; } get_segment2()143 uint32_t get_segment2() { return m_segment2; } set_segment2(uint32_t s)144 void set_segment2(uint32_t s) { m_segment2 = s; } set_timer(emu_timer * t)145 void set_timer(emu_timer* t) { m_irq_timer = t; } 146 147 static const device_timer_id TIMER_IRQ = 0; 148 149 private: machine_start()150 virtual void machine_start() override { m_digits.resolve(); } 151 virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; 152 153 uint8_t m_sound_data; 154 uint8_t m_strobe; 155 uint8_t m_switch_col; 156 uint8_t m_diag; 157 uint32_t m_segment1; 158 uint32_t m_segment2; 159 uint32_t m_timer_count; 160 emu_timer* m_irq_timer; 161 bool m_timer_irq_active; 162 bool m_pia_irq_active; 163 }; 164 165 #endif // MAME_INCLUDES_S11_H 166