1 // license:BSD-3-Clause 2 // copyright-holders:Robert Justice,68bit 3 /*************************************************************************** 4 swtpc09 include file 5 Robert Justice ,2009-2014 6 7 ****************************************************************************/ 8 9 #ifndef MAME_INCLUDES_SWTPC09_H 10 #define MAME_INCLUDES_SWTPC09_H 11 12 #pragma once 13 14 #include "cpu/m6809/m6809.h" 15 #include "machine/wd_fdc.h" 16 #include "imagedev/floppy.h" 17 #include "machine/6840ptm.h" 18 #include "machine/6821pia.h" 19 #include "machine/6522via.h" 20 #include "machine/input_merger.h" 21 #include "imagedev/harddriv.h" 22 #include "machine/wd1000.h" 23 #include "machine/bankdev.h" 24 #include "machine/mc14411.h" 25 26 27 class swtpc09_state : public driver_device 28 { 29 public: swtpc09_state(const machine_config & mconfig,device_type type,const char * tag)30 swtpc09_state(const machine_config &mconfig, device_type type, const char *tag) 31 : driver_device(mconfig, type, tag) 32 , m_maincpu(*this, "maincpu") 33 , m_brg(*this, "brg") 34 , m_pia(*this, "pia") 35 , m_ptm(*this, "ptm") 36 , m_fdc(*this, "fdc") 37 , m_floppy0(*this, "fdc:0") 38 , m_floppy1(*this, "fdc:1") 39 , m_floppy2(*this, "fdc:2") 40 , m_floppy3(*this, "fdc:3") 41 , m_hdc(*this, "hdc") 42 , m_via(*this, "via") 43 , m_via_cb2(*this, "via_cb2") 44 , m_dat(*this, "dat") 45 , m_bankdev(*this, "bankdev") 46 , m_maincpu_clock(*this, "MAINCPU_CLOCK") 47 , m_fdc_clock(*this, "FDC_CLOCK") 48 , m_baud_rate_high(*this, "BAUD_RATE_HIGH") 49 , m_floppy_expected_density(*this, "FLOPPY_EXPECTED_DENSITY") 50 , m_floppy_expected_sectors(*this, "FLOPPY_EXPECTED_SECTORS") 51 , m_floppy_track_zero_expected_sectors(*this, "FLOPPY_TRACK_ZERO_EXPECTED_SECTORS") 52 , m_sbug_double_density(*this, "SBUG_DOUBLE_DENSITY") 53 , m_piaide_flex_boot_cd00(*this, "PIAIDE_FLEX_BOOT_CD00") 54 { } 55 56 void swtpc09_base(machine_config &config); 57 void swtpc09i(machine_config &config); 58 void swtpc09d3(machine_config &config); 59 void swtpc09u(machine_config &config); 60 void swtpc09(machine_config &config); 61 void swtpc09o(machine_config &config); 62 63 void init_swtpc09(); 64 void init_swtpc09i(); 65 void init_swtpc09u(); 66 void init_swtpc09d3(); 67 void init_swtpc09o(); 68 69 DECLARE_INPUT_CHANGED_MEMBER(maincpu_clock_change); 70 DECLARE_INPUT_CHANGED_MEMBER(fdc_clock_change); 71 DECLARE_INPUT_CHANGED_MEMBER(baud_rate_high_change); 72 73 private: 74 DECLARE_FLOPPY_FORMATS(floppy_flex_formats); 75 DECLARE_FLOPPY_FORMATS(floppy_uniflex_formats); 76 77 uint8_t pia0_a_r(); 78 uint8_t pia0_ca1_r(); 79 DECLARE_WRITE_LINE_MEMBER( pia0_irq_a ); 80 81 DECLARE_WRITE_LINE_MEMBER(io_irq_w); 82 83 DECLARE_WRITE_LINE_MEMBER( ptm_o1_callback ); 84 DECLARE_WRITE_LINE_MEMBER( ptm_o3_callback ); 85 DECLARE_WRITE_LINE_MEMBER( ptm_irq ); 86 87 DECLARE_WRITE_LINE_MEMBER( fdc_intrq_w ); 88 DECLARE_WRITE_LINE_MEMBER( fdc_drq_w ); 89 DECLARE_WRITE_LINE_MEMBER( fdc_sso_w ); 90 91 uint8_t dmaf3_via_read_porta(); 92 uint8_t dmaf3_via_read_portb(); 93 void dmaf3_via_write_porta(uint8_t data); 94 void dmaf3_via_write_portb(uint8_t data); 95 DECLARE_WRITE_LINE_MEMBER( dmaf3_via_irq ); 96 97 TIMER_CALLBACK_MEMBER(floppy_motor_callback); 98 99 uint8_t dmaf2_fdc_r(offs_t offset); 100 void dmaf2_fdc_w(offs_t offset, uint8_t data); 101 uint8_t dmaf2_dma_address_reg_r(); 102 void dmaf2_dma_address_reg_w(uint8_t data); 103 uint8_t dmaf2_control_reg_r(); 104 void dmaf2_control_reg_w(uint8_t data); 105 106 uint8_t dmaf3_fdc_r(offs_t offset); 107 void dmaf3_fdc_w(offs_t offset, uint8_t data); 108 uint8_t dmaf3_dma_address_reg_r(); 109 void dmaf3_dma_address_reg_w(uint8_t data); 110 uint8_t dmaf3_control_reg_r(); 111 void dmaf3_control_reg_w(uint8_t data); 112 113 DECLARE_WRITE_LINE_MEMBER(dmaf3_hdc_intrq_w); 114 DECLARE_WRITE_LINE_MEMBER( dmaf3_hdc_drq_w ); 115 uint8_t dmaf3_hdc_control_r(); 116 void dmaf3_hdc_control_w(uint8_t data); 117 uint8_t dmaf3_hdc_reset_r(); 118 void dmaf3_hdc_reset_w(uint8_t data); 119 uint8_t dmaf3_archive_reset_r(); 120 void dmaf3_archive_reset_w(uint8_t data); 121 uint8_t dmaf3_archive_clear_r(); 122 void dmaf3_archive_clear_w(uint8_t data); 123 124 uint8_t main_r(offs_t offset); 125 void main_w(offs_t offset, uint8_t data); 126 127 uint8_t m6844_r(offs_t offset); 128 void m6844_w(offs_t offset, uint8_t data); 129 130 uint8_t unmapped_r(offs_t offset); 131 void unmapped_w(offs_t offset, uint8_t data); 132 133 void flex_dc5_piaide_mem(address_map &map); 134 void flex_dmaf2_mem(address_map &map); 135 void mp09_mem(address_map &map); 136 void uniflex_dmaf2_mem(address_map &map); 137 void uniflex_dmaf3_mem(address_map &map); 138 void os9_mem(address_map &map); 139 140 virtual void machine_start() override; 141 virtual void machine_reset() override; 142 143 void swtpc09_irq_handler(uint8_t peripheral, uint8_t state); 144 145 void floppy_motor_trigger(); 146 147 void validate_floppy_side(uint8_t cmd); 148 uint8_t validate_fdc_sector_size(uint8_t cmd); 149 uint8_t validate_fdc_dden(uint8_t dden); 150 151 offs_t dat_translate(offs_t offset) const; 152 153 required_device<mc6809_device> m_maincpu; 154 required_device<mc14411_device> m_brg; 155 required_device<pia6821_device> m_pia; 156 required_device<ptm6840_device> m_ptm; 157 158 optional_device<fd1797_device> m_fdc; 159 optional_device<floppy_connector> m_floppy0; 160 optional_device<floppy_connector> m_floppy1; 161 optional_device<floppy_connector> m_floppy2; 162 optional_device<floppy_connector> m_floppy3; 163 164 optional_device<wd1000_device> m_hdc; 165 166 optional_device<via6522_device> m_via; 167 optional_device<input_merger_device> m_via_cb2; 168 required_shared_ptr<uint8_t> m_dat; 169 required_device<address_map_bank_device> m_bankdev; 170 required_ioport m_maincpu_clock; 171 required_ioport m_fdc_clock; 172 required_ioport m_baud_rate_high; 173 required_ioport m_floppy_expected_density; 174 required_ioport m_floppy_expected_sectors; 175 required_ioport m_floppy_track_zero_expected_sectors; 176 required_ioport m_sbug_double_density; 177 required_ioport m_piaide_flex_boot_cd00; 178 179 uint8_t m_pia_counter; // this is the counter on pia porta 180 181 uint8_t m_dmaf_high_address[4]; // dmaf2 or dmaf3 dma extended address reg 182 uint8_t m_dmaf2_interrupt_enable; 183 184 uint8_t m_system_type; // flag to indicate hw and rom combination 185 uint8_t m_fdc_status; // for floppy controller 186 int m_floppy_motor_on; 187 emu_timer *m_floppy_motor_timer; 188 floppy_image_device *m_fdc_floppy; // Current selected floppy. 189 uint8_t m_fdc_side; // Current floppy side. 190 uint8_t m_fdc_dden; // Current dden state. 191 uint8_t m_dmaf3_via_porta; 192 uint8_t m_dmaf3_via_portb; 193 uint8_t m_active_interrupt; 194 uint8_t m_interrupt; 195 196 address_space *m_banked_space; 197 198 // TODO: move this in proper device 199 200 /* channel_data structure holds info about each 6844 DMA channel */ 201 struct m6844_channel_data 202 { 203 int active; 204 int address; 205 int counter; 206 // Channel control register. 207 // bit 0: Read / Write mode 208 // bit 1: Mode control B 209 // bit 2: Mode control A 210 // bit 3: Address up (0) / down (1). 211 // bit 4: Not used 212 // bit 5: Not used 213 // bit 6: Busy / Ready. Read only. Set when request 214 // made. Cleared when transfer completed. 215 // bit 7: DMA end flag. Read only? Set when transfer 216 // completed. Cleared when control register 217 // read. Sets IRQ. 218 // Mode control A,B: 0,0 Mode2; 0,1 Mode 3; 1,0 Mode 0; 219 // 1,1 Undefined. 220 uint8_t control; 221 int start_address; 222 int start_counter; 223 }; 224 225 /* 6844 description */ 226 m6844_channel_data m_m6844_channel[4]; 227 uint8_t m_m6844_priority; 228 // Interrupt control register. 229 // Bit 0-3: channel interrupt enable, 1 enabled, 0 masked. 230 // Bit 4-6: unused 231 // Bit 7: Read only. Set to 1 when IRQ asserted. Clear when the 232 // control register associated with the channel that caused the 233 // interrut is read. 234 uint8_t m_m6844_interrupt; 235 uint8_t m_m6844_chain; 236 void m6844_update_interrupt(); 237 void m6844_fdc_dma_transfer(uint8_t channel); 238 void m6844_hdc_dma_transfer(uint8_t channel); 239 }; 240 241 #endif // MAME_INCLUDES_SWTPC09_H 242