1NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! 2 3/dev/bios is obsolete and no longer under development. 4Please use the flashrom utility instead: https://www.flashrom.org/ 5 6NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! 7 8ChangeLog for /dev/bios 9 10** 2004/03/31 ******************************************************** 11 12 * Added fix from Alex Beregszaszi to remove global *bios 13 14** 2004/03/05 ******************************************************** 15 16 * fix compiling for 2.6 kernels. 17 18** 03/06/04 ********************************************************** 19 20 * add SST49LF080A 21 * small 2.5 fix. 22 23** 02/06/10 ********************************************************** 24 25 * some changes to detect pci cards firmware. 26 * pci cards firmware can be read even if flashing is not possible. 27 This is a new feature and might cause problems on some systems. 28 29** 02/04/16 ********************************************************** 30 31 * reorganize Makefile, include .config from kernel. 32 * platform fixes for clean compilation. 33 34** 02/04/12 ********************************************************** 35 36 * proprietary x86-64 support. 37 * change ruffian probe address 38 39** 02/03/28 ********************************************************** 40 41 * proper implementation of system firmware detection on LX164 Alphas 42 * partly include jedec command cleanup patch from Pierrick Hascoet 43 <pierrick.hascoet@hydromel.net> 44 45** 02/03/11 ********************************************************** 46 47 * only probe 512k on CS5530(A) 48 * add EON EN29F002 chips. 49 50** 02/02/22 ********************************************************** 51 52 * rewrite major parts of bridge probing to make driver more generic. 53 * add Ali chipset support 54 * Saner iounmap() of flash devices. 55 56** 02/02/18 * 0.3.2 ************************************************** 57 58 * change cs5530 driver to map high rom range instead of low one 59 and don't use positive decode. 60 * remove ruffian flag. Alpha (164LX/UX) almost works with pc code. 61 * don't rely on register defaults in intel 8xx driver. 62 * updated pci device list. more entries, join amd and via entry. 63 * fix error handling in chipset detection. 64 * add support for Reliance/ServerWorks chipsets 65 * enable 1M 512k on intel 4x0 chips where it's possible 66 * cleanup proc file handling 67 68** 02/02/17 ********************************************************** 69 70 * rewrote chipset initialisation skeleton. 71 * fix pci bios (un)mapping. 72 * experimental support for AlphaPC 164UX (Ruffian) 73 (probes at 0xfffffffffffc0000 instead of 0xfffffc87C0000000 74 * initial code for FWH mode chips 75 * Fix Toggle-Until-Ready code. 76 77** 02/02/16 ********************************************************** 78 79 * iounmapping fixed. no more address space wasted. 80 * /proc/bios shows physical address now. dmesg shows 81 physical address and virtual memory area and offset. 82 83** 02/02/13 ********************************************************** 84 85 * added i820/i830 chipset support 86 * added AMD 751/760MP(X) support 87 * added support for Itanium and 84460GX chipset 88 * added experimental support for some flash chips (ST, Intel, 89 Winbond) 90 * use spinlocks instead of hard cli() 91 92** 02/02/11 ********************************************************** 93 94 * added GPL licence tag 95 * remove low bios area access tweaking for intel drivers 96 * speed up SST 39SF020 write 97 * fix compilation for 2.5 kernels 98 99** 02/02/05 ********************************************************** 100 101 * added support for cs5530 (nsc/cyrix mediagx) chipset 102 * reorganized shadow/wp handling 103 * probe for 2mb high memory area instead of 256k only 104 105** 01/08/01 * 0.3.1 ************************************************** 106 107 * compiles and works with Linux kernel 2.4 108 * rewrote flash chip probing 109 * always use ioremap now 110 * flash chips above 128k should work transparent 111 * Support for newer VIA chipsets 112 113** 00/10/15 * 0.3.0pre1 ********************************************** 114 115 * added patch from Eric Estabrook 116 * support for 256k flash chips on intel 430/440 chipsets and via vp3 117 * split up source into several files 118 * Changes for Ruffian AXP machines. Does not work (yet). 119 120** 99/07/29 * 0.2.101 ************************************************ 121 122 * Oh well.. 11 months? Impossible. I am a lazy guy. Implemented 123 some support for VIA Apollo VP3. Don't know whether it works, since 124 I don't have one. 125 126** 98/09/06 ********************************************************** 127 128patches by prumpf@jcsbs.lanobis.de: 129 * The pointer to bios_release in bios.c was on the flush pointer's 130 position. This caused Oopses. 131 * When bios_read was called with a file position after the actual end 132 of bios, it tried to read non-existant memory positions due to size 133 being unsigned (it isn't anymore) , causing spontaneous reboots on 134 my system 135 136** 98/08/22 ********************************************************** 137 138 * Well,.. The diskless spectacle (0.2.100) was caused by a little bug 139 in in handling Intel PCI chipsets. Works now. 140 * Threw out the chipset_backout stuff. the PCI chipset handling should 141 always leave the machine in the same state it was before. ALWAYS. 142 143** 98/08/18 * 0.2.100 ************************************************ 144 145 * Threw out the mem_type stuff. There are more important things than 146 this. 147 * Argh! After flashing fine on an Intel 28F001BT, the computer kept 148 hanging in an endless loop and refused writing the emergency boot 149 block to the end :-( There's some work until 0.3 is ready. 150 Implemented a timeout so that the system will not hang forever if 151 the flashchip behaves unexpected. 152 * Removed x86 probing in a loop. I think it never found anything else 153 but the system bios and *maybe* the graphics adapter bios. On the 154 other hand, it reconfigures some networking cards to silence. 155 Bad thing on diskless Linux boxes :) 156 157** 98/08/15 ********************************************************** 158 159 * added some changes for intel to compile without warnings.. 160 161** 98/08/02 ********************************************************** 162 163 * What a boring job! Checked some dozen of flash chip entries today 164 and added a lot of new ones. I bet it gets hard to find anything 165 this driver does not know. 166 167** 98/07/28 ********************************************************** 168 169 * Yeah! Atmel Chips finally work.. These Atmel guys are really weird. 170 * Testing last instead of first written byte now, when polling for the 171 end of a write access. 172 173** 98/07/28 ********************************************************** 174 175 * Well, I am definitely spending too much time in IRC, but detecting 176 PCI cards' bioses works now (at least for me) 177 * Thrown out some obsolete stuff. 178 * Declared PCI and Flash reading/writing __inline__. Don't know, 179 whether this is a good idea. But let's try it for a while. 180 * Aaaargh! Some major mistakes in handling whether a flash has to 181 be erased before programming. FIXED! 182 * Even worse. An endless loop made it into writing in 0.2.99. Sorry! 183 I had no chance to test writing on an intel board with that release. 184 At least my warning, not to write, made sense. 185 * Intel flashchips are supported now!! It's at least tested on my 186 Alpha AXP LX164 Board (1MByte i28f008 chip) But all Intel flash chips 187 seem to work in the same way. 188 * Atmel 64kByte flash chips supported. 189 190** 98/07/27 ********************************************************** 191 192 * Split up flash_probe in 2 parts to be able to expand probing on 193 PCI bioses and others correctly. 194 * Turned around 1st and 2nd probing codes. This is funny, Atmel 195 Flashroms give some wrong numbers if they are probed with the 196 0x80/0x60 way. I only hope that no flashchips react on the 197 0x90 method with wrong values. 198 199** 98/07/19 * V0.2.99 ************************************************ 200 201 * Reading the flashchip works now on Alpha AXP (at least on my LX164 202 Board) 203 Writing ought to work, too, but Intel Flashchips are not supported 204 yet. This should be done until 0.3.0. 205 NOTE: I have no idea whether this driver still works on intel 206 boards or not. There have been too many changes. Please try, but 207 do not flash with this release of the driver. 208 * Minor Changes and fixes. Naming scheme changed a bit. This version 209 might work on James Mastros' machine again ?!? 210 211** 98/07/11 ********************************************************** 212 213 * Started porting stuff to Alpha AXP architecture to continue testing 214 the flashing routines. We have a lot of tests next week, so I 215 won't get much stuff done.. 216 Porting to AXP seems to be much more work than I thought. It may 217 take some time until the next version is released. 218 * Moved major number again. This time we have an official major 219 number for /dev/bios. Thanks to Hans Peter Anvin. 220 (Well, we have this one since May 1st, sorry for the delay) 221 222** 98/06/26 * V0.2.95 ************************************************ 223 224 * added all Manufacturer IDs from the JEDEC standards publication. 225 * sorry for not having released a new version since months, but 226 my x86 machine died and I have no chance to do any testing right 227 now. I guess I must get a new Intel box, as Alpha AXP are all 228 delivered with the same Intel flash chips. 229 230** 98/04/30 * V0.2.9 ************************************************* 231 232 * removed ioctls. They have been really unneccesary and did not fit 233 into the new driver layout. 234 * cleaned up the code. Hey, it should be readable again. 235 * Moved device minors from 10+ to 0+ 236 * Rewrote most of the documentation 237 * changed intel shadowing routines. Now original values are saved 238 and shadowing is turned off for 0xc0000 to 0xdffff, too (This 239 was needed to support 2MBit system bios flash chips. Thanks again 240 to Matthew Harrell for intensive testing. 241 * Removed dirty hacks from bios_read_proc() 242 * Added some fields to struct flashdevice to support all ROM types, 243 not only flash roms. Probing for other types still missing. 244 * Implemented probing for some strange Winbond chips (0x80/0x20). 245 246** 98/04/27 * V0.2.8 ************************************************* 247 248 *** Attention *** This version has a lot of changes since 249 0.2.7, so be very careful, when testing. Things may 250 be broken that used to work. 251 252 * Rewrote big parts of the driver to (theoretically) support 253 multiple flash chips and/or ROM areas. 254 * Tried to implement support for 2MBit System BIOS chips, but 255 I have no idea, whether it works. I don't have one. 256 * added some more OPTi, SiS and VIA PCI chipsets to chipset list. 257 They have no function yet, though. 258 * Some weird computers have an ISA bridge, but don't have it declared 259 as one. Now probing for known ISA bridge IDs. (Thanks to Matthew 260 Harrell for reporting this.) 261 * Added some new flashchip IDs and made some old ones work. 262 263** 98/04/24 * V0.2.7 ************************************************* 264 265 * rewrote shadowing and wp functions to use a pci_functions structure 266 This makes it very easy to include new PCI chipsets. 267 * function chipset_init() detects PCI chipset. 268 * modversions support. Thanks to Matthew Harrell. 269 * moved PCI bridge detection to chipset_init() 270 271** 98/04/23 * V0.2.6 ************************************************* 272 273 * repaired flashchip_ready_toggle and flashchip_ready_poll. 274 * Set WRITE_DELAY to 300 as it should be (works now) 275 * NOTE: These two changes make the operation of /dev/bios 276 theoretically correct, and by that quite secure. 277 278********************************************************************** 279 280There was no ChangeLog for versions prior to 0.2.6 281 282