1 /* 2 * (C) Copyright 2001 3 * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 /* 25 * board/config.h - configuration options, board specific 26 */ 27 28 #ifndef __CONFIG_H 29 #define __CONFIG_H 30 31 /* 32 * High Level Configuration Options 33 * (easy to change) 34 */ 35 36 #define CONFIG_405CR 1 /* This is a PPC405CR CPU */ 37 #define CONFIG_4xx 1 /* ...member of PPC4xx family */ 38 #define CONFIG_CANBT 1 /* ...on a CANBT board */ 39 40 #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ 41 42 #define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */ 43 44 #define CONFIG_BAUDRATE 115200 45 #define CONFIG_BOOTDELAY 1 /* autoboot after 1 seconds */ 46 47 #undef CONFIG_BOOTARGS 48 #define CONFIG_BOOTCOMMAND \ 49 "setenv bootargs root=/dev/ram rw console=ttyS0,115200; " \ 50 "bootm ffe00000 ffe80000" 51 52 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ 53 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ 54 55 #undef CONFIG_PCI_PNP /* no pci plug-and-play */ 56 57 #define CONFIG_PHY_ADDR 0 /* PHY address */ 58 59 60 /* 61 * BOOTP options 62 */ 63 #define CONFIG_BOOTP_BOOTFILESIZE 64 #define CONFIG_BOOTP_BOOTPATH 65 #define CONFIG_BOOTP_GATEWAY 66 #define CONFIG_BOOTP_HOSTNAME 67 68 69 /* 70 * Command line configuration. 71 */ 72 #include <config_cmd_default.h> 73 74 #define CONFIG_CMD_IRQ 75 #define CONFIG_CMD_EEPROM 76 77 #undef CONFIG_CMD_NET 78 79 80 #undef CONFIG_WATCHDOG /* watchdog disabled */ 81 82 #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ 83 84 /* 85 * Miscellaneous configurable options 86 */ 87 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 88 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 89 #if defined(CONFIG_CMD_KGDB) 90 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 91 #else 92 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 93 #endif 94 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 95 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 96 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 97 98 #define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* don't print console @ startup*/ 99 100 #define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ 101 #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ 102 103 #define CONFIG_SYS_EXT_SERIAL_CLOCK 14745600 /* use external serial clock */ 104 105 /* The following table includes the supported baudrates */ 106 #define CONFIG_SYS_BAUDRATE_TABLE \ 107 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ 108 57600, 115200, 230400, 460800, 921600 } 109 110 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ 111 #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ 112 113 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ 114 115 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ 116 117 /*----------------------------------------------------------------------- 118 * Start addresses for the final memory configuration 119 * (Set up by the startup code) 120 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 121 */ 122 #define CONFIG_SYS_SDRAM_BASE 0x00000000 123 #define CONFIG_SYS_FLASH_BASE 0xFFFE0000 124 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 125 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* Reserve 128 kB for Monitor */ 126 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ 127 128 /* 129 * For booting Linux, the board info and command line data 130 * have to be in the first 8 MB of memory, since this is 131 * the maximum mapped by the Linux kernel during initialization. 132 */ 133 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 134 /*----------------------------------------------------------------------- 135 * FLASH organization 136 */ 137 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 138 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ 139 140 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ 141 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ 142 143 #define CONFIG_SYS_FLASH_WORD_SIZE unsigned short /* flash word size (width) */ 144 #define CONFIG_SYS_FLASH_ADDR0 0x5555 /* 1st address for flash config cycles */ 145 #define CONFIG_SYS_FLASH_ADDR1 0x2AAA /* 2nd address for flash config cycles */ 146 /* 147 * The following defines are added for buggy IOP480 byte interface. 148 * All other boards should use the standard values (CPCI405 etc.) 149 */ 150 #define CONFIG_SYS_FLASH_READ0 0x0000 /* 0 is standard */ 151 #define CONFIG_SYS_FLASH_READ1 0x0001 /* 1 is standard */ 152 #define CONFIG_SYS_FLASH_READ2 0x0002 /* 2 is standard */ 153 154 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 155 156 #if 0 /* Use FLASH for environment variables */ 157 158 #define CONFIG_ENV_IS_IN_FLASH 1 159 #define CONFIG_ENV_OFFSET 0x00010000 /* Offset of Environment Sector */ 160 #define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ 161 162 #define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */ 163 164 #else /* Use EEPROM for environment variables */ 165 166 #define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ 167 #define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ 168 #define CONFIG_ENV_SIZE 0x400 /* 1024 bytes may be used for env vars */ 169 /* total size of a CAT24WC08 is 1024 bytes */ 170 #endif 171 172 /*----------------------------------------------------------------------- 173 * I2C EEPROM (CAT24WC08) for environment 174 */ 175 #define CONFIG_HARD_I2C /* I2C with hardware support */ 176 #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ 177 #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ 178 #define CONFIG_SYS_I2C_SLAVE 0x7F 179 180 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */ 181 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 182 /* mask of address bits that overflow into the "EEPROM chip address" */ 183 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 184 185 /* 186 * Init Memory Controller: 187 * 188 * BR0/1 and OR0/1 (FLASH) 189 */ 190 191 #define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */ 192 #define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */ 193 194 /*----------------------------------------------------------------------- 195 * External Bus Controller (EBC) Setup 196 */ 197 198 /* Memory Bank 0 (Flash Bank 0) initialization */ 199 #define CONFIG_SYS_EBC_PB0AP 0x92015480 200 #define CONFIG_SYS_EBC_PB0CR 0xFFC5A000 /* BAS=0xFFC,BS=4MB,BU=R/W,BW=16bit */ 201 202 /* Memory Bank 1 (CAN/USB) initialization */ 203 #define CONFIG_SYS_EBC_PB1AP 0x010053C0 /* enable Ready, BEM=1 */ 204 #define CONFIG_SYS_EBC_PB1CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */ 205 206 /* Memory Bank 2 (Misc-IO/LEDs) initialization */ 207 #define CONFIG_SYS_EBC_PB2AP 0x000004c0 /* no Ready, BEM=1 */ 208 #define CONFIG_SYS_EBC_PB2CR 0xF0118000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit */ 209 210 /* Memory Bank 3 (CAN Features) initialization */ 211 #define CONFIG_SYS_EBC_PB3AP 0x80000040 /* no Ready, BEM=1 */ 212 #define CONFIG_SYS_EBC_PB3CR 0xF021C000 /* BAS=0xF02,BS=1MB,BU=R/W,BW=32bit */ 213 214 /*----------------------------------------------------------------------- 215 * Definitions for initial stack pointer and data area (in RAM) 216 */ 217 #define CONFIG_SYS_INIT_RAM_ADDR 0x00ef0000 /* inside of SDRAM */ 218 #define CONFIG_SYS_INIT_RAM_END 0x0f00 /* End of used area in RAM */ 219 #define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ 220 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) 221 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 222 223 224 /* 225 * Internal Definitions 226 * 227 * Boot Flags 228 */ 229 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ 230 #define BOOTFLAG_WARM 0x02 /* Software reboot */ 231 232 #endif /* __CONFIG_H */ 233