1 /*
2  * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
3  *
4  * Configuation settings for the TI OMAP NetStar board.
5  *
6  * See file CREDITS for list of people who contributed to this
7  * project.
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 of
12  * the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22  * MA 02111-1307 USA
23  */
24 
25 #ifndef __CONFIG_H
26 #define __CONFIG_H
27 
28 #include <configs/omap1510.h>
29 
30 #define CONFIG_ARM925T	1		/* This is an arm925t CPU */
31 #define CONFIG_OMAP	1		/* in a TI OMAP core */
32 #define CONFIG_OMAP1510 1		/* which is in a 5910 */
33 
34 /* Input clock of PLL */
35 #define CONFIG_SYS_CLK_FREQ		150000000	/* 150MHz */
36 #define CONFIG_XTAL_FREQ		12000000	/*  12MHz */
37 
38 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff */
39 
40 #define CONFIG_MISC_INIT_R		/* There is nothing to really init */
41 #define BOARD_LATE_INIT			/* but we flash the LEDs here */
42 
43 #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
44 #define CONFIG_SETUP_MEMORY_TAGS	1
45 #define CONFIG_INITRD_TAG		1
46 
47 #define CONFIG_SILENT_CONSOLE		1	/* enable silent startup */
48 #define CONFIG_SYS_CONSOLE_INFO_QUIET
49 
50 /*
51  * Physical Memory Map
52  */
53 #define CONFIG_NR_DRAM_BANKS		1
54 #define PHYS_SDRAM_1			0x10000000
55 #define PHYS_SDRAM_1_SIZE		(64 * 1024 * 1024)
56 #define PHYS_FLASH_1			0x00000000
57 
58 #define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
59 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
60 
61 /*
62  * Environment settings
63  */
64 #define CONFIG_ENV_IS_IN_FLASH
65 #define CONFIG_ENV_ADDR			0x4000
66 #define CONFIG_ENV_SIZE			(8 * 1024)
67 #define CONFIG_ENV_SECT_SIZE		(8 * 1024)
68 #define CONFIG_ENV_ADDR_REDUND		0x6000
69 #define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
70 #define CONFIG_ENV_OVERWRITE
71 
72 /*
73  * Size of malloc() pool
74  */
75 #define CONFIG_SYS_GBL_DATA_SIZE	128
76 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
77 
78 /*
79  * The stack size is set up in start.S using the settings below
80  */
81 #define CONFIG_STACKSIZE		(1 * 1024 * 1024)
82 
83 /*
84  * Hardware drivers
85  */
86 #define CONFIG_SYS_NS16550
87 #define CONFIG_SYS_NS16550_SERIAL
88 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
89 #define CONFIG_SYS_NS16550_CLK		(CONFIG_XTAL_FREQ)
90 #define CONFIG_SYS_NS16550_COM1		OMAP1510_UART1_BASE
91 
92 #define CONFIG_NET_MULTI
93 #define CONFIG_SMC91111
94 #define CONFIG_SMC91111_BASE		0x04000300
95 
96 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
97 #define CONFIG_SYS_MAX_FLASH_BANKS	1
98 #define CONFIG_SYS_MAX_FLASH_SECT	19
99 
100 #define CONFIG_SYS_FLASH_CFI
101 #define CONFIG_FLASH_CFI_DRIVER
102 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
103 #define CONFIG_FLASH_CFI_LEGACY
104 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
105 
106 #define CONFIG_SYS_MAX_NAND_DEVICE	1
107 #define CONFIG_SYS_NAND_BASE		0x04000000 + (2 << 23)
108 #define NAND_ALLOW_ERASE_ALL		1
109 
110 #define CONFIG_HARD_I2C
111 #define CONFIG_SYS_I2C_SPEED		100000
112 #define CONFIG_SYS_I2C_SLAVE		1
113 #define CONFIG_DRIVER_OMAP1510_I2C
114 
115 #define CONFIG_RTC_DS1307
116 #define CONFIG_SYS_I2C_RTC_ADDR		0x68
117 
118 
119 #define CONFIG_CONS_INDEX		1
120 #define CONFIG_BAUDRATE			115200
121 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
122 
123 /*#define CONFIG_SKIP_RELOCATE_UBOOT*/
124 /*#define CONFIG_SKIP_LOWLEVEL_INIT */
125 
126 /*
127  * Partitions (mtdparts command line support)
128  */
129 #define CONFIG_CMD_MTDPARTS
130 #define CONFIG_MTD_DEVICE
131 #define CONFIG_FLASH_CFI_MTD
132 #define MTDIDS_DEFAULT		"nor0=physmap-flash.0,nand0=gen_nand.0"
133 #define MTDPARTS_DEFAULT	"mtdparts=" \
134 	"physmap-flash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \
135 	"gen_nand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)"
136 
137 /*
138  * Command line configuration
139  */
140 #define CONFIG_CMD_BDI
141 #define CONFIG_CMD_BOOTD
142 #define CONFIG_CMD_DATE
143 #define CONFIG_CMD_DHCP
144 #define CONFIG_CMD_SAVEENV
145 #define CONFIG_CMD_FLASH
146 #define CONFIG_CMD_IMI
147 #define CONFIG_CMD_LOADB
148 #define CONFIG_CMD_MEMORY
149 #define CONFIG_CMD_NAND
150 #define CONFIG_CMD_NET
151 #define CONFIG_CMD_PING
152 #define CONFIG_CMD_RUN
153 
154 /*
155  * BOOTP options
156  */
157 #define CONFIG_BOOTP_SUBNETMASK
158 #define CONFIG_BOOTP_GATEWAY
159 #define CONFIG_BOOTP_HOSTNAME
160 #define CONFIG_BOOTP_BOOTPATH
161 
162 #define CONFIG_LOOPW
163 
164 #define CONFIG_BOOTDELAY	3
165 #define CONFIG_ZERO_BOOTDELAY_CHECK	/* allow to break in always */
166 #undef  CONFIG_BOOTARGS		/* the boot command will set bootargs*/
167 #define CONFIG_SYS_AUTOLOAD		"n"		/* No autoload */
168 #define CONFIG_BOOTCOMMAND	"run fboot"
169 #define CONFIG_PREBOOT		"run setup"
170 #define	CONFIG_EXTRA_ENV_SETTINGS					\
171 	"autostart=yes\0"						\
172 	"ospart=0\0"							\
173 	"setup=setenv bootargs console=ttyS0,$baudrate $mtdparts\0"	\
174 	"setpart="							\
175 	"if test -n $swapos; then "					\
176 		"setenv swapos; saveenv; "				\
177 		"if test $ospart -eq 0; then "				\
178 			"setenv ospart 1; "				\
179 		"else "							\
180 			"setenv ospart 0; "				\
181 		"fi; "							\
182 	"fi\0"								\
183 	"nfsargs=setenv bootargs $bootargs "				\
184 		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
185 		"nfsroot=$rootpath root=/dev/nfs\0"			\
186 	"flashargs=run setpart;setenv bootargs $bootargs "		\
187 		"root=mtd:rootfs$ospart ro "				\
188 		"rootfstype=jffs2\0"					\
189 	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0"	\
190 	"fboot=run flashargs;nboot kernel$ospart\0"			\
191 	"nboot=bootp;run nfsargs;tftp\0"
192 
193 #if 0	/* feel free to disable for development */
194 #define	CONFIG_AUTOBOOT_KEYED		/* Enable password protection	*/
195 #define CONFIG_AUTOBOOT_PROMPT		\
196 	"\nNetStar PBX - boot in %d secs...\n", bootdelay
197 #define CONFIG_AUTOBOOT_DELAY_STR	"."	/* 1st "password"	*/
198 #endif
199 
200 /*
201  * Miscellaneous configurable options
202  */
203 #define CONFIG_SYS_LONGHELP
204 #define CONFIG_SYS_PROMPT		"# "
205 #define CONFIG_SYS_CBSIZE		256
206 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
207 	 sizeof(CONFIG_SYS_PROMPT) + 16)
208 #define CONFIG_SYS_MAXARGS		16
209 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
210 
211 #define CONFIG_SYS_HUSH_PARSER
212 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
213 #define CONFIG_AUTO_COMPLETE
214 
215 #define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_1
216 #define CONFIG_SYS_MEMTEST_END		PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
217 	(CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
218 
219 #define CONFIG_SYS_LOAD_ADDR		(PHYS_SDRAM_1 + 0x400000)
220 
221 /* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
222  * This time is further subdivided by a local divisor.
223  */
224 #define CONFIG_SYS_TIMERBASE		OMAP1510_TIMER1_BASE
225 #define CONFIG_SYS_PTV			7
226 #define CONFIG_SYS_HZ			1000
227 
228 #define OMAP5910_DPLL_DIV		1
229 #define OMAP5910_DPLL_MUL		\
230 	((CONFIG_SYS_CLK_FREQ * (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
231 
232 #define OMAP5910_ARM_PER_DIV	2	/* CKL/4 */
233 #define OMAP5910_LCD_DIV	2	/* CKL/4 */
234 #define OMAP5910_ARM_DIV	0	/* CKL/1 */
235 #define OMAP5910_DSP_DIV	0	/* CKL/1 */
236 #define OMAP5910_TC_DIV		1	/* CKL/2 */
237 #define OMAP5910_DSP_MMU_DIV	1	/* CKL/2 */
238 #define OMAP5910_ARM_TIM_SEL	1	/* CKL used for MPU timers */
239 
240 #define OMAP5910_ARM_EN_CLK	0x03d6	/* 0000 0011 1101 0110b */
241 #define OMAP5910_ARM_CKCTL	((OMAP5910_ARM_PER_DIV)  |	\
242 				 (OMAP5910_LCD_DIV << 2) |	\
243 				 (OMAP5910_ARM_DIV << 4) |	\
244 				 (OMAP5910_DSP_DIV << 6) |	\
245 				 (OMAP5910_TC_DIV << 8) |	\
246 				 (OMAP5910_DSP_MMU_DIV << 10) |	\
247 				 (OMAP5910_ARM_TIM_SEL << 12))
248 
249 #endif	/* __CONFIG_H */
250